* Yu-Cheng Liu [150721 11:04]:
> Hello,
>
> I purpose to trigger SMI event and do something in SMM mode .
>
>
>
> I trace the coreboot source code and found that, during the coreboot
> environment setup, the file locate at southbridge/intel/i82801ix/smi.c will
> be
> excute. Is it enough for SMI/SMM operation?
That is just the code that installs the SMM handler (well, part of it)
> I didn’t see the code under cpu/smm be locate in the ramstage.debug symbol.
The SMM handler is a separate module.
> What is the different purpose between southbridge/intel/i82801ix/smi.c and
> /cpu
> /x86/smm?
The code in southbridge/intel/i82801ix/smi.c is the chipset specific SMI
initialization. southbridge/intel/i82801ix/smihandler.c is the chipset
specific SMI handler.
The code under cpu/x86/smm is generic for the x86 architecture.
> How do I trigger the SMI event?
Typically hardware triggers an SMI, e.g. on a GPE event, timeout, or
such. See southbridge/intel/i82801ix/smihandler.c for a more
comprehensive list of southbridge SMI sources.
You can also use the APMC SMI command mechanism to manually trigger
SMIs, see southbridge_smi_apmc(void) for details.
Stefan
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