Re: [coreboot] RYZen single APU design
Since last 24 hours, this is the newest AMD RyZen member/sku falling of The Sky! :-) Monster AMD Ryzen 16-Core CPU Could Be On The Way: $1000 Cheaper And Faster Than Intel https://www.forbes.com/sites/antonyleather/2017/03/19/monste r-amd-ryzen-16-core-cpu-could-be-on-the-way-1000-cheaper- and-faster-than-intel/#47ce736a3d62 I just sent to AMD questions regarding this one (extra nice if Z370 would be integrated in it and make this silicon true SoC)! Exactly what I need for one of projects I am trying to boost. And if the price for single sku would be $700 USD (as they advertise), The Sky is The Limit! [image: Inline image 1] Zoran On Sat, Mar 18, 2017 at 8:05 AM, Zoran Stojsavljevic < zoran.stojsavlje...@gmail.com> wrote: > Hello Qmaster, Taiidan, > > Thank you for the replies. Last day (March 16th, 2017, Thursday) of > Embedded World 2017 I took the trip from Munich to Nuremberg on my own dime > (to visit EW 2017), and to speak with some people/companies I supported > previously (while being "Intel-er", you name it, the support joke), and I > had also the plan to visit AMD booth, so seconds prior I left to Munich > HBf, I sent this email, to see what community will tell. > > Interesting talks I had with AMD people. I was able to grab attention of > the most technical guy on the booth, so we had 30 minutes very productive > and lengthy conversation, since I had prepared exact requirements for so > far for implementation of the one of the US patents about efficient RAID > big data storage. > > Since I am NOT (per say) AMD guy (unfortunately, still in my sub-conscious > INTEL guy, it is (MUST) changing for the near Future), and I really would > like to embark on their technology since/including RyZen, I have learned a > lot. And what I have learned is about Naples. It is a true killer (if this > is The Truth what they say about it)! > > After returning home, that evening, I quickly re-assessed my notes, and > immediately was able to find the real video about Naples: > https://www.youtube.com/watch?v=PN93G6Rg2ek (please, watch it from 1:20) > > Naples: True SoC (integrated PCH/Chipset), has 8-channel DDR4 (3.2 GHz > clock speed) memory access, able to bring at maximum of 256GB of DDR4 > memory, has PCIe X 128 lanes (overall)... And it'll come June/July 2017 > time-frame. No signs of price tag, so far! > > And, YES, no way to get rid of AMD Chip-set. Too costly for managing Power > Management/PMIC and far fetched VRs' regulators, although I see that AMD > one is NOT so demanding as INTEL PCH (why it is so, you should ask, whom?)!? > > Thank you, > Zoran > > On Fri, Mar 17, 2017 at 1:54 AM, taii...@gmx.com wrote: > >> On 03/16/2017 06:05 AM, qma ster wrote: >> >> As far as I know, AMD does not have any "evil brother" of Intel ME. It >>> only >>> has AMD PSP (Platform Secure Processor) that is built-in to CPU. So, I >>> don't think that cutting a PCH from AMD CPU has any practical value: even >>> if the platform will boot after such a radical change to computer's >>> hardware, you'll lose a lot of essential stuff like USB ports >>> >> "only has" huh? >> PSP and ME do literally the same thing and have the same capabilities, >> they're a like for like with implementation details being the only >> difference. >> > > -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] RYZen single APU design
Hello Qmaster, Taiidan, Thank you for the replies. Last day (March 16th, 2017, Thursday) of Embedded World 2017 I took the trip from Munich to Nuremberg on my own dime (to visit EW 2017), and to speak with some people/companies I supported previously (while being "Intel-er", you name it, the support joke), and I had also the plan to visit AMD booth, so seconds prior I left to Munich HBf, I sent this email, to see what community will tell. Interesting talks I had with AMD people. I was able to grab attention of the most technical guy on the booth, so we had 30 minutes very productive and lengthy conversation, since I had prepared exact requirements for so far for implementation of the one of the US patents about efficient RAID big data storage. Since I am NOT (per say) AMD guy (unfortunately, still in my sub-conscious INTEL guy, it is (MUST) changing for the near Future), and I really would like to embark on their technology since/including RyZen, I have learned a lot. And what I have learned is about Naples. It is a true killer (if this is The Truth what they say about it)! After returning home, that evening, I quickly re-assessed my notes, and immediately was able to find the real video about Naples: https://www.youtube.com/watch?v=PN93G6Rg2ek (please, watch it from 1:20) Naples: True SoC (integrated PCH/Chipset), has 8-channel DDR4 (3.2 GHz clock speed) memory access, able to bring at maximum of 256GB of DDR4 memory, has PCIe X 128 lanes (overall)... And it'll come June/July 2017 time-frame. No signs of price tag, so far! And, YES, no way to get rid of AMD Chip-set. Too costly for managing Power Management/PMIC and far fetched VRs' regulators, although I see that AMD one is NOT so demanding as INTEL PCH (why it is so, you should ask, whom?)!? Thank you, Zoran On Fri, Mar 17, 2017 at 1:54 AM, taii...@gmx.com wrote: > On 03/16/2017 06:05 AM, qma ster wrote: > > As far as I know, AMD does not have any "evil brother" of Intel ME. It only >> has AMD PSP (Platform Secure Processor) that is built-in to CPU. So, I >> don't think that cutting a PCH from AMD CPU has any practical value: even >> if the platform will boot after such a radical change to computer's >> hardware, you'll lose a lot of essential stuff like USB ports >> > "only has" huh? > PSP and ME do literally the same thing and have the same capabilities, > they're a like for like with implementation details being the only > difference. > -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] RYZen single APU design
On 03/16/2017 06:05 AM, qma ster wrote: As far as I know, AMD does not have any "evil brother" of Intel ME. It only has AMD PSP (Platform Secure Processor) that is built-in to CPU. So, I don't think that cutting a PCH from AMD CPU has any practical value: even if the platform will boot after such a radical change to computer's hardware, you'll lose a lot of essential stuff like USB ports "only has" huh? PSP and ME do literally the same thing and have the same capabilities, they're a like for like with implementation details being the only difference. -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] RYZen single APU design
As far as I know, AMD does not have any "evil brother" of Intel ME. It only has AMD PSP (Platform Secure Processor) that is built-in to CPU. So, I don't think that cutting a PCH from AMD CPU has any practical value: even if the platform will boot after such a radical change to computer's hardware, you'll lose a lot of essential stuff like USB ports 2017-03-16 8:03 GMT+03:00 Zoran Stojsavljevic : > Hello Coreboot folks, > > I have couple of interesting questions here. > > Recently, I have started learning about AMD (RYZen did not live me > unemotional), so after reading several articles (especially one with AMD > architecture): > http://www.anandtech.com/show/11182/how-to-get-ryzen-working > -on-windows-7-x64 > > I found/got from this article very interesting thought: AMD's APU, as > shown on this picture, could be left alone, even not connecting > Chipset/PCH!? > > I know that for INTEL this is impossible to do. With early INTEL ME > involvement to HW bring up (wrt PMIC and EC), I am wondering if this is > very similar architecture with AMD? > > [image: Inline image 1] > > [1] Did anybody try some proprietary embedded design, with AMD's APU all > alone (is it at all possible)? > [2] if [1] true, does anybody have some HW schema showing in details how > this is done/designed? > [3] if [1] is true. does Coreboot support such AMD designs (sans > chipsets/PCHs)? > > Thank you, > Zoran > > > -- > coreboot mailing list: coreboot@coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot > -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] RYZen single APU design
Hello Coreboot folks, I have couple of interesting questions here. Recently, I have started learning about AMD (RYZen did not live me unemotional), so after reading several articles (especially one with AMD architecture): http://www.anandtech.com/show/11182/how-to-get-ryzen- working-on-windows-7-x64 I found/got from this article very interesting thought: AMD's APU, as shown on this picture, could be left alone, even not connecting Chipset/PCH!? I know that for INTEL this is impossible to do. With early INTEL ME involvement to HW bring up (wrt PMIC and EC), I am wondering if this is very similar architecture with AMD? [image: Inline image 1] [1] Did anybody try some proprietary embedded design, with AMD's APU all alone (is it at all possible)? [2] if [1] true, does anybody have some HW schema showing in details how this is done/designed? [3] if [1] is true. does Coreboot support such AMD designs (sans chipsets/PCHs)? Thank you, Zoran -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot