Dear Martin,
Am 23.12.22 um 01:00 schrieb Martin Roth via coreboot:
Also, I think I tracked down the commit that that tree was based on:
5d0601767f vendorcode/amd/agesa/fam10: Build as a static library (2014-12-08)
Method:
[…]
Looking at what's contained in the repo on github, I'd probably
delete crossgcc/xgcc and crossgcc/tarballs from git, but that's up to
you.
Thank you for figuring this all out. I attach the diffstat, and only
note some things:
1. Build script, which seems only be used early on though:
$ more build_coreboot.sh
#!/bin/sh
make clean
cd payloads/external/SeaBIOS/seabios/
make
cd ../../../..
make
2. The payload.elf is not SeaBIOS though. It seems to be *miles* (the
Meraki Intermediate Loader for Embedded Systems), and it uses libpayload
and libfdt, and the source is in `meraki/miles/main/`.
3. Top directory `.config` is configured for intel/mohonpeak. The same
for `meraki/configs/config.mx84`.
```
$ diff -u .config meraki/configs/config.mx84
--- .config 2023-01-02 17:11:06.208154535 +0100
+++ meraki/configs/config.mx84 2023-01-02 17:11:06.212154551 +0100
@@ -115,7 +115,7 @@
CONFIG_DCACHE_RAM_BASE=0xfef0
CONFIG_DCACHE_RAM_SIZE=0x4000
CONFIG_MMCONF_BASE_ADDRESS=0xe000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LiteOn"
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Cisco Meraki"
# CONFIG_PCI_64BIT_PREF_MEM is not set
CONFIG_UART_FOR_CONSOLE=1
CONFIG_ID_SECTION_OFFSET=0x80
@@ -139,7 +139,7 @@
CONFIG_INCLUDE_ME=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x80
-CONFIG_FSP_FILE="component/FSP/fsp_v400_debug.bin"
+CONFIG_FSP_FILE="component/FSP/fsp_v405.bin"
CONFIG_CBFS_SIZE=0x0020
CONFIG_ENABLE_FSP_FAST_BOOT=y
CONFIG_VIRTUAL_ROM_SIZE=0x100
@@ -460,8 +460,8 @@
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="2015-10-27"
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GRM-1001-MK"
+CONFIG_MAINBOARD_SERIAL_NUMBER=""
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MX84-HW"
#
# Payload
@@ -474,7 +474,7 @@
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
# CONFIG_SEABIOS_THREAD_OPTIONROMS is not set
-CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
+CONFIG_PAYLOAD_FILE="payload.elf"
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
#
```
4. `src/mainboard/intel/mohonpeak/gpio.h` was adapted.
5. The difference between the two (new) microcode header files is just
the removed license header and header comments.
a) `component/Microcode/microcode-m01406d8128.h`
b) `src/vendorcode/intel/fsp/rangeley/include/microcode-m01406d8128.h`
6. The referenced FSP files are missing in `component`.
7. `meraki/Makefile` is new and can be used for building. It even has a
target `libpayload-menuconfig`.
libpayload-menuconfig:
$(MAKE) -C $(LIBPAYLOAD_DIR)
DOTCONFIG=$(CONFIGS_DIR)/config.libpayload.$(PLATFORM) menuconfig
If that is really the source, that built the image, than from the
coreboot side, the cisco/meraki seems to be intel/mohonpeak with a few
GPIO changes, and a libpayload based payload *miso*.
Kind regards,
Paul .config
| 501 ++
.gitignore
| 100 -
.gitmodules
| 8 -
.gitreview
| 5 -
.xcompile
|23 +
3rdparty
| 1 -
build_coreboot.sh
| 7 +
component/Descriptor/descriptor.bin
| Bin 0 -> 65536 bytes
component/Microcode/microcode-m01406d8128.h
| 21275 +
meraki/Makefile
|68 +
meraki/configs/config.libpayload.mx84
|66 +
meraki/configs/config.mx84
| 501 ++
meraki/miles/Makefile
| 160 +
meraki/miles/include/debug.h
|48 +
meraki/miles/include/fdt.h
| 111 +
meraki/miles/include/lib.h
|40 +
meraki/miles/include/libfdt.h
