[coreboot] Re: First commercially available coreboot for Intel Xeon-SP

[Paul Menzel]

Dear Jonathan,


Am 05.11.21 um 20:05 schrieb Jonathan Zhang:


We now have the first commercially available coreboot solution for
servers based on Intel Xeon-SP processor (specifically CooperLake
Scalable Processor).


These are great news. (As always a nit: Cooper Lake-SP ;-))


WW OCP DeltaLake server (with OSF being part of it) was OCP accepted;
Also the server and its OSF solution are on market, backed by WW and
9E partnership.

OCP blog: 
https://www.opencompute.org/blog/open-system-firmware-for-ocp-server-deltalake-is-published

WW PR: 
https://www.prnewswire.com/news-releases/wiwynn-successfully-implemented-open-system-firmware-on-its-ocp-yosemite-v3-server-301417374.html?tc=eml_cleartime

I look forward to a positive loop between coreboot engineering as open
source firmware and its commercial success! Go coreboot for a fair
server market share.


Finger’s crossed.

For completeness, it’d be awesome if you uploaded the logs to the board 
status repository. In the coreboot repository, you built the image from, 
run `util/board_status/board_status.sh -u`.



Kind regards,

Paul


PS: For the record (built with gcc (Debian 11.2.0-10) 11.2.0 based on 
commit commit 91c077f6 (ChromeOS: Fix ):


```
$ more defconfig
CONFIG_ANY_TOOLCHAIN=y
CONFIG_VENDOR_OCP=y
CONFIG_NO_POST=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x2
CONFIG_UART_PCI_ADDR=0x0
CONFIG_SUBSYSTEM_VENDOR_ID=0x
CONFIG_SUBSYSTEM_DEVICE_ID=0x
CONFIG_SEABIOS_MASTER=y
CONFIG_SEABIOS_DEBUG_LEVEL=-1
$ build/cbfstool build/coreboot.rom print
FMAP REGION: COREBOOT
Name   Offset Type   Size   Comp
cbfs master header 0x0cbfs header32 none
fallback/romstage  0x80   stage   46704 none
intel_fit  0xb780 raw80 none
fallback/ramstage  0xb800 stage   97392 LZMA 
(214868 decompressed)

config 0x23500raw   308 none
revision   0x23680raw   717 none
build_info 0x23980raw   112 none
fallback/dsdt.aml  0x23a40raw 15339 none
payload_revision   0x27680raw   223 none
fspm.bin   0x277c0fsp   2232320 none
payload_config 0x248800   raw  1621 none
(empty)0x248e80   null 2340 none
fsps.bin   0x2497c0   fsp262144 none
fallback/postcar   0x289800   stage   19604 none
fallback/payload   0x28e500   simple elf  72695 none
(empty)0x2a0140   null 12891172 none
cpu_microcode_blob.bin 0xeeb580   microcode   27648 none
(empty)0xef21c0   null   824804 none
fspt.bin   0xfbb7c0   fsp 24576 none
(empty)0xfc1800   null89380 none
bootblock  0xfd7540   bootblock   17024 none
```
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[coreboot] Re: First commercially available coreboot for Intel Xeon-SP

[David Hendricks]

This is awesome! Thanks for sharing, and keep up the great work!

On Fri, Nov 5, 2021 at 12:06 PM Jonathan Zhang 
wrote:

> Hi,
>
> We now have the first commercially available coreboot solution for
> servers based on Intel Xeon-SP processor (specifically CooperLake
> Scalable Processor).
>
> WW OCP DeltaLake server (with OSF being part of it) was OCP accepted;
> Also the server and its OSF solution are on market, backed by WW and
> 9E partnership.
>
> OCP blog:
> https://www.opencompute.org/blog/open-system-firmware-for-ocp-server-deltalake-is-published
>
> WW PR:
> https://www.prnewswire.com/news-releases/wiwynn-successfully-implemented-open-system-firmware-on-its-ocp-yosemite-v3-server-301417374.html?tc=eml_cleartime
>
> I look forward to a positive loop between coreboot engineering as open
> source firmware and its commercial success! Go coreboot for a fair
> server market share.
>
> Jonathan
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
>
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