Re: [coreboot] Support for Google CR-48/Atom N455

2011-01-04 Thread Brandon White 
Thanks Crisit for getting back to me. I have indeed flashed it with flashrom
in Ubuntu. I will see what I can do about details of the northbridge.

On Mon, Jan 3, 2011 at 12:07 PM, Cristi Magherusan <
cristi.magheru...@net.utcluj.ro> wrote:

> În Dum, Ianuarie 2, 2011 4:31, Brandon White a scris:
> > Hello all. Someone was accidentally sent a CR-48 that had Windows 7
> > pre-installed and an actual BIOS instead of Google's EFI. Anways, he
> > uploaded the BIOS, I was able to flash it and after that I installed
> > Ubuntu
> > as a dual boot with Chrome OS. I was wondering if Coreboot was possible
> on
> >  this machine? I have attached everything asked for in the wiki.
> >
> > Thanks,
> > Brandon
> > --
> > coreboot mailing list: coreboot@coreboot.org
> > http://www.coreboot.org/mailman/listinfo/coreboot
>
> Hello,
>
> Flashrom seems to support your flash, but writes weren't tested/confirmed
> to work yet on the flashrom wiki. Did you flash it using Frashrom?
>
> The ICH7 southbridge is supported, no idea about the northbridge, you
> might need doc from Intel, which is hard to get unless you have an NDA.
>
> If you are lucky, the SMSC SCH5317 SuperIO might be easy to support, by
> porting the code for SCH5307 which is already supported.
>
> I have no clue about the other  superIO chip or what could it be used for.
> maybe we don't need it at all for system init.
>
> Also, thew board might have an Embedded Controller, which might make
> things even harder.
>
> Good luck!
> Cristi
>
>
-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Support for Google CR-48/Atom N455

2011-01-03 Thread Cristi Magherusan 
În Dum, Ianuarie 2, 2011 4:31, Brandon White a scris:
> Hello all. Someone was accidentally sent a CR-48 that had Windows 7
> pre-installed and an actual BIOS instead of Google's EFI. Anways, he
> uploaded the BIOS, I was able to flash it and after that I installed
> Ubuntu
> as a dual boot with Chrome OS. I was wondering if Coreboot was possible on
>  this machine? I have attached everything asked for in the wiki.
>
> Thanks,
> Brandon
> --
> coreboot mailing list: coreboot@coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot

Hello,

Flashrom seems to support your flash, but writes weren't tested/confirmed
to work yet on the flashrom wiki. Did you flash it using Frashrom?

The ICH7 southbridge is supported, no idea about the northbridge, you
might need doc from Intel, which is hard to get unless you have an NDA.

If you are lucky, the SMSC SCH5317 SuperIO might be easy to support, by
porting the code for SCH5307 which is already supported.

I have no clue about the other  superIO chip or what could it be used for.
maybe we don't need it at all for system init.

Also, thew board might have an Embedded Controller, which might make
things even harder.

Good luck!
Cristi


-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Support for Google CR-48/Atom N455

2011-01-02 Thread Brandon White 
Hello all. Someone was accidentally sent a CR-48 that had Windows 7
pre-installed and an actual BIOS instead of Google's EFI. Anways, he
uploaded the BIOS, I was able to flash it and after that I installed Ubuntu
as a dual boot with Chrome OS. I was wondering if Coreboot was possible on
this machine? I have attached everything asked for in the wiki.

Thanks,
Brandon
flashrom v0.9.2-r1028 on Linux 2.6.35-22-generic (i686), built with libpci 
3.0.0, GCC 4.4.4, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 3 usecs, 811M loops per 
second, 10 myus = 12 us, 100 myus = 99 us, 1000 myus = 986 us, 1 myus = 
10192 us, 12 myus = 22 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "IEC"
DMI string system-product-name: "PineTrail"
DMI string system-version: "0.08"
DMI string baseboard-manufacturer: "IEC"
DMI string baseboard-product-name: "Base Board Product Name"
DMI string baseboard-version: "Base Board Version"
DMI string chassis-type: "Other"
Found chipset "Intel NM10", enabling flash write... chipset PCI ID is 
8086:27bc, 
0xfff8/0xffb8 FWH IDSEL: 0x0
0xfff0/0xffb0 FWH IDSEL: 0x0
0xffe8/0xffa8 FWH IDSEL: 0x1
0xffe0/0xffa0 FWH IDSEL: 0x1
0xffd8/0xff98 FWH IDSEL: 0x2
0xffd0/0xff90 FWH IDSEL: 0x2
0xffc8/0xff88 FWH IDSEL: 0x3
0xffc0/0xff80 FWH IDSEL: 0x3
0xff70/0xff30 FWH IDSEL: 0x4
0xff60/0xff20 FWH IDSEL: 0x5
0xff50/0xff10 FWH IDSEL: 0x6
0xff40/0xff00 FWH IDSEL: 0x7
0xfff8/0xffb8 FWH decode enabled
0xfff0/0xffb0 FWH decode enabled
0xffe8/0xffa8 FWH decode enabled
0xffe0/0xffa0 FWH decode enabled
0xffd8/0xff98 FWH decode enabled
0xffd0/0xff90 FWH decode enabled
0xffc8/0xff88 FWH decode enabled
0xffc0/0xff80 FWH decode enabled
0xff70/0xff30 FWH decode enabled
0xff60/0xff20 FWH decode enabled
0xff50/0xff10 FWH decode enabled
0xff40/0xff00 FWH decode enabled
Maximum FWH chip size: 0x10 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x9

Root Complex Register Block address = 0xfed1c000
GCS = 0x40460: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3020
0x00: 0x0004 (SPIS)
0x02: 0x4140 (SPIC)
0x04: 0x (SPIA)
0x08: 0x001615ef (SPID0)
0x0c: 0x (SPID0+4)
0x10: 0x (SPID1)
0x14: 0x (SPID1+4)
0x18: 0x (SPID2)
0x1c: 0x (SPID2+4)
0x20: 0x (SPID3)
0x24: 0x (SPID3+4)
0x28: 0x (SPID4)
0x2c: 0x (SPID4+4)
0x30: 0x (SPID5)
0x34: 0x (SPID5+4)
0x38: 0x (SPID6)
0x3c: 0x (SPID6+4)
0x40: 0x (SPID7)
0x44: 0x (SPID7+4)
0x50: 0x (BBAR)
0x54: 0x5006 (PREOP)
0x56: 0x463b (OPTYPE)
0x58: 0x05d80302 (OPMENU)
0x5c: 0xc79f0190 (OPMENU+4)
0x60: 0x (PBR0)
0x64: 0x (PBR1)
0x68: 0x (PBR2)
0x6c: 0x (PBR3)

Programming OPCODES... 
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
SPI Read Configuration: prefetching enabled, caching enabled, OK.
This chipset supports the following protocols: SPI.
Probing for AMD Am29F010A/B, 128 KB: skipped.
Probing for AMD Am29F002(N)BB, 256 KB: skipped.
Probing for AMD Am29F002(N)BT, 256 KB: skipped.
Probing for AMD Am29F016D, 2048 KB: skipped.
Probing for AMD Am29F040B, 512 KB: skipped.
Probing for AMD Am29F080B, 1024 KB: skipped.
Probing for AMD Am29LV040B, 512 KB: skipped.
Probing for AMD Am29LV081B, 1024 KB: skipped.
Probing for ASD AE49F2008, 256 KB: skipped.
Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 
0x4016
Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probi