Re: [coreboot] eventlong backtrace support

2014-05-08 Thread Kyösti Mälkki

On 05/06/2014 01:22 AM, Rudolf Marek wrote:

Hi all,

I'm still suffering with following errors ONLY when using 4 core Trinity
CPU on the F2A85-M:

EventLog:  EventClass = 2, EventInfo = 8040100.
   Param1 = a00a, Param2 = 0.
   Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
   Param1 = a00a, Param2 = 0.
   Param3 = 0, Param4 = 0.
...

EventLog:  EventClass = 2, EventInfo = 8040100.
   Param1 = a00a, Param2 = 0.
   Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
   Param1 = a00a, Param2 = 0.
   Param3 = 0, Param4 = 0.
agesawrapper_amdinitpost failed: 4
Got past agesawrapper_amdinitpost

There is about 10? of them. System seems to boot fine. I still dont know



Sorry I had not checked this before. I get same on family14 
amd/persimmon with dual-core. These do not appear in log on S3 resume path.


I will try your backtrace later this week.

Kyösti


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[coreboot] eventlong backtrace support

2014-05-05 Thread Rudolf Marek

Hi all,

I'm still suffering with following errors ONLY when using 4 core Trinity CPU on 
the F2A85-M:


EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a00a, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a00a, Param2 = 0.
  Param3 = 0, Param4 = 0.
...

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a00a, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 2, EventInfo = 8040100.
  Param1 = a00a, Param2 = 0.
  Param3 = 0, Param4 = 0.
agesawrapper_amdinitpost failed: 4
Got past agesawrapper_amdinitpost

There is about 10? of them. System seems to boot fine. I still dont know what 
those are but I decided to attack the problem via a backtrace.


I implemented a simple backtracer which I placed in the AGESA PutEventLog() 
function. Once the function is visited I print:


agesawrapper_amdinitreset Fch OEM config in INIT RESET Done
EVENT BACKTRACE:
0xff82cfa7
0xff82f333
0xff82f377
0xff834e5a
0xff8349b2
0xff838bf3
0xff83663d
0xff837495
0xff861999
0xff8346f1
0xff82d661
0xff81db3c
0xff81a355

EVENT BACKTRACE:
...


Then with simple(stupid) script:

cat - | while read line ; do
unset A
if  echo $line | grep ^0x  /dev/null  ; then
A=`addr2line -e build/cbfs/fallback/romstage_xip.elf  $line | tr -d \n`
fi
echo $line $A

done

It turns to:
agesawrapper_amdinitreset Fch OEM config in INIT RESET Done
EVENT BACKTRACE:
0xff82cfa7 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c:662
0xff82f333 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/Common/S3SaveState.c:217
0xff82f377 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/Common/S3SaveState.c:256
0xff834e5a 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c:96
0xff8349b2 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbCommonLib/GnbLib.c:161
0xff838bf3 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbRegisterAccTN.c:1241
0xff83663d 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GfxLibTN.c:330
0xff837495 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbEarlyInitTN.c:840
0xff861999 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbLibFeatures.c:99
0xff8346f1 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/GNB/GnbInitAtEarly.c:122
0xff82d661 
/home/ruik/coreboot/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdInitEarly.c:270

0xff81db3c /home/ruik/coreboot/src/mainboard/asus/f2a85-m/agesawrapper.c:234
0xff81a355 /home/ruik/coreboot/src/mainboard/asus/f2a85-m/romstage.c:135

EVENT BACKTRACE:

It makes me wonder why we dont have such backtrace function available? Or did I 
miss something? Anyway I'm attaching a diff how this was hacked in. I wont have 
time for this for couple of days. It could be handy for someone else, or even 
better make it a real feature :)


Thanks
Rudolf





diff --git a/Makefile.inc b/Makefile.inc
index 315a9d9..ea57a8b 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -223,7 +223,8 @@ CFLAGS += -Wstrict-aliasing -Wshadow
 ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y)
 CFLAGS += -Werror
 endif
-CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer
+CFLAGS += -fno-common -ffreestanding -fno-builtin 
+#-fomit-frame-pointer
 
 additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \
 		   $(objutil)/ifdfake $(objutil)/options
diff --git a/src/arch/x86/lib/c_start.S b/src/arch/x86/lib/c_start.S
index faea22d..8df4324 100644
--- a/src/arch/x86/lib/c_start.S
+++ b/src/arch/x86/lib/c_start.S
@@ -88,6 +88,7 @@ _start:
 #if CONFIG_GDB_WAIT
 	call gdb_stub_breakpoint
 #endif
+	xorl %ebp, %ebp /* construct valid stackframe */
 	call	main
 	/* NOTREACHED */
 .Lhlt:
diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc
index 449cf69..288f5d2 100644
--- a/src/cpu/amd/agesa/cache_as_ram.inc
+++ b/src/cpu/amd/agesa/cache_as_ram.inc
@@ -76,6 +76,7 @@ cache_as_ram_setup:
 
   pushl %ebx  /* init detected */
   pushl %edx  /* bist */
+  xorl %ebp, %ebp /*set stack frame end */
   call  cache_as_ram_main
 
   /* Should never see this postcode */
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 6edcd0a..5c79e87 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -59,7 +59,7 @@ __ap_protected_start:
 	movl	secondary_cpu_index, %edi
 	pushl	%edi
 	movl	%eax, secondary_stack
-
+	xorl %ebp, %ebp /* valid stackframe */
 	call	secondary_cpu_init
 1:	hlt
 	jmp	1b
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEventLog.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEventLog.c
index f73f50b..c02a7b0 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEventLog.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEventLog.c
@@ -189,6 +189,29 @@ EventLogInitialization (
  * @param[in]   StdHeaderHeader for library and services