Re: [coreboot] x200s' nvram will reset to default value if last boot is a normal boot of debian.

[Zoran Stojsavljevic]

Hello Persmule,

Please, forgive for my ignorance regarding X200 HW. No clue how it really
looks inside (except normal, usual configuration).

I have looked into the log, and I do not understand the romstage phase,
namely this:

Memory configured in dual-channel asymmetric mode.
Memory map:
TOM   =   512MB
TOLUD =   512MB
TOUUD =   512MB
REMAP: base  = 65535MB
limit = 0MB
usedMEsize: 0MB
*Performing Jedec initialization at address 0x.*
*Performing Jedec initialization at address 0x0800.*
*Performing Jedec initialization at address 0x1000.*
*Performing Jedec initialization at address 0x1800.*

Seems that you have somewhere in X200 128MB NVRAM as four banks (gives
total of 512MB NVRAM). So, if this repeats every time, regardless how you
shutdown Linux, you need to skip this depending upon the shutdown
conditions.

I repeat, I have no idea what this NVRAM is for? And where/how it is
located? Anyway, 512MB of NVRAM for booting Coreboot, or BIOS (for keeping
postmortem boot-loader or OS parameters) seems too much (at least to me),
don't you think?

Zoran

On Thu, Jan 19, 2017 at 10:11 AM, Persmule  wrote:

> Hi all,
>
> I recently built and flashed a coreboot image to my thinkpad x200s, with
> an IFD generated by libreboot's ich9gen. After flashing, everything seems
> okay, but if I let the Debian GNU/Linux installed on that machine finish
> its booting, all the reasonable value inside NVRAM will be reset to default
> during next boot (detected via nvrancui), whether I shut it down properly
> or cut its power violently.
>
> I have done several tests, whose result is listed below:
>
> Boot mode
> NVRAM reset?
> payload (reboot immediately) no
> parted magic
> no
> trisquel live
> no
> kali live
> no
> Debian recovery mode (reboot immediately)
> no
> Debian installer
> no
> Debian normal boot (with or without display manager)
> yes
> Debian recovery mode (finish recovery and continue booting)
> yes
> Debian normal boot with kernel of Debian installer yes
>
> If I modify those value with nvramtool and reboot, they will be reset to
> default. If I zero the nvram region in a normal booted Debian by running "#
> nvramtool -B /dev/zero" and reboot, the content of NVRAM will keep all
> zero, and will reset during next reboot.
>
> Now in order to keep using my preferred value, I may have to write those
> value to cmos.default, enable STATIC_OPTION_TABLE, and then build them into
> the image.
>
> The problem should be inside the Debian user land. Do you guys have any
> clue how to locate it?
>
> Best regards,
>
> Persmule
>
>
>
> --
> coreboot mailing list: coreboot@coreboot.org
> https://www.coreboot.org/mailman/listinfo/coreboot
>
-- 
coreboot mailing list: coreboot@coreboot.org
https://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] x200s' nvram will reset to default value if last boot is a normal boot of debian.

[Persmule]

Hi all,

I recently built and flashed a coreboot image to my thinkpad x200s, with
an IFD generated by libreboot's ich9gen. After flashing, everything
seems okay, but if I let the Debian GNU/Linux installed on that machine
finish its booting, all the reasonable value inside NVRAM will be reset
to default during next boot (detected via nvrancui), whether I shut it
down properly or cut its power violently.

I have done several tests, whose result is listed below:

Boot mode
NVRAM reset?
payload (reboot immediately)no
parted magic
no
trisquel live
no
kali live
no
Debian recovery mode (reboot immediately)
no
Debian installer
no
Debian normal boot (with or without display manager)
yes
Debian recovery mode (finish recovery and continue booting)
yes
Debian normal boot with kernel of Debian installer  yes


If I modify those value with nvramtool and reboot, they will be reset to
default. If I zero the nvram region in a normal booted Debian by running
"# nvramtool -B /dev/zero" and reboot, the content of NVRAM will keep
all zero, and will reset during next reboot.

Now in order to keep using my preferred value, I may have to write those
value to cmos.default, enable STATIC_OPTION_TABLE, and then build them
into the image.

The problem should be inside the Debian user land. Do you guys have any
clue how to locate it?

Best regards,

Persmule


# This image was built using coreboot 4.5-843-g404f8ef420
CONFIG_CCACHE=y
CONFIG_USE_OPTION_TABLE=y
CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_BOOTBLOCK_NORMAL=y
CONFIG_VENDOR_LENOVO=y
CONFIG_CBFS_SIZE=0x7fd000
CONFIG_HAVE_IFD_BIN=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
CONFIG_CONSOLE_POST=y
CONFIG_HAVE_GBE_BIN=y
CONFIG_BOARD_LENOVO_X200=y
CONFIG_USBDEBUG=y
CONFIG_UART_PCI_ADDR=0
CONFIG_CPU_MICROCODE_CBFS_NONE=y
CONFIG_ON_DEVICE_ROM_LOAD=y
CONFIG_FRAMEBUFFER_KEEP_VESA_MODE=y
CONFIG_USBDEBUG_DEFAULT_PORT=1
CONFIG_USBDEBUG_DONGLE_FTDI_FT232H=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_USB=y
CONFIG_PXE=y
CONFIG_BUILD_IPXE=y
CONFIG_PXE_ROM_ID="8086,10f5"
CONFIG_COREINFO_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y
CONFIG_TINT_SECONDARY_PAYLOAD=y
CONFIG_DEBUG_CBFS=y
CONFIG_DEBUG_RAM_SETUP=y
CONFIG_DEBUG_SMI=y
CONFIG_DEBUG_MALLOC=y
CONFIG_DEBUG_ACPI=y
CONFIG_DEBUG_USBDEBUG=y
USB


coreboot-4.5-843-g404f8ef420 Tue Jan 17 17:46:25 UTC 2017 romstage starting...
running main(bist = 0)
Stepping B3
2 CPU cores
AMT enabled
capable of DDR2 of 800 MHz or lower
VT-d enabled
GMCH: GS45, using high-power mode
TXT enabled
Render frequency: 533 MHz
IGD enabled
PCIe-to-GMCH enabled
GMCH supports DDR3 with 1067 MT or less
GMCH supports FSB with up to 1067 MHz
SMBus controller enabled.
0:50:b
2:51:b
DDR mask 5, DDR 3
Bank 0 populated:
 Raw card type:F
 Row addr bits:   15
 Col addr bits:   10
 byte width:   1
 page size: 1024
 banks:8
 ranks:2
 tAAmin:105
 tCKmin: 15
  Max clock: 533 MHz
 CAS:   0x01e0
Bank 1 populated:
 Raw card type:F
 Row addr bits:   15
 Col addr bits:   10
 byte width:   1
 page size: 1024
 banks:8
 ranks:2
 tAAmin:105
 tCKmin: 15
  Max clock: 533 MHz
 CAS:   0x01e0
Trying CAS 7, tCK 15.
Found compatible clock / CAS pair: 533 / 7.
Timing values:
 tCLK:   15
 tRAS:   20
 tRP: 7
 tRCD:7
 tRFC:  104
 tWR: 8
 tRD:11
 tRRD:4
 tFAW:   20
 tWL: 6
Setting IGD memory frequencies for VCO #1.
Memory configured in dual-channel assymetric mode.
Memory map:
TOM   =   512MB
TOLUD =   512MB
TOUUD =   512MB
REMAP:	 base  = 65535MB
	 limit = 0MB
usedMEsize: 0MB
Performing Jedec initialization at address 0x.
Performing Jedec initialization at address 0x0800.
Performing Jedec initialization at address 0x1000.
Performing Jedec initialization at address 0x1800.
Final timings for group 0 on channel 0: 6.1.0.2.1
Final timings for group 1 on channel 0: 6.0.2.6.6
Final timings for group 2 on channel 0: 6.1.2.0.7
Final timings for group 3 on channel 0: 6.1.0.6.6
Final timings for group 0 on channel 1: 6.0.2.7.7
Final timings for group 1 on channel 1: 6.0.2.2.4
Final timings for group 2 on channel 1: 6.1.0.6.7
Final timings for group 3 on channel 1: 6.1.0.4.5
Lower bound for byte lane 0 on channel 0: 0.0
Upper bound for byte lane 0 on channel 0: 10.7
Final timings for byte lane 0 on channel 0: 5.3
Lower bound for byte lane 1 on channel 0: 0.0
Upper bound for byte lane 1 on channel 0: 10.5
Final timings for byte lane 1 on channel 0: 5.2
Lower bound for byte lane 2 on channel 0: 0.0
Upper bound for byte lane 2 on channel 0: 9.5
Final timings for byte lane 2 on channel 0: 4.6
Lower bound for byte lane 3 on channel 0: 0.0
Upper bound for byte lane 3 on channel 0: 8.7
Final timings for byte lane 3 on channel 0: 4.3
Lower bound for byte lane 4 on channel 0: 0.0
Upper bound for byte lane 4 on channel 0: 8.7
Final timings for byte lane 4 on channel 0: