[PATCH v4 2/2 (REPOST)] davinci: am18x/da850/omap-l138 evm: add support for higher speed grades
Apart from the regular AM18x/DA850/OMAP-L138 SoC operating
at 300MHz, these SoCs have variants that can operate at a
maximum of 456MHz. Variants at 408Mhz and 375 Mhz are available
as well.
Not all silicon is qualified to run at higher speeds and
unfortunately the maximum speed the chip can support can only
be determined from the label on the package (not software
readable).
The EVM hardware for all these variants is the same (except
for the actual SoC populated).
U-Boot on the EVM sets up ATAG_REVISION to inform the OS
regarding the speed grade supported by the silicon. We use
this information to pass on the speed grade information to
the SoC code.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
re-posting with linux-arm-kernel included in CC.
arch/arm/mach-davinci/board-da850-evm.c | 25 +++--
1 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da850-evm.c
b/arch/arm/mach-davinci/board-da850-evm.c
index f89b0b7..893d9be 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -540,7 +540,7 @@ static struct regulator_init_data tps65070_regulator_data[]
= {
{
.constraints = {
.min_uV = 95,
- .max_uV = 132,
+ .max_uV = 135,
.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_STATUS),
.boot_on = 1,
@@ -736,6 +736,27 @@ static struct edma_rsv_info *da850_edma_rsv[2] = {
da850_edma_cc1_rsv,
};
+#ifdef CONFIG_CPU_FREQ
+static __init int da850_evm_init_cpufreq(void)
+{
+ switch (system_rev 0xF) {
+ case 3:
+ da850_max_speed = 456000;
+ break;
+ case 2:
+ da850_max_speed = 408000;
+ break;
+ case 1:
+ da850_max_speed = 372000;
+ break;
+ }
+
+ return da850_register_cpufreq(pll0_sysclk3);
+}
+#else
+static __init int da850_evm_init_cpufreq(void) { return 0; }
+#endif
+
static __init void da850_evm_init(void)
{
int ret;
@@ -836,7 +857,7 @@ static __init void da850_evm_init(void)
if (ret)
pr_warning(da850_evm_init: rtc setup failed: %d\n, ret);
- ret = da850_register_cpufreq(pll0_sysclk3);
+ ret = da850_evm_init_cpufreq();
if (ret)
pr_warning(da850_evm_init: cpufreq registration failed: %d\n,
ret);
--
1.7.3.2
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[PATCH v4 1/2 (REPOST)] davinci: am18x/da850/omap-l138: add support for higher speed grades
AM18x/DA850/OMAP-L138 SoCs have variants that can operate
at a maximum of 456 MHz at 1.3V operating point. Also the
1.2V operating point has a variant that can support a maximum
of 375 MHz.
This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz)
to the list of DA850 OPPs.
Not all silicon is qualified to run at higher speeds and
unfortunately the maximum speed the chip can support can only
be determined from the label on the package (not software
readable).
Because of this, we depend on the maximum speed grade information
to be provided to us in some board specific way. The board informs
the maximum speed grade information to the SoC by calling the
da850_set_max_speed() function.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
re-posting with linux-arm-kernel included in CC.
arch/arm/mach-davinci/da850.c | 75 ++--
arch/arm/mach-davinci/include/mach/da8xx.h |7 +++
2 files changed, 67 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 63916b9..78b5ae2 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -830,8 +830,7 @@ static void da850_set_async3_src(int pllnum)
* According to the TRM, minimum PLLM results in maximum power savings.
* The OPP definitions below should keep the PLLM as low as possible.
*
- * The output of the PLLM must be between 400 to 600 MHz.
- * This rules out prediv of anything but divide-by-one for 24Mhz OSC input.
+ * The output of the PLLM must be between 300 to 600 MHz.
*/
struct da850_opp {
unsigned intfreq; /* in KHz */
@@ -842,6 +841,33 @@ struct da850_opp {
unsigned intcvdd_max; /* in uV */
};
+static const struct da850_opp da850_opp_456 = {
+ .freq = 456000,
+ .prediv = 1,
+ .mult = 19,
+ .postdiv= 1,
+ .cvdd_min = 130,
+ .cvdd_max = 135,
+};
+
+static const struct da850_opp da850_opp_408 = {
+ .freq = 408000,
+ .prediv = 1,
+ .mult = 17,
+ .postdiv= 1,
+ .cvdd_min = 130,
+ .cvdd_max = 135,
+};
+
+static const struct da850_opp da850_opp_372 = {
+ .freq = 372000,
+ .prediv = 2,
+ .mult = 31,
+ .postdiv= 1,
+ .cvdd_min = 120,
+ .cvdd_max = 132,
+};
+
static const struct da850_opp da850_opp_300 = {
.freq = 30,
.prediv = 1,
@@ -876,6 +902,9 @@ static const struct da850_opp da850_opp_96 = {
}
static struct cpufreq_frequency_table da850_freq_table[] = {
+ OPP(456),
+ OPP(408),
+ OPP(372),
OPP(300),
OPP(200),
OPP(96),
@@ -886,6 +915,19 @@ static struct cpufreq_frequency_table da850_freq_table[] =
{
};
#ifdef CONFIG_REGULATOR
+static int da850_set_voltage(unsigned int index);
+static int da850_regulator_init(void);
+#endif
+
+static struct davinci_cpufreq_config cpufreq_info = {
+ .freq_table = da850_freq_table,
+#ifdef CONFIG_REGULATOR
+ .init = da850_regulator_init,
+ .set_voltage = da850_set_voltage,
+#endif
+};
+
+#ifdef CONFIG_REGULATOR
static struct regulator *cvdd;
static int da850_set_voltage(unsigned int index)
@@ -895,7 +937,7 @@ static int da850_set_voltage(unsigned int index)
if (!cvdd)
return -ENODEV;
- opp = (struct da850_opp *) da850_freq_table[index].index;
+ opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;
return regulator_set_voltage(cvdd, opp-cvdd_min, opp-cvdd_max);
}
@@ -912,14 +954,6 @@ static int da850_regulator_init(void)
}
#endif
-static struct davinci_cpufreq_config cpufreq_info = {
- .freq_table = da850_freq_table[0],
-#ifdef CONFIG_REGULATOR
- .init = da850_regulator_init,
- .set_voltage = da850_set_voltage,
-#endif
-};
-
static struct platform_device da850_cpufreq_device = {
.name = cpufreq-davinci,
.dev = {
@@ -928,12 +962,22 @@ static struct platform_device da850_cpufreq_device = {
.id = -1,
};
+unsigned int da850_max_speed = 30;
+
int __init da850_register_cpufreq(char *async_clk)
{
+ int i;
+
/* cpufreq driver can help keep an async clock constant */
if (async_clk)
clk_add_alias(async, da850_cpufreq_device.name,
async_clk, NULL);
+ for (i = 0; i ARRAY_SIZE(da850_freq_table); i++) {
+ if (da850_freq_table[i].frequency = da850_max_speed) {
+ cpufreq_info.freq_table = da850_freq_table[i];
+ break;
+ }
+ }
return platform_device_register(da850_cpufreq_device);
}
@@ -942,17 +986,18 @@ static int da850_round_armrate(struct clk *clk, unsigned
long rate)
{
int
[PATCH v4 1/2 (REPOST)] davinci: am18x/da850/omap-l138: add support for higher speed grades
AM18x/DA850/OMAP-L138 SoCs have variants that can operate
at a maximum of 456 MHz at 1.3V operating point. Also the
1.2V operating point has a variant that can support a maximum
of 375 MHz.
This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz)
to the list of DA850 OPPs.
Not all silicon is qualified to run at higher speeds and
unfortunately the maximum speed the chip can support can only
be determined from the label on the package (not software
readable).
Because of this, we depend on the maximum speed grade information
to be provided to us in some board specific way. The board informs
the maximum speed grade information to the SoC by calling the
da850_set_max_speed() function.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
re-posting with linux-arm-kernel included in CC.
arch/arm/mach-davinci/da850.c | 75 ++--
arch/arm/mach-davinci/include/mach/da8xx.h |7 +++
2 files changed, 67 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 63916b9..78b5ae2 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -830,8 +830,7 @@ static void da850_set_async3_src(int pllnum)
* According to the TRM, minimum PLLM results in maximum power savings.
* The OPP definitions below should keep the PLLM as low as possible.
*
- * The output of the PLLM must be between 400 to 600 MHz.
- * This rules out prediv of anything but divide-by-one for 24Mhz OSC input.
+ * The output of the PLLM must be between 300 to 600 MHz.
*/
struct da850_opp {
unsigned intfreq; /* in KHz */
@@ -842,6 +841,33 @@ struct da850_opp {
unsigned intcvdd_max; /* in uV */
};
+static const struct da850_opp da850_opp_456 = {
+ .freq = 456000,
+ .prediv = 1,
+ .mult = 19,
+ .postdiv= 1,
+ .cvdd_min = 130,
+ .cvdd_max = 135,
+};
+
+static const struct da850_opp da850_opp_408 = {
+ .freq = 408000,
+ .prediv = 1,
+ .mult = 17,
+ .postdiv= 1,
+ .cvdd_min = 130,
+ .cvdd_max = 135,
+};
+
+static const struct da850_opp da850_opp_372 = {
+ .freq = 372000,
+ .prediv = 2,
+ .mult = 31,
+ .postdiv= 1,
+ .cvdd_min = 120,
+ .cvdd_max = 132,
+};
+
static const struct da850_opp da850_opp_300 = {
.freq = 30,
.prediv = 1,
@@ -876,6 +902,9 @@ static const struct da850_opp da850_opp_96 = {
}
static struct cpufreq_frequency_table da850_freq_table[] = {
+ OPP(456),
+ OPP(408),
+ OPP(372),
OPP(300),
OPP(200),
OPP(96),
@@ -886,6 +915,19 @@ static struct cpufreq_frequency_table da850_freq_table[] =
{
};
#ifdef CONFIG_REGULATOR
+static int da850_set_voltage(unsigned int index);
+static int da850_regulator_init(void);
+#endif
+
+static struct davinci_cpufreq_config cpufreq_info = {
+ .freq_table = da850_freq_table,
+#ifdef CONFIG_REGULATOR
+ .init = da850_regulator_init,
+ .set_voltage = da850_set_voltage,
+#endif
+};
+
+#ifdef CONFIG_REGULATOR
static struct regulator *cvdd;
static int da850_set_voltage(unsigned int index)
@@ -895,7 +937,7 @@ static int da850_set_voltage(unsigned int index)
if (!cvdd)
return -ENODEV;
- opp = (struct da850_opp *) da850_freq_table[index].index;
+ opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;
return regulator_set_voltage(cvdd, opp-cvdd_min, opp-cvdd_max);
}
@@ -912,14 +954,6 @@ static int da850_regulator_init(void)
}
#endif
-static struct davinci_cpufreq_config cpufreq_info = {
- .freq_table = da850_freq_table[0],
-#ifdef CONFIG_REGULATOR
- .init = da850_regulator_init,
- .set_voltage = da850_set_voltage,
-#endif
-};
-
static struct platform_device da850_cpufreq_device = {
.name = cpufreq-davinci,
.dev = {
@@ -928,12 +962,22 @@ static struct platform_device da850_cpufreq_device = {
.id = -1,
};
+unsigned int da850_max_speed = 30;
+
int __init da850_register_cpufreq(char *async_clk)
{
+ int i;
+
/* cpufreq driver can help keep an async clock constant */
if (async_clk)
clk_add_alias(async, da850_cpufreq_device.name,
async_clk, NULL);
+ for (i = 0; i ARRAY_SIZE(da850_freq_table); i++) {
+ if (da850_freq_table[i].frequency = da850_max_speed) {
+ cpufreq_info.freq_table = da850_freq_table[i];
+ break;
+ }
+ }
return platform_device_register(da850_cpufreq_device);
}
@@ -942,17 +986,18 @@ static int da850_round_armrate(struct clk *clk, unsigned
long rate)
{
int
[PATCH v4 2/2 (REPOST)] davinci: am18x/da850/omap-l138 evm: add support for higher speed grades
Apart from the regular AM18x/DA850/OMAP-L138 SoC operating
at 300MHz, these SoCs have variants that can operate at a
maximum of 456MHz. Variants at 408Mhz and 375 Mhz are available
as well.
Not all silicon is qualified to run at higher speeds and
unfortunately the maximum speed the chip can support can only
be determined from the label on the package (not software
readable).
The EVM hardware for all these variants is the same (except
for the actual SoC populated).
U-Boot on the EVM sets up ATAG_REVISION to inform the OS
regarding the speed grade supported by the silicon. We use
this information to pass on the speed grade information to
the SoC code.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
re-posting with linux-arm-kernel included in CC.
arch/arm/mach-davinci/board-da850-evm.c | 25 +++--
1 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da850-evm.c
b/arch/arm/mach-davinci/board-da850-evm.c
index f89b0b7..893d9be 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -540,7 +540,7 @@ static struct regulator_init_data tps65070_regulator_data[]
= {
{
.constraints = {
.min_uV = 95,
- .max_uV = 132,
+ .max_uV = 135,
.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_STATUS),
.boot_on = 1,
@@ -736,6 +736,27 @@ static struct edma_rsv_info *da850_edma_rsv[2] = {
da850_edma_cc1_rsv,
};
+#ifdef CONFIG_CPU_FREQ
+static __init int da850_evm_init_cpufreq(void)
+{
+ switch (system_rev 0xF) {
+ case 3:
+ da850_max_speed = 456000;
+ break;
+ case 2:
+ da850_max_speed = 408000;
+ break;
+ case 1:
+ da850_max_speed = 372000;
+ break;
+ }
+
+ return da850_register_cpufreq(pll0_sysclk3);
+}
+#else
+static __init int da850_evm_init_cpufreq(void) { return 0; }
+#endif
+
static __init void da850_evm_init(void)
{
int ret;
@@ -836,7 +857,7 @@ static __init void da850_evm_init(void)
if (ret)
pr_warning(da850_evm_init: rtc setup failed: %d\n, ret);
- ret = da850_register_cpufreq(pll0_sysclk3);
+ ret = da850_evm_init_cpufreq();
if (ret)
pr_warning(da850_evm_init: cpufreq registration failed: %d\n,
ret);
--
1.7.3.2
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Re: [PATCH v4 1/2 (REPOST)] davinci: am18x/da850/omap-l138: add support for higher speed grades
Hello. On 20-12-2010 13:28, Sekhar Nori wrote: AM18x/DA850/OMAP-L138 SoCs have variants that can operate at a maximum of 456 MHz at 1.3V operating point. Also the 1.2V operating point has a variant that can support a maximum of 375 MHz. This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz) to the list of DA850 OPPs. Not all silicon is qualified to run at higher speeds and unfortunately the maximum speed the chip can support can only be determined from the label on the package (not software readable). Because of this, we depend on the maximum speed grade information to be provided to us in some board specific way. The board informs the maximum speed grade information to the SoC by calling the da850_set_max_speed() function. This sentence no longer applies. You've reduced the function to a variable. Signed-off-by: Sekhar Norinsek...@ti.com WBR, Sergei ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
RE: [PATCH v4 1/2 (REPOST)] davinci: am18x/da850/omap-l138: add support for higher speed grades
On Mon, Dec 20, 2010 at 16:13:35, Sergei Shtylyov wrote: Hello. On 20-12-2010 13:28, Sekhar Nori wrote: AM18x/DA850/OMAP-L138 SoCs have variants that can operate at a maximum of 456 MHz at 1.3V operating point. Also the 1.2V operating point has a variant that can support a maximum of 375 MHz. This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz) to the list of DA850 OPPs. Not all silicon is qualified to run at higher speeds and unfortunately the maximum speed the chip can support can only be determined from the label on the package (not software readable). Because of this, we depend on the maximum speed grade information to be provided to us in some board specific way. The board informs the maximum speed grade information to the SoC by calling the da850_set_max_speed() function. This sentence no longer applies. You've reduced the function to a variable. Oops, missed updating this part. Thanks for pointing out. Regards, Sekhar ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
RE: [PATCH v7 5/8] davinci vpbe: board specific additions
On Fri, Dec 17, 2010 at 21:59:23, Sergei Shtylyov wrote:
Hello.
Manjunath Hadli wrote:
This patch implements tables for display timings,outputs and other
board related functionalities.
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Acked-by: Muralidharan Karicheri m-kariche...@ti.com
Acked-by: Hans Verkuil hverk...@xs4all.nl
[...]
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c
b/arch/arm/mach-davinci/board-dm644x-evm.c
index 34c8b41..e9b1243 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
[...]
@@ -620,6 +671,8 @@ davinci_evm_map_io(void) {
/* setup input configuration for VPFE input devices */
dm644x_set_vpfe_config(vpfe_cfg);
+ /* setup configuration for vpbe devices */
+ dm644x_set_vpbe_display_config(vpbe_display_cfg);
dm644x_init();
}
This patch should *follow* the platform patch (where
dm644x_set_vpbe_display_config() is defined), not precede it.
Thanks. Will update the patch series.
-Manju
WBR, Sergei
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[PATCH v8 0/8] davinci vpbe: dm6446 v4l2 driver
version8 : addressed on Sergei's comments on: 1.Interchanged platform and board specific patches due to dependencies. Manjunath Hadli (8): davinci vpbe: V4L2 display driver for DM644X SoC davinci vpbe: VPBE display driver davinci vpbe: OSD(On Screen Display) block davinci vpbe: VENC( Video Encoder) implementation davinci vpbe: platform specific additions davinci vpbe: board specific additions davinci vpbe: Build infrastructure for VPBE driver davinci vpbe: Readme text for Dm6446 vpbe Documentation/video4linux/README.davinci-vpbe | 93 ++ arch/arm/mach-davinci/board-dm644x-evm.c | 79 +- arch/arm/mach-davinci/dm644x.c| 164 ++- arch/arm/mach-davinci/include/mach/dm644x.h |4 + drivers/media/video/davinci/Kconfig | 22 + drivers/media/video/davinci/Makefile |2 + drivers/media/video/davinci/vpbe.c| 837 ++ drivers/media/video/davinci/vpbe_display.c| 2099 + drivers/media/video/davinci/vpbe_osd.c| 1211 ++ drivers/media/video/davinci/vpbe_osd_regs.h | 389 + drivers/media/video/davinci/vpbe_venc.c | 574 +++ drivers/media/video/davinci/vpbe_venc_regs.h | 189 +++ include/media/davinci/vpbe.h | 186 +++ include/media/davinci/vpbe_display.h | 146 ++ include/media/davinci/vpbe_osd.h | 397 + include/media/davinci/vpbe_types.h| 93 ++ include/media/davinci/vpbe_venc.h | 38 + 17 files changed, 6504 insertions(+), 19 deletions(-) create mode 100644 Documentation/video4linux/README.davinci-vpbe create mode 100644 drivers/media/video/davinci/vpbe.c create mode 100644 drivers/media/video/davinci/vpbe_display.c create mode 100644 drivers/media/video/davinci/vpbe_osd.c create mode 100644 drivers/media/video/davinci/vpbe_osd_regs.h create mode 100644 drivers/media/video/davinci/vpbe_venc.c create mode 100644 drivers/media/video/davinci/vpbe_venc_regs.h create mode 100644 include/media/davinci/vpbe.h create mode 100644 include/media/davinci/vpbe_display.h create mode 100644 include/media/davinci/vpbe_osd.h create mode 100644 include/media/davinci/vpbe_types.h create mode 100644 include/media/davinci/vpbe_venc.h ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
[PATCH v8 2/8] davinci vpbe: VPBE display driver
This patch implements the coe functionality of the dislay driver,
mainly controlling the VENC and other encoders, and acting as
the one point interface for the man V4L2 driver.This implements
the cre of each of the V4L2 IOCTLs.
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Acked-by: Muralidharan Karicheri m-kariche...@ti.com
Acked-by: Hans Verkuil hverk...@xs4all.nl
---
drivers/media/video/davinci/vpbe.c | 837
include/media/davinci/vpbe.h | 186
2 files changed, 1023 insertions(+), 0 deletions(-)
create mode 100644 drivers/media/video/davinci/vpbe.c
create mode 100644 include/media/davinci/vpbe.h
diff --git a/drivers/media/video/davinci/vpbe.c
b/drivers/media/video/davinci/vpbe.c
new file mode 100644
index 000..751370f
--- /dev/null
+++ b/drivers/media/video/davinci/vpbe.c
@@ -0,0 +1,837 @@
+/*
+ * Copyright (C) 2010 Texas Instruments Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include linux/module.h
+#include linux/errno.h
+#include linux/fs.h
+#include linux/string.h
+#include linux/wait.h
+#include linux/time.h
+#include linux/platform_device.h
+#include linux/io.h
+#include linux/slab.h
+#include linux/clk.h
+#include linux/err.h
+
+#include media/v4l2-device.h
+#include media/davinci/vpbe_types.h
+#include media/davinci/vpbe.h
+#include media/davinci/vpss.h
+
+
+#define VPBE_DEFAULT_OUTPUTComposite
+#define VPBE_DEFAULT_MODE ntsc
+
+static char *def_output = VPBE_DEFAULT_OUTPUT;
+static char *def_mode = VPBE_DEFAULT_MODE;
+static struct osd_state *osd_device;
+static struct venc_platform_data *venc_device;
+static int debug;
+
+module_param(def_output, charp, S_IRUGO);
+module_param(def_mode, charp, S_IRUGO);
+module_param(debug, int, 0644);
+
+MODULE_PARM_DESC(def_output, vpbe output name (default:Composite));
+MODULE_PARM_DESC(ef_mode, vpbe output mode name (default:ntsc);
+MODULE_PARM_DESC(debug, Debug level 0-1);
+
+MODULE_DESCRIPTION(TI DMXXX VPBE Display controller);
+MODULE_LICENSE(GPL);
+MODULE_AUTHOR(Texas Instruments);
+
+/**
+ * vpbe_current_encoder_info - Get config info for current encoder
+ * @vpbe_dev - vpbe device ptr
+ *
+ * Return ptr to current encoder config info
+ */
+static struct encoder_config_info*
+vpbe_current_encoder_info(struct vpbe_device *vpbe_dev)
+{
+ struct vpbe_display_config *vpbe_config = vpbe_dev-cfg;
+ int index = vpbe_dev-current_sd_index;
+
+ return ((index == 0) ? vpbe_config-venc :
+ vpbe_config-ext_encoders[index-1]);
+}
+
+/**
+ * vpbe_find_encoder_sd_index - Given a name find encoder sd index
+ *
+ * @vpbe_config - ptr to vpbe cfg
+ * @output_index - index used by application
+ *
+ * Return sd index of the encoder
+ */
+static int vpbe_find_encoder_sd_index(struct vpbe_display_config *vpbe_config,
+int index)
+{
+ char *encoder_name = vpbe_config-outputs[index].subdev_name;
+ int i;
+
+ /* Venc is always first */
+ if (!strcmp(encoder_name, vpbe_config-venc.module_name))
+ return 0;
+
+ for (i = 0; i vpbe_config-num_ext_encoders; i++) {
+ if (!strcmp(encoder_name,
+vpbe_config-ext_encoders[i].module_name))
+ return i+1;
+ }
+ return -EINVAL;
+}
+
+/**
+ * vpbe_g_cropcap - Get crop capabilities of the display
+ * @vpbe_dev - vpbe device ptr
+ * @cropcap - cropcap is a ptr to struct v4l2_cropcap
+ *
+ * Update the crop capabilities in crop cap for current
+ * mode
+ */
+static int vpbe_g_cropcap(struct vpbe_device *vpbe_dev,
+ struct v4l2_cropcap *cropcap)
+{
+ if (NULL == cropcap)
+ return -EINVAL;
+ cropcap-bounds.left = 0;
+ cropcap-bounds.top = 0;
+ cropcap-bounds.width = vpbe_dev-current_timings.xres;
+ cropcap-bounds.height = vpbe_dev-current_timings.yres;
+ cropcap-defrect = cropcap-bounds;
+ return 0;
+}
+
+/**
+ * vpbe_enum_outputs - enumerate outputs
+ * @vpbe_dev - vpbe device ptr
+ * @output - ptr to v4l2_output structure
+ *
+ * Enumerates the outputs available at the vpbe display
+ * returns the status, -EINVAL if end of output list
+ */
+static int vpbe_enum_outputs(struct vpbe_device *vpbe_dev,
+
[PATCH v8 3/8] davinci vpbe: OSD(On Screen Display) block
This patch implements the functionality of the OSD block
of the VPBE.The OSD in total supports 4 planes or Video
sources - 2 mainly RGB and 2 Video. The patch implements general
handling of all the planes, with specific emphasis on the Video
plane capabilities as the Video planes are supported through the
V4L2 driver.
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Acked-by: Muralidharan Karicheri m-kariche...@ti.com
Acked-by: Hans Verkuil hverk...@xs4all.nl
---
drivers/media/video/davinci/vpbe_osd.c | 1211 +++
drivers/media/video/davinci/vpbe_osd_regs.h | 389 +
include/media/davinci/vpbe_osd.h| 397 +
3 files changed, 1997 insertions(+), 0 deletions(-)
create mode 100644 drivers/media/video/davinci/vpbe_osd.c
create mode 100644 drivers/media/video/davinci/vpbe_osd_regs.h
create mode 100644 include/media/davinci/vpbe_osd.h
diff --git a/drivers/media/video/davinci/vpbe_osd.c
b/drivers/media/video/davinci/vpbe_osd.c
new file mode 100644
index 000..2599c83
--- /dev/null
+++ b/drivers/media/video/davinci/vpbe_osd.c
@@ -0,0 +1,1211 @@
+/*
+ * Copyright (C) 2007-2010 Texas Instruments Inc
+ * Copyright (C) 2007 MontaVista Software, Inc.
+ *
+ * Andy Lowe (al...@mvista.com), MontaVista Software
+ * - Initial version
+ * Murali Karicheri (mkarich...@gmail.com), Texas Instruments Ltd.
+ * - ported to sub device interface
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#include linux/module.h
+#include linux/kernel.h
+#include linux/interrupt.h
+#include linux/platform_device.h
+#include linux/clk.h
+#include linux/slab.h
+
+#include mach/io.h
+#include mach/cputype.h
+#include mach/hardware.h
+
+#include media/davinci/vpss.h
+#include media/v4l2-device.h
+#include media/davinci/vpbe_types.h
+#include media/davinci/vpbe_osd.h
+
+#include linux/io.h
+#include vpbe_osd_regs.h
+
+#define MODULE_NAMEVPBE_OSD_SUBDEV_NAME
+
+/* register access routines */
+static inline u32 osd_read(struct osd_state *sd, u32 offset)
+{
+ struct osd_state *osd = sd;
+ return __raw_readl(osd-osd_base + offset);
+}
+
+static inline u32 osd_write(struct osd_state *sd, u32 val, u32 offset)
+{
+ struct osd_state *osd = sd;
+ __raw_writel(val, osd-osd_base + offset);
+ return val;
+}
+
+static inline u32 osd_set(struct osd_state *sd, u32 mask, u32 offset)
+{
+ struct osd_state *osd = sd;
+
+ u32 addr = osd-osd_base + offset;
+ u32 val = __raw_readl(addr) | mask;
+
+ __raw_writel(val, addr);
+ return val;
+}
+
+static inline u32 osd_clear(struct osd_state *sd, u32 mask, u32 offset)
+{
+ struct osd_state *osd = sd;
+ u32 addr = osd-osd_base + offset;
+ u32 val = __raw_readl(addr) ~mask;
+
+ __raw_writel(val, addr);
+ return val;
+}
+
+static inline u32 osd_modify(struct osd_state *sd, u32 mask, u32 val,
+u32 offset)
+{
+ struct osd_state *osd = sd;
+
+ u32 addr = osd-osd_base + offset;
+ u32 new_val = (__raw_readl(addr) ~mask) | (val mask);
+ __raw_writel(new_val, addr);
+ return new_val;
+}
+
+/* define some macros for layer and pixfmt classification */
+#define is_osd_win(layer) (((layer) == WIN_OSD0) || ((layer) == WIN_OSD1))
+#define is_vid_win(layer) (((layer) == WIN_VID0) || ((layer) == WIN_VID1))
+#define is_rgb_pixfmt(pixfmt) \
+ (((pixfmt) == PIXFMT_RGB565) || ((pixfmt) == PIXFMT_RGB888))
+#define is_yc_pixfmt(pixfmt) \
+ (((pixfmt) == PIXFMT_YCbCrI) || ((pixfmt) == PIXFMT_YCrCbI) || \
+ ((pixfmt) == PIXFMT_NV12))
+#define MAX_WIN_SIZE OSD_VIDWIN0XP_V0X
+#define MAX_LINE_LENGTH (OSD_VIDWIN0OFST_V0LO 5)
+
+
+/**
+ * _osd_dm6446_vid0_pingpong() - field inversion fix for DM6446
+ * @sd - ptr to struct osd_state
+ * @field_inversion - inversion flag
+ * @fb_base_phys - frame buffer address
+ * @lconfig - ptr to layer config
+ *
+ * This routine implements a workaround for the field signal inversion silicon
+ * erratum described in Advisory 1.3.8 for the DM6446. The fb_base_phys and
+ * lconfig parameters apply to the vid0 window. This routine should be called
+ * whenever the vid0 layer configuration or start address is modified, or when
+ * the OSD field inversion setting is modified.
+ * Returns: 1 if the
[PATCH v8 8/8] davinci vpbe: Readme text for Dm6446 vpbe
Please refer to this file for detailed documentation of davinci vpbe v4l2 driver Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com Acked-by: Muralidharan Karicheri m-kariche...@ti.com Acked-by: Hans Verkuil hverk...@xs4all.nl --- Documentation/video4linux/README.davinci-vpbe | 93 + 1 files changed, 93 insertions(+), 0 deletions(-) create mode 100644 Documentation/video4linux/README.davinci-vpbe diff --git a/Documentation/video4linux/README.davinci-vpbe b/Documentation/video4linux/README.davinci-vpbe new file mode 100644 index 000..7a460b0 --- /dev/null +++ b/Documentation/video4linux/README.davinci-vpbe @@ -0,0 +1,93 @@ + +VPBE V4L2 driver design + == + + File partitioning + - + V4L2 display device driver + drivers/media/video/davinci/vpbe_display.c + drivers/media/video/davinci/vpbe_display.h + + VPBE display controller + drivers/media/video/davinci/vpbe.c + drivers/media/video/davinci/vpbe.h + + VPBE venc sub device driver + drivers/media/video/davinci/vpbe_venc.c + drivers/media/video/davinci/vpbe_venc.h + drivers/media/video/davinci/vpbe_venc_regs.h + + VPBE osd driver + drivers/media/video/davinci/vpbe_osd.c + drivers/media/video/davinci/vpbe_osd.h + drivers/media/video/davinci/vpbe_osd_regs.h + + Functional partitioning + --- + + Consists of the following (in the same order as the list under file + partitioning):- + + 1. V4L2 display driver +Implements creation of video2 and video3 device nodes and +provides v4l2 device interface to manage VID0 and VID1 layers. + + 2. Display controller +Loads up VENC, OSD and external encoders such as ths8200. It provides +a set of API calls to V4L2 drivers to set the output/standards +in the VENC or external sub devices. It also provides +a device object to access the services from OSD subdevice +using sub device ops. The connection of external encoders to VENC LCD +controller port is done at init time based on default output and standard +selection or at run time when application change the output through +V4L2 IOCTLs. + +When connected to an external encoder, vpbe controller is also responsible +for setting up the interface between VENC and external encoders based on +board specific settings (specified in board-xxx-evm.c). This allows +interfacing external encoders such as ths8200. The setup_if_config() +is implemented for this as well as configure_venc() (part of the next patch) +API to set timings in VENC for a specific display resolution. As of this +patch series, the interconnection and enabling and setting of the external +encoders is not present, and would be a part of the next patch series. + + 3. VENC subdevice module +Responsible for setting outputs provided through internal DACs and also +setting timings at LCD controller port when external encoders are connected +at the port or LCD panel timings required. When external encoder/LCD panel +is connected, the timings for a specific standard/preset is retrieved from +the board specific table and the values are used to set the timings in +venc using non-standard timing mode. + +Support LCD Panel displays using the VENC. For example to support a Logic +PD display, it requires setting up the LCD controller port with a set of +timings for the resolution supported and setting the dot clock. So we could +add the available outputs as a board specific entry (i.e add the LogicPD +output name to board-xxx-evm.c). A table of timings for various LCDs +supported can be maintained in the board specific setup file to support +various LCD displays.As of this patch a basic driver is present, and this +support for external encoders and displays forms a part of the next +patch series. + + 4. OSD module +OSD module implements all OSD layer management and hardware specific +features. The VPBE module interacts with the OSD for enabling and +disabling appropriate features of the OSD. + + Current status:- + + A fully functional working version of the V4L2 driver is available. This + driver has been tested with NTSC and PAL standards and buffer streaming. + + Following are TBDs. + + vpbe display controller +- Add support for external encoders. +- add support for selecting external encoder as default at probe time. + + vpbe venc sub device +- add timings for supporting ths8200 +- add support for LogicPD LCD. + + FB drivers +- Add support for fbdev drivers.- Ready and part of subsequent patches. -- 1.6.2.4 ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
[PATCH v8 5/8] davinci vpbe: platform specific additions
This patch implements the overall device creation for the Video
display driver
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Acked-by: Muralidharan Karicheri m-kariche...@ti.com
Acked-by: Hans Verkuil hverk...@xs4all.nl
---
arch/arm/mach-davinci/dm644x.c | 164 ++-
arch/arm/mach-davinci/include/mach/dm644x.h |4 +
2 files changed, 162 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 5e5b0a7..e8b8e94 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -640,6 +640,142 @@ void dm644x_set_vpfe_config(struct vpfe_config *cfg)
vpfe_capture_dev.dev.platform_data = cfg;
}
+static struct resource dm644x_osd_resources[] = {
+ {
+ .start = 0x01C72600,
+ .end= 0x01C72600 + 0x200,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static u64 dm644x_osd_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device dm644x_osd_dev = {
+ .name = VPBE_OSD_SUBDEV_NAME,
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm644x_osd_resources),
+ .resource = dm644x_osd_resources,
+ .dev = {
+ .dma_mask = dm644x_osd_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = (void *)DM644X_VPBE,
+ },
+};
+
+static struct resource dm644x_venc_resources[] = {
+ /* venc registers io space */
+ {
+ .start = 0x01C72400,
+ .end= 0x01C72400 + 0x180,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static u64 dm644x_venc_dma_mask = DMA_BIT_MASK(32);
+
+#define VPSS_CLKCTL 0x01C40044
+static void __iomem *vpss_clkctl_reg;
+
+/* TBD. Check what VENC_CLOCK_SEL settings for HDTV and EDTV */
+static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type, __u64 mode)
+{
+ int ret = 0;
+
+ if (NULL == vpss_clkctl_reg)
+ return -EINVAL;
+ if (type == VPBE_ENC_STD) {
+ __raw_writel(0x18, vpss_clkctl_reg);
+ } else if (type == VPBE_ENC_DV_PRESET) {
+ switch ((unsigned int)mode) {
+ case V4L2_DV_480P59_94:
+ case V4L2_DV_576P50:
+__raw_writel(0x19, vpss_clkctl_reg);
+ break;
+ case V4L2_DV_720P60:
+ case V4L2_DV_1080I60:
+ case V4L2_DV_1080P30:
+ /*
+ * For HD, use external clock source since HD requires higher
+ * clock rate
+ */
+ __raw_writel(0xa, vpss_clkctl_reg);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ } else
+ ret = -EINVAL;
+
+ return ret;
+}
+
+
+static inline u32 dm644x_reg_modify(void *reg, u32 val, u32 mask)
+{
+ u32 new_val = (__raw_readl(reg) ~mask) | (val mask);
+ __raw_writel(new_val, reg);
+ return new_val;
+}
+
+static u64 vpbe_display_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource dm644x_v4l2_disp_resources[] = {
+ {
+ .start = IRQ_VENCINT,
+ .end= IRQ_VENCINT,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = 0x01C72400,
+ .end= 0x01C72400 + 0x180,
+ .flags = IORESOURCE_MEM,
+ },
+
+};
+static struct platform_device vpbe_v4l2_display = {
+ .name = vpbe-v4l2,
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm644x_v4l2_disp_resources),
+ .resource = dm644x_v4l2_disp_resources,
+ .dev = {
+ .dma_mask = vpbe_display_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+};
+struct venc_platform_data dm644x_venc_pdata = {
+ .venc_type = DM644X_VPBE,
+ .setup_clock = dm644x_venc_setup_clock,
+};
+
+static struct platform_device dm644x_venc_dev = {
+ .name = VPBE_VENC_SUBDEV_NAME,
+ .id = -1,
+ .num_resources = ARRAY_SIZE(dm644x_venc_resources),
+ .resource = dm644x_venc_resources,
+ .dev = {
+ .dma_mask = dm644x_venc_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = (void *)dm644x_venc_pdata,
+ },
+};
+
+static u64 dm644x_vpbe_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device dm644x_vpbe_dev = {
+ .name = vpbe_controller,
+ .id = -1,
+ .dev = {
+ .dma_mask = dm644x_vpbe_dma_mask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+};
+
+void dm644x_set_vpbe_display_config(struct vpbe_display_config *cfg)
+{
+
[PATCH v8 7/8] davinci vpbe: Build infrastructure for VPBE driver
This patch adds the build infra-structure for Davinci VPBE dislay driver Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com Acked-by: Muralidharan Karicheri m-kariche...@ti.com Acked-by: Hans Verkuil hverk...@xs4all.nl --- drivers/media/video/davinci/Kconfig | 22 ++ drivers/media/video/davinci/Makefile |2 ++ 2 files changed, 24 insertions(+), 0 deletions(-) diff --git a/drivers/media/video/davinci/Kconfig b/drivers/media/video/davinci/Kconfig index 6b19540..a7f11e7 100644 --- a/drivers/media/video/davinci/Kconfig +++ b/drivers/media/video/davinci/Kconfig @@ -91,3 +91,25 @@ config VIDEO_ISIF To compile this driver as a module, choose M here: the module will be called vpfe. + +config VIDEO_DM644X_VPBE + tristate DM644X VPBE HW module + select VIDEO_VPSS_SYSTEM + select VIDEOBUF_DMA_CONTIG + help + Enables VPBE modules used for display on a DM644x + SoC. + + To compile this driver as a module, choose M here: the + module will be called vpbe. + + +config VIDEO_VPBE_DISPLAY + tristate VPBE V4L2 Display driver + select VIDEO_DM644X_VPBE + default y + help + Enables VPBE V4L2 Display driver on a DMXXX device + + To compile this driver as a module, choose M here: the + module will be called vpbe_display. diff --git a/drivers/media/video/davinci/Makefile b/drivers/media/video/davinci/Makefile index a379557..ae7dafb 100644 --- a/drivers/media/video/davinci/Makefile +++ b/drivers/media/video/davinci/Makefile @@ -16,3 +16,5 @@ obj-$(CONFIG_VIDEO_VPFE_CAPTURE) += vpfe_capture.o obj-$(CONFIG_VIDEO_DM6446_CCDC) += dm644x_ccdc.o obj-$(CONFIG_VIDEO_DM355_CCDC) += dm355_ccdc.o obj-$(CONFIG_VIDEO_ISIF) += isif.o +obj-$(CONFIG_VIDEO_DM644X_VPBE) += vpbe.o vpbe_osd.o vpbe_venc.o +obj-$(CONFIG_VIDEO_VPBE_DISPLAY) += vpbe_display.o -- 1.6.2.4 ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
[PATCH v8 6/8] davinci vpbe: board specific additions
This patch implements tables for display timings,outputs and
other board related functionalities.
Signed-off-by: Manjunath Hadli manjunath.ha...@ti.com
Acked-by: Muralidharan Karicheri m-kariche...@ti.com
Acked-by: Hans Verkuil hverk...@xs4all.nl
---
arch/arm/mach-davinci/board-dm644x-evm.c | 79 +-
1 files changed, 66 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c
b/arch/arm/mach-davinci/board-dm644x-evm.c
index 34c8b41..e9b1243 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -166,18 +166,6 @@ static struct platform_device davinci_evm_nandflash_device
= {
.resource = davinci_evm_nandflash_resource,
};
-static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device davinci_fb_device = {
- .name = davincifb,
- .id = -1,
- .dev = {
- .dma_mask = davinci_fb_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = 0,
-};
-
static struct tvp514x_platform_data tvp5146_pdata = {
.clk_polarity = 0,
.hs_polarity = 1,
@@ -606,8 +594,71 @@ static void __init evm_init_i2c(void)
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
}
+#define VENC_STD_ALL(V4L2_STD_NTSC | V4L2_STD_PAL)
+/* venc standards timings */
+static struct vpbe_enc_mode_info vbpe_enc_std_timings[] = {
+ {ntsc, VPBE_ENC_STD, {V4L2_STD_525_60}, 1, 720, 480,
+ {11, 10}, {3, 1001}, 0x79, 0, 0x10, 0, 0, 0, 0},
+ {pal, VPBE_ENC_STD, {V4L2_STD_625_50}, 1, 720, 576,
+ {54, 59}, {25, 1}, 0x7E, 0, 0x16, 0, 0, 0, 0},
+};
+
+/* venc dv preset timings */
+static struct vpbe_enc_mode_info vbpe_enc_preset_timings[] = {
+ {480p59_94, VPBE_ENC_DV_PRESET, {V4L2_DV_480P59_94}, 0, 720, 480,
+ {1, 1}, {5994, 100}, 0x80, 0, 0x20, 0, 0, 0, 0},
+ {576p50, VPBE_ENC_DV_PRESET, {V4L2_DV_576P50}, 0, 720, 576,
+ {1, 1}, {50, 1}, 0x7E, 0, 0x30, 0, 0, 0, 0},
+};
+
+/*
+ * The outputs available from VPBE + ecnoders. Keep the
+ * the order same as that of encoders. First that from venc followed by that
+ * from encoders. Index in the output refers to index on a particular encoder.
+ * Driver uses this index to pass it to encoder when it supports more than
+ * one output. Application uses index of the array to set an output.
+ */
+static struct vpbe_output dm644x_vpbe_outputs[] = {
+ {
+ .output = {
+ .index = 0,
+ .name = Composite,
+ .type = V4L2_OUTPUT_TYPE_ANALOG,
+ .std = VENC_STD_ALL,
+ .capabilities = V4L2_OUT_CAP_STD,
+ },
+ .subdev_name = VPBE_VENC_SUBDEV_NAME,
+ .default_mode = ntsc,
+ .num_modes = ARRAY_SIZE(vbpe_enc_std_timings),
+ .modes = vbpe_enc_std_timings,
+ },
+ {
+ .output = {
+ .index = 1,
+ .name = Component,
+ .type = V4L2_OUTPUT_TYPE_ANALOG,
+ .capabilities = V4L2_OUT_CAP_PRESETS,
+ },
+ .subdev_name = VPBE_VENC_SUBDEV_NAME,
+ .default_mode = 480p59_94,
+ .num_modes = ARRAY_SIZE(vbpe_enc_preset_timings),
+ .modes = vbpe_enc_preset_timings,
+ },
+};
+
+static struct vpbe_display_config vpbe_display_cfg = {
+ .module_name = dm644x-vpbe-display,
+ .i2c_adapter_id = 1,
+ .osd = {
+ .module_name = VPBE_OSD_SUBDEV_NAME,
+ },
+ .venc = {
+ .module_name = VPBE_VENC_SUBDEV_NAME,
+ },
+ .num_outputs = ARRAY_SIZE(dm644x_vpbe_outputs),
+ .outputs = dm644x_vpbe_outputs,
+};
static struct platform_device *davinci_evm_devices[] __initdata = {
- davinci_fb_device,
rtc_dev,
};
@@ -620,6 +671,8 @@ davinci_evm_map_io(void)
{
/* setup input configuration for VPFE input devices */
dm644x_set_vpfe_config(vpfe_cfg);
+ /* setup configuration for vpbe devices */
+ dm644x_set_vpbe_display_config(vpbe_display_cfg);
dm644x_init();
}
--
1.6.2.4
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[PATCH v5 1/2] davinci: am18x/da850/omap-l138: add support for higher speed grades
AM18x/DA850/OMAP-L138 SoCs have variants that can operate
at a maximum of 456 MHz at 1.3V operating point. Also the
1.2V operating point has a variant that can support a maximum
of 375 MHz.
This patch adds three new OPPs (456 MHz, 408 MHz and 372 MHz)
to the list of DA850 OPPs.
Not all silicon is qualified to run at higher speeds and
unfortunately the maximum speed the chip can support can only
be determined from the label on the package (not software
readable).
Because of this, we depend on the maximum speed grade information
to be provided to us in some board specific way. The board informs
the maximum speed grade information by setting the da850_max_speed
variable.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
Since v4, the patch decription has been updated to match the code.
No code change has been made.
arch/arm/mach-davinci/da850.c | 75 ++--
arch/arm/mach-davinci/include/mach/da8xx.h |7 +++
2 files changed, 67 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 63916b9..78b5ae2 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -830,8 +830,7 @@ static void da850_set_async3_src(int pllnum)
* According to the TRM, minimum PLLM results in maximum power savings.
* The OPP definitions below should keep the PLLM as low as possible.
*
- * The output of the PLLM must be between 400 to 600 MHz.
- * This rules out prediv of anything but divide-by-one for 24Mhz OSC input.
+ * The output of the PLLM must be between 300 to 600 MHz.
*/
struct da850_opp {
unsigned intfreq; /* in KHz */
@@ -842,6 +841,33 @@ struct da850_opp {
unsigned intcvdd_max; /* in uV */
};
+static const struct da850_opp da850_opp_456 = {
+ .freq = 456000,
+ .prediv = 1,
+ .mult = 19,
+ .postdiv= 1,
+ .cvdd_min = 130,
+ .cvdd_max = 135,
+};
+
+static const struct da850_opp da850_opp_408 = {
+ .freq = 408000,
+ .prediv = 1,
+ .mult = 17,
+ .postdiv= 1,
+ .cvdd_min = 130,
+ .cvdd_max = 135,
+};
+
+static const struct da850_opp da850_opp_372 = {
+ .freq = 372000,
+ .prediv = 2,
+ .mult = 31,
+ .postdiv= 1,
+ .cvdd_min = 120,
+ .cvdd_max = 132,
+};
+
static const struct da850_opp da850_opp_300 = {
.freq = 30,
.prediv = 1,
@@ -876,6 +902,9 @@ static const struct da850_opp da850_opp_96 = {
}
static struct cpufreq_frequency_table da850_freq_table[] = {
+ OPP(456),
+ OPP(408),
+ OPP(372),
OPP(300),
OPP(200),
OPP(96),
@@ -886,6 +915,19 @@ static struct cpufreq_frequency_table da850_freq_table[] =
{
};
#ifdef CONFIG_REGULATOR
+static int da850_set_voltage(unsigned int index);
+static int da850_regulator_init(void);
+#endif
+
+static struct davinci_cpufreq_config cpufreq_info = {
+ .freq_table = da850_freq_table,
+#ifdef CONFIG_REGULATOR
+ .init = da850_regulator_init,
+ .set_voltage = da850_set_voltage,
+#endif
+};
+
+#ifdef CONFIG_REGULATOR
static struct regulator *cvdd;
static int da850_set_voltage(unsigned int index)
@@ -895,7 +937,7 @@ static int da850_set_voltage(unsigned int index)
if (!cvdd)
return -ENODEV;
- opp = (struct da850_opp *) da850_freq_table[index].index;
+ opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;
return regulator_set_voltage(cvdd, opp-cvdd_min, opp-cvdd_max);
}
@@ -912,14 +954,6 @@ static int da850_regulator_init(void)
}
#endif
-static struct davinci_cpufreq_config cpufreq_info = {
- .freq_table = da850_freq_table[0],
-#ifdef CONFIG_REGULATOR
- .init = da850_regulator_init,
- .set_voltage = da850_set_voltage,
-#endif
-};
-
static struct platform_device da850_cpufreq_device = {
.name = cpufreq-davinci,
.dev = {
@@ -928,12 +962,22 @@ static struct platform_device da850_cpufreq_device = {
.id = -1,
};
+unsigned int da850_max_speed = 30;
+
int __init da850_register_cpufreq(char *async_clk)
{
+ int i;
+
/* cpufreq driver can help keep an async clock constant */
if (async_clk)
clk_add_alias(async, da850_cpufreq_device.name,
async_clk, NULL);
+ for (i = 0; i ARRAY_SIZE(da850_freq_table); i++) {
+ if (da850_freq_table[i].frequency = da850_max_speed) {
+ cpufreq_info.freq_table = da850_freq_table[i];
+ break;
+ }
+ }
return platform_device_register(da850_cpufreq_device);
}
@@ -942,17 +986,18 @@ static int da850_round_armrate(struct clk *clk,
[PATCH v4 2/2] davinci: am18x/da850/omap-l138 evm: add support for higher speed grades
Apart from the regular AM18x/DA850/OMAP-L138 SoC operating
at 300MHz, these SoCs have variants that can operate at a
maximum of 456MHz. Variants at 408Mhz and 375 Mhz are available
as well.
Not all silicon is qualified to run at higher speeds and
unfortunately the maximum speed the chip can support can only
be determined from the label on the package (not software
readable).
The EVM hardware for all these variants is the same (except
for the actual SoC populated).
U-Boot on the EVM sets up ATAG_REVISION to inform the OS
regarding the speed grade supported by the silicon. We use
this information to pass on the speed grade information to
the SoC code.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
No change in version since last post.
arch/arm/mach-davinci/board-da850-evm.c | 25 +++--
1 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da850-evm.c
b/arch/arm/mach-davinci/board-da850-evm.c
index f89b0b7..893d9be 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -540,7 +540,7 @@ static struct regulator_init_data tps65070_regulator_data[]
= {
{
.constraints = {
.min_uV = 95,
- .max_uV = 132,
+ .max_uV = 135,
.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
REGULATOR_CHANGE_STATUS),
.boot_on = 1,
@@ -736,6 +736,27 @@ static struct edma_rsv_info *da850_edma_rsv[2] = {
da850_edma_cc1_rsv,
};
+#ifdef CONFIG_CPU_FREQ
+static __init int da850_evm_init_cpufreq(void)
+{
+ switch (system_rev 0xF) {
+ case 3:
+ da850_max_speed = 456000;
+ break;
+ case 2:
+ da850_max_speed = 408000;
+ break;
+ case 1:
+ da850_max_speed = 372000;
+ break;
+ }
+
+ return da850_register_cpufreq(pll0_sysclk3);
+}
+#else
+static __init int da850_evm_init_cpufreq(void) { return 0; }
+#endif
+
static __init void da850_evm_init(void)
{
int ret;
@@ -836,7 +857,7 @@ static __init void da850_evm_init(void)
if (ret)
pr_warning(da850_evm_init: rtc setup failed: %d\n, ret);
- ret = da850_register_cpufreq(pll0_sysclk3);
+ ret = da850_evm_init_cpufreq();
if (ret)
pr_warning(da850_evm_init: cpufreq registration failed: %d\n,
ret);
--
1.7.3.2
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