[dpdk-dev] [PATCH v4 04/32] net/qede/base: add HSI changes and register defines

2016-10-19 Thread Mody, Rasesh
Hi Ferruh,
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Ferruh Yigit
> Sent: Wednesday, October 19, 2016 5:38 AM
> To: Rasesh Mody ;
> thomas.monjalon at 6wind.com; bruce.richardson at intel.com
> Cc: dev at dpdk.org; Dept-EngDPDKDev at qlogic.com
> Subject: Re: [dpdk-dev] [PATCH v4 04/32] net/qede/base: add HSI changes
> and register defines
> 
> On 10/19/2016 5:11 AM, Rasesh Mody wrote:
> >  - add the hardware software interface(HSI) changes
> >  - add register definitions
> >
> > These will be required for 8.10.9.0 FW upgrade.
> >
> > Signed-off-by: Rasesh Mody 
> 
> <...>
> 
> >  /*
> >   * Igu cleanup bit values to distinguish between clean or producer
> consumer
> >   */
> > @@ -1376,7 +1572,7 @@ struct dmae_cmd {
> > __le32 src_addr_hi;
> > __le32 dst_addr_lo;
> > __le32 dst_addr_hi;
> > -   __le16 length /* Length in DW */;
> > +   __le16 length_dw /* Length in DW */;
> 
> This cause a compilation error [1] in patch by patch compilation, when debug
> is enabled. Fix seems straightforward [2].
> 
> Do you confirm the fix?
> If you confirm, you don't need to send a new version, fix can be applied
> while getting the patch.

Please apply the fix [2] while getting the patch. The error [1] is due to debug 
option not enabled for individual patch compilation. We did test after applying 
entire series with all the config options enabled.
For our upcoming submissions, we'll take care of enabling the debug option when 
compile testing all the patches individually.

Thanks!
-Rasesh

> 
> Thanks,
> ferruh
> 
> 
> [1]:
> 
> In file included from .../drivers/net/qede/base/ecore.h:36:0,
>  from .../drivers/net/qede/base/ecore_hw.c:12:
> .../drivers/net/qede/base/ecore_hw.c: In function
> 'ecore_dmae_post_command':
> .../drivers/net/qede/base/ecore_hw.c:478:20: error: 'struct dmae_cmd'
> has no member named 'length'; did you mean 'length_dw'?
>   (int)p_command->length,
> ^
> .../drivers/net/qede/base/../qede_logs.h:47:11: note: in definition of macro
> 'DP_VERBOSE'
>  ##__VA_ARGS__); \
>^~~
> .../mk/internal/rte.compile-pre.mk:138: recipe for target 'base/ecore_hw.o'
> failed
> 
> 
> [2]:
> 
> diff --git a/drivers/net/qede/base/ecore_hw.c
> b/drivers/net/qede/base/ecore_hw.c
> index 72bc6de..5412ed1 100644
> --- a/drivers/net/qede/base/ecore_hw.c
> +++ b/drivers/net/qede/base/ecore_hw.c
> @@ -475,7 +475,7 @@ ecore_dmae_post_command(struct ecore_hwfn
> *p_hwfn, struct ecore_ptt *p_ptt)
>"len=0x%x src=0x%x:%x dst=0x%x:%x\n",
>idx_cmd, (u32)p_command->opcode,
>(u16)p_command->opcode_b,
> -  (int)p_command->length,
> +  (int)p_command->length_dw,
>(int)p_command->src_addr_hi,
>(int)p_command->src_addr_lo,
>(int)p_command->dst_addr_hi, (int)p_command->dst_addr_lo);
> 



[dpdk-dev] [PATCH v4 04/32] net/qede/base: add HSI changes and register defines

2016-10-19 Thread Ferruh Yigit
On 10/19/2016 5:11 AM, Rasesh Mody wrote:
>  - add the hardware software interface(HSI) changes
>  - add register definitions
> 
> These will be required for 8.10.9.0 FW upgrade.
> 
> Signed-off-by: Rasesh Mody 

<...>

>  /*
>   * Igu cleanup bit values to distinguish between clean or producer consumer
>   */
> @@ -1376,7 +1572,7 @@ struct dmae_cmd {
>   __le32 src_addr_hi;
>   __le32 dst_addr_lo;
>   __le32 dst_addr_hi;
> - __le16 length /* Length in DW */;
> + __le16 length_dw /* Length in DW */;

This cause a compilation error [1] in patch by patch compilation, when
debug is enabled. Fix seems straightforward [2].

Do you confirm the fix?
If you confirm, you don't need to send a new version, fix can be applied
while getting the patch.

Thanks,
ferruh


[1]:

In file included from .../drivers/net/qede/base/ecore.h:36:0,
 from .../drivers/net/qede/base/ecore_hw.c:12:
.../drivers/net/qede/base/ecore_hw.c: In function ?ecore_dmae_post_command?:
.../drivers/net/qede/base/ecore_hw.c:478:20: error: ?struct dmae_cmd?
has no member named ?length?; did you mean ?length_dw??
  (int)p_command->length,
^
.../drivers/net/qede/base/../qede_logs.h:47:11: note: in definition of
macro ?DP_VERBOSE?
 ##__VA_ARGS__); \
   ^~~
.../mk/internal/rte.compile-pre.mk:138: recipe for target
'base/ecore_hw.o' failed


[2]:

diff --git a/drivers/net/qede/base/ecore_hw.c
b/drivers/net/qede/base/ecore_hw.c
index 72bc6de..5412ed1 100644
--- a/drivers/net/qede/base/ecore_hw.c
+++ b/drivers/net/qede/base/ecore_hw.c
@@ -475,7 +475,7 @@ ecore_dmae_post_command(struct ecore_hwfn *p_hwfn,
struct ecore_ptt *p_ptt)
   "len=0x%x src=0x%x:%x dst=0x%x:%x\n",
   idx_cmd, (u32)p_command->opcode,
   (u16)p_command->opcode_b,
-  (int)p_command->length,
+  (int)p_command->length_dw,
   (int)p_command->src_addr_hi,
   (int)p_command->src_addr_lo,
   (int)p_command->dst_addr_hi,
(int)p_command->dst_addr_lo);




[dpdk-dev] [PATCH v4 04/32] net/qede/base: add HSI changes and register defines

2016-10-18 Thread Rasesh Mody
 - add the hardware software interface(HSI) changes
 - add register definitions

These will be required for 8.10.9.0 FW upgrade.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/common_hsi.h   | 1202 +-
 drivers/net/qede/base/ecore_dev.c|2 -
 drivers/net/qede/base/ecore_hsi_common.h |  295 +++-
 drivers/net/qede/base/ecore_hw.c |4 +-
 drivers/net/qede/base/eth_common.h   |   27 -
 drivers/net/qede/base/reg_addr.h |   36 +
 6 files changed, 1330 insertions(+), 236 deletions(-)

diff --git a/drivers/net/qede/base/common_hsi.h 
b/drivers/net/qede/base/common_hsi.h
index 4574800..b431c78 100644
--- a/drivers/net/qede/base/common_hsi.h
+++ b/drivers/net/qede/base/common_hsi.h
@@ -8,12 +8,89 @@

 #ifndef __COMMON_HSI__
 #define __COMMON_HSI__
+//
+/* PROTOCOL COMMON FW CONSTANTS */
+//
+
+/* Temporarily here should be added to HSI automatically by resource allocation
+ * tool.
+ */
+#define T_TEST_AGG_INT_TEMP6
+#defineM_TEST_AGG_INT_TEMP8
+#defineU_TEST_AGG_INT_TEMP6
+#defineX_TEST_AGG_INT_TEMP14
+#defineY_TEST_AGG_INT_TEMP4
+#defineP_TEST_AGG_INT_TEMP4
+
+#define X_FINAL_CLEANUP_AGG_INT  1
+
+#define EVENT_RING_PAGE_SIZE_BYTES  4096
+
+#define NUM_OF_GLOBAL_QUEUES   128
+#define COMMON_QUEUE_ENTRY_MAX_BYTE_SIZE   64
+
+#define ISCSI_CDU_TASK_SEG_TYPE   0
+#define FCOE_CDU_TASK_SEG_TYPE0
+#define RDMA_CDU_TASK_SEG_TYPE1
+
+#define FW_ASSERT_GENERAL_ATTN_IDX32
+
+#define MAX_PINNED_CCFC32
+
+#define EAGLE_ENG1_WORKAROUND_NIG_FLOWCTRL_MODE3
+
+/* Queue Zone sizes in bytes */
+#define TSTORM_QZONE_SIZE8  /*tstorm_scsi_queue_zone*/
+#define MSTORM_QZONE_SIZE16  /*mstorm_eth_queue_zone. Used only for RX
+ *producer of VFs in backward compatibility
+ *mode.
+ */
+#define USTORM_QZONE_SIZE8  /*ustorm_eth_queue_zone*/
+#define XSTORM_QZONE_SIZE8  /*xstorm_eth_queue_zone*/
+#define YSTORM_QZONE_SIZE0
+#define PSTORM_QZONE_SIZE0
+
+/*Log of mstorm default VF zone size.*/
+#define MSTORM_VF_ZONE_DEFAULT_SIZE_LOG   7
+/*Maximum number of RX queues that can be allocated to VF by default*/
+#define ETH_MAX_NUM_RX_QUEUES_PER_VF_DEFAULT  16
+/*Maximum number of RX queues that can be allocated to VF with doubled VF zone
+ * size. Up to 96 VF supported in this mode
+ */
+#define ETH_MAX_NUM_RX_QUEUES_PER_VF_DOUBLE   48
+/*Maximum number of RX queues that can be allocated to VF with 4 VF zone size.
+ * Up to 48 VF supported in this mode
+ */
+#define ETH_MAX_NUM_RX_QUEUES_PER_VF_QUAD 112
+
+
+//
+/* CORE (LIGHT L2) FW CONSTANTS */
+//
+
+#define CORE_LL2_MAX_RAMROD_PER_CON8
+#define CORE_LL2_TX_BD_PAGE_SIZE_BYTES 4096
+#define CORE_LL2_RX_BD_PAGE_SIZE_BYTES 4096
+#define CORE_LL2_RX_CQE_PAGE_SIZE_BYTES4096
+#define CORE_LL2_RX_NUM_NEXT_PAGE_BDS  1
+
+#define CORE_LL2_TX_MAX_BDS_PER_PACKET 12
+
+#define CORE_SPQE_PAGE_SIZE_BYTES   4096
+
+#define MAX_NUM_LL2_RX_QUEUES  32
+#define MAX_NUM_LL2_TX_STATS_COUNTERS  32
+
+
+//
+/* Include firmware version number only- do not add constants here to avoid */
+/* redundunt compilations   */
+//

-#define CORE_SPQE_PAGE_SIZE_BYTES  4096

 #define FW_MAJOR_VERSION   8
-#define FW_MINOR_VERSION   7
-#define FW_REVISION_VERSION7
+#define FW_MINOR_VERSION   10
+#define FW_REVISION_VERSION9
 #define FW_ENGINEERING_VERSION 0

 /***/
@@ -21,70 +98,96 @@
 /***/

 /* PCI functions */
-#define MAX_NUM_PORTS_K2   (4)
-#define MAX_NUM_PORTS_BB   (2)
-#define MAX_NUM_PORTS  (MAX_NUM_PORTS_K2)
+#define MAX_NUM_PORTS_K2   (4)
+#define MAX_NUM_PORTS_BB   (2)
+#define MAX_NUM_PORTS  (MAX_NUM_PORTS_K2)

-#define MAX_NUM_PFS_K2 (16)
-#define MAX_NUM_PFS_BB (8)
-#define MAX_NUM_PFS(MAX_NUM_PFS_K2)
-#define MAX_NUM_OF_PFS_IN_CHIP (16) /* On both engines */
+#define MAX_NUM_PFS_K2 (16)
+#define MAX_NUM_PFS_BB (8)
+#define MAX_NUM_PFS(MAX_NUM_PFS_K2)
+#define MAX_NUM_OF_PFS_IN_CHIP (16) /* On both engines */

-#define MAX_NUM_VFS_K2 (192)
-#define MAX_NUM_VFS_BB (120)
-#define MAX_NUM_VFS