Re: [edk2-devel] [Patch] Silicon/Intel/Tools: Update the minor version of FitGen tool.

[Liming Gao]

Reviewed-by: Liming Gao 

-Original Message-
From: Fu, Siyuan  
Sent: 2020年3月17日 13:32
To: devel@edk2.groups.io
Cc: Feng, Bob C ; Gao, Liming 
Subject: [Patch] Silicon/Intel/Tools: Update the minor version of FitGen tool.

This patch updates the minor version to 61 for the changes introduced by commit 
98c1cc2c12c5104f8e6fb97473a74c6490a06bc4.

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Siyuan Fu 
---
 Silicon/Intel/Tools/FitGen/FitGen.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Intel/Tools/FitGen/FitGen.h 
b/Silicon/Intel/Tools/FitGen/FitGen.h
index 2d72977b2c..cb9274b417 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.h
+++ b/Silicon/Intel/Tools/FitGen/FitGen.h
@@ -1,7 +1,7 @@
 /**@file
 Definitions for the FitGen utility.
 
-Copyright (c) 2010-2019, Intel Corporation. All rights reserved.
+Copyright (c) 2010-2020, Intel Corporation. All rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -31,7 +31,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent  // Utility 
version information  //  #define UTILITY_MAJOR_VERSION 0 -#define 
UTILITY_MINOR_VERSION 60
+#define UTILITY_MINOR_VERSION 61
 #define UTILITY_DATE  __DATE__
 
 //
--
2.19.1.windows.1


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[edk2-devel] [Patch] Silicon/Intel/Tools: Update the minor version of FitGen tool.

[Siyuan, Fu]

This patch updates the minor version to 61 for the changes introduced
by commit 98c1cc2c12c5104f8e6fb97473a74c6490a06bc4.

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Siyuan Fu 
---
 Silicon/Intel/Tools/FitGen/FitGen.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Intel/Tools/FitGen/FitGen.h 
b/Silicon/Intel/Tools/FitGen/FitGen.h
index 2d72977b2c..cb9274b417 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.h
+++ b/Silicon/Intel/Tools/FitGen/FitGen.h
@@ -1,7 +1,7 @@
 /**@file
 Definitions for the FitGen utility.
 
-Copyright (c) 2010-2019, Intel Corporation. All rights reserved.
+Copyright (c) 2010-2020, Intel Corporation. All rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -31,7 +31,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 // Utility version information
 //
 #define UTILITY_MAJOR_VERSION 0
-#define UTILITY_MINOR_VERSION 60
+#define UTILITY_MINOR_VERSION 61
 #define UTILITY_DATE  __DATE__
 
 //
-- 
2.19.1.windows.1


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Re: [edk2-devel] [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in FitGen.

[Liming Gao]

Siyuan:
  Sorry for the late response. Please also update tool minor version to match 
this change.

  #define UTILITY_MINOR_VERSION 60 ==> #define UTILITY_MINOR_VERSION 61

  It is defined edk2-platforms\Silicon\Intel\Tools\FitGen\FitGen.h

Thanks
Liming
-Original Message-
From: Feng, Bob C  
Sent: 2020年3月12日 10:02
To: Fu, Siyuan ; devel@edk2.groups.io
Cc: Gao, Liming 
Subject: RE: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment 
in FitGen.

Reviewed-by: Bob Feng 

-Original Message-
From: Fu, Siyuan
Sent: Wednesday, March 11, 2020 5:34 PM
To: devel@edk2.groups.io
Cc: Feng, Bob C ; Gao, Liming 
Subject: [Patch] Silicon/Intel/Tools: Add parameter for microcode alignment in 
FitGen.

The current FitGen has "-NA" parameter to indicate whether microcode is placed 
with an alignment, but it could only support 0x800 alignment:
 - With"-NA" means microcode is not aligned.
 - No "-NA" means Microcode is 0x800 aligned.
There is no method to specify other alignment value.

This patch add "-A" option to FitGen for to configure the alignment to a user 
specified value. The change is backward compatible as:
 - Only "-NA" means microcode is not aligned (same as before).
 - No "-NA" and No "-A" means Microcode is 0x800 aligned (same as
   before).
 - Only "-A" means microcode is aligned with specified value (new).

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Siyuan Fu 
---
 Silicon/Intel/Tools/FitGen/FitGen.c | 35 +++--
 1 file changed, 23 insertions(+), 12 deletions(-)

diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c 
b/Silicon/Intel/Tools/FitGen/FitGen.c
index 49ec33a7fd..75d8932d90 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -260,7 +260,8 @@ typedef struct {
   FIT_TABLE_CONTEXT_ENTRYBiosModule[MAX_BIOS_MODULE_ENTRY];
   UINT32 BiosModuleVersion;
   FIT_TABLE_CONTEXT_ENTRYMicrocode[MAX_MICROCODE_ENTRY];
-  BOOLEANMicrocodeAlignment;
+  BOOLEANMicrocodeIsAligned;
+  UINT32 MicrocodeAlignValue;
   UINT32 MicrocodeVersion;
   FIT_TABLE_CONTEXT_ENTRYOptionalModule[MAX_OPTIONAL_ENTRY];
   FIT_TABLE_CONTEXT_ENTRYPortModule[MAX_PORT_ENTRY];
@@ -325,6 +326,7 @@ Returns:
   "\t[-V ]\n"
   "\t[-F ] [-F ] [-V 
]\n"
   "\t[-NA]\n"
+  "\t[-A ]\n"
   "\t[-CLEAR]\n"
   "\t[-L  ]\n"
   "\t[-I ]\n"
@@ -357,7 +359,8 @@ Returns:
   printf ("\tMicrocodeGuid  - Guid of Microcode Module.\n");
   printf ("\tMicrocodeSlotSize  - Occupied region size of each Microcode 
binary.\n");
   printf ("\tMicrocodeFfsGuid   - Guid of FFS which is used to save 
Microcode binary");
-  printf ("\t-NA- No 0x800 aligned Microcode requirement. 
No -NA means Microcode is 0x800 aligned.\n");
+  printf ("\t-NA- No 0x800 aligned Microcode requirement. 
No -NA means Microcode is aligned with option MicrocodeAlignment value.\n");
+  printf ("\tMicrocodeAlignment - HEX value of Microcode alignment. 
Ignored if \"-NA\" is specified. Default value is 0x800.\n");
   printf ("\tRecordType - FIT entry record type. User should 
ensure it is ordered.\n");
   printf ("\tRecordDataAddress  - FIT entry record data address.\n");
   printf ("\tRecordDataSize - FIT entry record data size.\n");
@@ -957,17 +960,25 @@ Returns:
   //
   if ((Index >= argc) ||
   ((strcmp (argv[Index], "-NA") != 0) &&
-   (strcmp (argv[Index], "-na") != 0)) ) {
+   (strcmp (argv[Index], "-na") != 0) &&
+   (strcmp (argv[Index], "-A") != 0) &&
+   (strcmp (argv[Index], "-a") != 0))) {
 //
 // by pass
 //
-gFitTableContext.MicrocodeAlignment = TRUE;
-  } else {
+gFitTableContext.MicrocodeIsAligned = TRUE;
+gFitTableContext.MicrocodeAlignValue = 0x800;  } else if ((strcmp 
+ (argv[Index], "-NA") == 0) || (strcmp (argv[Index], "-na") == 0)) {
+gFitTableContext.MicrocodeIsAligned = FALSE;
+gFitTableContext.MicrocodeAlignValue = 1;
+Index += 1;
+  } else if ((strcmp (argv[Index], "-A") == 0) || (strcmp (argv[Index], "-a") 
== 0)) {
+gFitTableContext.MicrocodeIsAligned = TRUE;
 //
-// no alignment
+// Get alignment from parameter
 //
-gFitTableContext.MicrocodeAlignment = FALSE;
-Index += 1;
+gFitTableContext.MicrocodeAlignValue = xtoi (argv[Index + 1]);;
+Index += 2;
   }
 
   //
@@ -1159,8 +1170,8 @@ Returns:
 //
 // MCU might be put at 2KB alignment, if so, we need to adjust 
the size as 2KB alignment.
 //
-if (gFitTableContext.MicrocodeAlignment) {
-  MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 32) + 
MICROCODE_ALIGNMENT) & ~MICROCODE_ALIGNMENT;
+if (gFitTableContext.MicrocodeIsAligned) {
+  MicrocodeSize = (*(UINT32 *)(MicrocodeBuffer + 

[edk2-devel] [edk2-platforms:PATCH] CoffeelakeSiliconPkg:Redirect ConfigBlockLib path

[TinaX Y Chen]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2318

Change reference path of ConfigBlockLib to IntelSiliconPkg for Coffeelake.

Signed-off-by: TinaX Y Chen 
cc: Ray Ni 
cc: Rangasai V Chaganty 
cc: Chasel Chiu 
cc: Ethan Tsao 
---
 Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc 
b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
index 37c77d8f..2f25bdb3 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the Coffee Lake silicon package DSC file.
 #
-# Copyright (c) 2019 Intel Corporation. All rights reserved. 
+# Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved. 
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -147,7 +147,7 @@ gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0
 # Silicon Init Common Library
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
-ConfigBlockLib|ClientSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
+ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
 
PchTraceHubInitLib|ClientSiliconPkg/Library/BasePchTraceHubInitLib/BasePchTraceHubInitLib.inf
 
 [LibraryClasses.IA32]
-- 
2.16.2.windows.1


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Re: [edk2-devel] Upcoming Event: TianoCore Bug Triage - APAC / NAMO - Thu, 03/19/2020 5:00pm-5:30pm #cal-reminder

[Liming Gao]

Hi, all
Based the discussion https://edk2.groups.io/g/devel/message/55866, TianoCore 
Bug Triage is changed to Wednesday morning 9:30AM ~ 10:30AM (UTC +8) since this 
week. The calendar is updated https://edk2.groups.io/g/devel/calendar

Thanks
Liming
From: devel@edk2.groups.io 
Sent: 2020年3月15日 8:02
To: devel@edk2.groups.io
Subject: [edk2-devel] Upcoming Event: TianoCore Bug Triage - APAC / NAMO - Thu, 
03/19/2020 5:00pm-5:30pm #cal-reminder


Reminder: TianoCore Bug Triage - APAC / NAMO

When: Thursday, 19 March 2020, 5:00pm to 5:30pm, (GMT-07:00) America/Los Angeles

Where:https://bluejeans.com/889357567?src=calendarLink

View Event

Organizer: Brian Richardson 
brian.richard...@intel.com

Description:
For more info please see:
https://www.tianocore.org/bug-triage

To join the meeting on a computer or mobile phone:
https://bluejeans.com/889357567?src=calendarLink

Phone Dial-in
+1.408.740.7256 (US (San Jose))
+1.408.317.9253 (US (Primary, San Jose))
Global Numbers: https://www.bluejeans.com/numbers

Meeting ID: 889 357 567

Room System
199.48.152.152 or bjn.vc

Meeting ID: 889 357 567

Want to test your video connection?
https://bluejeans.com/111




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Re: [edk2-devel] [PATCH v2 0/2] Use submodule way to access brotli

[Liming Gao]

If no other comment, I will merge this change tomorrow. 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Liming Gao
Sent: 2020年3月12日 11:18
To: Zhang, Shenglei ; devel@edk2.groups.io
Cc: Wang, Jian J ; Wu, Hao A ; Feng, 
Bob C 
Subject: Re: [edk2-devel] [PATCH v2 0/2] Use submodule way to access brotli

Reviewed-by: Liming Gao 

-Original Message-
From: Zhang, Shenglei  
Sent: 2020年3月9日 14:32
To: devel@edk2.groups.io
Cc: Gao, Liming ; Wang, Jian J ; 
Wu, Hao A ; Feng, Bob C 
Subject: [PATCH v2 0/2] Use submodule way to access brotli

Currently brotli is used and customized by edk2 in BaseTools and MdeModulePkg. 
These two patches make brotli a submodule in edk2.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2558
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2559

The patches are too big. So I attach the patch link for 1/2 and 2/2.
https://github.com/shenglei10/edk2/commits/brotli

v2: Update INF in 1/2.

Cc: Liming Gao 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Bob Feng 

--
2.18.0.windows.1





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Re: [edk2-devel] [PATCH v2] MdeModulePkg/RegularExpressionDxe: Make oniguruma a submodule in edk2.

[Liming Gao]

If no other comments, I will merge this change tomorrow. 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Liming Gao
Sent: 2020年3月12日 11:12
To: Zhang, Shenglei ; devel@edk2.groups.io
Cc: Wang, Jian J ; Wu, Hao A 
Subject: Re: [edk2-devel] [PATCH v2] MdeModulePkg/RegularExpressionDxe: Make 
oniguruma a submodule in edk2.

Reviewed-by: Liming Gao 

-Original Message-
From: Zhang, Shenglei 
Sent: 2020年3月9日 15:28
To: devel@edk2.groups.io
Cc: Wang, Jian J ; Wu, Hao A ; Gao, 
Liming 
Subject: [PATCH v2] MdeModulePkg/RegularExpressionDxe: Make oniguruma a 
submodule in edk2.

Use submodule way to access oniguruma. And upgrade oniguruma version from 
v6.9.3 to v6.9.4_mark1.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2073

Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Liming Gao 
Signed-off-by: Shenglei Zhang 
---

v2: Include wrapper files in RegularExpressionDxe.inf.
Patch link: https://github.com/shenglei10/edk2/commits/oniguruma

 .../Oniguruma/OnigurumaUefiPort.c |26 -
 .../RegularExpressionDxe/Oniguruma/ascii.c|   118 -
 .../Oniguruma/onig_init.c |45 -
 .../RegularExpressionDxe/Oniguruma/regcomp.c  |  6972 
 .../RegularExpressionDxe/Oniguruma/regenc.c   |  1029 -
 .../RegularExpressionDxe/Oniguruma/regerror.c |   402 -
 .../RegularExpressionDxe/Oniguruma/regexec.c  |  5874 ---
 .../RegularExpressionDxe/Oniguruma/reggnu.c   |   131 -
 .../RegularExpressionDxe/Oniguruma/regparse.c |  8461 -
 .../Oniguruma/regposerr.c |   108 -
 .../RegularExpressionDxe/Oniguruma/regposix.c |   304 -
 .../Oniguruma/regsyntax.c |   336 -
 .../RegularExpressionDxe/Oniguruma/regtrav.c  |76 -
 .../Oniguruma/regversion.c|57 -
 .../RegularExpressionDxe/Oniguruma/st.c   |   588 -
 .../RegularExpressionDxe/Oniguruma/unicode.c  |  1152 -
 .../Oniguruma/unicode_egcb_data.c |  1374 -
 .../Oniguruma/unicode_fold1_key.c |  2995 --
 .../Oniguruma/unicode_fold2_key.c |   222 -
 .../Oniguruma/unicode_fold3_key.c |   133 -
 .../Oniguruma/unicode_fold_data.c |  1522 -
 .../Oniguruma/unicode_property_data.c | 30388 
 .../Oniguruma/unicode_property_data_posix.c   |  5347 ---
 .../Oniguruma/unicode_unfold_key.c|  3299 --
 .../Oniguruma/unicode_wb_data.c   |  1023 -
 .../RegularExpressionDxe/Oniguruma/utf16_le.c |   309 -
 .../{Oniguruma => }/OnigurumaIntrinsics.c | 1 +
 .../RegularExpressionDxe/OnigurumaUefiPort.c  |90 +
 .gitmodules   | 3 +
 .../RegularExpressionDxe/Oniguruma/AUTHORS| 1 -
 .../RegularExpressionDxe/Oniguruma/COPYING|26 -
 .../RegularExpressionDxe/Oniguruma/README |   195 -
 .../RegularExpressionDxe/Oniguruma/oniggnu.h  |87 -
 .../Oniguruma/onigposix.h |   172 -
 .../Oniguruma/oniguruma.h |  1014 -
 .../RegularExpressionDxe/Oniguruma/regenc.h   |   279 -
 .../RegularExpressionDxe/Oniguruma/regint.h   |  1117 -
 .../RegularExpressionDxe/Oniguruma/regparse.h |   455 -
 .../RegularExpressionDxe/Oniguruma/st.h   |69 -
 .../{Oniguruma => }/OnigurumaUefiPort.h   |44 +-
 .../RegularExpressionDxe.h| 3 +-
 .../RegularExpressionDxe.inf  |73 +-
 .../Universal/RegularExpressionDxe/config.h   | 9 +
 .../Universal/RegularExpressionDxe/oniguruma  | 1 +
 .../Universal/RegularExpressionDxe/stdarg.h   | 9 +
 .../Universal/RegularExpressionDxe/stddef.h   | 9 +
 .../Universal/RegularExpressionDxe/stdio.h| 9 +
 .../Universal/RegularExpressionDxe/stdlib.h   | 9 +
 .../Universal/RegularExpressionDxe/string.h   | 9 +
 49 files changed, 230 insertions(+), 75745 deletions(-)  delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/OnigurumaUefiPort.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/ascii.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/onig_init.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regcomp.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regenc.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regerror.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regexec.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/reggnu.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regparse.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regposerr.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regposix.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regsyntax.c
 delete mode 100644 
MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/regtrav.c
 delete mode 100644 

Re: [edk2-devel] [PATCH v2 2/2] CryptoPkg/BaseHashApiLib: Rename BaseHashApiLib by HashApiLib

[Liming Gao]

@Jian, Xiaoyu: can you review this change?

Good catch. Reviewed-by: Liming Gao 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zhang, Shenglei
Sent: 2020年3月12日 13:53
To: devel@edk2.groups.io; newexplor...@gmail.com
Cc: Wang, Jian J ; Lu, XiaoyuX 
Subject: Re: [edk2-devel] [PATCH v2 2/2] CryptoPkg/BaseHashApiLib: Rename 
BaseHashApiLib by HashApiLib

Reviewed-by: Shenglei Zhang 

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of 
> GuoMinJ
> Sent: Thursday, March 5, 2020 2:41 PM
> To: devel@edk2.groups.io
> Cc: GuoMinJ ; Wang, Jian J 
> ; Lu, XiaoyuX 
> Subject: [edk2-devel] [PATCH v2 2/2] CryptoPkg/BaseHashApiLib: Rename 
> BaseHashApiLib by HashApiLib
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2552
> 
> According to CryptoPkg.dsc, the library class only have HashApiLib, so 
> i think the BaseHashApiLib should be considered as base name rather 
> than library class.
> 
> Cc: Jian J Wang 
> Cc: Xiaoyu Lu 
> Signed-off-by: GuoMinJ 
> ---
>  CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.inf | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.inf
> b/CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.inf
> index b4d8675ddd..046320353b 100644
> --- a/CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.inf
> +++ b/CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.inf
> @@ -17,7 +17,7 @@
>FILE_GUID  = B1E566DD-DE7C-4F04-BDA0-B1295D3BE927
>MODULE_TYPE= BASE
>VERSION_STRING = 1.0
> -  LIBRARY_CLASS  = BaseHashApiLib
> +  LIBRARY_CLASS  = HashApiLib
> 
>  #
>  # The following information is for reference only and not required by 
> the build tools.
> --
> 2.17.1
> 
> 
> 





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Re: [edk2-devel] [PATCH v2 1/2] CryptoPkg/BaseCryptLibOnProtocolPpi: Add missing comments

[Liming Gao]

@Jian, Xiao, can you review this change also?

Reviewed-by: Liming Gao 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zhang, Shenglei
Sent: 2020年3月12日 13:49
To: devel@edk2.groups.io; newexplor...@gmail.com
Cc: Wang, Jian J ; Lu, XiaoyuX 
Subject: Re: [edk2-devel] [PATCH v2 1/2] CryptoPkg/BaseCryptLibOnProtocolPpi: 
Add missing comments

Reviewed-by: Shenglei Zhang 

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of 
> GuoMinJ
> Sent: Thursday, March 5, 2020 2:41 PM
> To: devel@edk2.groups.io
> Cc: GuoMinJ ; Wang, Jian J 
> ; Lu, XiaoyuX 
> Subject: [edk2-devel] [PATCH v2 1/2] CryptoPkg/BaseCryptLibOnProtocolPpi:
> Add missing comments
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2552
> 
> DxeCryptLibConstructor have no comments for it, add comments for it.
> 
> Cc: Jian J Wang 
> Cc: Xiaoyu Lu 
> Signed-off-by: GuoMinJ 
> ---
>  .../Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.c  | 9 +
>  1 file changed, 9 insertions(+)
> 
> diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.c
> b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.c
> index 34d5f410b0..b503a5708b 100644
> --- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.c
> +++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.c
> @@ -32,6 +32,15 @@ GetCryptoServices (
>return (VOID *)mCryptoProtocol;
>  }
> 
> +/**
> +  Locate the valid Crypto Protocol.
> +
> +  @param  ImageHandle   The firmware allocated handle for the EFI image.
> +  @param  SystemTable   A pointer to the EFI System Table.
> +
> +  @retval EFI_SUCCESS   The constructor executed correctly.
> +  @retval EFI_NOT_FOUND Found no valid Crypto Protocol.
> +**/
>  EFI_STATUS
>  EFIAPI
>  DxeCryptLibConstructor (
> --
> 2.17.1
> 
> 
> 





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Re: [edk2-devel] [PATCH] IntelSiliconPkg/Include/Library:Add ConfigBlockLib.h

[Chiu, Chasel]

Sorry Tina, the commit message and code review subject format were wrong, 
please refer to other edk2-platform patches and re-send again.

Thanks,
Chasel


> -Original Message-
> From: Chiu, Chasel
> Sent: Tuesday, March 17, 2020 8:08 AM
> To: Chen, TinaX Y ; devel@edk2.groups.io
> Cc: Ni, Ray ; Chaganty, Rangasai V
> ; Tsao, Ethan 
> Subject: RE: [PATCH] IntelSiliconPkg/Include/Library:Add ConfigBlockLib.h
> 
> 
> Reviewed-by: Chasel Chiu 
> 
> > -Original Message-
> > From: Chen, TinaX Y 
> > Sent: Monday, March 16, 2020 10:41 PM
> > To: devel@edk2.groups.io
> > Cc: Ni, Ray ; Chaganty, Rangasai V
> > ; Chiu, Chasel ;
> > Tsao, Ethan 
> > Subject: [PATCH] IntelSiliconPkg/Include/Library:Add ConfigBlockLib.h
> >
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2318
> >
> > Change reference path of ConfigBlockLib to IntelSiliconPkg for Coffeelake.
> >
> > Change-Id: I433e0a7a00c0cc15a0986050c203c7ca8aef02a2
> > Signed-off-by: TinaX Y Chen 
> > cc: Ray Ni 
> > cc: Rangasai V Chaganty 
> > cc: Chasel Chiu 
> > cc: Ethan Tsao 
> > ---
> >  Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git
> > a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> > b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> > index 37c77d8f..2f25bdb3 100644
> > --- a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> > @@ -1,7 +1,7 @@
> >  ## @file
> >  #  Component description file for the Coffee Lake silicon package DSC
> file.
> >  #
> > -# Copyright (c) 2019 Intel Corporation. All rights reserved. 
> > +# Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved.
> > +
> >  #
> >  # SPDX-License-Identifier: BSD-2-Clause-Patent  # @@ -147,7 +147,7 @@
> > gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0
> >  # Silicon Init Common Library
> >  #
> >  !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
> > -ConfigBlockLib|ClientSiliconPkg/Library/BaseConfigBlockLib/BaseConfig
> > -ConfigBlockLib|Bl
> > -ConfigBlockLib|ockLib.inf
> > +ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigB
> > +ConfigBlockLib|lo
> > +ConfigBlockLib|ckLib.inf
> >
> > PchTraceHubInitLib|ClientSiliconPkg/Library/BasePchTraceHubInitLib/Bas
> > PchTraceHubInitLib|ePch
> > TraceHubInitLib.inf
> >
> >  [LibraryClasses.IA32]
> > --
> > 2.16.2.windows.1


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Re: [edk2-devel] [PATCH] IntelSiliconPkg/Include/Library:Add ConfigBlockLib.h

[Chiu, Chasel]

Reviewed-by: Chasel Chiu 

> -Original Message-
> From: Chen, TinaX Y 
> Sent: Monday, March 16, 2020 10:41 PM
> To: devel@edk2.groups.io
> Cc: Ni, Ray ; Chaganty, Rangasai V
> ; Chiu, Chasel ;
> Tsao, Ethan 
> Subject: [PATCH] IntelSiliconPkg/Include/Library:Add ConfigBlockLib.h
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2318
> 
> Change reference path of ConfigBlockLib to IntelSiliconPkg for Coffeelake.
> 
> Change-Id: I433e0a7a00c0cc15a0986050c203c7ca8aef02a2
> Signed-off-by: TinaX Y Chen 
> cc: Ray Ni 
> cc: Rangasai V Chaganty 
> cc: Chasel Chiu 
> cc: Ethan Tsao 
> ---
>  Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> index 37c77d8f..2f25bdb3 100644
> --- a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> +++ b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
> @@ -1,7 +1,7 @@
>  ## @file
>  #  Component description file for the Coffee Lake silicon package DSC file.
>  #
> -# Copyright (c) 2019 Intel Corporation. All rights reserved. 
> +# Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved.
> +
>  #
>  # SPDX-License-Identifier: BSD-2-Clause-Patent  # @@ -147,7 +147,7 @@
> gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0
>  # Silicon Init Common Library
>  #
>  !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
> -ConfigBlockLib|ClientSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBl
> -ConfigBlockLib|ockLib.inf
> +ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlo
> +ConfigBlockLib|ckLib.inf
> 
> PchTraceHubInitLib|ClientSiliconPkg/Library/BasePchTraceHubInitLib/BasePch
> TraceHubInitLib.inf
> 
>  [LibraryClasses.IA32]
> --
> 2.16.2.windows.1


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[edk2-devel] [edk2-staging/EdkRepo] [PATCH] EdkRepo: Initial commit of checkout pin

[Desimone, Ashley E]

Command to allow a user to checkout the contents of a
previously commited PIN file.

Signed-off-by: Ashley E Desimone 
Cc: Nate DeSimone 
Cc: Puja Pandya 
Cc: Erik Bjorge 
---
 edkrepo/commands/arguments/checkout_pin_args.py |  11 +++
 edkrepo/commands/checkout_pin_command.py| 106 
 edkrepo/commands/humble/checkout_pin_humble.py  |  14 
 edkrepo/common/edkrepo_exception.py |   4 +
 4 files changed, 135 insertions(+)
 create mode 100644 edkrepo/commands/arguments/checkout_pin_args.py
 create mode 100644 edkrepo/commands/checkout_pin_command.py
 create mode 100644 edkrepo/commands/humble/checkout_pin_humble.py

diff --git a/edkrepo/commands/arguments/checkout_pin_args.py 
b/edkrepo/commands/arguments/checkout_pin_args.py
new file mode 100644
index 000..abd01b3
--- /dev/null
+++ b/edkrepo/commands/arguments/checkout_pin_args.py
@@ -0,0 +1,11 @@
+#!/usr/bin/env python3
+#
+## @file
+# checkout_pin_args.py
+#
+# Copyright (c) 2020, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+COMMAND_DESCRIPTION = ('Checks out the revisions described in a PIN file in '
+   'an existing workpace of the same project')
diff --git a/edkrepo/commands/checkout_pin_command.py 
b/edkrepo/commands/checkout_pin_command.py
new file mode 100644
index 000..a2afc41
--- /dev/null
+++ b/edkrepo/commands/checkout_pin_command.py
@@ -0,0 +1,106 @@
+#!/usr/bin/env python3
+#
+## @file
+# checkout_pin_command.py
+#
+# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+import os
+
+from git import Repo
+
+from edkrepo.commands.edkrepo_command import EdkrepoCommand, OverrideArgument
+import edkrepo.commands.arguments.checkout_pin_args as arguments
+import edkrepo.commands.humble.checkout_pin_humble as humble
+from edkrepo.common.common_repo_functions import sparse_checkout_enabled, 
reset_sparse_checkout, sparse_checkout
+from edkrepo.common.common_repo_functions import check_dirty_repos, 
checkout_repos
+from edkrepo.common.humble import SPARSE_CHECKOUT, SPARSE_RESET
+from edkrepo.common.edkrepo_exception import 
EdkrepoInvalidParametersException, EdkrepoProjectMismatchException
+from edkrepo.config.config_factory import get_workspace_path, 
get_workspace_manifest
+from edkrepo_manifest_parser.edk_manifest import ManifestXml
+
+class CheckoutPinCommand(EdkrepoCommand):
+def __init__(self):
+super().__init__()
+
+def get_metadata(self):
+metadata = {}
+metadata['name'] = 'checkout-pin'
+metadata['help-text'] = arguments.COMMAND_DESCRIPTION
+metadata['alias'] = 'chp'
+args = []
+metadata['arguments'] = args
+args.append({'name' : 'pinfile',
+ 'positional' : True,
+ 'position' : 0,
+ 'required' : True,
+ 'help-text' : arguments.PIN_FILE_HELP})
+args.append(OverrideArgument)
+return metadata
+
+def run_command(self, args, config):
+workspace_path = get_workspace_path()
+manifest = get_workspace_manifest()
+pin_path = self.__get_pin_path(args, workspace_path, 
config['cfg_file'].manifest_repo_abs_local_path, manifest)
+pin = ManifestXml(pin_path)
+manifest_sources = 
manifest.get_repo_sources(manifest.general_config.current_combo)
+check_dirty_repos(manifest, workspace_path)
+for source in manifest_sources:
+local_path = os.path.join(workspace_path, source.root)
+repo = Repo(local_path)
+origin = repo.remotes.origin
+origin.fetch()
+self.__pin_matches_project(pin, manifest, workspace_path)
+manifest.write_current_combo(pin.general_config.current_combo)
+sparse_enabled = sparse_checkout_enabled(workspace_path, 
manifest_sources)
+if sparse_enabled:
+print(SPARSE_RESET)
+reset_sparse_checkout(workspace_path, manifest_sources)
+pin_repo_sources = 
pin.get_repo_sources(pin.general_config.current_combo)
+try:
+checkout_repos(args.verbose, args.override, pin_repo_sources, 
workspace_path, manifest)
+finally:
+if sparse_enabled:
+print(SPARSE_CHECKOUT)
+sparse_checkout(workspace_path, pin_repo_sources, manifest)
+
+def __get_pin_path(self, args, workspace_path, manifest_repo_path, 
manifest):
+if os.path.isabs(args.pinfile) and os.path.isfile(args.pinfile):
+return os.path.normpath(args.pinfile)
+elif os.path.isfile(os.path.join(manifest_repo_path, 
os.path.normpath(manifest.general_config.pin_path), args.pinfile)):
+return os.path.join(manifest_repo_path, 
os.path.normpath(manifest.general_config.pin_path), args.pinfile)
+elif os.path.isfile(os.path.join(manifest_repo_path, args.pinfile)):
+return 

[edk2-devel] [edk2-staging/EdkRepo] [PATCH] EdkRepo: Installer would lists every Python version as obsolete

[Nate DeSimone]

If a VendorCustomizer is being used, the EdkRepo installer erroneously
lists every version of Python as obsolete even though they are not.

Cc: Ashley DeSimone 
Cc: Puja Pandya 
Cc: Erik Bjorge 
Cc: Bret Barkelew 
Signed-off-by: Nate DeSimone 
---
 edkrepo_installer/EdkRepoInstaller/VendorCustomizer.cs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/edkrepo_installer/EdkRepoInstaller/VendorCustomizer.cs 
b/edkrepo_installer/EdkRepoInstaller/VendorCustomizer.cs
index 622d7ad..da49006 100644
--- a/edkrepo_installer/EdkRepoInstaller/VendorCustomizer.cs
+++ b/edkrepo_installer/EdkRepoInstaller/VendorCustomizer.cs
@@ -250,7 +250,7 @@ namespace TianoCore.EdkRepoInstaller
 NewObsoletedPythonVersions.Add(new 
PythonVersion(version));
 }
 PythonVersions = NewPythonVersions;
-ObsoletedPythonVersions = NewPythonVersions;
+ObsoletedPythonVersions = NewObsoletedPythonVersions;
 };
 }
 }
-- 
2.24.0.windows.2


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Re: [edk2-devel] [edk2-platforms][PATCH 8/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-XLR platform

[Thomas Abraham]

On Thu, Mar 12, 2020 at 8:06 PM Aditya Angadi  wrote:
>
> For RD-Daniel Config-XLR, use multichip mode information from the SGI
> platform descriptor HOB to pick the correct ACPI table to be installed.
>
> Signed-off-by: Aditya Angadi 

Reviewed-by: Thomas Abraham 

> ---
>  Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c   | 5 +
>  Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 1 +
>  Platform/ARM/SgiPkg/Include/SgiPlatform.h   | 1 +
>  3 files changed, 7 insertions(+)
>
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c 
> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> index 7e0de765f7..b1f5714b93 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> @@ -51,6 +51,11 @@ STATIC SGI_PLATFORM_ACPI_TABLE_GUID_LOOKUP 
> AcpiTableGuidLookup[] = {
>RD_DANIEL_CFGM_CONF_ID,
>MULTI_CHIP_MODE_DISABLED,
>),
> +  ACPI_GUID_LOOKUP (
> +  RD_DANIEL_PART_NUM,
> +  RD_DANIEL_CFGXLR_CONF_ID,
> +  MULTI_CHIP_MODE_ENABLED,
> +  ),
>  };
>
>  VOID
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf 
> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> index 82569820b7..00cbe608c2 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> @@ -35,6 +35,7 @@
>gRdN1EdgeX2AcpiTablesFileGuid
>gRdE1EdgeAcpiTablesFileGuid
>gRdDanielCfgMAcpiTablesFileGuid
> +  gRdDanielCfgXlrAcpiTablesFileGuid
>
>  [FeaturePcd]
>gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported
> diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
> b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> index b6a427b8b6..9822858f6e 100644
> --- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> @@ -73,6 +73,7 @@
>  //RDDANIEL Platform Identification values
>  #define RD_DANIEL_PART_NUM0x78A
>  #define RD_DANIEL_CFGM_CONF_ID0x1
> +#define RD_DANIEL_CFGXLR_CONF_ID  0x2
>
>  #define SGI_CONFIG_MASK   0x0F
>  #define SGI_CONFIG_SHIFT  0x1C
> --
> 2.17.1
>
>
> 
>

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[edk2-devel] [edk2-staging/EdkRepo] [PATCH] EdkRepo: Uninstaller does not uninstall packages with '_' in their name.

[Nate DeSimone]

pip does not support '_' in package names and converts them to
'-' after installing the wheel. In order to uninstall affected
packages the '_' needs to be converted to a '-' when calculating
the package name.

Cc: Ashley DeSimone 
Cc: Puja Pandya 
Cc: Erik Bjorge 
Cc: Bret Barkelew 
Signed-off-by: Nate DeSimone 
---
 edkrepo_installer/EdkRepoInstaller/InstallWorker.cs | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs 
b/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs
index 5a358f9..f9738fd 100644
--- a/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs
+++ b/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs
@@ -550,10 +550,16 @@ namespace TianoCore.EdkRepoInstaller
 {
 if (VendorCustomizer.Instance.GetPythonWheelsToUninstall != 
null)
 {
-return 
VendorCustomizer.Instance.GetPythonWheelsToUninstall();
+//
+// pip doesn't understand the difference between '_' and 
'-'
+//
+return 
VendorCustomizer.Instance.GetPythonWheelsToUninstall().Select(p => 
p.Replace('_', '-'));
 }
 }
-return new string[] { InstallerStrings.EdkrepoPackageName };
+//
+// pip doesn't understand the difference between '_' and '-'
+//
+return (new string[] { InstallerStrings.EdkrepoPackageName 
}).Select(p => p.Replace('_', '-'));
 }
 
 public void PerformInstall(Action ReportComplete, 
Action ReportProgress, Action AllowCancel, Func CancelPending)
-- 
2.24.0.windows.2


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[edk2-devel] [edk2-staging/EdkRepo] [PATCH] EdkRepo: Use /S switch to pass command args in installer

[Nate DeSimone]

Cc: Ashley DeSimone 
Cc: Puja Pandya 
Cc: Erik Bjorge 
Cc: Bret Barkelew 
Signed-off-by: Nate DeSimone 
---
 edkrepo_installer/EdkRepoInstaller/App.xaml.cs  | 4 ++--
 edkrepo_installer/EdkRepoInstaller/InstallWorker.cs | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/edkrepo_installer/EdkRepoInstaller/App.xaml.cs 
b/edkrepo_installer/EdkRepoInstaller/App.xaml.cs
index 58186c9..5d23624 100644
--- a/edkrepo_installer/EdkRepoInstaller/App.xaml.cs
+++ b/edkrepo_installer/EdkRepoInstaller/App.xaml.cs
@@ -185,7 +185,7 @@ namespace TianoCore.EdkRepoInstaller
 {
 InstallLogger.Log(string.Format("{0} is a third party 
version of {1}. {0} is already installed.", DisplayName, ProductName));
 InstallLogger.Log(string.Format("To install this version 
of {1}, {0} must be uninstalled first.", DisplayName, ProductName));
-SilentProcess p = 
SilentProcess.StartConsoleProcessSilently("cmd.exe", string.Format("/c 
\"{0}\"", UninstallString));
+SilentProcess p = 
SilentProcess.StartConsoleProcessSilently("cmd.exe", string.Format("/S /C 
\"{0}\"", UninstallString));
 p.WaitForExit();
 Thread.Sleep(4000);
 }
@@ -200,7 +200,7 @@ namespace TianoCore.EdkRepoInstaller
 );
 if (Uninstall == MessageBoxResult.Yes)
 {
-SilentProcess p = 
SilentProcess.StartConsoleProcessSilently("cmd.exe", string.Format("/c 
\"{0}\"", UninstallString));
+SilentProcess p = 
SilentProcess.StartConsoleProcessSilently("cmd.exe", string.Format("/S /C 
\"{0}\"", UninstallString));
 p.WaitForExit();
 Thread.Sleep(1000);
 }
diff --git a/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs 
b/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs
index 5a358f9..c37189b 100644
--- a/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs
+++ b/edkrepo_installer/EdkRepoInstaller/InstallWorker.cs
@@ -672,7 +672,7 @@ namespace TianoCore.EdkRepoInstaller
 {
 InstallLogger.Log(string.Format("Uninstalling 
{0}...", UninstallerPath));
 string UninstallString = string.Format("\"{0}\" 
/Uninstall /Passive", UninstallerPath);
-SilentProcess p = 
SilentProcess.StartConsoleProcessSilently("cmd.exe", string.Format("/c 
\"{0}\"", UninstallString));
+SilentProcess p = 
SilentProcess.StartConsoleProcessSilently("cmd.exe", string.Format("/S /C 
\"{0}\"", UninstallString));
 p.WaitForExit();
 Thread.Sleep(4000);
 }
-- 
2.24.0.windows.2


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Re: [edk2-devel] [edk2-platforms][PATCH 7/8] Platform/ARM/SgiPkg: add ACPI tables for RD-Daniel Config-XLR

[Thomas Abraham]

On Thu, Mar 12, 2020 at 8:06 PM Aditya Angadi  wrote:
>
> RD-Daniel Config-XLR is a platform in which four identical chips are connected
> via a high speed CCIX link. Add Madt and Dsdt tables for the same.
>
> Signed-off-by: Aditya Angadi 

Reviewed-by: Thomas Abraham 

> ---
>  .../SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl | 125 +++
>  .../AcpiTables/RdDanielCfgXlr/Madt.aslc   | 150 ++
>  .../AcpiTables/RdDanielCfgXlrAcpiTables.inf   |  63 
>  Platform/ARM/SgiPkg/SgiPlatform.dec   |   1 +
>  Platform/ARM/SgiPkg/SgiPlatform.dsc   |   1 +
>  Platform/ARM/SgiPkg/SgiPlatform.fdf   |   1 +
>  6 files changed, 341 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
>  create mode 100644 
> Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlrAcpiTables.inf
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl 
> b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
> new file mode 100644
> index 00..23ada55ec4
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Dsdt.asl
> @@ -0,0 +1,125 @@
> +/** @file
> +*  Differentiated System Description Table Fields (DSDT)
> +*
> +*  Copyright (c) 2020, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made 
> available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
> IMPLIED.
> +*
> +**/
> +
> +#include "SgiPlatform.h"
> +#include "SgiAcpiHeader.h"
> +
> +DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
> + EFI_ACPI_ARM_OEM_REVISION) {
> +  Scope (_SB) {
> +
> +Device (CP00) { // Zeus core 0
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 0)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP01) { // Zeus core 1
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 1)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP02) { // Zeus core 2
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 2)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP03) { // Zeus core 3
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 3)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP04) { // Zeus core 4
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 4)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP05) { // Zeus core 5
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 5)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP06) { // Zeus core 6
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 6)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP07) { // Zeus core 7
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 7)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP08) { // Zeus core 8
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 8)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP09) { // Zeus core 9
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 9)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP10) { // Zeus core 10
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 10)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP11) { // Zeus core 11
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 11)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP12) { // Zeus core 12
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 12)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP13) { // Zeus core 13
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 13)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP14) { // Zeus core 14
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 14)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP15) { // Zeus core 15
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 15)
> +  Name (_STA, 0xF)
> +}
> +
> +Device (CP16) { // Zeus core 16
> +  Name (_HID, "ACPI0007")
> +  Name (_UID, 16)
> +  Name (_STA, 0xF)
> +}
> +  } // Scope(_SB)
> +}
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc 
> b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
> new file mode 100644
> index 00..e3784b55f2
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgXlr/Madt.aslc
> @@ -0,0 +1,150 @@
> +/** @file
> +*  Multiple APIC Description Table (MADT)
> +*
> +*  Copyright (c) 2020, ARM Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials are licensed and made 
> available
> +*  under the terms and conditions of the BSD License which accompanies this
> +*  distribution.  The full text of the license may be found at
> +*  

Re: [edk2-devel] [edk2-platforms][PATCH 6/8] Platform/ARM/Sgi: Add initial support for RD-Daniel Config-M platform

[Thomas Abraham]

On Thu, Mar 12, 2020 at 8:06 PM Aditya Angadi  wrote:
>
> Add information in the SGI platform descriptor HOB to pick the correct
> ACPI table to install for RD-Daniel Config-M
>
> Signed-off-by: Aditya Angadi 

Reviewed-by: Thomas Abraham 

> ---
>  .../SgiPkg/Drivers/PlatformDxe/PlatformDxe.c  |  5 +++
>  .../Drivers/PlatformDxe/PlatformDxe.inf   |  1 +
>  Platform/ARM/SgiPkg/Include/SgiPlatform.h |  4 ++
>  Platform/ARM/SgiPkg/RdDaniel.dsc  | 38 +++
>  4 files changed, 48 insertions(+)
>  create mode 100644 Platform/ARM/SgiPkg/RdDaniel.dsc
>
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c 
> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> index 387397d745..7e0de765f7 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
> @@ -46,6 +46,11 @@ STATIC SGI_PLATFORM_ACPI_TABLE_GUID_LOOKUP 
> AcpiTableGuidLookup[] = {
>RD_E1_EDGE_CONF_ID,
>MULTI_CHIP_MODE_DISABLED,
>),
> +  ACPI_GUID_LOOKUP (
> +  RD_DANIEL_PART_NUM,
> +  RD_DANIEL_CFGM_CONF_ID,
> +  MULTI_CHIP_MODE_DISABLED,
> +  ),
>  };
>
>  VOID
> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf 
> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> index 741dcc75ed..82569820b7 100644
> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
> @@ -34,6 +34,7 @@
>gRdN1EdgeAcpiTablesFileGuid
>gRdN1EdgeX2AcpiTablesFileGuid
>gRdE1EdgeAcpiTablesFileGuid
> +  gRdDanielCfgMAcpiTablesFileGuid
>
>  [FeaturePcd]
>gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported
> diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
> b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> index d87fb2b540..b6a427b8b6 100644
> --- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> @@ -70,6 +70,10 @@
>  #define RD_N1_EDGE_CONF_ID0x1
>  #define RD_E1_EDGE_CONF_ID0x2
>
> +//RDDANIEL Platform Identification values
> +#define RD_DANIEL_PART_NUM0x78A
> +#define RD_DANIEL_CFGM_CONF_ID0x1
> +
>  #define SGI_CONFIG_MASK   0x0F
>  #define SGI_CONFIG_SHIFT  0x1C
>  #define SGI_PART_NUM_MASK 0xFFF
> diff --git a/Platform/ARM/SgiPkg/RdDaniel.dsc 
> b/Platform/ARM/SgiPkg/RdDaniel.dsc
> new file mode 100644
> index 00..09607004ed
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/RdDaniel.dsc
> @@ -0,0 +1,38 @@
> +#
> +#  Copyright (c) 2020, ARM Limited. All rights reserved.
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> +
> +[Defines]
> +  PLATFORM_NAME  = ArmSgi
> +  PLATFORM_GUID  = d301ac4e-0828-4cef-b754-34ca9b6781b5
> +  PLATFORM_VERSION   = 0.1
> +  DSC_SPECIFICATION  = 0x0001001B
> +  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
> +  SUPPORTED_ARCHITECTURES= AARCH64|ARM
> +  BUILD_TARGETS  = NOOPT|DEBUG|RELEASE
> +  SKUID_IDENTIFIER   = DEFAULT
> +  FLASH_DEFINITION   = Platform/ARM/SgiPkg/SgiPlatform.fdf
> +  BUILD_NUMBER   = 1
> +
> +# include common definitions from SgiPlatform.dsc
> +!include Platform/ARM/SgiPkg/SgiPlatform.dsc
> +
> +
> +#
> +# Pcd Section - list of all EDK II PCD Entries defined by this Platform
> +#
> +
> +
> +[PcdsFixedAtBuild.common]
> +  # GIC Base Addresses
> +  gArmTokenSpaceGuid.PcdGicDistributorBase|0x3000
> +  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x3014
> +  gArmSgiTokenSpaceGuid.PcdGicSize|0x20
> +
> --
> 2.17.1
>
>
> 
>

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Re: [edk2-devel] [edk2-platforms][PATCH 4/8] Platform/ARM/SgiPkg: remove PcdCoreCount and PcdClusterCount

[Thomas Abraham]

On Thu, Mar 12, 2020 at 8:06 PM Aditya Angadi  wrote:
>
> The number of CPUs depend on the SGI/RD platform. So instead of
> defining a Fixed PCD to specify the value of core and cluster count,
> let each platform define these values.
>
> Signed-off-by: Aditya Angadi 

Reviewed-by: Thomas Abraham 

> ---
>  Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc|  7 ++-
>  .../ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf |  2 --
>  Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc|  7 ---
>  .../ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf |  2 --
>  Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc  | 12 ++--
>  .../ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf   |  2 --
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc  |  9 +
>  Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf  |  4 +---
>  .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf   |  3 ---
>  Platform/ARM/SgiPkg/SgiPlatform.dsc  |  4 
>  10 files changed, 22 insertions(+), 30 deletions(-)
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc 
> b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
> index 9872549285..a9540f2e03 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
> @@ -14,12 +14,17 @@
>  #include 
>  #include 
>
> +#define CLUSTER_COUNT 2
> +#define CORES_PER_CLUSTER 8
> +#define THREADS_PER_CORE  2
> +#define CORE_COUNT(CLUSTER_COUNT * CORES_PER_CLUSTER * 
> THREADS_PER_CORE)
> +
>  // Multiple APIC Description Table
>  #pragma pack (1)
>
>  typedef struct {
>EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
> -  EFI_ACPI_6_2_GIC_STRUCTUREGicInterfaces[32];
> +  EFI_ACPI_6_2_GIC_STRUCTURE
> GicInterfaces[CORE_COUNT];
>EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTUREGicDistributor;
>EFI_ACPI_6_2_GICR_STRUCTURE   GicRedistributor;
>EFI_ACPI_6_2_GIC_ITS_STRUCTUREGicIts;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf 
> b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
> index b08d7c2df5..742ca9e683 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
> @@ -34,8 +34,6 @@
>Platform/ARM/SgiPkg/SgiPlatform.dec
>
>  [FixedPcd]
> -  gArmPlatformTokenSpaceGuid.PcdCoreCount
> -  gArmPlatformTokenSpaceGuid.PcdClusterCount
>gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
>gArmPlatformTokenSpaceGuid.PL011UartInterrupt
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc 
> b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
> index 05eb78c561..d8ec0ce421 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc
> @@ -14,15 +14,16 @@
>  #include 
>  #include 
>
> -#define CORE_CNT   (FixedPcdGet32 (PcdClusterCount) * \
> -FixedPcdGet32 (PcdCoreCount))
> +#define CLUSTER_COUNT 2
> +#define CORES_PER_CLUSTER 4
> +#define CORE_COUNT(CLUSTER_COUNT * CORES_PER_CLUSTER)
>
>  // Multiple APIC Description Table
>  #pragma pack (1)
>
>  typedef struct {
>EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
> -  EFI_ACPI_6_2_GIC_STRUCTURE
> GicInterfaces[CORE_CNT];
> +  EFI_ACPI_6_2_GIC_STRUCTURE
> GicInterfaces[CORE_COUNT];
>EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTUREGicDistributor;
>EFI_ACPI_6_2_GICR_STRUCTURE   GicRedistributor;
>EFI_ACPI_6_2_GIC_ITS_STRUCTUREGicIts;
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf 
> b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
> index 61b07bffcc..206479f942 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
> @@ -34,8 +34,6 @@
>Platform/ARM/SgiPkg/SgiPlatform.dec
>
>  [FixedPcd]
> -  gArmPlatformTokenSpaceGuid.PcdCoreCount
> -  gArmPlatformTokenSpaceGuid.PcdClusterCount
>gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
>gArmPlatformTokenSpaceGuid.PL011UartInterrupt
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc 
> b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
> index 47368931e3..add9724374 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc
> @@ -14,19 +14,19 @@
>  #include 
>  #include 
>
> -#define CORE_CNT   (FixedPcdGet32 (PcdClusterCount) * \
> -FixedPcdGet32 (PcdCoreCount))
> -
> -#define CHIP_CNT   2
> +#define CLUSTER_COUNT 2
> +#define CORES_PER_CLUSTER 4
> +#define CORE_COUNT  

Re: [edk2-devel] [edk2-platforms][PATCH 3/8] Platform/ARM/SgiPkg: move common platform description to SSDT

[Thomas Abraham]

On Thu, Mar 12, 2020 at 8:05 PM Aditya Angadi  wrote:
>
> Move common platform description entries in platfrom specific DSDT to
> a SSDT that can be reused on all SGI/RD platforms.
>
> Signed-off-by: Aditya Angadi 

Reviewed-by: Thomas Abraham 

> ---
>  .../ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl   | 70 +--
>  .../SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf  |  3 +-
>  .../ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl   | 69 +-
>  .../SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf  |  3 +-
>  .../AcpiTables/RdN1EdgeX2AcpiTables.inf   |  1 +
>  Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl| 90 +++
>  6 files changed, 97 insertions(+), 139 deletions(-)
>  create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl 
> b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
> index 5583e61097..d66c7cbf41 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
> @@ -1,7 +1,7 @@
>  /** @file
>  *  Differentiated System Description Table Fields (DSDT)
>  *
> -*  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +*  Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -208,73 +208,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", 
> "ARMSGI",
>Name (_STA, 0xF)
>  }
>
> -// UART PL011
> -Device (COM0) {
> -  Name (_HID, "ARMH0011")
> -  Name (_CID, "ARMH0011")
> -  Name (_UID, Zero)
> -  Name (_STA, 0xF)
> -  Name (_CRS, ResourceTemplate() {
> -Memory32Fixed (
> -  ReadWrite,
> -  FixedPcdGet64 (PcdSerialDbgRegisterBase),
> -  0x1000
> -)
> -Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }
> -  })
> -}
> -
> -// SMSC 91C111
> -Device (ETH0) {
> -  Name (_HID, "LNRO0003")
> -  Name (_UID, Zero)
> -  Name (_STA, 0xF)
> -  Name (_CRS, ResourceTemplate() {
> -Memory32Fixed (ReadWrite, 0x1800, 0x1000)
> -Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }
> -  })
> -  Name (_DSD, Package() {
> -ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -Package () {
> -  Package (2) {"reg-io-width", 4 },
> -}
> -  })
> -}
> -
> -// VIRTIO DISK
> -Device (VR00) {
> -  Name (_HID, "LNRO0005")
> -  Name (_UID, 0)
> -  Name (_CCA, 1)// mark the device coherent
> -
> -  Name (_CRS, ResourceTemplate() {
> -Memory32Fixed (
> -  ReadWrite,
> -  FixedPcdGet32 (PcdVirtioBlkBaseAddress),
> -  FixedPcdGet32 (PcdVirtioBlkSize)
> -)
> -Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
> -  FixedPcdGet32 (PcdVirtioBlkInterrupt)
> -}
> -  })
> -}
> -
> -// VIRTIO NET
> -Device (VR01) {
> -  Name (_HID, "LNRO0005")
> -  Name (_UID, 1)
> -  Name (_CCA, 1)// mark the device coherent
> -
> -  Name (_CRS, ResourceTemplate() {
> -Memory32Fixed (
> -  ReadWrite,
> -  FixedPcdGet32 (PcdVirtioNetBaseAddress),
> -  FixedPcdGet32 (PcdVirtioNetSize)
> -)
> -Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
> -  FixedPcdGet32 (PcdVirtioNetInterrupt)
> -}
> -  })
> -}
>} // Scope(_SB)
>  }
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf 
> b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
> index 3a4d4e7b95..b08d7c2df5 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
> @@ -1,7 +1,7 @@
>  ## @file
>  #  ACPI table data and ASL sources required to boot the platform.
>  #
> -#  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +#  Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
>  #
>  #  SPDX-License-Identifier: BSD-2-Clause-Patent
>  #
> @@ -16,6 +16,7 @@
>
>  [Sources]
>Dbg2.aslc
> +  SsdtRos.asl
>Fadt.aslc
>Gtdt.aslc
>Iort.aslc
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl 
> b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
> index 45316d5005..cb05eed358 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
> @@ -1,7 +1,7 @@
>  /** @file
>  *  Differentiated System Description Table Fields (DSDT)
>  *
> -*  Copyright (c) 2018, ARM Ltd. All rights reserved.
> +*  Copyright (c) 2018-2020, ARM Ltd. All rights reserved.
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -62,72 +62,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", 
> "ARMSGI",
>Name (_STA, 0xF)
>  }
>
> -// UART PL011
> -Device (COM0) {
> -  Name (_HID, "ARMH0011")
> -  Name (_CID, "ARMH0011")
> -  Name (_UID, Zero)
> -  Name (_STA, 0xF)
> -

Re: [edk2-devel] [edk2-staging/EdkRepo] [PATCH] EdkRepo: Initial commit of the Create Pin command

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: Desimone, Ashley E  
Sent: Wednesday, March 11, 2020 3:33 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja 
; Bjorge, Erik C 
Subject: [edk2-staging/EdkRepo] [PATCH] EdkRepo: Initial commit of the Create 
Pin command

Add edkrepo create-pin command allowing users to create a pin file to record 
their workspace status at a specific point in time.

Signed-off-by: Ashley E Desimone 
Cc: Nate DeSimone 
Cc: Puja Pandya 
Cc: Erik Bjorge 
---
 edkrepo/commands/arguments/create_pin_args.py |  21 +
 edkrepo/commands/create_pin_command.py| 127 ++
 edkrepo/common/edkrepo_exception.py   |   6 +-
 edkrepo/common/humble.py  |  17 +++-
 4 files changed, 169 insertions(+), 2 deletions(-)  create mode 100644 
edkrepo/commands/arguments/create_pin_args.py
 create mode 100644 edkrepo/commands/create_pin_command.py

diff --git a/edkrepo/commands/arguments/create_pin_args.py 
b/edkrepo/commands/arguments/create_pin_args.py
new file mode 100644
index 000..92958ef
--- /dev/null
+++ b/edkrepo/commands/arguments/create_pin_args.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+#
+## @file
+# create_pin_command.py
+#
+# Copyright (c) 2020, Intel Corporation. All rights reserved. # 
+SPDX-License-Identifier: BSD-2-Clause-Patent #
+
+''' Contains the help and description strings for arguments in the 
+create pin command meta data.
+'''
+
+COMMAND_DESCRIPTION = 'Creates a PIN file based on the current workspace state'
+NAME_HELP = ('The name of the PIN file. Extension must be .xml. File paths are 
'
+ 'supported only if the --push option is not used.') 
+DESCRIPTION_HELP = 'A short summary of the PIN file contents. Must be 
contained in ""'
+PUSH_HELP = ('Automatically commit and push the PIN file to the global 
manifest '
+ 'repository at the location specified by the Pin-Path field in '
+ 'the project manifest file.')
+
diff --git a/edkrepo/commands/create_pin_command.py 
b/edkrepo/commands/create_pin_command.py
new file mode 100644
index 000..df3fccc
--- /dev/null
+++ b/edkrepo/commands/create_pin_command.py
@@ -0,0 +1,127 @@
+#!/usr/bin/env python3
+#
+## @file
+# create_pin_command.py
+#
+# Copyright (c) 2017 - 2020, Intel Corporation. All rights 
+reserved. # SPDX-License-Identifier: BSD-2-Clause-Patent #
+
+import os
+from collections import namedtuple
+
+from git import Repo
+
+from edkrepo.commands.edkrepo_command import EdkrepoCommand import 
+edkrepo.commands.arguments.create_pin_args as arguments from 
+edkrepo.common.common_repo_functions import pull_latest_manifest_repo 
+from edkrepo.common.edkrepo_exception import 
+EdkrepoManifestInvalidException, EdkrepoInvalidParametersException from 
+edkrepo.common.edkrepo_exception import 
+EdkrepoWorkspaceCorruptException from edkrepo.common.humble import 
+WRITING_PIN_FILE, GENERATING_PIN_DATA, GENERATING_REPO_DATA, BRANCH, 
+COMMIT from edkrepo.common.humble import COMMIT_MESSAGE, 
+PIN_PATH_NOT_PRESENT, PIN_FILE_ALREADY_EXISTS, PATH_AND_FILEPATH_USED 
+from edkrepo.common.humble import MISSING_REPO from 
+edkrepo.config.config_factory import get_workspace_manifest, 
+get_workspace_path from edkrepo_manifest_parser.edk_manifest import 
+ManifestXml
+
+
+class CreatePinCommand(EdkrepoCommand):
+def __init__(self):
+super().__init__()
+
+def get_metadata(self):
+metadata = {}
+metadata['name'] = 'create-pin'
+metadata['help-text'] = arguments.COMMAND_DESCRIPTION
+metadata['alias'] = 'crp'
+args = []
+metadata['arguments'] = args
+args.append({'name' : 'PinFileName',
+ 'positional' : True,
+ 'position' : 0,
+ 'required' : True,
+ 'help-text' : arguments.NAME_HELP})
+args.append({'name' : 'Description',
+ 'positional' : True,
+ 'position' : 1,
+ 'required' : True,
+ 'help-text' : arguments.DESCRIPTION_HELP})
+args.append({'name': 'push',
+ 'positional': False,
+ 'required': False,
+ 'help-text': arguments.PUSH_HELP})
+return metadata
+
+def run_command(self, args, config):
+# Check if --push and file path provided
+if args.push and os.path.dirname(args.PinFileName):
+raise 
+ EdkrepoInvalidParametersException(PATH_AND_FILEPATH_USED)
+
+pull_latest_manifest_repo(args, config)
+workspace_path = get_workspace_path()
+manifest = get_workspace_manifest()
+
+# If the push flag is enabled use general_config.pin_path to determine 
global manifest relative location to save
+# pin file to.
+if args.push and manifest.general_config.pin_path is not None:
+pin_dir = 

Re: [edk2-devel] [edk2-platforms][PATCH 2/8] Platform/ARM/SgiPkg: move the GIC related ACPI helper macros

[Thomas Abraham]

On Thu, Mar 12, 2020 at 8:05 PM Aditya Angadi  wrote:
>
> Move the ACPI helper macros defines related to GIC structure,
> distributor, redistributor and ITS to SgiAcpiHeader.h as these are
> common across ARM SGI/RD platforms.
>
> Signed-off-by: Aditya Angadi 

Reviewed-by: Thomas Abraham 

> ---
>  .../ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc  | 68 +-
>  .../ARM/SgiPkg/AcpiTables/RdN1Edge/Madt.aslc  | 68 +-
>  .../SgiPkg/AcpiTables/RdN1EdgeX2/Madt.aslc| 57 +--
>  Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h   | 70 ++-
>  4 files changed, 72 insertions(+), 191 deletions(-)
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc 
> b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
> index 48e7a61478..9872549285 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Madt.aslc
> @@ -1,7 +1,7 @@
>  /** @file
>  *  Multiple APIC Description Table (MADT)
>  *
> -*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*  Copyright (c) 2018-2020, ARM Limited. All rights reserved.
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -14,72 +14,6 @@
>  #include 
>  #include 
>
> -// EFI_ACPI_6_2_GIC_STRUCTURE
> -#define EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,
>   \
> -  PmuIrq, GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) 
>   \
> -  {  
>   \
> -EFI_ACPI_6_2_GIC, /* Type */ 
>   \
> -sizeof (EFI_ACPI_6_2_GIC_STRUCTURE),  /* Length */   
>   \
> -EFI_ACPI_RESERVED_WORD,   /* Reserved */ 
>   \
> -GicId,/* CPUInterfaceNumber */   
>   \
> -AcpiCpuUid,   /* AcpiProcessorUid */ 
>   \
> -Flags,/* Flags */
>   \
> -0,/* ParkingProtocolVersion */   
>   \
> -PmuIrq,   /* PerformanceInterruptGsiv */ 
>   \
> -0,/* ParkedAddress */
>   \
> -GicBase,  /* PhysicalBaseAddress */  
>   \
> -GicVBase, /* GICV */ 
>   \
> -GicHBase, /* GICH */ 
>   \
> -GsivId,   /* VGICMaintenanceInterrupt */ 
>   \
> -GicRBase, /* GICRBaseAddress */  
>   \
> -Mpidr,/* MPIDR */
>   \
> -Efficiency,   /* ProcessorPowerEfficiencyClass 
> */  \
> -{
>   \
> -  EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ 
>   \
> -  EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ 
>   \
> -  EFI_ACPI_RESERVED_BYTE  /* Reserved2[2] */ 
>   \
> -}
>   \
> -  }
> -
> -// EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE
> -#define EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase,  
>   \
> -  GicDistVector, GicVersion) 
>   \
> -  {  
>   \
> -EFI_ACPI_6_2_GICD,/* Type */ 
>   \
> -sizeof (EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE), 
>   \
> -EFI_ACPI_RESERVED_WORD,   /* Reserved1 */
>   \
> -GicDistHwId,  /* GicId */
>   \
> -GicDistBase,  /* PhysicalBaseAddress */  
>   \
> -GicDistVector,/* SystemVectorBase */ 
>   \
> -GicVersion,   /* GicVersion */   
>   \
> -{
>   \
> -  EFI_ACPI_RESERVED_BYTE, /* Reserved2[0] */ 
>   \
> -  EFI_ACPI_RESERVED_BYTE, /* Reserved2[1] */ 
>   \
> -  EFI_ACPI_RESERVED_BYTE  /* Reserved2[2] */ 
>   \
> -}
>   \
> -  }
> -
> -// EFI_ACPI_6_2_GICR_STRUCTURE
> -#define EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, 
> RedisDiscLength)  \
> -  {  
>   \
> -EFI_ACPI_6_2_GICR,/* Type */

Re: [edk2-devel] [edk2-platforms][PATCH 1/8] Platform/ARM/SgiPkg: Create individual Platform Description File

[Thomas Abraham]

On Thu, Mar 12, 2020 at 8:05 PM Aditya Angadi  wrote:
>
> From: Vijayenthiran Subramaniam 
>
> In preparation for adding support for Reference Design (RD) platforms
> that have different base addresses for GIC distributor or redistributor,
> create individual platform description files for all SGI/RD platforms
> and move GIC related base addresses from the common SGI/RD platform
> description file to individual platform description files.
> The existing platform description is then included by individual
> platform description files.
>
> Signed-off-by: Vijayenthiran Subramaniam 

Reviewed-by: Thomas Abraham 

> ---
>  Platform/ARM/SgiPkg/Include/SgiPlatform.h |  7 +---
>  .../Library/PlatformLib/PlatformLib.inf   |  3 +-
>  .../Library/PlatformLib/PlatformLibMem.c  |  8 ++--
>  Platform/ARM/SgiPkg/RdE1Edge.dsc  | 37 +++
>  Platform/ARM/SgiPkg/RdN1Edge.dsc  | 37 +++
>  Platform/ARM/SgiPkg/Sgi575.dsc| 37 +++
>  Platform/ARM/SgiPkg/SgiPlatform.dec   |  5 ++-
>  Platform/ARM/SgiPkg/SgiPlatform.dsc   | 25 +
>  8 files changed, 124 insertions(+), 35 deletions(-)
>  create mode 100644 Platform/ARM/SgiPkg/RdE1Edge.dsc
>  create mode 100644 Platform/ARM/SgiPkg/RdN1Edge.dsc
>  create mode 100644 Platform/ARM/SgiPkg/Sgi575.dsc
>
> diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
> b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> index e36a412155..d87fb2b540 100644
> --- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
> @@ -1,6 +1,6 @@
>  /** @file
>  *
> -*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*  Copyright (c) 2018-2020, ARM Limited. All rights reserved.
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -45,11 +45,6 @@
>  #define SGI_SUBSYS_GENERIC_WDOG_BASE  0x2A44
>  #define SGI_SUBSYS_GENERIC_WDOG_SZSIZE_128KB
>
> -// Sub System Peripherals - GIC
> -#define SGI_SUBSYS_GENERIC_GIC_BASE   0x3000
> -#define SGI_SUBSYS_GENERIC_GICR_BASE  0x300C
> -#define SGI_SUBSYS_GENERIC_GIC_SZ SIZE_1MB
> -
>  // Expansion AXI - Platform Peripherals - HDLCD1
>  #define SGI_EXP_PLAT_PERIPH_HDLCD1_BASE   0x7FF6
>  #define SGI_EXP_PLAT_PERIPH_HDLCD1_SZ SIZE_64KB
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf 
> b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
> index 3db70e900d..a918afef5f 100644
> --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
> @@ -1,5 +1,5 @@
>  #
> -#  Copyright (c) 2018, ARM Limited. All rights reserved.
> +#  Copyright (c) 2018-2020, ARM Limited. All rights reserved.
>  #
>  #  SPDX-License-Identifier: BSD-2-Clause-Patent
>  #
> @@ -42,6 +42,7 @@
>
>gArmSgiTokenSpaceGuid.PcdDramBlock2Base
>gArmSgiTokenSpaceGuid.PcdDramBlock2Size
> +  gArmSgiTokenSpaceGuid.PcdGicSize
>
>gArmTokenSpaceGuid.PcdSystemMemoryBase
>gArmTokenSpaceGuid.PcdSystemMemorySize
> diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c 
> b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> index 845aeaf4dd..8d0ad4ec9c 100644
> --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
> @@ -1,6 +1,6 @@
>  /** @file
>  *
> -*  Copyright (c) 2018, ARM Limited. All rights reserved.
> +*  Copyright (c) 2018-2020, ARM Limited. All rights reserved.
>  *
>  *  SPDX-License-Identifier: BSD-2-Clause-Patent
>  *
> @@ -93,9 +93,9 @@ ArmPlatformGetVirtualMemoryMap (
>VirtualMemoryTable[Index].Attributes  = 
> ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>
>// Sub System Peripherals - GIC-600
> -  VirtualMemoryTable[++Index].PhysicalBase  = SGI_SUBSYS_GENERIC_GIC_BASE;
> -  VirtualMemoryTable[Index].VirtualBase = SGI_SUBSYS_GENERIC_GIC_BASE;
> -  VirtualMemoryTable[Index].Length  = SGI_SUBSYS_GENERIC_GIC_SZ;
> +  VirtualMemoryTable[++Index].PhysicalBase  = 
> FixedPcdGet64(PcdGicDistributorBase);
> +  VirtualMemoryTable[Index].VirtualBase = 
> FixedPcdGet64(PcdGicDistributorBase);
> +  VirtualMemoryTable[Index].Length  = FixedPcdGet64(PcdGicSize);
>VirtualMemoryTable[Index].Attributes  = 
> ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>
>// Expansion AXI - Platform Peripherals - HDLCD1
> diff --git a/Platform/ARM/SgiPkg/RdE1Edge.dsc 
> b/Platform/ARM/SgiPkg/RdE1Edge.dsc
> new file mode 100644
> index 00..082cbb0157
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/RdE1Edge.dsc
> @@ -0,0 +1,37 @@
> +#
> +#  Copyright (c) 2020, ARM Limited. All rights reserved.
> +#
> +#  SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +
> +
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> 

[edk2-devel] [PATCH v2 0/3] Add RpmcLib and VariableKeyLib

[Wang, Jian J]

> v2: change CounterIndex to CounterId in RpmcLib prototype.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2594
Patch branch: 
https://github.com/jwang36/edk2/tree/bz2594-part1-common-interfaces-between-platform-and-edk2-v2

Cc: Jiewen Yao 
Cc: Chao Zhang 
Cc: Nishant C Mistry 

Jian J Wang (3):
  SecurityPkg: add RpmcLib and VariableKeyLib public headers
  SecurityPkg: add null version of RpmcLib
  SecurityPkg: add null version of VariableKeyLib

 SecurityPkg/Include/Library/RpmcLib.h | 50 ++
 SecurityPkg/Include/Library/VariableKeyLib.h  | 59 
 SecurityPkg/Library/RpmcLibNull/RpmcLibNull.c | 55 +++
 .../Library/RpmcLibNull/RpmcLibNull.inf   | 33 +
 .../VariableKeyLibNull/VariableKeyLibNull.c   | 67 +++
 .../VariableKeyLibNull/VariableKeyLibNull.inf | 33 +
 SecurityPkg/SecurityPkg.dec   |  8 +++
 SecurityPkg/SecurityPkg.dsc   |  8 +++
 8 files changed, 313 insertions(+)
 create mode 100644 SecurityPkg/Include/Library/RpmcLib.h
 create mode 100644 SecurityPkg/Include/Library/VariableKeyLib.h
 create mode 100644 SecurityPkg/Library/RpmcLibNull/RpmcLibNull.c
 create mode 100644 SecurityPkg/Library/RpmcLibNull/RpmcLibNull.inf
 create mode 100644 SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.c
 create mode 100644 
SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf

-- 
2.24.0.windows.2


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[edk2-devel] [PATCH v2 3/3] SecurityPkg: add null version of VariableKeyLib

[Wang, Jian J]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2594

Add null version of VariableKeyLib instance. The full version should be
provided by platforms which supports key generator.

Cc: Jiewen Yao 
Cc: Chao Zhang 
Cc: Nishant C Mistry 
Signed-off-by: Jian J Wang 
---
 .../VariableKeyLibNull/VariableKeyLibNull.c   | 67 +++
 .../VariableKeyLibNull/VariableKeyLibNull.inf | 33 +
 SecurityPkg/SecurityPkg.dsc   |  2 +
 3 files changed, 102 insertions(+)
 create mode 100644 SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.c
 create mode 100644 
SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf

diff --git a/SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.c 
b/SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.c
new file mode 100644
index 00..2ef6a68ea0
--- /dev/null
+++ b/SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.c
@@ -0,0 +1,67 @@
+/** @file
+  Null version of VariableKeyLib for build purpose. Don't use it in real 
product.
+
+Copyright (c) 2020, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include 
+#include 
+
+/**
+  Retrieves the variable root key.
+
+  @param[out] VariableRootKey A pointer to pointer for the 
variable root key buffer.
+  @param[in,out]  VariableRootKeySize The size in bytes of the variable 
root key.
+
+  @retval   EFI_SUCCESS The variable root key was returned.
+  @retval   EFI_DEVICE_ERRORAn error occurred while attempting to 
get the variable root key.
+  @retval   EFI_ACCESS_DENIED   The function was invoked after locking 
the key interface.
+  @retval   EFI_UNSUPPORTED The variable root key is not supported 
in the current boot configuration.
+**/
+EFI_STATUS
+EFIAPI
+GetVariableRootKey (
+  OUT VOID**VariableRootKey,
+  IN  OUT UINTN   *VariableRootKeySize
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Regenerates the variable root key.
+
+  @retval   EFI_SUCCESS The variable root key was regenerated 
successfully.
+  @retval   EFI_DEVICE_ERRORAn error occurred while attempting to 
regenerate the root key.
+  @retval   EFI_ACCESS_DENIED   The function was invoked after locking 
the key interface.
+  @retval   EFI_UNSUPPORTED Key regeneration is not supported in 
the current boot configuration.
+**/
+EFI_STATUS
+EFIAPI
+RegenerateKey (
+  VOID
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Locks the regenerate key interface.
+
+  @retval   EFI_SUCCESS The key interface was locked 
successfully.
+  @retval   EFI_UNSUPPORTED Locking the key interface is not 
supported in the current boot configuration.
+  @retval   Others  An error occurred while attempting to 
lock the key interface.
+**/
+EFI_STATUS
+EFIAPI
+LockKeyInterface (
+  VOID
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
diff --git a/SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf 
b/SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf
new file mode 100644
index 00..ea74e38cf9
--- /dev/null
+++ b/SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf
@@ -0,0 +1,33 @@
+## @file
+#  Provides Null version of VariableKeyLib for build only.
+#
+#  Copyright (c) 2020, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010029
+  BASE_NAME  = VariableKeyLibNull
+  FILE_GUID  = 2B640ED8-1E6A-4516-9F1D-25910E59BC4A
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = VariableKeyLib
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = IA32 X64 Arm AArch64
+#
+
+[Sources]
+  VariableKeyLibNull.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  SecurityPkg/SecurityPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+
diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc
index 97e0e7ed6e..4b85f77b02 100644
--- a/SecurityPkg/SecurityPkg.dsc
+++ b/SecurityPkg/SecurityPkg.dsc
@@ -64,6 +64,7 @@
   TcgStorageCoreLib|SecurityPkg/Library/TcgStorageCoreLib/TcgStorageCoreLib.inf
   TcgStorageOpalLib|SecurityPkg/Library/TcgStorageOpalLib/TcgStorageOpalLib.inf
   
ResetSystemLib|MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSystemLibNull.inf
+  VariableKeyLib|SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf
   RpmcLib|SecurityPkg/Library/RpmcLibNull/RpmcLibNull.inf
 
 [LibraryClasses.ARM]
@@ -221,6 +222,7 @@
   #
   # Variable Confidentiality & Integrity
   #
+  SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf
   SecurityPkg/Library/RpmcLibNull/RpmcLibNull.inf
 
   #
-- 
2.24.0.windows.2


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Re: [edk2-devel] [patch v2] OvmfPkg: Fix build failure with VS2015 tool chain

[Liming Gao]

I take BZ 2582. I will update the commit message and merge this change. 

Thanks
Liming
> -Original Message-
> From: Laszlo Ersek 
> Sent: Thursday, March 12, 2020 3:47 PM
> To: Gao, Liming ; devel@edk2.groups.io
> Cc: Ard Biesheuvel ; michael.kuba...@microsoft.com
> Subject: Re: [patch v2] OvmfPkg: Fix build failure with VS2015 tool chain
> 
> Hello Liming,
> 
> (adding Michael)
> 
> On 03/12/20 05:30, Liming Gao wrote:
> > warning C4244: '=': conversion from 'UINTN' to 'UINT32', possible loss of 
> > data
> > With this fix, OvmfIa32, OvmfX64 and OvmfIa32X64 can pass build.
> >
> > Cc: Laszlo Ersek 
> > Cc: Ard Biesheuvel 
> > Signed-off-by: Liming Gao 
> > ---
> >  OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c
> b/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c
> > index 1868c9fcaf..1f02da2503 100644
> > --- a/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c
> > +++ b/OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.c
> > @@ -384,7 +384,7 @@ QemuLoadKernelImage (
> >  //
> >  // Drop the terminating NUL, convert to UTF-16.
> >  //
> > -KernelLoadedImage->LoadOptionsSize = (CommandLineSize - 1) * 2;
> > +KernelLoadedImage->LoadOptionsSize = (UINT32) ((CommandLineSize - 1) * 
> > 2);
> >}
> >
> >QemuFwCfgSelectItem (QemuFwCfgItemInitrdSize);
> >
> 
> This patch seems to be fixing the pre-existent TianoCore ticket
> 
> https://bugzilla.tianocore.org/show_bug.cgi?id=2582
> 
> Can you please coordinate with Michael?
> 
> BTW, I prefer this patch to the one that Michael attached to the ticket
> in .
> 
> So my suggestion is for Liming to reassign the BZ to himself please,
> reference the BZ in the commit message, and then merge this patch.
> 
> Reviewed-by: Laszlo Ersek 
> 
> Thanks,
> Laszlo


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[edk2-devel] [PATCH] IntelSiliconPkg/Include/Library:Add ConfigBlockLib.h

[TinaX Y Chen]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2318

Change reference path of ConfigBlockLib to IntelSiliconPkg for Coffeelake.

Change-Id: I433e0a7a00c0cc15a0986050c203c7ca8aef02a2
Signed-off-by: TinaX Y Chen 
cc: Ray Ni 
cc: Rangasai V Chaganty 
cc: Chasel Chiu 
cc: Ethan Tsao 
---
 Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc 
b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
index 37c77d8f..2f25bdb3 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the Coffee Lake silicon package DSC file.
 #
-# Copyright (c) 2019 Intel Corporation. All rights reserved. 
+# Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved. 
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -147,7 +147,7 @@ gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0
 # Silicon Init Common Library
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
-ConfigBlockLib|ClientSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
+ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
 
PchTraceHubInitLib|ClientSiliconPkg/Library/BasePchTraceHubInitLib/BasePchTraceHubInitLib.inf
 
 [LibraryClasses.IA32]
-- 
2.16.2.windows.1


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[edk2-devel] [PATCH 02/17] OvmfPkg/PvScsiDxe: Install DriverBinding protocol

[Liran Alon]

In order to probe and connect to the PvScsi device we need this
protocol. Currently it does nothing.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c   | 68 +++-
 OvmfPkg/PvScsiDxe/PvScsi.inf |  1 +
 2 files changed, 68 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index a3f704d60d77..bf0c743bad15 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -9,6 +9,65 @@
 
 **/
 
+#include 
+
+//
+// Higher versions will be used before lower, 0x10-0xffef is the version
+// range for IVH (Indie Hardware Vendors)
+//
+#define PVSCSI_BINDING_VERSION  0x10
+
+//
+// Driver Binding
+//
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiDriverBindingSupported (
+  IN EFI_DRIVER_BINDING_PROTOCOL *This,
+  IN EFI_HANDLE  ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath OPTIONAL
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiDriverBindingStart (
+  IN EFI_DRIVER_BINDING_PROTOCOL *This,
+  IN EFI_HANDLE  ControllerHandle,
+  IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath OPTIONAL
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiDriverBindingStop (
+  IN EFI_DRIVER_BINDING_PROTOCOL *This,
+  IN EFI_HANDLE  ControllerHandle,
+  IN UINTN   NumberOfChildren,
+  IN EFI_HANDLE  *ChildHandleBuffer
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_DRIVER_BINDING_PROTOCOL mPvScsiDriverBinding = {
+  ,
+  ,
+  ,
+  PVSCSI_BINDING_VERSION,
+  NULL, // ImageHandle, filled by EfiLibInstallDriverBindingComponentName2()
+  NULL  // DriverBindingHandle, filled as well
+};
+
 //
 // Entry Point
 //
@@ -20,5 +79,12 @@ PvScsiEntryPoint (
   IN EFI_SYSTEM_TABLE *SystemTable
   )
 {
-  return EFI_UNSUPPORTED;
+  return EfiLibInstallDriverBindingComponentName2 (
+   ImageHandle,
+   SystemTable,
+   ,
+   ImageHandle,
+   NULL, // TODO Component name
+   NULL  // TODO Component name
+   );
 }
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.inf b/OvmfPkg/PvScsiDxe/PvScsi.inf
index 093cc0171338..d1d0e963f96d 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.inf
+++ b/OvmfPkg/PvScsiDxe/PvScsi.inf
@@ -25,3 +25,4 @@
 
 [LibraryClasses]
   UefiDriverEntryPoint
+  UefiLib
-- 
2.20.1


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[edk2-devel] [PATCH 08/17] OvmfPkg/PvScsiDxe: Open PciIo protocol for later use

[Liran Alon]

This will give us an exclusive access to the PciIo of this device
after it was started and until is will be stopped.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 29 -
 OvmfPkg/PvScsiDxe/PvScsi.h |  1 +
 2 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index f613870e80f2..b6a83d73cead 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -410,11 +410,23 @@ PvScsiDriverBindingStart (
 return EFI_OUT_OF_RESOURCES;
   }
 
-  Status = PvScsiInit (Dev);
+  Status = gBS->OpenProtocol (
+  ControllerHandle,
+  ,
+  (VOID **)>PciIo,
+  This->DriverBindingHandle,
+  ControllerHandle,
+  EFI_OPEN_PROTOCOL_BY_DRIVER
+  );
   if (EFI_ERROR (Status)) {
 goto FreePvScsi;
   }
 
+  Status = PvScsiInit (Dev);
+  if (EFI_ERROR (Status)) {
+goto ClosePciIo;
+  }
+
   //
   // Setup complete, attempt to export the driver instance's PassThru interface
   //
@@ -434,6 +446,14 @@ PvScsiDriverBindingStart (
 UninitDev:
   PvScsiUninit (Dev);
 
+ClosePciIo:
+  gBS->CloseProtocol (
+ ControllerHandle,
+ ,
+ This->DriverBindingHandle,
+ ControllerHandle
+ );
+
 FreePvScsi:
   FreePool (Dev);
 
@@ -479,6 +499,13 @@ PvScsiDriverBindingStop (
 
   PvScsiUninit (Dev);
 
+  gBS->CloseProtocol (
+ ControllerHandle,
+ ,
+ This->DriverBindingHandle,
+ ControllerHandle
+ );
+
   FreePool (Dev);
 
   return EFI_SUCCESS;
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.h b/OvmfPkg/PvScsiDxe/PvScsi.h
index dd3e0c68e6da..e1e5ae18ebf2 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.h
+++ b/OvmfPkg/PvScsiDxe/PvScsi.h
@@ -19,6 +19,7 @@
 
 typedef struct {
   UINT32  Signature;
+  EFI_PCI_IO_PROTOCOL *PciIo;
   UINT8   MaxTarget;
   UINT8   MaxLun;
   EFI_EXT_SCSI_PASS_THRU_PROTOCOL PassThru;
-- 
2.20.1


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[edk2-devel] [PATCH 14/17] OvmfPkg/PvScsiDxe: Introduce DMA communication buffer

[Liran Alon]

In case device is constrained by IOMMU or guest is running under AMD SEV,
input/output buffers provided to device (DataBuffer and SenseData) needs
to be explicitly mapped to device by PciIo->Map().

To avoid the overhead of mapping/unmapping the DataBuffer and SenseData
to the device for every SCSI requst (And to simplify code), introduce a
single DMA communication buffer that will be mapped to device on
initialization. When a SCSI request needs to be sent to device, the
DataBuffer and SenseData will be copied from/to the DMA communication
buffer as required. This will be done by the following commits.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 24 
 OvmfPkg/PvScsiDxe/PvScsi.h | 10 ++
 2 files changed, 34 insertions(+)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index c3f5d38f3d30..e48929bf044c 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -638,6 +638,20 @@ PvScsiInit (
 return Status;
   }
 
+  //
+  // Allocate DMA communication buffer
+  //
+  Status = PvScsiAllocateSharedPages (
+ Dev,
+ EFI_SIZE_TO_PAGES (sizeof (*Dev->DmaBuf)),
+ EfiPciIoOperationBusMasterCommonBuffer,
+ (VOID **)>DmaBuf,
+ >DmaBufDmaDesc
+ );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
   //
   // Populate the exported interface's attributes
   //
@@ -676,6 +690,16 @@ PvScsiUninit (
   IN OUT PVSCSI_DEV *Dev
   )
 {
+  //
+  // Free DMA communication buffer
+  //
+  PvScsiFreeSharedPages (
+Dev,
+EFI_SIZE_TO_PAGES (sizeof (*Dev->DmaBuf)),
+(VOID **)>DmaBuf,
+>DmaBufDmaDesc
+);
+
   //
   // Free PVSCSI rings
   //
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.h b/OvmfPkg/PvScsiDxe/PvScsi.h
index 6d23b6e1eccf..7f91d70fec79 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.h
+++ b/OvmfPkg/PvScsiDxe/PvScsi.h
@@ -31,6 +31,11 @@ typedef struct {
   PVSCSI_DMA_DESC  RingCmpsDmaDesc;
 } PVSCSI_RING_DESC;
 
+typedef struct {
+  UINT8 SenseData[MAX_UINT8];
+  UINT8 Data[0x2000];
+} PVSCSI_DMA_BUFFER;
+
 #define PVSCSI_SIG SIGNATURE_32 ('P', 'S', 'C', 'S')
 
 typedef struct {
@@ -38,6 +43,8 @@ typedef struct {
   EFI_PCI_IO_PROTOCOL *PciIo;
   UINT64  OriginalPciAttributes;
   PVSCSI_RING_DESCRingDesc;
+  PVSCSI_DMA_BUFFER   *DmaBuf;
+  PVSCSI_DMA_DESC DmaBufDmaDesc;
   UINT8   MaxTarget;
   UINT8   MaxLun;
   EFI_EXT_SCSI_PASS_THRU_PROTOCOL PassThru;
@@ -47,4 +54,7 @@ typedef struct {
 #define PVSCSI_FROM_PASS_THRU(PassThruPointer) \
   CR (PassThruPointer, PVSCSI_DEV, PassThru, PVSCSI_SIG)
 
+#define PVSCSI_DMA_BUF_DEV_ADDR(Dev, MemberName) \
+  (Dev->DmaBufDmaDesc.DeviceAddress + OFFSET_OF(PVSCSI_DMA_BUFFER, MemberName))
+
 #endif // __PVSCSI_DXE_H_
-- 
2.20.1


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[edk2-devel] [PATCH 07/17] OvmfPkg/PvScsiDxe: Translate Target & LUN to/from DevicePath

[Liran Alon]

Implement EXT_SCSI_PASS_THRU.BuildDevicePath() and
EXT_SCSI_PASS_THRU.GetTargetLun().

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 60 --
 1 file changed, 58 insertions(+), 2 deletions(-)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index 76bb361c7c94..f613870e80f2 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -136,7 +136,38 @@ PvScsiBuildDevicePath (
   IN OUT EFI_DEVICE_PATH_PROTOCOL   **DevicePath
   )
 {
-  return EFI_UNSUPPORTED;
+  UINT8 TargetValue;
+  PVSCSI_DEV*Dev;
+  SCSI_DEVICE_PATH  *ScsiDevicePath;
+
+  if (DevicePath == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // We only use first byte of target identifer
+  //
+  TargetValue = *Target;
+
+  Dev = PVSCSI_FROM_PASS_THRU (This);
+  if (TargetValue > Dev->MaxTarget || Lun > Dev->MaxLun) {
+return EFI_NOT_FOUND;
+  }
+
+  ScsiDevicePath = AllocatePool (sizeof (*ScsiDevicePath));
+  if (ScsiDevicePath == NULL) {
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  ScsiDevicePath->Header.Type  = MESSAGING_DEVICE_PATH;
+  ScsiDevicePath->Header.SubType   = MSG_SCSI_DP;
+  ScsiDevicePath->Header.Length[0] = (UINT8)sizeof (*ScsiDevicePath);
+  ScsiDevicePath->Header.Length[1] = (UINT8)(sizeof (*ScsiDevicePath) >> 8);
+  ScsiDevicePath->Pun  = TargetValue;
+  ScsiDevicePath->Lun  = (UINT16)Lun;
+
+  *DevicePath = >Header;
+  return EFI_SUCCESS;
 }
 
 STATIC
@@ -149,7 +180,32 @@ PvScsiGetTargetLun (
   OUT UINT64*Lun
   )
 {
-  return EFI_UNSUPPORTED;
+  SCSI_DEVICE_PATH *ScsiDevicePath;
+  PVSCSI_DEV   *Dev;
+
+  if (DevicePath == NULL || Target == NULL || *Target == NULL || Lun == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  if (DevicePath->Type!= MESSAGING_DEVICE_PATH ||
+  DevicePath->SubType != MSG_SCSI_DP) {
+return EFI_UNSUPPORTED;
+  }
+
+  ScsiDevicePath = (SCSI_DEVICE_PATH *)DevicePath;
+  Dev = PVSCSI_FROM_PASS_THRU (This);
+  if (ScsiDevicePath->Pun > Dev->MaxTarget ||
+  ScsiDevicePath->Lun > Dev->MaxLun) {
+return EFI_NOT_FOUND;
+  }
+
+  //
+  // We only use first byte of target identifer
+  //
+  **Target = (UINT8)ScsiDevicePath->Pun;
+  *Lun = ScsiDevicePath->Lun;
+
+  return EFI_SUCCESS;
 }
 
 STATIC
-- 
2.20.1


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[edk2-devel] [PATCH 12/17] OvmfPkg/PvScsiDxe: Reset adapter on init

[Liran Alon]

The following commits will complete the implementation of
device initialization.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 77 ++
 1 file changed, 77 insertions(+)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index ff6b50b7020f..fb2407d2adb2 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -29,6 +29,76 @@
 // Ext SCSI Pass Thru utilities
 //
 
+
+//
+// Writes a 32-bit value into BAR0 using MMIO
+//
+STATIC
+EFI_STATUS
+PvScsiMmioWrite32 (
+  IN CONST PVSCSI_DEV   *Dev,
+  IN UINT64 Offset,
+  IN UINT32 Value
+  )
+{
+  return Dev->PciIo->Mem.Write(
+   Dev->PciIo,
+   EfiPciIoWidthUint32,
+   0,   // BarIndex
+   Offset,
+   1,   // Count
+   
+   );
+}
+
+//
+// Send PVSCSI command to device
+//
+STATIC
+EFI_STATUS
+PvScsiWriteCmdDesc (
+  IN CONST PVSCSI_DEV   *Dev,
+  IN UINT32 Cmd,
+  IN VOID   *Desc,
+  IN UINTN  Length
+  )
+{
+  EFI_STATUS Status;
+  UINTN  LengthInWords;
+  UINT8  *WordPtr;
+  UINT8  *DescEndPtr;
+  UINT32 Word;
+
+  LengthInWords = Length / sizeof (UINT32);
+
+  if (LengthInWords > PVSCSI_MAX_CMD_DATA_WORDS) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  Status = PvScsiMmioWrite32 (Dev, PVSCSI_REG_OFFSET_COMMAND, Cmd);
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  WordPtr = Desc;
+  DescEndPtr = WordPtr + Length;
+
+  while (WordPtr != DescEndPtr) {
+//
+// CopyMem() is used to avoid strict-aliasing issues
+//
+CopyMem (, WordPtr, sizeof (UINT32));
+
+Status = PvScsiMmioWrite32 (Dev, PVSCSI_REG_OFFSET_COMMAND_DATA, Word);
+if (EFI_ERROR (Status)) {
+  return Status;
+}
+
+WordPtr += sizeof (UINT32);
+  }
+
+  return EFI_SUCCESS;
+}
 //
 // Check if Target argument to EXT_SCSI_PASS_THRU.GetNextTarget() and
 // EXT_SCSI_PASS_THRU.GetNextTargetLun() is initialized
@@ -348,6 +418,13 @@ PvScsiInit (
 return Status;
   }
 
+  //
+  // Reset adapter
+  //
+  Status = PvScsiWriteCmdDesc (Dev, PVSCSI_CMD_ADAPTER_RESET, NULL, 0);
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
   //
   // Populate the exported interface's attributes
   //
-- 
2.20.1


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[edk2-devel] [PATCH 13/17] OvmfPkg/PvScsiDxe: Setup requests and completions rings

[Liran Alon]

These rings are shared memory buffers between host and device in which
a cyclic buffer is managed to send request descriptors from host to
device and receive completion descriptors from device to host.

Note that because device may be constrained by IOMMU or guest may be run
under AMD SEV, we make sure to map these rings to device by using
PciIo->Map().

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 235 +
 OvmfPkg/PvScsiDxe/PvScsi.h |  17 +++
 2 files changed, 252 insertions(+)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index fb2407d2adb2..c3f5d38f3d30 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "PvScsi.h"
 
@@ -396,6 +397,209 @@ PvScsiSetPCIAttributes (
   return EFI_SUCCESS;
 }
 
+STATIC
+EFI_STATUS
+PvScsiAllocatePages (
+  IN PVSCSI_DEV *Dev,
+  IN UINTN  Pages,
+  IN OUT VOID   **HostAddress
+  )
+{
+  return Dev->PciIo->AllocateBuffer (
+   Dev->PciIo,
+   AllocateAnyPages,
+   EfiBootServicesData,
+   Pages,
+   HostAddress,
+   EFI_PCI_ATTRIBUTE_MEMORY_CACHED
+   );
+}
+
+STATIC
+VOID
+PvScsiFreePages (
+  IN PVSCSI_DEV *Dev,
+  IN UINTN  Pages,
+  IN VOID   *HostAddress
+  )
+{
+  Dev->PciIo->FreeBuffer (
+Dev->PciIo,
+Pages,
+HostAddress
+);
+}
+
+STATIC
+EFI_STATUS
+PvScsiMapBuffer (
+  IN PVSCSI_DEV *Dev,
+  IN EFI_PCI_IO_PROTOCOL_OPERATION  PciIoOperation,
+  IN VOID   *HostAddress,
+  IN UINTN  NumberOfBytes,
+  OUT PVSCSI_DMA_DESC   *DmaDesc
+  )
+{
+  EFI_STATUS Status;
+  UINTN  BytesMapped;
+
+  BytesMapped = NumberOfBytes;
+  Status = Dev->PciIo->Map (
+ Dev->PciIo,
+ PciIoOperation,
+ HostAddress,
+ ,
+ >DeviceAddress,
+ >Mapping
+ );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  if (BytesMapped != NumberOfBytes) {
+Status = EFI_OUT_OF_RESOURCES;
+goto Unmap;
+  }
+
+  return EFI_SUCCESS;
+
+Unmap:
+  Dev->PciIo->Unmap (Dev->PciIo, DmaDesc->Mapping);
+  DmaDesc->Mapping = NULL;
+
+  return Status;
+}
+
+STATIC
+VOID
+PvScsiUnmapBuffer (
+  IN PVSCSI_DEV *Dev,
+  IN OUT PVSCSI_DMA_DESC*DmaDesc)
+{
+  Dev->PciIo->Unmap (Dev->PciIo, DmaDesc->Mapping);
+}
+
+STATIC
+EFI_STATUS
+PvScsiAllocateSharedPages (
+  IN PVSCSI_DEV *Dev,
+  IN UINTN  Pages,
+  IN EFI_PCI_IO_PROTOCOL_OPERATION  PciIoOperation,
+  OUT VOID  **HostAddress,
+  OUT PVSCSI_DMA_DESC   *DmaDesc
+  )
+{
+  EFI_STATUS Status;
+
+  *HostAddress = NULL;
+  DmaDesc->Mapping = NULL;
+
+  Status = PvScsiAllocatePages (Dev, Pages, HostAddress);
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  Status = PvScsiMapBuffer (
+ Dev,
+ PciIoOperation,
+ *HostAddress,
+ Pages * EFI_PAGE_SIZE,
+ DmaDesc
+ );
+  if (EFI_ERROR (Status)) {
+goto FreePages;
+  }
+
+  return EFI_SUCCESS;
+
+FreePages:
+  PvScsiFreePages (Dev, Pages, *HostAddress);
+  *HostAddress = NULL;
+
+  return Status;
+}
+
+STATIC
+VOID
+PvScsiFreeSharedPages (
+  IN PVSCSI_DEV *Dev,
+  IN UINTN  Pages,
+  IN OUT VOID   **HostAddress,
+  IN OUT PVSCSI_DMA_DESC*DmaDesc
+  )
+{
+  if (*HostAddress) {
+  if (DmaDesc->Mapping) {
+PvScsiUnmapBuffer (Dev, DmaDesc);
+DmaDesc->Mapping = NULL;
+  }
+
+  PvScsiFreePages (Dev, Pages, *HostAddress);
+  *HostAddress = NULL;
+  }
+}
+
+STATIC
+EFI_STATUS
+PvScsiInitRings (
+  IN OUT PVSCSI_DEV *Dev
+  )
+{
+  EFI_STATUS  Status;
+  PVSCSI_CMD_DESC_SETUP_RINGS Cmd;
+
+  Status = PvScsiAllocateSharedPages (
+ Dev,
+ 1,
+ EfiPciIoOperationBusMasterCommonBuffer,
+ (VOID **)>RingDesc.RingState,
+ >RingDesc.RingStateDmaDesc
+ );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+  ZeroMem (Dev->RingDesc.RingState, EFI_PAGE_SIZE);
+
+  Status = PvScsiAllocateSharedPages (
+ Dev,
+ 1,
+ EfiPciIoOperationBusMasterCommonBuffer,
+ (VOID **)>RingDesc.RingReqs,
+ >RingDesc.RingReqsDmaDesc
+ );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+  ZeroMem (Dev->RingDesc.RingReqs, EFI_PAGE_SIZE);
+
+  Status = 

[edk2-devel] [PATCH 09/17] OvmfPkg/PvScsiDxe: Backup/Restore PCI attributes on Init/UnInit

[Liran Alon]

This commit doesn't change semantics.
It is done as a preparation for future commits which will modify
PCI attributes.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 53 +-
 OvmfPkg/PvScsiDxe/PvScsi.h |  1 +
 2 files changed, 53 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index b6a83d73cead..92e0f4a98965 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -281,18 +281,59 @@ PvScsiGetNextTarget (
   return EFI_NOT_FOUND;
 }
 
+STATIC
+EFI_STATUS
+PvScsiSetPCIAttributes (
+  IN OUT PVSCSI_DEV *Dev
+  )
+{
+  EFI_STATUS Status;
+
+  //
+  // Set saved original PCI attirubtes to invalid value
+  // such that cleanup logic could determine if it should restore
+  // PCI attributes or not
+  //
+  Dev->OriginalPciAttributes = (UINT64)(-1);
+
+  //
+  // Backup original PCI Attributes
+  //
+  Status = Dev->PciIo->Attributes (
+ Dev->PciIo,
+ EfiPciIoAttributeOperationGet,
+ 0,
+ >OriginalPciAttributes
+ );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  return EFI_SUCCESS;
+}
+
 STATIC
 EFI_STATUS
 PvScsiInit (
   IN OUT PVSCSI_DEV *Dev
   )
 {
+  EFI_STATUS Status;
+
   //
   // Init configuration
   //
   Dev->MaxTarget = PcdGet8 (PcdPvScsiMaxTargetLimit);
   Dev->MaxLun = PcdGet8 (PcdPvScsiMaxLunLimit);
 
+  //
+  // Set PCI Attributes
+  //
+  Status = PvScsiSetPCIAttributes (Dev);
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
   //
   // Populate the exported interface's attributes
   //
@@ -331,7 +372,17 @@ PvScsiUninit (
   IN OUT PVSCSI_DEV *Dev
   )
 {
-  // Currently nothing to do here
+  //
+  // Restore PCI Attributes
+  //
+  if (Dev->OriginalPciAttributes != (UINT64)(-1)) {
+Dev->PciIo->Attributes (
+  Dev->PciIo,
+  EfiPciIoAttributeOperationSet,
+  Dev->OriginalPciAttributes,
+  NULL
+  );
+  }
 }
 
 //
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.h b/OvmfPkg/PvScsiDxe/PvScsi.h
index e1e5ae18ebf2..5f611dbbc98c 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.h
+++ b/OvmfPkg/PvScsiDxe/PvScsi.h
@@ -20,6 +20,7 @@
 typedef struct {
   UINT32  Signature;
   EFI_PCI_IO_PROTOCOL *PciIo;
+  UINT64  OriginalPciAttributes;
   UINT8   MaxTarget;
   UINT8   MaxLun;
   EFI_EXT_SCSI_PASS_THRU_PROTOCOL PassThru;
-- 
2.20.1


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[edk2-devel] [PATCH 10/17] OvmfPkg/PvScsiDxe: Enable IOSpace & Bus-Mastering in PCI attributes

[Liran Alon]

Enable IOSpace & Bus-Mastering PCI attributes when device is started.
Note that original PCI attributes is restored when device is stopped.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index 92e0f4a98965..ff6b50b7020f 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -309,6 +309,20 @@ PvScsiSetPCIAttributes (
 return Status;
   }
 
+  //
+  // Enable IOSpace & Bus-Mastering
+  //
+  Status = Dev->PciIo->Attributes (
+ Dev->PciIo,
+ EfiPciIoAttributeOperationEnable,
+ (EFI_PCI_IO_ATTRIBUTE_MEMORY |
+  EFI_PCI_IO_ATTRIBUTE_BUS_MASTER),
+ NULL
+ );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
   return EFI_SUCCESS;
 }
 
-- 
2.20.1


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[edk2-devel] [PATCH 15/17] OvmfPkg/PvScsiDxe: Support sending SCSI request and receive response

[Liran Alon]

Implement EXT_SCSI_PASS_THRU.PassThru().

Machines should be able to boot after this commit.
Tested with Ubuntu 16.04 guest.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/OvmfPkg.dec  |   6 +
 OvmfPkg/PvScsiDxe/PvScsi.c   | 423 ++-
 OvmfPkg/PvScsiDxe/PvScsi.h   |   1 +
 OvmfPkg/PvScsiDxe/PvScsi.inf |   5 +-
 4 files changed, 432 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 76ce507e8bd0..e78c771f53e9 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -130,6 +130,12 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x40
   gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x41
 
+  ## After PvScsiDxe sends a SCSI request to the device, it waits for
+  #  the request completion in a polling loop.
+  #  This constant defines how many micro-seconds to wait between each
+  #  polling loop iteration.
+  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x42
+
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index e48929bf044c..e7d0a23db6ab 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -30,6 +30,26 @@
 // Ext SCSI Pass Thru utilities
 //
 
+//
+// Reads a 32-bit value into BAR0 using MMIO
+//
+STATIC
+EFI_STATUS
+PvScsiMmioRead32 (
+  IN CONST PVSCSI_DEV   *Dev,
+  IN UINT64 Offset,
+  OUT UINT32*Value
+  )
+{
+  return Dev->PciIo->Mem.Read(
+   Dev->PciIo,
+   EfiPciIoWidthUint32,
+   0,   // BarIndex
+   Offset,
+   1,   // Count
+   Value
+   );
+}
 
 //
 // Writes a 32-bit value into BAR0 using MMIO
@@ -100,6 +120,343 @@ PvScsiWriteCmdDesc (
 
   return EFI_SUCCESS;
 }
+
+//
+// Returns if PVSCSI request ring is full
+//
+STATIC
+BOOLEAN
+PvScsiIsReqRingFull (
+  IN CONST PVSCSI_DEV   *Dev
+  )
+{
+  PVSCSI_RINGS_STATE *RingsState;
+  UINT64 ReqNumEntries;
+
+  RingsState = Dev->RingDesc.RingState;
+  ReqNumEntries = 1 << RingsState->ReqNumEntriesLog2;
+  return (RingsState->ReqProdIdx - RingsState->CmpConsIdx) >= ReqNumEntries;
+}
+
+//
+// Returns pointer to current request descriptor to produce
+//
+STATIC
+PVSCSI_RING_REQ_DESC *
+PvScsiGetCurrentRequest (
+  IN CONST PVSCSI_DEV   *Dev
+  )
+{
+  PVSCSI_RINGS_STATE *RingState;
+  UINT64 ReqNumEntries;
+
+  RingState = Dev->RingDesc.RingState;
+  ReqNumEntries = 1 << RingState->ReqNumEntriesLog2;
+  return Dev->RingDesc.RingReqs +
+ (RingState->ReqProdIdx & (ReqNumEntries - 1));
+}
+
+//
+// Returns pointer to current completion descriptor to consume
+//
+STATIC
+PVSCSI_RING_CMP_DESC *
+PvScsiGetCurrentResponse (
+  IN CONST PVSCSI_DEV   *Dev
+  )
+{
+  PVSCSI_RINGS_STATE *RingState;
+  UINT64 CmpNumEntries;
+
+  RingState = Dev->RingDesc.RingState;
+  CmpNumEntries = 1 << RingState->CmpNumEntriesLog2;
+  return Dev->RingDesc.RingCmps +
+ (RingState->CmpConsIdx & (CmpNumEntries - 1));
+}
+
+//
+// Wait for device to signal completion of submitted requests
+//
+STATIC
+EFI_STATUS
+PvScsiWaitForRequestCompletion (
+  IN CONST PVSCSI_DEV   *Dev
+  )
+{
+  EFI_STATUS Status;
+  UINT32 IntrStatus;
+
+  //
+  // Note: We don't yet support Timeout according to
+  // EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET.Timeout.
+  //
+  // This is consistent with some other Scsi PassThru drivers
+  // such as VirtioScsi.
+  //
+  for (;;) {
+Status = PvScsiMmioRead32 (Dev, PVSCSI_REG_OFFSET_INTR_STATUS, 
);
+if (EFI_ERROR (Status)) {
+  return Status;
+}
+
+//
+// PVSCSI_INTR_CMPL_MASK is set if device completed submitted requests
+//
+if (IntrStatus & PVSCSI_INTR_CMPL_MASK) {
+break;
+}
+
+gBS->Stall (Dev->WaitForCmpStallInUsecs);
+  }
+
+  //
+  // Acknowledge PVSCSI_INTR_CMPL_MASK in device interrupt-status register
+  //
+  return PvScsiMmioWrite32 (
+   Dev,
+   PVSCSI_REG_OFFSET_INTR_STATUS,
+   PVSCSI_INTR_CMPL_MASK
+   );
+}
+
+//
+// Populate a PVSCSI request descriptor from the Extended SCSI Pass Thru
+// Protocol packet.
+//
+STATIC
+EFI_STATUS
+PopulateRequest (
+  IN CONST PVSCSI_DEV   *Dev,
+  IN UINT8  *Target,
+  IN UINT64 Lun,
+  IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+  OUT PVSCSI_RING_REQ_DESC  *Request
+  )
+{
+  UINT8 TargetValue;
+
+  //
+  // We only use first byte of target identifer
+  //
+  

[edk2-devel] [PATCH 06/17] OvmfPkg/PvScsiDxe: Report the number of targets and LUNs

[Liran Alon]

Implement EXT_SCSI_PASS_THRU.GetNextTarget() and
EXT_SCSI_PASS_THRU.GetNextTargetLun().

ScsiBusDxe scans all MaxTarget * MaxLun possible devices.
This can take unnecessarily long for large number of targets.
To deal with this, VirtioScsiDxe has defined PCDs to limit the
MaxTarget & MaxLun to desired values which gives sufficient
performance. It is very important in virtio-scsi as it can have
very big MaxTarget & MaxLun.
Even though a common PVSCSI device has a default MaxTarget=64 and
MaxLun=0, we implement similar mechanism as virtio-scsi for completeness.
This may be useful in the future when PVSCSI will have bigger values
for MaxTarget and MaxLun.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/OvmfPkg.dec  |   9 +++
 OvmfPkg/PvScsiDxe/PvScsi.c   | 122 ++-
 OvmfPkg/PvScsiDxe/PvScsi.h   |   2 +
 OvmfPkg/PvScsiDxe/PvScsi.inf |   5 ++
 4 files changed, 136 insertions(+), 2 deletions(-)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 4c5b6511cb97..76ce507e8bd0 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -121,6 +121,15 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
 
+  ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for
+  # scan by ScsiBusDxe.
+  # As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun
+  # possible devices, which can take extremely long. Thus, the blow constants
+  # are used so that scanning the number of devices given by their product
+  # is still acceptably fast.
+  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x40
+  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x41
+
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index 46b430a34a57..76bb361c7c94 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -11,6 +11,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -24,6 +25,30 @@
 //
 #define PVSCSI_BINDING_VERSION  0x10
 
+//
+// Ext SCSI Pass Thru utilities
+//
+
+//
+// Check if Target argument to EXT_SCSI_PASS_THRU.GetNextTarget() and
+// EXT_SCSI_PASS_THRU.GetNextTargetLun() is initialized
+//
+STATIC
+BOOLEAN
+IsTargetInitialized (
+  IN UINT8  *Target
+  )
+{
+  UINTN Idx;
+
+  for (Idx = 0; Idx < TARGET_MAX_BYTES; ++Idx) {
+if (Target[Idx] != 0xFF) {
+  return TRUE;
+}
+  }
+  return FALSE;
+}
+
 //
 // Ext SCSI Pass Thru
 //
@@ -51,7 +76,54 @@ PvScsiGetNextTargetLun (
   IN OUT UINT64 *Lun
   )
 {
-  return EFI_UNSUPPORTED;
+  UINT8  *TargetPtr;
+  UINT8  LastTarget;
+  PVSCSI_DEV *Dev;
+
+  if (Target == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // The TargetPointer input parameter is unnecessarily a pointer-to-pointer
+  //
+  TargetPtr = *Target;
+
+  //
+  // If target not initialized, return first target & LUN
+  //
+  if (!IsTargetInitialized (TargetPtr)) {
+ZeroMem (TargetPtr, TARGET_MAX_BYTES);
+*Lun = 0;
+return EFI_SUCCESS;
+  }
+
+  //
+  // We only use first byte of target identifer
+  //
+  LastTarget = *TargetPtr;
+
+  //
+  // Increment (target, LUN) pair if valid on input
+  //
+  Dev = PVSCSI_FROM_PASS_THRU (This);
+  if (LastTarget > Dev->MaxTarget || *Lun > Dev->MaxLun) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  if (*Lun < Dev->MaxLun) {
+++*Lun;
+return EFI_SUCCESS;
+  }
+
+  if (LastTarget < Dev->MaxTarget) {
+*Lun = 0;
+++LastTarget;
+*TargetPtr = LastTarget;
+return EFI_SUCCESS;
+  }
+
+  return EFI_NOT_FOUND;
 }
 
 STATIC
@@ -110,7 +182,47 @@ PvScsiGetNextTarget (
   IN OUT UINT8  **Target
   )
 {
-  return EFI_UNSUPPORTED;
+  UINT8  *TargetPtr;
+  UINT8  LastTarget;
+  PVSCSI_DEV *Dev;
+
+  if (Target == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // The Target input parameter is unnecessarily a pointer-to-pointer
+  //
+  TargetPtr = *Target;
+
+  //
+  // If target not initialized, return first target
+  //
+  if (!IsTargetInitialized (TargetPtr)) {
+ZeroMem (TargetPtr, TARGET_MAX_BYTES);
+return EFI_SUCCESS;
+  }
+
+  //
+  // We only use first byte of target identifer
+  //
+  LastTarget = *TargetPtr;
+
+  //
+  // Increment target if valid on input
+  //
+  Dev = PVSCSI_FROM_PASS_THRU (This);
+  if (LastTarget > Dev->MaxTarget) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  if (LastTarget < Dev->MaxTarget) {
+++LastTarget;
+*TargetPtr = LastTarget;
+return EFI_SUCCESS;
+  }
+
+  return EFI_NOT_FOUND;
 }
 
 STATIC
@@ 

[edk2-devel] [PATCH 04/17] OvmfPkg/PvScsiDxe: Probe PCI devices and look for PvScsi

[Liran Alon]

PvScsiControllerSupported() is called on handles passed in
by the ConnectController() boot service and if the handle is the
PVSCSI controller, the function would return success. A success
return value will attach our driver to the device.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/Include/IndustryStandard/PvScsi.h | 21 ++
 OvmfPkg/PvScsiDxe/PvScsi.c| 49 ++-
 OvmfPkg/PvScsiDxe/PvScsi.inf  |  5 +++
 3 files changed, 74 insertions(+), 1 deletion(-)
 create mode 100644 OvmfPkg/Include/IndustryStandard/PvScsi.h

diff --git a/OvmfPkg/Include/IndustryStandard/PvScsi.h 
b/OvmfPkg/Include/IndustryStandard/PvScsi.h
new file mode 100644
index ..004c0af84989
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/PvScsi.h
@@ -0,0 +1,21 @@
+/** @file
+
+  VMware PVSCSI Device specific type and macro definitions.
+
+  Copyright (C) 2020, Oracle and/or its affiliates.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __PVSCSI_H_
+#define __PVSCSI_H_
+
+//
+// Device offsets and constants
+//
+
+#define PCI_VENDOR_ID_VMWARE(0x15ad)
+#define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)
+
+#endif // __PVSCSI_H_
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index 0c81e645de08..f1fffe962233 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -9,7 +9,11 @@
 
 **/
 
+#include 
+#include 
+#include 
 #include 
+#include 
 
 //
 // Higher versions will be used before lower, 0x10-0xffef is the version
@@ -30,7 +34,50 @@ PvScsiDriverBindingSupported (
   IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath OPTIONAL
   )
 {
-  return EFI_UNSUPPORTED;
+  EFI_STATUS  Status;
+  EFI_PCI_IO_PROTOCOL *PciIo;
+  PCI_TYPE00  Pci;
+
+  Status = gBS->OpenProtocol (
+  ControllerHandle,
+  ,
+  (VOID **),
+  This->DriverBindingHandle,
+  ControllerHandle,
+  EFI_OPEN_PROTOCOL_BY_DRIVER
+  );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  Status = PciIo->Pci.Read (
+PciIo,
+EfiPciIoWidthUint32,
+0,
+sizeof(Pci) / sizeof(UINT32),
+
+);
+  if (EFI_ERROR (Status)) {
+  goto Done;
+  }
+
+  if ((Pci.Hdr.VendorId != PCI_VENDOR_ID_VMWARE) ||
+  (Pci.Hdr.DeviceId != PCI_DEVICE_ID_VMWARE_PVSCSI)) {
+  Status = EFI_UNSUPPORTED;
+  goto Done;
+  }
+
+  Status = EFI_SUCCESS;
+
+Done:
+  gBS->CloseProtocol (
+ ControllerHandle,
+ ,
+ This->DriverBindingHandle,
+ ControllerHandle
+ );
+
+  return Status;
 }
 
 STATIC
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.inf b/OvmfPkg/PvScsiDxe/PvScsi.inf
index d1d0e963f96d..c1f0663832ed 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.inf
+++ b/OvmfPkg/PvScsiDxe/PvScsi.inf
@@ -22,7 +22,12 @@
 
 [Packages]
   MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
 
 [LibraryClasses]
+  UefiBootServicesTableLib
   UefiDriverEntryPoint
   UefiLib
+
+[Protocols]
+  gEfiPciIoProtocolGuid## TO_START
-- 
2.20.1


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[edk2-devel] [PATCH 05/17] OvmfPkg/PvScsiDxe: Install stubbed EXT_SCSI_PASS_THRU

[Liran Alon]

Support dynamic insertion and removal of the protocol.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c   | 209 ++-
 OvmfPkg/PvScsiDxe/PvScsi.h   |  29 +
 OvmfPkg/PvScsiDxe/PvScsi.inf |   5 +-
 3 files changed, 240 insertions(+), 3 deletions(-)
 create mode 100644 OvmfPkg/PvScsiDxe/PvScsi.h

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index f1fffe962233..46b430a34a57 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -11,16 +11,155 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 
+#include "PvScsi.h"
+
 //
 // Higher versions will be used before lower, 0x10-0xffef is the version
 // range for IVH (Indie Hardware Vendors)
 //
 #define PVSCSI_BINDING_VERSION  0x10
 
+//
+// Ext SCSI Pass Thru
+//
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiPassThru (
+  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
+  IN UINT8  *Target,
+  IN UINT64 Lun,
+  IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+  IN EFI_EVENT  EventOPTIONAL
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiGetNextTargetLun (
+  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
+  IN OUT UINT8  **Target,
+  IN OUT UINT64 *Lun
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiBuildDevicePath (
+  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
+  IN UINT8  *Target,
+  IN UINT64 Lun,
+  IN OUT EFI_DEVICE_PATH_PROTOCOL   **DevicePath
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiGetTargetLun (
+  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
+  IN EFI_DEVICE_PATH_PROTOCOL   *DevicePath,
+  OUT UINT8 **Target,
+  OUT UINT64*Lun
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiResetChannel (
+  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiResetTargetLun (
+  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
+  IN UINT8  *Target,
+  IN UINT64 Lun
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+EFIAPI
+PvScsiGetNextTarget (
+  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
+  IN OUT UINT8  **Target
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+STATIC
+EFI_STATUS
+PvScsiInit (
+  IN OUT PVSCSI_DEV *Dev
+  )
+{
+  //
+  // Populate the exported interface's attributes
+  //
+  Dev->PassThru.Mode = >PassThruMode;
+  Dev->PassThru.PassThru = 
+  Dev->PassThru.GetNextTargetLun = 
+  Dev->PassThru.BuildDevicePath  = 
+  Dev->PassThru.GetTargetLun = 
+  Dev->PassThru.ResetChannel = 
+  Dev->PassThru.ResetTargetLun   = 
+  Dev->PassThru.GetNextTarget= 
+
+  //
+  // AdapterId is a target for which no handle will be created during bus scan.
+  // Prevent any conflict with real devices.
+  //
+  Dev->PassThruMode.AdapterId = MAX_UINT32;
+
+  //
+  // Set both physical and logical attributes for non-RAID SCSI channel
+  //
+  Dev->PassThruMode.Attributes = EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL |
+ EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL;
+
+  //
+  // No restriction on transfer buffer alignment
+  //
+  Dev->PassThruMode.IoAlign = 0;
+
+  return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+PvScsiUninit (
+  IN OUT PVSCSI_DEV *Dev
+  )
+{
+  // Currently nothing to do here
+}
+
 //
 // Driver Binding
 //
@@ -89,7 +228,42 @@ PvScsiDriverBindingStart (
   IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath OPTIONAL
   )
 {
-  return EFI_UNSUPPORTED;
+  PVSCSI_DEV *Dev;
+  EFI_STATUS Status;
+
+  Dev = (PVSCSI_DEV *) AllocateZeroPool (sizeof (*Dev));
+  if (Dev == NULL) {
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  Status = PvScsiInit (Dev);
+  if (EFI_ERROR (Status)) {
+goto FreePvScsi;
+  }
+
+  //
+  // Setup complete, attempt to export the driver instance's PassThru interface
+  //
+  Dev->Signature = PVSCSI_SIG;
+  Status = gBS->InstallProtocolInterface (
+  ,
+  ,
+  EFI_NATIVE_INTERFACE,
+  >PassThru
+  );
+  if (EFI_ERROR (Status)) {
+goto UninitDev;
+  }
+
+  return EFI_SUCCESS;
+
+UninitDev:
+  PvScsiUninit (Dev);
+
+FreePvScsi:
+  FreePool (Dev);
+
+  return Status;
 }
 
 STATIC
@@ -102,7 +276,38 @@ PvScsiDriverBindingStop (
   IN EFI_HANDLE

[edk2-devel] [PATCH 16/17] OvmfPkg/PvScsiDxe: Reset device on ExitBootServices()

[Liran Alon]

This causes the device to forget about the request/completion rings.
We allocated said rings in EfiBootServicesData type memory, and code
executing after ExitBootServices() is permitted to overwrite it.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 42 +-
 OvmfPkg/PvScsiDxe/PvScsi.h |  1 +
 2 files changed, 42 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index e7d0a23db6ab..33167c177b42 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -1156,6 +1156,30 @@ PvScsiUninit (
   }
 }
 
+//
+// Event notification called by ExitBootServices()
+//
+STATIC
+VOID
+EFIAPI
+PvScsiExitBoot (
+  IN  EFI_EVENT Event,
+  IN  VOID  *Context
+  )
+{
+  PVSCSI_DEV *Dev;
+
+  Dev = Context;
+
+  //
+  // Reset the device. This causes the device to forget about the
+  // request/completion rings. We allocated said rings in EfiBootServicesData
+  // type memory, and code executing after ExitBootServices() is permitted to
+  // overwrite it.
+  //
+  PvScsiWriteCmdDesc (Dev, PVSCSI_CMD_ADAPTER_RESET, NULL, 0);
+}
+
 //
 // Driver Binding
 //
@@ -1249,6 +1273,17 @@ PvScsiDriverBindingStart (
 goto ClosePciIo;
   }
 
+  Status = gBS->CreateEvent (
+  EVT_SIGNAL_EXIT_BOOT_SERVICES,
+  TPL_CALLBACK,
+  ,
+  Dev,
+  >ExitBoot
+  );
+  if (EFI_ERROR (Status)) {
+goto UninitDev;
+  }
+
   //
   // Setup complete, attempt to export the driver instance's PassThru interface
   //
@@ -1260,11 +1295,14 @@ PvScsiDriverBindingStart (
   >PassThru
   );
   if (EFI_ERROR (Status)) {
-goto UninitDev;
+goto CloseExitBoot;
   }
 
   return EFI_SUCCESS;
 
+CloseExitBoot:
+  gBS->CloseEvent (Dev->ExitBoot);
+
 UninitDev:
   PvScsiUninit (Dev);
 
@@ -1319,6 +1357,8 @@ PvScsiDriverBindingStop (
 return Status;
   }
 
+  gBS->CloseEvent (Dev->ExitBoot);
+
   PvScsiUninit (Dev);
 
   gBS->CloseProtocol (
diff --git a/OvmfPkg/PvScsiDxe/PvScsi.h b/OvmfPkg/PvScsiDxe/PvScsi.h
index 08e876b75930..e68a7dedf71f 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.h
+++ b/OvmfPkg/PvScsiDxe/PvScsi.h
@@ -41,6 +41,7 @@ typedef struct {
 typedef struct {
   UINT32  Signature;
   EFI_PCI_IO_PROTOCOL *PciIo;
+  EFI_EVENT   ExitBoot;
   UINT64  OriginalPciAttributes;
   PVSCSI_RING_DESCRingDesc;
   PVSCSI_DMA_BUFFER   *DmaBuf;
-- 
2.20.1


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[edk2-devel] [PATCH 00/17]: OvmfPkg: Support booting from VMware PVSCSI controller

[Liran Alon]

Hi,

This series adds driver support for VMware PVSCSI controller.

This controller is supported by VMware and QEMU. This work is part of
the more general agenda of enhancing OVMF boot device support to have
feature parity with SeaBIOS (Which supports booting from VMware PVSCSI).

The BugZilla ticket for this feature is at:
https://bugzilla.tianocore.org/show_bug.cgi?id=2567

I pushed a copy of these patches to:
https://github.com/nikital/edk2/tree/pvscsi4

Regards,
-Liran



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[edk2-devel] [PATCH 17/17] OvmfPkg/PvScsiDxe: Enable device 64-bit DMA addresses

[Liran Alon]

Enable PCI dual-address cycle attribute to signal device supports
64-bit DMA addresses.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/PvScsiDxe/PvScsi.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
index 33167c177b42..e673ed8ba6a0 100644
--- a/OvmfPkg/PvScsiDxe/PvScsi.c
+++ b/OvmfPkg/PvScsiDxe/PvScsi.c
@@ -814,6 +814,27 @@ PvScsiSetPCIAttributes (
 return Status;
   }
 
+  //
+  // Signal device supports 64-bit DMA addresses
+  //
+  Status = Dev->PciIo->Attributes (
+ Dev->PciIo,
+ EfiPciIoAttributeOperationEnable,
+ EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
+ NULL
+ );
+  if (EFI_ERROR (Status)) {
+//
+// Warn user device will only be using 32-bit DMA addresses.
+//
+// Note that this does not prevent device/driver from working
+// and therefore we only warn and continue as usual.
+//
+DEBUG ((DEBUG_WARN,
+"%a: failed to enable 64-bit DMA addresses\n",
+__FUNCTION__));
+  }
+
   return EFI_SUCCESS;
 }
 
-- 
2.20.1


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[edk2-devel] [PATCH 11/17] OvmfPkg/PvScsiDxe: Define device interface structures and constants

[Liran Alon]

These definitions will be used by the following commits to complete the
implementation of PVSCSI device driver.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/Include/IndustryStandard/PvScsi.h | 162 ++
 1 file changed, 162 insertions(+)

diff --git a/OvmfPkg/Include/IndustryStandard/PvScsi.h 
b/OvmfPkg/Include/IndustryStandard/PvScsi.h
index 004c0af84989..7bb6e664dfcd 100644
--- a/OvmfPkg/Include/IndustryStandard/PvScsi.h
+++ b/OvmfPkg/Include/IndustryStandard/PvScsi.h
@@ -18,4 +18,166 @@
 #define PCI_VENDOR_ID_VMWARE(0x15ad)
 #define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)
 
+//
+// CDB (Command Descriptor Block) with size above this constant
+// should be considered out-of-band
+//
+#define PVSCSI_CDB_MAX_SIZE (16)
+
+enum PVSCSI_BAR0_OFFSETS {
+  PVSCSI_REG_OFFSET_COMMAND=0x0,
+  PVSCSI_REG_OFFSET_COMMAND_DATA   =0x4,
+  PVSCSI_REG_OFFSET_COMMAND_STATUS =0x8,
+  PVSCSI_REG_OFFSET_LAST_STS_0 =  0x100,
+  PVSCSI_REG_OFFSET_LAST_STS_1 =  0x104,
+  PVSCSI_REG_OFFSET_LAST_STS_2 =  0x108,
+  PVSCSI_REG_OFFSET_LAST_STS_3 =  0x10c,
+  PVSCSI_REG_OFFSET_INTR_STATUS= 0x100c,
+  PVSCSI_REG_OFFSET_INTR_MASK  = 0x2010,
+  PVSCSI_REG_OFFSET_KICK_NON_RW_IO = 0x3014,
+  PVSCSI_REG_OFFSET_DEBUG  = 0x3018,
+  PVSCSI_REG_OFFSET_KICK_RW_IO = 0x4018,
+};
+
+//
+// Define Interrupt-Status register flags
+//
+#define PVSCSI_INTR_CMPL_0  (1 << 0)
+#define PVSCSI_INTR_CMPL_1  (1 << 1)
+#define PVSCSI_INTR_CMPL_MASK   (PVSCSI_INTR_CMPL_0 | PVSCSI_INTR_CMPL_1)
+
+enum PVSCSI_COMMANDS {
+  PVSCSI_CMD_FIRST = 0,
+  PVSCSI_CMD_ADAPTER_RESET = 1,
+  PVSCSI_CMD_ISSUE_SCSI= 2,
+  PVSCSI_CMD_SETUP_RINGS   = 3,
+  PVSCSI_CMD_RESET_BUS = 4,
+  PVSCSI_CMD_RESET_DEVICE  = 5,
+  PVSCSI_CMD_ABORT_CMD = 6,
+  PVSCSI_CMD_CONFIG= 7,
+  PVSCSI_CMD_SETUP_MSG_RING= 8,
+  PVSCSI_CMD_DEVICE_UNPLUG = 9,
+  PVSCSI_CMD_LAST  = 10
+};
+
+#define PVSCSI_SETUP_RINGS_MAX_NUM_PAGES(32)
+
+#pragma pack (1)
+typedef struct {
+  UINT32 ReqRingNumPages;
+  UINT32 CmpRingNumPages;
+  UINT64 RingsStatePPN;
+  UINT64 ReqRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
+  UINT64 CmpRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
+} PVSCSI_CMD_DESC_SETUP_RINGS;
+#pragma pack ()
+
+#define PVSCSI_MAX_CMD_DATA_WORDS   \
+  (sizeof (PVSCSI_CMD_DESC_SETUP_RINGS) / sizeof (UINT32))
+
+#pragma pack (1)
+typedef struct {
+  UINT32 ReqProdIdx;
+  UINT32 ReqConsIdx;
+  UINT32 ReqNumEntriesLog2;
+
+  UINT32 CmpProdIdx;
+  UINT32 CmpConsIdx;
+  UINT32 CmpNumEntriesLog2;
+
+  UINT8  Pad[104];
+
+  UINT32 MsgProdIdx;
+  UINT32 MsgConsIdx;
+  UINT32 MsgNumEntriesLog2;
+} PVSCSI_RINGS_STATE;
+#pragma pack ()
+
+//
+// Define PVSCSI request descriptor tags
+//
+#define PVSCSI_SIMPLE_QUEUE_TAG(0x20)
+
+//
+// Define PVSCSI request descriptor flags
+//
+#define PVSCSI_FLAG_CMD_WITH_SG_LIST   (1 << 0)
+#define PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB(1 << 1)
+#define PVSCSI_FLAG_CMD_DIR_NONE   (1 << 2)
+#define PVSCSI_FLAG_CMD_DIR_TOHOST (1 << 3)
+#define PVSCSI_FLAG_CMD_DIR_TODEVICE   (1 << 4)
+
+#pragma pack (1)
+typedef struct {
+  UINT64 Context;
+  UINT64 DataAddr;
+  UINT64 DataLen;
+  UINT64 SenseAddr;
+  UINT32 SenseLen;
+  UINT32 Flags;
+  UINT8  Cdb[16];
+  UINT8  CdbLen;
+  UINT8  Lun[8];
+  UINT8  Tag;
+  UINT8  Bus;
+  UINT8  Target;
+  UINT8  vCPUHint;
+  UINT8  Unused[59];
+} PVSCSI_RING_REQ_DESC;
+#pragma pack ()
+
+//
+// Host adapter status/error codes
+//
+enum PVSCSI_HOST_BUS_ADAPTER_STATUS {
+   BTSTAT_SUCCESS   = 0x00,  // CCB complete normally with no errors
+   BTSTAT_LINKED_COMMAND_COMPLETED   = 0x0a,
+   BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG = 0x0b,
+   BTSTAT_DATA_UNDERRUN = 0x0c,
+   BTSTAT_SELTIMEO  = 0x11,  // SCSI selection timeout
+   BTSTAT_DATARUN   = 0x12,  // Data overrun/underrun
+   BTSTAT_BUSFREE   = 0x13,  // Unexpected bus free
+   BTSTAT_INVPHASE  = 0x14,  //
+ // Invalid bus phase or sequence requested by
+ // target
+ //
+   BTSTAT_LUNMISMATCH   = 0x17,  // Linked CCB has different LUN from first CCB
+   BTSTAT_SENSFAILED= 0x1b,  // Auto request sense failed
+   BTSTAT_TAGREJECT = 0x1c,  //
+ // SCSI II tagged queueing message rejected by
+ // target
+ //
+   BTSTAT_BADMSG= 0x1d,  //
+ // Unsupported message received by the host
+ // adapter
+ //
+   BTSTAT_HAHARDWARE= 0x20,  // Host adapter hardware failed
+   BTSTAT_NORESPONSE= 0x21,  //
+ // Target did not respond to SCSI ATN sent a

[edk2-devel] [PATCH 01/17] OvmfPkg/PvScsiDxe: Create empty driver

[Liran Alon]

In preparation for support booting from PvScsi devices, create a
basic scaffolding for a driver.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
Reviewed-by: Nikita Leshenko 
Signed-off-by: Liran Alon 
---
 OvmfPkg/OvmfPkgIa32.dsc  |  8 
 OvmfPkg/OvmfPkgIa32.fdf  |  3 +++
 OvmfPkg/OvmfPkgIa32X64.dsc   |  8 
 OvmfPkg/OvmfPkgIa32X64.fdf   |  3 +++
 OvmfPkg/OvmfPkgX64.dsc   |  8 
 OvmfPkg/OvmfPkgX64.fdf   |  3 +++
 OvmfPkg/PvScsiDxe/PvScsi.c   | 24 
 OvmfPkg/PvScsiDxe/PvScsi.inf | 27 +++
 8 files changed, 84 insertions(+)
 create mode 100644 OvmfPkg/PvScsiDxe/PvScsi.c
 create mode 100644 OvmfPkg/PvScsiDxe/PvScsi.inf

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 19728f20b34e..79b8c58e54c3 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -44,6 +44,11 @@
 
 !include NetworkPkg/NetworkDefines.dsc.inc
 
+  #
+  # Device drivers
+  #
+  DEFINE PVSCSI_ENABLE   = TRUE
+
   #
   # Flash size selection. Setting FD_SIZE_IN_KB on the command line directly to
   # one of the supported values, in place of any of the convenience macros, is
@@ -718,6 +723,9 @@
   OvmfPkg/XenIoPciDxe/XenIoPciDxe.inf
   OvmfPkg/XenBusDxe/XenBusDxe.inf
   OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
+!ifdef $(PVSCSI_ENABLE)
+  OvmfPkg/PvScsiDxe/PvScsiDxe.inf
+!endif
   MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
   
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
   MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
diff --git a/OvmfPkg/OvmfPkgIa32.fdf b/OvmfPkg/OvmfPkgIa32.fdf
index 63607551ed75..f59a58bc2689 100644
--- a/OvmfPkg/OvmfPkgIa32.fdf
+++ b/OvmfPkg/OvmfPkgIa32.fdf
@@ -227,6 +227,9 @@ INF  OvmfPkg/VirtioRngDxe/VirtioRng.inf
 INF  OvmfPkg/XenIoPciDxe/XenIoPciDxe.inf
 INF  OvmfPkg/XenBusDxe/XenBusDxe.inf
 INF  OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
+!if $(PVSCSI_ENABLE) == TRUE
+  INF  OvmfPkg/PvScsiDxe/PvScsiDxe.inf
+!endif
 
 !if $(SECURE_BOOT_ENABLE) == TRUE
   INF  
SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 3c0c229e3a72..744f7eb05e12 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -44,6 +44,11 @@
 
 !include NetworkPkg/NetworkDefines.dsc.inc
 
+  #
+  # Device drivers
+  #
+  DEFINE PVSCSI_ENABLE   = TRUE
+
   #
   # Flash size selection. Setting FD_SIZE_IN_KB on the command line directly to
   # one of the supported values, in place of any of the convenience macros, is
@@ -731,6 +736,9 @@
   OvmfPkg/XenIoPciDxe/XenIoPciDxe.inf
   OvmfPkg/XenBusDxe/XenBusDxe.inf
   OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
+!ifdef $(PVSCSI_ENABLE)
+  OvmfPkg/PvScsiDxe/PvScsiDxe.inf
+!endif
   MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
   
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
   MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf
index 0488e5d95ffe..5fd21ea1b2de 100644
--- a/OvmfPkg/OvmfPkgIa32X64.fdf
+++ b/OvmfPkg/OvmfPkgIa32X64.fdf
@@ -228,6 +228,9 @@ INF  OvmfPkg/VirtioRngDxe/VirtioRng.inf
 INF  OvmfPkg/XenIoPciDxe/XenIoPciDxe.inf
 INF  OvmfPkg/XenBusDxe/XenBusDxe.inf
 INF  OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
+!if $(PVSCSI_ENABLE) == TRUE
+  INF  OvmfPkg/PvScsiDxe/PvScsiDxe.inf
+!endif
 
 !if $(SECURE_BOOT_ENABLE) == TRUE
   INF  
SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index f6c1d8d228c6..64ed3d5ec18e 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -44,6 +44,11 @@
 
 !include NetworkPkg/NetworkDefines.dsc.inc
 
+  #
+  # Device drivers
+  #
+  DEFINE PVSCSI_ENABLE   = TRUE
+
   #
   # Flash size selection. Setting FD_SIZE_IN_KB on the command line directly to
   # one of the supported values, in place of any of the convenience macros, is
@@ -729,6 +734,9 @@
   OvmfPkg/XenIoPciDxe/XenIoPciDxe.inf
   OvmfPkg/XenBusDxe/XenBusDxe.inf
   OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
+!ifdef $(PVSCSI_ENABLE)
+  OvmfPkg/PvScsiDxe/PvScsi.inf
+!endif
   MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
   
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
   MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
index 0488e5d95ffe..c155993dc16f 100644
--- a/OvmfPkg/OvmfPkgX64.fdf
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -228,6 +228,9 @@ INF  OvmfPkg/VirtioRngDxe/VirtioRng.inf
 INF  OvmfPkg/XenIoPciDxe/XenIoPciDxe.inf
 INF  OvmfPkg/XenBusDxe/XenBusDxe.inf
 INF  OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
+!if $(PVSCSI_ENABLE) == TRUE
+  INF  OvmfPkg/PvScsiDxe/PvScsi.inf
+!endif
 
 !if $(SECURE_BOOT_ENABLE) == TRUE
   INF  

Re: [edk2-devel] [edk2-platforms] [PATCH v2] Platform/ARM/SgiPkg: Fix constant-logical-operand clang error

[Thomas Abraham]

Reviewed-by: Thomas Abraham 

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Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration

[Ni, Ray]

Ashraf,
Thanks for taking time to review my code! Comments embedded in below.

> -Original Message-
> From: Javeed, Ashraf 
> Sent: Monday, March 16, 2020 5:34 PM
> To: Ni, Ray ; devel@edk2.groups.io
> Cc: Wang, Jian J ; Wu, Hao A 
> Subject: RE: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] 
> PciBusDxe: Setup sub-phases for PCI feature
> enumeration
> 
> Ray,
> First of all, thank you for taking time to review and on optimizing the PCIe 
> feature support in the PciBusDxe.
> 
> I shall not discuss everything in detail here, just want to bring two major 
> points:-
> 
> (1)  commit:- MdePkg: New PCI Express Platform/Override Protocols
> https://github.com/niruiyu/edk2/commit/52524e9654704a7f6a30ca446f215b81fe8f0984
> PCI Express Protocol not as per the ECR draft revision 0.8, the changes made 
> has to be reviewed with updated ECR
> version...

With the code first process, we could firstly finalize the protocol interfaces 
in code then update the ECR.
Code first doesn't mean implementation detail has high priority than protocol 
interfaces. Good quality of protocol interfaces is still desired. The quality 
of the protocol header file is always in high priority.

> the global auto option introduces EFI_PCI_EXPRESS_DEVICE_POLICY_AUTO; is used 
> for MPS, MRRS, RO, NS, AtomicOp, LTR,
> results in no EFI encodings required for these
> features, as it can be used with actual values from the PciXX.h definitions. 
> This do result in lot of code savings.

I take it as an agree of using the global AUTO. Thanks for that.

> 
> (2) commit:- MdeModulePkg/PciBus: Add the framework to init PCIE features
> https://github.com/niruiyu/edk2/commit/9fb9a3dcef06de98a76825e2fc07167446ee6fd9
> The context handling of the PCIe feature MPS has fundamental issue as it is 
> set to be common for all the nodes of the
> parent  Root Bridge instance. The context has to be separate to each first 
> level nodes of a root bridge instance. For
> example, a root bridge has 1 RCiEP and two Root ports, than there has to be 3 
> separate context for each. Since Root port
> can have its Endpoint device, or it can have a PCIe switch with 1 upstream 
> and 2 or more downstream ports and to each
> downstream port an Endpoint device can be connected; the context created for 
> Root Port of an bridge is used for all its
> child hierarchy nodes; thus PCIe feature like Max_Payload_Size value can be 
> specific to each RCiEP, and each Root ports of
> the Root Bridge handle. How do you propose to maintain separate context for 
> just first level nodes of the Root Bridge
> handle?

Supposing a root bridge contains 1 RCiEP and two root ports, the implementation 
ensures there will be 3 separate contexts for each. As you can see, every time 
the code starts enumeration from a RCiEP or a root port, a new Context[] is 
setup. Context[i] is associated with the feature _i_.


> 
> The EnumeratePcieDevices() is recursively calls itself for every PCI node 
> with a level advanced by 1. Thus, the usage of level
> N and N+1 as parent and its child is wrong to me, when you have a PCIe switch 
> below the Root Port, and N & N+1 will not
> be direct relation between the upstream port and its second downstream 
> port...any reason why you have not used the
> PCI_IO_DEVICE.Parent pointer to form relation between the parent and the 
> child?

The level N and N+1 is needed for AtomicOp or Ltr feature (which I need to go 
back to check the code).
I want to avoid the individual feature scan/program routine checks device's 
parent/children.
I understand that in PCIE spec, a switch consists of an upstream port and 
several downstream ports.
It means a switch populates a bridge which connects to the upstream and several 
bridges under the upstream bridge which connect to the downstream.
But from software perspective, I don't think we should care about that.
Maybe I am wrong. Can you please give a real example that treating in my way 
would cause some issues?

> 
> I liked the Pre & Post order flag that is used to processing parent-to-child 
> vs. child-to-parent nodes. 

Actually I didn't have this flag in the first version of my code change. But 
later I found it's needed for some features like LTR which needs to be 
programmed from rootbridge to endpoint according to spec.


> You are calling the first
> and last features as fakes, when you actually parse all the nodes for the 
> GetDevicePolicy() and NotifyDeviceState(); to me it
> is actually an un-named phase where all the nodes are queried or informed to 
> the platform; that seems fine to save the
> NULL on the mPcieFeatures[] table.

Yes I put GetDevicePolicy() and NotifyDeviceState() in the feature array in my 
first version of code. And later I called the two separately for better code 
readability. But it was my fault that I didn't update the commit message. It 
caused confusion to you.

> 
> Thanks
> Ashraf
> 
> > -Original Message-
> > From: Ni, Ray 
> > Sent: Thursday, March 5, 

Re: [edk2-devel] Extend TianoCore Bug Triage - APAC / NAMO Meeting from 0.5 hour to 1 hour

[Liming Gao]

Kevin:
Thanks for your comments. If no other objection, I will start TianoCore Bug 
Triage - APAC / NAMO Meeting on Wednesday morning 9:30AM ~ 10:30AM (UTC +8) 
since this week.

Thanks
Liming
From: devel@edk2.groups.io  On Behalf Of Kevin@Insyde
Sent: 2020年3月13日 2:59
To: Gao, Liming 
Cc: devel@edk2.groups.io; Kinney, Michael D ; 
Guptha, Soumya K ; sean.bro...@microsoft.com
Subject: Re: [edk2-devel] Extend TianoCore Bug Triage - APAC / NAMO Meeting 
from 0.5 hour to 1 hour

That conflicts for me for the first 30 minutes

Kevin D Davis
Security Strategist
Insyde Software
Phone: 503-310-



On Mar 12, 2020, at 9:29 AM, Gao, Liming 
mailto:liming@intel.com>> wrote:

Hi, all
  Recently, regular TianoCore Bug Triage meeting has no enough time to review 
and discuss the existing bugzillas. I would propose to extend this meeting from 
0.5 hour to 1 hour. Now, Bug Triage, Tiano Design and Community meeting are all 
in one day. I have met some conflict to those meeting. Some people may also 
have the conflict. So, I suggest to move TianoCore Bug Triage - APAC / NAMO 
Meeting to Wednesday morning 9:00AM ~ 10:00AM (UTC +8). If you have comments, 
please reply this mail. If no more comments, I will set up the first meeting 
from next week.

Thanks
Liming


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Re: [edk2-devel] EDK II Python development process specification -draft

[Bob Feng]

Hi Kondal ,

I agree the coding guidelines and tools can help improve the python code 
quality, but I think these guidelines in this spec are too general for 
BaseTools. Besides the coding style,  BaseTools has many specific code issues, 
such as the high coupling between modules, not clear module interface, big 
function with hundreds lines, abused global variables. I hope there could be a 
python code design guidelines, for example, how to apply the software design 
principle or the software design pattern in the Basetools development process.

I think this spec itself looks good.

Thanks,
Bob

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Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration

[Javeed, Ashraf]

Ray,
First of all, thank you for taking time to review and on optimizing the PCIe 
feature support in the PciBusDxe.

I shall not discuss everything in detail here, just want to bring two major 
points:-

(1)  commit:- MdePkg: New PCI Express Platform/Override Protocols
https://github.com/niruiyu/edk2/commit/52524e9654704a7f6a30ca446f215b81fe8f0984
PCI Express Protocol not as per the ECR draft revision 0.8, the changes made 
has to be reviewed with updated ECR version...
the global auto option introduces EFI_PCI_EXPRESS_DEVICE_POLICY_AUTO; is used 
for MPS, MRRS, RO, NS, AtomicOp, LTR, results in no EFI encodings required for 
these 
features, as it can be used with actual values from the PciXX.h definitions. 
This do result in lot of code savings. 

(2) commit:- MdeModulePkg/PciBus: Add the framework to init PCIE features
https://github.com/niruiyu/edk2/commit/9fb9a3dcef06de98a76825e2fc07167446ee6fd9
The context handling of the PCIe feature MPS has fundamental issue as it is set 
to be common for all the nodes of the parent  Root Bridge instance. The context 
has to be separate to each first level nodes of a root bridge instance. For 
example, a root bridge has 1 RCiEP and two Root ports, than there has to be 3 
separate context for each. Since Root port can have its Endpoint device, or it 
can have a PCIe switch with 1 upstream and 2 or more downstream ports and to 
each downstream port an Endpoint device can be connected; the context created 
for Root Port of an bridge is used for all its child hierarchy nodes; thus PCIe 
feature like Max_Payload_Size value can be specific to each RCiEP, and each 
Root ports of the Root Bridge handle. How do you propose to maintain separate 
context for just first level nodes of the Root Bridge handle?

The EnumeratePcieDevices() is recursively calls itself for every PCI node with 
a level advanced by 1. Thus, the usage of level N and N+1 as parent and its 
child is wrong to me, when you have a PCIe switch below the Root Port, and N & 
N+1 will not be direct relation between the upstream port and its second 
downstream port...any reason why you have not used the PCI_IO_DEVICE.Parent 
pointer to form relation between the parent and the child?

I liked the Pre & Post order flag that is used to processing parent-to-child 
vs. child-to-parent nodes. You are calling the first and last features as 
fakes, when you actually parse all the nodes for the GetDevicePolicy() and 
NotifyDeviceState(); to me it is actually an un-named phase where all the nodes 
are queried or informed to the platform; that seems fine to save the NULL on 
the mPcieFeatures[] table.

Thanks
Ashraf

> -Original Message-
> From: Ni, Ray 
> Sent: Thursday, March 5, 2020 7:43 PM
> To: devel@edk2.groups.io; Ni, Ray ; Javeed, Ashraf
> 
> Cc: Wang, Jian J ; Wu, Hao A
> 
> Subject: RE: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH
> 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration
> 
> Ashraf,
> I think it might be better to describe my review comments with code
> implementation.
> Can you please check this branch where I did some modification based on
> your code?
> https://github.com/niruiyu/edk2/tree/pci/pcie2
> 
> Let's firstly align on the feature initialization framework implementation.
> To be specific, this commit:
> MdeModulePkg/PciBus: Add the framework to init PCIE features
> https://github.com/niruiyu/edk2/commit/9fb9a3dcef06de98a76825e2fc0
> 7167446ee6fd9
> 
> Thanks,
> Ray
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Ni,
> Ray
> > Sent: Thursday, December 19, 2019 1:49 PM
> > To: Javeed, Ashraf ; devel@edk2.groups.io
> > Cc: Wang, Jian J ; Wu, Hao A
> > 
> > Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH
> > 05/12]
> > PciBusDxe: Setup sub-phases for PCI feature enumeration
> >
> > After I reviewed the patch of enabling MaxPayloadSize, MaxReadReqSize
> > and more PCIE features, I can now understand the phases more than
> > earlier.
> >
> > Your patch proposed five phases:
> >   //
> >   // initial phase in configuring the other PCI features to record the
> primary
> >   // root ports
> >   //
> >   PciFeatureRootBridgeScan,
> >   //
> >   // get the PCI device-specific platform policies and align with device
> capabilities
> >   //
> >   PciFeatureGetDevicePolicy,
> >   //
> >   // align all PCI nodes in the PCI heirarchical tree
> >   //
> >   PciFeatureSetupPhase,
> >   //
> >   // finally override to complete configuration of the PCI feature
> >   //
> >   PciFeatureConfigurationPhase,
> >   //
> >   // PCI feature configuration complete
> >   //
> >   PciFeatureConfigurationComplete
> >
> >
> > I have several comments to the five phases.
> > 1. Scan phase is not do the scanning but creates a list to hold all
> > root ports under the root bridge.
> > 2. Root ports collection is not required by all of the features, only
> > by MPS and MRRS.
> > But the collection always happens even when platform doesn't require
> >