Re: [edk2-devel] [PATCH v5 1/1] CryptoPkg: Add new hash algorithm ParallelHash256HashAll in BaseCryptLib.
Thanks. It is close to final version, but there are some compatibility issue need to be address. 1) Whenever you add a new field in the data structure, please add it at the end. Don't add them in the middle. E.g. PCD_CRYPTO_SERVICE_FAMILY_ENABLE, _EDKII_CRYPTO_PROTOCOL 2) Whenever you add a new field for a data structure, please remember to increase the version. E.g. EDKII_CRYPTO_VERSION 3) Please clarify if you have tested the CrytoLibOnProtocol version code. Thank you Yao Jiewen > -Original Message- > From: devel@edk2.groups.io On Behalf Of Li, Zhihao > Sent: Wednesday, March 9, 2022 4:44 PM > To: devel@edk2.groups.io > Cc: Yao, Jiewen ; Wang, Jian J ; > Lu, Xiaoyu1 ; Jiang, Guomin ; > Fu, Siyuan > Subject: [edk2-devel] [PATCH v5 1/1] CryptoPkg: Add new hash algorithm > ParallelHash256HashAll in BaseCryptLib. > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3596 > > Parallel hash function ParallelHash256HashAll, as defined in NIST's > Special Publication 800-185, published December 2016. It utilizes > multi-process to calculate the digest. > > Some modifications to pass CI test. > > Cc: Jiewen Yao > Cc: Jian J Wang > Cc: Xiaoyu Lu > Cc: Guomin Jiang > Cc: Siyuan Fu > Cc: Zhihao Li > > Signed-off-by: Zhihao Li > --- > CryptoPkg/Driver/Crypto.c | 36 > ++- > CryptoPkg/Library/BaseCryptLib/Hash/CryptCShake256.c | 282 > > CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.c | 278 > +++ > CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHashNull.c | 40 > +++ > CryptoPkg/Library/BaseCryptLib/Hash/CryptSha3.c | 166 > > CryptoPkg/Library/BaseCryptLib/Hash/CryptXkcp.c | 107 > > CryptoPkg/Library/BaseCryptLibNull/Hash/CryptParallelHashNull.c | 40 > +++ > CryptoPkg/Library/BaseCryptLibOnProtocolPpi/CryptLib.c| 34 > ++- > CryptoPkg/Test/UnitTest/Library/BaseCryptLib/ParallelhashTests.c | 145 > ++ > CryptoPkg/CryptoPkg.ci.yaml | 4 > +- > CryptoPkg/Include/Library/BaseCryptLib.h | 31 > ++- > CryptoPkg/Include/Pcd/PcdCryptoServiceFamilyEnable.h | 8 > +- > CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 3 > +- > CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.h | 201 > ++ > CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf| 3 > +- > CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf| 3 > +- > CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf| 8 > +- > CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 > +- > CryptoPkg/Library/Include/CrtLibSupport.h | 3 > +- > CryptoPkg/Private/Protocol/Crypto.h | 31 > +++ > CryptoPkg/Test/CryptoPkgHostUnitTest.dsc | 3 + > CryptoPkg/Test/UnitTest/Library/BaseCryptLib/TestBaseCryptLibHost.inf | 4 + > 22 files changed, 1422 insertions(+), 11 deletions(-) > > diff --git a/CryptoPkg/Driver/Crypto.c b/CryptoPkg/Driver/Crypto.c > index d5d6aa8e5820..35312e0818a0 100644 > --- a/CryptoPkg/Driver/Crypto.c > +++ b/CryptoPkg/Driver/Crypto.c > @@ -3,7 +3,7 @@ >from BaseCryptLib and TlsLib. > > > >Copyright (C) Microsoft Corporation. All rights reserved. > > - Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. > > + Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved. > >SPDX-License-Identifier: BSD-2-Clause-Patent > > > > **/ > > @@ -1314,6 +1314,38 @@ CryptoServiceSha512HashAll ( >return CALL_BASECRYPTLIB (Sha512.Services.HashAll, Sha512HashAll, (Data, > DataSize, HashValue), FALSE); > > } > > > > +/** > > + Parallel hash function ParallelHash256, as defined in NIST's Special > Publication > 800-185, > > + published December 2016. > > + > > + @param[in] InputPointer to the input message (X). > > + @param[in] InputByteLen The number(>0) of input bytes provided for > the > input data. > > + @param[in] BlockSizeThe size of each block (B). > > + @param[out] Output Pointer to the output buffer. > > + @param[in] OutputByteLenThe desired number of output bytes (L). > > + @param[in] CustomizationPointer to the customization string (S). > > + @param[in] CustomByteLenThe length of the customization string in > bytes. > > + > > + @retval TRUE ParallelHash256 digest computation succeeded. > > + @retval FALSE ParallelHash256 digest computation failed. > > + @retval FALSE This interface is not supported. > > + > > +**/ > > +BOOLEAN > > +EFIAPI > > +CryptoServiceParallelHash256HashAll ( > > + IN CONST VOID
[edk2-devel] [PATCH v2] BaseTools/GenFw: Enhance GenFw to support PRM GCC build
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3802
Since PRM module needs to support export table in PE-COFF, we'll
enhance GenFw tool to support this.
Add one export flag in GenFw tool. If export flag is set:
Step1: Scan ELF symbol table based on PRM module descriptor to get
descriptor offset address;
Step2: Find PRM handlers number and name in COFF file based on the
address from step1;
Step3: Write PRM info such as handler name and export RVA into COFF
export table.
PRM option currently only supports DXE RUNTIME driver and X64 arch.
Cc: Liming Gao
Cc: Bob Feng
Cc: Yuwei Chen
Signed-off-by: Lixia Huang
---
BaseTools/Source/C/GenFw/Elf64Convert.c | 242 +-
BaseTools/Source/C/GenFw/ElfConvert.c | 8 +
BaseTools/Source/C/GenFw/ElfConvert.h | 43 +++-
BaseTools/Source/C/GenFw/GenFw.c | 20 +-
.../C/Include/IndustryStandard/PeImage.h | 7 +
5 files changed, 315 insertions(+), 5 deletions(-)
diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c
b/BaseTools/Source/C/GenFw/Elf64Convert.c
index 0bb3ead228..2aa9bfcc94 100644
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -56,6 +56,12 @@ WriteDebug64 (
VOID
);
+STATIC
+VOID
+WriteExport64 (
+ VOID
+ );
+
STATIC
VOID
SetImageSize64 (
@@ -106,7 +112,7 @@ STATIC UINT32 mCoffAlignment = 0x20;
//
// PE section alignment.
//
-STATIC const UINT16 mCoffNbrSections = 4;
+STATIC UINT16 mCoffNbrSections = 4;
//
// ELF sections to offset in Coff file.
@@ -122,7 +128,7 @@ STATIC UINT32 mDataOffset;
STATIC UINT32 mHiiRsrcOffset;
STATIC UINT32 mRelocOffset;
STATIC UINT32 mDebugOffset;
-
+STATIC UINT32 mExportOffset;
//
// Used for RISC-V relocations.
//
@@ -132,6 +138,14 @@ STATIC Elf64_Half mRiscVPass1SymSecIndex = 0;
STATIC INT32 mRiscVPass1Offset;
STATIC INT32 mRiscVPass1GotFixup;
+//
+// Used for Export section.
+//
+STATIC UINT32 mExportSize;
+STATIC UINT32 mExportRVA[PRM_MODULE_EXPORT_SYMBOL_NUM];
+STATIC UINT32 mExportSymNum;
+STATIC CHAR8
mExportSymName[PRM_MODULE_EXPORT_SYMBOL_NUM][PRM_HANDLER_NAME_MAXIMUM_LENGTH];
+
//
// Initialization Function
//
@@ -171,6 +185,13 @@ InitializeElf64 (
return FALSE;
}
+ if (mExportFlag) {
+if (mEhdr->e_machine != EM_X86_64) {
+ Error (NULL, 0, 3000, "Unsupported", "--prm option currently only
supports X64 arch.");
+ return FALSE;
+}
+ }
+
//
// Update section header pointers
//
@@ -200,6 +221,11 @@ InitializeElf64 (
ElfFunctions->SetImageSize = SetImageSize64;
ElfFunctions->CleanUp = CleanUp64;
+ if (mExportFlag) {
+mCoffNbrSections ++;
+ElfFunctions->WriteExport = WriteExport64;
+ }
+
return TRUE;
}
@@ -263,6 +289,17 @@ IsHiiRsrcShdr (
return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset + Shdr->sh_name,
ELF_HII_SECTION_NAME) == 0);
}
+STATIC
+BOOLEAN
+IsSymbolShdr (
+ Elf_Shdr *Shdr
+ )
+{
+ Elf_Shdr *Namehdr = GetShdrByIndex(mEhdr->e_shstrndx);
+
+ return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namehdr->sh_offset + Shdr->sh_name,
ELF_SYMBOL_SECTION_NAME) == 0);
+}
+
STATIC
BOOLEAN
IsDataShdr (
@@ -335,6 +372,37 @@ GetSymName (
return StrtabContents + Sym->st_name;
}
+//
+// Get Prm Handler number and name
+//
+STATIC
+VOID
+FindPrmHandler (
+ UINT64 Offset
+ )
+{
+ PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT_HEADER *PrmExport;
+ PRM_HANDLER_EXPORT_DESCRIPTOR_STRUCT *PrmHandler;
+ UINT32 HandlerNum;
+
+ PrmExport = (PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT_HEADER*)((UINT8*)mEhdr +
Offset);
+ PrmHandler = (PRM_HANDLER_EXPORT_DESCRIPTOR_STRUCT *)(PrmExport + 1);
+
+ for (HandlerNum = 0; HandlerNum < PrmExport->NumberPrmHandlers;
HandlerNum++) {
+strcpy(mExportSymName[mExportSymNum], PrmHandler->PrmHandlerName);
+mExportSymNum ++;
+PrmHandler += 1;
+
+//
+// Check if PRM handler number is larger than
(PRM_MODULE_EXPORT_SYMBOL_NUM - 1)
+//
+if (mExportSymNum >= (PRM_MODULE_EXPORT_SYMBOL_NUM - 1)) {
+ Error (NULL, 0, 3000, "Invalid", "FindPrmHandler: Number %u is too
high.", mExportSymNum);
+ exit(EXIT_FAILURE);
+}
+ }
+}
+
//
// Find the ELF section hosting the GOT from an ELF Rva
// of a single GOT entry. Normally, GOT is placed in
@@ -717,6 +785,7 @@ ScanSections64 (
UINT32 CoffEntry;
UINT32 SectionCount;
BOOLEAN FoundSection;
+ UINT32 Offset;
CoffEntry = 0;
mCoffOffset = 0;
@@ -880,6 +949,82 @@ ScanSections64 (
Warning (NULL, 0, 0, NULL, "Multiple sections in %s are merged into 1 data
section. Source level debug might not work correctly.", mInImageName);
}
+ //
+ // The Symbol sections.
+ //
+ if (mExportFlag) {
+UINT32 SymIndex;
+Elf_Sym *Sym;
+UINT64 SymNum;
+const UINT8 *SymName;
+
+mExportOffset = mCoffOffset;
+mExportSize =
Re: [edk2-devel] [PATCH v1 1/1] DynamicTablesPkg: Fix serial port namespace path in DBG2
Hi Sami,
The patch is tested and looks good to me:
Tested-by: Jagadeesh Ujja
On Fri, Mar 11, 2022 at 6:38 PM PierreGondois wrote:
>
> Hi Sami,
> The patch looks good to me:
>
> Reviewed-by: Pierre Gondois
>
> On 3/10/22 18:39, Sami Mujawar wrote:
> > According to the Debug Port Table 2 (DBG2) specification,
> > February 17, 2021, the NamespaceString is a NULL terminated
> > ASCII string that consists of a fully qualified reference
> > to the object that represents the serial port device in the
> > ACPI namespace.
> >
> > The DBG2 table generator did not populate the full device
> > path for the serial port device, and this results in a FWTS
> > test failure.
> >
> > Therefore, populate the full namespace device path for the
> > serial port in DBG2 table.
> >
> > Signed-off-by: Sami Mujawar
> > ---
> > The changes can be seen at:
> > https://github.com/samimujawar/edk2/tree/2105_dbg2_generator_namestring_issue_v1
> >
> > DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c | 10
> > +++---
> > 1 file changed, 7 insertions(+), 3 deletions(-)
> >
> > diff --git
> > a/DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c
> > b/DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c
> > index
> > 3d513dbd1fbe8c47d270a9e639b2797098201d91..f6dfb3d94c10980a0e7712ce9427648b69974061
> > 100644
> > --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c
> > +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c
> > @@ -1,7 +1,7 @@
> > /** @file
> > DBG2 Table Generator
> >
> > - Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.
> > + Copyright (c) 2017 - 2022, Arm Limited. All rights reserved.
> >
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > @@ -55,13 +55,17 @@ Requirements:
> > */
> > #define NAME_STR_DBG_PORT0 "COM0"
> >
> > +/** A string representing the full path name of the debug port 0.
> > +*/
> > +#define NAMESPACE_STR_DBG_PORT0 "\\_SB_.COM0"
> > +
> > /** An UID representing the debug port 0.
> > */
> > #define UID_DBG_PORT0 0
> >
> > /** The length of the namespace string.
> > */
> > -#define DBG2_NAMESPACESTRING_FIELD_SIZE sizeof (NAME_STR_DBG_PORT0)
> > +#define DBG2_NAMESPACESTRING_FIELD_SIZE sizeof (NAMESPACE_STR_DBG_PORT0)
> >
> > /** The PL011 UART address range length.
> > */
> > @@ -166,7 +170,7 @@ DBG2_TABLE AcpiDbg2 = {
> > 0,// {Template}: Serial Port Subtype
> > 0,// {Template}: Serial Port Base Address
> > PL011_UART_LENGTH,
> > - NAME_STR_DBG_PORT0
> > + NAMESPACE_STR_DBG_PORT0
> > )
> > }
> > };
>
>
>
>
>
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[edk2-devel][PATCH] IntelFsp2Pkg: BaseFspCommonLib Support for X64
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3867
Add BaseFspCommonLib Support for X64.
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Star Zeng
Cc: Ashraf Ali S
Signed-off-by: Ted Kuo
---
IntelFsp2Pkg/FspSecCore/SecFsp.c | 2 +-
IntelFsp2Pkg/FspSecCore/SecFsp.h | 2 +-
IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
IntelFsp2Pkg/Include/Library/FspCommonLib.h| 6 +-
.../Library/BaseFspCommonLib/FspCommonLib.c| 65 +-
5 files changed, 45 insertions(+), 32 deletions(-)
diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
index f79d45900e..68e588dd41 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -217,7 +217,7 @@ FspGlobalDataInit (
**/
VOID
FspDataPointerFixUp (
- IN UINT32 OffsetGap
+ IN UINTN OffsetGap
)
{
FSP_GLOBAL_DATA *NewFspData;
diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.h b/IntelFsp2Pkg/FspSecCore/SecFsp.h
index aacd32f7f7..7c9be85fe0 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.h
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.h
@@ -61,7 +61,7 @@ FspGlobalDataInit (
**/
VOID
FspDataPointerFixUp (
- IN UINT32 OffsetGap
+ IN UINTN OffsetGap
);
/**
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
b/IntelFsp2Pkg/Include/FspGlobalData.h
index 71033121c4..2b534075ae 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -42,7 +42,7 @@ typedef struct {
UINT32 Signature;
UINT8 Version;
UINT8 Reserved1[3];
- UINT32 CoreStack;
+ UINTN CoreStack;
UINT32 StatusCode;
UINT32 Reserved2[8];
FSP_PLAT_DATA PlatformData;
diff --git a/IntelFsp2Pkg/Include/Library/FspCommonLib.h
b/IntelFsp2Pkg/Include/Library/FspCommonLib.h
index c70039d9e8..b5e38568e2 100644
--- a/IntelFsp2Pkg/Include/Library/FspCommonLib.h
+++ b/IntelFsp2Pkg/Include/Library/FspCommonLib.h
@@ -38,7 +38,7 @@ GetFspGlobalDataPointer (
@retval ApiParameter FSP API first parameter passed by the bootloader.
**/
-UINT32
+UINTN
EFIAPI
GetFspApiParameter (
VOID
@@ -49,7 +49,7 @@ GetFspApiParameter (
@retval ApiParameter FSP API second parameter passed by the bootloader.
**/
-UINT32
+UINTN
EFIAPI
GetFspApiParameter2 (
VOID
@@ -87,7 +87,7 @@ SetFspApiParameter (
VOID
EFIAPI
SetFspApiReturnStatus (
- IN UINT32 ReturnStatus
+ IN UINTN ReturnStatus
);
/**
diff --git a/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
b/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
index 8f8453915e..cd10b63c95 100644
--- a/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
@@ -30,21 +30,34 @@ typedef struct {
UINT16IdtrLimit;
UINT32IdtrBase;
UINT16Reserved;
- UINT32Edi;
- UINT32Esi;
- UINT32Ebp;
- UINT32Esp;
- UINT32Ebx;
- UINT32Edx;
- UINT32Ecx;
- UINT32Eax;
+ UINT32Registers[8]; // General Purpose Registers: Edi, Esi, Ebp, Esp,
Ebx, Edx, Ecx and Eax
UINT16Flags[2];
UINT32FspInfoHeader;
UINT32ApiRet;
UINT32ApiParam[2];
} CONTEXT_STACK;
-#define CONTEXT_STACK_OFFSET(x) (UINT32)&((CONTEXT_STACK *)(UINTN)0)->x
+//
+// API return address +0xB0
+// pushAPI Parameter2 +0xA8
+// pushAPI Parameter1 +0xA0
+// pushFspInfoHeader+0x98
+// pushfq +0x90
+// cli
+// PUSHA_64 +0x10
+// sub rsp, 16 +0x00
+// sidt[rsp]
+//
+typedef struct {
+ UINT64Idtr[2];// IDTR Limit - bit0:bi15, IDTR Base - bit16:bit79
+ UINT64Registers[16]; // General Purpose Registers: RDI, RSI, RBP, RSP,
RBX, RDX, RCX, RAX, and R15 to R8
+ UINT32Flags[2];
+ UINT64FspInfoHeader;
+ UINT64ApiParam[2];
+ UINT64ApiRet; // 64bit stack format is different from the 32bit
one due to x64 calling convention
+} CONTEXT_STACK_64;
+
+#define CONTEXT_STACK_OFFSET(x) (sizeof(UINTN) == sizeof (UINT32) ?
(UINTN)&((CONTEXT_STACK *)(UINTN)0)->x : (UINTN)&((CONTEXT_STACK_64
*)(UINTN)0)->x)
#pragma pack()
@@ -85,7 +98,7 @@ GetFspGlobalDataPointer (
@retval ApiParameter FSP API first parameter passed by the bootloader.
**/
-UINT32
+UINTN
EFIAPI
GetFspApiParameter (
VOID
@@ -94,7 +107,7 @@ GetFspApiParameter (
FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer ();
- return *(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET
(ApiParam[0]));
+ return *(UINTN *)(FspData->CoreStack + CONTEXT_STACK_OFFSET (ApiParam[0]));
}
/**
@@ -119,7 +132,7 @@ GetFspEntryStack (
@retval ApiParameter FSP API second parameter passed by the bootloader.
**/
-UINT32
+UINTN
EFIAPI
GetFspApiParameter2 (
VOID
@@ -128,7 +141,7 @@ GetFspApiParameter2 (
FSP_GLOBAL_DATA *FspData;
FspData =
Re: [edk2-devel] [PATCH EDK2 v1 1/1] UefiCpuPkg/MpInitLib:remove optional in declaration
Reviewed-by: Ray Ni -Original Message- From: devel@edk2.groups.io On Behalf Of wenyi,xie via groups.io Sent: Thursday, March 10, 2022 4:06 PM To: devel@edk2.groups.io; Dong, Eric ; Ni, Ray ; Kumar, Rahul1 Cc: songdongku...@huawei.com; xiewen...@huawei.com Subject: [edk2-devel] [PATCH EDK2 v1 1/1] UefiCpuPkg/MpInitLib:remove optional in declaration To keep the declaration same with definition, remove the last optional in declaration of WakeUpAP. Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Signed-off-by: Wenyi Xie --- UefiCpuPkg/Library/MpInitLib/MpLib.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h index 7d84a56fbc51..f8c52426dd5f 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -477,7 +477,7 @@ WakeUpAP ( IN UINTN ProcessorNumber, IN EFI_AP_PROCEDURE Procedure OPTIONAL, IN VOID *ProcedureArgument OPTIONAL, - IN BOOLEAN WakeUpDisabledAps OPTIONAL + IN BOOLEAN WakeUpDisabledAps ); /** -- 2.20.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#87527): https://edk2.groups.io/g/devel/message/87527 Mute This Topic: https://groups.io/mt/89682107/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH] UefiPayloadPkg: Fix build error
I don't understand the need of "+ DEFINE PLATFORMX64_ENABLE = TRUE".
-Original Message-
From: devel@edk2.groups.io On Behalf Of Sean Rhodes
Sent: Friday, March 11, 2022 9:41 PM
To: devel@edk2.groups.io
Cc: Dong, Guo ; Ni, Ray ; Ma, Maurice
; You, Benjamin
Subject: [edk2-devel] [PATCH] UefiPayloadPkg: Fix build error
From: Guo Dong
On windows build, need add -DPLATFORMX64_ENABLE=TRUE in the build
command line beside -DNETWORK_DRIVER_ENABLE=TRUE in order build
network features. So set PLATFORMX64_ENABLE to TRUE when need build
network feature.
On Linux build, DSC file should not have PcdAllowHttpConnections
when network feature is not built, else would cause build error.
Cc: Guo Dong
Cc: Ray Ni
Cc: Maurice Ma
Cc: Benjamin You
Signed-off-by: Guo Dong
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 4
1 file changed, 4 insertions(+)
diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc
b/UefiPayloadPkg/UefiPayloadPkg.dsc
index 558513baf1..f3806a8ebc 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -407,7 +407,9 @@
[PcdsPatchableInModule.X64]
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister|$(RTC_INDEX_REGISTER)
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|$(RTC_TARGET_REGISTER)
+!if $(NETWORK_DRIVER_ENABLE) == TRUE
gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
+!endif
[PcdsPatchableInModule.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c,
0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
@@ -530,6 +532,8 @@
# UEFI network modules
#
!if $(NETWORK_DRIVER_ENABLE) == TRUE
+[Defines]
+ DEFINE PLATFORMX64_ENABLE = TRUE
!include NetworkPkg/Network.dsc.inc
!endif
--
2.32.0
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Re: [edk2-devel] [PATCH v2] BaseTools/GenFw: Enhance GenFw to support PRM GCC build
Hi Liming,
BZ link is added.
PRM option currently only supports DXE RUNTIME driver and X64 arch, GenFw
will report error message if PRM option is specified for other arch or other
module type.
Thanks.
Regards,
Lisa
-Original Message-
From: devel@edk2.groups.io On Behalf Of gaoliming
Sent: 2022年3月1日 9:52
To: devel@edk2.groups.io; Huang, Li-Xia
Cc: Feng, Bob C ; Chen, Christine
Subject: 回复: [edk2-devel] [PATCH v2] BaseTools/GenFw: Enhance GenFw to support
PRM GCC build
Lisa:
Please add BZ link for this patch.
And, if PRM option currently only supports DXE RUNTIME driver and X64 arch,
does GenFw report error message if PRM option is specified for other arch or
other module type?
Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Huang, Li-Xia
> 发送时间: 2022年2月28日 9:14
> 收件人: devel@edk2.groups.io
> 抄送: Lixia Huang ; Liming Gao
> ; Bob Feng ; Yuwei
> Chen
> 主题: [edk2-devel] [PATCH v2] BaseTools/GenFw: Enhance GenFw to support
> PRM GCC build
>
> Since PRM module needs to support export table in PE-COFF, we'll
> enhance GenFw tool to support this.
>
> Add one export flag in GenFw tool. If export flag is set:
> Step1: Scan ELF symbol table based on PRM module descriptor to get
> descriptor offset address;
> Step2: Find PRM handlers number and name in COFF file based on the
> address from step1;
> Step3: Write PRM info such as handler name and export RVA into COFF
> export table.
>
> PRM option currently only supports DXE RUNTIME driver and X64 arch.
>
> Change-Id: I479b7c8b23beea12b5c567677688aef6f7af2085
> Cc: Liming Gao
> Cc: Bob Feng
> Cc: Yuwei Chen
> Signed-off-by: Lixia Huang
> ---
> BaseTools/Source/C/GenFw/Elf64Convert.c | 242
> +-
> BaseTools/Source/C/GenFw/ElfConvert.c | 8 +
> BaseTools/Source/C/GenFw/ElfConvert.h | 43 +++-
> BaseTools/Source/C/GenFw/GenFw.c | 20 +-
> .../C/Include/IndustryStandard/PeImage.h | 7 +
> 5 files changed, 315 insertions(+), 5 deletions(-)
>
> diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c
> b/BaseTools/Source/C/GenFw/Elf64Convert.c
> index 0bb3ead228..2aa9bfcc94 100644
> --- a/BaseTools/Source/C/GenFw/Elf64Convert.c
> +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
> @@ -56,6 +56,12 @@ WriteDebug64 (
>VOID
>
>);
>
>
>
> +STATIC
>
> +VOID
>
> +WriteExport64 (
>
> + VOID
>
> + );
>
> +
>
> STATIC
>
> VOID
>
> SetImageSize64 (
>
> @@ -106,7 +112,7 @@ STATIC UINT32 mCoffAlignment = 0x20; //
>
> // PE section alignment.
>
> //
>
> -STATIC const UINT16 mCoffNbrSections = 4;
>
> +STATIC UINT16 mCoffNbrSections = 4;
>
>
>
> //
>
> // ELF sections to offset in Coff file.
>
> @@ -122,7 +128,7 @@ STATIC UINT32 mDataOffset; STATIC UINT32
> mHiiRsrcOffset;
>
> STATIC UINT32 mRelocOffset;
>
> STATIC UINT32 mDebugOffset;
>
> -
>
> +STATIC UINT32 mExportOffset;
>
> //
>
> // Used for RISC-V relocations.
>
> //
>
> @@ -132,6 +138,14 @@ STATIC Elf64_Half mRiscVPass1SymSecIndex = 0;
> STATIC INT32 mRiscVPass1Offset;
>
> STATIC INT32 mRiscVPass1GotFixup;
>
>
>
> +//
>
> +// Used for Export section.
>
> +//
>
> +STATIC UINT32 mExportSize;
>
> +STATIC UINT32
> mExportRVA[PRM_MODULE_EXPORT_SYMBOL_NUM];
>
> +STATIC UINT32 mExportSymNum;
>
> +STATIC CHAR8
> mExportSymName[PRM_MODULE_EXPORT_SYMBOL_NUM][PRM_HANDLE
> R_NAME_MAXIMUM_LENGTH];
>
> +
>
> //
>
> // Initialization Function
>
> //
>
> @@ -171,6 +185,13 @@ InitializeElf64 (
> return FALSE;
>
>}
>
>
>
> + if (mExportFlag) {
>
> +if (mEhdr->e_machine != EM_X86_64) {
>
> + Error (NULL, 0, 3000, "Unsupported", "--prm option currently
> + only
> supports X64 arch.");
>
> + return FALSE;
>
> +}
>
> + }
>
> +
>
>//
>
>// Update section header pointers
>
>//
>
> @@ -200,6 +221,11 @@ InitializeElf64 (
>ElfFunctions->SetImageSize = SetImageSize64;
>
>ElfFunctions->CleanUp = CleanUp64;
>
>
>
> + if (mExportFlag) {
>
> +mCoffNbrSections ++;
>
> +ElfFunctions->WriteExport = WriteExport64;
>
> + }
>
> +
>
>return TRUE;
>
> }
>
>
>
> @@ -263,6 +289,17 @@ IsHiiRsrcShdr (
>return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namedr->sh_offset +
> Shdr->sh_name, ELF_HII_SECTION_NAME) == 0);
>
> }
>
>
>
> +STATIC
>
> +BOOLEAN
>
> +IsSymbolShdr (
>
> + Elf_Shdr *Shdr
>
> + )
>
> +{
>
> + Elf_Shdr *Namehdr = GetShdrByIndex(mEhdr->e_shstrndx);
>
> +
>
> + return (BOOLEAN) (strcmp((CHAR8*)mEhdr + Namehdr->sh_offset +
> Shdr->sh_name, ELF_SYMBOL_SECTION_NAME) == 0);
>
> +}
>
> +
>
> STATIC
>
> BOOLEAN
>
> IsDataShdr (
>
> @@ -335,6 +372,37 @@ GetSymName (
>return StrtabContents + Sym->st_name;
>
> }
>
>
>
> +//
>
> +// Get Prm Handler number and name
>
> +//
>
> +STATIC
>
> +VOID
>
> +FindPrmHandler (
>
> + UINT64 Offset
>
> + )
>
> +{
>
> + PRM_MODULE_EXPORT_DESCRIPTOR_STRUCT_HEADER *PrmExport;
>
> +
[edk2-devel][PATCH v2] IntelFsp2Pkg: BaseFspSwitchStackLib Support for X64
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3832
Add BaseFspSwitchStackLib Support for X64.
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Star Zeng
Cc: Ashraf Ali S
Signed-off-by: Ted Kuo
---
IntelFsp2Pkg/Include/PushPopRegsNasm.inc | 67
.../BaseFspSwitchStackLib.inf | 5 +-
.../BaseFspSwitchStackLib/FspSwitchStackLib.c | 8 +--
.../Library/BaseFspSwitchStackLib/X64/Stack.nasm | 72 ++
4 files changed, 147 insertions(+), 5 deletions(-)
create mode 100644 IntelFsp2Pkg/Include/PushPopRegsNasm.inc
create mode 100644 IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm
diff --git a/IntelFsp2Pkg/Include/PushPopRegsNasm.inc
b/IntelFsp2Pkg/Include/PushPopRegsNasm.inc
new file mode 100644
index 00..ec103940d8
--- /dev/null
+++ b/IntelFsp2Pkg/Include/PushPopRegsNasm.inc
@@ -0,0 +1,67 @@
+;--
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Provide macro to push/pop registers in X64
+;
+;--
+
+;-
+; Macro:PUSHA_64
+;
+; Description: Saves all registers on stack
+;
+; Input:None
+;
+; Output: None
+;-
+%macro PUSHA_64 0
+ pushr8
+ pushr9
+ pushr10
+ pushr11
+ pushr12
+ pushr13
+ pushr14
+ pushr15
+ pushrax
+ pushrcx
+ pushrdx
+ pushrbx
+ pushrsp
+ pushrbp
+ pushrsi
+ pushrdi
+%endmacro
+
+;-
+; Macro:POPA_64
+;
+; Description: Restores all registers from stack
+;
+; Input:None
+;
+; Output: None
+;-
+%macro POPA_64 0
+ poprdi
+ poprsi
+ poprbp
+ poprsp
+ poprbx
+ poprdx
+ poprcx
+ poprax
+ popr15
+ popr14
+ popr13
+ popr12
+ popr11
+ popr10
+ popr9
+ popr8
+%endmacro
+
diff --git
a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
index 3dcf3b9598..6909aec651 100644
--- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
@@ -15,12 +15,15 @@
VERSION_STRING = 1.0
LIBRARY_CLASS = FspSwitchStackLib
-[Sources.IA32]
+[Sources]
FspSwitchStackLib.c
[Sources.IA32]
Ia32/Stack.nasm
+[Sources.X64]
+ X64/Stack.nasm
+
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
index 618c25c3b0..dae4e27172 100644
--- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
@@ -20,16 +20,16 @@
**/
-UINT32
+UINTN
SwapStack (
- IN UINT32 NewStack
+ IN UINTN NewStack
)
{
FSP_GLOBAL_DATA *FspData;
- UINT32 OldStack;
+ UINTNOldStack;
FspData= GetFspGlobalDataPointer ();
OldStack = FspData->CoreStack;
- FspData->CoreStack = NewStack;
+ FspData->CoreStack = (UINTN) NewStack;
return OldStack;
}
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm
new file mode 100644
index 00..bd36fe4b8b
--- /dev/null
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm
@@ -0,0 +1,72 @@
+;--
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Switch the stack from temporary memory to permanent memory.
+;
+;--
+
+SECTION .text
+
+%include"PushPopRegsNasm.inc"
+
+extern ASM_PFX(SwapStack)
+
+;--
+; UINT32
+; EFIAPI
+; Pei2LoaderSwitchStack (
+; VOID
+; )
+;--
+global ASM_PFX(Pei2LoaderSwitchStack)
+ASM_PFX(Pei2LoaderSwitchStack):
+xor rax, rax
+jmp ASM_PFX(FspSwitchStack)
+
+;--
+; UINT32
+; EFIAPI
+; Loader2PeiSwitchStack (
+; VOID
+; )
Re: [edk2-devel] [PATCH] Maintainers: Update Maintainers.txt for edk2 Redfish modules
Reviewed-by: Ray Ni -Original Message- From: devel@edk2.groups.io On Behalf Of Chang, Abner (HPS SW/FW Technologist) Sent: Monday, March 14, 2022 9:21 AM To: devel@edk2.groups.io Cc: Andrew Fish ; Ni, Ray ; Wang, Nickle Subject: [edk2-devel] [PATCH] Maintainers: Update Maintainers.txt for edk2 Redfish modules Add maintainer and reviewer for the edk2 Redfish-related modules under EmulatorPkg. Signed-off-by: Abner Chang Cc: Andrew Fish Cc: Ray Ni Cc: Nickle Wang --- Maintainers.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index d26f91c02e..e32507dd6e 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -194,6 +194,11 @@ M: Andrew Fish [ajfish] M: Ray Ni [niruiyu] S: Maintained +EmulatorPkg: Redfish-related modules +F: EmulatorPkg/*Redfish* +M: Abner Chang [changab] +R: Nickle Wang [nicklela] + FatPkg F: FatPkg/ W: https://github.com/tianocore/tianocore.github.io/wiki/Edk2-fat-driver -- 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#87523): https://edk2.groups.io/g/devel/message/87523 Mute This Topic: https://groups.io/mt/89765382/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel][PATCH v2] IntelFsp2Pkg: BaseFspDebugLibSerialPort Support for X64
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3833
Add BaseFspDebugLibSerialPort Support for X64.
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Star Zeng
Cc: Ashraf Ali S
Cc: Ted Kuo
Signed-off-by: Ted Kuo
---
.../BaseFspDebugLibSerialPort.inf | 5 ++-
.../Library/BaseFspDebugLibSerialPort/DebugLib.c | 39 +-
.../BaseFspDebugLibSerialPort/X64/FspDebug.nasm| 25 ++
3 files changed, 53 insertions(+), 16 deletions(-)
create mode 100644
IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm
diff --git
a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.inf
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.inf
index 14b1899e6c..395def57c3 100644
---
a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.inf
+++
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.inf
@@ -16,7 +16,7 @@
LIBRARY_CLASS = DebugLib
#
-# VALID_ARCHITECTURES = IA32
+# VALID_ARCHITECTURES = IA32 X64
#
[Sources]
@@ -25,6 +25,9 @@
[Sources.Ia32]
Ia32/FspDebug.nasm
+[Sources.X64]
+ X64/FspDebug.nasm
+
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
index c8824cde7f..cb2317bfb2 100644
--- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
@@ -33,7 +33,7 @@ VA_LIST mVaListNull;
@return StackFramePointer stack frame pointer of function call.
**/
-UINT32 *
+UINTN *
EFIAPI
GetStackFramePointer (
VOID
@@ -193,13 +193,13 @@ DebugBPrint (
**/
VOID
FillHex (
- UINT32 Value,
+ UINTN Value,
CHAR8 *Buffer
)
{
INTN Idx;
- for (Idx = 7; Idx >= 0; Idx--) {
+ for (Idx = (sizeof (UINTN) * 2) - 1; Idx >= 0; Idx--) {
Buffer[Idx] = mHexTable[Value & 0x0F];
Value >>= 4;
}
@@ -228,26 +228,35 @@ DebugAssertInternal (
)
{
CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
- UINT32 *Frame;
+ UINTN *Frame;
- Frame = (UINT32 *)GetStackFramePointer ();
+ Frame = (UINTN *)GetStackFramePointer ();
//
// Generate the ASSERT() message in Ascii format
//
- AsciiStrnCpyS (
-Buffer,
-sizeof (Buffer) / sizeof (CHAR8),
-"-> EBP:0x EIP:0x\n",
-sizeof (Buffer) / sizeof (CHAR8) - 1
-);
+ if (sizeof (UINTN) == sizeof (UINT32)) {
+AsciiStrnCpyS (
+ Buffer,
+ sizeof (Buffer) / sizeof (CHAR8),
+ "-> EBP:0x EIP:0x\n",
+ sizeof (Buffer) / sizeof (CHAR8) - 1
+ );
+ } else {
+AsciiStrnCpyS (
+ Buffer,
+ sizeof (Buffer) / sizeof (CHAR8),
+ "-> RBP:0x RIP:0x\n",
+ sizeof (Buffer) / sizeof (CHAR8) - 1
+ );
+ }
SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
while (Frame != NULL) {
-FillHex ((UINT32)Frame, Buffer + 9);
-FillHex (Frame[1], Buffer + 9 + 8 + 8);
+FillHex ((UINTN)Frame, Buffer + 9);
+FillHex (Frame[1], Buffer + 9 + (sizeof (UINTN) * 2) + 8);
SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer));
-if ((Frame[0] > (UINT32)Frame) && (Frame[0] < (UINT32)Frame + 0x0010))
{
- Frame = (UINT32 *)Frame[0];
+if ((Frame[0] > (UINTN)Frame) && (Frame[0] < (UINTN)Frame + 0x0010)) {
+ Frame = (UINTN *)Frame[0];
} else {
Frame = NULL;
}
diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm
new file mode 100644
index 00..6cf0f0af8b
--- /dev/null
+++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/X64/FspDebug.nasm
@@ -0,0 +1,25 @@
+;--
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; FSP Debug functions
+;
+;--
+
+SECTION .text
+
+;--
+; UINT32 *
+; EFIAPI
+; GetStackFramePointer (
+; VOID
+; );
+;--
+global ASM_PFX(GetStackFramePointer)
+ASM_PFX(GetStackFramePointer):
+mov rax, rbp
+ret
+
--
2.16.2.windows.1
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[edk2-devel] [PATCH] Maintainers: Update Maintainers.txt for edk2 Redfish modules
Add maintainer and reviewer for the edk2 Redfish-related modules under EmulatorPkg. Signed-off-by: Abner Chang Cc: Andrew Fish Cc: Ray Ni Cc: Nickle Wang --- Maintainers.txt | 5 + 1 file changed, 5 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index d26f91c02e..e32507dd6e 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -194,6 +194,11 @@ M: Andrew Fish [ajfish] M: Ray Ni [niruiyu] S: Maintained +EmulatorPkg: Redfish-related modules +F: EmulatorPkg/*Redfish* +M: Abner Chang [changab] +R: Nickle Wang [nicklela] + FatPkg F: FatPkg/ W: https://github.com/tianocore/tianocore.github.io/wiki/Edk2-fat-driver -- 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#87521): https://edk2.groups.io/g/devel/message/87521 Mute This Topic: https://groups.io/mt/89765382/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v1] MdeModulePkg/DxeIpl: Create 5-level page table for long mode
Reviewed-by: Ray Ni
-Original Message-
From: Lou, Yun
Sent: Friday, March 11, 2022 11:59 PM
To: devel@edk2.groups.io
Cc: Lou, Yun ; Ni, Ray ; Bi, Dandan
; Gao, Liming
Subject: [PATCH v1] MdeModulePkg/DxeIpl: Create 5-level page table for long mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2008
Correct the logic about whether 5-level paging is supported.
Signed-off-by: Jason Lou
Cc: Ray Ni
Cc: Dandan Bi
Cc: Liming Gao
---
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index 0700f310b2..1ebab27820 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -15,7 +15,7 @@
2) IA-32 Intel(R) Architecture Software Developer's Manual Volume
2:Instruction Set Reference, Intel
3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System
Programmer's Guide, Intel
-Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -748,8 +748,8 @@ CreateIdentityMappingPageTables (
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
NULL,
- ,
NULL,
+ ,
NULL
);
if (EcxFlags.Bits.FiveLevelPage != 0) {
--
2.28.0.windows.1
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