Re: [edk2-devel] [RFC PATCH V2 10/19] UefiCpuPkg: Add RISC-V support in DxeCpuExceptionHandlerLib

[Sunil V L]

Hi Ray,

I have updated the series as per your suggestion
(https://edk2.groups.io/g/devel/message/97440). Patches 5/23 - 9/23 are
for UefiCpuPkg. Please review and let me know if this is acceptable
approach.

Thanks
Sunil

On Wed, Dec 14, 2022 at 12:37:04PM +, Ni, Ray wrote:
> No.
> I agree that rename can avoid confusion in future but that will cause lots of 
> build break in all x86 platforms.
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Leif Lindholm
> > Sent: Wednesday, December 14, 2022 5:39 PM
> > To: Ni, Ray 
> > Cc: Sunil V L ; devel@edk2.groups.io; Wang, Jian 
> > J ; Gao, Liming
> > ; Dong, Eric ; Kumar, Rahul 
> > R ; De,
> > Debkumar ; West, Catharine 
> > ; Daniel Schaefer
> > ; Abner Chang ; Andrew Fish 
> > ; Ard Biesheuvel
> > ; Heinrich Schuchardt ; 
> > Anup Patel 
> > Subject: Re: [edk2-devel] [RFC PATCH V2 10/19] UefiCpuPkg: Add RISC-V 
> > support in DxeCpuExceptionHandlerLib
> > 
> > Hi Ray,
> > 
> > Should we then consider renaming DxeCpuExceptionHandlerLib
> > DxeCpuExceptionHandlerLibIA32X64?
> > 
> > Best Regards,
> > 
> > Leif
> > 
> > 
> > On Thu, Dec 08, 2022 at 08:32:31 +, Ni, Ray wrote:
> > > Yes. I am not sure if the preference for modules in other packages.
> > > But for code in UefiCpuPkg, I don't prefer this way.
> > >
> > > Thanks,
> > > Ray
> > >
> > > > -Original Message-
> > > > From: Sunil V L 
> > > > Sent: Thursday, December 8, 2022 12:58 PM
> > > > To: devel@edk2.groups.io; Ni, Ray 
> > > > Cc: Wang, Jian J ; Gao, Liming
> > > > ; Dong, Eric ; Kumar,
> > > > Rahul R ; De, Debkumar
> > > > ; West, Catharine ;
> > > > Daniel Schaefer ; Abner Chang
> > > > ; Leif Lindholm ;
> > > > Andrew Fish ; Ard Biesheuvel ;
> > > > Heinrich Schuchardt ; Anup Patel
> > > > 
> > > > Subject: Re: [edk2-devel] [RFC PATCH V2 10/19] UefiCpuPkg: Add RISC-V
> > > > support in DxeCpuExceptionHandlerLib
> > > >
> > > > On Thu, Dec 08, 2022 at 12:30:04AM +, Ni, Ray wrote:
> > > > > Sunil,
> > > > > Is there any source code sharing between Risc-V and IA32X64?
> > > > > From the patch, I cannot see any.
> > > > > If that's the case, I would prefer we don't mix the two separate
> > > > implementations together into one component.
> > > > > Can you please create a new CpuExceptionHandlerLib instance for Risc-V
> > > > instead of including the Risc-V sources into the existing INF?
> > > > >
> > > > Thank you very much Ray. Sure. That approach is also fine with me.
> > > >
> > > > BTW, https://edk2.groups.io/g/devel/message/95726 was the latest series.
> > > > Sorry for the confusion. Let me update this series and send new version.
> > > > I think your input is valid for other modules also like TimerLib.
> > > >
> > > > Thanks
> > > > Sunil
> > 
> > 
> > 
> > 
> 
> 
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH] CryptoPkg/IntrinsicLib: RiscV: Provide implementation of memcpy and __ctzdi2

[Sunil V L]

On Thu, Dec 15, 2022 at 09:48:59AM -0800, Tuan Phan wrote:
> The RiscV toolchain doesn't provide __ctzdi2 implementation when
> compiled with -nostdlib that needed by openssl library when EC 
> enabled. So adding the simple implementation of __ctzdi2.
> 
> Forcing to use CopyMem of EDK2 as builtin memcpy disabled for RiscV
> with -fno-builtin-memcpy flag.
> 
Hi Tuan,

Thanks for the patch.

Please add "REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4103"; in
the commit message and add the copyright in the new file created.

Please CC Mike (Michael D Kinney ) and the
maintainers of CryptoPkg.

Acked-by: Sunil V L 

Thanks
Sunil
> Signed-off-by: Tuan Phan 
> ---
>  .../Library/IntrinsicLib/CompilerHelper.c | 41 +++
>  .../Library/IntrinsicLib/IntrinsicLib.inf |  6 ++-
>  2 files changed, 46 insertions(+), 1 deletion(-)
>  create mode 100644 CryptoPkg/Library/IntrinsicLib/CompilerHelper.c
> 
> diff --git a/CryptoPkg/Library/IntrinsicLib/CompilerHelper.c 
> b/CryptoPkg/Library/IntrinsicLib/CompilerHelper.c
> new file mode 100644
> index ..9e700a11ed17
> --- /dev/null
> +++ b/CryptoPkg/Library/IntrinsicLib/CompilerHelper.c
> @@ -0,0 +1,41 @@
> +/** @file
> +  Implement functions that not available when compiled with -nostdlib flag.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +unsigned int
> +__ctzdi2 (unsigned long long x)
> +{
> +  unsigned int ret = 0;
> +
> +  if (!x) {
> +return 64;
> +  }
> +  if (!(x & 0x)) {
> +x >>= 32;
> +ret |= 32;
> +  }
> +  if (!(x & 0x)) {
> +x >>= 16;
> +ret |= 16;
> +  }
> +  if (!(x & 0xff)) {
> +x >>= 8;
> +ret |= 8;
> +  }
> +  if (!(x & 0xf)) {
> +x >>= 4;
> +ret |= 4;
> +  }
> +  if (!(x & 0x3)) {
> +x >>= 2;
> +ret |= 2;
> +  }
> +  if (!(x & 0x1)) {
> +x >>= 1;
> +ret |= 1;
> +  }
> +  return ret;
> +}
> diff --git a/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf 
> b/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
> index 86e74b57b109..6796b39b07cf 100644
> --- a/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
> +++ b/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
> @@ -18,7 +18,7 @@
>  #
>  # The following information is for reference only and not required by the 
> build tools.
>  #
> -#  VALID_ARCHITECTURES   = IA32 X64
> +#  VALID_ARCHITECTURES   = IA32 X64 RISCV64
>  #
>  
>  [Sources]
> @@ -43,6 +43,10 @@
>  [Sources.X64]
>CopyMem.c
>  
> +[Sources.RISCV64]
> +  CopyMem.c
> +  CompilerHelper.c
> +
>  [Packages]
>MdePkg/MdePkg.dec
>  
> -- 
> 2.25.1
> 


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Re: [edk2-devel] [PATCH v2 0/3] OvmfPkg: Make IntelTdx work with Cloud Hypervisor

[Yao, Jiewen]

Merged: https://github.com/tianocore/edk2/pull/3778

> -Original Message-
> From: Boeuf, Sebastien 
> Sent: Thursday, December 15, 2022 11:10 PM
> To: devel@edk2.groups.io
> Cc: Yao, Jiewen ; Xu, Min M ;
> kra...@redhat.com; Boeuf, Sebastien 
> Subject: [PATCH v2 0/3] OvmfPkg: Make IntelTdx work with Cloud Hypervisor
> 
> From: Sebastien Boeuf 
> 
> The IntelTdxX64 OVMF target wasn't working with Cloud Hypervisor on TDX
> platform. This was due to the way the OVMF code expects Cloud Hypervisor
> to rely on PVH to retrieve information like memory below 4GiB as well as
> the ACPI tables.
> 
> This is why this series takes care of identifying when running on TDX in
> order to handle things differently. For the memory below 4GiB, it falls
> back onto the CMOS to retrieve the correct information, and for the ACPI
> tables, it relies on the HOB to obtain every table individually before
> to expose them to the guest OS.
> 
> With these two use cases properly handled by this series, it is now
> possible to use the IntelTdxX64 target to build an OVMF binary that
> works both for QEMU and Cloud Hypervisor on a TDX platform.
> 
> Sebastien Boeuf (3):
>   OvmfPkg/PlatformInitLib: Differentiate TDX case for Cloud Hypervisor
>   OvmfPkg/PlatformInitLib: Transfer GUID Extension HOB
>   OvmfPkg/AcpiPlatformDxe: Differentiate TDX case for Cloud Hypervisor
> 
>  ArmVirtPkg/ArmVirtQemu.dsc  |  1 +
>  OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c  |  8 +-
>  OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h  |  6 ++
>  OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf |  3 +
>  OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c   | 87 +
>  OvmfPkg/Library/PlatformInitLib/IntelTdx.c  |  5 ++
>  OvmfPkg/Library/PlatformInitLib/MemDetect.c |  5 +-
>  OvmfPkg/OvmfPkg.dec |  1 +
>  8 files changed, 114 insertions(+), 2 deletions(-)
> 
> --
> 2.34.1



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[edk2-devel] [PATCH 3/3] UefiCpuPkg: Simplify the code to set smm page table as RO

[duntan]

Simplify the code to set memory used by smm page table as RO.
Since memory used by smm page table are in PageTablePool list,
we only need to set all PageTablePool as ReadOnly in smm page
table itself. Also, we only need to flush tlb once after
setting all page table pool as Read Only.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   | 123 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h |  19 ++-
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 134 
++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 170 
--
 4 files changed, 152 insertions(+), 294 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index 26efa71eff..26bbba77b0 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -10,24 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include "PiSmmCpuDxeSmm.h"
 
-/**
-  Disable CET.
-**/
-VOID
-EFIAPI
-DisableCet (
-  VOID
-  );
-
-/**
-  Enable CET.
-**/
-VOID
-EFIAPI
-EnableCet (
-  VOID
-  );
-
 /**
   Create PageTable for SMM use.
 
@@ -221,111 +203,6 @@ Exit:
 }
 
 /**
-  This function sets memory attribute for page table.
-**/
-VOID
-SetPageTableAttributes (
-  VOID
-  )
-{
-  UINTNIndex2;
-  UINTNIndex3;
-  UINT64   *L1PageTable;
-  UINT64   *L2PageTable;
-  UINT64   *L3PageTable;
-  UINTNPageTableBase;
-  BOOLEAN  IsSplitted;
-  BOOLEAN  PageTableSplitted;
-  BOOLEAN  CetEnabled;
-
-  //
-  // Don't mark page table to read-only if heap guard is enabled.
-  //
-  //  BIT2: SMM page guard enabled
-  //  BIT3: SMM pool guard enabled
-  //
-  if ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0) {
-DEBUG ((DEBUG_INFO, "Don't mark page table to read-only as heap guard is 
enabled\n"));
-return;
-  }
-
-  //
-  // Don't mark page table to read-only if SMM profile is enabled.
-  //
-  if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
-DEBUG ((DEBUG_INFO, "Don't mark page table to read-only as SMM profile is 
enabled\n"));
-return;
-  }
-
-  DEBUG ((DEBUG_INFO, "SetPageTableAttributes\n"));
-
-  //
-  // Disable write protection, because we need mark page table to be write 
protected.
-  // We need *write* page table memory, to mark itself to be *read only*.
-  //
-  CetEnabled = ((AsmReadCr4 () & CR4_CET_ENABLE) != 0) ? TRUE : FALSE;
-  if (CetEnabled) {
-//
-// CET must be disabled if WP is disabled.
-//
-DisableCet ();
-  }
-
-  AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP);
-
-  do {
-DEBUG ((DEBUG_INFO, "Start...\n"));
-PageTableSplitted = FALSE;
-
-PageTableBase = AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64;
-L3PageTable   = (UINT64 *)PageTableBase;
-
-SmmSetMemoryAttributesEx (PageTableBase, FALSE, 
(EFI_PHYSICAL_ADDRESS)PageTableBase, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);
-PageTableSplitted = (PageTableSplitted || IsSplitted);
-
-for (Index3 = 0; Index3 < 4; Index3++) {
-  L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & ~mAddressEncMask & 
PAGING_4K_ADDRESS_MASK_64);
-  if (L2PageTable == NULL) {
-continue;
-  }
-
-  SmmSetMemoryAttributesEx (PageTableBase, FALSE, 
(EFI_PHYSICAL_ADDRESS)(UINTN)L2PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);
-  PageTableSplitted = (PageTableSplitted || IsSplitted);
-
-  for (Index2 = 0; Index2 < SIZE_4KB/sizeof (UINT64); Index2++) {
-if ((L2PageTable[Index2] & IA32_PG_PS) != 0) {
-  // 2M
-  continue;
-}
-
-L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & ~mAddressEncMask 
& PAGING_4K_ADDRESS_MASK_64);
-if (L1PageTable == NULL) {
-  continue;
-}
-
-SmmSetMemoryAttributesEx (PageTableBase, FALSE, 
(EFI_PHYSICAL_ADDRESS)(UINTN)L1PageTable, SIZE_4KB, EFI_MEMORY_RO, &IsSplitted);
-PageTableSplitted = (PageTableSplitted || IsSplitted);
-  }
-}
-  } while (PageTableSplitted);
-
-  //
-  // Enable write protection, after page table updated.
-  //
-  AsmWriteCr0 (AsmReadCr0 () | CR0_WP);
-  if (CetEnabled) {
-//
-// re-enable CET.
-//
-EnableCet ();
-  }
-  mIsReadOnlyPageTable = TRUE;
-
-  return;
-}
-
-/**
-  This function returns with no action for 32 bit.
 
   @param[out]  *Cr2  Pointer to variable to hold CR2 register value.
 **/
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index a0daaa1900..5f0a38e400 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxe

[edk2-devel] [PATCH 2/3] UefiCpuPkg: Remove unused API in SmmCpuFeaturesLib.h

[duntan]

Remove SmmCpuFeaturesAllocatePageTableMemory in this headfile.
This API is not used by PiSmmCpuDxeSmm driver any more. Also
no other files use this API.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h | 25 -
 1 file changed, 25 deletions(-)

diff --git a/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h 
b/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h
index 54cae865a2..52160c7145 100644
--- a/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h
+++ b/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h
@@ -386,29 +386,4 @@ SmmCpuFeaturesCompleteSmmReadyToLock (
   VOID
   );
 
-/**
-  This API provides a method for a CPU to allocate a specific region for 
storing page tables.
-
-  This API can be called more once to allocate memory for page tables.
-
-  Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns 
a pointer to the
-  allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If 
Pages is 0, then NULL
-  is returned.  If there is not enough memory remaining to satisfy the 
request, then NULL is
-  returned.
-
-  This function can also return NULL if there is no preference on where the 
page tables are allocated in SMRAM.
-
-  @param  Pages The number of 4 KB pages to allocate.
-
-  @return A pointer to the allocated buffer for page tables.
-  @retval NULL  Fail to allocate a specific region for storing page tables,
-Or there is no preference on where the page tables are 
allocated in SMRAM.
-
-**/
-VOID *
-EFIAPI
-SmmCpuFeaturesAllocatePageTableMemory (
-  IN UINTN  Pages
-  );
-
 #endif
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH 1/3] UefiCpuPkg/PiSmmCpuDxeSmm: Introduce page table pool mechanism

[duntan]

Introduce page table pool mechanism for smm page table to simplify
page table memory management and protection. This mechanism has been
used in DxeIpl. The basic idea is to allocate a bunch of continuous
pages of memory in advance, and all future page tables consumption
will happen in those pool instead of system memory.
Since we have centralized page tables, we only need to mark all page
table pools as RO, instead of searching page table memory layer by
layer in smm page table. Once current page table pool has been used
up, another memory pool will be allocated and the new pool will also
be set as RO if current page table memory has been marked as RO.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   |   1 +
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c |  30 
--
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h |  13 +
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 122 
++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c|   1 +
 5 files changed, 137 insertions(+), 30 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index 97058a2810..26efa71eff 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -319,6 +319,7 @@ SetPageTableAttributes (
 //
 EnableCet ();
   }
+  mIsReadOnlyPageTable = TRUE;
 
   return;
 }
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 37e3cfc449..655175a2c6 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -1322,36 +1322,6 @@ ConfigSmmCodeAccessCheck (
   }
 }
 
-/**
-  This API provides a way to allocate memory for page table.
-
-  This API can be called more once to allocate memory for page tables.
-
-  Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns 
a pointer to the
-  allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If 
Pages is 0, then NULL
-  is returned.  If there is not enough memory remaining to satisfy the 
request, then NULL is
-  returned.
-
-  @param  Pages The number of 4 KB pages to allocate.
-
-  @return A pointer to the allocated buffer or NULL if allocation fails.
-
-**/
-VOID *
-AllocatePageTableMemory (
-  IN UINTN  Pages
-  )
-{
-  VOID  *Buffer;
-
-  Buffer = SmmCpuFeaturesAllocatePageTableMemory (Pages);
-  if (Buffer != NULL) {
-return Buffer;
-  }
-
-  return AllocatePages (Pages);
-}
-
 /**
   Allocate pages for code.
 
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 0bfba7e359..a0daaa1900 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -260,12 +260,25 @@ extern UINTN mNumberOfCpus;
 extern EFI_SMM_CPU_PROTOCOL  mSmmCpu;
 extern EFI_MM_MP_PROTOCOLmSmmMp;
 extern BOOLEAN   m5LevelPagingNeeded;
+extern BOOLEAN   mIsReadOnlyPageTable;
 
 ///
 /// The mode of the CPU at the time an SMI occurs
 ///
 extern UINT8  mSmmSaveStateRegisterLma;
 
+#define PAGE_TABLE_POOL_ALIGNMENT   BASE_128KB
+#define PAGE_TABLE_POOL_UNIT_SIZE   BASE_128KB
+#define PAGE_TABLE_POOL_UNIT_PAGES  EFI_SIZE_TO_PAGES 
(PAGE_TABLE_POOL_UNIT_SIZE)
+#define PAGE_TABLE_POOL_ALIGN_MASK  \
+  (~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
+
+typedef struct {
+  VOID *NextPool;
+  UINTNOffset;
+  UINTNFreePages;
+} PAGE_TABLE_POOL;
+
 //
 // SMM CPU Protocol function prototypes.
 //
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
index 773ab927e6..8f0c6410e6 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c
@@ -35,6 +35,128 @@ PAGE_ATTRIBUTE_TABLE  mPageAttributeTable[] = {
 BOOLEAN  mIsShadowStack  = FALSE;
 BOOLEAN  m5LevelPagingNeeded = FALSE;
 
+//
+// Global variable to keep track current available memory used as page table.
+//
+PAGE_TABLE_POOL  *mPageTablePool = NULL;
+
+//
+// If memory used by SMM page table has been mareked as ReadOnly.
+//
+BOOLEAN  mIsReadOnlyPageTable = FALSE;
+
+/**
+  Initialize a buffer pool for page table use only.
+
+  To reduce the potential split operation on page table, the pages reserved for
+  page table should be allocated in the times of PAGE_TABLE_POOL_UNIT_PAGES and
+  at the boundary of PAGE_TABLE_POOL_ALIGNMENT. So the page pool is always
+  initialized with number of pages greater than or equal to the given 
PoolPages.
+
+  Once the pages in the pool are used up, this method should be called again to
+  reserve at least another PAGE_TABLE_POOL_UNIT_PAGES. But usually this wo

[edk2-devel] [PATCH 0/3] Introduce page table pool mechanism in SMM page table

[duntan]

1.Introduce page table pool mechanism in SMM page table
2.Remove unused API in SmmCpuFeaturesLib.h
3.Simplify the code to set smm page table as RO

Dun Tan (3):
  UefiCpuPkg/PiSmmCpuDxeSmm: Introduce page table pool mechanism
  UefiCpuPkg: Remove unused API in SmmCpuFeaturesLib.h
  UefiCpuPkg: Simplify the code to set smm page table as RO

 UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h |  25 
-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c   | 122 
--
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c |  30 
--
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h |  30 
++
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 256 

 UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c| 169 
-
 6 files changed, 286 insertions(+), 346 deletions(-)

-- 
2.31.1.windows.1



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Re: [edk2-devel] [PATCH v3 00/14] Fix new typos reported

[Dongdong Zhang]

Hi Michael,

Thanks for your reminder.

Dongdong
> -原始邮件-发件人:"Michael Kubacki" 
> 发送时间:2022-12-16 00:40:44 
> (星期五)收件人:devel@edk2.groups.io抄送:"Alexei Fedorov" , 
> "Ankit Sinha" , "Ard Biesheuvel" 
> , "Dongdong Zhang" 
> , "Gerd Hoffmann" , 
> "Guomin Jiang" , "Jiewen Yao" , 
> "Leif Lindholm" , "Liming Gao" 
> , "Michael D Kinney" , 
> "Nate DeSimone" , "Ray Ni" 
> , "Sami Mujawar" , "Sean Brogan" 
> , "Supreeth Venkatesh" 
> , "Wei6 Xu" 主题:Re: [PATCH v3 
> 00/14] Fix new typos reported
> 
> This series is revoked.
> 
> Dongdong, if you would like to still submit your patches, you can use 
> your original series.
> 
> Thanks,
> Michael
> 
> On 12/14/2022 5:52 PM, mikub...@linux.microsoft.com wrote:
> > From: Michael Kubacki 
> > 
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3929
> > 
> > The 5.21.0 SpellCheck plugin update originally caused new typos to
> > be reported that were originally missed.
> > 
> > These patches were deferred at the time. There's been renewed
> > interest in getting these changes in to continue to improve spelling
> > consistency in the codebase so it is rebased, integrates new patches,
> > and updates the cspell version.
> > 
> > V3 changes:
> >1. Rebase series (and reopen BZ 3929)
> >2. Add patches from Dongdong Zhang
> >3. Update cspell and node versions
> >4. Disable spellcheck audit mode in ArmPkg and ArmVirtPkg
> > 
> > V2 changes:
> >1. Complete BZ 3929.
> >2. Lock the cspell version to v5.20.0 to prevent latest from
> >   unexpectedly causing issues in the future.
> >3. Update the common word list in cspell.base.yaml to prevent package
> >   level duplication in the future.
> >4. Set "allowCompoundWords" to "true" to better recognize compound words.
> >4. Include code review tags.
> > 
> > Cc: Alexei Fedorov 
> > Cc: Ankit Sinha 
> > Cc: Ard Biesheuvel 
> > Cc: Dongdong Zhang 
> > Cc: Gerd Hoffmann 
> > Cc: Guomin Jiang 
> > Cc: Jiewen Yao 
> > Cc: Leif Lindholm 
> > Cc: Liming Gao 
> > Cc: Michael D Kinney 
> > Cc: Michael Kubacki 
> > Cc: Nate DeSimone 
> > Cc: Ray Ni 
> > Cc: Sami Mujawar 
> > Cc: Sean Brogan 
> > Cc: Supreeth Venkatesh 
> > Cc: Wei6 Xu 
> > Signed-off-by: Michael Kubacki 
> > 
> > Dongdong Zhang (3):
> >ArmPkg: Fix typos
> >ArmPlatformPkg: Fix typos
> >ArmVirtPkg: Fix typos
> > 
> > Michael Kubacki (11):
> >PrmPkg: Fix new typos reported
> >StandaloneMmPkg: Fix new typos reported
> >DynamicTablesPkg: Fix new typos reported
> >UnitTestFrameworkPkg: Fix new typos reported
> >FatPkg: Fix new typos reported
> >FmpDevicePkg: Fix new typos reported
> >ArmPkg: Ignore new typos reported
> >ArmVirtPkg: Add new ignored spelling errors
> >.azurepipelines: Update cspell version to 5.21.0
> >ArmPkg: Turn off spellcheck audit mode
> >ArmVirtPkg: Turn off spellcheck audit mode
> > 
> >   ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c   
> >|  2 +-
> >   ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c 
> >| 10 ++--
> >   ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c   
> >|  2 +-
> >   ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c 
> >|  6 +--
> >   ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c   
> >|  2 +-
> >   ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c   
> >|  2 +-
> >   ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.c  
> >|  2 +-
> >   ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
> >|  6 +--
> >   ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c  
> >|  2 +-
> >   ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c
> >|  2 +-
> >   DynamicTablesPkg/Library/Acpi/Arm/AcpiPpttLibArm/PpttGenerator.c  
> >|  2 +-
> >   
> > DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCmn600LibArm/SsdtCmn600Generator.c
> >  |  2 +-
> >   DynamicTablesPkg/Library/Common/AmlLib/Parser/AmlMethodParser.c   
> >|  2 +-
> >   DynamicTablesPkg/Library/Common/AmlLib/Parser/AmlParser.c 
> >|  2 +-
> >   DynamicTablesPkg/Library/Common/AmlLib/Tree/AmlNode.c 
> >|  2 +-
> >   DynamicTablesPkg/Library/Common/DynamicPlatRepoLib/DynamicPlatRepo.c  
> >|  4 +-
> >   DynamicTablesPkg/Library/FdtHwInfoParserLib/Gic/ArmGicDispatcher.c
> >   

Re: [edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control the position of the Logo

[Michael D Kinney]

Hi Sean,

Yes, that is the correct section.  Hard to tell from patch email alone.

There is a git config that can always include the name of the section of the 
INF/DEC/DSC/FDF file where a change is made.
Can make it a bit easier to review.

https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-05

Specifically this one I think:

git config diff.ini.xfuncname '^\[[A-Za-z0-9_., ]+]'

Mike

From: Sean Rhodes 
Sent: Thursday, December 15, 2022 2:17 PM
To: Kinney, Michael D 
Cc: devel@edk2.groups.io; Gao, Zhichao ; Ni, Ray 
; Wang, Jian J ; Gao, Liming 

Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control the 
position of the Logo

Hi Mike

Thank you; changed to PcdGetBool.

It's in `[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]` 
- is that not right?

Thanks

Sean

On Thu, 15 Dec 2022 at 22:09, Kinney, Michael D 
mailto:michael.d.kin...@intel.com>> wrote:
Hi Sean,

A couple comments related to the PCD type below.

Mike

> -Original Message-
> From: devel@edk2.groups.io 
> mailto:devel@edk2.groups.io>> On Behalf Of Sean Rhodes
> Sent: Thursday, December 15, 2022 1:12 PM
> To: devel@edk2.groups.io
> Cc: Rhodes, Sean mailto:sean@starlabs.systems>>; Gao, 
> Zhichao mailto:zhichao@intel.com>>; Ni, Ray 
> mailto:ray...@intel.com>>; Wang, Jian J
> mailto:jian.j.w...@intel.com>>; Gao, Liming 
> mailto:gaolim...@byosoft.com.cn>>
> Subject: [edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control the 
> position of the Logo
>
> When set to true, the Logo is positioned according to the BGRT
> specification, 38.2% from the top of the screen. When set to false,
> no behaviour is changed and the logo is positioned centrally.
>
> Cc: Zhichao Gao mailto:zhichao@intel.com>>
> Cc: Ray Ni mailto:ray...@intel.com>>
> Cc: Jian J Wang mailto:jian.j.w...@intel.com>>
> Cc: Liming Gao mailto:gaolim...@byosoft.com.cn>>
> Signed-off-by: Sean Rhodes 
> mailto:sean@starlabs.systems>>
> ---
>  MdeModulePkg/Logo/Logo.c  | 28 +++-
>  MdeModulePkg/Logo/LogoDxe.inf |  4 
>  MdeModulePkg/MdeModulePkg.dec |  6 ++
>  MdeModulePkg/MdeModulePkg.uni |  6 ++
>  4 files changed, 43 insertions(+), 1 deletion(-)
>
> diff --git a/MdeModulePkg/Logo/Logo.c b/MdeModulePkg/Logo/Logo.c
> index 8ab874d2da..48862d3207 100644
> --- a/MdeModulePkg/Logo/Logo.c
> +++ b/MdeModulePkg/Logo/Logo.c
> @@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #include 
>
>  #include 
>
>  #include 
>
> +#include 
>
>
>
>  typedef struct {
>
>EFI_IMAGE_ID ImageId;
>
> @@ -51,12 +52,14 @@ GetImage (
>IN EDKII_PLATFORM_LOGO_PROTOCOL*This,
>
>IN OUT UINT32  *Instance,
>
>OUT EFI_IMAGE_INPUT*Image,
>
> +  EFI_GRAPHICS_OUTPUT_PROTOCOL   *GraphicsOutput,
>
>OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
>
>OUT INTN   *OffsetX,
>
>OUT INTN   *OffsetY
>
>)
>
>  {
>
> -  UINT32  Current;
>
> +  UINT32  Current;
>
> +  EFI_STATUS  Status;
>
>
>
>if ((Instance == NULL) || (Image == NULL) ||
>
>(Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
>
> @@ -69,6 +72,29 @@ GetImage (
>  return EFI_NOT_FOUND;
>
>}
>
>
>
> +  if (FixedPcdGetBool (PcdFollowMicrosoftRecommended)) {

Should be PcdGetBool().  The only time FixedPcdGetxxx() is required is
if the PCD value is being used to initialize a struct where the value
is needed at build time.  This allows the PCD type to be flexible and
can be set in platform scope in the DSC file.

>
> +//
>
> +// Get current video resolution and text mode
>
> +//
>
> +Status = gBS->HandleProtocol (
>
> +gST->ConsoleOutHandle,
>
> +&gEfiGraphicsOutputProtocolGuid,
>
> +(VOID **)&GraphicsOutput
>
> +);
>
> +if (!EFI_ERROR (Status)) {
>
> +  //
>
> +  // Center of LOGO is in the vertical position 38.2% when 
> PcdBootLogoOnlyEnable is TRUE
>
> +  // Y = (VerticalResolution - LogoHeight) / 2
>
> +  // Y' = VerticalResolution * 0.382 - LogoHeight * 0.5
>
> +  // OffsetY + Y = Y'
>
> +  // OffsetY = Y' - Y = -0.118 * VerticalResolution
>
> +  //
>
> +  *Attribute = EdkiiPlatformLogoDisplayAttributeCenter;
>
> +  *OffsetX   = 0;
>
> +  *OffsetY   = -118 * 
> (INTN)GraphicsOutput->Mode->Info->VerticalResolution / 1000;
>
> +}
>
> +  }
>
> +
>
>(*Instance)++;
>
>*Attribute = mLogos[Current].Attribute;
>
>*OffsetX   = mLogos[Current].OffsetX;
>
> diff --git a/MdeModulePkg/Logo/LogoDxe.inf b/MdeModulePkg/Logo/LogoDxe.inf
> index 41215d25d8..ce29950089 100644
> --- a/MdeModulePkg/Logo/LogoDxe.inf
> +++ b/MdeModulePkg/Logo/LogoDxe

Re: [edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control the position of the Logo

[Sean Rhodes]

Hi Mike

Thank you; changed to PcdGetBool.

It's in `[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic,
PcdsDynamicEx]` - is that not right?

Thanks

Sean

On Thu, 15 Dec 2022 at 22:09, Kinney, Michael D 
wrote:

> Hi Sean,
>
> A couple comments related to the PCD type below.
>
> Mike
>
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Sean
> Rhodes
> > Sent: Thursday, December 15, 2022 1:12 PM
> > To: devel@edk2.groups.io
> > Cc: Rhodes, Sean ; Gao, Zhichao <
> zhichao@intel.com>; Ni, Ray ; Wang, Jian J
> > ; Gao, Liming 
> > Subject: [edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control
> the position of the Logo
> >
> > When set to true, the Logo is positioned according to the BGRT
> > specification, 38.2% from the top of the screen. When set to false,
> > no behaviour is changed and the logo is positioned centrally.
> >
> > Cc: Zhichao Gao 
> > Cc: Ray Ni 
> > Cc: Jian J Wang 
> > Cc: Liming Gao 
> > Signed-off-by: Sean Rhodes 
> > ---
> >  MdeModulePkg/Logo/Logo.c  | 28 +++-
> >  MdeModulePkg/Logo/LogoDxe.inf |  4 
> >  MdeModulePkg/MdeModulePkg.dec |  6 ++
> >  MdeModulePkg/MdeModulePkg.uni |  6 ++
> >  4 files changed, 43 insertions(+), 1 deletion(-)
> >
> > diff --git a/MdeModulePkg/Logo/Logo.c b/MdeModulePkg/Logo/Logo.c
> > index 8ab874d2da..48862d3207 100644
> > --- a/MdeModulePkg/Logo/Logo.c
> > +++ b/MdeModulePkg/Logo/Logo.c
> > @@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> >  #include 
> >
> >  #include 
> >
> >  #include 
> >
> > +#include 
> >
> >
> >
> >  typedef struct {
> >
> >EFI_IMAGE_ID ImageId;
> >
> > @@ -51,12 +52,14 @@ GetImage (
> >IN EDKII_PLATFORM_LOGO_PROTOCOL*This,
> >
> >IN OUT UINT32  *Instance,
> >
> >OUT EFI_IMAGE_INPUT*Image,
> >
> > +  EFI_GRAPHICS_OUTPUT_PROTOCOL   *GraphicsOutput,
> >
> >OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
> >
> >OUT INTN   *OffsetX,
> >
> >OUT INTN   *OffsetY
> >
> >)
> >
> >  {
> >
> > -  UINT32  Current;
> >
> > +  UINT32  Current;
> >
> > +  EFI_STATUS  Status;
> >
> >
> >
> >if ((Instance == NULL) || (Image == NULL) ||
> >
> >(Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
> >
> > @@ -69,6 +72,29 @@ GetImage (
> >  return EFI_NOT_FOUND;
> >
> >}
> >
> >
> >
> > +  if (FixedPcdGetBool (PcdFollowMicrosoftRecommended)) {
>
> Should be PcdGetBool().  The only time FixedPcdGetxxx() is required is
> if the PCD value is being used to initialize a struct where the value
> is needed at build time.  This allows the PCD type to be flexible and
> can be set in platform scope in the DSC file.
>
> >
> > +//
> >
> > +// Get current video resolution and text mode
> >
> > +//
> >
> > +Status = gBS->HandleProtocol (
> >
> > +gST->ConsoleOutHandle,
> >
> > +&gEfiGraphicsOutputProtocolGuid,
> >
> > +(VOID **)&GraphicsOutput
> >
> > +);
> >
> > +if (!EFI_ERROR (Status)) {
> >
> > +  //
> >
> > +  // Center of LOGO is in the vertical position 38.2% when
> PcdBootLogoOnlyEnable is TRUE
> >
> > +  // Y = (VerticalResolution - LogoHeight) / 2
> >
> > +  // Y' = VerticalResolution * 0.382 - LogoHeight * 0.5
> >
> > +  // OffsetY + Y = Y'
> >
> > +  // OffsetY = Y' - Y = -0.118 * VerticalResolution
> >
> > +  //
> >
> > +  *Attribute = EdkiiPlatformLogoDisplayAttributeCenter;
> >
> > +  *OffsetX   = 0;
> >
> > +  *OffsetY   = -118 *
> (INTN)GraphicsOutput->Mode->Info->VerticalResolution / 1000;
> >
> > +}
> >
> > +  }
> >
> > +
> >
> >(*Instance)++;
> >
> >*Attribute = mLogos[Current].Attribute;
> >
> >*OffsetX   = mLogos[Current].OffsetX;
> >
> > diff --git a/MdeModulePkg/Logo/LogoDxe.inf
> b/MdeModulePkg/Logo/LogoDxe.inf
> > index 41215d25d8..ce29950089 100644
> > --- a/MdeModulePkg/Logo/LogoDxe.inf
> > +++ b/MdeModulePkg/Logo/LogoDxe.inf
> > @@ -41,6 +41,7 @@
> >UefiBootServicesTableLib
> >
> >UefiDriverEntryPoint
> >
> >DebugLib
> >
> > +  PcdLib
> >
> >
> >
> >  [Protocols]
> >
> >gEfiHiiDatabaseProtocolGuid## CONSUMES
> >
> > @@ -48,6 +49,9 @@
> >gEfiHiiPackageListProtocolGuid ## PRODUCES CONSUMES
> >
> >gEdkiiPlatformLogoProtocolGuid ## PRODUCES
> >
> >
> >
> > +[Pcd]
> >
> > +  gEfiMdeModulePkgTokenSpaceGuid.PcdFollowMicrosoftRecommended ##
> CONSUMES
> >
> > +
> >
> >  [Depex]
> >
> >gEfiHiiDatabaseProtocolGuid AND
> >
> >gEfiHiiImageExProtocolGuid
> >
> > diff --git a/MdeModulePkg/MdeModulePkg.dec
> b/MdeModulePkg/MdeModulePkg.dec
> > index be5e829ca9..c8bb51df3b 100644
> > --- a/MdeModulePkg/MdeModulePkg.dec
> > +++ b/MdeModulePkg/MdeModulePkg.dec
> > @@ -2102,6 +2102,12 @@
> ># @Prompt The shared bit mask w

Re: [edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control the position of the Logo

[Michael D Kinney]

Hi Sean,

A couple comments related to the PCD type below.

Mike

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sean Rhodes
> Sent: Thursday, December 15, 2022 1:12 PM
> To: devel@edk2.groups.io
> Cc: Rhodes, Sean ; Gao, Zhichao 
> ; Ni, Ray ; Wang, Jian J
> ; Gao, Liming 
> Subject: [edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control the 
> position of the Logo
> 
> When set to true, the Logo is positioned according to the BGRT
> specification, 38.2% from the top of the screen. When set to false,
> no behaviour is changed and the logo is positioned centrally.
> 
> Cc: Zhichao Gao 
> Cc: Ray Ni 
> Cc: Jian J Wang 
> Cc: Liming Gao 
> Signed-off-by: Sean Rhodes 
> ---
>  MdeModulePkg/Logo/Logo.c  | 28 +++-
>  MdeModulePkg/Logo/LogoDxe.inf |  4 
>  MdeModulePkg/MdeModulePkg.dec |  6 ++
>  MdeModulePkg/MdeModulePkg.uni |  6 ++
>  4 files changed, 43 insertions(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Logo/Logo.c b/MdeModulePkg/Logo/Logo.c
> index 8ab874d2da..48862d3207 100644
> --- a/MdeModulePkg/Logo/Logo.c
> +++ b/MdeModulePkg/Logo/Logo.c
> @@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #include 
> 
>  #include 
> 
>  #include 
> 
> +#include 
> 
> 
> 
>  typedef struct {
> 
>EFI_IMAGE_ID ImageId;
> 
> @@ -51,12 +52,14 @@ GetImage (
>IN EDKII_PLATFORM_LOGO_PROTOCOL*This,
> 
>IN OUT UINT32  *Instance,
> 
>OUT EFI_IMAGE_INPUT*Image,
> 
> +  EFI_GRAPHICS_OUTPUT_PROTOCOL   *GraphicsOutput,
> 
>OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
> 
>OUT INTN   *OffsetX,
> 
>OUT INTN   *OffsetY
> 
>)
> 
>  {
> 
> -  UINT32  Current;
> 
> +  UINT32  Current;
> 
> +  EFI_STATUS  Status;
> 
> 
> 
>if ((Instance == NULL) || (Image == NULL) ||
> 
>(Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
> 
> @@ -69,6 +72,29 @@ GetImage (
>  return EFI_NOT_FOUND;
> 
>}
> 
> 
> 
> +  if (FixedPcdGetBool (PcdFollowMicrosoftRecommended)) {

Should be PcdGetBool().  The only time FixedPcdGetxxx() is required is
if the PCD value is being used to initialize a struct where the value
is needed at build time.  This allows the PCD type to be flexible and
can be set in platform scope in the DSC file.

> 
> +//
> 
> +// Get current video resolution and text mode
> 
> +//
> 
> +Status = gBS->HandleProtocol (
> 
> +gST->ConsoleOutHandle,
> 
> +&gEfiGraphicsOutputProtocolGuid,
> 
> +(VOID **)&GraphicsOutput
> 
> +);
> 
> +if (!EFI_ERROR (Status)) {
> 
> +  //
> 
> +  // Center of LOGO is in the vertical position 38.2% when 
> PcdBootLogoOnlyEnable is TRUE
> 
> +  // Y = (VerticalResolution - LogoHeight) / 2
> 
> +  // Y' = VerticalResolution * 0.382 - LogoHeight * 0.5
> 
> +  // OffsetY + Y = Y'
> 
> +  // OffsetY = Y' - Y = -0.118 * VerticalResolution
> 
> +  //
> 
> +  *Attribute = EdkiiPlatformLogoDisplayAttributeCenter;
> 
> +  *OffsetX   = 0;
> 
> +  *OffsetY   = -118 * 
> (INTN)GraphicsOutput->Mode->Info->VerticalResolution / 1000;
> 
> +}
> 
> +  }
> 
> +
> 
>(*Instance)++;
> 
>*Attribute = mLogos[Current].Attribute;
> 
>*OffsetX   = mLogos[Current].OffsetX;
> 
> diff --git a/MdeModulePkg/Logo/LogoDxe.inf b/MdeModulePkg/Logo/LogoDxe.inf
> index 41215d25d8..ce29950089 100644
> --- a/MdeModulePkg/Logo/LogoDxe.inf
> +++ b/MdeModulePkg/Logo/LogoDxe.inf
> @@ -41,6 +41,7 @@
>UefiBootServicesTableLib
> 
>UefiDriverEntryPoint
> 
>DebugLib
> 
> +  PcdLib
> 
> 
> 
>  [Protocols]
> 
>gEfiHiiDatabaseProtocolGuid## CONSUMES
> 
> @@ -48,6 +49,9 @@
>gEfiHiiPackageListProtocolGuid ## PRODUCES CONSUMES
> 
>gEdkiiPlatformLogoProtocolGuid ## PRODUCES
> 
> 
> 
> +[Pcd]
> 
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFollowMicrosoftRecommended ## CONSUMES
> 
> +
> 
>  [Depex]
> 
>gEfiHiiDatabaseProtocolGuid AND
> 
>gEfiHiiImageExProtocolGuid
> 
> diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
> index be5e829ca9..c8bb51df3b 100644
> --- a/MdeModulePkg/MdeModulePkg.dec
> +++ b/MdeModulePkg/MdeModulePkg.dec
> @@ -2102,6 +2102,12 @@
># @Prompt The shared bit mask when Intel Tdx is enabled.
> 
>gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0|UINT64|0x1025
> 
> 
> 
> +  ## This PCD sets the position of the Boot Logo.
> 
> +  #   TRUE  - The Logo is positioned following the recommendations from 
> Microsoft.
> 
> +  #   FALSE - The logo is positioned in the center of the screen.
> 
> +  # @ Prompt This position of the boot logo
> 
> +  
> gEfiMdeModulePkgTokenSpaceGuid.PcdFollowMicrosoftRecommended|FALSE|BOOLEAN|0x1026

Which PCD section is this in?  This PCD should support all PCD

[edk2-devel] [PATCH] MdeModulePkg/Logo: Add a PCD to control the position of the Logo

[Sean Rhodes]

When set to true, the Logo is positioned according to the BGRT
specification, 38.2% from the top of the screen. When set to false,
no behaviour is changed and the logo is positioned centrally.

Cc: Zhichao Gao 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Liming Gao 
Signed-off-by: Sean Rhodes 
---
 MdeModulePkg/Logo/Logo.c  | 28 +++-
 MdeModulePkg/Logo/LogoDxe.inf |  4 
 MdeModulePkg/MdeModulePkg.dec |  6 ++
 MdeModulePkg/MdeModulePkg.uni |  6 ++
 4 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Logo/Logo.c b/MdeModulePkg/Logo/Logo.c
index 8ab874d2da..48862d3207 100644
--- a/MdeModulePkg/Logo/Logo.c
+++ b/MdeModulePkg/Logo/Logo.c
@@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 
 typedef struct {
   EFI_IMAGE_ID ImageId;
@@ -51,12 +52,14 @@ GetImage (
   IN EDKII_PLATFORM_LOGO_PROTOCOL*This,
   IN OUT UINT32  *Instance,
   OUT EFI_IMAGE_INPUT*Image,
+  EFI_GRAPHICS_OUTPUT_PROTOCOL   *GraphicsOutput,
   OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE  *Attribute,
   OUT INTN   *OffsetX,
   OUT INTN   *OffsetY
   )
 {
-  UINT32  Current;
+  UINT32  Current;
+  EFI_STATUS  Status;
 
   if ((Instance == NULL) || (Image == NULL) ||
   (Attribute == NULL) || (OffsetX == NULL) || (OffsetY == NULL))
@@ -69,6 +72,29 @@ GetImage (
 return EFI_NOT_FOUND;
   }
 
+  if (FixedPcdGetBool (PcdFollowMicrosoftRecommended)) {
+//
+// Get current video resolution and text mode
+//
+Status = gBS->HandleProtocol (
+gST->ConsoleOutHandle,
+&gEfiGraphicsOutputProtocolGuid,
+(VOID **)&GraphicsOutput
+);
+if (!EFI_ERROR (Status)) {
+  //
+  // Center of LOGO is in the vertical position 38.2% when 
PcdBootLogoOnlyEnable is TRUE
+  // Y = (VerticalResolution - LogoHeight) / 2
+  // Y' = VerticalResolution * 0.382 - LogoHeight * 0.5
+  // OffsetY + Y = Y'
+  // OffsetY = Y' - Y = -0.118 * VerticalResolution
+  //
+  *Attribute = EdkiiPlatformLogoDisplayAttributeCenter;
+  *OffsetX   = 0;
+  *OffsetY   = -118 * (INTN)GraphicsOutput->Mode->Info->VerticalResolution 
/ 1000;
+}
+  }
+
   (*Instance)++;
   *Attribute = mLogos[Current].Attribute;
   *OffsetX   = mLogos[Current].OffsetX;
diff --git a/MdeModulePkg/Logo/LogoDxe.inf b/MdeModulePkg/Logo/LogoDxe.inf
index 41215d25d8..ce29950089 100644
--- a/MdeModulePkg/Logo/LogoDxe.inf
+++ b/MdeModulePkg/Logo/LogoDxe.inf
@@ -41,6 +41,7 @@
   UefiBootServicesTableLib
   UefiDriverEntryPoint
   DebugLib
+  PcdLib
 
 [Protocols]
   gEfiHiiDatabaseProtocolGuid## CONSUMES
@@ -48,6 +49,9 @@
   gEfiHiiPackageListProtocolGuid ## PRODUCES CONSUMES
   gEdkiiPlatformLogoProtocolGuid ## PRODUCES
 
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFollowMicrosoftRecommended ## CONSUMES
+
 [Depex]
   gEfiHiiDatabaseProtocolGuid AND
   gEfiHiiImageExProtocolGuid
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index be5e829ca9..c8bb51df3b 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -2102,6 +2102,12 @@
   # @Prompt The shared bit mask when Intel Tdx is enabled.
   gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask|0x0|UINT64|0x1025
 
+  ## This PCD sets the position of the Boot Logo.
+  #   TRUE  - The Logo is positioned following the recommendations from 
Microsoft.
+  #   FALSE - The logo is positioned in the center of the screen.
+  # @ Prompt This position of the boot logo
+  
gEfiMdeModulePkgTokenSpaceGuid.PcdFollowMicrosoftRecommended|FALSE|BOOLEAN|0x1026
+
 [PcdsPatchableInModule]
   ## Specify memory size with page number for PEI code when
   #  Loading Module at Fixed Address feature is enabled.
diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni
index 33ce9f6198..09c1ac1cc1 100644
--- a/MdeModulePkg/MdeModulePkg.uni
+++ b/MdeModulePkg/MdeModulePkg.uni
@@ -1338,3 +1338,9 @@
 #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPcieResizableBarSupport_HELP 
#language en-US "Indicates if the PCIe Resizable BAR Capability 
Supported.\n"

 "TRUE  - PCIe Resizable BAR Capability is supported.\n"

 "FALSE - PCIe Resizable BAR Capability is not supported."
+
+#string 
STR_gEfiMdeModulePkgTokenSpaceGuid_PcdFollowMicrosoftRecommended_PROMPT 
#language en-US "The position of the Boot Logo"
+
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdFollowMicrosoftRecommend_HELP   
#language en-US "Sets the position of the Logo. When set to true, the Logo is 
positioned following the recommendations"
+ 

Re: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi profile sync protocol support

[Clark-williams, Zachary]

Hey All,

Anyone able to review the EDK2 Network Pkg patch I've submitted?

The patch is below in the original email. Let me know if you'd like a fresh 
patch file.

Thanks,
Zack

-Original Message-
From: Clark-williams, Zachary 
Sent: Tuesday, December 6, 2022 10:42 AM
To: devel@edk2.groups.io; Rabeda, Maciej ; Zimmer, 
Vincent ; Luo, Heng ; Kuo, 
Scottie ; Kuo, Ted ; Dutkiewicz, 
Michal ; Wu, Jiaxin ; 
Otcheretianski, Andrei ; Kasbekar, Saloni 
; Kinney, Michael D ; 
Klos, Lukasz ; Sulkowski, Michal 

Cc: Alappat, Paul ; Patil, Ajit 
Subject: RE: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi 
profile sync protocol support

++ Michal's coverage Michal and Lukasz

-Original Message-
From: Clark-williams, Zachary 
Sent: Tuesday, December 6, 2022 10:38 AM
To: devel@edk2.groups.io; Clark-williams, Zachary 
; Rabeda, Maciej ; 
Zimmer, Vincent ; Luo, Heng ; 
Kuo, Scottie ; Kuo, Ted ; Dutkiewicz, 
Michal ; Wu, Jiaxin ; 
Otcheretianski, Andrei ; Kasbekar, Saloni 
; Kinney, Michael D 
Cc: Alappat, Paul ; Patil, Ajit 
Subject: RE: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi 
profile sync protocol support

Hey Maciej and All,

Is there any update in ability to review this patch for Wifi Profile Sync 
Protocol and Wifi Connection Manager?

Thank you,
Zack

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Clark-williams, 
Zachary
Sent: Wednesday, November 2, 2022 8:58 AM
To: Rabeda, Maciej ; Zimmer, Vincent 
; Luo, Heng ; Kuo, Scottie 
; Kuo, Ted ; Dutkiewicz, Michal 
; devel@edk2.groups.io; Wu, Jiaxin 
; Otcheretianski, Andrei 
; Kasbekar, Saloni 
; Kinney, Michael D 
Cc: Alappat, Paul ; Patil, Ajit 
Subject: Re: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi 
profile sync protocol support

Hey Maciej,

I can understand that and appreciate the attention you can spare for reviewing 
this change. 
If there are any peers you know who can/will want to review or have valuable 
input on this PR please feel free to send them an invite to review.

Thanks,
Zack

-Original Message-
From: Rabeda, Maciej 
Sent: Wednesday, November 2, 2022 5:35 AM
To: Clark-williams, Zachary ; Zimmer, Vincent 
; Luo, Heng ; Kuo, Scottie 
; Kuo, Ted ; Dutkiewicz, Michal 
; devel@edk2.groups.io; Wu, Jiaxin 
; Otcheretianski, Andrei 
; Kasbekar, Saloni 
; Kinney, Michael D 
Cc: Alappat, Paul ; Patil, Ajit 
Subject: RE: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi 
profile sync protocol support

@Kinney, Michael D
With the amount of work around IPUs, I can hardly spare time (maybe 2h/week on 
average - including code).
My time for EDK2 is currently fully allocated to:
1. https://github.com/tianocore/edk2-staging/tree/HttpProxy (@Kasbekar, Saloni) 
2. NVMe-oF boot prototype under nvme.org umbrella (@Zimmer, Vincent)

@Clark-williams, Zachary
Your patch is non-trivial and requires understanding on my side. Based on that 
and the above, this will take time.

-Original Message-
From: Clark-williams, Zachary 
Sent: Tuesday, November 1, 2022 6:41 PM
To: Zimmer, Vincent ; Rabeda, Maciej 
; Luo, Heng ; Kuo, Scottie 
; Kuo, Ted ; Dutkiewicz, Michal 
; devel@edk2.groups.io; Wu, Jiaxin 
; Otcheretianski, Andrei 
Cc: Alappat, Paul ; Kasbekar, Saloni 
; Patil, Ajit 
Subject: RE: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi 
profile sync protocol support

Great thank you Vincent, I will add them to the protocol header file and send 
an updated patch today.

-Original Message-
From: Zimmer, Vincent 
Sent: Tuesday, November 1, 2022 10:39 AM
To: Clark-williams, Zachary ; Rabeda, Maciej 
; Luo, Heng ; Kuo, Scottie 
; Kuo, Ted ; Dutkiewicz, Michal 
; devel@edk2.groups.io; Wu, Jiaxin 
; Otcheretianski, Andrei 
Cc: Alappat, Paul ; Kasbekar, Saloni 
; Patil, Ajit 
Subject: RE: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi 
profile sync protocol support

That's great
If these links are not already in the .h files of the patch I'd add them.
Typically the uefi networking code leverages uefi spec or ietf rfc's or other 
public collateral.  Letting folks know the background of these interfaces with 
a reference should help consumers IMHO Vincent

-Original Message-
From: Clark-williams, Zachary 
Sent: Tuesday, November 1, 2022 10:35 AM
To: Zimmer, Vincent ; Rabeda, Maciej 
; Luo, Heng ; Kuo, Scottie 
; Kuo, Ted ; Dutkiewicz, Michal 
; devel@edk2.groups.io; Wu, Jiaxin 
; Otcheretianski, Andrei 
Cc: Alappat, Paul ; Kasbekar, Saloni 
; Patil, Ajit 
Subject: RE: [edk2-devel] [PATCH v4] NetworkPkg/WifiProfileSync: Add WiFi 
profile sync protocol support

Hey Vincent,

The documentation for describing the features in the PR description can be 
found in the CSME documentation found on the public accessible intel link below.

OCR - 
https://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide/default.htm?turl=WordDocuments%2Foneclickrecovery.htm

KVM - 
https://software.intel.com/sites/manageability/AMT

Re: [edk2-devel] [PATCH] SecurityPkg: deprecate RpmcLib and VariableKeyLib

[Michael D Kinney]

Acked-by: Michael D Kinney 

Mike

> -Original Message-
> From: Yao, Jiewen 
> Sent: Wednesday, December 14, 2022 7:11 PM
> To: Wang, Jian J ; devel@edk2.groups.io
> Cc: Kinney, Michael D ; Mistry, Nishant C 
> ; Vang, Judah
> 
> Subject: RE: [PATCH] SecurityPkg: deprecate RpmcLib and VariableKeyLib
> 
> Agree.
> Reviewed-by: Jiewen Yao 
> 
> I will wait for 1 work week to see if there is any objection.
> If anyone has concern, please let us know as soon as possible.
> 
> Thank you
> Yao, Jiewen
> 
> > -Original Message-
> > From: Wang, Jian J 
> > Sent: Thursday, December 15, 2022 11:02 AM
> > To: devel@edk2.groups.io
> > Cc: Yao, Jiewen ; Kinney, Michael D
> > ; Mistry, Nishant C
> > ; Vang, Judah 
> > Subject: [PATCH] SecurityPkg: deprecate RpmcLib and VariableKeyLib
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2594
> >
> > There's no real usage of these two libraries. They're deprecated.
> >
> > Cc: Jiewen Yao 
> > Cc: Michael D Kinney 
> > Cc: Nishant C Mistry 
> > Cc: Judah Vang 
> > Signed-off-by: Jian J Wang 
> > ---
> >  SecurityPkg/Include/Library/RpmcLib.h | 42 
> >  SecurityPkg/Include/Library/VariableKeyLib.h  | 59 -
> >  SecurityPkg/Library/RpmcLibNull/RpmcLibNull.c | 46 -
> >  .../Library/RpmcLibNull/RpmcLibNull.inf   | 33 --
> >  .../VariableKeyLibNull/VariableKeyLibNull.c   | 66 ---
> >  .../VariableKeyLibNull/VariableKeyLibNull.inf | 33 --
> >  SecurityPkg/SecurityPkg.dec   |  8 ---
> >  SecurityPkg/SecurityPkg.dsc   |  4 --
> >  8 files changed, 291 deletions(-)
> >  delete mode 100644 SecurityPkg/Include/Library/RpmcLib.h
> >  delete mode 100644 SecurityPkg/Include/Library/VariableKeyLib.h
> >  delete mode 100644 SecurityPkg/Library/RpmcLibNull/RpmcLibNull.c
> >  delete mode 100644 SecurityPkg/Library/RpmcLibNull/RpmcLibNull.inf
> >  delete mode 100644
> > SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.c
> >  delete mode 100644
> > SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf
> >
> > diff --git a/SecurityPkg/Include/Library/RpmcLib.h
> > b/SecurityPkg/Include/Library/RpmcLib.h
> > deleted file mode 100644
> > index df4ba34ba8..00
> > --- a/SecurityPkg/Include/Library/RpmcLib.h
> > +++ /dev/null
> > @@ -1,42 +0,0 @@
> > -/** @file
> >
> > -  Public definitions for the Replay Protected Monotonic Counter (RPMC)
> > Library.
> >
> > -
> >
> > -Copyright (c) 2020, Intel Corporation. All rights reserved.
> >
> > -SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > -
> >
> > -**/
> >
> > -
> >
> > -#ifndef _RPMC_LIB_H_
> >
> > -#define _RPMC_LIB_H_
> >
> > -
> >
> > -#include 
> >
> > -
> >
> > -/**
> >
> > -  Requests the monotonic counter from the designated RPMC counter.
> >
> > -
> >
> > -  @param[out]   CounterValueA pointer to a buffer to store the 
> > RPMC
> > value.
> >
> > -
> >
> > -  @retval   EFI_SUCCESS The operation completed 
> > successfully.
> >
> > -  @retval   EFI_DEVICE_ERRORA device error occurred while
> > attempting to update the counter.
> >
> > -  @retval   EFI_UNSUPPORTED The operation is un-supported.
> >
> > -**/
> >
> > -EFI_STATUS
> >
> > -EFIAPI
> >
> > -RequestMonotonicCounter (
> >
> > -  OUT UINT32  *CounterValue
> >
> > -  );
> >
> > -
> >
> > -/**
> >
> > -  Increments the monotonic counter in the SPI flash device by 1.
> >
> > -
> >
> > -  @retval   EFI_SUCCESS The operation completed 
> > successfully.
> >
> > -  @retval   EFI_DEVICE_ERRORA device error occurred while
> > attempting to update the counter.
> >
> > -  @retval   EFI_UNSUPPORTED The operation is un-supported.
> >
> > -**/
> >
> > -EFI_STATUS
> >
> > -EFIAPI
> >
> > -IncrementMonotonicCounter (
> >
> > -  VOID
> >
> > -  );
> >
> > -
> >
> > -#endif
> >
> > diff --git a/SecurityPkg/Include/Library/VariableKeyLib.h
> > b/SecurityPkg/Include/Library/VariableKeyLib.h
> > deleted file mode 100644
> > index 561ebad09d..00
> > --- a/SecurityPkg/Include/Library/VariableKeyLib.h
> > +++ /dev/null
> > @@ -1,59 +0,0 @@
> > -/** @file
> >
> > -  Public definitions for Variable Key Library.
> >
> > -
> >
> > -Copyright (c) 2020, Intel Corporation. All rights reserved.
> >
> > -SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > -
> >
> > -**/
> >
> > -
> >
> > -#ifndef _VARIABLE_KEY_LIB_H_
> >
> > -#define _VARIABLE_KEY_LIB_H_
> >
> > -
> >
> > -#include 
> >
> > -
> >
> > -/**
> >
> > -  Retrieves the key for integrity and/or confidentiality of variables.
> >
> > -
> >
> > -  @param[out] VariableKey A pointer to pointer for the 
> > variable key
> > buffer.
> >
> > -  @param[in,out]  VariableKeySize The size in bytes of the variable 
> > key.
> >
> > -
> >
> > -  @retval   EFI_SUCCESS The variable key was returned.
> >
> > -  @retval   EFI_DEVICE_ERRORAn error occurred while attemp

Re: [edk2-devel] [PATCH v3 1/1] OvmfPkg/AmdSev/SecretDxe: Allocate secret location as EfiACPIReclaimMemory

[Ard Biesheuvel]

On Thu, 15 Dec 2022 at 14:12, Dov Murik  wrote:
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4186
>
> Commit 079a58276b98 ("OvmfPkg/AmdSev/SecretPei: Mark SEV launch secret
> area as reserved") marked the launch secret area itself (1 page) as
> reserved so the guest OS can use it during the lifetime of the OS.
> However, the address and size of the secret area held in the
> CONFIDENTIAL_COMPUTING_SECRET_LOCATION struct are declared as STATIC in
> OVMF (in AmdSev/SecretDxe); therefore there's no guarantee that it will
> not be written over by OS data.
>
> Fix this by allocating the memory for the
> CONFIDENTIAL_COMPUTING_SECRET_LOCATION struct with the
> EfiACPIReclaimMemory memory type to ensure the guest OS will not reuse
> this memory.
>
> Fixes: 079a58276b98
> Cc: Ard Biesheuvel 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: James Bottomley 
> Cc: Jiewen Yao 
> Cc: Jordan Justen 
> Cc: Michael Roth 
> Cc: Min Xu 
> Cc: Tobin Feldman-Fitzthum 
> Cc: Tom Lendacky 
> Signed-off-by: Dov Murik 
>
> ---
>
> v3 changes:
> * Whitespace fix
>

Merged as #3777

Thanks,


> v2 changes:
> * Allocate with EfiACPIReclaimMemory memory type (thanks Ard)
> ---
>  OvmfPkg/AmdSev/SecretDxe/SecretDxe.c | 22 ++--
>  1 file changed, 16 insertions(+), 6 deletions(-)
>
> diff --git a/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c 
> b/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c
> index 3d84b2545052..c3258570e941 100644
> --- a/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c
> +++ b/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c
> @@ -8,11 +8,6 @@
>  #include 
>  #include 
>
> -STATIC CONFIDENTIAL_COMPUTING_SECRET_LOCATION  mSecretDxeTable = {
> -  FixedPcdGet32 (PcdSevLaunchSecretBase),
> -  FixedPcdGet32 (PcdSevLaunchSecretSize),
> -};
> -
>  EFI_STATUS
>  EFIAPI
>  InitializeSecretDxe (
> @@ -20,8 +15,23 @@ InitializeSecretDxe (
>IN EFI_SYSTEM_TABLE  *SystemTable
>)
>  {
> +  EFI_STATUS  Status;
> +  CONFIDENTIAL_COMPUTING_SECRET_LOCATION  *SecretDxeTable;
> +
> +  Status = gBS->AllocatePool (
> +  EfiACPIReclaimMemory,
> +  sizeof (CONFIDENTIAL_COMPUTING_SECRET_LOCATION),
> +  (VOID **)&SecretDxeTable
> +  );
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }
> +
> +  SecretDxeTable->Base = FixedPcdGet32 (PcdSevLaunchSecretBase);
> +  SecretDxeTable->Size = FixedPcdGet32 (PcdSevLaunchSecretSize);
> +
>return gBS->InstallConfigurationTable (
>  &gConfidentialComputingSecretGuid,
> -&mSecretDxeTable
> +SecretDxeTable
>  );
>  }
> --
> 2.25.1
>
>
>
> 
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Re: [edk2-devel] [PATCH v3 13/14] ArmPkg: Turn off spellcheck audit mode

[Michael D Kinney]

Michael,

I appreciate your efforts to improve code quality in all aspects.

I think this is the only part of the change that is being asked
to be adjusted (specifically for the ArmPkg and ArmVirtPkg) is
the following.

>> -"AuditOnly": True,
>> +"AuditOnly": False,

Different packages may choose different levels if quality or 
quality checks based on the maturity of the package and what
is deemed critical to the package maintainers.

There are obvious checks such as compile failures that we can
all agree on.  Checks that are not directly related to 
functionality should perhaps be flexible and the policy be 
allowed to be adjusted by the package maintainers.

I personally would prefer to see as many packages as possible
take advantage of the CI checks that have been enabled, so I
think it is good to start with an approach where everything is
on by default, and if a package maintainer would prefer a
specific package to have one disabled, then defer to that request.

I also think it would be good to add comments to the package
YAML file if a check is disabled that clearly states that
the choice to diverge from the standard CI checks was made
by the package maintainer.

With this approach, I think your series can go forward with
AuditOnly set to True for the ArmPkg and ArtVirtPkg with 
comments that this setting is different than the default
due to requests from the maintainers.

Best regards,

Mike


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Michael Kubacki
> Sent: Thursday, December 15, 2022 8:39 AM
> To: devel@edk2.groups.io; quic_llind...@quicinc.com
> Cc: a...@kernel.org; Ard Biesheuvel ; Sami Mujawar 
> ; Kinney, Michael D
> 
> Subject: Re: [edk2-devel] [PATCH v3 13/14] ArmPkg: Turn off spellcheck audit 
> mode
> 
> On 12/15/2022 5:42 AM, Leif Lindholm wrote:
> > On Wed, Dec 14, 2022 at 19:04:06 -0500, Michael Kubacki wrote:
> >> I'm just trying to understand your position.
> >>
> >> Are you saying you would rather people check in typos and then later have
> >> patches come into the package to fix them?
> >>
> >> For example, like these:
> >>
> >> - ArmVirtPkg: https://edk2.groups.io/g/devel/message/97021
> >> - ArmPkg: https://edk2.groups.io/g/devel/message/97022
> >>
> >> Why not just have the code checked in without typos in the first place?
> >
> > A little fairy once whispered in my ear that if I stopped myself and
> > tried to rephrase whenever I found myself using the work "just", I
> > would meet less friction in context-stripping communication mediums
> > such as email. They weren't wrong.
> >
> 
> This topic is met with friction regardless of how it is phrased.
> 
> The friction exists because the community chose to enable spell checking
> in CI and it is not wanted here.
> 
> The mechanism chosen to ignore words was through YAML files rather than
> a button. A common YAML file can store words for the whole project and
> packages can add package-specific words. The community was expected to
> make the contributions necessary in the common file to minimize impact
> on package maintainers.
> 
> The spellcheck log outputs the exact code that needs to be copied/pasted
> to the exception list - whether the global list or package list. If you
> run CI locally, you can copy/paste the exact lines needed.
> 
> This is a patch series I work on in my spare time to try to improve the
> project. I am tired of Ard's dismissive and passive aggressive responses
> such as those in https://edk2.groups.io/g/devel/message/97433 so I
> revoke the series and will let others decide what they want to do.
> 
> >> Checking in typos creates more review work, makes the code history have 
> >> typo
> >> fix patches that could be avoided, and impacts accessibility.
> >>
> >> I spend far more time with edk2 overhead such as email formatting problems,
> >> keeping track of maintainer email address changes when updating patches,
> >> mapping email replies back to code, and so on that does not improve the
> >> code. A spell checker only takes seconds and is built into edk2 CI.
> >
> > We didn't disable the spellchecker for the ARM* packages (only)
> > because we hate correct spelling. We disabled it because it throws
> > false positives left right and centre. So we end up needing to update
> > the .ci.yaml every time we mention an architectural concept we haven't
> > mentioned before. Or add a copyright line mentioning a new
> > organisation. Or correctly use apostrophes in ways the spellchecker
> > doesn't expect.
> >
> > Here is the current (and very incomplete, oh - and package specific)
> > exception list for ArmPkg:
> >
> > https://github.com/tianocore/edk2/blob/master/ArmPkg/ArmPkg.ci.yaml#L95
> >
> > If it had a aggressiveness knob and we could turn it down from 11 to
> > 3 and work our way up from there, that would be another story.
> >
> > Failing that, a push-through-anyway-this-isn't-a-typo label would be a
> > reasonable compromise.
> >
> > But for now, I agree

Re: [edk2-devel] [PATCH 0/3] OvmfPkg: Make IntelTdx work with Cloud Hypervisor

[Boeuf, Sebastien]

Hi Jiewen,

Thanks to Min, I've been able to fix the remaining issues.

I've just sent a v2 after I've verified the CI was passing correctly.

Thanks,
Sebastien

From: Yao, Jiewen 
Sent: Thursday, December 15, 2022 3:02 AM
To: Boeuf, Sebastien ; devel@edk2.groups.io 

Cc: Xu, Min M ; kra...@redhat.com 
Subject: RE: [PATCH 0/3] OvmfPkg: Make IntelTdx work with Cloud Hypervisor

Hi Sebastien
CI failed, https://github.com/tianocore/edk2/pull/3769
Have you run CI before submission? Please take a look.


> -Original Message-
> From: Yao, Jiewen
> Sent: Thursday, December 15, 2022 12:20 AM
> To: Boeuf, Sebastien ; devel@edk2.groups.io
> Cc: Xu, Min M ; kra...@redhat.com
> Subject: RE: [PATCH 0/3] OvmfPkg: Make IntelTdx work with Cloud
> Hypervisor
>
> Reviewed-by: Jiewen Yao 
>
> > -Original Message-
> > From: Boeuf, Sebastien 
> > Sent: Monday, December 12, 2022 5:04 PM
> > To: devel@edk2.groups.io
> > Cc: Yao, Jiewen ; Xu, Min M
> ;
> > kra...@redhat.com; Boeuf, Sebastien 
> > Subject: [PATCH 0/3] OvmfPkg: Make IntelTdx work with Cloud Hypervisor
> >
> > From: Sebastien Boeuf 
> >
> > The IntelTdxX64 OVMF target wasn't working with Cloud Hypervisor on TDX
> > platform. This was due to the way the OVMF code expects Cloud
> Hypervisor
> > to rely on PVH to retrieve information like memory below 4GiB as well as
> > the ACPI tables.
> >
> > This is why this series takes care of identifying when running on TDX in
> > order to handle things differently. For the memory below 4GiB, it falls
> > back onto the CMOS to retrieve the correct information, and for the ACPI
> > tables, it relies on the HOB to obtain every table individually before
> > to expose them to the guest OS.
> >
> > With these two use cases properly handled by this series, it is now
> > possible to use the IntelTdxX64 target to build an OVMF binary that
> > works both for QEMU and Cloud Hypervisor on a TDX platform.
> >
> > Sebastien Boeuf (3):
> >   OvmfPkg/PlatformInitLib: Differentiate TDX case for Cloud Hypervisor
> >   OvmfPkg/PlatformInitLib: Transfer GUID Extension HOB
> >   OvmfPkg/AcpiPlatformDxe: Differentiate TDX case for Cloud Hypervisor
> >
> >  OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c  |  8 +-
> >  OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h  |  6 ++
> >  OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf |  2 +
> >  OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c   | 87
> +
> >  OvmfPkg/Library/PlatformInitLib/IntelTdx.c  |  5 ++
> >  OvmfPkg/Library/PlatformInitLib/MemDetect.c |  4 +-
> >  OvmfPkg/OvmfPkg.dec |  1 +
> >  7 files changed, 111 insertions(+), 2 deletions(-)
> >
> > --
> > 2.34.1

-
Intel Corporation SAS (French simplified joint stock company)
Registered headquarters: "Les Montalets"- 2, rue de Paris, 
92196 Meudon Cedex, France
Registration Number:  302 456 199 R.C.S. NANTERRE
Capital: 5 208 026.16 Euros

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
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[edk2-devel] [PATCH v2 2/3] OvmfPkg/PlatformInitLib: Transfer GUID Extension HOB

[Boeuf, Sebastien]

From: Sebastien Boeuf 

This is required for passing the ACPI tables from the VMM up to the
guest OS. They are transferred through this GUID extension.

Signed-off-by: Jiaqi Gao 
Signed-off-by: Sebastien Boeuf 
---
 OvmfPkg/Library/PlatformInitLib/IntelTdx.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c 
b/OvmfPkg/Library/PlatformInitLib/IntelTdx.c
index acd114e38e..55ca3ecaa1 100644
--- a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c
+++ b/OvmfPkg/Library/PlatformInitLib/IntelTdx.c
@@ -547,6 +547,7 @@ TransferTdxHobList (
   EFI_PEI_HOB_POINTERS Hob;
   EFI_RESOURCE_TYPEResourceType;
   EFI_RESOURCE_ATTRIBUTE_TYPE  ResourceAttribute;
+  VOID *GuidedData;
 
   //
   // PcdOvmfSecGhcbBase is used as the TD_HOB in Tdx guest.
@@ -577,6 +578,10 @@ TransferTdxHobList (
   Hob.MemoryAllocation->AllocDescriptor.MemoryType
   );
 break;
+  case EFI_HOB_TYPE_GUID_EXTENSION:
+GuidedData = (VOID *)(&Hob.Guid->Name + 1);
+BuildGuidDataHob (&Hob.Guid->Name, GuidedData, 
Hob.Guid->Header.HobLength - sizeof (EFI_HOB_GUID_TYPE));
+break;
 }
 
 Hob.Raw = GET_NEXT_HOB (Hob);
-- 
2.34.1

-
Intel Corporation SAS (French simplified joint stock company)
Registered headquarters: "Les Montalets"- 2, rue de Paris, 
92196 Meudon Cedex, France
Registration Number:  302 456 199 R.C.S. NANTERRE
Capital: 5 208 026.16 Euros

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.



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[edk2-devel] [PATCH v2 3/3] OvmfPkg/AcpiPlatformDxe: Differentiate TDX case for Cloud Hypervisor

[Boeuf, Sebastien]

From: Sebastien Boeuf 

Rely on CcProbe() to identify when running on TDX so that ACPI tables
can be retrieved differently for Cloud Hypervisor. Instead of relying on
the PVH structure to find the RSDP pointer, the tables are individually
passed through the HOB.

Signed-off-by: Jiaqi Gao 
Signed-off-by: Sebastien Boeuf 
---
 ArmVirtPkg/ArmVirtQemu.dsc  |  1 +
 OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c  |  8 +-
 OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h  |  6 ++
 OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf |  3 +
 OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c   | 87 +
 OvmfPkg/OvmfPkg.dec |  1 +
 6 files changed, 105 insertions(+), 1 deletion(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f77443229e..1dea715e9e 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -68,6 +68,7 @@
   
VirtNorFlashPlatformLib|ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+  CcProbeLib|MdePkg/Library/CcProbeLibNull/CcProbeLibNull.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
   
PlatformBootManagerLib|ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
   
PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf
diff --git a/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c 
b/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c
index fcfb9703bd..0cc3d958be 100644
--- a/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c
+++ b/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c
@@ -9,6 +9,8 @@
 
 #include  // CLOUDHV_DEVICE_ID
 
+#include  // CcProbe(), CcGuestTypeIntelTdx
+
 #include "AcpiPlatform.h"
 
 /**
@@ -33,7 +35,11 @@ InstallAcpiTables (
 
   HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
   if (HostBridgeDevId == CLOUDHV_DEVICE_ID) {
-Status = InstallCloudHvTables (AcpiTable);
+if (CcProbe () == CcGuestTypeIntelTdx) {
+  Status = InstallCloudHvTablesTdx (AcpiTable);
+} else {
+  Status = InstallCloudHvTables (AcpiTable);
+}
   } else {
 Status = InstallQemuFwCfgTables (AcpiTable);
   }
diff --git a/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h 
b/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h
index 342339750d..3ec5098658 100644
--- a/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h
+++ b/OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h
@@ -19,6 +19,12 @@ typedef struct {
 
 typedef struct S3_CONTEXT S3_CONTEXT;
 
+EFI_STATUS
+EFIAPI
+InstallCloudHvTablesTdx (
+  IN   EFI_ACPI_TABLE_PROTOCOL  *AcpiProtocol
+  );
+
 EFI_STATUS
 EFIAPI
 InstallCloudHvTables (
diff --git a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf 
b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
index 09daf30bcd..1647a90add 100644
--- a/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
+++ b/OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
@@ -45,6 +45,8 @@
   QemuFwCfgS3Lib
   UefiBootServicesTableLib
   UefiDriverEntryPoint
+  HobLib
+  CcProbeLib
 
 [Protocols]
   gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
@@ -53,6 +55,7 @@
 
 [Guids]
   gRootBridgesConnectedEventGroupGuid
+  gUefiOvmfPkgTdxAcpiHobGuid
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
diff --git a/OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c 
b/OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c
index ff59600d3e..cbe8bb9b0c 100644
--- a/OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c
+++ b/OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c
@@ -7,14 +7,101 @@
 
 **/
 
+#include // 
EFI_ACPI_DESCRIPTION_HEADER
 #include  // 
CLOUDHV_RSDP_ADDRESS
 #include  // hvm_start_info
 #include   // CpuDeadLoop()
 #include  // DEBUG()
 #include// PcdGet32()
+#include// 
GetFirstGuidHob(), GetNextGuidHob()
+#include  // gBS
+
+#include 
+#include 
+#include  // 
QEMU_ACPI_TABLE_NOTIFY_PROTOCOL
 
 #include "AcpiPlatform.h"
 
+EFI_HANDLE   mChAcpiHandle = NULL;
+QEMU_ACPI_TABLE_NOTIFY_PROTOCOL  mChAcpiNotifyProtocol;
+
+EFI_STATUS
+EFIAPI
+InstallCloudHvTablesTdx (
+  IN   EFI_ACPI_TABLE_PROTOCOL  *AcpiProtocol
+  )
+{
+  EFI_STATUS  Status;
+  UINTN   TableHandle;
+
+  EFI_PEI_HOB_POINTERS Hob;
+  EFI_ACPI_DESCRIPTION_HEADER  *CurrentTable;
+  EFI_ACPI_DESCRIPTION_HEADER  *DsdtTable;
+
+  DsdtTable   = NULL;
+  TableHandle = 0;
+
+  Hob.Guid = (EFI_HOB_GUID_TYPE *)GetFirstGuidHob 
(&gUefiOvmfPkgTdxAcpiHobGuid);
+
+  while (Hob.Guid != NULL) {
+CurrentTable = (EFI_ACPI_DESCRIPTION_HEADER *)(&Hob.Guid->Name + 1);
+if (!AsciiStrnCmp ((CHAR8 *)&CurrentTable->Signature, "DSDT", 4)) {
+  DsdtTable = CurrentTable;
+} else {
+  //
+  // Install the tables
+  //
+  Status = AcpiProtocol->InstallAcpiTable (
+   AcpiProtocol,
+   CurrentTable,
+   CurrentTable->Length,
+ 

[edk2-devel] [PATCH v2 1/3] OvmfPkg/PlatformInitLib: Differentiate TDX case for Cloud Hypervisor

[Boeuf, Sebastien]

From: Sebastien Boeuf 

Rely on the CcProbe() function to identify when running on TDX. This
allows the firmware to follow a different codepath for Cloud Hypervisor,
which means it doesn't rely on PVH to find out about memory below 4GiB.
instead it falls back onto the CMOS to retrieve that information.

Signed-off-by: Sebastien Boeuf 
---
 OvmfPkg/Library/PlatformInitLib/MemDetect.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c 
b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index b8feae4309..6dbdbf9306 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -26,6 +26,7 @@ Module Name:
 //
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -312,7 +313,9 @@ PlatformGetSystemMemorySizeBelow4gb (
   UINT8   Cmos0x34;
   UINT8   Cmos0x35;
 
-  if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) {
+  if ((PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) &&
+  (CcProbe () != CcGuestTypeIntelTdx))
+  {
 // Get the information from PVH memmap
 return (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);
   }
-- 
2.34.1

-
Intel Corporation SAS (French simplified joint stock company)
Registered headquarters: "Les Montalets"- 2, rue de Paris, 
92196 Meudon Cedex, France
Registration Number:  302 456 199 R.C.S. NANTERRE
Capital: 5 208 026.16 Euros

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[edk2-devel] [PATCH v2 0/3] OvmfPkg: Make IntelTdx work with Cloud Hypervisor

[Boeuf, Sebastien]

From: Sebastien Boeuf 

The IntelTdxX64 OVMF target wasn't working with Cloud Hypervisor on TDX
platform. This was due to the way the OVMF code expects Cloud Hypervisor
to rely on PVH to retrieve information like memory below 4GiB as well as
the ACPI tables.

This is why this series takes care of identifying when running on TDX in
order to handle things differently. For the memory below 4GiB, it falls
back onto the CMOS to retrieve the correct information, and for the ACPI
tables, it relies on the HOB to obtain every table individually before
to expose them to the guest OS.

With these two use cases properly handled by this series, it is now
possible to use the IntelTdxX64 target to build an OVMF binary that
works both for QEMU and Cloud Hypervisor on a TDX platform.

Sebastien Boeuf (3):
  OvmfPkg/PlatformInitLib: Differentiate TDX case for Cloud Hypervisor
  OvmfPkg/PlatformInitLib: Transfer GUID Extension HOB
  OvmfPkg/AcpiPlatformDxe: Differentiate TDX case for Cloud Hypervisor

 ArmVirtPkg/ArmVirtQemu.dsc  |  1 +
 OvmfPkg/AcpiPlatformDxe/AcpiPlatform.c  |  8 +-
 OvmfPkg/AcpiPlatformDxe/AcpiPlatform.h  |  6 ++
 OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf |  3 +
 OvmfPkg/AcpiPlatformDxe/CloudHvAcpi.c   | 87 +
 OvmfPkg/Library/PlatformInitLib/IntelTdx.c  |  5 ++
 OvmfPkg/Library/PlatformInitLib/MemDetect.c |  5 +-
 OvmfPkg/OvmfPkg.dec |  1 +
 8 files changed, 114 insertions(+), 2 deletions(-)

-- 
2.34.1

-
Intel Corporation SAS (French simplified joint stock company)
Registered headquarters: "Les Montalets"- 2, rue de Paris, 
92196 Meudon Cedex, France
Registration Number:  302 456 199 R.C.S. NANTERRE
Capital: 5 208 026.16 Euros

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
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[edk2-devel][PATCH v1 2/2] MdeModulePkg: Supporting S3 in 64bit PEI

[Kuo, Ted]

https://bugzilla.tianocore.org/show_bug.cgi?id=4195
Transfer from DXE to OS waking vector by calling SwitchStack() when
both are in the same execution mode.

Cc: Ray Ni 
Cc: Zhiguang Liu 
Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 .../BootScriptExecutorDxe/ScriptExecute.c | 21 +--
 .../BootScriptExecutorDxe/X64/SetIdtEntry.c   |  4 ++--
 .../Acpi/S3SaveStateDxe/AcpiS3ContextSave.c   | 10 -
 3 files changed, 22 insertions(+), 13 deletions(-)

diff --git a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c 
b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
index 82481aacd6..98c5abecf8 100644
--- a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
+++ b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/ScriptExecute.c
@@ -4,7 +4,7 @@
   This driver is dispatched by Dxe core and the driver will reload itself to 
ACPI reserved memory
   in the entry point. The functionality is to interpret and restore the S3 
boot script
 
-Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
 Copyright (c) 2017, AMD Incorporated. All rights reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -95,7 +95,7 @@ S3BootScriptExecutorEntryFunction (
 PeiS3ResumeState->ReturnStatus = (UINT64)(UINTN)Status;
 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
   //
-  // X64 S3 Resume
+  // X64 DXE to IA32 PEI S3 Resume
   //
   DEBUG ((DEBUG_INFO, "Call AsmDisablePaging64() to return to S3 Resume in 
PEI Phase\n"));
   PeiS3ResumeState->AsmTransferControl = 
(EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl32;
@@ -121,7 +121,7 @@ S3BootScriptExecutorEntryFunction (
 );
 } else {
   //
-  // IA32 S3 Resume
+  // IA32 DXE to IA32 PEI S3 Resume / X64 DXE to X64 PEI S3 Resume
   //
   DEBUG ((DEBUG_INFO, "Call SwitchStack() to return to S3 Resume in PEI 
Phase\n"));
   PeiS3ResumeState->AsmTransferControl = 
(EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl;
@@ -156,8 +156,11 @@ S3BootScriptExecutorEntryFunction (
   //
   // X64 long mode waking vector
   //
-  DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", 
(UINTN)Facs->XFirmwareWakingVector));
-  if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
+  DEBUG ((DEBUG_INFO, "Transfer from 64bit DXE to 64bit OS waking vector - 
%x\r\n", (UINTN)Facs->XFirmwareWakingVector));
+  if (sizeof (UINTN) == sizeof (UINT64)) {
+//
+// 64bit DXE calls to 64bit OS S3 waking vector
+//
 SwitchStack (
   (SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,
   NULL,
@@ -174,7 +177,10 @@ S3BootScriptExecutorEntryFunction (
   // IA32 protected mode waking vector (Page disabled)
   //
   DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", 
(UINTN)Facs->XFirmwareWakingVector));
-  if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
+  if (sizeof (UINTN) == sizeof (UINT64)) {
+//
+// 64bit DXE calls to 32bit OS S3 waking vector
+//
 AsmDisablePaging64 (
   0x10,
   (UINT32)Facs->XFirmwareWakingVector,
@@ -183,6 +189,9 @@ S3BootScriptExecutorEntryFunction (
   (UINT32)TempStackTop
   );
   } else {
+//
+// 32bit DXE calls to 32bit OS S3 waking vector
+//
 SwitchStack (
   (SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,
   NULL,
diff --git 
a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c 
b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
index 6b44f50bac..7fc6cdcb4e 100644
--- a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
+++ b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
@@ -3,7 +3,7 @@
 
   Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
 
-Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
 Copyright (c) 2017, AMD Incorporated. All rights reserved.
 
 
@@ -118,7 +118,7 @@ IsLongModeWakingVector (
 ((Facs->OspmFlags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0))
 {
   // Both BIOS and OS wants 64bit vector
-  if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
+  if (sizeof (UINTN) == sizeof (UINT64)) {
 return TRUE;
   }
 }
diff --git a/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c 
b/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c
index 03f7a332d3..70bee7a67b 100644
--- a/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c
+++ b/MdeModulePkg/Universal/Acpi/S3SaveStateDxe/AcpiS3ContextSave.c
@@ -1,7 +1,7 @@
 /** @file
   This is the implementation to save ACPI S3 Context.
 
-Copyri

[edk2-devel][PATCH v1 1/2] UefiCpuPkg: Supporting S3 in 64bit PEI

[Kuo, Ted]

https://bugzilla.tianocore.org/show_bug.cgi?id=4195
1.Updated the GDT table in VTF0 to align with the one in S3Resume2Pei.
  By doing so can simplify the changes to enable S3 in 64bit PEI.
2.Use SwitchStack() between PEI and SMM in S3 resume path when both
  are in the same execution mode.
3.Transfer from PEI to OS waking vector by calling SwitchStack() when
  both are in the same execution mode.
4.Removed the debug assertion in S3Resume.c to support 64bit PEI.

Cc: Ray Ni 
Cc: Zhiguang Liu 
Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 13 ++-
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf  |  1 +
 .../ResetVector/Vtf0/Ia16/Real16ToFlat32.asm  | 63 
 .../Universal/Acpi/S3Resume2Pei/S3Resume.c| 96 ---
 4 files changed, 116 insertions(+), 57 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 9b45c442c9..fb4a44eab6 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -1,7 +1,7 @@
 /** @file
 Code for Processor S3 restoration
 
-Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -783,7 +783,11 @@ SmmRestoreCpu (
   SmmS3ResumeState = mSmmS3ResumeState;
   ASSERT (SmmS3ResumeState != NULL);
 
-  if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
+  //
+  // Setup 64bit IDT in 64bit SMM env when called from 32bit PEI.
+  // Note: 64bit PEI and 32bit DXE is not a supported combination.
+  //
+  if ((SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) && (FeaturePcdGet 
(PcdDxeIplSwitchToLongMode) == TRUE)) {
 //
 // Save the IA32 IDT Descriptor
 //
@@ -846,9 +850,10 @@ SmmRestoreCpu (
   DEBUG ((DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", 
SmmS3ResumeState->ReturnStackPointer));
 
   //
-  // If SMM is in 32-bit mode, then use SwitchStack() to resume PEI Phase
+  // If SMM is in 32-bit mode or PcdDxeIplSwitchToLongMode is FALSE, then use 
SwitchStack() to resume PEI Phase.
+  // Note: 64bit PEI and 32bit DXE is not a supported combination.
   //
-  if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
+  if ((SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) || (FeaturePcdGet 
(PcdDxeIplSwitchToLongMode) == FALSE)) {
 DEBUG ((DEBUG_INFO, "Call SwitchStack() to return to S3 Resume in PEI 
Phase\n"));
 
 SwitchStack (
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
index deef00f9c6..b4b327f60c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
@@ -124,6 +124,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONSUMES
 
 [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm 
b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm
index 0e79a3984b..f59fc6ead4 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm
@@ -2,7 +2,7 @@
 ; @file
 ; Transition from 16 bit real mode into 32 bit flat protected mode
 ;
-; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.
+; Copyright (c) 2008 - 2022, Intel Corporation. All rights reserved.
 ; SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ;--
@@ -92,7 +92,7 @@ ALIGN   16
 
 GDT_BASE:
 ; null descriptor
-NULL_SELequ $-GDT_BASE
+NULL_SELequ $-GDT_BASE; Selector [0x0]
 DW  0; limit 15:0
 DW  0; base 15:0
 DB  0; base 23:16
@@ -100,42 +100,67 @@ NULL_SELequ $-GDT_BASE
 DB  0; limit 19:16, flags
 DB  0; base 31:24
 
+; Spare segment descriptor
+SPARE1_SEL  equ $-GDT_BASE; Selector [0x8]
+DW  0; limit 15:0
+DW  0; base 15:0
+DB  0; base 23:16
+DB  0; sys flag, dpl, type
+DB  0; limit 19:16, flags
+DB  0; base 31:24
+
+; linear code segment descriptor
+LINEAR_CODE_SEL equ $-GDT_BASE; Selector [0x10]
+DW  0x   ; limit 15:0
+DW  0; base 15:0
+DB  0; base 23:16
+DB  PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)   
; 09Bh
+DB  
GRANULARITY_FLAG(1)|DEFAULT_SIZE32(

[edk2-devel][PATCH v1 0/2] Supporting S3 in 64bit PEI

[Kuo, Ted]

This patch set enables S3 in 64bit PEI.

Ted Kuo (2):
  UefiCpuPkg: Supporting S3 in 64bit PEI
  MdeModulePkg: Supporting S3 in 64bit PEI

 .../BootScriptExecutorDxe/ScriptExecute.c | 21 ++--
 .../BootScriptExecutorDxe/X64/SetIdtEntry.c   |  4 +-
 .../Acpi/S3SaveStateDxe/AcpiS3ContextSave.c   | 10 +-
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 13 ++-
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf  |  1 +
 .../ResetVector/Vtf0/Ia16/Real16ToFlat32.asm  | 63 
 .../Universal/Acpi/S3Resume2Pei/S3Resume.c| 96 ---
 7 files changed, 138 insertions(+), 70 deletions(-)

-- 
2.35.3.windows.1



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[edk2-devel] [PATCH v3 1/1] OvmfPkg/AmdSev/SecretDxe: Allocate secret location as EfiACPIReclaimMemory

[Dov Murik]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4186

Commit 079a58276b98 ("OvmfPkg/AmdSev/SecretPei: Mark SEV launch secret
area as reserved") marked the launch secret area itself (1 page) as
reserved so the guest OS can use it during the lifetime of the OS.
However, the address and size of the secret area held in the
CONFIDENTIAL_COMPUTING_SECRET_LOCATION struct are declared as STATIC in
OVMF (in AmdSev/SecretDxe); therefore there's no guarantee that it will
not be written over by OS data.

Fix this by allocating the memory for the
CONFIDENTIAL_COMPUTING_SECRET_LOCATION struct with the
EfiACPIReclaimMemory memory type to ensure the guest OS will not reuse
this memory.

Fixes: 079a58276b98
Cc: Ard Biesheuvel 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Michael Roth 
Cc: Min Xu 
Cc: Tobin Feldman-Fitzthum 
Cc: Tom Lendacky 
Signed-off-by: Dov Murik 

---

v3 changes:
* Whitespace fix

v2 changes:
* Allocate with EfiACPIReclaimMemory memory type (thanks Ard)
---
 OvmfPkg/AmdSev/SecretDxe/SecretDxe.c | 22 ++--
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c 
b/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c
index 3d84b2545052..c3258570e941 100644
--- a/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c
+++ b/OvmfPkg/AmdSev/SecretDxe/SecretDxe.c
@@ -8,11 +8,6 @@
 #include 
 #include 
 
-STATIC CONFIDENTIAL_COMPUTING_SECRET_LOCATION  mSecretDxeTable = {
-  FixedPcdGet32 (PcdSevLaunchSecretBase),
-  FixedPcdGet32 (PcdSevLaunchSecretSize),
-};
-
 EFI_STATUS
 EFIAPI
 InitializeSecretDxe (
@@ -20,8 +15,23 @@ InitializeSecretDxe (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
+  EFI_STATUS  Status;
+  CONFIDENTIAL_COMPUTING_SECRET_LOCATION  *SecretDxeTable;
+
+  Status = gBS->AllocatePool (
+  EfiACPIReclaimMemory,
+  sizeof (CONFIDENTIAL_COMPUTING_SECRET_LOCATION),
+  (VOID **)&SecretDxeTable
+  );
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  SecretDxeTable->Base = FixedPcdGet32 (PcdSevLaunchSecretBase);
+  SecretDxeTable->Size = FixedPcdGet32 (PcdSevLaunchSecretSize);
+
   return gBS->InstallConfigurationTable (
 &gConfidentialComputingSecretGuid,
-&mSecretDxeTable
+SecretDxeTable
 );
 }
-- 
2.25.1



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 22/23] OvmfPkg: RiscVVirt: Add Qemu Virt platform support

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Add infrastructure files to build edk2 for RISC-V qemu virt machine.

- It follows PEI less design.
- Leveraged from ArmVirtQemu

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc | 338 +
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 510 
 OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf | 306 
 OvmfPkg/RiscVVirt/RiscVVirt.fdf.inc |  41 ++
 OvmfPkg/RiscVVirt/VarStore.fdf.inc  |  79 +++
 5 files changed, 1274 insertions(+)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc 
b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
new file mode 100644
index ..99741f3d8965
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
@@ -0,0 +1,338 @@
+#
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#  Copyright (c) 2011 - 2022, ARM Limited. All rights reserved.
+#  Copyright (c) 2014, Linaro Limited. All rights reserved.
+#  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) Microsoft Corporation.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+  DEFINE DEBUG_PRINT_ERROR_LEVEL = 0x8047
+
+[LibraryClasses.common]
+!ifdef $(SOURCE_DEBUG_ENABLE)
+  
PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf
+  
DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf
+!else
+  
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+  DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+!if $(DEBUG_ON_SERIAL_PORT) == TRUE
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+  
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+  BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf
+  
SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+  
CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+  
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+  
DevicePathLib|MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.inf
+  
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+  
DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+  
UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+  
UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+  SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+  ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+  ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf
+  FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+  
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+  
OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
+  
OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+
+  #
+  # Ramdisk Requirements
+  #
+  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+
+  # Allow dynamic PCDs
+  #
+
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+
+  # Networking Requirements
+!include NetworkPkg/NetworkLibs.dsc.inc
+!if $(NETWORK_TLS_ENABLE) == TRUE
+  TlsLib|CryptoPkg/Library/TlsLib/TlsLib.inf
+!endif
+
+
+  # Add support for GCC stack protector
+  NULL|MdePk

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 23/23] Maintainers.txt: Add entry for OvmfPkg/RiscVVirt

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

RiscVVirt is created to support EDK2 for RISC-V qemu
virt machine platform. Add maintainer entries.

Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Signed-off-by: Sunil V L 
---
 Maintainers.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index 6a92922258e2..74a053624491 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -540,6 +540,10 @@ F: OvmfPkg/XenResetVector/
 R: Anthony Perard  [tperard]
 R: Julien Grall  [jgrall]
 
+OvmfPkg: RISC-V Qemu Virt Platform
+F: OvmfPkg/RiscVVirt
+R: Sunil V L  [vlsunil]
+
 PcAtChipsetPkg
 F: PcAtChipsetPkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/PcAtChipsetPkg
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 21/23] OvmfPkg/PlatformBootManagerLib: Add RISC-V instance

[Sunil V L]

This is mostly copied from ArmVirtPkg since RISC-V follows
similar model.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
---
 OvmfPkg/Library/PlatformBootManagerLib/DxeRiscV64PlatformBootManagerLib.inf |  
 75 ++
 OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.h |  
 45 +
 OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.c | 
1078 
 OvmfPkg/Library/PlatformBootManagerLib/RiscV64/QemuKernel.c |  
 77 ++
 4 files changed, 1275 insertions(+)

diff --git 
a/OvmfPkg/Library/PlatformBootManagerLib/DxeRiscV64PlatformBootManagerLib.inf 
b/OvmfPkg/Library/PlatformBootManagerLib/DxeRiscV64PlatformBootManagerLib.inf
new file mode 100644
index ..cccf339a05a8
--- /dev/null
+++ 
b/OvmfPkg/Library/PlatformBootManagerLib/DxeRiscV64PlatformBootManagerLib.inf
@@ -0,0 +1,75 @@
+## @file
+#  Implementation for PlatformBootManagerLib library class interfaces for 
RISC-V.
+#
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = DxeRiscV64PlatformBootManagerLib
+  FILE_GUID  = 4FC87DC9-2666-49BB-9023-B5FAA1E9E732
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PlatformBootManagerLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources]
+  RiscV64/PlatformBm.c
+  RiscV64/PlatformBm.h
+  RiscV64/QemuKernel.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  SecurityPkg/SecurityPkg.dec
+  ShellPkg/ShellPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  BootLogoLib
+  DebugLib
+  DevicePathLib
+  MemoryAllocationLib
+  PcdLib
+  PlatformBmPrintScLib
+  QemuBootOrderLib
+  QemuLoadImageLib
+  ReportStatusCodeLib
+  TpmPlatformHierarchyLib
+  UefiBootManagerLib
+  UefiBootServicesTableLib
+  UefiLib
+  UefiRuntimeServicesTableLib
+
+[FixedPcd]
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
+
+[Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
+
+[Guids]
+  gEfiEndOfDxeEventGroupGuid
+  gEfiGlobalVariableGuid
+  gRootBridgesConnectedEventGroupGuid
+  gUefiShellFileGuid
+  gEfiTtyTermGuid
+
+[Protocols]
+  gEfiFirmwareVolume2ProtocolGuid
+  gEfiGraphicsOutputProtocolGuid
+  gEfiPciRootBridgeIoProtocolGuid
+  gVirtioDeviceProtocolGuid
diff --git a/OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.h 
b/OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.h
new file mode 100644
index ..70c52d9832ca
--- /dev/null
+++ b/OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.h
@@ -0,0 +1,45 @@
+/** @file
+  Head file for BDS Platform specific code
+
+  Copyright (C) 2015-2016, Red Hat, Inc.
+  Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PLATFORM_BM_H_
+#define _PLATFORM_BM_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Download the kernel, the initial ramdisk, and the kernel command line from
+  QEMU's fw_cfg. Construct a minimal SimpleFileSystem that contains the two
+  image files, and load and start the kernel from it.
+
+  The kernel will be instructed via its command line to load the initrd from
+  the same Simple FileSystem.
+
+  @retval EFI_NOT_FOUND Kernel image was not found.
+  @retval EFI_OUT_OF_RESOURCES  Memory allocation failed.
+  @retval EFI_PROTOCOL_ERRORUnterminated kernel command line.
+
+  @return   Error codes from any of the underlying
+functions. On success, the function doesn't
+return.
+**/
+EFI_STATUS
+EFIAPI
+TryRunningQemuKernel (
+  VOID
+  );
+
+#endif // _PLATFORM_BM_H_
diff --git a/OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.c 
b/OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.c
new file mode 100644
index ..2559889638ad
--- /dev/null
+++ b/OvmfPkg/Library/PlatformBootManagerLib/RiscV64/PlatformBm.c
@@ -0,0 +1,1078 @@
+/** @file
+  Implementation for PlatformBootManagerLib library class interfaces.
+
+  Copyright (C) 2015-2016, Red Hat, Inc.
+  Copyright (c) 2014, ARM Ltd. All rights reserved.
+  Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 20/23] OvmfPkg/Sec: Add RISC-V SEC module

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Add the SEC module for RISC-V. It uses the PEI less design.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Brijesh Singh 
Cc: Erdem Aktas 
Cc: James Bottomley 
Cc: Min Xu 
Cc: Tom Lendacky 
Cc: Daniel Schaefer 
Cc: Abner Chang 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 OvmfPkg/Sec/SecMainRiscV64.inf |  58 +++
 OvmfPkg/Sec/RiscV64/SecMain.h  |  63 
 OvmfPkg/Sec/RiscV64/SecMain.c  | 104 
 OvmfPkg/Sec/RiscV64/SecEntry.S |  21 
 4 files changed, 246 insertions(+)

diff --git a/OvmfPkg/Sec/SecMainRiscV64.inf b/OvmfPkg/Sec/SecMainRiscV64.inf
new file mode 100644
index ..79a9538aebde
--- /dev/null
+++ b/OvmfPkg/Sec/SecMainRiscV64.inf
@@ -0,0 +1,58 @@
+## @file
+#  SEC Driver for RISC-V
+#
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = SecMainRiscV64
+  FILE_GUID  = 16740C0A-AA84-4F62-A06D-AE328057AE07
+  MODULE_TYPE= SEC
+  VERSION_STRING = 1.0
+  ENTRY_POINT= SecMain
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources]
+  RiscV64/SecEntry.S
+  RiscV64/SecMain.c
+  RiscV64/SecMain.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  PcdLib
+  IoLib
+  PeCoffLib
+  LzmaDecompressLib
+  PlatformInitLib
+  RiscVSbiLib
+  PrePiLib
+
+[Ppis]
+  gEfiTemporaryRamSupportPpiGuid# PPI ALWAYS_PRODUCED
+  gEfiTemporaryRamDonePpiGuid   ## PRODUCES
+
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress
diff --git a/OvmfPkg/Sec/RiscV64/SecMain.h b/OvmfPkg/Sec/RiscV64/SecMain.h
new file mode 100644
index ..9d459dccaad4
--- /dev/null
+++ b/OvmfPkg/Sec/RiscV64/SecMain.h
@@ -0,0 +1,63 @@
+/** @file
+  Master header file for SecCore.
+
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef SEC_MAIN_H_
+#define SEC_MAIN_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Entry point to the C language phase of SEC. After the SEC assembly
+  code has initialized some temporary memory and set up the stack,
+  the control is transferred to this function.
+
+  @param SizeOfRam   Size of the temporary memory available for use.
+  @param TempRamBase Base address of temporary ram
+  @param BootFirmwareVolume  Base address of the Boot Firmware Volume.
+**/
+VOID
+NORETURN
+EFIAPI
+SecStartup (
+  IN  UINTN  BootHartId,
+  IN  VOID   *DeviceTreeAddress
+  );
+
+/**
+  Auto-generated function that calls the library constructors for all of the 
module's
+  dependent libraries.  This function must be called by the SEC Core once a 
stack has
+  been established.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryConstructorList (
+  VOID
+  );
+
+#endif
diff --git a/OvmfPkg/Sec/RiscV64/SecMain.c b/OvmfPkg/Sec/RiscV64/SecMain.c
new file mode 100644
index ..054e49ef0c1e
--- /dev/null
+++ b/OvmfPkg/Sec/RiscV64/SecMain.c
@@ -0,0 +1,104 @@
+/** @file
+  RISC-V SEC phase module for Qemu Virt.
+
+  Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SecMain.h"
+
+STATIC
+EFI_STATUS
+EFIAPI
+SecInitializePlatform (
+  VOID
+  )
+{
+  EFI_STATUS  Status;
+
+  MemoryPeimInitialization ();
+
+  CpuPeimInitialization ();
+
+  // Set the Boot Mode
+  SetBootMode (BOOT_WITH_FULL_CONFIGURATION);
+
+  Status = PlatformPeimInitialization ();
+  ASSERT_EFI_ERROR (Status);
+
+  return EFI_SUCCESS;
+}
+
+/**
+
+  Entry point to the C language phase of SEC. After the SEC assembly
+  code has initialized some temporary memory and set up the stack,
+  the control is transferred to this function.
+
+
+  @param[in]  BootHartId Hardware thread ID of boot hart.
+  @param[in]  DeviceTreeAddress  Pointer to Device Tree (DTB)
+**/
+VOID
+NORETURN
+EFIAPI
+SecStartup (
+  IN  UINTN  BootHartId,
+  IN  VOID   *DeviceTreeAddress
+  

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 19/23] OvmfPkg/ResetSystemLib: Add RISC-V instance

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

This is mostly copied from
edk2-platforms/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Rebecca Cran 
Cc: Peter Grehan 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
---
 OvmfPkg/Library/ResetSystemLib/BaseRiscV64ResetSystemLib.inf |  38 ++
 OvmfPkg/Library/ResetSystemLib/RiscV64/DxeResetShutdown.c|  20 +++
 OvmfPkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c  | 128 

 3 files changed, 186 insertions(+)

diff --git a/OvmfPkg/Library/ResetSystemLib/BaseRiscV64ResetSystemLib.inf 
b/OvmfPkg/Library/ResetSystemLib/BaseRiscV64ResetSystemLib.inf
new file mode 100644
index ..f26ddf682625
--- /dev/null
+++ b/OvmfPkg/Library/ResetSystemLib/BaseRiscV64ResetSystemLib.inf
@@ -0,0 +1,38 @@
+## @file
+#  Base library instance for ResetSystem library class for RISC-V
+#
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = BaseRiscV64ResetSystemLib
+  FILE_GUID  = AB45A200-769D-4C10-B0D6-5E1FF5EEBF31
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = ResetSystemLib
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources]
+  RiscV64/ResetSystemLib.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  IoLib
+  TimerLib
+  RiscVSbiLib
diff --git a/OvmfPkg/Library/ResetSystemLib/RiscV64/DxeResetShutdown.c 
b/OvmfPkg/Library/ResetSystemLib/RiscV64/DxeResetShutdown.c
new file mode 100644
index ..027e235cad11
--- /dev/null
+++ b/OvmfPkg/Library/ResetSystemLib/RiscV64/DxeResetShutdown.c
@@ -0,0 +1,20 @@
+/** @file
+  DXE Reset System Library Shutdown API implementation for OVMF.
+
+  Copyright (C) 2020, Red Hat, Inc.
+  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include // CpuDeadLoop()
+#include  // ResetShutdown()
+
+EFI_STATUS
+EFIAPI
+DxeResetInit (
+  IN EFI_HANDLEImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
+  )
+{
+  return EFI_SUCCESS;
+}
diff --git a/OvmfPkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c 
b/OvmfPkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c
new file mode 100644
index ..14f7653aa8de
--- /dev/null
+++ b/OvmfPkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c
@@ -0,0 +1,128 @@
+/** @file
+  Reset System Library functions for RISC-V
+
+  Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  This function causes a system-wide reset (cold reset), in which
+  all circuitry within the system returns to its initial state. This type of 
reset
+  is asynchronous to system operation and operates without regard to
+  cycle boundaries.
+
+  If this function returns, it means that the system does not support cold 
reset.
+**/
+VOID
+EFIAPI
+ResetCold (
+  VOID
+  )
+{
+  // Warm Reset via SBI ecall
+  SbiSystemReset (SBI_SRST_RESET_TYPE_COLD_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+  This function causes a system-wide initialization (warm reset), in which all 
processors
+  are set to their initial state. Pending cycles are not corrupted.
+
+  If this function returns, it means that the system does not support warm 
reset.
+**/
+VOID
+EFIAPI
+ResetWarm (
+  VOID
+  )
+{
+  // Warm Reset via SBI ecall
+  SbiSystemReset (SBI_SRST_RESET_TYPE_WARM_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+  This function causes the system to enter a power state equivalent
+  to the ACPI G2/S5 or G3 states.
+
+  If this function returns, it means that the system does not support shutdown 
reset.
+**/
+VOID
+EFIAPI
+ResetShutdown (
+  VOID
+  )
+{
+  // Shut down via SBI ecall
+  SbiSystemReset (SBI_SRST_RESET_TYPE_SHUTDOWN, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+  This function causes a systemwide reset. The exact type of the reset is
+  defined by the EFI_GUID that follows the Null-terminated Unicode string 
passed
+  into ResetData. If the platform does not recognize the EFI_GUID in ResetData
+  the platform must pick a supported reset type to perform. The platform may
+  optionally log the parameters from any non-normal reset that occurs.
+
+  @param[in]  DataSize   The size, in bytes, of ResetData.
+  @param[in]  ResetData  The data buffer starts with a Null-terminated string,
+ followed by the EFI_GUID.
+**/
+VOID
+EFIAPI
+ResetPlatformSpecific (
+  IN UINTN  DataSize,
+  IN VOID   *ResetData
+  )
+{
+  //
+  // Can map to Ope

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 18/23] OvmfPkg: Add PciCpuIo2Dxe driver

[Sunil V L]

Add PciCpuIo2Dxe driver to implement EFI_CPU_IO2_PROTOCOL
to add the translation for IO access. This is copied from
ArmPciCpuIo2Dxe driver since this is required by others
like RISC-V.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Sunil V L 
---
 OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.inf |  48 ++
 OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.c   | 557 
 2 files changed, 605 insertions(+)

diff --git a/OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.inf 
b/OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
new file mode 100644
index ..4f78cfa4067b
--- /dev/null
+++ b/OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
@@ -0,0 +1,48 @@
+## @file
+#  Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
+#
+# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.
+# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = PciCpuIo2Dxe
+  FILE_GUID  = 9BD3C765-2579-4CF0-9349-D77205565030
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= PciCpuIo2Initialize
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources]
+  PciCpuIo2Dxe.c
+
+[Packages]
+  OvmfPkg/OvmfPkg.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  UefiDriverEntryPoint
+  BaseLib
+  DebugLib
+  IoLib
+  PcdLib
+  UefiBootServicesTableLib
+
+[Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation
+
+[Protocols]
+  gEfiCpuIo2ProtocolGuid ## PRODUCES
+
+[Depex]
+  TRUE
diff --git a/OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.c 
b/OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.c
new file mode 100644
index ..f3bf07e63141
--- /dev/null
+++ b/OvmfPkg/PciCpuIo2Dxe/PciCpuIo2Dxe.c
@@ -0,0 +1,557 @@
+/** @file
+  Produces the CPU I/O 2 Protocol.
+
+Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
+Copyright (c) 2016, Linaro Ltd. All rights reserved.
+Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MAX_IO_PORT_ADDRESS  0x
+
+//
+// Handle for the CPU I/O 2 Protocol
+//
+STATIC EFI_HANDLE  mHandle = NULL;
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8  mInStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  0, // EfiCpuIoWidthFifoUint8
+  0, // EfiCpuIoWidthFifoUint16
+  0, // EfiCpuIoWidthFifoUint32
+  0, // EfiCpuIoWidthFifoUint64
+  1, // EfiCpuIoWidthFillUint8
+  2, // EfiCpuIoWidthFillUint16
+  4, // EfiCpuIoWidthFillUint32
+  8  // EfiCpuIoWidthFillUint64
+};
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8  mOutStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  1, // EfiCpuIoWidthFifoUint8
+  2, // EfiCpuIoWidthFifoUint16
+  4, // EfiCpuIoWidthFifoUint32
+  8, // EfiCpuIoWidthFifoUint64
+  0, // EfiCpuIoWidthFillUint8
+  0, // EfiCpuIoWidthFillUint16
+  0, // EfiCpuIoWidthFillUint32
+  0  // EfiCpuIoWidthFillUint64
+};
+
+/**
+  Check parameters to a CPU I/O 2 Protocol service request.
+
+  The I/O operations are carried out exactly as requested. The caller is 
responsible
+  for satisfying any alignment and I/O width restrictions that a PI System on a
+  platform might require. For example on some platforms, width requests of
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+  be handled by the driver.
+
+  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port 
operation.
+  @param[in] Width  Signifies the width of the I/O or Memory operation.
+  @param[in] AddressThe base address of the I/O operation.
+  @param[in] Count  The number of I/O operations to perform. The 
number of
+bytes moved is Width size * Count, starting at 
Address.
+  @param[in] Buffer For read operations, the destination buffer to 
store the results.
+For write operations, the source buffer from which 
to write data.
+
+  @retval EFI_SUCCESSThe parameters for this request pass the 
checks.
+  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
+  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
+  @retval EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
+  @retval EFI_UNSUPPORTEDThe address range specified by Address, Width,
+ and Count is not valid for this PI sys

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 17/23] OvmfPkg: Add PrePiHobListPointerLib library

[Sunil V L]

This library is required to use the PEI less design for
RISC-V qemu virt support.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
---
 OvmfPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf| 23 
+++
 OvmfPkg/Library/PrePiHobListPointerLib/RiscV64/PrePiHobListPointer.c | 65 

 2 files changed, 88 insertions(+)

diff --git a/OvmfPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf 
b/OvmfPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
new file mode 100644
index ..4105e60f59e1
--- /dev/null
+++ b/OvmfPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
@@ -0,0 +1,23 @@
+#/** @file
+#
+#  Copyright (c) 2021, Intel Corporation. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = PrePiHobListPointerLib
+  FILE_GUID  = E3FAFC60-758C-471B-A333-FE704A4C11B4
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PrePiHobListPointerLib
+
+[Sources.RISCV64]
+  RiscV64/PrePiHobListPointer.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
diff --git 
a/OvmfPkg/Library/PrePiHobListPointerLib/RiscV64/PrePiHobListPointer.c 
b/OvmfPkg/Library/PrePiHobListPointerLib/RiscV64/PrePiHobListPointer.c
new file mode 100644
index ..a58b7aae6bee
--- /dev/null
+++ b/OvmfPkg/Library/PrePiHobListPointerLib/RiscV64/PrePiHobListPointer.c
@@ -0,0 +1,65 @@
+/** @file
+*
+*  Copyright (c) 2021, Intel Corporation. All rights reserved.
+*  SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Returns the pointer to the HOB list.
+
+  This function returns the pointer to first HOB in the list.
+
+  @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+PrePeiGetHobList (
+  VOID
+  )
+{
+  EFI_RISCV_FIRMWARE_CONTEXT  *FirmwareContext;
+
+  FirmwareContext = NULL;
+  GetFirmwareContextPointer (&FirmwareContext);
+
+  if (FirmwareContext == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Firmware Context is NULL\n", __FUNCTION__));
+return NULL;
+  }
+
+  return (VOID *)FirmwareContext->PrePiHobList;
+}
+
+/**
+  Updates the pointer to the HOB list.
+
+  @param  HobList   Hob list pointer to store
+
+**/
+EFI_STATUS
+EFIAPI
+PrePeiSetHobList (
+  IN  VOID  *HobList
+  )
+{
+  EFI_RISCV_FIRMWARE_CONTEXT  *FirmwareContext;
+
+  FirmwareContext = NULL;
+  GetFirmwareContextPointer (&FirmwareContext);
+
+  if (FirmwareContext == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Firmware Context is NULL\n", __FUNCTION__));
+return EFI_NOT_READY;
+  }
+
+  FirmwareContext->PrePiHobList = HobList;
+  return EFI_SUCCESS;
+}
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 16/23] OvmfPkg/PlatformInitLib: Add RISC-V instance

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

This is copied from
edk2-platforms/Platform/RISC-V/PlatformPkg/Universal/FdtPeim
but added as part of library instead of a separate module.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
---
 OvmfPkg/Library/PlatformInitLib/BaseRiscV64PlatformInitLib.inf |  51 
 OvmfPkg/Include/Library/PlatformInitLib.h  |  39 +++
 OvmfPkg/Library/PlatformInitLib/RiscV64/Cpu.c  |  33 +++
 OvmfPkg/Library/PlatformInitLib/RiscV64/Memory.c   | 263 

 OvmfPkg/Library/PlatformInitLib/RiscV64/Platform.c |  83 ++
 5 files changed, 469 insertions(+)

diff --git a/OvmfPkg/Library/PlatformInitLib/BaseRiscV64PlatformInitLib.inf 
b/OvmfPkg/Library/PlatformInitLib/BaseRiscV64PlatformInitLib.inf
new file mode 100644
index ..323e9b17970f
--- /dev/null
+++ b/OvmfPkg/Library/PlatformInitLib/BaseRiscV64PlatformInitLib.inf
@@ -0,0 +1,51 @@
+## @file
+#  Platform Initialization Lib for RISC-V
+#
+#  This module provides platform specific functions for RISC-V.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = BaseRiscV64PlatformInitLib
+  FILE_GUID  = 0D1B3448-4D8E-44EE-80C9-907443047F79
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PlatformInitLib|SEC PEIM
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources]
+  RiscV64/Platform.c
+  RiscV64/Cpu.c
+  RiscV64/Memory.c
+
+[Packages]
+  EmbeddedPkg/EmbeddedPkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+  IoLib
+  HobLib
+  RiscVSbiLib
+  FdtLib
+  MemoryAllocationLib
+
+[Guids]
+  gFdtHobGuid
+
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFvBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFvSize
diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h 
b/OvmfPkg/Include/Library/PlatformInitLib.h
index bf6f90a5761c..09fe1d9bf2c0 100644
--- a/OvmfPkg/Include/Library/PlatformInitLib.h
+++ b/OvmfPkg/Include/Library/PlatformInitLib.h
@@ -291,4 +291,43 @@ PlatformInitEmuVariableNvStore (
   IN VOID  *EmuVariableNvStore
   );
 
+/**
+  Perform Platform PEIM initialization.
+
+  @return EFI_SUCCESS The platform initialized successfully.
+  @retval  Others- As the error code indicates
+
+**/
+EFI_STATUS
+EFIAPI
+PlatformPeimInitialization (
+  VOID
+  );
+
+/**
+  Perform Memory PEIM initialization.
+
+  @return EFI_SUCCESS The platform initialized successfully.
+  @retval  Others- As the error code indicates
+
+**/
+EFI_STATUS
+EFIAPI
+MemoryPeimInitialization (
+  VOID
+  );
+
+/**
+  Perform CPU PEIM initialization.
+
+  @return EFI_SUCCESS The platform initialized successfully.
+  @retval  Others- As the error code indicates
+
+**/
+EFI_STATUS
+EFIAPI
+CpuPeimInitialization (
+  VOID
+  );
+
 #endif // PLATFORM_INIT_LIB_H_
diff --git a/OvmfPkg/Library/PlatformInitLib/RiscV64/Cpu.c 
b/OvmfPkg/Library/PlatformInitLib/RiscV64/Cpu.c
new file mode 100644
index ..2c16df697e37
--- /dev/null
+++ b/OvmfPkg/Library/PlatformInitLib/RiscV64/Cpu.c
@@ -0,0 +1,33 @@
+/** @file
+The library call to pass the device tree to DXE via HOB.
+
+Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+ The package level header files this module uses
+
+#include 
+
+#include 
+#include 
+
+/**
+  Cpu Peim initialization.
+
+**/
+EFI_STATUS
+CpuPeimInitialization (
+  VOID
+  )
+{
+  //
+  // for MMU type >= sv39
+  //
+  BuildCpuHob (56, 32);
+
+  return EFI_SUCCESS;
+}
diff --git a/OvmfPkg/Library/PlatformInitLib/RiscV64/Memory.c 
b/OvmfPkg/Library/PlatformInitLib/RiscV64/Memory.c
new file mode 100644
index ..70935b07b56b
--- /dev/null
+++ b/OvmfPkg/Library/PlatformInitLib/RiscV64/Memory.c
@@ -0,0 +1,263 @@
+/** @file
+  Memory Detection for Virtual Machines.
+
+  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+Module Name:
+
+  MemDetect.c
+
+**/
+
+//
+// The package level header files this module uses
+//
+#include 
+
+//
+// The Library classes this module consumes
+//
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+VOID
+BuildMemoryTypeInformationHob (
+  VOID
+  );
+
+/**
+  Build reserved memory range resource HOB.
+
+  @param  MemoryBase  

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 13/23] ArmVirtPkg/PlatformHasAcpiDtDxe: Move to OvmfPkg

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

This module is required by other architectures like RISC-V.
Hence, move this to OvmfPkg.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Signed-off-by: Sunil V L 
---
 ArmVirtPkg/ArmVirtPkg.dec | 9 
-
 OvmfPkg/OvmfPkg.dec   | 7 
+++
 {ArmVirtPkg => OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf | 3 +--
 {ArmVirtPkg => OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c   | 0
 4 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec
index 89d21ec3a364..4645c91a8375 100644
--- a/ArmVirtPkg/ArmVirtPkg.dec
+++ b/ArmVirtPkg/ArmVirtPkg.dec
@@ -34,8 +34,6 @@ [Guids.common]
   gEarly16550UartBaseAddressGuid   = { 0xea67ca3e, 0x1f54, 0x436b, { 0x97, 
0x88, 0xd4, 0xeb, 0x29, 0xc3, 0x42, 0x67 } }
   gArmVirtSystemMemorySizeGuid = { 0x504eccb9, 0x1bf0, 0x4420, { 0x86, 
0x5d, 0xdc, 0x66, 0x06, 0xd4, 0x13, 0xbf } }
 
-  gArmVirtVariableGuid   = { 0x50bea1e5, 0xa2c5, 0x46e9, { 0x9b, 0x3a, 0x59, 
0x59, 0x65, 0x16, 0xb0, 0x0a } }
-
 [PcdsFeatureFlag]
   #
   # Feature Flag PCD that defines whether TPM2 support is enabled
@@ -69,10 +67,3 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
   # Cloud Hypervisor has no other way to pass Rsdp address to the guest except 
use a PCD.
   #
   gArmVirtTokenSpaceGuid.PcdCloudHvAcpiRsdpBaseAddress|0x0|UINT64|0x0005
-
-[PcdsDynamic]
-  #
-  # Whether to force disable ACPI, regardless of the fw_cfg settings
-  # exposed by QEMU
-  #
-  gArmVirtTokenSpaceGuid.PcdForceNoAcpi|0x0|BOOLEAN|0x0003
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 5f5556c67c6c..7df05770b5d6 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -151,6 +151,7 @@ [Guids]
   gConfidentialComputingSevSnpBlobGuid  = {0x067b1f5f, 0xcf26, 0x44c5, {0x85, 
0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42}}
   gUefiOvmfPkgPlatformInfoGuid  = {0xdec9b486, 0x1f16, 0x47c7, {0x8f, 
0x68, 0xdf, 0x1a, 0x41, 0x88, 0x8b, 0xa5}}
   gVMMBootOrderGuid = {0x668f4529, 0x63d0, 0x4bb5, {0xb6, 
0x5d, 0x6f, 0xbb, 0x9d, 0x36, 0xa4, 0x4a}}
+  gOvmfVariableGuid = {0x50bea1e5, 0xa2c5, 0x46e9, {0x9b, 
0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a}}
 
 [Ppis]
   # PPI whose presence in the PPI database signals that the TPM base address
@@ -460,6 +461,12 @@ [PcdsDynamic, PcdsDynamicEx]
   ## This PCD records LASA field in CC EVENTLOG ACPI table.
   gUefiOvmfPkgTokenSpaceGuid.PcdCcEventlogAcpiTableLasa|0|UINT64|0x67
 
+  #
+  # Whether to force disable ACPI, regardless of the fw_cfg settings
+  # exposed by QEMU
+  #
+  gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|0x0|BOOLEAN|0x69
+
 [PcdsFeatureFlag]
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
diff --git a/ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf 
b/OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
similarity index 89%
rename from ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
rename to OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
index e900aa992661..85873f73b2eb 100644
--- a/ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
+++ b/OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
@@ -19,7 +19,6 @@ [Sources]
   PlatformHasAcpiDtDxe.c
 
 [Packages]
-  ArmVirtPkg/ArmVirtPkg.dec
   EmbeddedPkg/EmbeddedPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
@@ -38,7 +37,7 @@ [Guids]
   gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL
 
 [Pcd]
-  gArmVirtTokenSpaceGuid.PcdForceNoAcpi
+  gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi
 
 [Depex]
   gEfiVariableArchProtocolGuid
diff --git a/ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c 
b/OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c
similarity index 100%
rename from ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c
rename to OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 15/23] OvmfPkg: Add VirtNorFlashPlatformLib library

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Add the VirtNorFlashPlatformLib library for qemu virt machines.

Add two instances of the library. One which uses DT information
and the other which is static. They are copied from
ArmVirtPkg and SbsaQemu. Two PCD variables used by the library
are added in the OvmfPkg.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
---
 OvmfPkg/OvmfPkg.dec   |   4 +
 OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.inf |  40 
++
 OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf |  30 
+
 OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.c   | 136 

 OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.c   |  40 
++
 5 files changed, 250 insertions(+)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 7df05770b5d6..7e1c2fc42412 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -409,6 +409,10 @@ [PcdsFixedAtBuild]
   #  check to decide whether to abort dispatch of the driver it is linked into.
   gUefiOvmfPkgTokenSpaceGuid.PcdEntryPointOverrideFwCfgVarName|""|VOID*|0x68
 
+  ## The base address and size of the FVMAIN
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFvBaseAddress|0|UINT64|0x71
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFvSize|0|UINT32|0x72
+
 [PcdsDynamic, PcdsDynamicEx]
   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
diff --git 
a/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.inf 
b/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.inf
new file mode 100644
index ..5b7a45d15782
--- /dev/null
+++ b/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.inf
@@ -0,0 +1,40 @@
+#/** @file
+#
+#  Component description file for VirtNorFlashDeviceTreeLib module
+#
+#  Copyright (c) 2014, Linaro Ltd. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = VirtNorFlashDeviceTreeLib
+  FILE_GUID  = 42C30D8E-BFAD-4E77-9041-E7DAAE88DF7A
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = VirtNorFlashPlatformLib
+
+[Sources.common]
+  VirtNorFlashDeviceTreeLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gFdtClientProtocolGuid  ## CONSUMES
+
+[Depex]
+  gFdtClientProtocolGuid
+
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFvBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFvSize
diff --git a/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf 
b/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf
new file mode 100644
index ..4e87bd437380
--- /dev/null
+++ b/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashStaticLib.inf
@@ -0,0 +1,30 @@
+#/** @file
+#
+#  Component description file for VirtNorFlashStaticLib module
+#
+#  Copyright (c) 2014, Linaro Ltd. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = VirtNorFlashStaticLib
+  FILE_GUID  = 064742F1-E531-4D7D-A154-22315889CC23
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = VirtNorFlashPlatformLib
+
+[Sources.common]
+  VirtNorFlashStaticLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
diff --git 
a/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.c 
b/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.c
new file mode 100644
index ..08750e66095d
--- /dev/null
+++ b/OvmfPkg/Library/VirtNorFlashPlatformLib/VirtNorFlashDeviceTreeLib.c
@@ -0,0 +1,136 @@
+/** @file
+
+ Copyright (c) 2014-2018, Linaro Ltd. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ **/
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define QEMU_NOR_BLOCK_SIZE  SIZE_256KB
+
+#define MAX_FLASH_BANKS  4
+
+EFI_STATUS
+VirtNorFlashPlatformInitialization (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+VIRT_NOR_FLASH_DESCRIPTION  mNorFlashDevices[MAX_FLASH_BANKS];
+
+EFI_STATUS
+VirtNorFlashPlatformGetDevices (
+  OUT VIRT_NOR_FLASH_DESCRIPTION  **NorFlashDescriptions,
+  OUT UINT32  *Count
+  )
+{
+  FDT_CLIENT_PROTOCOL  *FdtClient;
+  INT32No

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 14/23] ArmVirtPkg: Fix up the location of PlatformHasAcpiDtDxe

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

PlatformHasAcpiDtDxe is required by other architectures also.
Hence, it is moved to OvmfPkg. So, update the consumers of this
module with the new location.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Signed-off-by: Sunil V L 
---
 ArmVirtPkg/ArmVirtCloudHv.dsc  | 2 +-
 ArmVirtPkg/ArmVirtQemu.dsc | 4 ++--
 ArmVirtPkg/ArmVirtQemuKernel.dsc   | 2 +-
 ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf | 2 +-
 ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf   | 2 +-
 ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc   | 2 +-
 6 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc
index 7ca7a391d9cf..c975e139a216 100644
--- a/ArmVirtPkg/ArmVirtCloudHv.dsc
+++ b/ArmVirtPkg/ArmVirtCloudHv.dsc
@@ -198,7 +198,7 @@ [PcdsDynamicDefault.common]
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0x0
 
 [PcdsDynamicHii]
-  
gArmVirtTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gArmVirtVariableGuid|0x0|FALSE|NV,BS
+  
gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gOvmfVariableGuid|0x0|FALSE|NV,BS
 
 

 #
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f5bc6a3f321d..0390b660c0a8 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -300,7 +300,7 @@ [PcdsPatchableInModule]
 !endif
 
 [PcdsDynamicHii]
-  
gArmVirtTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gArmVirtVariableGuid|0x0|FALSE|NV,BS
+  
gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gOvmfVariableGuid|0x0|FALSE|NV,BS
 
 !if $(TPM2_CONFIG_ENABLE) == TRUE
   
gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x0|"1.3"|NV,BS
@@ -569,7 +569,7 @@ [Components.common]
   #
   # ACPI Support
   #
-  ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
+  OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
 [Components.AARCH64]
   
MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
   OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf {
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 20e735dc5808..f3fd04ffd978 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -457,7 +457,7 @@ [Components.common]
   #
   # ACPI Support
   #
-  ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
+  OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
 [Components.AARCH64]
   
MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
   OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf {
diff --git a/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf 
b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
index 4af06b2a6746..7cad40e11f33 100644
--- a/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
+++ b/ArmVirtPkg/CloudHvPlatformHasAcpiDtDxe/CloudHvHasAcpiDtDxe.inf
@@ -36,7 +36,7 @@ [Guids]
   gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL
 
 [Pcd]
-  gArmVirtTokenSpaceGuid.PcdForceNoAcpi
+  gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi
 
 [Depex]
   gEfiVariableArchProtocolGuid
diff --git a/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf 
b/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
index 1cf25780f830..5888fcdc0b26 100644
--- a/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
+++ b/ArmVirtPkg/KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf
@@ -37,7 +37,7 @@ [Guids]
   gEdkiiPlatformHasDeviceTreeGuid ## SOMETIMES_PRODUCES ## PROTOCOL
 
 [Pcd]
-  gArmVirtTokenSpaceGuid.PcdForceNoAcpi
+  gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi
 
 [Depex]
   TRUE
diff --git a/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc 
b/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc
index e06ca7424476..8a063bac04ac 100644
--- a/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc
+++ b/ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc
@@ -141,7 +141,7 @@ [FV.FvMain]
   #
   # ACPI Support
   #
-  INF ArmVirtPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
+  INF OvmfPkg/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf
 !if $(ARCH) == AARCH64
   INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
   INF 
MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 12/23] ArmVirtPkg: Update the references to NvVarStoreFormattedLib

[Sunil V L]

The NvVarStoreFormattedLib library is moved to MdeModulePkg.
So, updates its users with the new location.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Signed-off-by: Sunil V L 
---
 ArmVirtPkg/ArmVirtKvmTool.dsc| 2 +-
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtKvmTool.dsc b/ArmVirtPkg/ArmVirtKvmTool.dsc
index 2ba00bd08ff1..6aee7e208154 100644
--- a/ArmVirtPkg/ArmVirtKvmTool.dsc
+++ b/ArmVirtPkg/ArmVirtKvmTool.dsc
@@ -263,7 +263,7 @@ [Components.common]
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
 
   NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
-  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+  
NULL|MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   }
 
diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f77443229e8e..f5bc6a3f321d 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -383,7 +383,7 @@ [Components.common]
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
 
   NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
-  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+  
NULL|MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
   # don't use unaligned CopyMem () on the UEFI varstore NOR flash region
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   }
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index f5db3ac432f3..20e735dc5808 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -294,7 +294,7 @@ [Components.common]
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
 
   NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
-  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+  
NULL|MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
   # don't use unaligned CopyMem () on the UEFI varstore NOR flash region
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   }
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 11/23] EmbeddedPkg/NvVarStoreFormattedLib: Migrate to MdeModulePkg

[Sunil V L]

This library is required by NorFlashDxe. Since it will be used by
both virtual and real platforms, migrate this library to
MdeModulePkg.

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Cc: Jian J Wang 
Cc: Liming Gao 
Cc: Andrew Fish 
Cc: Michael D Kinney 
Signed-off-by: Sunil V L 
Acked-by: Ard Biesheuvel 
---
 EmbeddedPkg/EmbeddedPkg.dec
 | 3 ---
 MdeModulePkg/MdeModulePkg.dec  
 | 3 +++
 MdeModulePkg/MdeModulePkg.dsc  
 | 2 ++
 {EmbeddedPkg => 
MdeModulePkg}/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf | 1 -
 {EmbeddedPkg => MdeModulePkg}/Include/Guid/NvVarStoreFormatted.h   
 | 0
 {EmbeddedPkg => 
MdeModulePkg}/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.c   | 0
 6 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec
index e7407a300a76..68702867312b 100644
--- a/EmbeddedPkg/EmbeddedPkg.dec
+++ b/EmbeddedPkg/EmbeddedPkg.dec
@@ -69,9 +69,6 @@ [Guids.common]
   # HII form set GUID for ConsolePrefDxe driver
   gConsolePrefFormSetGuid = { 0x2d2358b4, 0xe96c, 0x484d, { 0xb2, 0xdd, 0x7c, 
0x2e, 0xdf, 0xc7, 0xd5, 0x6f } }
 
-  ## Include/Guid/NvVarStoreFormatted.h
-  gEdkiiNvVarStoreFormattedGuid = { 0xd1a86e3f, 0x0707, 0x4c35, { 0x83, 0xcd, 
0xdc, 0x2c, 0x29, 0xc8, 0x91, 0xa3 } }
-
 [Protocols.common]
   gHardwareInterruptProtocolGuid =  { 0x2890B3EA, 0x053D, 0x1643, { 0xAD, 
0x0C, 0xD6, 0x48, 0x08, 0xDA, 0x3F, 0xF1 } }
   gHardwareInterrupt2ProtocolGuid = { 0x32898322, 0x2da1, 0x474a, { 0xba, 
0xaa, 0xf3, 0xf7, 0xcf, 0x56, 0x94, 0x70 } }
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index be5e829ca9c5..e46bfd6d593c 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -412,6 +412,9 @@ [Guids]
   ## Include/Guid/MigratedFvInfo.h
   gEdkiiMigratedFvInfoGuid = { 0xc1ab12f7, 0x74aa, 0x408d, { 0xa2, 0xf4, 0xc6, 
0xce, 0xfd, 0x17, 0x98, 0x71 } }
 
+  ## Include/Guid/NvVarStoreFormatted.h
+  gEdkiiNvVarStoreFormattedGuid = { 0xd1a86e3f, 0x0707, 0x4c35, { 0x83, 0xcd, 
0xdc, 0x2c, 0x29, 0xc8, 0x91, 0xa3 } }
+
   #
   # GUID defined in UniversalPayload
   #
diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index 659482ab737f..4142e1178dcd 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -104,6 +104,7 @@ [LibraryClasses]
   
VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
   
MmUnblockMemoryLib|MdePkg/Library/MmUnblockMemoryLib/MmUnblockMemoryLibNull.inf
   
VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
+  
NvVarStoreFormattedLib|MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
 
 [LibraryClasses.EBC.PEIM]
   IoLib|MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.inf
@@ -443,6 +444,7 @@ [Components]
   MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
   MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
   MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
+  MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
 
 [Components.IA32, Components.X64, Components.AARCH64]
   MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
diff --git 
a/EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf 
b/MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
similarity index 96%
rename from 
EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
rename to MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
index e2eed26c5b2d..5e8cd94cc9e0 100644
--- a/EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+++ b/MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
@@ -32,7 +32,6 @@ [Sources]
   NvVarStoreFormattedLib.c
 
 [Packages]
-  EmbeddedPkg/EmbeddedPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
 
diff --git a/EmbeddedPkg/Include/Guid/NvVarStoreFormatted.h 
b/MdeModulePkg/Include/Guid/NvVarStoreFormatted.h
similarity index 100%
rename from EmbeddedPkg/Include/Guid/NvVarStoreFormatted.h
rename to MdeModulePkg/Include/Guid/NvVarStoreFormatted.h
diff --git 
a/EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.c 
b/MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.c
similarity index 100%
rename from EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.c
rename to MdeModulePkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.c
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 10/23] EmbeddedPkg: Enable PcdPrePiCpuIoSize for RISC-V

[Sunil V L]

This PCD is required to be enabled so that PrePiLib
can be used in RISC-V.

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
---
 EmbeddedPkg/EmbeddedPkg.dec | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec
index 341ef5e6a679..e7407a300a76 100644
--- a/EmbeddedPkg/EmbeddedPkg.dec
+++ b/EmbeddedPkg/EmbeddedPkg.dec
@@ -165,6 +165,9 @@ [PcdsFixedAtBuild.IA32]
 [PcdsFixedAtBuild.X64]
   gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x0011
 
+[PcdsFixedAtBuild.RISCV64]
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x0011
+
 [PcdsFixedAtBuild.common, PcdsDynamic.common]
   #
   # Value to add to a host address to obtain a device address, using
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 07/23] UefiCpuPkg/CpuDxe: Add RISC-V instance

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

This is copied from
edk2-platforms/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 UefiCpuPkg/UefiCpuPkg.dsc   |   1 +
 UefiCpuPkg/CpuDxe/CpuDxeRiscV64.inf |  68 
 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h  | 199 +++
 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c  | 365 
 4 files changed, 633 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 251a8213f022..8f2be6cd1b05 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -198,6 +198,7 @@ [Components.X64]
 [Components.RISCV64]
   UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
   
UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
+  UefiCpuPkg/CpuDxe/CpuDxeRiscV64.inf
 
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/UefiCpuPkg/CpuDxe/CpuDxeRiscV64.inf 
b/UefiCpuPkg/CpuDxe/CpuDxeRiscV64.inf
new file mode 100644
index ..5e590d03754f
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/CpuDxeRiscV64.inf
@@ -0,0 +1,68 @@
+## @file
+#  RISC-V CPU DXE module.
+#
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = CpuDxeRiscV64
+  MODULE_UNI_FILE= CpuDxe.uni
+  FILE_GUID  = BDEA19E2-778F-473C-BF82-5E38D6A27765
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= InitializeCpu
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  CpuLib
+  DebugLib
+  DxeServicesTableLib
+  MemoryAllocationLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  UefiLib
+  CpuExceptionHandlerLib
+  HobLib
+  ReportStatusCodeLib
+  TimerLib
+  PeCoffGetEntryPointLib
+  RiscVSbiLib
+
+[Sources]
+  RiscV64/CpuDxe.c
+  RiscV64/CpuDxe.h
+
+[Protocols]
+  gEfiCpuArchProtocolGuid   ## PRODUCES
+  gRiscVEfiBootProtocolGuid ## PRODUCES
+
+[Guids]
+  gIdleLoopEventGuid## CONSUMES   ## Event
+
+[Ppis]
+  gEfiSecPlatformInformation2PpiGuid## UNDEFINED # HOB
+  gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
+
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard   ## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask   ## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList  ## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## 
CONSUMES
+
+[Depex]
+  TRUE
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  CpuDxeExtra.uni
diff --git a/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h 
b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h
new file mode 100644
index ..49f4e119665a
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h
@@ -0,0 +1,199 @@
+/** @file
+  RISC-V CPU DXE module header file.
+
+  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CPU_DXE_H_
+#define CPU_DXE_H_
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Flush CPU data cache. If the instruction cache is fully coherent
+  with all DMA operations then function can just return EFI_SUCCESS.
+
+  @param  This  Protocol instance structure
+  @param  Start Physical address to start flushing from.
+  @param  LengthNumber of bytes to flush. Round up to chipset
+granularity.
+  @param  FlushType Specifies the type of flush operation to perform.
+
+  @retval EFI_SUCCESS   If cache was flushed
+  @retval EFI_UNSUPPORTED   If flush type is not supported.
+  @retval EFI_DEVICE_ERROR  If requested range could not be flushed.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuFlushCpuDataCache (
+  IN EFI_CPU_ARCH_PROTOCOL  *This,
+  IN EFI_PHYSICAL_ADDRESS   Start,
+  IN UINT64 Length,
+  IN EFI_CPU_FLUSH_TYPE FlushType
+  );
+
+/**
+  Enables CPU interrupts.
+
+  @param  This  Protocol instance structure
+
+  @retval EFI_SUCCESS   If interrupts were enabled in the CPU
+  @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuEnableInterrupt (
+  IN EFI_CPU_ARCH_PROTOCOL  *This
+  );
+
+/**
+  Disables CPU interrupts.
+
+  @param  This  Protocol instance structure
+
+  @re

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 09/23] UefiCpuPkg/UefiCpuPkg.ci.yaml: Ignore RISC-V file

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

RISC-V register names do not follow the EDK2 formatting.
So, add it to ignore list for now.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 UefiCpuPkg/UefiCpuPkg.ci.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index a377366798b0..953361ba0479 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -27,6 +27,7 @@
 ],
 ## Both file path and directory path are accepted.
 "IgnoreFiles": [
+  "Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h"
 ]
 },
 "CompilerPlugin": {
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 08/23] UefiCpuPkg/CpuTimerLib: Add RISC-V instance

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

This is mostly copied from
edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Daniel Schaefer 
Cc: Abner Chang 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 UefiCpuPkg/UefiCpuPkg.dsc |   1 +
 UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf |  32 
 UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c  | 199 

 3 files changed, 232 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 8f2be6cd1b05..2df02bf75a35 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -199,6 +199,7 @@ [Components.RISCV64]
   UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
   
UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
   UefiCpuPkg/CpuDxe/CpuDxeRiscV64.inf
+  UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf
 
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf
new file mode 100644
index ..c920e8e098b5
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseRiscV64CpuTimerLib.inf
@@ -0,0 +1,32 @@
+## @file
+# RISC-V Base CPU Timer Library Instance
+#
+#  Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = BaseRisV64CpuTimerLib
+  FILE_GUID  = B635A600-EA24-4199-88E8-5761EEA96A51
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TimerLib
+
+[Sources]
+  RiscV64/CpuTimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  DebugLib
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c 
b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
new file mode 100644
index ..9c8efc0f3530
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
@@ -0,0 +1,199 @@
+/** @file
+  RISC-V instance of Timer Library.
+
+  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Stalls the CPU for at least the given number of ticks.
+
+  Stalls the CPU for at least the given number of ticks. It's invoked by
+  MicroSecondDelay() and NanoSecondDelay().
+
+  @param  Delay A period of time to delay in ticks.
+
+**/
+VOID
+InternalRiscVTimerDelay (
+  IN UINT32  Delay
+  )
+{
+  UINT32  Ticks;
+  UINT32  Times;
+
+  Times  = Delay >> (RISCV_TIMER_COMPARE_BITS - 2);
+  Delay &= ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1);
+  do {
+//
+// The target timer count is calculated here
+//
+Ticks = RiscVReadTimer () + Delay;
+Delay = 1 << (RISCV_TIMER_COMPARE_BITS - 2);
+while (((Ticks - RiscVReadTimer ()) & (1 << (RISCV_TIMER_COMPARE_BITS - 
1))) == 0) {
+  CpuPause ();
+}
+  } while (Times-- > 0);
+}
+
+/**
+  Stalls the CPU for at least the given number of microseconds.
+
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+  @param  MicroSeconds  The minimum number of microseconds to delay.
+
+  @return MicroSeconds
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+  IN UINTN  MicroSeconds
+  )
+{
+  InternalRiscVTimerDelay (
+(UINT32)DivU64x32 (
+  MultU64x32 (
+MicroSeconds,
+PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+),
+  100u
+  )
+);
+  return MicroSeconds;
+}
+
+/**
+  Stalls the CPU for at least the given number of nanoseconds.
+
+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+  @param  NanoSeconds The minimum number of nanoseconds to delay.
+
+  @return NanoSeconds
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+  IN UINTN  NanoSeconds
+  )
+{
+  InternalRiscVTimerDelay (
+(UINT32)DivU64x32 (
+  MultU64x32 (
+NanoSeconds,
+PcdGet64 (PcdCpuCoreCrystalClockFrequency)
+),
+  10u
+  )
+);
+  return NanoSeconds;
+}
+
+/**
+  Retrieves the current value of a 64-bit free running performance counter.
+
+  Retrieves the current value of a 64-bit free running performance counter. The
+  counter can either count up by 1 or count down by 1. If the physical
+  performance counter counts by a larger increment, then the counter values
+  must be translated. The pr

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 06/23] UefiCpuPkg/CpuExceptionHandlerLib: Add RISC-V instance

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Add Cpu Exception Handler library for RISC-V. This is copied
from edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Daniel Schaefer 
Cc: Abner Chang 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 UefiCpuPkg/UefiCpuPkg.dsc  
 |   1 +
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf 
|  42 +++
 UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h 
 | 116 +
 UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.c 
 | 133 
 UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/SupervisorTrapHandler.S  
 | 105 
 5 files changed, 397 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 96f6770281fe..251a8213f022 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -197,6 +197,7 @@ [Components.X64]
 
 [Components.RISCV64]
   UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
+  
UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
 
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
new file mode 100644
index ..82ca22c4bfec
--- /dev/null
+++ 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
@@ -0,0 +1,42 @@
+## @file
+# RISC-V CPU Exception Handler Library
+#
+# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = BaseRiscV64CpuExceptionHandlerLib
+  MODULE_UNI_FILE= BaseRiscV64CpuExceptionHandlerLib.uni
+  FILE_GUID  = 6AB0D5FD-E615-45A3-9374-E284FB061FC9
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = CpuExceptionHandlerLib
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+
+[Sources]
+  RiscV64/SupervisorTrapHandler.S
+  RiscV64/CpuExceptionHandlerLib.c
+  RiscV64/CpuExceptionHandlerLib.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  SerialPortLib
+  PrintLib
+  SynchronizationLib
+  PeCoffGetEntryPointLib
+  MemoryAllocationLib
+  DebugLib
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h
new file mode 100644
index ..30f47e87552b
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h
@@ -0,0 +1,116 @@
+/** @file
+
+  RISC-V Exception Handler library definition file.
+
+  Copyright (c) 2019-2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef RISCV_CPU_EXECPTION_HANDLER_LIB_H_
+#define RISCV_CPU_EXECPTION_HANDLER_LIB_H_
+
+#include 
+
+/**
+  Trap Handler for S-mode
+
+**/
+VOID
+SupervisorModeTrap (
+  VOID
+  );
+
+//
+// Index of SMode trap register
+//
+#define SMODE_TRAP_REGS_zero 0
+#define SMODE_TRAP_REGS_ra   1
+#define SMODE_TRAP_REGS_sp   2
+#define SMODE_TRAP_REGS_gp   3
+#define SMODE_TRAP_REGS_tp   4
+#define SMODE_TRAP_REGS_t0   5
+#define SMODE_TRAP_REGS_t1   6
+#define SMODE_TRAP_REGS_t2   7
+#define SMODE_TRAP_REGS_s0   8
+#define SMODE_TRAP_REGS_s1   9
+#define SMODE_TRAP_REGS_a0   10
+#define SMODE_TRAP_REGS_a1   11
+#define SMODE_TRAP_REGS_a2   12
+#define SMODE_TRAP_REGS_a3   13
+#define SMODE_TRAP_REGS_a4   14
+#define SMODE_TRAP_REGS_a5   15
+#define SMODE_TRAP_REGS_a6   16
+#define SMODE_TRAP_REGS_a7   17
+#define SMODE_TRAP_REGS_s2   18
+#define SMODE_TRAP_REGS_s3   19
+#define SMODE_TRAP_REGS_s4   20
+#define SMODE_TRAP_REGS_s5   21
+#define SMODE_TRAP_REGS_s6   22
+#define SMODE_TRAP_REGS_s7   23
+#define SMODE_TRAP_REGS_s8   24
+#define SMODE_TRAP_REGS_s9   25
+#define SMODE_TRAP_REGS_s10  26
+#define SMODE_TRAP_REGS_s11  27
+#define SMODE_TRAP_REGS_t3   28
+#define SMODE_TRAP_REGS_t4   29
+#define SMODE_TRAP_REGS_t5   30
+#define SMODE_TRAP_REGS_t6   31
+#define SMODE_TRAP_REGS_sepc 32
+#define SMODE_TRAP_REGS_sstatus  33
+#define SMODE_TRAP_REGS_sie  34
+#define SMODE_TRAP_REGS_last 35
+
+#define SMODE_TRAP_REGS_OFFSET(x)  ((SMODE_TRAP_REGS_##x) * __SIZEOF_POINTER__)
+#define SMODE_TRAP_REGS_SIZE  SMODE_TRAP_REGS_OFFSET(

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 05/23] UefiCpuPkg: Add CpuTimerDxe module

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

This DXE module initializes the timer interrupt handler
and installs the Arch Timer protocol.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 UefiCpuPkg/UefiCpuPkg.dsc|   3 +
 UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf   |  51 
 UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h   | 177 
 UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.c   | 294 
 UefiCpuPkg/CpuTimerDxe/CpuTimer.uni  |  14 +
 UefiCpuPkg/CpuTimerDxe/CpuTimerExtra.uni |  12 +
 6 files changed, 551 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index f9a46089d2c7..96f6770281fe 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -195,5 +195,8 @@ [Components.IA32, Components.X64]
 [Components.X64]
   
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
 
+[Components.RISCV64]
+  UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
+
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf 
b/UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
new file mode 100644
index ..d7706328b591
--- /dev/null
+++ b/UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
@@ -0,0 +1,51 @@
+## @file
+# Timer Arch protocol module
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001b
+  BASE_NAME  = CpuTimerDxe
+  MODULE_UNI_FILE= CpuTimer.uni
+  FILE_GUID  = 055DDAC6-9142-4013-BF20-FC2E5BC325C9
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= TimerDriverInitialize
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = RISCV64
+#
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  IoLib
+  CpuLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+
+[LibraryClasses.RISCV64]
+  RiscVSbiLib
+
+[Sources.RISCV64]
+  RiscV64/Timer.h
+  RiscV64/Timer.c
+
+[Protocols]
+  gEfiCpuArchProtocolGuid   ## CONSUMES
+  gEfiTimerArchProtocolGuid ## PRODUCES
+
+[Depex]
+  gEfiCpuArchProtocolGuid
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  CpuTimerExtra.uni
diff --git a/UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h 
b/UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h
new file mode 100644
index ..586eb0cfadb4
--- /dev/null
+++ b/UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h
@@ -0,0 +1,177 @@
+/** @file
+  RISC-V Timer Architectural Protocol definitions
+
+  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef TIMER_H_
+#define TIMER_H_
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+//
+// RISC-V use 100us timer.
+// The default timer tick duration is set to 10 ms = 10 * 1000 * 10 100 ns 
units
+//
+#define DEFAULT_TIMER_TICK_DURATION  10
+
+extern VOID
+RiscvSetTimerPeriod (
+  UINT32  TimerPeriod
+  );
+
+//
+// Function Prototypes
+//
+
+/**
+  Initialize the Timer Architectural Protocol driver
+
+  @param ImageHandle ImageHandle of the loaded driver
+  @param SystemTable Pointer to the System Table
+
+  @retval EFI_SUCCESSTimer Architectural Protocol created
+  @retval EFI_OUT_OF_RESOURCES   Not enough resources available to initialize 
driver.
+  @retval EFI_DEVICE_ERROR   A device error occured attempting to 
initialize the driver.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverInitialize (
+  IN EFI_HANDLEImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
+  )
+;
+
+/**
+
+  This function adjusts the period of timer interrupts to the value specified
+  by TimerPeriod.  If the timer period is updated, then the selected timer
+  period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned.  If
+  the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+  If an error occurs while attempting to update the timer period, then the
+  timer hardware will be put back in its state prior to this call, and
+  EFI_DEVICE_ERROR is returned.  If TimerPeriod is 0, then the timer interrupt
+  is disabled.  This is not the same as disabling the CPU's interrupts.
+  Instead, it must either turn off the timer hardware, or it must adjust the
+  interrupt controller so that a CPU interrupt is not generated when the timer
+  interrupt fires.
+
+
+  @param ThisThe EFI_TIMER_ARCH_PROTOCOL instance.
+  @param NotifyFunction  The rate to program the timer interrupt in 100 nS 
units.  If
+ the timer hardware is not programmable, then 
EFI_UNSUPPORTED is
+ retu

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 04/23] MdePkg: Add BaseRiscVSbiLib Library for RISC-V

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

This library is required to make SBI ecalls from the S-mode EDK2.
This is mostly copied from
edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 MdePkg/MdePkg.dec  |   4 +
 MdePkg/MdePkg.dsc  |   3 +
 MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf |  25 +++
 MdePkg/Include/Library/BaseRiscVSbiLib.h   | 127 +++
 MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c   | 227 
 5 files changed, 386 insertions(+)

diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index 4f30de588a46..69c1dfa4bf89 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -316,6 +316,10 @@ [LibraryClasses.IA32, LibraryClasses.X64]
   ##  @libraryclass  Provides function to support TDX processing.
   TdxLib|Include/Library/TdxLib.h
 
+[LibraryClasses.RISCV64]
+  ##  @libraryclass  Provides function to make ecalls to SBI
+  BaseRiscVSbiLib|Include/Library/BaseRiscVSbiLib.h
+
 [Guids]
   #
   # GUID defined in UEFI2.1/UEFI2.0/EFI1.1
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index 32a852dc466e..0ac7618b4623 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -190,4 +190,7 @@ [Components.ARM, Components.AARCH64]
   MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicArmVirt.inf
   MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
 
+[Components.RISCV64]
+  MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
+
 [BuildOptions]
diff --git a/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf 
b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
new file mode 100644
index ..d03132bf01c1
--- /dev/null
+++ b/MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
@@ -0,0 +1,25 @@
+## @file
+# RISC-V Library to call SBI ecalls
+#
+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION = 0x0001001b
+  BASE_NAME   = BaseRiscVSbiLib
+  FILE_GUID   = D742CF3D-E600-4009-8FB5-318073008508
+  MODULE_TYPE = BASE
+  VERSION_STRING  = 1.0
+  LIBRARY_CLASS   = RiscVSbiLib
+
+[Sources]
+  BaseRiscVSbiLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  BaseLib
diff --git a/MdePkg/Include/Library/BaseRiscVSbiLib.h 
b/MdePkg/Include/Library/BaseRiscVSbiLib.h
new file mode 100644
index ..3a3cbfb879f1
--- /dev/null
+++ b/MdePkg/Include/Library/BaseRiscVSbiLib.h
@@ -0,0 +1,127 @@
+/** @file
+  Library to call the RISC-V SBI ecalls
+
+  Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Hart - Hardware Thread, similar to a CPU core
+
+  Currently, EDK2 needs to call SBI only to set the time and to do system 
reset.
+
+**/
+
+#ifndef RISCV_SBI_LIB_H_
+#define RISCV_SBI_LIB_H_
+
+#include 
+
+/* SBI Extension IDs */
+#define SBI_EXT_TIME  0x54494D45
+#define SBI_EXT_SRST  0x53525354
+
+/* SBI function IDs for TIME extension*/
+#define SBI_EXT_TIME_SET_TIMER  0x0
+
+/* SBI function IDs for SRST extension */
+#define SBI_EXT_SRST_RESET  0x0
+
+#define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
+#define SBI_SRST_RESET_TYPE_COLD_REBOOT  0x1
+#define SBI_SRST_RESET_TYPE_WARM_REBOOT  0x2
+
+#define SBI_SRST_RESET_REASON_NONE 0x0
+#define SBI_SRST_RESET_REASON_SYSFAIL  0x1
+
+/* SBI return error codes */
+#define SBI_SUCCESS0
+#define SBI_ERR_FAILED -1
+#define SBI_ERR_NOT_SUPPORTED  -2
+#define SBI_ERR_INVALID_PARAM  -3
+#define SBI_ERR_DENIED -4
+#define SBI_ERR_INVALID_ADDRESS-5
+#define SBI_ERR_ALREADY_AVAILABLE  -6
+#define SBI_ERR_ALREADY_STARTED-7
+#define SBI_ERR_ALREADY_STOPPED-8
+
+#define SBI_LAST_ERR  SBI_ERR_ALREADY_STOPPED
+
+typedef struct {
+  UINT64BootHartId;
+  VOID  *PeiServiceTable;// PEI Service table
+  VOID  *PrePiHobList;   // Pre PI Hob List
+  UINT64FlattenedDeviceTree; // Pointer to Flattened Device tree
+} EFI_RISCV_FIRMWARE_CONTEXT;
+
+//
+// EDK2 OpenSBI firmware extension return status.
+//
+typedef struct {
+  UINTNError; ///< SBI status code
+  UINTNValue; ///< Value returned
+} SBI_RET;
+
+VOID
+EFIAPI
+SbiSetTimer (
+  IN  UINT64  Time
+  );
+
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+  IN  UINTN  ResetType,
+  IN  UINTN  ResetReason
+  );
+
+/**
+  Get firmware context of the calling hart.
+
+  @param[out] FirmwareContext  The firmware context pointer.
+**/
+VOID
+EFIAPI
+GetFirmwareContext (
+  OUT EFI_RISCV_FIRMWARE_CONTEXT  **FirmwareContext
+  );
+
+/**
+  Set firmware context of the calling hart.
+
+  @param[in] FirmwareContext   The firmware context pointer.
+**/
+VOID
+EFIAPI
+SetFirmwareContext (
+  IN EFI_RISCV_FIRMWARE_CONTEXT  *FirmwareContext

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 03/23] MdePkg/BaseLib: RISC-V: Add few more helper functions

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Few of the basic helper functions required for any
RISC-V CPU were added in edk2-platforms. To support
qemu virt, they need to be added in BaseLib.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Daniel Schaefer 
Signed-off-by: Sunil V L 
---
 MdePkg/Library/BaseLib/BaseLib.inf  |  3 ++
 MdePkg/Include/Library/BaseLib.h| 50 ++
 MdePkg/Library/BaseLib/RiscV64/CpuScratch.S | 31 
 MdePkg/Library/BaseLib/RiscV64/ReadTimer.S  | 23 +
 MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S | 53 ++--
 MdePkg/Library/BaseLib/RiscV64/RiscVMmu.S   | 23 +
 6 files changed, 179 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 9ed46a584a14..3a48492b1a01 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -401,6 +401,9 @@ [Sources.RISCV64]
   RiscV64/RiscVCpuPause.S   | GCC
   RiscV64/RiscVInterrupt.S  | GCC
   RiscV64/FlushCache.S  | GCC
+  RiscV64/CpuScratch.S  | GCC
+  RiscV64/ReadTimer.S   | GCC
+  RiscV64/RiscVMmu.S| GCC
 
 [Sources.LOONGARCH64]
   Math64.c
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index f3f59f21c2ea..b4f4e45a1486 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -151,6 +151,56 @@ typedef struct {
 
 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT  8
 
+VOID
+  RiscVSetSupervisorScratch (
+ UINT64
+ );
+
+UINT64
+RiscVGetSupervisorScratch (
+  VOID
+  );
+
+VOID
+  RiscVSetSupervisorStvec (
+   UINT64
+   );
+
+UINT64
+RiscVGetSupervisorStvec (
+  VOID
+  );
+
+UINT64
+RiscVGetSupervisorTrapCause (
+  VOID
+  );
+
+VOID
+  RiscVSetSupervisorAddressTranslationRegister (
+UINT64
+);
+
+UINT64
+RiscVReadTimer (
+  VOID
+  );
+
+VOID
+RiscVEnableTimerInterrupt (
+  VOID
+  );
+
+VOID
+RiscVDisableTimerInterrupt (
+  VOID
+  );
+
+VOID
+RiscVClearPendingTimerInterrupt (
+  VOID
+  );
+
 #endif // defined (MDE_CPU_RISCV64)
 
 #if defined (MDE_CPU_LOONGARCH64)
diff --git a/MdePkg/Library/BaseLib/RiscV64/CpuScratch.S 
b/MdePkg/Library/BaseLib/RiscV64/CpuScratch.S
new file mode 100644
index ..5492a500eb5e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RiscV64/CpuScratch.S
@@ -0,0 +1,31 @@
+//--
+//
+// CPU scratch register related functions for RISC-V
+//
+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//--
+
+#include 
+
+.data
+.align 3
+.section .text
+
+//
+// Set Supervisor mode scratch.
+// @param a0 : Value set to Supervisor mode scratch
+//
+ASM_FUNC (RiscVSetSupervisorScratch)
+csrw CSR_SSCRATCH, a0
+ret
+
+//
+// Get Supervisor mode scratch.
+// @retval a0 : Value in Supervisor mode scratch
+//
+ASM_FUNC (RiscVGetSupervisorScratch)
+csrr a0, CSR_SSCRATCH
+ret
diff --git a/MdePkg/Library/BaseLib/RiscV64/ReadTimer.S 
b/MdePkg/Library/BaseLib/RiscV64/ReadTimer.S
new file mode 100644
index ..39a06efa51ef
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RiscV64/ReadTimer.S
@@ -0,0 +1,23 @@
+//--
+//
+// Read CPU timer
+//
+// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//--
+
+#include 
+
+.data
+.align 3
+.section .text
+
+//
+// Read TIME CSR.
+// @retval a0 : 64-bit timer.
+//
+ASM_FUNC (RiscVReadTimer)
+csrr a0, CSR_TIME
+ret
diff --git a/MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S 
b/MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S
index 87b3468fc7fd..6a1b90a7e45c 100644
--- a/MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S
+++ b/MdePkg/Library/BaseLib/RiscV64/RiscVInterrupt.S
@@ -8,13 +8,13 @@
 //
 
//--
 
+#include 
+
 ASM_GLOBAL ASM_PFX(RiscVDisableSupervisorModeInterrupts)
 ASM_GLOBAL ASM_PFX(RiscVEnableSupervisorModeInterrupt)
 ASM_GLOBAL ASM_PFX(RiscVGetSupervisorModeInterrupts)
 
-#define  SSTATUS_SIE 0x0002
-#define  CSR_SSTATUS 0x100
-  #define  SSTATUS_SPP_BIT_POSITION  8
+#define  SSTATUS_SPP_BIT_POSITION  8
 
 //
 // This routine disables supervisor mode interrupt
@@ -53,11 +53,56 @@ InTrap:
   ret
 
 //
+// Set Supervisor mode trap vecto

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 02/23] MdePkg: Add RISCV_EFI_BOOT_PROTOCOL related definitions

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

RISC-V UEFI based platforms need to support RISCV_EFI_BOOT_PROTOCOL.
Add this protocol GUID definition and the header file required.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Abner Chang 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
Reviewed-by: Heinrich Schuchardt 
---
 MdePkg/MdePkg.dec   |  5 +++
 MdePkg/Include/Protocol/RiscVBootProtocol.h | 34 
 2 files changed, 39 insertions(+)

diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index e49b2d5b5f28..4f30de588a46 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -1926,6 +1926,11 @@ [Protocols]
   #
   ## Include/Protocol/ShellDynamicCommand.h
   gEfiShellDynamicCommandProtocolGuid  = { 0x3c7200e9, 0x005f, 0x4ea4, {0x87, 
0xde, 0xa3, 0xdf, 0xac, 0x8a, 0x27, 0xc3 }}
+  #
+  # Protocols defined for RISC-V systems
+  #
+  ## Include/Protocol/RiscVBootProtocol.h
+  gRiscVEfiBootProtocolGuid  = { 0xccd15fec, 0x6f73, 0x4eec, { 0x83, 0x95, 
0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf }}
 
 #
 # [Error.gEfiMdePkgTokenSpaceGuid]
diff --git a/MdePkg/Include/Protocol/RiscVBootProtocol.h 
b/MdePkg/Include/Protocol/RiscVBootProtocol.h
new file mode 100644
index ..ed223b852d34
--- /dev/null
+++ b/MdePkg/Include/Protocol/RiscVBootProtocol.h
@@ -0,0 +1,34 @@
+/** @file
+  RISC-V Boot Protocol mandatory for RISC-V UEFI platforms.
+
+  @par Revision Reference:
+  The protocol specification can be found at
+  https://github.com/riscv-non-isa/riscv-uefi
+
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef RISCV_BOOT_PROTOCOL_H_
+#define RISCV_BOOT_PROTOCOL_H_
+
+typedef struct _RISCV_EFI_BOOT_PROTOCOL RISCV_EFI_BOOT_PROTOCOL;
+
+#define RISCV_EFI_BOOT_PROTOCOL_REVISION  0x0001
+#define RISCV_EFI_BOOT_PROTOCOL_LATEST_VERSION \
+RISCV_EFI_BOOT_PROTOCOL_REVISION
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_BOOT_HARTID)(
+  IN RISCV_EFI_BOOT_PROTOCOL   *This,
+  OUT UINTN*BootHartId
+  );
+
+typedef struct _RISCV_EFI_BOOT_PROTOCOL {
+  UINT64 Revision;
+  EFI_GET_BOOT_HARTIDGetBootHartId;
+} RISCV_EFI_BOOT_PROTOCOL;
+
+#endif
-- 
2.38.0



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[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 01/23] MdePkg/Register: Add register definition header files for RISC-V

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Add register definitions and access routines for RISC-V. These
headers are leveraged from opensbi repo.

Cc: Daniel Schaefer 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Sunil V L 
Acked-by: Abner Chang 
---
 MdePkg/Include/Register/RiscV64/RiscVEncoding.h | 119 
 MdePkg/Include/Register/RiscV64/RiscVImpl.h |  25 
 2 files changed, 144 insertions(+)

diff --git a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h 
b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
new file mode 100644
index ..5c2989b797bf
--- /dev/null
+++ b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
@@ -0,0 +1,119 @@
+/** @file
+  RISC-V CSR encodings
+
+  Copyright (c) 2019, Western Digital Corporation or its affiliates. All 
rights reserved.
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef RISCV_ENCODING_H_
+#define RISCV_ENCODING_H_
+
+#define MSTATUS_SIE 0x0002UL
+#define MSTATUS_MIE 0x0008UL
+#define MSTATUS_SPIE_SHIFT  5
+#define MSTATUS_SPIE(1UL << MSTATUS_SPIE_SHIFT)
+#define MSTATUS_UBE 0x0040UL
+#define MSTATUS_MPIE0x0080UL
+#define MSTATUS_SPP_SHIFT   8
+#define MSTATUS_SPP (1UL << MSTATUS_SPP_SHIFT)
+#define MSTATUS_MPP_SHIFT   11
+#define MSTATUS_MPP (3UL << MSTATUS_MPP_SHIFT)
+
+#define SSTATUS_SIE MSTATUS_SIE
+#define SSTATUS_SPIE_SHIFT  MSTATUS_SPIE_SHIFT
+#define SSTATUS_SPIEMSTATUS_SPIE
+#define SSTATUS_SPP_SHIFT   MSTATUS_SPP_SHIFT
+#define SSTATUS_SPP MSTATUS_SPP
+
+#define IRQ_S_SOFT1
+#define IRQ_VS_SOFT   2
+#define IRQ_M_SOFT3
+#define IRQ_S_TIMER   5
+#define IRQ_VS_TIMER  6
+#define IRQ_M_TIMER   7
+#define IRQ_S_EXT 9
+#define IRQ_VS_EXT10
+#define IRQ_M_EXT 11
+#define IRQ_S_GEXT12
+#define IRQ_PMU_OVF   13
+
+#define MIP_SSIP(1UL << IRQ_S_SOFT)
+#define MIP_VSSIP   (1UL << IRQ_VS_SOFT)
+#define MIP_MSIP(1UL << IRQ_M_SOFT)
+#define MIP_STIP(1UL << IRQ_S_TIMER)
+#define MIP_VSTIP   (1UL << IRQ_VS_TIMER)
+#define MIP_MTIP(1UL << IRQ_M_TIMER)
+#define MIP_SEIP(1UL << IRQ_S_EXT)
+#define MIP_VSEIP   (1UL << IRQ_VS_EXT)
+#define MIP_MEIP(1UL << IRQ_M_EXT)
+#define MIP_SGEIP   (1UL << IRQ_S_GEXT)
+#define MIP_LCOFIP  (1UL << IRQ_PMU_OVF)
+
+#define SIP_SSIP  MIP_SSIP
+#define SIP_STIP  MIP_STIP
+
+#define PRV_U  0UL
+#define PRV_S  1UL
+#define PRV_M  3UL
+
+#define SATP64_MODE  0xF000ULL
+#define SATP64_ASID  0x0000ULL
+#define SATP64_PPN   0x0FFFULL
+
+#define SATP_MODE_OFF   0UL
+#define SATP_MODE_SV32  1UL
+#define SATP_MODE_SV39  8UL
+#define SATP_MODE_SV48  9UL
+#define SATP_MODE_SV57  10UL
+#define SATP_MODE_SV64  11UL
+
+#define SATP_MODE  SATP64_MODE
+
+/* User Counters/Timers */
+#define CSR_CYCLE  0xc00
+#define CSR_TIME   0xc01
+
+/* Supervisor Trap Setup */
+#define CSR_SSTATUS  0x100
+#define CSR_SEDELEG  0x102
+#define CSR_SIDELEG  0x103
+#define CSR_SIE  0x104
+#define CSR_STVEC0x105
+
+/* Supervisor Configuration */
+#define CSR_SENVCFG  0x10a
+
+/* Supervisor Trap Handling */
+#define CSR_SSCRATCH  0x140
+#define CSR_SEPC  0x141
+#define CSR_SCAUSE0x142
+#define CSR_STVAL 0x143
+#define CSR_SIP   0x144
+
+/* Supervisor Protection and Translation */
+#define CSR_SATP  0x180
+
+/* Trap/Exception Causes */
+#define CAUSE_MISALIGNED_FETCH  0x0
+#define CAUSE_FETCH_ACCESS  0x1
+#define CAUSE_ILLEGAL_INSTRUCTION   0x2
+#define CAUSE_BREAKPOINT0x3
+#define CAUSE_MISALIGNED_LOAD   0x4
+#define CAUSE_LOAD_ACCESS   0x5
+#define CAUSE_MISALIGNED_STORE  0x6
+#define CAUSE_STORE_ACCESS  0x7
+#define CAUSE_USER_ECALL0x8
+#define CAUSE_SUPERVISOR_ECALL  0x9
+#define CAUSE_VIRTUAL_SUPERVISOR_ECALL  0xa
+#define CAUSE_MACHINE_ECALL 0xb
+#define CAUSE_FETCH_PAGE_FAULT  0xc
+#define CAUSE_LOAD_PAGE_FAULT   0xd
+#define CAUSE_STORE_PAGE_FAULT  0xf
+#define CAUSE_FETCH_GUEST_PAGE_FAULT0x14
+#define CAUSE_LOAD_GUEST_PAGE_FAULT 0x15
+#define CAUSE_VIRTUAL_INST_FAULT0x16
+#define CAUSE_STORE_GUEST_PAGE_FAULT0x17
+
+#endif
diff --git a/MdePkg/Include/Register/RiscV64/RiscVImpl.h 
b/MdePkg/Include/Register/RiscV64/RiscVImpl.h
new file mode 100644
index ..ee5c2ba60377
--- /dev/null
+++ b/MdePkg/Include/Register/RiscV64/RiscVImpl.h
@@ -0,0 +1,25 @@
+/** @file
+  RISC-V package definitions.
+
+  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef RISCV_IMPL_H_
+#define RISCV_IMPL_H_
+
+#include 
+
+#define _ASM_FUNC(Name, Section)\
+  .global   Name  ; \
+  .section  #Section, "ax"; \
+  .type Name, %function   

[edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V6 00/23] Add support for RISC-V virt machine

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

Add support for RISC-V qemu virt machine. Most of the changes are migrated from
edk2-platforms repo and followed the latest guidelines for EDK2 code 
structuring.

The series has passed all CI tests (https://github.com/tianocore/edk2/pull/3471)

These changes are available at: 
https://github.com/vlsunil/edk2/tree/RiscV64QemuVirt

Changes since V5:
1) Avoided editing the existing INF files (as per feedback from Ray 
Ni). This reduced
   several refactor patches.
2) Moved to PEI less design (as per suggestion from Andrei Warkentin).
3) Added PciCpuIo2Dxe driver in OvmfPkg.
4) Removed APRIORI requirement in DSC/FDF infrastructure files. Now 
they 
   are very similar to ArmVirtQemu.
5) Addressed Heinrich's feedback.
6) Rebased and added the tags

Changes since V4:
1) Rebased and added ACKs
2) Dropped few patches related to VirtNorFlashDxe since they are 
already taken care by Ard.

Changes since V3:
1) Addressed Abner's comments
2) Changed folder name from Ia32_X64 to Ia32X64 as per latest 
guidelines.
2) Rebased

Changes since V2:
1) Fixed issues detected by CI 
(https://github.com/tianocore/edk2/pull/3471)
2) Added an extra patch to fix up the consumers of 
NvVarStoreFormattedLib

Changes since V1:
1) Added couple of patches from Ard to optimize the NorFlashDxe in Ovmf.
   Note: There will be a separate patch series in future to update 
existing
   consumers of NorFlashDxe driver.
2) Migrated NvVarStoreFormattedLib from EmbeddedPkg to MdeModulePkg
3) Created Null instance of the NorFlashPlatformLib library class
4) Moved NorFlashPlatformLib.h from ArmPlatformPkg

Cc: Abner Chang 
Cc: Daniel Schaefer 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Cc: Gerd Hoffmann 
Cc: Rebecca Cran 
Cc: Peter Grehan 
Cc: Brijesh Singh 
Cc: Erdem Aktas 
Cc: James Bottomley 
Cc: Min Xu 
Cc: Tom Lendacky 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Andrew Fish 
Cc: Jian J Wang 
Cc: Anup Patel 
Cc: Heinrich Schuchardt 
Cc: Andrei Warkentin 

Sunil V L (23):
  MdePkg/Register: Add register definition header files for RISC-V
  MdePkg: Add RISCV_EFI_BOOT_PROTOCOL related definitions
  MdePkg/BaseLib: RISC-V: Add few more helper functions
  MdePkg: Add BaseRiscVSbiLib Library for RISC-V
  UefiCpuPkg: Add CpuTimerDxe module
  UefiCpuPkg/CpuExceptionHandlerLib: Add RISC-V instance
  UefiCpuPkg/CpuDxe: Add RISC-V instance
  UefiCpuPkg/CpuTimerLib: Add RISC-V instance
  UefiCpuPkg/UefiCpuPkg.ci.yaml: Ignore RISC-V file
  EmbeddedPkg: Enable PcdPrePiCpuIoSize for RISC-V
  EmbeddedPkg/NvVarStoreFormattedLib: Migrate to MdeModulePkg
  ArmVirtPkg: Update the references to NvVarStoreFormattedLib
  ArmVirtPkg/PlatformHasAcpiDtDxe: Move to OvmfPkg
  ArmVirtPkg: Fix up the location of PlatformHasAcpiDtDxe
  OvmfPkg: Add VirtNorFlashPlatformLib library
  OvmfPkg/PlatformInitLib: Add RISC-V instance
  OvmfPkg: Add PrePiHobListPointerLib library
  OvmfPkg: Add PciCpuIo2Dxe driver
  OvmfPkg/ResetSystemLib: Add RISC-V instance
  OvmfPkg/Sec: Add RISC-V SEC module
  OvmfPkg/PlatformBootManagerLib: Add RISC-V instance
  OvmfPkg: RiscVVirt: Add Qemu Virt platform support
  Maintainers.txt: Add entry for OvmfPkg/RiscVVirt

 ArmVirtPkg/ArmVirtPkg.dec  
 |9 -
 EmbeddedPkg/EmbeddedPkg.dec
 |6 +-
 MdeModulePkg/MdeModulePkg.dec  
 |3 +
 MdePkg/MdePkg.dec  
 |9 +
 OvmfPkg/OvmfPkg.dec
 |   11 +
 OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
 |  338 ++
 ArmVirtPkg/ArmVirtCloudHv.dsc  
 |2 +-
 ArmVirtPkg/ArmVirtKvmTool.dsc  
 |2 +-
 ArmVirtPkg/ArmVirtQemu.dsc 
 |6 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc   
 |4 +-
 MdeModulePkg/MdeModulePkg.dsc  
 |2 +
 MdePkg/MdePkg.dsc  
 |3 +
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
 |  510 +
 UefiCpuPkg/UefiCpuPkg.dsc  
 |6 +
 OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf
 |  306 ++
 ArmVirtPkg/CloudHvPlatfo

Re: [edk2-devel] [PATCH V2 1/4] EmbeddedPkg/PrePiLib: Add FFS_CHECK_SECTION_HOOK when finding section

[Ard Biesheuvel]

On Thu, 15 Dec 2022 at 04:26, Xu, Min M  wrote:
>
> Hi, Leif/Ard/Abner/Daniel
> Since you're the maintainer/reviewer of EmbeddedPkg, would you please help to 
> review this patch? Any comments is welcome.
>

I have no objections to this

Acked-by: Ard Biesheuvel 

>
> > -Original Message-
> > From: Xu, Min M 
> > Sent: Tuesday, December 13, 2022 2:24 PM
> > To: devel@edk2.groups.io
> > Cc: Xu, Min M ; Leif Lindholm
> > ; Ard Biesheuvel ;
> > Abner Chang ; Daniel Schaefer
> > ; Gerd Hoffmann ; Aktas,
> > Erdem ; James Bottomley ;
> > Yao, Jiewen ; Tom Lendacky
> > 
> > Subject: [PATCH V2 1/4] EmbeddedPkg/PrePiLib: Add
> > FFS_CHECK_SECTION_HOOK when finding section
> >
> > From: Min M Xu 
> >
> > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4152
> >
> > EmbeddedPkg/PrePiLib provides the service of finding sections based on the
> > input SectionType. But sometimes there maybe multiple sections with the
> > same SectionType. FFS_CHECK_SECTION_HOOK is a hook which can be called
> > to do additional check.
> >
> > Cc: Leif Lindholm 
> > Cc: Ard Biesheuvel 
> > Cc: Abner Chang 
> > Cc: Daniel Schaefer 
> > Cc: Gerd Hoffmann 
> > Cc: Erdem Aktas 
> > Cc: James Bottomley 
> > Cc: Jiewen Yao 
> > Cc: Tom Lendacky 
> > Signed-off-by: Min Xu 
> >
> > EmbeddedPkg
> > ---
> >  EmbeddedPkg/Include/Library/PrePiLib.h  | 23 +++---
> >  EmbeddedPkg/Library/PrePiLib/FwVol.c| 42 ++---
> >  EmbeddedPkg/Library/PrePiLib/PrePiLib.c |  2 +-
> >  3 files changed, 49 insertions(+), 18 deletions(-)
> >
> > diff --git a/EmbeddedPkg/Include/Library/PrePiLib.h
> > b/EmbeddedPkg/Include/Library/PrePiLib.h
> > index 3741b08c4478..f60b6678185a 100644
> > --- a/EmbeddedPkg/Include/Library/PrePiLib.h
> > +++ b/EmbeddedPkg/Include/Library/PrePiLib.h
> > @@ -52,11 +52,23 @@ FfsFindNextFile (
> >IN OUT EFI_PEI_FILE_HANDLE  *FileHandle
> >);
> >
> > +/**
> > + * This is a hook which is used to check if the section is the target one.
> > + *
> > + */
> > +typedef
> > +EFI_STATUS
> > +(EFIAPI *FFS_CHECK_SECTION_HOOK)(
> > +  IN EFI_COMMON_SECTION_HEADER *Section
> > +  );
> > +
> >  /**
> >This service enables discovery sections of a given type within a valid 
> > FFS file.
> > +  Caller also can provide a SectionCheckHook to do additional checking.
> >
> > -  @param  SearchTypeThe value of the section type to find.
> > -  @param  FfsFileHeader A pointer to the file header that contains 
> > the
> > set of sections to
> > +  @param  SectionType   The value of the section type to find.
> > +  @param  SectionCheckHook  A hook which can check if the section is 
> > the
> > target one.
> > +  @param  FileHeaderA pointer to the file header that contains 
> > the set
> > of sections to
> >  be searched.
> >@param  SectionData   A pointer to the discovered section, if 
> > successful.
> >
> > @@ -67,9 +79,10 @@ FfsFindNextFile (
> >  EFI_STATUS
> >  EFIAPI
> >  FfsFindSectionData (
> > -  IN EFI_SECTION_TYPE SectionType,
> > -  IN EFI_PEI_FILE_HANDLE  FileHandle,
> > -  OUT VOID**SectionData
> > +  IN EFI_SECTION_TYPESectionType,
> > +  IN FFS_CHECK_SECTION_HOOK  SectionCheckHook,
> > +  IN EFI_PEI_FILE_HANDLE FileHandle,
> > +  OUT VOID   **SectionData
> >);
> >
> >  /**
> > diff --git a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> > b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> > index 0a6d6925b7ea..778d8b13c33b 100644
> > --- a/EmbeddedPkg/Library/PrePiLib/FwVol.c
> > +++ b/EmbeddedPkg/Library/PrePiLib/FwVol.c
> > @@ -264,16 +264,18 @@ FindFileEx (
> >Go through the file to search SectionType section,
> >when meeting an encapsuled section.
> >
> > -  @param  SectionType  - Filter to find only section of this type.
> > -  @param  Section  - From where to search.
> > -  @param  SectionSize  - The file size to search.
> > -  @param  OutputBuffer - Pointer to the section to search.
> > +  @param  SectionType   - Filter to find only section of this type.
> > +  @param  SectionCheckHook  - A hook which can check if the section is the
> > target one.
> > +  @param  Section   - From where to search.
> > +  @param  SectionSize   - The file size to search.
> > +  @param  OutputBuffer  - Pointer to the section to search.
> >
> >@retval EFI_SUCCESS
> >  **/
> >  EFI_STATUS
> >  FfsProcessSection (
> >IN EFI_SECTION_TYPE   SectionType,
> > +  IN FFS_CHECK_SECTION_HOOK SectionCheckHook,
> >IN EFI_COMMON_SECTION_HEADER  *Section,
> >IN UINTN  SectionSize,
> >OUT VOID  **OutputBuffer
> > @@ -292,7 +294,9 @@ FfsProcessSection (
> >UINT32AuthenticationStatus;
> >CHAR8 *CompressedData;
> >UINT32CompressedDataLength;
> > +  BOOLEAN   Found;
> >
> > +  Found = FALSE;
> >*OutputBuffer = 

Re: [edk2-devel] [PATCH v1] Maintainers.txt: Update NetworkPkg & MM modules Reviewer

[Dong, Eric]

Thanks Jiaxin.

Reviewed-by: Eric Dong 

-Original Message-
From: Wu, Jiaxin  
Sent: Thursday, December 15, 2022 5:41 PM
To: devel@edk2.groups.io
Cc: Dong, Eric ; Ni, Ray ; Maciej Rabeda 

Subject: [PATCH v1] Maintainers.txt: Update NetworkPkg & MM modules Reviewer

This is to change NetworkPkg & MM modules Reviewer.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Maciej Rabeda 
Signed-off-by: Jiaxin Wu 
---
 Maintainers.txt | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt index 6a92922258..e2beafbaa6 
100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -374,11 +374,11 @@ R: Eric Dong  [ydong10]
 MdeModulePkg: Management Mode (MM, SMM) modules
 F: MdeModulePkg/*Smi*/
 F: MdeModulePkg/*Smm*/
 F: MdeModulePkg/Include/*Smi*.h
 F: MdeModulePkg/Include/*Smm*.h
-R: Eric Dong  [ydong10]
+R: Jiaxin Wu  [jiaxinwu]
 R: Ray Ni  [niruiyu]
 
 MdeModulePkg: Pei Core
 F: MdeModulePkg/Core/Pei/
 R: Dandan Bi  [dandanbi] @@ -430,11 +430,10 @@ R: 
Zhiguang Liu  [LiuZhiguang001]
 
 NetworkPkg
 F: NetworkPkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
 M: Maciej Rabeda  [mrabeda]
-R: Jiaxin Wu  [jiaxinwu]
 R: Siyuan Fu  [sfu5]
 
 OvmfPkg
 F: OvmfPkg/
 W: http://www.tianocore.org/ovmf/
--
2.16.2.windows.1



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Re: [edk2-devel] [PATCH v1] Maintainers.txt: Update NetworkPkg & MM modules Reviewer

[Ni, Ray]

Reviewed-by: Ray Ni 

> -Original Message-
> From: Wu, Jiaxin 
> Sent: Thursday, December 15, 2022 5:41 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Maciej 
> Rabeda 
> Subject: [PATCH v1] Maintainers.txt: Update NetworkPkg & MM modules Reviewer
> 
> This is to change NetworkPkg & MM modules Reviewer.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Maciej Rabeda 
> Signed-off-by: Jiaxin Wu 
> ---
>  Maintainers.txt | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index 6a92922258..e2beafbaa6 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -374,11 +374,11 @@ R: Eric Dong  [ydong10]
>  MdeModulePkg: Management Mode (MM, SMM) modules
>  F: MdeModulePkg/*Smi*/
>  F: MdeModulePkg/*Smm*/
>  F: MdeModulePkg/Include/*Smi*.h
>  F: MdeModulePkg/Include/*Smm*.h
> -R: Eric Dong  [ydong10]
> +R: Jiaxin Wu  [jiaxinwu]
>  R: Ray Ni  [niruiyu]
> 
>  MdeModulePkg: Pei Core
>  F: MdeModulePkg/Core/Pei/
>  R: Dandan Bi  [dandanbi]
> @@ -430,11 +430,10 @@ R: Zhiguang Liu  
> [LiuZhiguang001]
> 
>  NetworkPkg
>  F: NetworkPkg/
>  W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
>  M: Maciej Rabeda  [mrabeda]
> -R: Jiaxin Wu  [jiaxinwu]
>  R: Siyuan Fu  [sfu5]
> 
>  OvmfPkg
>  F: OvmfPkg/
>  W: http://www.tianocore.org/ovmf/
> --
> 2.16.2.windows.1



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Re: [edk2-devel] [PATCH v3 13/14] ArmPkg: Turn off spellcheck audit mode

[Leif Lindholm]

On Wed, Dec 14, 2022 at 19:04:06 -0500, Michael Kubacki wrote:
> I'm just trying to understand your position.
> 
> Are you saying you would rather people check in typos and then later have
> patches come into the package to fix them?
> 
> For example, like these:
> 
> - ArmVirtPkg: https://edk2.groups.io/g/devel/message/97021
> - ArmPkg: https://edk2.groups.io/g/devel/message/97022
> 
> Why not just have the code checked in without typos in the first place?

A little fairy once whispered in my ear that if I stopped myself and
tried to rephrase whenever I found myself using the work "just", I
would meet less friction in context-stripping communication mediums
such as email. They weren't wrong.

> Checking in typos creates more review work, makes the code history have typo
> fix patches that could be avoided, and impacts accessibility.
> 
> I spend far more time with edk2 overhead such as email formatting problems,
> keeping track of maintainer email address changes when updating patches,
> mapping email replies back to code, and so on that does not improve the
> code. A spell checker only takes seconds and is built into edk2 CI.

We didn't disable the spellchecker for the ARM* packages (only)
because we hate correct spelling. We disabled it because it throws
false positives left right and centre. So we end up needing to update
the .ci.yaml every time we mention an architectural concept we haven't
mentioned before. Or add a copyright line mentioning a new
organisation. Or correctly use apostrophes in ways the spellchecker
doesn't expect.

Here is the current (and very incomplete, oh - and package specific)
exception list for ArmPkg:

https://github.com/tianocore/edk2/blob/master/ArmPkg/ArmPkg.ci.yaml#L95

If it had a aggressiveness knob and we could turn it down from 11 to
3 and work our way up from there, that would be another story.

Failing that, a push-through-anyway-this-isn't-a-typo label would be a
reasonable compromise.

But for now, I agree with Ard.

/
Leif

> On 12/14/2022 6:24 PM, Ard Biesheuvel wrote:
> > On Thu, 15 Dec 2022 at 00:21, Michael Kubacki
> >  wrote:
> > > 
> > > Yes. It will also reduce frequency of incoming patches that must be
> > > reviewed and merged due to people continuously fixing trivial spelling
> > > errors.
> > > 
> > 
> > In that case, NAK to this patch (and the ArmVirtPkg one). Unless we
> > add a button to the GitHub UI that permits me to override a negative
> > CI result on a PR.
> > 
> > > On 12/14/2022 6:07 PM, Ard Biesheuvel wrote:
> > > > On Wed, 14 Dec 2022 at 23:53,  wrote:
> > > > > 
> > > > > From: Michael Kubacki 
> > > > > 
> > > > > Audit mode was enabled for the spellcheck CI plugin. It is no longer
> > > > > needed with recent changes. Spelling errors can be checked in the
> > > > > package moving forward.
> > > > > 
> > > > > Cc: Leif Lindholm 
> > > > > Cc: Ard Biesheuvel 
> > > > > Cc: Sami Mujawar 
> > > > > Signed-off-by: Michael Kubacki 
> > > > 
> > > > Will this patch result in PRs potentially being rejected by pre-merge
> > > > CI due to trivial spelling errors?
> > > > 
> > > > 
> > > > > ---
> > > > >ArmPkg/ArmPkg.ci.yaml | 3 ++-
> > > > >1 file changed, 2 insertions(+), 1 deletion(-)
> > > > > 
> > > > > diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml
> > > > > index c8dface6821a..a304c7966cf7 100644
> > > > > --- a/ArmPkg/ArmPkg.ci.yaml
> > > > > +++ b/ArmPkg/ArmPkg.ci.yaml
> > > > > @@ -87,7 +87,7 @@
> > > > > 
> > > > >## options defined .pytool/Plugin/SpellCheck
> > > > >"SpellCheck": {
> > > > > -"AuditOnly": True,
> > > > > +"AuditOnly": False,
> > > > >"IgnoreFiles": [
> > > > >"Library/ArmSoftFloatLib/berkeley-softfloat-3/**"
> > > > >],   # use gitignore syntax to 
> > > > > ignore errors
> > > > > @@ -148,6 +148,7 @@
> > > > >  "fcmplt",
> > > > >  "ffreestanding",
> > > > >  "frsub",
> > > > > +  "hauser",
> > > > >  "hisilicon",
> > > > >  "iccabpr",
> > > > >  "iccbpr",
> > > > > --
> > > > > 2.28.0.windows.1
> > > > > 
> > 
> > 
> > 
> > 


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Re: [edk2-devel] [PATCH v2 1/1] Platform/Sgi: Use MmUnblockMemoryLib when SECURE_BOOT_ENABLE

[Ard Biesheuvel]

On Thu, 15 Dec 2022 at 09:35,  wrote:
>
> From: Pierre Gondois 
>
> Building the RdV1 platform fails when only providing the
> '-D SECURE_BOOT_ENABLE' flag due to MmUnblockMemoryLib missing.
> There is only one MmUnblockMemoryLib implementation used,
> so unconditionally use this implementation.
>
> Signed-off-by: Pierre Gondois 
> ---
>
> Notes:
> v2:
>  - Instead of defining the library when SECURE_BOOT_ENABLE is defined,
>unconditionally include the library. [Ard]
>

Pushed as 425cce541517..20e07099d8f1, thanks.

>  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
> b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
> index 81764368a0b7..a21faa249b07 100644
> --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
> @@ -38,9 +38,7 @@ [LibraryClasses.common]
>HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
>
> ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
>TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
> -!if $(SECURE_BOOT_ENABLE) == TRUE
>
> MmUnblockMemoryLib|MdePkg/Library/MmUnblockMemoryLib/MmUnblockMemoryLibNull.inf
> -!endif
>
># Virtio Support
>VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
> --
> 2.25.1
>


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[edk2-devel] [PATCH v1] Maintainers.txt: Update NetworkPkg & MM modules Reviewer

[Wu, Jiaxin]

This is to change NetworkPkg & MM modules Reviewer.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Maciej Rabeda 
Signed-off-by: Jiaxin Wu 
---
 Maintainers.txt | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index 6a92922258..e2beafbaa6 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -374,11 +374,11 @@ R: Eric Dong  [ydong10]
 MdeModulePkg: Management Mode (MM, SMM) modules
 F: MdeModulePkg/*Smi*/
 F: MdeModulePkg/*Smm*/
 F: MdeModulePkg/Include/*Smi*.h
 F: MdeModulePkg/Include/*Smm*.h
-R: Eric Dong  [ydong10]
+R: Jiaxin Wu  [jiaxinwu]
 R: Ray Ni  [niruiyu]
 
 MdeModulePkg: Pei Core
 F: MdeModulePkg/Core/Pei/
 R: Dandan Bi  [dandanbi]
@@ -430,11 +430,10 @@ R: Zhiguang Liu  [LiuZhiguang001]
 
 NetworkPkg
 F: NetworkPkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
 M: Maciej Rabeda  [mrabeda]
-R: Jiaxin Wu  [jiaxinwu]
 R: Siyuan Fu  [sfu5]
 
 OvmfPkg
 F: OvmfPkg/
 W: http://www.tianocore.org/ovmf/
-- 
2.16.2.windows.1



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Re: [edk2-devel] [PATCH v3 13/14] ArmPkg: Turn off spellcheck audit mode

[Ard Biesheuvel]

On Thu, 15 Dec 2022 at 01:04, Michael Kubacki
 wrote:
>
> I'm just trying to understand your position.
>
> Are you saying you would rather people check in typos and then later
> have patches come into the package to fix them?
>
> For example, like these:
>
> - ArmVirtPkg: https://edk2.groups.io/g/devel/message/97021
> - ArmPkg: https://edk2.groups.io/g/devel/message/97022
>
> Why not just have the code checked in without typos in the first place?
>
> Checking in typos creates more review work, makes the code history have
> typo fix patches that could be avoided, and impacts accessibility.
>
> I spend far more time with edk2 overhead such as email formatting
> problems, keeping track of maintainer email address changes when
> updating patches, mapping email replies back to code, and so on that
> does not improve the code. A spell checker only takes seconds and is
> built into edk2 CI.
>

SpellCheck cannot distinguish between typos and valid uses of non-english words.

ArmPkg is not made up of english prose, it is unidiomatic even for
EDK2 as its code contains many of the hundreds of mnemonics and
acronyms that are defined in the ARM Architecture Reference Manual.
With SpellCheck enabled, we need to extend the exception list every
time the use of such a word gets introduced into the code, which is
tedious and pointless, given that the exception list is already
hundreds of entries long, and you are even adding *known typos* to it.

Whether or not a patch passes SpellCheck is therefore becoming a poor
measure of quality. And fundamentally, given that the resulting object
code is identical, SpellCheck does not contribute *at all* to making
the code that actually gets shipped any better.

I do care about typos, and if this wasn't so disruptive to my normal
development process, I wouldn't object to it, but getting a simple PR
merged has already become a massive waste of time due to the rigid
uncrustify rules (which I am not as excited about either, tbh). So
rejecting PRs simply because some word does not appear in the list is
not acceptable to me.

Unless I get a button in the GitHub UI that permits me to force-merge
a PR if it failed the SpellCheck pass. Or adds it to the exception
list automatically.

I would also like to point out that all this focus on code aesthetics
that do not contribute to the object code at all is distracting from
things that would actually improve the safety and robustness of the
code. During my time at ARM, I implemented a prototype for IBT/BTI in
EFI, which -given how much EFI relies on function pointers and
indirect calls- would be a very useful thing to have, both on x86 and
arm64.

Unfortunately, this requires a PE/COFF spec change, so that .text
sections can be marked as having been built with brach-tracking
landing pads. At the time, we tried various contacts in Microsoft to
find the people that could help author such a change to the PE/COFF
spec, but I never got anywhere.

So if you are interested, and want to improve EDK2 at a level that
actually makes the shipping code more robust, we could collaborate on
this (PE spec change, UEFI spec change, EDK2 and Linux changes both
for x86 and arm64[0]) so that firmware runs with indirect branch
protection enabled when the hardware supports it.

[0] 
https://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux.git/log/?h=efi-bti


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[edk2-devel] [PATCH V1 6/6] OvmfPkg/PlatformInitLib: Implement multi-core accept memory for TDVF

[Min Xu]

From: Min M Xu 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

TDVF once accepts memory only by BSP. To improve the boot performance
this patch introduce the multi-core accpet memory. Multi-core means
BSP and APs work together to accept memory.

TDVF leverages mailbox to wake up APs. It is not enabled in MpInitLib
(Which requires SIPI). So multi-core accept memory cannot leverages
MpInitLib to coordinate BSP and APs to work together.

So TDVF split the accept memory into 2 phases.
- AcceptMemoryForAPsStack:
  BSP accepts a small piece of memory which is then used by APs to setup
  stack. We assign a 16KB stack for each AP. So a td-guest with 256 vCPU
  requires 255*16KB = 4080KB.
- AcceptMemory:
  After above small piece of memory is accepted, BSP commands APs to
  accept memory by sending AcceptPages command in td-mailbox. Together
  with the command and accpet-function, the APsStack address is send
  as well. APs then set the stack and jump to accept-function to accept
  memory.

AcceptMemoryForAPsStack accepts as small memory as possible and then jump
to AcceptMemory. It fully takes advantage of BSP/APs to work together.
After accept memory is done, the memory region for APsStack is not used
anymore. It can be used as other private memory. Because accept-memory
is in the very beginning of boot process and it will not impact other
phases.

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min Xu 
---
 OvmfPkg/Library/PlatformInitLib/IntelTdx.c| 411 +++---
 .../PlatformInitLib/PlatformInitLib.inf   |   1 +
 2 files changed, 363 insertions(+), 49 deletions(-)

diff --git a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c 
b/OvmfPkg/Library/PlatformInitLib/IntelTdx.c
index acd114e38e46..91a8aaf244a4 100644
--- a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c
+++ b/OvmfPkg/Library/PlatformInitLib/IntelTdx.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -28,6 +29,10 @@
 #define ALIGNED_2MB_MASK  0x1f
 #define MEGABYTE_SHIFT20
 
+#define ACCEPT_CHUNK_SIZE  SIZE_32MB
+#define AP_STACK_SIZE  SIZE_16KB
+#define APS_STACK_SIZE(CpusNum)  (ALIGN_VALUE(CpusNum*AP_STACK_SIZE, SIZE_2MB))
+
 /**
   This function will be called to accept pages. Only BSP accepts pages.
 
@@ -81,8 +86,6 @@ BspAcceptMemoryResourceRange (
 return EFI_SUCCESS;
   }
 
-  DEBUG ((DEBUG_INFO, "TdAccept: 0x%llx - 0x%llx\n", PhysicalAddress, 
TotalLength));
-
   if (ALIGN_VALUE (PhysicalAddress, SIZE_2MB) != PhysicalAddress) {
 StartAddress1 = PhysicalAddress;
 Length1   = ALIGN_VALUE (PhysicalAddress, SIZE_2MB) - PhysicalAddress;
@@ -106,11 +109,6 @@ BspAcceptMemoryResourceRange (
 Length3   = TotalLength;
   }
 
-  DEBUG ((DEBUG_INFO, "   Part1: 0x%llx - 0x%llx\n", StartAddress1, Length1));
-  DEBUG ((DEBUG_INFO, "   Part2: 0x%llx - 0x%llx\n", StartAddress2, Length2));
-  DEBUG ((DEBUG_INFO, "   Part3: 0x%llx - 0x%llx\n", StartAddress3, Length3));
-  DEBUG ((DEBUG_INFO, "   Page : 0x%x\n", AcceptPageSize));
-
   Status = EFI_SUCCESS;
   if (Length1 > 0) {
 Pages  = Length1 / SIZE_4KB;
@@ -140,6 +138,342 @@ BspAcceptMemoryResourceRange (
   return Status;
 }
 
+/**
+ * This function is called by BSP and APs to accept memory.
+ * Note:
+ * The input PhysicalStart/PhysicalEnd indicates the whole memory region
+ * to be accepted. BSP or AP only accepts one piece in the whole memory region.
+ *
+ * @param CpuIndexvCPU index
+ * @param CpusNum Total vCPU number of a Tdx guest
+ * @param PhysicalStart   Start address of a memory region which is to be 
accepted
+ * @param PhysicalEnd End address of a memory region which is to be 
accepted
+ *
+ * @retval EFI_SUCCESSSuccessfully accept the memory
+ * @retval Other  Other errors as indicated
+ */
+STATIC
+EFI_STATUS
+EFIAPI
+BspApAcceptMemoryResourceRange (
+  UINT32CpuIndex,
+  UINT32CpusNum,
+  EFI_PHYSICAL_ADDRESS  PhysicalStart,
+  EFI_PHYSICAL_ADDRESS  PhysicalEnd
+  )
+{
+  UINT64Status;
+  UINT64Pages;
+  UINT64Stride;
+  UINT64AcceptPageSize;
+  EFI_PHYSICAL_ADDRESS  PhysicalAddress;
+
+  AcceptPageSize = (UINT64)(UINTN)FixedPcdGet32 (PcdTdxAcceptPageSize);
+
+  Status  = EFI_SUCCESS;
+  Stride  = CpusNum * ACCEPT_CHUNK_SIZE;
+  PhysicalAddress = PhysicalStart + ACCEPT_CHUNK_SIZE * CpuIndex;
+
+  while (!EFI_ERROR (Status) && PhysicalAddress < PhysicalEnd) {
+Pages  = MIN (ACCEPT_CHUNK_SIZE, PhysicalEnd - PhysicalAddress) / 
AcceptPageSize;
+Status = TdAcceptPages (PhysicalAddress, Pages, 
(UINT32)(UINTN)AcceptPageSize);
+ASSERT (!EFI_ERROR (Status));
+PhysicalAddress += Stride;
+  }
+
+  return EFI_SUCCESS;
+}
+
+/**
+ * This function is called by APs to accept memory.
+ *
+ * @param CpuIndexvCPU index of an AP
+ * @param PhysicalStart   Start address of a memory re

[edk2-devel] [PATCH V1 3/6] OvmfPkg: Add TdxMailboxLibNull in some platform dsc

[Min Xu]

From: Min M Xu 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

In the following patches TdxMailboxLib will be included in
PlatformInitLib. While PlatformInitLib is imported by some IA32/X64
platforms (for example AmdSevX64.dsc). So TdxMailboxLibNull is added in
those platforms which don't support TDX feature.

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min Xu 
---
 OvmfPkg/AmdSev/AmdSevX64.dsc   | 1 +
 OvmfPkg/CloudHv/CloudHvX64.dsc | 1 +
 OvmfPkg/Microvm/MicrovmX64.dsc | 1 +
 OvmfPkg/OvmfPkgIa32.dsc| 1 +
 OvmfPkg/OvmfPkgIa32X64.dsc | 2 +-
 5 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index 8f7cae787e97..706d00707715 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -206,6 +206,7 @@
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
+  TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
 
 [LibraryClasses.common.SEC]
   TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index ce277cb2398b..867a1e1e9378 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -253,6 +253,7 @@
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
+  TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
 
 [LibraryClasses.common.SEC]
   TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index 994a02d30107..33f7cd7d6342 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -255,6 +255,7 @@
   FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
+  TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
 
 [LibraryClasses.common.SEC]
   QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 6f774baf90f5..56c5fd873444 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -257,6 +257,7 @@
 [LibraryClasses.common]
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
+  TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
 
 [LibraryClasses.common.SEC]
   TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index c851764dec05..9a8045ffc406 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -262,7 +262,7 @@
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
   TdxLib|MdePkg/Library/TdxLib/TdxLib.inf
-  TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf
+  TdxMailboxLib|OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
 
 [LibraryClasses.common.SEC]
   TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
-- 
2.29.2.windows.2



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[edk2-devel] [PATCH V1 4/6] OvmfPkg/Sec: Move TDX APs related nasm code to IntelTdxAPs.nasm

[Min Xu]

From: Min M Xu 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

This patch moves the TDX APs nasm code from SecEntry.nasm to
IntelTdxAPs.nasm. IntelTdxX64 and OvmfPkgX64 use the same nasm so that
it can be easier to be managed. In the following patch there will be
AcceptMemory related changes in IntelTdxAPs.nasm.

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min Xu 
---
 OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm | 58 +++
 OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm| 58 ++-
 OvmfPkg/Sec/X64/SecEntry.nasm | 58 ++-
 3 files changed, 68 insertions(+), 106 deletions(-)
 create mode 100644 OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm

diff --git a/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm 
b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
new file mode 100644
index ..034ac0ee9421
--- /dev/null
+++ b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
@@ -0,0 +1,58 @@
+;--
+; @file
+; Intel TDX APs
+;
+; Copyright (c) 2021 - 2022, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;--
+
+%include "TdxCommondefs.inc"
+
+;
+; Note: BSP never gets here. APs will be unblocked by DXE
+;
+; R8  [31:0]  NUM_VCPUS
+; [63:32] MAX_VCPUS
+; R9  [31:0]  VCPU_INDEX
+;
+ParkAp:
+
+do_wait_loop:
+;
+; register itself in [rsp + CpuArrivalOffset]
+;
+mov   rax, 1
+lock xadd dword [rsp + CpuArrivalOffset], eax
+inc   eax
+
+.check_arrival_cnt:
+cmp   eax, r8d
+je.check_command
+mov   eax, dword[rsp + CpuArrivalOffset]
+jmp   .check_arrival_cnt
+
+.check_command:
+mov eax, dword[rsp + CommandOffset]
+cmp eax, MpProtectedModeWakeupCommandNoop
+je  .check_command
+
+cmp eax, MpProtectedModeWakeupCommandWakeup
+je  .do_wakeup
+
+; Don't support this command, so ignore
+jmp .check_command
+
+.do_wakeup:
+;
+; BSP sets these variables before unblocking APs
+;   RAX:  WakeupVectorOffset
+;   RBX:  Relocated mailbox address
+;   RBP:  vCpuId
+;
+mov rax, 0
+mov eax, dword[rsp + WakeupVectorOffset]
+mov rbx, [rsp + WakeupArgsRelocatedMailBox]
+nop
+jmp rax
+jmp $
diff --git a/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm 
b/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm
index 4528fec309a0..5a38c4213916 100644
--- a/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm
+++ b/OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm
@@ -10,7 +10,6 @@
 ;--
 
 #include 
-%include "TdxCommondefs.inc"
 
 DEFAULT REL
 SECTION .text
@@ -49,6 +48,7 @@ ASM_PFX(_ModuleEntryPoint):
 cmp byte[eax], VM_GUEST_TYPE_TDX
 jne InitStack
 
+%define TDCALL_TDINFO 1
 mov rax, TDCALL_TDINFO
 tdcall
 
@@ -62,7 +62,9 @@ ASM_PFX(_ModuleEntryPoint):
 mov rax, r9
 and rax, 0x
 testrax, rax
-jne ParkAp
+jz  InitStack
+mov rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)
+jmp ParkAp
 
 InitStack:
 
@@ -98,54 +100,4 @@ InitStack:
 sub rsp, 0x20
 callASM_PFX(SecCoreStartupWithStack)
 
-;
-; Note: BSP never gets here. APs will be unblocked by DXE
-;
-; R8  [31:0]  NUM_VCPUS
-; [63:32] MAX_VCPUS
-; R9  [31:0]  VCPU_INDEX
-;
-ParkAp:
-
-mov rbp,  r9
-
-.do_wait_loop:
-mov rsp, FixedPcdGet32 (PcdOvmfSecGhcbBackupBase)
-
-;
-; register itself in [rsp + CpuArrivalOffset]
-;
-mov   rax, 1
-lock xadd dword [rsp + CpuArrivalOffset], eax
-inc   eax
-
-.check_arrival_cnt:
-cmp   eax, r8d
-je.check_command
-mov   eax, dword[rsp + CpuArrivalOffset]
-jmp   .check_arrival_cnt
-
-.check_command:
-mov eax, dword[rsp + CommandOffset]
-cmp eax, MpProtectedModeWakeupCommandNoop
-je  .check_command
-
-cmp eax, MpProtectedModeWakeupCommandWakeup
-je  .do_wakeup
-
-; Don't support this command, so ignore
-jmp .check_command
-
-.do_wakeup:
-;
-; BSP sets these variables before unblocking APs
-;   RAX:  WakeupVectorOffset
-;   RBX:  Relocated mailbox address
-;   RBP:  vCpuId
-;
-mov rax, 0
-mov eax, dword[rsp + WakeupVectorOffset]
-mov rbx, [rsp + WakeupArgsRelocatedMailBox]
-nop
-jmp rax
-jmp $
+%include "IntelTdxAPs.nasm"
diff --git a/OvmfPkg/Sec/X64/SecEntry.nasm b/OvmfPkg/Sec/X64/SecEntry.nasm
index 4528fec309a0..0f82051720da 100644
--- a/OvmfPkg/Sec/X64/SecEntry.nasm
+++ b/OvmfPkg/Sec/X64/SecEntry.nasm
@@ -10,7 +10,6 @@
 ;--

[edk2-devel] [PATCH V1 5/6] OvmfPkg: Enable APs to accept memory for TDVF

[Min Xu]

From: Min M Xu 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

TDVF APs once did nothing but spin around to wait for the Wakeup command.
This patch enables APs to handle the AcceptPages command. Once APs find
the AcceptPages command, it set its stack and jump to the function of
ApAcceptMemoryResourceRange (which will be introduced in the following
patch).

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min Xu 
---
 OvmfPkg/Include/TdxCommondefs.inc |  4 +-
 OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm | 61 +++
 2 files changed, 63 insertions(+), 2 deletions(-)

diff --git a/OvmfPkg/Include/TdxCommondefs.inc 
b/OvmfPkg/Include/TdxCommondefs.inc
index 970eac96592a..a29d2fad4233 100644
--- a/OvmfPkg/Include/TdxCommondefs.inc
+++ b/OvmfPkg/Include/TdxCommondefs.inc
@@ -15,8 +15,8 @@ FirmwareArgsOffsetequ   800h
 WakeupArgsRelocatedMailBoxequ   800h
 AcceptPageArgsPhysicalStart   equ   800h
 AcceptPageArgsPhysicalEnd equ   808h
-AcceptPageArgsChunkSize   equ   810h
-AcceptPageArgsPageSizeequ   818h
+AcceptPageArgsTopStackAddress equ   810h
+AcceptPageArgsApStackSize equ   818h
 CpuArrivalOffset  equ   900h
 CpusExitingOffset equ   0a00h
 TalliesOffset equ   0a08h
diff --git a/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm 
b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
index 034ac0ee9421..4a984ecc1058 100644
--- a/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
+++ b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
@@ -40,9 +40,70 @@ do_wait_loop:
 cmp eax, MpProtectedModeWakeupCommandWakeup
 je  .do_wakeup
 
+cmp eax, MpProtectedModeWakeupCommandAcceptPages
+je  .do_accept_pages
+
 ; Don't support this command, so ignore
 jmp .check_command
 
+.do_accept_pages:
+;
+; Read the top stack address from arguments
+mov rsi, [rsp + AcceptPageArgsTopStackAddress]
+
+;
+; Calculate the top stack address of the AP.
+; ApStackAddr = BaseStackAddr + (vCpuIndex) * ApStackSize
+xor rdx, rdx
+xor rbx, rbx
+xor rax, rax
+mov eax, [rsp + AcceptPageArgsApStackSize]
+mov ebx, r9d; vCpuIndex
+mul ebx
+add rsi, rax; now rsi is ApStackAddr
+
+.start_accept_pages:
+;
+; Read the function address which will be called
+mov rax, [rsp + WakeupVectorOffset]
+
+;
+; vCPU index as the first argument
+mov ecx, r9d
+mov rdx, [rsp + AcceptPageArgsPhysicalStart]
+mov r8, [rsp + AcceptPageArgsPhysicalEnd]
+
+; save the Mailbox address to rbx
+mov rbx, rsp
+
+;
+; set AP Stack
+mov rsp, rsi
+nop
+
+; save rax (the Mailbox address)
+pushrbx
+
+callrax
+
+; recove rsp
+pop rbx
+mov rsp, rbx
+;
+; recover r8, r9
+mov rax, 1
+tdcall
+
+mov eax, 0h
+lock xadd dword [rsp + CpusExitingOffset], eax
+dec eax
+
+.check_exiting_cnt:
+cmp eax, 0
+je  do_wait_loop
+mov eax, dword[rsp + CpusExitingOffset]
+jmp .check_exiting_cnt
+
 .do_wakeup:
 ;
 ; BSP sets these variables before unblocking APs
-- 
2.29.2.windows.2



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[edk2-devel] [PATCH V1 2/6] OvmfPkg/TdxMailboxLib: Add NULL instance of TdxMailboxLib

[Min Xu]

From: Min M Xu 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

TdxMailboxLib is designed only for TDX guest which arch is X64. This
patch set the VALID_ARCHITECTURES of TdxMailboxLib as X64.

Because in the following patches TdxMailboxLib will be included in
PlatformInitLib. While PlatformInitLib is imported by some X64 platforms
(for example AmdSevX64.dsc). So we need a NULL instance of TdxMailboxLib
which VALID_ARCHITECTURES is X64 as well. Based on this consideration
we design TdxMailboxLibNull.

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min Xu 
---
 .../Library/TdxMailboxLib/TdxMailboxLib.inf   |  7 ++--
 .../TdxMailboxLib/TdxMailboxLibNull.inf   | 34 +++
 2 files changed, 36 insertions(+), 5 deletions(-)
 create mode 100644 OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf

diff --git a/OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf 
b/OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf
index 3cf3690a16c7..e504bda0dd90 100644
--- a/OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf
+++ b/OvmfPkg/Library/TdxMailboxLib/TdxMailboxLib.inf
@@ -1,6 +1,6 @@
 #/** @file
 #
-#  TBD
+#  TdxMailbox Library
 #
 #  Copyright (c) 2018, Intel Corporation. All rights reserved.
 #  Copyright (c) 2008, Apple Inc. All rights reserved.
@@ -19,12 +19,9 @@
   LIBRARY_CLASS  = TdxMailboxLib
 
 #
-#  VALID_ARCHITECTURES   = X64 IA32
+#  VALID_ARCHITECTURES   = X64
 #
 
-[Sources.IA32]
-  TdxMailboxNull.c
-
 [Sources.X64]
   TdxMailbox.c
 
diff --git a/OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf 
b/OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
new file mode 100644
index ..8380d9f4f6d8
--- /dev/null
+++ b/OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf
@@ -0,0 +1,34 @@
+#/** @file
+#
+#  Null instance of TdxMailboxLib
+#
+#  Copyright (c) 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) 2008, Apple Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = TdxMailboxLibNull
+  FILE_GUID  = 002a1265-a1a0-47cd-bc69-4342b147f57d
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = TdxMailboxLib
+
+#
+#  VALID_ARCHITECTURES   = IA32 X64
+#
+
+[Sources]
+  TdxMailboxNull.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
-- 
2.29.2.windows.2



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[edk2-devel] [PATCH V1 1/6] OvmfPkg/TdxMailboxLib: Delete global variables

[Min Xu]

From: Min M Xu 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

TdxMailboxLib once was designed to be used in DXE phase. But now it is
going to be used in SEC/PEI phase (in the following patches). Global
variables are not allowed. The library is refactored after those global
variables are deleted.

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min Xu 
---
 OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c | 22 ++
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c 
b/OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c
index 74cb55611fe3..c580a2885603 100644
--- a/OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c
+++ b/OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c
@@ -13,14 +13,10 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 
-volatile VOID  *mMailBox  = NULL;
-UINT32 mNumOfCpus = 0;
-
 /**
   This function will be called by BSP to get the CPU number.
 
@@ -32,11 +28,17 @@ GetCpusNum (
   VOID
   )
 {
-  if (mNumOfCpus == 0) {
-mNumOfCpus = TdVCpuNum ();
+  UINT64  Status;
+  TD_RETURN_DATA  TdReturnData;
+
+  Status = TdCall (TDCALL_TDINFO, 0, 0, 0, &TdReturnData);
+  if (Status == TDX_EXIT_REASON_SUCCESS) {
+return TdReturnData.TdInfo.NumVcpus;
+  } else {
+DEBUG ((DEBUG_ERROR, "Failed call TDCALL_TDINFO. %llx\n", Status));
   }
 
-  return mNumOfCpus;
+  return 0;
 }
 
 /**
@@ -48,11 +50,7 @@ GetTdxMailBox (
   VOID
   )
 {
-  if (mMailBox == NULL) {
-mMailBox = (VOID *)(UINTN)PcdGet32 (PcdOvmfSecGhcbBackupBase);
-  }
-
-  return mMailBox;
+  return (VOID *)(UINTN)PcdGet32 (PcdOvmfSecGhcbBackupBase);
 }
 
 /**
-- 
2.29.2.windows.2



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[edk2-devel] [PATCH V1 0/6] Enable Multi-core based lazy-accept for TDVF

[Min Xu]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172

TDVF once accepts memory only by BSP. To improve the boot performance
this patch-set introduce the multi-core accpet memory. Multi-core means
BSP and APs work together to accept memory.

TDVF leverages mailbox to wake up APs. It is not enabled in MpInitLib
(Which requires SIPI). So multi-core accept memory cannot leverages
MpInitLib to coordinate BSP and APs to work together.

So TDVF split the accept memory into 2 phases.
- AcceptMemoryForAPsStack:
  BSP accepts a small piece of memory which is then used by APs to setup
  stack. We assign a 16KB stack for each AP. So a td-guest with 256 vCPU
  requires 255*16KB = 4080KB.
- AcceptMemory:
  After above small piece of memory is accepted, BSP commands APs to
  accept memory by sending AcceptPages command in td-mailbox. Together
  with the command and accpet-function, the APsStack address is send
  as well. APs then set the stack and jump to accept-function to accept
  memory.

Patch 1-3:
  TdxMailboxLib is refactored to help multi-core lazy accept.
Patch 4-5:
  Refactor APs' logical to support accpet page.
Patch 6:
  Implement multi-core accept in TDVF.

Code: https://github.com/mxu9/edk2/tree/Multi-Core-Lazy-Accept.v1

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Cc: Tom Lendacky 
Signed-off-by: Min Xu 

Min M Xu (6):
  OvmfPkg/TdxMailboxLib: Delete global variables
  OvmfPkg/TdxMailboxLib: Add NULL instance of TdxMailboxLib
  OvmfPkg: Add TdxMailboxLibNull in some platform dsc
  OvmfPkg/Sec: Move TDX APs related nasm code to IntelTdxAPs.nasm
  OvmfPkg: Enable APs to accept memory for TDVF
  OvmfPkg/PlatformInitLib: Implement multi-core accept memory for TDVF

 OvmfPkg/AmdSev/AmdSevX64.dsc  |   1 +
 OvmfPkg/CloudHv/CloudHvX64.dsc|   1 +
 OvmfPkg/Include/TdxCommondefs.inc |   4 +-
 OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm | 119 +
 OvmfPkg/IntelTdx/Sec/X64/SecEntry.nasm|  58 +--
 OvmfPkg/Library/PlatformInitLib/IntelTdx.c| 411 +++---
 .../PlatformInitLib/PlatformInitLib.inf   |   1 +
 OvmfPkg/Library/TdxMailboxLib/TdxMailbox.c|  22 +-
 .../Library/TdxMailboxLib/TdxMailboxLib.inf   |   7 +-
 .../TdxMailboxLib/TdxMailboxLibNull.inf   |  34 ++
 OvmfPkg/Microvm/MicrovmX64.dsc|   1 +
 OvmfPkg/OvmfPkgIa32.dsc   |   1 +
 OvmfPkg/OvmfPkgIa32X64.dsc|   2 +-
 OvmfPkg/Sec/X64/SecEntry.nasm |  58 +--
 14 files changed, 545 insertions(+), 175 deletions(-)
 create mode 100644 OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm
 create mode 100644 OvmfPkg/Library/TdxMailboxLib/TdxMailboxLibNull.inf

-- 
2.29.2.windows.2



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[edk2-devel] [PATCH v2 1/1] Platform/Sgi: Use MmUnblockMemoryLib when SECURE_BOOT_ENABLE

[PierreGondois]

From: Pierre Gondois 

Building the RdV1 platform fails when only providing the
'-D SECURE_BOOT_ENABLE' flag due to MmUnblockMemoryLib missing.
There is only one MmUnblockMemoryLib implementation used,
so unconditionally use this implementation.

Signed-off-by: Pierre Gondois 
---

Notes:
v2:
 - Instead of defining the library when SECURE_BOOT_ENABLE is defined,
   unconditionally include the library. [Ard]

 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 81764368a0b7..a21faa249b07 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -38,9 +38,7 @@ [LibraryClasses.common]
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
-!if $(SECURE_BOOT_ENABLE) == TRUE
   
MmUnblockMemoryLib|MdePkg/Library/MmUnblockMemoryLib/MmUnblockMemoryLibNull.inf
-!endif
 
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
-- 
2.25.1



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Re: [edk2-devel] [PATCH v3] OvmfPkg/PlatformPei: Validate SEC's GHCB page

[Yao, Jiewen]

Merged https://github.com/tianocore/edk2/pull/3774

> -Original Message-
> From: Tom Lendacky 
> Sent: Tuesday, December 13, 2022 3:30 AM
> To: Adam Dunlap ; devel@edk2.groups.io
> Cc: Ard Biesheuvel ; Yao, Jiewen
> ; Justen, Jordan L ; Gerd
> Hoffmann ; Brijesh Singh ;
> Aktas, Erdem ; James Bottomley
> ; Xu, Min M ; Dionna Glaze
> 
> Subject: Re: [PATCH v3] OvmfPkg/PlatformPei: Validate SEC's GHCB page
> 
> On 12/9/22 15:04, Adam Dunlap wrote:
> > When running under SEV-ES, a page of shared memory is allocated for the
> > GHCB during the SEC phase at address 0x809000. This page of memory is
> > eventually passed to the OS as EfiConventionalMemory. When running
> > SEV-SNP, this page is not PVALIDATE'd in the RMP table, meaning that if
> > the guest OS tries to access the page, it will think that the host has
> > voilated the security guarantees and will likely crash.
> >
> > This patch validates this page immediately after EDK2 switches to using
> > the GHCB page allocated for the PEI phase.
> >
> > This was tested by writing a UEFI application that reads to and writes
> > from one byte of each page of memory and checks to see if a #VC
> > exception is generated indicating that the page was not validated.
> >
> > Fixes: 6995a1b79bab ("OvmfPkg: Create a GHCB page for use during Sec
> phase")
> >
> > Signed-off-by: Adam Dunlap 
> 
> Reviewed-by: Tom Lendacky 
> 
> > ---
> >
> > Removed the PcdStatus variable and just use Status for all statuses in
> > this function. Use uncrustify to fix some formatting errors.
> >
> >   OvmfPkg/PlatformPei/AmdSev.c | 40 --
> --
> >   1 file changed, 27 insertions(+), 13 deletions(-)
> >
> > diff --git a/OvmfPkg/PlatformPei/AmdSev.c
> b/OvmfPkg/PlatformPei/AmdSev.c
> > index e1b9fd9b7f..b2f2f3ac26 100644
> > --- a/OvmfPkg/PlatformPei/AmdSev.c
> > +++ b/OvmfPkg/PlatformPei/AmdSev.c
> > @@ -212,7 +212,7 @@ AmdSevEsInitialize (
> > UINTNGhcbBackupPageCount;
> > SEV_ES_PER_CPU_DATA  *SevEsData;
> > UINTNPageCount;
> > -  RETURN_STATUSPcdStatus, DecryptStatus;
> > +  RETURN_STATUSStatus;
> > IA32_DESCRIPTOR  Gdtr;
> > VOID *Gdt;
> >
> > @@ -220,8 +220,8 @@ AmdSevEsInitialize (
> >   return;
> > }
> >
> > -  PcdStatus = PcdSetBoolS (PcdSevEsIsEnabled, TRUE);
> > -  ASSERT_RETURN_ERROR (PcdStatus);
> > +  Status = PcdSetBoolS (PcdSevEsIsEnabled, TRUE);
> > +  ASSERT_RETURN_ERROR (Status);
> >
> > //
> > // Allocate GHCB and per-CPU variable pages.
> > @@ -240,20 +240,20 @@ AmdSevEsInitialize (
> > // only clear the encryption mask for the GHCB pages.
> > //
> > for (PageCount = 0; PageCount < GhcbPageCount; PageCount += 2) {
> > -DecryptStatus = MemEncryptSevClearPageEncMask (
> > -  0,
> > -  GhcbBasePa + EFI_PAGES_TO_SIZE (PageCount),
> > -  1
> > -  );
> > -ASSERT_RETURN_ERROR (DecryptStatus);
> > +Status = MemEncryptSevClearPageEncMask (
> > +   0,
> > +   GhcbBasePa + EFI_PAGES_TO_SIZE (PageCount),
> > +   1
> > +   );
> > +ASSERT_RETURN_ERROR (Status);
> > }
> >
> > ZeroMem (GhcbBase, EFI_PAGES_TO_SIZE (GhcbPageCount));
> >
> > -  PcdStatus = PcdSet64S (PcdGhcbBase, GhcbBasePa);
> > -  ASSERT_RETURN_ERROR (PcdStatus);
> > -  PcdStatus = PcdSet64S (PcdGhcbSize, EFI_PAGES_TO_SIZE
> (GhcbPageCount));
> > -  ASSERT_RETURN_ERROR (PcdStatus);
> > +  Status = PcdSet64S (PcdGhcbBase, GhcbBasePa);
> > +  ASSERT_RETURN_ERROR (Status);
> > +  Status = PcdSet64S (PcdGhcbSize, EFI_PAGES_TO_SIZE (GhcbPageCount));
> > +  ASSERT_RETURN_ERROR (Status);
> >
> > DEBUG ((
> >   DEBUG_INFO,
> > @@ -295,6 +295,20 @@ AmdSevEsInitialize (
> >
> > AsmWriteMsr64 (MSR_SEV_ES_GHCB, GhcbBasePa);
> >
> > +  //
> > +  // Now that the PEI GHCB is set up, the SEC GHCB page is no longer
> necessary
> > +  // to keep shared. Later, it is exposed to the OS as
> EfiConventionalMemory, so
> > +  // it needs to be marked private. The size of the region is hardcoded in
> > +  // OvmfPkg/ResetVector/ResetVector.nasmb in the definition of
> > +  // SNP_SEC_MEM_BASE_DESC_2.
> > +  //
> > +  Status = MemEncryptSevSetPageEncMask (
> > + 0,  // Cr3 -- use system Cr3
> > + FixedPcdGet32 (PcdOvmfSecGhcbBase), // BaseAddress
> > + 1   // NumPages
> > + );
> > +  ASSERT_RETURN_ERROR (Status);
> > +
> > //
> > // The SEV support will clear the C-bit from non-RAM areas.  The early
> GDT
> > // lives in a non-RAM area, so when an exception occurs (like a #VC) the
> GDT


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