date:20240424

Re: [edk2-devel] [PATCH 1/1] UefiCpuPkg/SmmCpuSyncLib: Add MM_STANDALONE tag.

2024-04-24 Thread Yuanhao Xie

Ok！

From: Ni, Ray 
Sent: Thursday, April 25, 2024 1:54 PM
To: Xie, Yuanhao ; devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ; 
Gerd Hoffmann ; Wu, Jiaxin 
Subject: Re: [PATCH 1/1] UefiCpuPkg/SmmCpuSyncLib: Add MM_STANDALONE tag.


-# Copyright (c) 2023, Intel Corporation. All rights reserved.
+# Copyright (c) 2024, Intel Corporation. All rights reserved.

Yuanhao, why did you change the copyright year from 2023 to 2024?
You can either leave it unchanged, or change it to "2023 - 2024".

 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -13,7 +13,7 @@
   BASE_NAME  = SmmCpuSyncLib
   FILE_GUID  = 1ca1bc1a-16a4-46ef-956a-ca500fd3381f
   MODULE_TYPE= DXE_SMM_DRIVER
-  LIBRARY_CLASS  = SmmCpuSyncLib|DXE_SMM_DRIVER
+  LIBRARY_CLASS  = SmmCpuSyncLib|DXE_SMM_DRIVER MM_STANDALONE

 [Sources]
   SmmCpuSyncLib.c
--
2.39.1.windows.1


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Re: [edk2-devel] [PATCH 1/1] UefiCpuPkg/SmmCpuSyncLib: Add MM_STANDALONE tag.

2024-04-24 Thread Ni, Ray


-# Copyright (c) 2023, Intel Corporation. All rights reserved.
+# Copyright (c) 2024, Intel Corporation. All rights reserved.

Yuanhao, why did you change the copyright year from 2023 to 2024?
You can either leave it unchanged, or change it to "2023 - 2024".

 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -13,7 +13,7 @@
   BASE_NAME  = SmmCpuSyncLib
   FILE_GUID  = 1ca1bc1a-16a4-46ef-956a-ca500fd3381f
   MODULE_TYPE= DXE_SMM_DRIVER
-  LIBRARY_CLASS  = SmmCpuSyncLib|DXE_SMM_DRIVER
+  LIBRARY_CLASS  = SmmCpuSyncLib|DXE_SMM_DRIVER MM_STANDALONE

 [Sources]
   SmmCpuSyncLib.c
--
2.39.1.windows.1



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Re: [edk2-devel] [PATCH 2/2] StandaloneMmPkg: Initialize 'WillReturn' variable

2024-04-24 Thread Ni, Ray

Reviewed-by: Ray Ni 

Thanks,
Ray

From: Liu, Zhiguang 
Sent: Thursday, April 25, 2024 12:40
To: devel@edk2.groups.io 
Cc: Liu, Zhiguang ; Liming Gao 
; Wu, Jiaxin ; Ni, Ray 
; Laszlo Ersek ; Ard Biesheuvel 
; Sami Mujawar 
Subject: [PATCH 2/2] StandaloneMmPkg: Initialize 'WillReturn' variable

The local variable 'WillReturn' was being used without prior
initialization in some code paths.
This patch ensures that 'WillReturn' is properly initialized
to prevent undefined behavior.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Zhiguang Liu 
---
 StandaloneMmPkg/Core/Mmi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/StandaloneMmPkg/Core/Mmi.c b/StandaloneMmPkg/Core/Mmi.c
index e035245c87..fb205df490 100644
--- a/StandaloneMmPkg/Core/Mmi.c
+++ b/StandaloneMmPkg/Core/Mmi.c
@@ -174,6 +174,7 @@ MmiManage (
   EFI_STATUS   Status;

   mMmiManageCallingDepth++;
+  WillReturn   = FALSE;
   Status   = EFI_NOT_FOUND;
   ReturnStatus = Status;
   if (HandlerType == NULL) {
--
2.31.1.windows.1



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Re: [edk2-devel] [PATCH 1/2] MdeModulePkg/SMM: Initialize 'WillReturn' variable

2024-04-24 Thread Ni, Ray

Reviewed-by: Ray Ni 

Thanks,
Ray

From: Liu, Zhiguang 
Sent: Thursday, April 25, 2024 12:40
To: devel@edk2.groups.io 
Cc: Liu, Zhiguang ; Liming Gao 
; Wu, Jiaxin ; Ni, Ray 
; Laszlo Ersek 
Subject: [PATCH 1/2] MdeModulePkg/SMM: Initialize 'WillReturn' variable

The local variable 'WillReturn' was being used without prior
initialization in some code paths.
This patch ensures that 'WillReturn' is properly initialized
to prevent undefined behavior.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 

Signed-off-by: Zhiguang Liu 
---
 MdeModulePkg/Core/PiSmmCore/Smi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MdeModulePkg/Core/PiSmmCore/Smi.c 
b/MdeModulePkg/Core/PiSmmCore/Smi.c
index a84a1f48d3..6b56fa5f69 100644
--- a/MdeModulePkg/Core/PiSmmCore/Smi.c
+++ b/MdeModulePkg/Core/PiSmmCore/Smi.c
@@ -152,6 +152,7 @@ SmiManage (

   PERF_FUNCTION_BEGIN ();
   mSmiManageCallingDepth++;
+  WillReturn   = FALSE;
   Status   = EFI_NOT_FOUND;
   ReturnStatus = Status;
   if (HandlerType == NULL) {
--
2.31.1.windows.1



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Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

2024-04-24 Thread Ni, Ray

I checked the AMD64 Architecture Programmer's Manual and it says below:
--- AMD64 manual ---
SMM-revision Level—Bits 15:0. Specifies the version of SMM supported by the 
processor. The SMM-revision level is of the form 0_xx64h, where xx starts with 
00 and is incremented for later revisions to the SMM mechanism.
---

That means the SMMRevId is 0_xx64h for AMD64 processor. But I am not sure what 
the value is for AMD32 processor. Maybe 0 according to the OVMF logic.
--- OVMF's logic ---
  AMD_SMRAM_SAVE_STATE_MAP  *CpuSaveState;

  CpuSaveState = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + 
SMRAM_SAVE_STATE_MAP_OFFSET);

  if ((CpuSaveState->x86.SMMRevId & 0x) == 0) {
CpuSaveState->x86.SMBASE = (UINT32)SmBase;
  } else {
CpuSaveState->x64.SMBASE = (UINT32)SmBase;
  }
--


But, I am very suspicious about the logic in AMD's version as below:
--- AMD's version
  SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT;

  LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;
  if (LMAValue) {
SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
  }
---
The above logic detects the current CPU mode and 64bit save state area layout 
is used if it's running in 64bit.

But if a AMD64 CPU runs in 32bit mode, the above logic causes the 32bit save 
state area layout is used. It's not right!
The save state area layout does not depend on the CPU running mode, but whether 
it's a legacy CPU or a 64-capable CPU.

Jiaxin, I agree that the confusion should be cleaned up by AMD experts. Let's 
not change any existing behavior.

Thanks,
Ray

From: Wu, Jiaxin 
Sent: Thursday, April 25, 2024 8:54
To: Gerd Hoffmann 
Cc: devel@edk2.groups.io ; Ni, Ray ; 
Zeng, Star ; Kumar, Rahul R ; 
Dong, Guo ; Rhodes, Sean ; Lu, James 
; Guo, Gua ; Ard Biesheuvel 
; Yao, Jiewen ; Abdul Lateef 
Attar ; Abner Chang ; Tom 
Lendacky 
Subject: RE: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

> >
> > AMD version is not work for IA32X64 ovmf.
> >
> > I checked the detailed: CpuSaveState->x64 is always used for OVMF no
> matter IA32 or X64, while AMD is not, which is decided by the MSR
> EFER_ADDRESS LMA bit check.
>
> Hmm, probably because only PEI runs in 32-bit mode whereas DXE and SMM
> run in 64-bit mode, so 32-bit PEI has to prepare things for the 64-bit
> SMM.
>
> > There is a potential issue/open in OVMF why need use the X64
> > CpuSaveState for IA32. Before this open resolved, I still prefer to
> > keep use the ovmf specific lib instance.
>
> Yes, lets stick to the ovmf version for now, and maybe remove it later
> when fixing the ia32 ovmf builds.
>

Ok, no problem.




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Re: [edk2-devel] [PATCH v2 1/4] uefi-sct/SctPkg: TCG2 Protocol: correct definition of TPMT_HA struct

2024-04-24 Thread G Edhaya Chandran

Hi Stuart,
Thank you for the update. I understand the rationale.
It is also in-line with the independent protocol interface definition in 
edk2-test.
Will approve the patch.

Reviewed-by: G Edhaya Chandran 


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[edk2-devel] [PATCH 2/2] StandaloneMmPkg: Initialize 'WillReturn' variable

2024-04-24 Thread Zhiguang Liu

The local variable 'WillReturn' was being used without prior
initialization in some code paths.
This patch ensures that 'WillReturn' is properly initialized
to prevent undefined behavior.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Zhiguang Liu 
---
 StandaloneMmPkg/Core/Mmi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/StandaloneMmPkg/Core/Mmi.c b/StandaloneMmPkg/Core/Mmi.c
index e035245c87..fb205df490 100644
--- a/StandaloneMmPkg/Core/Mmi.c
+++ b/StandaloneMmPkg/Core/Mmi.c
@@ -174,6 +174,7 @@ MmiManage (
   EFI_STATUS   Status;
 
   mMmiManageCallingDepth++;
+  WillReturn   = FALSE;
   Status   = EFI_NOT_FOUND;
   ReturnStatus = Status;
   if (HandlerType == NULL) {
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH 1/2] MdeModulePkg/SMM: Initialize 'WillReturn' variable

2024-04-24 Thread Zhiguang Liu

The local variable 'WillReturn' was being used without prior
initialization in some code paths.
This patch ensures that 'WillReturn' is properly initialized
to prevent undefined behavior.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 

Signed-off-by: Zhiguang Liu 
---
 MdeModulePkg/Core/PiSmmCore/Smi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MdeModulePkg/Core/PiSmmCore/Smi.c 
b/MdeModulePkg/Core/PiSmmCore/Smi.c
index a84a1f48d3..6b56fa5f69 100644
--- a/MdeModulePkg/Core/PiSmmCore/Smi.c
+++ b/MdeModulePkg/Core/PiSmmCore/Smi.c
@@ -152,6 +152,7 @@ SmiManage (
 
   PERF_FUNCTION_BEGIN ();
   mSmiManageCallingDepth++;
+  WillReturn   = FALSE;
   Status   = EFI_NOT_FOUND;
   ReturnStatus = Status;
   if (HandlerType == NULL) {
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH v2 7/7] OvmfPkg: Remove QemuFwCfgLibMmio.inf

2024-04-24 Thread Chao Li

All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 51 ---
 1 file changed, 51 deletions(-)
 delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
deleted file mode 100644
index 8e191f2d22..00
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ /dev/null
@@ -1,51 +0,0 @@
-## @file
-#
-#  Stateful, implicitly initialized fw_cfg library.
-#
-#  Copyright (C) 2013 - 2014, Red Hat, Inc.
-#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
-#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
-  INF_VERSION= 0x00010005
-  BASE_NAME  = QemuFwCfgLib
-  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
-  MODULE_TYPE= BASE
-  VERSION_STRING = 1.0
-  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
-
-  CONSTRUCTOR= QemuFwCfgInitialize
-
-#
-# The following information is for reference only and not required by the build
-# tools.
-#
-#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
-#
-
-[Sources]
-  QemuFwCfgLibMmio.c
-  QemuFwCfgMmioDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  OvmfPkg/OvmfPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  HobLib
-  IoLib
-  UefiBootServicesTableLib
-
-[Protocols]
-  gFdtClientProtocolGuid## CONSUMES
-
-[Depex]
-  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v2 6/7] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf

2024-04-24 Thread Chao Li

Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc

Build-tested only (with "RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc 
b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v2 4/7] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf

2024-04-24 Thread Chao Li

Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf  | 52 +++
 1 file changed, 52 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
new file mode 100644
index 00..7a36b2ad93
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
@@ -0,0 +1,52 @@
+## @file
+#
+#  Stateful, implicitly initialized fw_cfg library.
+#
+#  Copyright (C) 2013 - 2014, Red Hat, Inc.
+#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = QemuFwCfgLib
+  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
+
+  CONSTRUCTOR= QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+  QemuFwCfgLibMmio.c
+  QemuFwCfgMmioDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  IoLib
+  PcdLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gFdtClientProtocolGuid## CONSUMES
+
+[Depex]
+  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v2 5/7] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf

2024-04-24 Thread Chao Li

Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f6f7835955..7e2ff33ad1 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v2 2/7] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

2024-04-24 Thread Chao Li

Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 176 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   1 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   |  51 +
 3 files changed, 218 insertions(+), 10 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index dc949c8e26..c7cf5719e2 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -8,11 +8,16 @@
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
+#include 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,6 +26,157 @@
 
 #include "QemuFwCfgLibMmioInternal.h"
 
+EFI_GUID  mFwCfgSelectorAddressGuid = FW_CONFIG_SELECTOR_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDataAddressGuid = FW_CONFIG_DATA_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDmaAddressGuid  = FW_CONFIG_DMA_ADDRESS_HOB_GUID;
+
+/**
+  Build firmware configure selector address HOB.
+
+  @param[in]   FwCfgSelectorAddress  Firmware configure selector address
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgSelectorHob (
+  IN UINT64  FwCfgSelectorAddress
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *),
+sizeof (UINT64)
+);
+}
+
+/**
+  Build firmware configure data address HOB.
+
+  @param[in]   FwCfgDataAddress  Firmware configure data address.
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgDataHob (
+  IN UINT64  FwCfgDataAddress
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *),
+sizeof (UINT64)
+);
+}
+
+/**
+  Build firmware configure DMA address HOB.
+
+  @param[in]   FwCfgDmaAddress  Firmware configure DMA address.
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgDmaHob (
+  IN UINT64  FwCfgDmaAddress
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *),
+sizeof (UINT64)
+);
+}
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgSelectorAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgSelectorAddress = mFwCfgSelectorAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgSelectorAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgSelectorAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgDataAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgDataAddress = mFwCfgDataAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgDataAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgDataAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgDmaAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgDmaAddress = mFwCfgDmaAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgDmaAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgDmaAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgDmaAddress;
+}
+
 /**
   Returns a boolean indicating if the firmware configuration interface
   is available or not.
@@ -37,7 +193,7 @@ QemuFwCfgIsAvailable (
   VOID
   )
 {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
 }
 
 /**
@@ -56,7 +212,7 @@ QemuFwCfgSelectItem (
   )
 {
   if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
   }
 }
 
@@ -86,30 +242,30 @@ MmioReadBytes (
 
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
   while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64

[edk2-devel] [PATCH v2 3/7] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

2024-04-24 Thread Chao Li

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Co-authored-by: Xianglai Li 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 175 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  48 +
 2 files changed, 223 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..200d91b0f4
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,175 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+UINTN  mFwCfgSelectorAddress;
+UINTN  mFwCfgDataAddress;
+UINTN  mFwCfgDmaAddress;
+
+//
+// These correspond to the implementation we detect at runtime.
+//
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+ FwCfgDataAddress = SwapBytes64 (Reg[0]);
+ FwCfgDataSize= 8;
+ FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+ FwCfgSelectorSize= 2;
+
+ //
+ // The following ASSERT()s express
+ //
+ //   Address + Size - 1 <= MAX_UINTN
+ //
+ // for both registers, that is, that the last byte in each MMIO range 
is
+ // expressible as a MAX_UINTN. The form below is mathematically
+ // equivalent, and it also prevents any unsigned overflow before the
+ // comparison.
+ //
+ ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+ ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
+
+
+ mFwCfgSelectorAddress = FwCfgSelectorAddress;
+ if (mFwCfgSelectorAddress) {
+   QemuBuildFwCfgSelectorHob (FwCfgSelectorAddress);
+ }
+
+ mFwCfgDataAddress = FwCfgDataAddress;
+ if (mFwCfgDataAddress) {
+   QemuBuildFwCfgDataHob (FwCfgDataAddress);
+ }
+
+ DEBUG ((
+   DEBUG_INFO,
+   "Found FwCfg @ 0x%Lx/0x%Lx\n",
+   FwCfgSelectorAddress,
+   FwCfgDataAddress
+   ));
+
+ if (SwapBytes64 (Reg[1]) >= 0x18) {
+   FwCfgDmaAddress = FwCfgDataAddress + 0x10;
+   FwCfgDmaSize= 0x08;
+
+   //
+   // See explanation above.
+   //
+   ASSERT (FwCfgDmaAddress <= MAX_UINTN - FwCfgDmaSize + 1);
+
+   DEBUG ((DEBUG_INFO, "Found FwCfg DMA @ 0x%Lx\n", FwCfgDmaAddress));
+} else {
+  FwCfgDmaAddress = 0;
+}
+
+if (QemuFwCfgIsAvailable ()) {
+  UINT32  Signature;
+
+  QemuFwCfgSelectItem (QemuFwCfgItemSignature);
+  Signature = QemuFwCfgRead32 ();
+  if (Signature == SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
+//
+// For DMA support, we require the DTB to advertise the register, 
and the
+// feature

[edk2-devel] [PATCH v2 1/7] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

2024-04-24 Thread Chao Li

Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 194 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   4 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 179 
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 153 ++
 4 files changed, 340 insertions(+), 190 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..dc949c8e26 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,10 +1,9 @@
 /** @file
 
-  Stateful and implicitly initialized fw_cfg library implementation.
-
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -20,63 +19,7 @@
 
 #include 
 
-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
-
-//
-// These correspond to the implementation we detect at runtime.
-//
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
 
 /**
   Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +40,6 @@ QemuFwCfgIsAvailable (
   return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
 }
 
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress = SwapBytes64 (Reg[0]);
-  FwCfgDataSize= 8;
-  FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
-  FwCfgSelectorSize= 2;
-
-  //
-  // The following ASSERT()s express
-  //
-  //   Address + Size - 1 <= MAX_UINTN
-  //
-  // for both registers, that is, that the last byte in each MMIO range is
-  // expressible as a MAX_UINTN. The form below is

[edk2-devel] [PATCH v2 0/7] Adjust the QemuFwCfgLibMmio and add PEI stage

2024-04-24 Thread Chao Li

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR: https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 

Chao Li (7):
  OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
  OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
  OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
  OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
  ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg: Remove QemuFwCfgLibMmio.inf

 ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 324 --
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 230 +
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 153 +
 ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |   6 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 175 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  48 +++
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
 9 files changed, 762 insertions(+), 180 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (80%)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

-- 
2.27.0



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Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Yao, Jiewen

Thank you very much for the help.

https://github.com/tianocore/edk2/pull/5595 merged.

> -Original Message-
> From: Michael Kubacki 
> Sent: Thursday, April 25, 2024 7:22 AM
> To: devel@edk2.groups.io; Yao, Jiewen ; Kinney, Michael
> D ; Sean Brogan 
> Cc: Gerd Hoffmann ; Ard Biesheuvel ;
> Oliver Steffen ; Ard Biesheuvel
> ; Srikanth Aithal 
> Subject: Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load 
> driver
> in confidential guests
> 
> That issue looks different in that CodeQL did not have a problem. You
> can use the same PR, just rebase with master.
> 
> It looks like that had an issue triggering pipelines from GitHub which
> might be fixed be rerunning after the push.
> 
> Thanks,
> Michael
> 
> On 4/24/2024 7:08 PM, Yao, Jiewen wrote:
> > Ah, thank you Mike.
> >
> > Should I close/re-open my PR?
> > Or should I keep waiting?
> >
> > Thank you
> > Yao, Jiewen
> >
> >> -Original Message-
> >> From: Kinney, Michael D 
> >> Sent: Thursday, April 25, 2024 7:01 AM
> >> To: Yao, Jiewen ; devel@edk2.groups.io; Sean Brogan
> >> ; Michael Kubacki
> >> 
> >> Cc: Gerd Hoffmann ; Ard Biesheuvel ;
> >> Oliver Steffen ; Ard Biesheuvel
> >> ; Srikanth Aithal ; Kinney,
> >> Michael D 
> >> Subject: RE: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> >> confidential guests
> >>
> >> Hi Jiewen,
> >>
> >> Michael Kubacki has been working on a CI issue and a change is being merged
> >> now.
> >>
> >> Mike
> >>
> >>> -Original Message-
> >>> From: Yao, Jiewen 
> >>> Sent: Wednesday, April 24, 2024 3:57 PM
> >>> To: devel@edk2.groups.io; Kinney, Michael D
> >>> ; Sean Brogan 
> >>> Cc: Gerd Hoffmann ; Ard Biesheuvel
> ;
> >>> Oliver Steffen ; Ard Biesheuvel
> >>> ; Srikanth Aithal 
> >>> Subject: RE: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> >>> confidential guests
> >>>
> >>> Hi Mike/Sean
> >>> Can someone look at the EDKII CI?
> >>>
> >>> My PR has been blocked for 9 hours -
> >>> https://github.com/tianocore/edk2/pull/5595.
> >>>
> >>> Thank you
> >>> Yao, Jiewen
> >>>
> >>>
>  -Original Message-
>  From: Ard Biesheuvel 
>  Sent: Thursday, April 25, 2024 1:05 AM
>  To: Yao, Jiewen 
>  Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver
> >>> Steffen
>  ; Ard Biesheuvel ;
> >>> Srikanth
>  Aithal 
>  Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
>  confidential guests
> 
>  On Wed, 24 Apr 2024 at 18:36, Yao, Jiewen 
> >>> wrote:
> >
> > Thanks Ard.
> >
> > I have submitted https://github.com/tianocore/edk2/pull/5595 3 hours
> >>> ago.
> > But it seems the CI stops working...
> >
> 
>  OK, I have dropped my PR.
> 
> 
> 
> >
> >
> >> -Original Message-
> >> From: Ard Biesheuvel 
> >> Sent: Thursday, April 25, 2024 12:27 AM
> >> To: Yao, Jiewen 
> >> Cc: Gerd Hoffmann ; devel@edk2.groups.io;
> >>> Oliver
>  Steffen
> >> ; Ard Biesheuvel ;
>  Srikanth
> >> Aithal 
> >> Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load
> >>> driver in
> >> confidential guests
> >>
> >> On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen 
> >>> wrote:
> >>>
> >>> Reviewed-by: Jiewen Yao 
> >>>
> >>
> >> Thanks, I've queued this up.
> >>
> >>
>  -Original Message-
>  From: Gerd Hoffmann 
>  Sent: Wednesday, April 24, 2024 2:00 PM
>  To: devel@edk2.groups.io
>  Cc: Oliver Steffen ; Gerd Hoffmann
>  ; Ard Biesheuvel
> >>> ; Yao,
> >> Jiewen
>  ; Srikanth Aithal 
>  Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load
> >>> driver in
> >> confidential
>  guests
> 
>  The VirtHstiDxe does not work in confidential guests.  There
> >>> also isn't
>  anything we can reasonably test, neither flash storage nor SMM
> >>> mode will
>  be used in that case.  So just skip driver load when running
> >>> in a
>  confidential guest.
> 
>  Cc: Ard Biesheuvel 
>  Cc: Jiewen Yao 
>  Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash
> >>> check")
>  Signed-off-by: Gerd Hoffmann 
>  Tested-by: Srikanth Aithal 
>  ---
>    OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
>    OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
>    2 files changed, 7 insertions(+)
> 
>  diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
>  b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
>  index 9514933011e8..b5c237288766 100644
>  --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
>  +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
>  @@ -49,6 +49,7 @@ [FeaturePcd]
>  gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> 
>    [Pcd]
>  +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
>

Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

2024-04-24 Thread Wu, Jiaxin

> 
> SmramInternal.c handles that.  It creates two regions, one is a page at
> the start of SMRAM where S3 state is stored (and marked as allocated),
> one is all the rest.
> 

Yes, the same logic is moved to the OvmfPkg/Library/PlatformInitLib/MemDetect.c:

//
// Create first SMRAM descriptor, which contains data structures used in S3 
resume.
// One page is enough for the data structure
//
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = 
PlatformInfoHob->LowMemory - TsegSize;
SmramHobDescriptorBlock->Descriptor[0].CpuStart  = 
PlatformInfoHob->LowMemory - TsegSize;
SmramHobDescriptorBlock->Descriptor[0].PhysicalSize  = EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[0].RegionState   = EFI_SMRAM_CLOSED | 
EFI_CACHEABLE | EFI_ALLOCATED;

//
// Create second SMRAM descriptor, which is free and will be used by SMM 
foundation.
//
SmramHobDescriptorBlock->Descriptor[1].PhysicalStart = 
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[1].CpuStart  = 
SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[1].PhysicalSize  = TsegSize - 
EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[1].RegionState   = EFI_SMRAM_CLOSED | 
EFI_CACHEABLE;


> So, if you need some smram to initialize SMM in PEI I'd suggest to
> either add a third region, or make the first region larger.
> 
> It's not clear to me why you put the logic upside down and introduce
> that HOB in the first place.
> 

Let me explain more why need this change:

1. The EFI_SMM_SMRAM_MEMORY_GUID HOB, as defined in the PI specification, is 
used to describe the SMRAM memory regions supported by the platform. This HOB 
should be produced during the memory detection phase to align with the PI spec.

2. In addition to the memory reserved for ACPI S3 resume, an increasing number 
of features require reserving SMRAM for specific purposes, such as 
SmmRelocation. Other advanced features in Intel platforms also necessitate 
this. The implementation of these features varies and is entirely dependent on 
the platform. This is why an increasing number of platforms are adopting the 
EFI_SMM_SMRAM_MEMORY_GUID HOB for SMRAM description.

3. It is crucial that the SMRAM information remains consistent when retrieved 
from the platform, whether through the SMM ACCESS PPI/Protocol or the 
EFI_SMM_SMRAM_MEMORY_GUID HOB. Inconsistencies can lead to unexpected issues, 
most commonly memory region conflicts.

4. The SMM ACCESS PPI/Protocol can be naturally implemented for general use. 
The common approach is to utilize the EFI_SMM_SMRAM_MEMORY_GUID HOB. For 
reference, see the existing implementation in the EDK2 repository at 
edk2/UefiPayloadPkg/SmmAccessDxe/SmmAccessDxe.inf and 
edk2-platforms/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf.
 

For the reasons mentioned, we are moving the SMRAM memory regions to HOBs and 
allowing SMM access to consume these HOBs.

I will add the above info into commit message.

> 
> Storing anything SMM related outside SMRAM makes me nervous.
> I'd strongly suggest to avoid that.
> 
> It might be that in this specific case it is not a problem.  But it
> needs very careful review of the implications (which I have not done)
> and you have to hope you don't miss a possible attack vector, such as
> someone modifying the HOB and the firmware then storing SMM data + code
> outside SMRAM.
> 

Understand, but here is the case we can record the info in non-smram since PI 
spec exposes that, there is no difference the info retrieved from PPI/ non-smm 
Protocol or the non-smram.

Thanks,
Jiaxin






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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

2024-04-24 Thread Chao Li


Hi Ard,

OK, let's go with HOBs and today I'm going to send the V2. :)


Thanks,
Chao
On 2024/4/25 00:23, Ard Biesheuvel wrote:

On Wed, 24 Apr 2024 at 13:19, Gerd Hoffmann  wrote:

On Wed, Apr 24, 2024 at 09:57:50AM +0800, Chao Li wrote:

Hi Gerd and Ard,

Can I submit the V2 this week? I want all OvmfPkg changes to be meged before
the 202405 feature freeze.

Yea, go ahead, lets stick to the PCD approach, given that Ard seems to
not have objections to that ;)


Apologies for my late response.

As I have mentioned before (I think?) I strongly prefer HOBs over
dynamic PCDs for values that are determined during PEI and not updated
later.

For other cases, I actually prefer protocols over PCDs because you can
depex on protocols, and not on PCDs so you never know if the dispatch
order is correct, i.e., whether PCD producers are dispatched before
PCD consumers.







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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

2024-04-24 Thread Chao Li


Gerd,

Ha, it seems that Ard have already given the answer... I will adjust 
according to Ard's suggestion and send the V2 today. :)



Thanks,
Chao
On 2024/4/24 19:19, Gerd Hoffmann wrote:

On Wed, Apr 24, 2024 at 09:57:50AM +0800, Chao Li wrote:

Hi Gerd and Ard,

Can I submit the V2 this week? I want all OvmfPkg changes to be meged before
the 202405 feature freeze.

Yea, go ahead, lets stick to the PCD approach, given that Ard seems to
not have objections to that ;)

take care,
   Gerd



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Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

2024-04-24 Thread Wu, Jiaxin

> 
> > Transfer to 16bit OS waking vector - 991F0 > hang here!!!
> 
> That is the last ovmf message of a successful S3 resume, after that the
> OS should have back control.  Looks fine to me.
> 

Great, got it.

Thanks,
Jiaxin



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Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

2024-04-24 Thread Wu, Jiaxin

> >
> > AMD version is not work for IA32X64 ovmf.
> >
> > I checked the detailed: CpuSaveState->x64 is always used for OVMF no
> matter IA32 or X64, while AMD is not, which is decided by the MSR
> EFER_ADDRESS LMA bit check.
> 
> Hmm, probably because only PEI runs in 32-bit mode whereas DXE and SMM
> run in 64-bit mode, so 32-bit PEI has to prepare things for the 64-bit
> SMM.
> 
> > There is a potential issue/open in OVMF why need use the X64
> > CpuSaveState for IA32. Before this open resolved, I still prefer to
> > keep use the ovmf specific lib instance.
> 
> Yes, lets stick to the ovmf version for now, and maybe remove it later
> when fixing the ia32 ovmf builds.
> 

Ok, no problem.




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Re: [edk2-devel] Synchronous Exception at ArmGicDxe

2024-04-24 Thread Andrew Fish via groups.io

The fault address is 0x0004AC14. Is that in the address range of the 
GIC for this platform? What does that Physical address map to you on the 
STM32MP25?

Thanks,

Andrew Fish

> On Apr 21, 2024, at 10:07 PM, Ba Gia Bao Phan  
> wrote:
> 
> Hi Everyone,
> 
> I'm working on a project with edk2, and these guys are trying to port edk2 to 
> STM32MP25 platforms. I had no issue compiling and booting the image on my 
> device. Then I've come across an issue at very early stages of booting. I was 
> given a Synchronous Exception listed briefly below. 
> 
> Synchronous Exception at 0x00010A63501C
> PC 0x00010A63501C (0x00010A633000+0x201C) [ 0] ArmGicDxe.dll
> PC 0x00010A6350CC (0x00010A633000+0x20CC) [ 0] ArmGicDxe.dll
> PC 0x00010A63657C (0x00010A633000+0x357C) [ 0] ArmGicDxe.dll
> PC 0x00010A85853C (0x00010A851000+0x753C) [ 1] DxeCore.dll
> PC 0x00010A8666DC (0x00010A851000+0x000156DC) [ 1] DxeCore.dll
> PC 0x00010A85BF14 (0x00010A851000+0xAF14) [ 1] DxeCore.dll
> PC 0x84006EBC
> PC 0x8400700C
> 
> [ 0] 
> /local/home/phanbagi/Documents/RPi3/Build/STM32MP25/DEBUG_GCC5/AARCH64/ArmPkg/Drivers/ArmGic/ArmGicDxe/DEBUG/ArmGicDxe.dll
> [ 1] 
> /local/home/phanbagi/Documents/RPi3/Build/STM32MP25/DEBUG_GCC5/AARCH64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll
> 
>   X0 0x0004AC14   X1 0x   X2 0x   X3 
> 0x4F46A76E3FDDA605
>   X4 0x083D1B53F41229AD   X5 0x003CF238   X6 0x0080   X7 
> 0x
>   X8 0x00010A850688   X9 0x0004  X10 0x000109E9F000  X11 
> 0x00010A297FFF
>  X12 0x  X13 0x000E  X14 0x00FF  X15 
> 0x0002
>  X16 0x00010AFFFAD0  X17 0x00395790  X18 0x  X19 
> 0x0004AC14
>  X20 0x00010A638000  X21 0x00010A638000  X22 0x00010A638000  X23 
> 0x00010A6380A8
>  X24 0x00010A876448  X25 0x00010A873026  X26 0x00010A877000  X27 
> 0x800E
>  X28 0x0001   FP 0x00010AFFFA50   LR 0x00010A6350CC  
> 
>   V0 0xAFAFAFAFAFAFAFAF AFAFAFAFAFAFAFAF   V1 0xFF80FFD0 
> 00010AFFFA30
>   V2 0x0007 0E001858   V3 0x1000 
> 0100
>   V4 0x    V5 0x 
> 
>   V6 0x    V7 0x 
> 
>   V8 0x    V9 0x 
> 
>  V10 0x   V11 0x 
> 
>  V12 0x   V13 0x 
> 
>  V14 0x   V15 0x 
> 
>  V16 0x6145998C70863CB0 9004002B4AC68640  V17 0x646586E820A5D596 
> AA30249EC11F1469
>  V18 0x5756252D20E5B421 336EEAEC2122B3AB  V19 0x6285C083AAECD063 
> 020A72C37700322A
>  V20 0x40846C68BA2085FB 20966526601C44BB  V21 0x818208204CD0A89D 
> 6D84E94813E14B24
>  V22 0x2362CBA9962AF073 E83ED49CD4A13F98  V23 0x0C1123CD73F5C5B0 
> C3E9222891467015
>  V24 0x02B1194895858177 1B028BE1A860D73B  V25 0x542AB00936183D90 
> 752F1D1CCC4D2345
>  V26 0x03D02013962356F3 0CCA6F83842045EA  V27 0x9DF9D2A28D44915E 
> 2892460B223FD84C
>  V28 0x61A2CC120A809CD8 AC33034803D74C10  V29 0x7A1089709810B030 
> 88B3298EEB68B450
>  V30 0xD20F81310E0896C0 20E2BA370E2AC6F9  V31 0x6C3BBEA030B2BB50 
> 2C2A91AAF201EF50
> 
>   SP 0x00010AFFFA50  ELR 0x00010A63501C  SPSR 0x43C5  FPSR 
> 0x
>  ESR 0x9605  FAR 0x0004AC14
> 
>  ESR : EC 0x25  IL 0x1  ISS 0x0005
> 
> Data abort: Translation fault, first level
> 
> 
> By using objdump to determine where the wrong source code is, I found out 
> that the program stopped around the code below.
> 
> UINT32
> EFIAPI
> MmioRead32 (
>   IN  UINTN  Address
>   )
> {
>   UINT32   Value;
>   BOOLEAN  Flag;
> 
>   ASSERT ((Address & 3) == 0);
> 
>   Flag = FilterBeforeMmIoRead (FilterWidth32, Address, );
>   if (Flag) {
> MemoryFence ();
> 
> if (IsTdxGuest ()) {
>   Value = TdMmioRead32 (Address);
> } else {
>   Value = *(volatile UINT32 *)Address;
> }
> 
> MemoryFence ();
>   }
> 
>   FilterAfterMmIoRead (FilterWidth32, Address, );
> 
>   return Value;
> }
> 
> Output of objdump:
> UINT32
> EFIAPI
> MmioRead32 (
>   IN  UINTN  Address
>   )
> {
> 1fec: a9be7bfd stp x29, x30, [sp, #-32]!
> 1ff0: 910003fd mov x29, sp
> 1ff4: f9000bf3 str x19, [sp, #16]
> 1ff8: aa0003f3 mov x19, x0
>   UINT32   Value;
>   BOOLEAN  Flag;
> 
>   ASSERT ((Address & 3) == 0);
> 1ffc: f240041f tst x0, #0x3
> 2000: 54e0 b.eq 201c   // b.none
> 2004: b002 adrp x2, 3000 
> 2008: b000 adrp x0, 3000 
> 200c: 913ac442 add x2, x2, #0xeb1
> 2010: 913b1000 add x0, x0, #0xec4
> 2014: d2804461 mov x1, #0x223 // #547
> 2018: 977a bl 1e00 
>

Re: 回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard

2024-04-24 Thread Giri Mudusuru via groups.io

Reviewed-By: Giri Mudusuru 

From: devel@edk2.groups.io  on behalf of gaoliming via 
groups.io 
Sent: Tuesday, April 23, 2024 6:15 AM
To: 'Nong, Foster' ; devel@edk2.groups.io 
; Kinney, Michael D ; 'Chris 
Li' 
Cc: Ni, Ray 
Subject: [EXTERNAL] 回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into 
IndustryStandard

[You don't often get email from gaoliming=byosoft.com...@groups.io. Learn why 
this is important at https://aka.ms/LearnAboutSenderIdentification ]

Seemly, there is no other comments. I create PR 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Fedk2%2Fpull%2F5585=05%7C02%7CGIRIMUDUSURU%40microsoft.com%7Cca57d35e58164465cebf08dc63977616%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C638494749393738266%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=o308QhikmXPwrSFQplHJvcEopdx0xj6LjONs1aB662Y%3D=0
 to merge it.

Thanks
Liming
> -邮件原件-
> 发件人: Nong, Foster 
> 发送时间: 2024年4月23日 18:07
> 收件人: gaoliming ; devel@edk2.groups.io;
> Kinney, Michael D ; 'Chris Li'
> 
> 抄送: Ni, Ray 
> 主题: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> IndustryStandard
>
> Hi Liming,
>
> What is the patch review status? Can this patch be merged?
>
> -Original Message-
> From: Nong, Foster
> Sent: Wednesday, December 27, 2023 2:05 PM
> To: gaoliming ; devel@edk2.groups.io; Kinney,
> Michael D ; 'Chris Li'
> 
> Cc: Ni, Ray 
> Subject: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> IndustryStandard
>
> Thanks Liming!
> @'Chris Li' and @Kinney, Michael D, please help comment the patch. Thanks!
>
> -Original Message-
> From: gaoliming 
> Sent: Tuesday, December 19, 2023 9:05 PM
> To: devel@edk2.groups.io; Nong, Foster ; Kinney,
> Michael D ; 'Chris Li'
> 
> Cc: Ni, Ray 
> Subject: 回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> IndustryStandard
>
> Foster:
>   I have no comments for this patch. Acked-by: Liming Gao
> 
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 Nong,
> Foster
> > 发送时间: 2023年12月19日 18:17
> > 收件人: devel@edk2.groups.io; Kinney, Michael D
> > ; Gao, Liming ;
> > Chris Li 
> > 抄送: Ni, Ray 
> > 主题: Re: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into
> > IndustryStandard
> >
> > @Gao, Liming @Chris Li @Kinney, Michael D,
> >
> > Don't forget reviewing the patch. Thanks!
> >
> > -Original Message-
> > From: Nong, Foster 
> > Sent: Wednesday, November 29, 2023 2:57 PM
> > To: devel@edk2.groups.io
> > Cc: Nong, Foster ; Kinney, Michael D
> > ; Gao, Liming ;
> > Ni, Ray ; Chris Li 
> > Subject: [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard
> >
> > REF: 
> > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D4516=05%7C02%7CGIRIMUDUSURU%40microsoft.com%7Cca57d35e58164465cebf08dc63977616%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C638494749393747133%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=BhMIlbuDbU6Dc1RhHt665Gg950WKeeBW8%2FpmksXqgIs%3D=0
> >
> > 1) Add CXL 3.0 header file to comply with CXL 3.0 specification
> > 2) CXL 3.0 header will embed Cxl20.h
> > 3) Updated Cxl.h to point to 3.0 header file
> >
> > Signed-off-by: Foster Nong 
> > Cc: Michael D Kinney 
> > Cc: Liming Gao 
> > Cc: Ray Ni 
> > Cc: Chris Li 
> > ---
> >  MdePkg/Include/IndustryStandard/Cxl.h   |   2 +-
> >  MdePkg/Include/IndustryStandard/Cxl30.h | 315
> 
> >  2 files changed, 316 insertions(+), 1 deletion(-)
> >
> > diff --git a/MdePkg/Include/IndustryStandard/Cxl.h
> > b/MdePkg/Include/IndustryStandard/Cxl.h
> > index 9ad3242e25..cb623a355d 100755
> > --- a/MdePkg/Include/IndustryStandard/Cxl.h
> > +++ b/MdePkg/Include/IndustryStandard/Cxl.h
> > @@ -12,7 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #ifndef
> > _CXL_MAIN_H_ #define _CXL_MAIN_H_ -#include
> > +#include  // //
> > CXL assigned new Vendor ID //diff --git
> > a/MdePkg/Include/IndustryStandard/Cxl30.h
> > b/MdePkg/Include/IndustryStandard/Cxl30.h
> > new file mode 100644
> > index 00..feb6b9c52f
> > --- /dev/null
> > +++ b/MdePkg/Include/IndustryStandard/Cxl30.h
> > @@ -0,0 +1,315 @@
> > +/** @file+  CXL 3.0 Register definitions++  This file contains the
> register
> > definitions based on the Compute Express Link+  (CXL) Specification
> Revision
> > 3.0.++  Copyright (c) 2023, Intel Corporation. All rights
> > reserved.++
> > SPDX-License-Identifier: BSD-2-Clause-Patent++**/+#ifndef
> > CXL30_H_+#define CXL30_H_++#include
> ++//+//
> > CXL Cache Memory Capability IDs+// Compute Express Link Specification
> > Revision 3.0 - Chapter 8.2.4 Table 8-22+//+#define
> > CXL_CACHE_MEM_CAPABILITY_ID_TIMEOUT_AND_ISOLATION
> > 0x0009+#define CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED
> > 0x000A+#define

Re: [edk2-devel] [PATCH] Changes to print PMIC info in Shell Smbiosview

2024-04-24 Thread Giri Mudusuru via groups.io

Reviewed-By: Giri Mudusuru 

From: devel@edk2.groups.io  on behalf of Shenbagadevi R 
via groups.io 
Sent: Tuesday, April 23, 2024 4:59 AM
To: devel@edk2.groups.io ; Shenbagadevi R 

Cc: gaolim...@byosoft.com.cn ; Sainadh Nagolu 
; Sundaresan S ; Srinivasan Mani 
; Ramesh R ; Karthika R 

Subject: [EXTERNAL] [edk2-devel] [PATCH] Changes to print PMIC info in 
Shell Smbiosview

[You don't often get email from shenbagadevir=ami@groups.io. Learn why this 
is important at https://aka.ms/LearnAboutSenderIdentification ]

Add changes to print PMIC and RCD details of Smbios Type17 in Shell
smbiosview command

Signed-off-by: Shenbagadevi R 
---
 .../UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c  | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
index 35369f0183..0fbaeb88ae 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
@@ -902,6 +902,13 @@ SmbiosPrintStructure (
 ShellPrintEx (-1, -1, L"Extended Speed: 0x%x\n", 
Struct->Type17->ExtendedSpeed);

 ShellPrintEx (-1, -1, L"Extended Configured Memory Speed: 0x%x\n", 
Struct->Type17->ExtendedConfiguredMemorySpeed);

   }

+

+  if (AE_SMBIOS_VERSION (0x3, 0x7) && (Struct->Hdr->Length > 0x5C)) {

+ShellPrintEx (-1, -1, L"PMIC0 Manufacturer ID: 0x%x\n", 
Struct->Type17->Pmic0ManufacturerID);

+ShellPrintEx (-1, -1, L"PMIC0 Revision Number: 0x%x\n", 
Struct->Type17->Pmic0RevisionNumber);

+ShellPrintEx (-1, -1, L"RCD Manufacturer ID: 0x%x\n", 
Struct->Type17->RcdManufacturerID);

+ShellPrintEx (-1, -1, L"RCD Revision Number: 0x%x\n", 
Struct->Type17->RcdRevisionNumber);

+  }



   break;



--
2.38.0.windows.1
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to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
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[edk2-devel] [PATCH 6/7] MdePkg: Consolidate revision macros

2024-04-24 Thread Sachin Ganesh via groups.io

Revision macros of PEI/DXE/MM specifications have been consolidated to a single 
PI macro

Cc: Felix Polyudov 
Cc: Dhanaraj V 
Cc: Liming Gao 
Signed-off-by: Sachin Ganesh 
---
 MdePkg/Include/Pi/PiDxeCis.h | 4 ++--
 MdePkg/Include/Pi/PiMmCis.h  | 6 +++---
 MdePkg/Include/Pi/PiMultiPhase.h | 6 ++
 MdePkg/Include/Pi/PiPeiCis.h | 4 ++--
 MdePkg/Include/Pi/PiSmmCis.h | 2 +-
 5 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/MdePkg/Include/Pi/PiDxeCis.h b/MdePkg/Include/Pi/PiDxeCis.h
index 04410c5a1a..226b6e20a4 100644
--- a/MdePkg/Include/Pi/PiDxeCis.h
+++ b/MdePkg/Include/Pi/PiDxeCis.h
@@ -691,8 +691,8 @@ EFI_STATUS
 // DXE Services Table

 //

 #define DXE_SERVICES_SIGNATURE0x565245535f455844ULL

-#define DXE_SPECIFICATION_MAJOR_REVISION  1

-#define DXE_SPECIFICATION_MINOR_REVISION  70

+#define DXE_SPECIFICATION_MAJOR_REVISION  PI_SPECIFICATION_MAJOR_REVISION

+#define DXE_SPECIFICATION_MINOR_REVISION  PI_SPECIFICATION_MINOR_REVISION

 #define DXE_SERVICES_REVISION 
((DXE_SPECIFICATION_MAJOR_REVISION<<16) | (DXE_SPECIFICATION_MINOR_REVISION))



 typedef struct {

diff --git a/MdePkg/Include/Pi/PiMmCis.h b/MdePkg/Include/Pi/PiMmCis.h
index 01340952d8..7a9f151e59 100644
--- a/MdePkg/Include/Pi/PiMmCis.h
+++ b/MdePkg/Include/Pi/PiMmCis.h
@@ -20,10 +20,10 @@ typedef struct _EFI_MM_SYSTEM_TABLE EFI_MM_SYSTEM_TABLE;
 ///

 #define MM_MMST_SIGNATURE  SIGNATURE_32 ('S', 'M', 'S', 'T')

 ///

-/// The Management Mode System Table (MMST) revision is 1.6

+/// The Management Mode System Table (MMST) revision

 ///

-#define MM_SPECIFICATION_MAJOR_REVISION  1

-#define MM_SPECIFICATION_MINOR_REVISION  60

+#define MM_SPECIFICATION_MAJOR_REVISION  PI_SPECIFICATION_MAJOR_REVISION

+#define MM_SPECIFICATION_MINOR_REVISION  PI_SPECIFICATION_MINOR_REVISION

 #define EFI_MM_SYSTEM_TABLE_REVISION 
((MM_SPECIFICATION_MAJOR_REVISION<<16) | (MM_SPECIFICATION_MINOR_REVISION))



 /**

diff --git a/MdePkg/Include/Pi/PiMultiPhase.h b/MdePkg/Include/Pi/PiMultiPhase.h
index a7e95820ef..681662b76c 100644
--- a/MdePkg/Include/Pi/PiMultiPhase.h
+++ b/MdePkg/Include/Pi/PiMultiPhase.h
@@ -20,6 +20,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 

 #include 



+//

+// PI Specification Revision information

+//

+#define PI_SPECIFICATION_MAJOR_REVISION  1

+#define PI_SPECIFICATION_MINOR_REVISION  70

+

 /**

   Produces an error code in the range reserved for use by the Platform 
Initialization

   Architecture Specification.

diff --git a/MdePkg/Include/Pi/PiPeiCis.h b/MdePkg/Include/Pi/PiPeiCis.h
index 69eec2c473..c65df9378e 100644
--- a/MdePkg/Include/Pi/PiPeiCis.h
+++ b/MdePkg/Include/Pi/PiPeiCis.h
@@ -846,8 +846,8 @@ EFI_STATUS
 //

 // PEI Specification Revision information

 //

-#define PEI_SPECIFICATION_MAJOR_REVISION  1

-#define PEI_SPECIFICATION_MINOR_REVISION  70

+#define PEI_SPECIFICATION_MAJOR_REVISION  PI_SPECIFICATION_MAJOR_REVISION

+#define PEI_SPECIFICATION_MINOR_REVISION  PI_SPECIFICATION_MINOR_REVISION

 ///

 /// Specification inconsistency here:

 /// In the PI1.0 spec, PEI_SERVICES_SIGNATURE is defined as 
0x5652455320494550. But

diff --git a/MdePkg/Include/Pi/PiSmmCis.h b/MdePkg/Include/Pi/PiSmmCis.h
index bf5b580c32..886b5e4a38 100644
--- a/MdePkg/Include/Pi/PiSmmCis.h
+++ b/MdePkg/Include/Pi/PiSmmCis.h
@@ -15,7 +15,7 @@


 typedef struct _EFI_SMM_SYSTEM_TABLE2 EFI_SMM_SYSTEM_TABLE2;

 //

-// Define new MM related definition introduced by PI 1.5.

+// MM related definitions

 //

 #define  SMM_SMST_SIGNATUREMM_MMST_SIGNATURE

 #define  SMM_SPECIFICATION_MAJOR_REVISION  MM_SPECIFICATION_MAJOR_REVISION

--
2.24.1.windows.2
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.


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[edk2-devel] [PATCH] OvmfPkg: Set PcdCpuMaxLogicalProcessorNumber in OvmfXen

2024-04-24 Thread Alejandro Vallejo via groups.io

Bump the compile-time constant for maximum processor count from 64 to 128
in order to allow that many vCPUs to be brought online on Xen guests with
the default OVMF configuration.

Cc: Anthony Perard 
Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Signed-off-by: Alejandro Vallejo 
---
 OvmfPkg/OvmfXen.dsc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc
index fa1a570e746a..44a9b0cbae68 100644
--- a/OvmfPkg/OvmfXen.dsc
+++ b/OvmfPkg/OvmfXen.dsc
@@ -503,6 +503,9 @@
   # Noexec settings for DXE.
   gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|FALSE
 
+  # UefiCpuPkg PCDs related to initial AP bringup and general AP management.
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|128
+
   # Set memory encryption mask
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
 
-- 
2.34.1



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[edk2-devel] Synchronous Exception at ArmGicDxe

2024-04-24 Thread Ba Gia Bao Phan

Hi Everyone,

I'm working on a project with edk2, and these guys are trying to port edk2
to STM32MP25 platforms. I had no issue compiling and booting the image on
my device. Then I've come across an issue at very early stages of booting.
I was given a Synchronous Exception listed briefly below.

Synchronous Exception at *0x00010A63501C*
PC 0x00010A63501C (0x00010A633000+0x201C) [ 0] ArmGicDxe.dll
PC 0x00010A6350CC (0x00010A633000+0x20CC) [ 0] ArmGicDxe.dll
PC 0x00010A63657C (0x00010A633000+0x357C) [ 0] ArmGicDxe.dll
PC 0x00010A85853C (0x00010A851000+0x753C) [ 1] DxeCore.dll
PC 0x00010A8666DC (0x00010A851000+0x000156DC) [ 1] DxeCore.dll
PC 0x00010A85BF14 (0x00010A851000+0xAF14) [ 1] DxeCore.dll
PC 0x84006EBC
PC 0x8400700C

[ 0]
/local/home/phanbagi/Documents/RPi3/Build/STM32MP25/DEBUG_GCC5/AARCH64/ArmPkg/Drivers/ArmGic/ArmGicDxe/DEBUG/ArmGicDxe.dll
[ 1]
/local/home/phanbagi/Documents/RPi3/Build/STM32MP25/DEBUG_GCC5/AARCH64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll

  X0 0x0004AC14   X1 0x   X2 0x
X3 0x4F46A76E3FDDA605
  X4 0x083D1B53F41229AD   X5 0x003CF238   X6 0x0080
X7 0x
  X8 0x00010A850688   X9 0x0004  X10 0x000109E9F000
 X11 0x00010A297FFF
 X12 0x  X13 0x000E  X14 0x00FF
 X15 0x0002
 X16 0x00010AFFFAD0  X17 0x00395790  X18 0x
 X19 0x0004AC14
 X20 0x00010A638000  X21 0x00010A638000  X22 0x00010A638000
 X23 0x00010A6380A8
 X24 0x00010A876448  X25 0x00010A873026  X26 0x00010A877000
 X27 0x800E
 X28 0x0001   FP 0x00010AFFFA50   LR 0x00010A6350CC

  V0 0xAFAFAFAFAFAFAFAF AFAFAFAFAFAFAFAF   V1 0xFF80FFD0
00010AFFFA30
  V2 0x0007 0E001858   V3 0x1000
0100
  V4 0x    V5 0x

  V6 0x    V7 0x

  V8 0x    V9 0x

 V10 0x   V11 0x

 V12 0x   V13 0x

 V14 0x   V15 0x

 V16 0x6145998C70863CB0 9004002B4AC68640  V17 0x646586E820A5D596
AA30249EC11F1469
 V18 0x5756252D20E5B421 336EEAEC2122B3AB  V19 0x6285C083AAECD063
020A72C37700322A
 V20 0x40846C68BA2085FB 20966526601C44BB  V21 0x818208204CD0A89D
6D84E94813E14B24
 V22 0x2362CBA9962AF073 E83ED49CD4A13F98  V23 0x0C1123CD73F5C5B0
C3E9222891467015
 V24 0x02B1194895858177 1B028BE1A860D73B  V25 0x542AB00936183D90
752F1D1CCC4D2345
 V26 0x03D02013962356F3 0CCA6F83842045EA  V27 0x9DF9D2A28D44915E
2892460B223FD84C
 V28 0x61A2CC120A809CD8 AC33034803D74C10  V29 0x7A1089709810B030
88B3298EEB68B450
 V30 0xD20F81310E0896C0 20E2BA370E2AC6F9  V31 0x6C3BBEA030B2BB50
2C2A91AAF201EF50

  SP 0x00010AFFFA50  ELR 0x00010A63501C  SPSR 0x43C5  FPSR
0x
 ESR 0x9605  FAR 0x0004AC14

 ESR : EC 0x25  IL 0x1  ISS 0x0005

Data abort: Translation fault, first level


By using objdump to determine where the wrong source code is, I found out
that the program stopped around the code below.

UINT32
EFIAPI
MmioRead32 (
  IN  UINTN  Address
  )
{
  UINT32   Value;
  BOOLEAN  Flag;

  ASSERT ((Address & 3) == 0);

  Flag = FilterBeforeMmIoRead (FilterWidth32, Address, );
  if (Flag) {
MemoryFence ();

if (IsTdxGuest ()) {
  Value = TdMmioRead32 (Address);
} else {
  Value = *(volatile UINT32 *)Address;
}

MemoryFence ();
  }

  FilterAfterMmIoRead (FilterWidth32, Address, );

  return Value;
}

Output of objdump:
UINT32
EFIAPI
MmioRead32 (
  IN  UINTN  Address
  )
{
1fec: a9be7bfd stp x29, x30, [sp, #-32]!
1ff0: 910003fd mov x29, sp
1ff4: f9000bf3 str x19, [sp, #16]
1ff8: aa0003f3 mov x19, x0
  UINT32   Value;
  BOOLEAN  Flag;

  ASSERT ((Address & 3) == 0);
1ffc: f240041f tst x0, #0x3
2000: 54e0 b.eq 201c   // b.none
2004: b002 adrp x2, 3000 
2008: b000 adrp x0, 3000 
200c: 913ac442 add x2, x2, #0xeb1
2010: 913b1000 add x0, x0, #0xec4
2014: d2804461 mov x1, #0x223 // #547
2018: 977a bl 1e00 

  Flag = FilterBeforeMmIoRead (FilterWidth32, Address, );
  if (Flag) {

*Value = *(volatile UINT32 *)Address;201c: b9400260 ldr w0, [x19]*
  }

  FilterAfterMmIoRead (FilterWidth32, Address, );

  return Value;
}

Thanks
-- 
PHAN Ba Gia Bao
Etudiant en 5A STI - INSA Centre Val de Loire


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Re: [edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add Type 45 entry to query table

2024-04-24 Thread Giri Mudusuru via groups.io

Reviewed-By: Giri Mudusuru 

From: devel@edk2.groups.io  on behalf of Ellie Lewis via 
groups.io 
Sent: Tuesday, April 23, 2024 3:51 AM
To: devel@edk2.groups.io 
Cc: Zhichao Gao 
Subject: [EXTERNAL] [edk2-devel] [PATCH v1 1/1] ShellPkg/SmbiosView: Add Type 
45 entry to query table

[You don't often get email from ellie.lewis=arm@groups.io. Learn why this 
is important at https://aka.ms/LearnAboutSenderIdentification ]

The type field value is currently undefined for type 45 SMBIOS tables
in smbiosview. An entry is added in the query table to display the
correct value for type 45 tables.
Bugzilla: 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D4733=05%7C02%7CGIRIMUDUSURU%40microsoft.com%7Cffd3eb0d33e4454bda3108dc63a5c7b7%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C638494810879613185%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=TKB1DcLEXngmx12y8vaLsPLZPkm9uL%2Be51Ui%2FI8rwrg%3D=0

Cc: Zhichao Gao 
Signed-off-by: Ellie Lewis 
---
 ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c | 5 +
 1 file changed, 5 insertions(+)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 36f8739d6c87..d786b14f3877 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -5,6 +5,7 @@
   Copyright (c) 2005 - 2024, Intel Corporation. All rights reserved.
   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP
   Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+  Copyright (c) 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent

 **/
@@ -3918,6 +3919,10 @@ TABLE_ITEM  StructureTypeInfoTable[] = {
 44,
 L" Processor Additional Information"
   },
+  {
+45,
+L" Firmware Inventory Information"
+  },
   {
 0x7E,
 L" Inactive"
--
2.25.1

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[edk2-devel] Event: TianoCore Bug Triage - APAC / NAMO - Wednesday, April 24, 2024 #cal-reminder

2024-04-24 Thread Group Notification

*Reminder: TianoCore Bug Triage - APAC / NAMO*

*When:*
Wednesday, April 24, 2024
5:30pm to 6:30pm
(UTC-07:00) America/Los Angeles

*Where:*
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTk1YzJhN2UtOGQwNi00NjY4LWEwMTktY2JiODRlYTY1NmY0%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%226e4ce4c4-1242-431b-9a51-92cd01a5df3c%22%7d

*Organizer:*
Liming Gao
gaolim...@byosoft.com.cn ( 
gaolim...@byosoft.com.cn?subject=Re:%20Event:%20TianoCore%20Bug%20Triage%20-%20APAC%20%2F%20NAMO
 )

View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=2159782 )

*Description:*

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao



Microsoft Teams meeting

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Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Michael Kubacki

That issue looks different in that CodeQL did not have a problem. You 
can use the same PR, just rebase with master.


It looks like that had an issue triggering pipelines from GitHub which 
might be fixed be rerunning after the push.


Thanks,
Michael

On 4/24/2024 7:08 PM, Yao, Jiewen wrote:

Ah, thank you Mike.

Should I close/re-open my PR?
Or should I keep waiting?

Thank you
Yao, Jiewen


-Original Message-
From: Kinney, Michael D 
Sent: Thursday, April 25, 2024 7:01 AM
To: Yao, Jiewen ; devel@edk2.groups.io; Sean Brogan
; Michael Kubacki

Cc: Gerd Hoffmann ; Ard Biesheuvel ;
Oliver Steffen ; Ard Biesheuvel
; Srikanth Aithal ; Kinney,
Michael D 
Subject: RE: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
confidential guests

Hi Jiewen,

Michael Kubacki has been working on a CI issue and a change is being merged
now.

Mike


-Original Message-
From: Yao, Jiewen 
Sent: Wednesday, April 24, 2024 3:57 PM
To: devel@edk2.groups.io; Kinney, Michael D
; Sean Brogan 
Cc: Gerd Hoffmann ; Ard Biesheuvel ;
Oliver Steffen ; Ard Biesheuvel
; Srikanth Aithal 
Subject: RE: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
confidential guests

Hi Mike/Sean
Can someone look at the EDKII CI?

My PR has been blocked for 9 hours -
https://github.com/tianocore/edk2/pull/5595.

Thank you
Yao, Jiewen



-Original Message-
From: Ard Biesheuvel 
Sent: Thursday, April 25, 2024 1:05 AM
To: Yao, Jiewen 
Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver

Steffen

; Ard Biesheuvel ;

Srikanth

Aithal 
Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
confidential guests

On Wed, 24 Apr 2024 at 18:36, Yao, Jiewen 

wrote:


Thanks Ard.

I have submitted https://github.com/tianocore/edk2/pull/5595 3 hours

ago.

But it seems the CI stops working...



OK, I have dropped my PR.







-Original Message-
From: Ard Biesheuvel 
Sent: Thursday, April 25, 2024 12:27 AM
To: Yao, Jiewen 
Cc: Gerd Hoffmann ; devel@edk2.groups.io;

Oliver

Steffen

; Ard Biesheuvel ;

Srikanth

Aithal 
Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load

driver in

confidential guests

On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen 

wrote:


Reviewed-by: Jiewen Yao 



Thanks, I've queued this up.



-Original Message-
From: Gerd Hoffmann 
Sent: Wednesday, April 24, 2024 2:00 PM
To: devel@edk2.groups.io
Cc: Oliver Steffen ; Gerd Hoffmann
; Ard Biesheuvel

; Yao,

Jiewen

; Srikanth Aithal 
Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load

driver in

confidential

guests

The VirtHstiDxe does not work in confidential guests.  There

also isn't

anything we can reasonably test, neither flash storage nor SMM

mode will

be used in that case.  So just skip driver load when running

in a

confidential guest.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash

check")

Signed-off-by: Gerd Hoffmann 
Tested-by: Srikanth Aithal 
---
  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
  2 files changed, 7 insertions(+)

diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
index 9514933011e8..b5c237288766 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
@@ -49,6 +49,7 @@ [FeaturePcd]
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire

  [Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase


gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase


diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
index b6e53a1219d1..efaff0d1f3cb 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
  #include 
  #include 
  #include 
+#include 
  #include 

  #include 
@@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
EFI_STATUS   Status;
EFI_EVENTEvent;

+  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
+DEBUG ((DEBUG_INFO, "%a: confidential guest\n",

__func__));

+return EFI_UNSUPPORTED;
+  }
+
DevId = VirtHstiGetHostBridgeDevId ();
switch (DevId) {
  case INTEL_82441_DEVICE_ID:
--
2.44.0










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Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Yao, Jiewen

Ah, thank you Mike.

Should I close/re-open my PR?
Or should I keep waiting?

Thank you
Yao, Jiewen

> -Original Message-
> From: Kinney, Michael D 
> Sent: Thursday, April 25, 2024 7:01 AM
> To: Yao, Jiewen ; devel@edk2.groups.io; Sean Brogan
> ; Michael Kubacki
> 
> Cc: Gerd Hoffmann ; Ard Biesheuvel ;
> Oliver Steffen ; Ard Biesheuvel
> ; Srikanth Aithal ; Kinney,
> Michael D 
> Subject: RE: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> confidential guests
> 
> Hi Jiewen,
> 
> Michael Kubacki has been working on a CI issue and a change is being merged
> now.
> 
> Mike
> 
> > -Original Message-
> > From: Yao, Jiewen 
> > Sent: Wednesday, April 24, 2024 3:57 PM
> > To: devel@edk2.groups.io; Kinney, Michael D
> > ; Sean Brogan 
> > Cc: Gerd Hoffmann ; Ard Biesheuvel ;
> > Oliver Steffen ; Ard Biesheuvel
> > ; Srikanth Aithal 
> > Subject: RE: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> > confidential guests
> >
> > Hi Mike/Sean
> > Can someone look at the EDKII CI?
> >
> > My PR has been blocked for 9 hours -
> > https://github.com/tianocore/edk2/pull/5595.
> >
> > Thank you
> > Yao, Jiewen
> >
> >
> > > -Original Message-
> > > From: Ard Biesheuvel 
> > > Sent: Thursday, April 25, 2024 1:05 AM
> > > To: Yao, Jiewen 
> > > Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver
> > Steffen
> > > ; Ard Biesheuvel ;
> > Srikanth
> > > Aithal 
> > > Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> > > confidential guests
> > >
> > > On Wed, 24 Apr 2024 at 18:36, Yao, Jiewen 
> > wrote:
> > > >
> > > > Thanks Ard.
> > > >
> > > > I have submitted https://github.com/tianocore/edk2/pull/5595 3 hours
> > ago.
> > > > But it seems the CI stops working...
> > > >
> > >
> > > OK, I have dropped my PR.
> > >
> > >
> > >
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: Ard Biesheuvel 
> > > > > Sent: Thursday, April 25, 2024 12:27 AM
> > > > > To: Yao, Jiewen 
> > > > > Cc: Gerd Hoffmann ; devel@edk2.groups.io;
> > Oliver
> > > Steffen
> > > > > ; Ard Biesheuvel ;
> > > Srikanth
> > > > > Aithal 
> > > > > Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load
> > driver in
> > > > > confidential guests
> > > > >
> > > > > On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen 
> > wrote:
> > > > > >
> > > > > > Reviewed-by: Jiewen Yao 
> > > > > >
> > > > >
> > > > > Thanks, I've queued this up.
> > > > >
> > > > >
> > > > > > > -Original Message-
> > > > > > > From: Gerd Hoffmann 
> > > > > > > Sent: Wednesday, April 24, 2024 2:00 PM
> > > > > > > To: devel@edk2.groups.io
> > > > > > > Cc: Oliver Steffen ; Gerd Hoffmann
> > > > > > > ; Ard Biesheuvel
> > ; Yao,
> > > > > Jiewen
> > > > > > > ; Srikanth Aithal 
> > > > > > > Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load
> > driver in
> > > > > confidential
> > > > > > > guests
> > > > > > >
> > > > > > > The VirtHstiDxe does not work in confidential guests.  There
> > also isn't
> > > > > > > anything we can reasonably test, neither flash storage nor SMM
> > mode will
> > > > > > > be used in that case.  So just skip driver load when running
> > in a
> > > > > > > confidential guest.
> > > > > > >
> > > > > > > Cc: Ard Biesheuvel 
> > > > > > > Cc: Jiewen Yao 
> > > > > > > Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash
> > check")
> > > > > > > Signed-off-by: Gerd Hoffmann 
> > > > > > > Tested-by: Srikanth Aithal 
> > > > > > > ---
> > > > > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
> > > > > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
> > > > > > >  2 files changed, 7 insertions(+)
> > > > > > >
> > > > > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > > index 9514933011e8..b5c237288766 100644
> > > > > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > > @@ -49,6 +49,7 @@ [FeaturePcd]
> > > > > > >gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> > > > > > >
> > > > > > >  [Pcd]
> > > > > > > +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
> > > > > > >gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
> > > > > > >
> > gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> > > > > > >
> > > > > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > > index b6e53a1219d1..efaff0d1f3cb 100644
> > > > > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > > @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > > > > > >  #include 
> > > > > > >  #include 
> > > > > > >  #include 
> > > > > > > +#include 
> > > > > > >  #include 
> > > > > > >
> > > > > > >  #include 
> > > > > > > @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
> > > > > > >EFI_STATUS   Status;
> > > > > > >EFI_EVENTEvent;
> > > > > > >
> > > > > >

Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Michael D Kinney

Hi Jiewen,

Michael Kubacki has been working on a CI issue and a change is being merged now.

Mike

> -Original Message-
> From: Yao, Jiewen 
> Sent: Wednesday, April 24, 2024 3:57 PM
> To: devel@edk2.groups.io; Kinney, Michael D
> ; Sean Brogan 
> Cc: Gerd Hoffmann ; Ard Biesheuvel ;
> Oliver Steffen ; Ard Biesheuvel
> ; Srikanth Aithal 
> Subject: RE: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> confidential guests
> 
> Hi Mike/Sean
> Can someone look at the EDKII CI?
> 
> My PR has been blocked for 9 hours -
> https://github.com/tianocore/edk2/pull/5595.
> 
> Thank you
> Yao, Jiewen
> 
> 
> > -Original Message-
> > From: Ard Biesheuvel 
> > Sent: Thursday, April 25, 2024 1:05 AM
> > To: Yao, Jiewen 
> > Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver
> Steffen
> > ; Ard Biesheuvel ;
> Srikanth
> > Aithal 
> > Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> > confidential guests
> >
> > On Wed, 24 Apr 2024 at 18:36, Yao, Jiewen 
> wrote:
> > >
> > > Thanks Ard.
> > >
> > > I have submitted https://github.com/tianocore/edk2/pull/5595 3 hours
> ago.
> > > But it seems the CI stops working...
> > >
> >
> > OK, I have dropped my PR.
> >
> >
> >
> > >
> > >
> > > > -Original Message-
> > > > From: Ard Biesheuvel 
> > > > Sent: Thursday, April 25, 2024 12:27 AM
> > > > To: Yao, Jiewen 
> > > > Cc: Gerd Hoffmann ; devel@edk2.groups.io;
> Oliver
> > Steffen
> > > > ; Ard Biesheuvel ;
> > Srikanth
> > > > Aithal 
> > > > Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load
> driver in
> > > > confidential guests
> > > >
> > > > On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen 
> wrote:
> > > > >
> > > > > Reviewed-by: Jiewen Yao 
> > > > >
> > > >
> > > > Thanks, I've queued this up.
> > > >
> > > >
> > > > > > -Original Message-
> > > > > > From: Gerd Hoffmann 
> > > > > > Sent: Wednesday, April 24, 2024 2:00 PM
> > > > > > To: devel@edk2.groups.io
> > > > > > Cc: Oliver Steffen ; Gerd Hoffmann
> > > > > > ; Ard Biesheuvel
> ; Yao,
> > > > Jiewen
> > > > > > ; Srikanth Aithal 
> > > > > > Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load
> driver in
> > > > confidential
> > > > > > guests
> > > > > >
> > > > > > The VirtHstiDxe does not work in confidential guests.  There
> also isn't
> > > > > > anything we can reasonably test, neither flash storage nor SMM
> mode will
> > > > > > be used in that case.  So just skip driver load when running
> in a
> > > > > > confidential guest.
> > > > > >
> > > > > > Cc: Ard Biesheuvel 
> > > > > > Cc: Jiewen Yao 
> > > > > > Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash
> check")
> > > > > > Signed-off-by: Gerd Hoffmann 
> > > > > > Tested-by: Srikanth Aithal 
> > > > > > ---
> > > > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
> > > > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
> > > > > >  2 files changed, 7 insertions(+)
> > > > > >
> > > > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > index 9514933011e8..b5c237288766 100644
> > > > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > > @@ -49,6 +49,7 @@ [FeaturePcd]
> > > > > >gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> > > > > >
> > > > > >  [Pcd]
> > > > > > +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
> > > > > >gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
> > > > > >
> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> > > > > >
> > > > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > index b6e53a1219d1..efaff0d1f3cb 100644
> > > > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > > @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > > > > >  #include 
> > > > > >  #include 
> > > > > >  #include 
> > > > > > +#include 
> > > > > >  #include 
> > > > > >
> > > > > >  #include 
> > > > > > @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
> > > > > >EFI_STATUS   Status;
> > > > > >EFI_EVENTEvent;
> > > > > >
> > > > > > +  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
> > > > > > +DEBUG ((DEBUG_INFO, "%a: confidential guest\n",
> __func__));
> > > > > > +return EFI_UNSUPPORTED;
> > > > > > +  }
> > > > > > +
> > > > > >DevId = VirtHstiGetHostBridgeDevId ();
> > > > > >switch (DevId) {
> > > > > >  case INTEL_82441_DEVICE_ID:
> > > > > > --
> > > > > > 2.44.0
> > > > >


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Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Yao, Jiewen

Hi Mike/Sean
Can someone look at the EDKII CI?

My PR has been blocked for 9 hours - 
https://github.com/tianocore/edk2/pull/5595.

Thank you
Yao, Jiewen


> -Original Message-
> From: Ard Biesheuvel 
> Sent: Thursday, April 25, 2024 1:05 AM
> To: Yao, Jiewen 
> Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver Steffen
> ; Ard Biesheuvel ; Srikanth
> Aithal 
> Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> confidential guests
> 
> On Wed, 24 Apr 2024 at 18:36, Yao, Jiewen  wrote:
> >
> > Thanks Ard.
> >
> > I have submitted https://github.com/tianocore/edk2/pull/5595 3 hours ago.
> > But it seems the CI stops working...
> >
> 
> OK, I have dropped my PR.
> 
> 
> 
> >
> >
> > > -Original Message-
> > > From: Ard Biesheuvel 
> > > Sent: Thursday, April 25, 2024 12:27 AM
> > > To: Yao, Jiewen 
> > > Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver
> Steffen
> > > ; Ard Biesheuvel ;
> Srikanth
> > > Aithal 
> > > Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> > > confidential guests
> > >
> > > On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen  wrote:
> > > >
> > > > Reviewed-by: Jiewen Yao 
> > > >
> > >
> > > Thanks, I've queued this up.
> > >
> > >
> > > > > -Original Message-
> > > > > From: Gerd Hoffmann 
> > > > > Sent: Wednesday, April 24, 2024 2:00 PM
> > > > > To: devel@edk2.groups.io
> > > > > Cc: Oliver Steffen ; Gerd Hoffmann
> > > > > ; Ard Biesheuvel ; Yao,
> > > Jiewen
> > > > > ; Srikanth Aithal 
> > > > > Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> > > confidential
> > > > > guests
> > > > >
> > > > > The VirtHstiDxe does not work in confidential guests.  There also 
> > > > > isn't
> > > > > anything we can reasonably test, neither flash storage nor SMM mode 
> > > > > will
> > > > > be used in that case.  So just skip driver load when running in a
> > > > > confidential guest.
> > > > >
> > > > > Cc: Ard Biesheuvel 
> > > > > Cc: Jiewen Yao 
> > > > > Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
> > > > > Signed-off-by: Gerd Hoffmann 
> > > > > Tested-by: Srikanth Aithal 
> > > > > ---
> > > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
> > > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
> > > > >  2 files changed, 7 insertions(+)
> > > > >
> > > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > index 9514933011e8..b5c237288766 100644
> > > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > > @@ -49,6 +49,7 @@ [FeaturePcd]
> > > > >gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> > > > >
> > > > >  [Pcd]
> > > > > +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
> > > > >gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
> > > > >gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> > > > >
> > > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > index b6e53a1219d1..efaff0d1f3cb 100644
> > > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > > @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > > > >  #include 
> > > > >  #include 
> > > > >  #include 
> > > > > +#include 
> > > > >  #include 
> > > > >
> > > > >  #include 
> > > > > @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
> > > > >EFI_STATUS   Status;
> > > > >EFI_EVENTEvent;
> > > > >
> > > > > +  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
> > > > > +DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
> > > > > +return EFI_UNSUPPORTED;
> > > > > +  }
> > > > > +
> > > > >DevId = VirtHstiGetHostBridgeDevId ();
> > > > >switch (DevId) {
> > > > >  case INTEL_82441_DEVICE_ID:
> > > > > --
> > > > > 2.44.0
> > > >


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Re: [edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1

2024-04-24 Thread Michael Kubacki


Added. These two PRs seem to be the only ones already impacted by this:

- https://github.com/tianocore/edk2/pull/5596
- https://github.com/tianocore/edk2/pull/5582

Rebasing after https://github.com/tianocore/edk2/pull/5597 is completed 
will resolve the CodeQL failures.


Thanks,
Michael

On 4/24/2024 6:11 PM, Michael D Kinney wrote:

Go ahead and add the push label.

Mike


-Original Message-
From: devel@edk2.groups.io  On Behalf Of Michael
Kubacki
Sent: Wednesday, April 24, 2024 2:55 PM
To: devel@edk2.groups.io
Cc: Feng, Bob C ; Liming Gao
; Rebecca Cran ; Sean
Brogan ; Chen, Christine

Subject: Re: [edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1

Thanks for reviews. I've updated the PR
(https://github.com/tianocore/edk2/pull/5597) to include them.

Although it has not been 24 hours, I suggest we merge the patch soon to
ensure CI is unblocked. Please feel free to add the push tag or let me
know if you'd like me to.

Thanks,
Michael

On 4/24/2024 1:37 PM, Michael Kubacki wrote:

From: Michael Kubacki 

Fixes current CI CodeQL failures due to old CodeQL CLI version.

Updates CodeQL to work with the latest queries. Includes functional
and security fixes within the CodeQL CLI binary.

For more information on release details see:

https://github.com/github/codeql-cli-binaries/releases

For changes between the previous version (2.14.5) and 2.16.1 see:

https://github.com/github/codeql-cli-

binaries/compare/v2.14.5...v2.16.1


Cc: Bob Feng 
Cc: Joey Vagedes 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Rebecca Cran 
Cc: Sean Brogan 
Cc: Yuwei Chen 
Signed-off-by: Michael Kubacki 
---

Notes:
  Tested in https://github.com/tianocore/edk2/pull/5597

   BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml | 6 +++---
   BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml   | 6 +++---
   BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml | 6 +++---
   3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml

b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml

index 37c7c9f595ca..5ec56c6bf06f 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
@@ -16,9 +16,9 @@
 "scope": "codeql-ext-dep",
 "type": "web",
 "name": "codeql_cli",
-  "source": "https://github.com/github/codeql-cli-

binaries/releases/download/v2.12.4/codeql.zip",

-  "version": "2.12.4",
-  "sha256":

"f682f1155d627ad97f10b1bcad97f682011986717bd3823e9cf831ed83ac96e7",

+  "source": "https://github.com/github/codeql-cli-

binaries/releases/download/v2.16.1/codeql.zip",

+  "version": "2.16.1",
+  "sha256":

"86a98f6ebb8fd49efadf367f3275c438669fcb8426962c33415129aad8e093e6",

 "compression_type": "zip",
 "internal_path": "/codeql/",
 "flags": ["set_shell_var", ],
diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml

b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml

index a6ca5d0f34cc..5b4a919f1de4 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
@@ -14,9 +14,9 @@
 "scope": "codeql-linux-ext-dep",
 "type": "web",
 "name": "codeql_linux_cli",
-  "source": "https://github.com/github/codeql-cli-

binaries/releases/download/v2.14.5/codeql-linux64.zip",

-  "version": "2.14.5",
-  "sha256":

"72aa5d748ff9ab57cfd86045560683bdc4897e0fe6d9f9a2786d9394674ae733",

+  "source": "https://github.com/github/codeql-cli-

binaries/releases/download/v2.16.1/codeql-linux64.zip",

+  "version": "2.16.1",
+  "sha256":

"40dbb6c0c4064bd14601a02e60c61661fdc0271469f90eb91a2e7d51d4cbc171",

 "compression_type": "zip",
 "internal_path": "/codeql/",
 "flags": ["set_shell_var", ],
diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml

b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml

index e706a7cabf9f..c0c018c9538f 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
@@ -14,9 +14,9 @@
 "scope": "codeql-windows-ext-dep",
 "type": "web",
 "name": "codeql_windows_cli",
-  "source": "https://github.com/github/codeql-cli-

binaries/releases/download/v2.14.5/codeql-win64.zip",

-  "version": "2.14.5",
-  "sha256":

"861fcb38365cc311efee0c3a28c77494e93c69a969885b72e53173ad473f61aa",

+  "source": "https://github.com/github/codeql-cli-

binaries/releases/download/v2.16.1/codeql-win64.zip",

+  "version": "2.16.1",
+  "sha256":

"9ebe5ea8a7d0a77425428d50d49912319117fccee24ecb62f6219c12584f4f28",

 "compression_type": "zip",
 "internal_path": "/codeql/",
 "flags": ["set_shell_var", ],















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Re: [edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1

2024-04-24 Thread Michael D Kinney

Go ahead and add the push label.

Mike

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Michael
> Kubacki
> Sent: Wednesday, April 24, 2024 2:55 PM
> To: devel@edk2.groups.io
> Cc: Feng, Bob C ; Liming Gao
> ; Rebecca Cran ; Sean
> Brogan ; Chen, Christine
> 
> Subject: Re: [edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1
> 
> Thanks for reviews. I've updated the PR
> (https://github.com/tianocore/edk2/pull/5597) to include them.
> 
> Although it has not been 24 hours, I suggest we merge the patch soon to
> ensure CI is unblocked. Please feel free to add the push tag or let me
> know if you'd like me to.
> 
> Thanks,
> Michael
> 
> On 4/24/2024 1:37 PM, Michael Kubacki wrote:
> > From: Michael Kubacki 
> >
> > Fixes current CI CodeQL failures due to old CodeQL CLI version.
> >
> > Updates CodeQL to work with the latest queries. Includes functional
> > and security fixes within the CodeQL CLI binary.
> >
> > For more information on release details see:
> >
> > https://github.com/github/codeql-cli-binaries/releases
> >
> > For changes between the previous version (2.14.5) and 2.16.1 see:
> >
> > https://github.com/github/codeql-cli-
> binaries/compare/v2.14.5...v2.16.1
> >
> > Cc: Bob Feng 
> > Cc: Joey Vagedes 
> > Cc: Liming Gao 
> > Cc: Michael D Kinney 
> > Cc: Rebecca Cran 
> > Cc: Sean Brogan 
> > Cc: Yuwei Chen 
> > Signed-off-by: Michael Kubacki 
> > ---
> >
> > Notes:
> >  Tested in https://github.com/tianocore/edk2/pull/5597
> >
> >   BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml | 6 +++---
> >   BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml   | 6 +++---
> >   BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml | 6 +++---
> >   3 files changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> > index 37c7c9f595ca..5ec56c6bf06f 100644
> > --- a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> > +++ b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> > @@ -16,9 +16,9 @@
> > "scope": "codeql-ext-dep",
> > "type": "web",
> > "name": "codeql_cli",
> > -  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.12.4/codeql.zip",
> > -  "version": "2.12.4",
> > -  "sha256":
> "f682f1155d627ad97f10b1bcad97f682011986717bd3823e9cf831ed83ac96e7",
> > +  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.16.1/codeql.zip",
> > +  "version": "2.16.1",
> > +  "sha256":
> "86a98f6ebb8fd49efadf367f3275c438669fcb8426962c33415129aad8e093e6",
> > "compression_type": "zip",
> > "internal_path": "/codeql/",
> > "flags": ["set_shell_var", ],
> > diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> > index a6ca5d0f34cc..5b4a919f1de4 100644
> > --- a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> > +++ b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> > @@ -14,9 +14,9 @@
> > "scope": "codeql-linux-ext-dep",
> > "type": "web",
> > "name": "codeql_linux_cli",
> > -  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.14.5/codeql-linux64.zip",
> > -  "version": "2.14.5",
> > -  "sha256":
> "72aa5d748ff9ab57cfd86045560683bdc4897e0fe6d9f9a2786d9394674ae733",
> > +  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.16.1/codeql-linux64.zip",
> > +  "version": "2.16.1",
> > +  "sha256":
> "40dbb6c0c4064bd14601a02e60c61661fdc0271469f90eb91a2e7d51d4cbc171",
> > "compression_type": "zip",
> > "internal_path": "/codeql/",
> > "flags": ["set_shell_var", ],
> > diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> > index e706a7cabf9f..c0c018c9538f 100644
> > --- a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> > +++ b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> > @@ -14,9 +14,9 @@
> > "scope": "codeql-windows-ext-dep",
> > "type": "web",
> > "name": "codeql_windows_cli",
> > -  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.14.5/codeql-win64.zip",
> > -  "version": "2.14.5",
> > -  "sha256":
> "861fcb38365cc311efee0c3a28c77494e93c69a969885b72e53173ad473f61aa",
> > +  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.16.1/codeql-win64.zip",
> > +  "version": "2.16.1",
> > +  "sha256":
> "9ebe5ea8a7d0a77425428d50d49912319117fccee24ecb62f6219c12584f4f28",
> > "compression_type": "zip",
> > "internal_path": "/codeql/",
> > "flags": ["set_shell_var", ],
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1

2024-04-24 Thread Michael Kubacki

Thanks for reviews. I've updated the PR 
(https://github.com/tianocore/edk2/pull/5597) to include them.


Although it has not been 24 hours, I suggest we merge the patch soon to 
ensure CI is unblocked. Please feel free to add the push tag or let me 
know if you'd like me to.


Thanks,
Michael

On 4/24/2024 1:37 PM, Michael Kubacki wrote:

From: Michael Kubacki 

Fixes current CI CodeQL failures due to old CodeQL CLI version.

Updates CodeQL to work with the latest queries. Includes functional
and security fixes within the CodeQL CLI binary.

For more information on release details see:

https://github.com/github/codeql-cli-binaries/releases

For changes between the previous version (2.14.5) and 2.16.1 see:

https://github.com/github/codeql-cli-binaries/compare/v2.14.5...v2.16.1

Cc: Bob Feng 
Cc: Joey Vagedes 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Rebecca Cran 
Cc: Sean Brogan 
Cc: Yuwei Chen 
Signed-off-by: Michael Kubacki 
---

Notes:
 Tested in https://github.com/tianocore/edk2/pull/5597

  BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml | 6 +++---
  BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml   | 6 +++---
  BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml | 6 +++---
  3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml 
b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
index 37c7c9f595ca..5ec56c6bf06f 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
@@ -16,9 +16,9 @@
"scope": "codeql-ext-dep",
"type": "web",
"name": "codeql_cli",
-  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.12.4/codeql.zip;,
-  "version": "2.12.4",
-  "sha256": "f682f1155d627ad97f10b1bcad97f682011986717bd3823e9cf831ed83ac96e7",
+  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql.zip;,
+  "version": "2.16.1",
+  "sha256": "86a98f6ebb8fd49efadf367f3275c438669fcb8426962c33415129aad8e093e6",
"compression_type": "zip",
"internal_path": "/codeql/",
"flags": ["set_shell_var", ],
diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml 
b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
index a6ca5d0f34cc..5b4a919f1de4 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
@@ -14,9 +14,9 @@
"scope": "codeql-linux-ext-dep",
"type": "web",
"name": "codeql_linux_cli",
-  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-linux64.zip;,
-  "version": "2.14.5",
-  "sha256": "72aa5d748ff9ab57cfd86045560683bdc4897e0fe6d9f9a2786d9394674ae733",
+  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql-linux64.zip;,
+  "version": "2.16.1",
+  "sha256": "40dbb6c0c4064bd14601a02e60c61661fdc0271469f90eb91a2e7d51d4cbc171",
"compression_type": "zip",
"internal_path": "/codeql/",
"flags": ["set_shell_var", ],
diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml 
b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
index e706a7cabf9f..c0c018c9538f 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
@@ -14,9 +14,9 @@
"scope": "codeql-windows-ext-dep",
"type": "web",
"name": "codeql_windows_cli",
-  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-win64.zip;,
-  "version": "2.14.5",
-  "sha256": "861fcb38365cc311efee0c3a28c77494e93c69a969885b72e53173ad473f61aa",
+  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql-win64.zip;,
+  "version": "2.16.1",
+  "sha256": "9ebe5ea8a7d0a77425428d50d49912319117fccee24ecb62f6219c12584f4f28",
"compression_type": "zip",
"internal_path": "/codeql/",
"flags": ["set_shell_var", ],



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Re: [edk2-devel] [PATCH edk2-non-osi 1/1] Qemu/Sbsa: update TF-A binaries for QEMU v9.0+

2024-04-24 Thread Marcin Juszkiewicz


W dniu 23.04.2024 o 12:36, Leif Lindholm via groups.io pisze:

QEMU v9 uses 1GHz frequency for generic timers as required for Arm v8.6+
cpu cores. TF-A was hardcoding 62.5MHz value which is used for older
designs. Now it will use value present in CNTFRQ_EL0 register (set by
QEMU).

Enable FEAT_ECV for QEMU v9.0+ to get access to CNTPOFF register.

Signed-off-by: Marcin Juszkiewicz

Reviewed-by: Leif Lindholm
Thanks!

Can you push the change yourself?


Thanks, pushed.


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Re: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc:add rdmsr_ex & wrmsr_ex functions to read/write cpu specific msrs

2024-04-24 Thread Jayaprakash, N

Hi Mike,

I have sent an updated patch v2 for review which uses the MP Services protocol 
API StarupThisAP() to read / write MSRs specific to CPU cores.
Please review and do the needful.

Regards,
JP

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Jayaprakash, N
Sent: Thursday, April 18, 2024 11:49 AM
To: Kinney, Michael D ; devel@edk2.groups.io
Cc: Rebecca Cran 
Subject: Re: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc:add rdmsr_ex & 
wrmsr_ex functions to read/write cpu specific msrs

Thanks Mike. I shall make necessary changes and submit the PR again for review.

Regards,
JP

-Original Message-
From: Kinney, Michael D 
Sent: Thursday, April 18, 2024 10:46 AM
To: Jayaprakash, N ; devel@edk2.groups.io
Cc: Rebecca Cran ; Kinney, Michael D 

Subject: RE: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc:add rdmsr_ex & 
wrmsr_ex functions to read/write cpu specific msrs

Please use MP Services Protocol APIs StartupAllAPs() or StarupThisAP() to 
read/write MSRs on other logical processors.

There and many examples of this in the UefiCpuPkg to programming MSRs on all 
the logical processors.

Mike

> -Original Message-
> From: Jayaprakash, N 
> Sent: Wednesday, April 17, 2024 8:16 PM
> To: Kinney, Michael D ; 
> devel@edk2.groups.io
> Cc: Rebecca Cran 
> Subject: RE: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc:add rdmsr_ex 
> & wrmsr_ex functions to read/write cpu specific msrs
> 
> In the validation and debug scenarios, engineers tend to read MSRs and 
> write to MSRs of different CPUs.
> So we are providing a simple mechanism through these APIs to enable 
> them to do these operations.
> 
> These APIs will be part of the edk2 module of the Python interpreter 
> and will be used during the validation and debug scenarios only.
> 
> This is not for switching the BSP for OS boot. This is only used 
> during the validation and debug use cases.
> 
> Regards,
> JP
> -Original Message-
> From: Kinney, Michael D 
> Sent: Thursday, April 18, 2024 12:08 AM
> To: Jayaprakash, N ; devel@edk2.groups.io
> Cc: Rebecca Cran ; Kinney, Michael D 
> 
> Subject: RE: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc:add rdmsr_ex 
> & wrmsr_ex functions to read/write cpu specific msrs
> 
> Hi JP,
> 
> Is there a reason switch BSP is being used.  That is not a common 
> operation and is typically used if the current BSP is not stable or 
> there is a good reason to switch the BSP for OS boot.
> 
> The MP Services can be used to execute a C function on APs to execute 
> MSR related instructions.
> 
> Mike
> 
> > -Original Message-
> > From: Jayaprakash, N 
> > Sent: Sunday, April 14, 2024 10:33 PM
> > To: devel@edk2.groups.io; Jayaprakash, N 
> > Cc: Rebecca Cran ; Kinney, Michael D 
> > 
> > Subject: RE: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc:add
> rdmsr_ex
> > & wrmsr_ex functions to read/write cpu specific msrs
> >
> > + Rebecca and Mike,
> >
> > Would you be able to review this PR?
> >
> > Regards,
> > JP
> >
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of 
> > Jayaprakash, N
> > Sent: Wednesday, April 10, 2024 11:49 AM
> > To: devel@edk2.groups.io
> > Cc: Jayaprakash, N ; Rebecca Cran 
> > ; Kinney, Michael D 
> > Subject: [edk2-devel] [edk2-libc Patch 1/1] edk2-libc:add rdmsr_ex & 
> > wrmsr_ex functions to read/write cpu specific msrs
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4746
> >
> > The rdmsr_ex and wrmsr_ex are extension APIs to the rdmsr and wrmsr 
> > APIs supported in edk2 module. These extension APIs makes it
> possible
> > to read / write MSRs from specific processors and fills an existing 
> > gap in this area.
> >
> > Cc: Rebecca Cran 
> > Cc: Michael D Kinney 
> > Cc: Jayaprakash N 
> > Signed-off-by: Jayaprakash N 
> > ---
> >  .../PyMod-3.6.8/Modules/edk2module.c  | 159
> > +-
> >  .../Python/Python-3.6.8/Python368.inf |   3 +
> >  2 files changed, 158 insertions(+), 4 deletions(-)
> >
> > diff --git a/AppPkg/Applications/Python/Python-3.6.8/PyMod-
> > 3.6.8/Modules/edk2module.c b/AppPkg/Applications/Python/Python-
> > 3.6.8/PyMod-3.6.8/Modules/edk2module.c
> > index d6af8da..f1b13a6 100644
> > --- a/AppPkg/Applications/Python/Python-3.6.8/PyMod-
> > 3.6.8/Modules/edk2module.c
> > +++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-
> > 3.6.8/Modules/edk2mo
> > +++ dule.c
> > @@ -3,7 +3,7 @@
> >  Derived from posixmodule.c in Python 2.7.2.
> >
> >  Copyright (c) 2015, Daryl McDaniel. All rights reserved.
> > -Copyright (c) 2011 - 2023, Intel Corporation. All rights
> > reserved.
> > +Copyright (c) 2011 - 2024, Intel Corporation. All rights 
> > + reserved.
> >  This program and the accompanying materials are licensed and
> made
> > available under
> >  the terms and conditions of the BSD License that accompanies
> this
> > distribution.
> >  The full text of the license may be found at @@ -22,16 +22,23
> @@
> > #include#include#include  
> >

[edk2-devel] [edk2-libc Patch v2 1/1] edk2-libc : add rdmsr_ex and wrmsr_ex to read/write msr from specific cpus

2024-04-24 Thread Jayaprakash, N

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4746

The rdmsr_ex and wrmsr_ex are extension APIs to the rdmsr and wrmsr APIs
supported in edk2 module. These extension APIs makes it possible to
read / write MSRs from specific processors. This fills an important gap in
reading / writing these registers from specific cpu cores using python
scripts from UEFI shell.

Cc: Rebecca Cran 
Cc: Michael D Kinney 
Cc: Jayaprakash N 
Signed-off-by: Jayaprakash N 
---
 .../PyMod-3.6.8/Modules/edk2module.c  | 258 +-
 .../Python/Python-3.6.8/Python368.inf |   3 +
 2 files changed, 252 insertions(+), 9 deletions(-)

diff --git 
a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c 
b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
index f688b51..13e5de5 100644
--- a/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
+++ b/AppPkg/Applications/Python/Python-3.6.8/PyMod-3.6.8/Modules/edk2module.c
@@ -3,7 +3,7 @@
 Derived from posixmodule.c in Python 2.7.2.
 
 Copyright (c) 2015, Daryl McDaniel. All rights reserved.
-Copyright (c) 2011 - 2023, Intel Corporation. All rights reserved.
+Copyright (c) 2011 - 2024, Intel Corporation. All rights reserved.
 This program and the accompanying materials are licensed and made 
available under
 the terms and conditions of the BSD License that accompanies this 
distribution.
 The full text of the license may be found at
@@ -22,16 +22,30 @@
 #include  
 #include  
 #include  
+#include// Needed for the definition of EFI_AP_PROCEDURE
 #include  
 #include  
 #include  
 #include  
+#include  
+#include  
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 PyTypeObject EfiGuidType;
+EFI_MP_SERVICES_PROTOCOL   *gpMpService = NULL;
+UINTN   gCurrentBSPProcessorNumber = 0;
+UINTN   gNumberOfProcessors = 0;
+UINTN   gNumberOfEnabledProcessors = 0;
+
+typedef struct {
+UINT32 msr;  // msr value
+UINT64 data; // data, to be filled by the AP function
+} AP_FUNCTION_MSR_ARGS;
+
+#define AP_FUNCTION_EXECUTION_TIMEOUT  500   // setting the max time out 
value to be 5 seconds
 
 extern void _swsmi( unsigned int smi_code_data, unsigned int rax_value, 
unsigned int rbx_value, unsigned int rcx_value, unsigned int rdx_value, 
unsigned int rsi_value, unsigned int rdi_value );
 // -- Support routines
@@ -169,6 +183,46 @@ PyDoc_STRVAR(edk2__doc__,
 /* dummy version. _PyVerify_fd() is already defined in fileobject.h */
 #define _PyVerify_fd_dup2(A, B) (1)
 
+/* MPServices Protocol wrapper function definitions */
+static EFI_STATUS
+MpServicesWhoAmI (
+  IN EFI_MP_SERVICES_PROTOCOL  *pMpService,
+  OUT UINTN*pProcessorNumber
+  )
+{
+  return pMpService->WhoAmI (pMpService, pProcessorNumber);
+}
+
+static EFI_STATUS
+MpServicesGetNumberOfProcessors (
+  IN EFI_MP_SERVICES_PROTOCOL  *pMpService,
+  OUT UINTN*pNumberOfProcessors,
+  OUT UINTN*pNumberOfEnabledProcessors
+
+  )
+{
+  return pMpService->GetNumberOfProcessors (pMpService,
+pNumberOfProcessors,
+pNumberOfEnabledProcessors);
+}
+
+// MSR read function to run on specific cpu core using MPServices Protocol
+VOID EFIAPI MSRReadToRunOnAP(IN VOID *context)
+{
+AP_FUNCTION_MSR_ARGS *args = (AP_FUNCTION_MSR_ARGS *)context;
+UINT32 msr = args->msr;
+args->data = AsmReadMsr64(msr);
+}
+
+// MSR write function to run on specific cpu core using MPServices Protocol
+VOID EFIAPI MSRWriteToRunOnAP(IN VOID *context)
+{
+AP_FUNCTION_MSR_ARGS *args = (AP_FUNCTION_MSR_ARGS *)context;
+UINT32 msr = args->msr;
+UINT64 data = args->data;
+AsmWriteMsr64(msr, data);
+}
+
 #ifndef UEFI_C_SOURCE
 /* Return a dictionary corresponding to the POSIX environment table */
 extern char **environ;
@@ -3864,6 +3918,91 @@ edk2_rdmsr(PyObject *self, PyObject *args)
   vedx = (UINT64)data >> 32;
   return Py_BuildValue("(II)", (unsigned long)veax, (unsigned long)vedx);
 }
+
+PyDoc_STRVAR(efi_rdmsr_ex__doc__,
+"rdmsr_ex(cpu, msr) -> (lower_32bits, higher_32bits)\n\
+\n\
+Read the given msr from the specific cpu and return the data as tuple,\n\
+provided the cpu number is less than the max number of processors on\n\
+this system, otherwise generates OSError/ValueError to indicate API failure.\n\
+\n\
+Parameters:\n\
+cpu - The cpu number in hex or int format\n\
+msr - The msr in hex or int format\n\
+\n\
+Return Value:\n\
+a tuple with lower and higher 32 bit values read from the msr\n\
+");
+
+static PyObject *
+edk2_rdmsr_ex(PyObject *self, PyObject *args)
+{
+unsigned int cpu, msr, veax, vedx;
+EFI_STATUS status = 0;
+UINT64   data = 0;
+BOOLEAN is_function_finished = FALSE;
+AP_FUNCTION_MSR_ARGS ap_function_args = {0};
+
+if (!PyArg_ParseTuple(args, "II", , ))
+

[edk2-devel] [edk2-libc Patch v2 0/1] add rdmsr_ex & wrmsr_ex functions to read/write msrs from specific cpu

2024-04-24 Thread Jayaprakash, N

This patch adds 2 new functions to read and write MSRs from specific CPUs.
rdmsr_ex and wrmsr_ex are the 2 new functions added into edk2module to provide
the read and write of CPU specific MSRs.

Jayaprakash N (1):
  edk2-libc : add rdmsr_ex and wrmsr_ex to read/write msr from specific
cpus

 .../PyMod-3.6.8/Modules/edk2module.c  | 258 +-
 .../Python/Python-3.6.8/Python368.inf |   3 +
 2 files changed, 252 insertions(+), 9 deletions(-)

-- 
2.44.0.windows.1



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Re: [edk2-devel] [PATCH edk2-non-osi 1/1] Maintainers.txt: add maintainers for SbsaQemu platform

2024-04-24 Thread Michael D Kinney

Reviewed-by: Michael D Kinney 

> -Original Message-
> From: Leif Lindholm 
> Sent: Tuesday, April 23, 2024 7:40 AM
> To: devel@edk2.groups.io
> Cc: Ard Biesheuvel ; Kinney, Michael D
> ; Marcin Juszkiewicz
> 
> Subject: [PATCH edk2-non-osi 1/1] Maintainers.txt: add maintainers for
> SbsaQemu platform
> 
> Signed-off-by: Leif Lindholm 
> ---
> 
> p.s. Mike, could you add write access for Marcin in this repo as well?
>  It was a pure oversight not to ask this at the same time as for
>  edk2-platforms.
> 
>  Maintainers.txt | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index eaf13fda6af0..2cdff26facaf 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -63,6 +63,11 @@ Platform/Intel/CometlakeSiliconBinPkg
>  M: Kathappan Esakkithevar 
>  M: Sai Chaganty 
> 
> +Platform/Qemu/SbsaQemu
> +M: Ard Biesheuvel  [ardbiesheuvel]
> +M: Leif Lindholm  [leiflindholm]
> +M: Marcin Juszkiewicz  [hrw]
> +
>  Silicon/AMD
>  M: Abner Chang 
>  M: Abdul Lateef Attar 
> --
> 2.30.2



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Re: [edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1

2024-04-24 Thread Michael D Kinney

Reviewed-by: Michael D Kinney 



> -Original Message-
> From: mikub...@linux.microsoft.com 
> Sent: Wednesday, April 24, 2024 10:37 AM
> To: devel@edk2.groups.io
> Cc: Feng, Bob C ; Joey Vagedes
> ; Liming Gao ; Kinney,
> Michael D ; Rebecca Cran
> ; Sean Brogan ; Chen,
> Christine 
> Subject: [PATCH v1 1/1] Update to CodeQL 2.16.1
> 
> From: Michael Kubacki 
> 
> Fixes current CI CodeQL failures due to old CodeQL CLI version.
> 
> Updates CodeQL to work with the latest queries. Includes functional
> and security fixes within the CodeQL CLI binary.
> 
> For more information on release details see:
> 
> https://github.com/github/codeql-cli-binaries/releases
> 
> For changes between the previous version (2.14.5) and 2.16.1 see:
> 
> https://github.com/github/codeql-cli-binaries/compare/v2.14.5...v2.16.1
> 
> Cc: Bob Feng 
> Cc: Joey Vagedes 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Cc: Rebecca Cran 
> Cc: Sean Brogan 
> Cc: Yuwei Chen 
> Signed-off-by: Michael Kubacki 
> ---
> 
> Notes:
> Tested in https://github.com/tianocore/edk2/pull/5597
> 
>  BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml | 6 +++---
>  BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml   | 6 +++---
>  BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml | 6 +++---
>  3 files changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> index 37c7c9f595ca..5ec56c6bf06f 100644
> --- a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> +++ b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> @@ -16,9 +16,9 @@
>"scope": "codeql-ext-dep",
>"type": "web",
>"name": "codeql_cli",
> -  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.12.4/codeql.zip",
> -  "version": "2.12.4",
> -  "sha256":
> "f682f1155d627ad97f10b1bcad97f682011986717bd3823e9cf831ed83ac96e7",
> +  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.16.1/codeql.zip",
> +  "version": "2.16.1",
> +  "sha256":
> "86a98f6ebb8fd49efadf367f3275c438669fcb8426962c33415129aad8e093e6",
>"compression_type": "zip",
>"internal_path": "/codeql/",
>"flags": ["set_shell_var", ],
> diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> index a6ca5d0f34cc..5b4a919f1de4 100644
> --- a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> +++ b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> @@ -14,9 +14,9 @@
>"scope": "codeql-linux-ext-dep",
>"type": "web",
>"name": "codeql_linux_cli",
> -  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.14.5/codeql-linux64.zip",
> -  "version": "2.14.5",
> -  "sha256":
> "72aa5d748ff9ab57cfd86045560683bdc4897e0fe6d9f9a2786d9394674ae733",
> +  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.16.1/codeql-linux64.zip",
> +  "version": "2.16.1",
> +  "sha256":
> "40dbb6c0c4064bd14601a02e60c61661fdc0271469f90eb91a2e7d51d4cbc171",
>"compression_type": "zip",
>"internal_path": "/codeql/",
>"flags": ["set_shell_var", ],
> diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> index e706a7cabf9f..c0c018c9538f 100644
> --- a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> +++ b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> @@ -14,9 +14,9 @@
>"scope": "codeql-windows-ext-dep",
>"type": "web",
>"name": "codeql_windows_cli",
> -  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.14.5/codeql-win64.zip",
> -  "version": "2.14.5",
> -  "sha256":
> "861fcb38365cc311efee0c3a28c77494e93c69a969885b72e53173ad473f61aa",
> +  "source": "https://github.com/github/codeql-cli-
> binaries/releases/download/v2.16.1/codeql-win64.zip",
> +  "version": "2.16.1",
> +  "sha256":
> "9ebe5ea8a7d0a77425428d50d49912319117fccee24ecb62f6219c12584f4f28",
>"compression_type": "zip",
>"internal_path": "/codeql/",
>"flags": ["set_shell_var", ],
> --
> 2.44.0.windows.1



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Re: [edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1

2024-04-24 Thread Joey Vagedes via groups.io

Reviewed-by: joey.vage...@gmail.com

On Wed, Apr 24, 2024 at 10:37 AM  wrote:

> From: Michael Kubacki 
>
> Fixes current CI CodeQL failures due to old CodeQL CLI version.
>
> Updates CodeQL to work with the latest queries. Includes functional
> and security fixes within the CodeQL CLI binary.
>
> For more information on release details see:
>
> https://github.com/github/codeql-cli-binaries/releases
>
> For changes between the previous version (2.14.5) and 2.16.1 see:
>
> https://github.com/github/codeql-cli-binaries/compare/v2.14.5...v2.16.1
>
> Cc: Bob Feng 
> Cc: Joey Vagedes 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Cc: Rebecca Cran 
> Cc: Sean Brogan 
> Cc: Yuwei Chen 
> Signed-off-by: Michael Kubacki 
> ---
>
> Notes:
> Tested in https://github.com/tianocore/edk2/pull/5597
>
>  BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml | 6 +++---
>  BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml   | 6 +++---
>  BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml | 6 +++---
>  3 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> index 37c7c9f595ca..5ec56c6bf06f 100644
> --- a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> +++ b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
> @@ -16,9 +16,9 @@
>"scope": "codeql-ext-dep",
>"type": "web",
>"name": "codeql_cli",
> -  "source": "
> https://github.com/github/codeql-cli-binaries/releases/download/v2.12.4/codeql.zip
> ",
> -  "version": "2.12.4",
> -  "sha256":
> "f682f1155d627ad97f10b1bcad97f682011986717bd3823e9cf831ed83ac96e7",
> +  "source": "
> https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql.zip
> ",
> +  "version": "2.16.1",
> +  "sha256":
> "86a98f6ebb8fd49efadf367f3275c438669fcb8426962c33415129aad8e093e6",
>"compression_type": "zip",
>"internal_path": "/codeql/",
>"flags": ["set_shell_var", ],
> diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> index a6ca5d0f34cc..5b4a919f1de4 100644
> --- a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> +++ b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
> @@ -14,9 +14,9 @@
>"scope": "codeql-linux-ext-dep",
>"type": "web",
>"name": "codeql_linux_cli",
> -  "source": "
> https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-linux64.zip
> ",
> -  "version": "2.14.5",
> -  "sha256":
> "72aa5d748ff9ab57cfd86045560683bdc4897e0fe6d9f9a2786d9394674ae733",
> +  "source": "
> https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql-linux64.zip
> ",
> +  "version": "2.16.1",
> +  "sha256":
> "40dbb6c0c4064bd14601a02e60c61661fdc0271469f90eb91a2e7d51d4cbc171",
>"compression_type": "zip",
>"internal_path": "/codeql/",
>"flags": ["set_shell_var", ],
> diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> index e706a7cabf9f..c0c018c9538f 100644
> --- a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> +++ b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
> @@ -14,9 +14,9 @@
>"scope": "codeql-windows-ext-dep",
>"type": "web",
>"name": "codeql_windows_cli",
> -  "source": "
> https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-win64.zip
> ",
> -  "version": "2.14.5",
> -  "sha256":
> "861fcb38365cc311efee0c3a28c77494e93c69a969885b72e53173ad473f61aa",
> +  "source": "
> https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql-win64.zip
> ",
> +  "version": "2.16.1",
> +  "sha256":
> "9ebe5ea8a7d0a77425428d50d49912319117fccee24ecb62f6219c12584f4f28",
>"compression_type": "zip",
>"internal_path": "/codeql/",
>"flags": ["set_shell_var", ],
> --
> 2.44.0.windows.1
>
>


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[edk2-devel] [PATCH v1 1/1] Update to CodeQL 2.16.1

2024-04-24 Thread Michael Kubacki

From: Michael Kubacki 

Fixes current CI CodeQL failures due to old CodeQL CLI version.

Updates CodeQL to work with the latest queries. Includes functional
and security fixes within the CodeQL CLI binary.

For more information on release details see:

https://github.com/github/codeql-cli-binaries/releases

For changes between the previous version (2.14.5) and 2.16.1 see:

https://github.com/github/codeql-cli-binaries/compare/v2.14.5...v2.16.1

Cc: Bob Feng 
Cc: Joey Vagedes 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Rebecca Cran 
Cc: Sean Brogan 
Cc: Yuwei Chen 
Signed-off-by: Michael Kubacki 
---

Notes:
Tested in https://github.com/tianocore/edk2/pull/5597

 BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml | 6 +++---
 BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml   | 6 +++---
 BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml | 6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml 
b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
index 37c7c9f595ca..5ec56c6bf06f 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
@@ -16,9 +16,9 @@
   "scope": "codeql-ext-dep",
   "type": "web",
   "name": "codeql_cli",
-  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.12.4/codeql.zip;,
-  "version": "2.12.4",
-  "sha256": "f682f1155d627ad97f10b1bcad97f682011986717bd3823e9cf831ed83ac96e7",
+  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql.zip;,
+  "version": "2.16.1",
+  "sha256": "86a98f6ebb8fd49efadf367f3275c438669fcb8426962c33415129aad8e093e6",
   "compression_type": "zip",
   "internal_path": "/codeql/",
   "flags": ["set_shell_var", ],
diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml 
b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
index a6ca5d0f34cc..5b4a919f1de4 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
@@ -14,9 +14,9 @@
   "scope": "codeql-linux-ext-dep",
   "type": "web",
   "name": "codeql_linux_cli",
-  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-linux64.zip;,
-  "version": "2.14.5",
-  "sha256": "72aa5d748ff9ab57cfd86045560683bdc4897e0fe6d9f9a2786d9394674ae733",
+  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql-linux64.zip;,
+  "version": "2.16.1",
+  "sha256": "40dbb6c0c4064bd14601a02e60c61661fdc0271469f90eb91a2e7d51d4cbc171",
   "compression_type": "zip",
   "internal_path": "/codeql/",
   "flags": ["set_shell_var", ],
diff --git a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml 
b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
index e706a7cabf9f..c0c018c9538f 100644
--- a/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
+++ b/BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
@@ -14,9 +14,9 @@
   "scope": "codeql-windows-ext-dep",
   "type": "web",
   "name": "codeql_windows_cli",
-  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-win64.zip;,
-  "version": "2.14.5",
-  "sha256": "861fcb38365cc311efee0c3a28c77494e93c69a969885b72e53173ad473f61aa",
+  "source": 
"https://github.com/github/codeql-cli-binaries/releases/download/v2.16.1/codeql-win64.zip;,
+  "version": "2.16.1",
+  "sha256": "9ebe5ea8a7d0a77425428d50d49912319117fccee24ecb62f6219c12584f4f28",
   "compression_type": "zip",
   "internal_path": "/codeql/",
   "flags": ["set_shell_var", ],
-- 
2.44.0.windows.1



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Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Ard Biesheuvel

On Wed, 24 Apr 2024 at 18:36, Yao, Jiewen  wrote:
>
> Thanks Ard.
>
> I have submitted https://github.com/tianocore/edk2/pull/5595 3 hours ago.
> But it seems the CI stops working...
>

OK, I have dropped my PR.



>
>
> > -Original Message-
> > From: Ard Biesheuvel 
> > Sent: Thursday, April 25, 2024 12:27 AM
> > To: Yao, Jiewen 
> > Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver Steffen
> > ; Ard Biesheuvel ; Srikanth
> > Aithal 
> > Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> > confidential guests
> >
> > On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen  wrote:
> > >
> > > Reviewed-by: Jiewen Yao 
> > >
> >
> > Thanks, I've queued this up.
> >
> >
> > > > -Original Message-
> > > > From: Gerd Hoffmann 
> > > > Sent: Wednesday, April 24, 2024 2:00 PM
> > > > To: devel@edk2.groups.io
> > > > Cc: Oliver Steffen ; Gerd Hoffmann
> > > > ; Ard Biesheuvel ; Yao,
> > Jiewen
> > > > ; Srikanth Aithal 
> > > > Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> > confidential
> > > > guests
> > > >
> > > > The VirtHstiDxe does not work in confidential guests.  There also isn't
> > > > anything we can reasonably test, neither flash storage nor SMM mode will
> > > > be used in that case.  So just skip driver load when running in a
> > > > confidential guest.
> > > >
> > > > Cc: Ard Biesheuvel 
> > > > Cc: Jiewen Yao 
> > > > Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
> > > > Signed-off-by: Gerd Hoffmann 
> > > > Tested-by: Srikanth Aithal 
> > > > ---
> > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
> > > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
> > > >  2 files changed, 7 insertions(+)
> > > >
> > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > index 9514933011e8..b5c237288766 100644
> > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > > @@ -49,6 +49,7 @@ [FeaturePcd]
> > > >gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> > > >
> > > >  [Pcd]
> > > > +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
> > > >gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
> > > >gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> > > >
> > > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > index b6e53a1219d1..efaff0d1f3cb 100644
> > > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > > @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > > >  #include 
> > > >  #include 
> > > >  #include 
> > > > +#include 
> > > >  #include 
> > > >
> > > >  #include 
> > > > @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
> > > >EFI_STATUS   Status;
> > > >EFI_EVENTEvent;
> > > >
> > > > +  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
> > > > +DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
> > > > +return EFI_UNSUPPORTED;
> > > > +  }
> > > > +
> > > >DevId = VirtHstiGetHostBridgeDevId ();
> > > >switch (DevId) {
> > > >  case INTEL_82441_DEVICE_ID:
> > > > --
> > > > 2.44.0
> > >


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[edk2-devel] Are there any plans for something like EdkStandardLib?

2024-04-24 Thread Marcin Juszkiewicz

The more I dig in EDK2 during SbsaQemu work, the more I see duplicated 
code.


Want to scan PCI bus to check for host bridges? Two or three 
implementations exist. Want to calculate checksum of just created ACPI 
table? AcpiPlatformChecksum() has several, incompatible with each other, 
implementations waiting for you.


Are there any plans for making some kind of standard library?

Moving AmlLib outside of DynamicTables framework? Second uses first one 
but first one can be used without second.


Some kind of ACPI table generators from DynamicTables but without using 
ConfigurationManager?



Anyone?


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Re: [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

2024-04-24 Thread Lendacky, Thomas via groups.io


On 4/24/24 09:45, Gerd Hoffmann wrote:

   Hi,


Ideally CpuPageTableLib should be used for this.


CpuPageTableLib will need to be modified in order for it to be used at this
(Sec) stage. In order to work in Sec - either the caller will have to supply
a list of pages that can be used if pagetable entries need to be allocated
for splits


I don't think so.  PageTableMap() has the 'Buffer' parameter for passing
in page table memory.  And the patch reserves a page in MEMFD.  Handing
that page over to PageTableMap() should work just fine, no?


Oh, I thought the library allocated the pages, my bad. Mike and I will 
take a look at that.


Thanks,
Tom



take care,
   Gerd




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Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Yao, Jiewen

Thanks Ard.

I have submitted https://github.com/tianocore/edk2/pull/5595 3 hours ago.
But it seems the CI stops working...



> -Original Message-
> From: Ard Biesheuvel 
> Sent: Thursday, April 25, 2024 12:27 AM
> To: Yao, Jiewen 
> Cc: Gerd Hoffmann ; devel@edk2.groups.io; Oliver Steffen
> ; Ard Biesheuvel ; Srikanth
> Aithal 
> Subject: Re: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> confidential guests
> 
> On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen  wrote:
> >
> > Reviewed-by: Jiewen Yao 
> >
> 
> Thanks, I've queued this up.
> 
> 
> > > -Original Message-
> > > From: Gerd Hoffmann 
> > > Sent: Wednesday, April 24, 2024 2:00 PM
> > > To: devel@edk2.groups.io
> > > Cc: Oliver Steffen ; Gerd Hoffmann
> > > ; Ard Biesheuvel ; Yao,
> Jiewen
> > > ; Srikanth Aithal 
> > > Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in
> confidential
> > > guests
> > >
> > > The VirtHstiDxe does not work in confidential guests.  There also isn't
> > > anything we can reasonably test, neither flash storage nor SMM mode will
> > > be used in that case.  So just skip driver load when running in a
> > > confidential guest.
> > >
> > > Cc: Ard Biesheuvel 
> > > Cc: Jiewen Yao 
> > > Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
> > > Signed-off-by: Gerd Hoffmann 
> > > Tested-by: Srikanth Aithal 
> > > ---
> > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
> > >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
> > >  2 files changed, 7 insertions(+)
> > >
> > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > index 9514933011e8..b5c237288766 100644
> > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > > @@ -49,6 +49,7 @@ [FeaturePcd]
> > >gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> > >
> > >  [Pcd]
> > > +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
> > >gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
> > >gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> > >
> > > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > index b6e53a1219d1..efaff0d1f3cb 100644
> > > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > > @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > >  #include 
> > >  #include 
> > >  #include 
> > > +#include 
> > >  #include 
> > >
> > >  #include 
> > > @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
> > >EFI_STATUS   Status;
> > >EFI_EVENTEvent;
> > >
> > > +  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
> > > +DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
> > > +return EFI_UNSUPPORTED;
> > > +  }
> > > +
> > >DevId = VirtHstiGetHostBridgeDevId ();
> > >switch (DevId) {
> > >  case INTEL_82441_DEVICE_ID:
> > > --
> > > 2.44.0
> >


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Re: [edk2-devel] [PATCH v2] OvmfPkg: Harden #VC instruction emulation somewhat (CVE-2024-25742)

2024-04-24 Thread Ard Biesheuvel

On Tue, 23 Apr 2024 at 11:28, Gerd Hoffmann  wrote:
>
> On Fri, Apr 19, 2024 at 11:21:46AM -0700, Adam Dunlap wrote:
> > Ensure that when a #VC exception happens, the instruction at the
> > instruction pointer matches the instruction that is expected given the
> > error code. This is to mitigate the ahoi WeSee attack [1] that could
> > allow hypervisors to breach integrity and confidentiality of the
> > firmware by maliciously injecting interrupts. This change is a
> > translated version of a linux patch e3ef461af35a ("x86/sev: Harden #VC
> > instruction emulation somewhat")
> >
> > [1] https://ahoi-attacks.github.io/wesee/
> >
> > Cc: Borislav Petkov (AMD) 
> > Cc: Tom Lendacky 
> > Signed-off-by: Adam Dunlap 
>
> Reviewed-by: Gerd Hoffmann 
>

Thanks all, I've merged this now.


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Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Ard Biesheuvel

On Wed, 24 Apr 2024 at 08:45, Yao, Jiewen  wrote:
>
> Reviewed-by: Jiewen Yao 
>

Thanks, I've queued this up.


> > -Original Message-
> > From: Gerd Hoffmann 
> > Sent: Wednesday, April 24, 2024 2:00 PM
> > To: devel@edk2.groups.io
> > Cc: Oliver Steffen ; Gerd Hoffmann
> > ; Ard Biesheuvel ; Yao, Jiewen
> > ; Srikanth Aithal 
> > Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in 
> > confidential
> > guests
> >
> > The VirtHstiDxe does not work in confidential guests.  There also isn't
> > anything we can reasonably test, neither flash storage nor SMM mode will
> > be used in that case.  So just skip driver load when running in a
> > confidential guest.
> >
> > Cc: Ard Biesheuvel 
> > Cc: Jiewen Yao 
> > Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
> > Signed-off-by: Gerd Hoffmann 
> > Tested-by: Srikanth Aithal 
> > ---
> >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
> >  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
> >  2 files changed, 7 insertions(+)
> >
> > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > index 9514933011e8..b5c237288766 100644
> > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> > @@ -49,6 +49,7 @@ [FeaturePcd]
> >gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> >
> >  [Pcd]
> > +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
> >gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
> >gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> >
> > diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > index b6e53a1219d1..efaff0d1f3cb 100644
> > --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> > @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >
> >  #include 
> > @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
> >EFI_STATUS   Status;
> >EFI_EVENTEvent;
> >
> > +  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
> > +DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
> > +return EFI_UNSUPPORTED;
> > +  }
> > +
> >DevId = VirtHstiGetHostBridgeDevId ();
> >switch (DevId) {
> >  case INTEL_82441_DEVICE_ID:
> > --
> > 2.44.0
>


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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

2024-04-24 Thread Ard Biesheuvel

On Wed, 24 Apr 2024 at 13:19, Gerd Hoffmann  wrote:
>
> On Wed, Apr 24, 2024 at 09:57:50AM +0800, Chao Li wrote:
> > Hi Gerd and Ard,
> >
> > Can I submit the V2 this week? I want all OvmfPkg changes to be meged before
> > the 202405 feature freeze.
>
> Yea, go ahead, lets stick to the PCD approach, given that Ard seems to
> not have objections to that ;)
>

Apologies for my late response.

As I have mentioned before (I think?) I strongly prefer HOBs over
dynamic PCDs for values that are determined during PEI and not updated
later.

For other cases, I actually prefer protocols over PCDs because you can
depex on protocols, and not on PCDs so you never know if the dispatch
order is correct, i.e., whether PCD producers are dispatched before
PCD consumers.

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Re: [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

2024-04-24 Thread Gerd Hoffmann

  Hi,

> > That is incompatible with 5-level paging.  The current reset vector will
> > never turn on 5-level paging in case SEV is active because we have more
> > incompatibilities elsewhere (BaseMemEncryptSevLib IIRC).  But still,
> > it's moving things into the wrong direction ...
> 
> Tom had mentioned this eventuality and we discussed it to an extent. AIUI
> once we make that switch then most of this function could be replaced with
> a call into the library to handle the splitting, and similar re-work would
> need to be done for handling splitting the area for the GHCB page which is
> also currently done with direct page table manipulation. So while it
> does sort of move in the wrong direction, I don't think it would
> significantly complicate things as far as making that transition.

GHCB page is handled with asm code in the reset vector and I'm not
sure it can be moved out there as the page will be needed quite early
in firmware boot.

> > Ideally CpuPageTableLib should be used for this.
> 
> What's the outlook for moving CpuPageTableLib before the next OVMF release?
> My concern is that once SNP KVM support goes upstream (which is currently
> looking to be within kernel 6.10 timeframe), SNP guest support in OVMF will
> be completely broken without a fix like this for APIC MMIO accesses.

Fixing this surely should be done before the may stable tag.  If
CpuPageTableLib changes are needed, then going the CpuPageTableLib
route is a bit risky indeed.

I don't think we need CpuPageTableLib changes though.  At least not for
the reason (page table memory allocation) mentioned by Tom.  The patch
reserves a page in MEMFD, and simply giving that page to CpuPageTableLib
should work just fine.

> One thing to maybe get ahead of is the fact that splitting pages with
> 5-level paging will require having 2 pages reserved for GHCB instead of
> the 1 we have currently, and 2 pages reserved for APIC range instead of
> the 1 proposed by this patch (since we'd need to not only split a 2MB PTE
> to 4KB, but the upper 1GB PTE to 2MB).

The first GB is covered by 2M pages even with 5-level paging, exactly to
simplify the GHCB setup.

For APIC + 5-level paging we'll indeed need a second page table page.

> Do we know enough about what that sort of allocation/reserve logic would
> look to start modifying PcdOvmfSecPageTablesBase,
> PcdOvmfSecGhcbPageTableBase, and PcdOvmfSecApicPageTableBase to start
> preping for such a change?

Well, CpuPageTableLib simply expects getting a buffer passed in with
page table memory.  So allocation is fully in the hands of the caller.
It's also possible to call the library without buffer and get back the
number of pages which will be needed to apply the changes, so the caller
can allocate exactly what will be needed.  That would not be needed here
given we need a big enough pool of pages in MEMFD anyway.

take care,
  Gerd



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Re: [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

2024-04-24 Thread Roth, Michael via groups.io

On Wed, Apr 24, 2024 at 01:54:01PM +0200, Gerd Hoffmann wrote:
> On Tue, Apr 23, 2024 at 03:59:58PM -0500, Michael Roth wrote:
> > For the most part, OVMF will clear the encryption bit for MMIO regions,
> > but there is currently one known exception during SEC when the APIC
> > base address is accessed via MMIO with the encryption bit set for
> > SEV-ES/SEV-SNP guests.
> 
> what exactly accesses the lapic that early?

This looks to be for InitializeDebugAgent() to set up a timer to handle the
debug console.

> 
> > +/**
> > +  Map known MMIO regions unencrypted if SEV-ES is active.
> > +
> > +  During early booting, page table entries default to having the 
> > encryption bit
> > +  set for SEV-ES/SEV-SNP guests. In cases where there is MMIO to an 
> > address, the
> > +  encryption bit should be cleared. Clear it here for any known MMIO 
> > accesses
> > +  during SEC, which is currently just the APIC base address.
> > +
> > +**/
> > +VOID
> > +SecMapApicBaseUnencrypted (
> > +  VOID
> > +  )
> > +{
> > +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level4Entry;
> > +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level3Entry;
> > +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level2Entry;
> > +  PAGE_TABLE_4K_ENTRY *Level1Entry;
> > +  SEC_SEV_ES_WORK_AREA*SevEsWorkArea;
> > +  PHYSICAL_ADDRESSCr3;
> > +  UINT64  ApicAddress;
> > +  UINT64  PgTableMask;
> > +  UINT32  Level1Page;
> > +  UINT64  Level1Address;
> > +  UINT64  Level1Flags;
> > +  UINTN   PteIndex;
> > +
> > +  if (!SevEsIsEnabled ()) {
> > +return;
> > +  }
> 
> That is incompatible with 5-level paging.  The current reset vector will
> never turn on 5-level paging in case SEV is active because we have more
> incompatibilities elsewhere (BaseMemEncryptSevLib IIRC).  But still,
> it's moving things into the wrong direction ...

Tom had mentioned this eventuality and we discussed it to an extent. AIUI
once we make that switch then most of this function could be replaced with
a call into the library to handle the splitting, and similar re-work would
need to be done for handling splitting the area for the GHCB page which is
also currently done with direct page table manipulation. So while it
does sort of move in the wrong direction, I don't think it would
significantly complicate things as far as making that transition.

> 
> Ideally CpuPageTableLib should be used for this.

What's the outlook for moving CpuPageTableLib before the next OVMF release?
My concern is that once SNP KVM support goes upstream (which is currently
looking to be within kernel 6.10 timeframe), SNP guest support in OVMF will
be completely broken without a fix like this for APIC MMIO accesses.

One thing to maybe get ahead of is the fact that splitting pages with
5-level paging will require having 2 pages reserved for GHCB instead of
the 1 we have currently, and 2 pages reserved for APIC range instead of
the 1 proposed by this patch (since we'd need to not only split a 2MB PTE
to 4KB, but the upper 1GB PTE to 2MB).

Do we know enough about what that sort of allocation/reserve logic would
look to start modifying PcdOvmfSecPageTablesBase,
PcdOvmfSecGhcbPageTableBase, and PcdOvmfSecApicPageTableBase to start
preping for such a change?

If so we could maybe take steps toward that to ease the transition. But
either way if the move to CpuPageTableLib is a ways out then I think we
need a fix before then.

-Mike

> 
> take care,
>   Gerd
> 

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Re: [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

2024-04-24 Thread Gerd Hoffmann

  Hi,

> > Ideally CpuPageTableLib should be used for this.
> 
> CpuPageTableLib will need to be modified in order for it to be used at this
> (Sec) stage. In order to work in Sec - either the caller will have to supply
> a list of pages that can be used if pagetable entries need to be allocated
> for splits

I don't think so.  PageTableMap() has the 'Buffer' parameter for passing
in page table memory.  And the patch reserves a page in MEMFD.  Handing
that page over to PageTableMap() should work just fine, no?

take care,
  Gerd



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Re: [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

2024-04-24 Thread Lendacky, Thomas via groups.io


On 4/24/24 06:54, Gerd Hoffmann wrote:

On Tue, Apr 23, 2024 at 03:59:58PM -0500, Michael Roth wrote:

For the most part, OVMF will clear the encryption bit for MMIO regions,
but there is currently one known exception during SEC when the APIC
base address is accessed via MMIO with the encryption bit set for
SEV-ES/SEV-SNP guests.


what exactly accesses the lapic that early?


InitializedApicTimer() in OvmfPkg/Sec/SecMain.c




+/**
+  Map known MMIO regions unencrypted if SEV-ES is active.
+
+  During early booting, page table entries default to having the encryption bit
+  set for SEV-ES/SEV-SNP guests. In cases where there is MMIO to an address, 
the
+  encryption bit should be cleared. Clear it here for any known MMIO accesses
+  during SEC, which is currently just the APIC base address.
+
+**/
+VOID
+SecMapApicBaseUnencrypted (
+  VOID
+  )
+{
+  PAGE_MAP_AND_DIRECTORY_POINTER  *Level4Entry;
+  PAGE_MAP_AND_DIRECTORY_POINTER  *Level3Entry;
+  PAGE_MAP_AND_DIRECTORY_POINTER  *Level2Entry;
+  PAGE_TABLE_4K_ENTRY *Level1Entry;
+  SEC_SEV_ES_WORK_AREA*SevEsWorkArea;
+  PHYSICAL_ADDRESSCr3;
+  UINT64  ApicAddress;
+  UINT64  PgTableMask;
+  UINT32  Level1Page;
+  UINT64  Level1Address;
+  UINT64  Level1Flags;
+  UINTN   PteIndex;
+
+  if (!SevEsIsEnabled ()) {
+return;
+  }


That is incompatible with 5-level paging.  The current reset vector will
never turn on 5-level paging in case SEV is active because we have more
incompatibilities elsewhere (BaseMemEncryptSevLib IIRC).  But still,
it's moving things into the wrong direction ...


Agreed. SEV needs to clean up the pagetable manipulation in general in 
order to support 5-level paging and remove redundant code. That will be 
a patch series in itself.


But without this modification, the SNP support no longer works with the 
KVM/gmem support that will be upstream. This change gets OVMF SNP 
support working again.




Ideally CpuPageTableLib should be used for this.


CpuPageTableLib will need to be modified in order for it to be used at 
this (Sec) stage. In order to work in Sec - either the caller will have 
to supply a list of pages that can be used if pagetable entries need to 
be allocated for splits or new entries or by providing some kind of SEC 
pagetable allocation pool.


So it will take significant work to get SEV support updated to using 
CpuPageTableLib and that's why with this single patch we can get OVMF 
SNP support working again.


Thanks,
Tom



take care,
   Gerd




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Re: [edk2-devel] [PATCH v2 1/4] uefi-sct/SctPkg: TCG2 Protocol: correct definition of TPMT_HA struct

2024-04-24 Thread Stuart Yoder


Hi Edhaya,

Yes, we could get rid of the TPM 2.0 definitions and include the MdePkg 
definition, but it will require rework of TCG2.h to remove duplicate 
definitions.


But, what is the general of philosophy of what source code edk2-test 
should include from edk2?  Since the purpose of edk2-test is to test the 
firmware, for some things it seems better for edk2-test to have it's own 
private  definitions.  Otherwise, if there was an edk2 bug in something 
like a protocol definition, and if edk2-test included the same .h file, 
then the bug may never be discovered.  It's better if edk2-test defines 
it's own structs based on the specifications.  That way it is 
independent of the firmware and it's a better test.


In the case of Tpm20.h, that is probably not the case as those are TPM 
definitions, not protocol definitions.


Do you want me to try to get rid of the TPM definitions and use Tpm20.h 
for this patch series?  Or, as a separate patch?


Thanks,

Stuart

On 4/24/24 6:36 AM, G Edhaya Chandran via groups.io wrote:

Update: We have the struct itself define here:
https://github.com/tianocore/edk2/blob/master/MdePkg/Include/IndustryStandard/Tpm20.h#L904 






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Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

2024-04-24 Thread Gerd Hoffmann

  Hi,

> Transfer to 16bit OS waking vector - 991F0 > hang here!!!

That is the last ovmf message of a successful S3 resume, after that the
OS should have back control.  Looks fine to me.

take care,
  Gerd



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Re: [edk2-devel] [PATCH v3 08/13] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid

2024-04-24 Thread Gerd Hoffmann

  Hi,

> > First, smram allocation doesn't work that way.  Have a look at
> > OvmfPkg/SmmAccess.  I guess that easily explains why this series
> > breaks S3 suspend.
> 
> Oh? Could you explain a bit more for 1) how smram allocation works? 2) what's 
> the possible reason break the S3? I haven't check yet. 

SmramInternal.c handles that.  It creates two regions, one is a page at
the start of SMRAM where S3 state is stored (and marked as allocated),
one is all the rest.

So, if you need some smram to initialize SMM in PEI I'd suggest to
either add a third region, or make the first region larger.

It's not clear to me why you put the logic upside down and introduce
that HOB in the first place.

> > Second, storing these descriptors in a HOB (which is PEI memory)
> > is questionable from a security point of view.
> 
> HOB is only to expose the SMRAM address and size, not the contents in smram, 
> what's the security concern?

Storing anything SMM related outside SMRAM makes me nervous.
I'd strongly suggest to avoid that.

It might be that in this specific case it is not a problem.  But it
needs very careful review of the implications (which I have not done)
and you have to hope you don't miss a possible attack vector, such as
someone modifying the HOB and the firmware then storing SMM data + code
outside SMRAM.

take care,
  Gerd



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Re: [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

2024-04-24 Thread Gerd Hoffmann

On Tue, Apr 23, 2024 at 03:59:58PM -0500, Michael Roth wrote:
> For the most part, OVMF will clear the encryption bit for MMIO regions,
> but there is currently one known exception during SEC when the APIC
> base address is accessed via MMIO with the encryption bit set for
> SEV-ES/SEV-SNP guests.

what exactly accesses the lapic that early?

> +/**
> +  Map known MMIO regions unencrypted if SEV-ES is active.
> +
> +  During early booting, page table entries default to having the encryption 
> bit
> +  set for SEV-ES/SEV-SNP guests. In cases where there is MMIO to an address, 
> the
> +  encryption bit should be cleared. Clear it here for any known MMIO accesses
> +  during SEC, which is currently just the APIC base address.
> +
> +**/
> +VOID
> +SecMapApicBaseUnencrypted (
> +  VOID
> +  )
> +{
> +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level4Entry;
> +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level3Entry;
> +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level2Entry;
> +  PAGE_TABLE_4K_ENTRY *Level1Entry;
> +  SEC_SEV_ES_WORK_AREA*SevEsWorkArea;
> +  PHYSICAL_ADDRESSCr3;
> +  UINT64  ApicAddress;
> +  UINT64  PgTableMask;
> +  UINT32  Level1Page;
> +  UINT64  Level1Address;
> +  UINT64  Level1Flags;
> +  UINTN   PteIndex;
> +
> +  if (!SevEsIsEnabled ()) {
> +return;
> +  }

That is incompatible with 5-level paging.  The current reset vector will
never turn on 5-level paging in case SEV is active because we have more
incompatibilities elsewhere (BaseMemEncryptSevLib IIRC).  But still,
it's moving things into the wrong direction ...

Ideally CpuPageTableLib should be used for this.

take care,
  Gerd



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Re: [edk2-devel] [PATCH edk2-platforms v2 0/2] SbsaQemu: some cleanups

2024-04-24 Thread Leif Lindholm

On Wed, Apr 24, 2024 at 13:32:33 +0200, Marcin Juszkiewicz wrote:
> I am working on some changes to SbsaQemu and got some cleanups in
> meantime.
> 
> First patch gets rid of setting Pcds for Timer interrupts. ArmPkg does
> it for us so we do not have to.
> 
> Second changes DSDT nodes so iasl does not complain.
> 
> Marcin Juszkiewicz (2):
>   SbsaQemu: do not set Timer interrupts
>   SbsaQemu: remove some methods from DSDT

For series:
Reviewed-by: Leif Lindholm 

Thanks!

/
Leif

>  Platform/Qemu/SbsaQemu/SbsaQemu.dsc   | 10 --
>  Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 23 ---
>  2 files changed, 8 insertions(+), 25 deletions(-)
> 
> -- 
> 2.44.0
> 
> 
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH v2 1/4] uefi-sct/SctPkg: TCG2 Protocol: correct definition of TPMT_HA struct

2024-04-24 Thread G Edhaya Chandran

Update: We have the struct itself define here:
https://github.com/tianocore/edk2/blob/master/MdePkg/Include/IndustryStandard/Tpm20.h#L904


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Re: [edk2-devel] [PATCH v2 1/4] uefi-sct/SctPkg: TCG2 Protocol: correct definition of TPMT_HA struct

2024-04-24 Thread G Edhaya Chandran

Hi Stuart,

The below values are
+#define SHA1_DIGEST_SIZE 20
+#define SHA256_DIGEST_SIZE 32
+#define SHA384_DIGEST_SIZE 48
+#define SHA512_DIGEST_SIZE 64
+#define SM3_256_DIGEST_SIZE 32

already defined here:
edk2-master\MdePkg\Include\IndustryStandard\Tpm20.h
Can this file be included.


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[edk2-devel] [PATCH edk2-platforms v2 1/2] SbsaQemu: do not set Timer interrupts

2024-04-24 Thread Marcin Juszkiewicz

Timer interrupts are set by ArmPkg.dec to recommended values.
We do not need to repeat it (and we missed HypVirtIntrNum one).

Signed-off-by: Marcin Juszkiewicz 
---
 Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 10 --
 1 file changed, 10 deletions(-)

diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc 
b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
index fefb7a7ae92d..e246db8b0a23 100644
--- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
+++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
@@ -437,16 +437,6 @@ [PcdsFixedAtBuild.common]
   # PL011 - Serial Terminal
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x6000
 
-  # Timer IRQs
-  # PPI #13
-  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29
-  # PPI #14
-  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30
-  # PPI #11
-  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27
-  # PPI #10
-  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26
-
   ## PL031 RealTimeClock
   gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x6001
 
-- 
2.44.0



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[edk2-devel] [PATCH edk2-platforms v2 2/2] SbsaQemu: remove some methods from DSDT

2024-04-24 Thread Marcin Juszkiewicz

IASL complained that DSDT is not optimal:

Dsdt.
83: Name (RBUF, ResourceTemplate() {
Remark   2173 - Creation of named objects within a method is highly
inefficient, use globals or method local variables instead ^
(\_SB.USB0._CRS)

Dsdt.
377:   Name (RBUF, ResourceTemplate () {
Remark   2173 - Creation of named objects within a method is highly
inefficient, use globals or method local variables instead ^
(\_SB.PCI0._CRS)

Simplified some _CRS nodes.

Signed-off-by: Marcin Juszkiewicz 
---
 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 23 ---
 1 file changed, 8 insertions(+), 15 deletions(-)

diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl 
b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index b55ad6c5cc07..c134fb66e860 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -77,15 +77,12 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
 Method (_STA) {
   Return (XHCI)
 }
-Method (_CRS, 0x0, Serialized) {
-Name (RBUF, ResourceTemplate() {
-Memory32Fixed (ReadWrite,
-   FixedPcdGet32 (PcdPlatformXhciBase),
-   FixedPcdGet32 (PcdPlatformXhciSize))
-Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 
43 }
-})
-Return (RBUF)
-}
+Name (_CRS, ResourceTemplate() {
+Memory32Fixed (ReadWrite,
+   FixedPcdGet32 (PcdPlatformXhciBase),
+   FixedPcdGet32 (PcdPlatformXhciSize))
+Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 }
+})
 
 // Root Hub
 Device (RHUB) {
@@ -371,8 +368,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
   })
 
   // Root complex resources
-  Method (_CRS, 0, Serialized) {
-  Name (RBUF, ResourceTemplate () {
+  Name (_CRS, ResourceTemplate () {
 WordBusNumber ( // Bus numbers assigned to this root
 ResourceProducer,
 MinFixed, MaxFixed, PosDecode,
@@ -418,10 +414,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
   FixedPcdGet32 (PcdPciIoSize),// Length
   ,,,TypeTranslation
   )
-}) // Name(RBUF)
-
-Return (RBUF)
-  } // Method(_CRS)
+  }) // Name(_CRS)
 
   Device (RES0)
   {
-- 
2.44.0



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[edk2-devel] [PATCH edk2-platforms v2 0/2] SbsaQemu: some cleanups

2024-04-24 Thread Marcin Juszkiewicz

I am working on some changes to SbsaQemu and got some cleanups in
meantime.

First patch gets rid of setting Pcds for Timer interrupts. ArmPkg does
it for us so we do not have to.

Second changes DSDT nodes so iasl does not complain.

Marcin Juszkiewicz (2):
  SbsaQemu: do not set Timer interrupts
  SbsaQemu: remove some methods from DSDT

 Platform/Qemu/SbsaQemu/SbsaQemu.dsc   | 10 --
 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 23 ---
 2 files changed, 8 insertions(+), 25 deletions(-)

-- 
2.44.0



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Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib

2024-04-24 Thread Gerd Hoffmann

On Wed, Apr 24, 2024 at 03:56:56AM +, Wu, Jiaxin wrote:
> Hi Gerd,
> 
> AMD version is not work for IA32X64 ovmf.
> 
> I checked the detailed: CpuSaveState->x64 is always used for OVMF no matter 
> IA32 or X64, while AMD is not, which is decided by the MSR EFER_ADDRESS LMA 
> bit check.

Hmm, probably because only PEI runs in 32-bit mode whereas DXE and SMM
run in 64-bit mode, so 32-bit PEI has to prepare things for the 64-bit
SMM.

> There is a potential issue/open in OVMF why need use the X64
> CpuSaveState for IA32. Before this open resolved, I still prefer to
> keep use the ovmf specific lib instance.

Yes, lets stick to the ovmf version for now, and maybe remove it later
when fixing the ia32 ovmf builds.

take care,
  Gerd



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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

2024-04-24 Thread Gerd Hoffmann

On Wed, Apr 24, 2024 at 09:57:50AM +0800, Chao Li wrote:
> Hi Gerd and Ard,
> 
> Can I submit the V2 this week? I want all OvmfPkg changes to be meged before
> the 202405 feature freeze.

Yea, go ahead, lets stick to the PCD approach, given that Ard seems to
not have objections to that ;)

take care,
  Gerd



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Re: [edk2-devel] [PATCH v2 4/4] uefi-sct/SctPkg: TCG2 Protocol: clean up type conversion warnings

2024-04-24 Thread G Edhaya Chandran

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH v2 3/4] uefi-sct/SctPkg: TCG2 Protocol: #pragma pack cleanup

2024-04-24 Thread G Edhaya Chandran

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH v2 2/4] uefi-sct/SctPkg: TCG2 Protocol: use OFFSET_OF for computing offsets

2024-04-24 Thread G Edhaya Chandran

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH v2 1/4] uefi-sct/SctPkg: TCG2 Protocol: correct definition of TPMT_HA struct

2024-04-24 Thread G Edhaya Chandran

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH 16/37] OvmfPkg: exclude NullMemoryTestDxe driver

2024-04-24 Thread Corvin Köhne

On Sat, 2023-11-11 at 00:57 +0100, Laszlo Ersek wrote:
> NullMemoryTestDxe was included in the OVMF platforms in historical
> commit
> 999a815e9ff3 ("OvmfPkg: Add NullMemoryTestDxe driver", 2011-01-21).
> It
> produces gEfiGenericMemTestProtocolGuid. With LegacyBiosDxe gone, the
> only
> consumer of this protocol in all of edk2 is
> "EmulatorPkg/Library/PlatformBmLib/PlatformBmMemoryTest.c". Thus,
> exclude
> NullMemoryTestDxe from all OVMF platforms.
> 
> (Notably, ArmVirtPkg platforms don't include NullMemoryTestDxe
> either.)
> 
> Cc: Anatol Belski 
> Cc: Andrei Warkentin 
> Cc: Anthony Perard 
> Cc: Ard Biesheuvel 
> Cc: Corvin Köhne 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: Jianyong Wu 
> Cc: Jiewen Yao 
> Cc: Michael Roth 
> Cc: Min Xu 
> Cc: Rebecca Cran 
> Cc: Sunil V L 
> Cc: Tom Lendacky 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4588
> Signed-off-by: Laszlo Ersek 
> ---
>  OvmfPkg/AmdSev/AmdSevX64.dsc    | 1 -
>  OvmfPkg/Bhyve/BhyveX64.dsc  | 1 -
>  OvmfPkg/CloudHv/CloudHvX64.dsc  | 1 -
>  OvmfPkg/IntelTdx/IntelTdxX64.dsc    | 1 -
>  OvmfPkg/Microvm/MicrovmX64.dsc  | 1 -
>  OvmfPkg/OvmfPkgIa32.dsc | 1 -
>  OvmfPkg/OvmfPkgIa32X64.dsc  | 1 -
>  OvmfPkg/OvmfPkgX64.dsc  | 1 -
>  OvmfPkg/OvmfXen.dsc | 1 -
>  OvmfPkg/AmdSev/AmdSevX64.fdf    | 1 -
>  OvmfPkg/Bhyve/BhyveX64.fdf  | 1 -
>  OvmfPkg/CloudHv/CloudHvX64.fdf  | 1 -
>  OvmfPkg/IntelTdx/IntelTdxX64.fdf    | 1 -
>  OvmfPkg/Microvm/MicrovmX64.fdf  | 1 -
>  OvmfPkg/OvmfPkgIa32.fdf | 1 -
>  OvmfPkg/OvmfPkgIa32X64.fdf  | 1 -
>  OvmfPkg/OvmfPkgX64.fdf  | 1 -
>  OvmfPkg/OvmfXen.fdf | 1 -
>  OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf | 2 --
>  19 files changed, 20 deletions(-)
> 
> diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc
> b/OvmfPkg/AmdSev/AmdSevX64.dsc
> index 302c90e7c2b4..a00f4c12904c 100644
> --- a/OvmfPkg/AmdSev/AmdSevX64.dsc
> +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
> @@ -691,7 +691,6 @@ [Components]
>    MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>    MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>    MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> - 
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe
> .inf
>  
>    OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf
>    OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf
> diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc
> index c938ed76ee92..a3452efc5a84 100644
> --- a/OvmfPkg/Bhyve/BhyveX64.dsc
> +++ b/OvmfPkg/Bhyve/BhyveX64.dsc
> @@ -711,7 +711,6 @@ [Components]
>    MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>    MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>    MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> - 
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe
> .inf
>  
>    OvmfPkg/Bhyve/BhyveRfbDxe/BhyveRfbDxe.inf {
>  
> diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc
> b/OvmfPkg/CloudHv/CloudHvX64.dsc
> index c23c7eaf6cc2..f6e4b2c628a3 100644
> --- a/OvmfPkg/CloudHv/CloudHvX64.dsc
> +++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
> @@ -795,7 +795,6 @@ [Components]
>    MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>    MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>    MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> - 
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe
> .inf
>  
>    #
>    # Serial Support
> diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc
> b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
> index 0177c174c2ab..af0ecb0453ea 100644
> --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc
> +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
> @@ -682,7 +682,6 @@ [Components]
>    MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>    MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>    MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> - 
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe
> .inf
>  
>    OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf
>    OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf
> diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc
> b/OvmfPkg/Microvm/MicrovmX64.dsc
> index ea1fa3e2963f..75c53c0bb287 100644
> --- a/OvmfPkg/Microvm/MicrovmX64.dsc
> +++ b/OvmfPkg/Microvm/MicrovmX64.dsc
> @@ -787,7 +787,6 @@ [Components]
>    MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>    MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>    MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> - 
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe
> .inf
>  
>    OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf
>    OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index 3005ef771bea..eb6022bafed3 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -841,7 +841,6 @@ [Components]
>    MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 13/14] Platform/ARM/N1Sdp: Persistent storage for N1Sdp

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 13/14] 
Platform/ARM/N1Sdp: Persistent storage for N1Sdp

From: sahil 

Enable persistent storage on QSPI flash device.

Signed-off-by: sahil 
---
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 19 ++-
 Platform/ARM/N1Sdp/N1SdpPlatform.fdf |  2 ++
 2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 46412bff7d78..fd630fa08c35 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -161,11 +161,9 @@
   # ACPI Table Version

   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20



-  # Runtime Variable storage

-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0

-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE

-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000

-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800

+  # NOR flash support

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002



 


 #

@@ -197,6 +195,16 @@
   gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F

   }



+  # NOR flash support

+  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf {

+

+  
NorFlashDeviceLib|Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf

+  
NorFlashPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

+

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x1C0C

+  }

+

   # Architectural Protocols

   ArmPkg/Drivers/CpuDxe/CpuDxe.inf

   ArmPkg/Drivers/ArmGic/ArmGicDxe.inf

@@ -217,6 +225,7 @@
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {

 

   NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf

+  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf

   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

   }



diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 7aae8e6a753b..07118725f168 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -140,6 +140,8 @@ READ_LOCK_STATUS   = TRUE
   INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf

   INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf



+  INF Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf

+

   INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf

   INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf



--
2.25.1



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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 12/14] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

2024-04-24 Thread levi.yun

> +EFI_STATUS

> +NorFlashWriteSingleBlock (

> +  INNOR_FLASH_INSTANCE  *Instance,

> +  INEFI_LBA Lba,

> +  INUINTN   Offset,

> +  IN OUTUINTN   *NumBytes,

> +  INUINT8   *Buffer

> +  )

> +{

> +  EFI_STATUS  Status;

> +  UINT32  Tmp;

> +  UINT32  TmpBuf;

> +  UINT32  WordToWrite;

> +  UINT32  Mask;

> +  BOOLEAN DoErase;

> +  UINTN   BytesToWrite;

> +  UINTN   CurOffset;

> +  UINTN   WordAddr;

> +  UINTN   BlockSize;

> +  UINTN   BlockAddress;

> +  UINTN   PrevBlockAddress;

> +

> +  if (Buffer == NULL) {

> +DEBUG ((

> +  DEBUG_ERROR,

> +  "NorFlashWriteSingleBlock: ERROR - Buffer is invalid\n"

> +  ));

> +return EFI_OUT_OF_RESOURCES;

> +  }

Is it much better to return EFI_INVALID_PARAMETER?
Also, I think NumBytes should be checked too. right?


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 12/14] 
Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

From: sahil 

In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.

This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.

Signed-off-by: sahil 
---
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 |   32 +
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
   |   44 +
 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
   | 1011 
 3 files changed, 1087 insertions(+)

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
new file mode 100644
index ..506876b62285
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
@@ -0,0 +1,32 @@
+#/** @file

+#

+#  Component description file for CadenceQspiNorFlashDeviceLib Library

+#

+#  Copyright (c) 2024, Arm Limited. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#**/

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = CadenceQspiNorFlashDeviceLib

+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a170b

+  MODULE_TYPE= DXE_RUNTIME_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashDeviceLib

+

+[Sources.common]

+  CadenceQspiNorFlashDeviceLib.c

+  CadenceQspiNorFlashDeviceLib.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+

+[LibraryClasses]

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  IoLib

+  TimerLib

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
new file mode 100644
index ..d43d27fe5eb4
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
@@ -0,0 +1,44 @@
+/** @file

+

+  Copyright (c) 2024, ARM Limited. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_

+#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_

+

+#define NOR_FLASH_ERASE_RETRY  10

+

+// QSPI Controller defines

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS   19

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS  16

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B   0x02

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS   20

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C   0x8

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS  7

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)

+

+#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET  0xA0

+

+#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET  0x94

+

+#define SPINOR_SR_WIP  BIT0 // Write in progress

+

+#define

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 14/14] Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 14/14] 
Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp

From: sahil 

This driver enables Fault Tolerant Write protocol, which provides
fault tolerant write capability for block devices.

Signed-off-by: sahil 
---
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 +
 Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 +
 2 files changed, 6 insertions(+)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index fd630fa08c35..743c2e647b76 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -162,6 +162,10 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20



   # NOR flash support

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x18F4

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0002

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x18F2

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0002

   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0

   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002



@@ -228,6 +232,7 @@
   
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf

   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

   }

+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf



   # ACPI Support

   MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 07118725f168..7b7eda51c70c 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -90,6 +90,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/Metronome/Metronome.inf

   INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf

   INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf

   INF 
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

   INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

   INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf

--
2.25.1



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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 09/14] Platform/ARM: Add optional provision to fetch and print NOR Flash info

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 09/14] 
Platform/ARM: Add optional provision to fetch and print NOR Flash info

From: sahil 

This patch adds an optional functionality in NorFlashDxe to fetch and
print NOR Flash information from NorFlashInfoLib using its JEDEC ID.

NOR Flash libraries will implement a function "NorFlashReadID" which
will fetch and return JEDEC ID. This JEDEC ID can be then used to
print NOR Flash info using NorFlashInfoLib. If this functionality is
not needed then the function can just return EFI_UNSUPPORTED.

Signed-off-by: sahil 
---
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc  |  2 ++
 Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc|  2 ++
 Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc |  2 ++
 Platform/ARM/JunoPkg/ArmJuno.dsc |  2 ++
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc|  2 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf |  1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf|  1 +
 Platform/ARM/Include/Library/NorFlashDeviceLib.h |  6 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c   | 19 
+++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c  | 19 
+++
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 18 
++
 11 files changed, 74 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 3dcf422eab4b..aef7cba5449e 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -36,6 +36,8 @@
   LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf

   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf

diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index ab0e2a957a1b..02d684adaebd 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -65,6 +65,8 @@
   IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf

   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   
NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

   OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf

   RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf

   
PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 70ff049d3248..4e208c539a88 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -95,6 +95,8 @@
   
ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf

   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   
NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf



   # ARM PL031 RTC Driver

diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 81d2cbe4359f..946b8680c8c2 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -42,6 +42,8 @@


   
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   
NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf



   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

   
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf

diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
index a5805da49c92..ee71bbb1fc09 100644
---

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 05/14] Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 05/14] 
Platform/ARM: Create NorFlashDeviceLib library interface for flash specific 
functions

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch splits NorFlash.h and moves out the function prototypes and
macros that are expected by NorFlashDxe to be implemented by any
Nor Flash implementation to NorFlashDeviceLib.h file.

Signed-off-by: sahil 
---
 Platform/ARM/ARM.dec  |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 143 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |   1 +
 Platform/ARM/Include/Library/NorFlashDeviceLib.h  | 156 
 4 files changed, 159 insertions(+), 142 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index be7e6dc83fde..86d1fcb4878e 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -17,6 +17,7 @@


 [LibraryClasses]

   BdsLib|Include/Library/BdsLib.h

+  NorFlashDeviceLib|Include/Library/NorFlashDeviceLib.h

   NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h



 [Guids]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index bd5c6a949cf0..6cb1f64b9875 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,6 +20,7 @@


 #include 

 #include 

+#include 



 #define NOR_FLASH_ERASE_RETRY  10



@@ -40,7 +41,6 @@
 #define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)   ((BaseAddr) + 
((OffsetAddr) << 2))

 #define CREATE_DUAL_CMD(Cmd)   ( ( Cmd << 16) | ( Cmd 
& LOW_16_BITS) )

 #define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))

-#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize)  ( BaseAddr + 
(UINTN)((Lba) * LbaSize) )



 // Status Register Bits

 #define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)

@@ -105,145 +105,4 @@
 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060

 #define P30_CMD_READ_CONFIGURATION_REGISTER0x0003



-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;

-

-#pragma pack (1)

-typedef struct {

-  VENDOR_DEVICE_PATH  Vendor;

-  UINT8   Index;

-  EFI_DEVICE_PATH_PROTOCOLEnd;

-} NOR_FLASH_DEVICE_PATH;

-#pragma pack ()

-

-struct _NOR_FLASH_INSTANCE {

-  UINT32 Signature;

-  EFI_HANDLE Handle;

-

-  UINTN  DeviceBaseAddress;

-  UINTN  RegionBaseAddress;

-  UINTN  Size;

-  EFI_LBAStartLba;

-

-  EFI_BLOCK_IO_PROTOCOL  BlockIoProtocol;

-  EFI_BLOCK_IO_MEDIA Media;

-  EFI_DISK_IO_PROTOCOL   DiskIoProtocol;

-

-  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOLFvbProtocol;

-  VOID   *ShadowBuffer;

-

-  NOR_FLASH_DEVICE_PATH  DevicePath;

-};

-

-EFI_STATUS

-NorFlashReadCfiData (

-  IN  UINTN   DeviceBaseAddress,

-  IN  UINTN   CFI_Offset,

-  IN  UINT32  NumberOfBytes,

-  OUT UINT32  *Data

-  );

-

-EFI_STATUS

-NorFlashWriteBuffer (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN UINTN   TargetAddress,

-  IN UINTN   BufferSizeInBytes,

-  IN UINT32  *Buffer

-  );

-

-//

-// NorFlash.c

-//

-EFI_STATUS

-NorFlashWriteSingleBlock (

-  INNOR_FLASH_INSTANCE  *Instance,

-  INEFI_LBA Lba,

-  INUINTN   Offset,

-  IN OUTUINTN   *NumBytes,

-  INUINT8   *Buffer

-  );

-

-EFI_STATUS

-NorFlashWriteBlocks (

-  IN  NOR_FLASH_INSTANCE  *Instance,

-  IN  EFI_LBA Lba,

-  IN  UINTN   BufferSizeInBytes,

-  IN  VOID*Buffer

-  );

-

-EFI_STATUS

-NorFlashReadBlocks (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINTN   BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-EFI_STATUS

-NorFlashRead (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINTN   Offset,

-  IN UINTN   BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-EFI_STATUS

-NorFlashWrite (

-  INNOR_FLASH_INSTANCE  *Instance,

-  INEFI_LBA Lba,

-  INUINTN   Offset,

-  IN OUTUINTN

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 07/14] Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 07/14] 
Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch adds the following major changes:

1. Adds changes in NorFlashDxe to look for NorFlashDeviceLib instead of
NorFlash.c for flash specific implementation

2. Remove NorFlash.c and NorFlash.h as they are no longer required.

3. Add changes to platform description files to provide
P30NorFlashDeviceLib as NorFlashDeviceLib

Signed-off-by: sahil 
---
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   |   1 +
 Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc |   1 +
 Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc  |   1 +
 Platform/ARM/JunoPkg/ArmJuno.dsc  |   1 +
 Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   5 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   6 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 108 ---
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 953 

 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 -
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 -
 Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 -
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 -
 13 files changed, 7 insertions(+), 1074 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 1bf489ffeb39..3dcf422eab4b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -34,6 +34,7 @@
   BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf

   LcdHwLib|ArmPlatformPkg/Library/HdLcd/HdLcd.inf

   LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf

   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index 0dd9ebbfc16c..ab0e2a957a1b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -63,6 +63,7 @@
   AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf

   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf

   IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   
NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf

   OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf

   RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 9f51e05af561..70ff049d3248 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -93,6 +93,7 @@
   # Versatile Express Specific Libraries

   PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf

   
ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   
NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf

   
ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf



diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 7fe796a53433..81d2cbe4359f 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -40,6 +40,7 @@
   ArmPlatformLib|Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf

   ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf



+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

   
NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf



   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
index 0e77b76cae69..a5805da49c92 100644
---

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 08/14] Platform/ARM: Add HostRegisterBaseAddress variable

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 08/14] 
Platform/ARM: Add HostRegisterBaseAddress variable

From: sahil 

This variable holds the QSPI controller's base address.
It is defined in ARM.dec as well with the default value of 0x0.
In case a platform is not using it, they can just ignore this
variable and the default value of 0x0 will be propogated and
the variable will not be used.

Signed-off-by: sahil 
---
 Platform/ARM/ARM.dec  |  3 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |  3 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |  2 ++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |  1 +
 Platform/ARM/Include/Library/NorFlashDeviceLib.h  |  1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 34 
+---
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   | 12 ---
 7 files changed, 48 insertions(+), 8 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index 86d1fcb4878e..a5e28c372903 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -26,3 +26,6 @@


 [PcdsFeatureFlag.common]

   
gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x001

+

+[PcdsFixedAtBuild.common]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x0|UINT32|0x0002

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index de160025b632..6522968d6c5a 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -65,5 +65,8 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase

   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize



+[FixedPcd]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress

+

 [Depex]

   gEfiCpuArchProtocolGuid

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index d9e7de07165c..eb86d423f106 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -59,5 +59,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase

   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize



+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress

+

 [Depex]

   TRUE

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index 7fcb949843e8..98464e4868b1 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -34,6 +34,7 @@
 //

 EFI_STATUS

 NorFlashCreateInstance (

+  IN UINTNHostRegisterBase,

   IN UINTNNorFlashDeviceBase,

   IN UINTNNorFlashRegionBase,

   IN UINTNNorFlashSize,

diff --git a/Platform/ARM/Include/Library/NorFlashDeviceLib.h 
b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
index e5017130a091..29b8b8901525 100644
--- a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
+++ b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
@@ -29,6 +29,7 @@ struct _NOR_FLASH_INSTANCE {
   UINT32 Signature;

   EFI_HANDLE Handle;



+  UINTN  HostRegisterBaseAddress;

   UINTN  DeviceBaseAddress;

   UINTN  RegionBaseAddress;

   UINTN  Size;

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index 1c12572ab663..f5c0dadf84e0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -1,6 +1,6 @@
 /** @file  NorFlashDxe.c



-  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.

+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.



   SPDX-License-Identifier: BSD-2-Clause-Patent



@@ -30,6 +30,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
   NOR_FLASH_SIGNATURE, // Signature

   NULL,// Handle ... NEED TO BE FILLED



+  0, // HostRegisterBaseAddress  ... NEED TO BE FILLED

   0, // DeviceBaseAddress ... NEED TO BE FILLED

   0, // RegionBaseAddress ... NEED TO BE FILLED

   0, // Size ... NEED TO BE FILLED

@@ -99,6 +100,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {


 EFI_STATUS

 NorFlashCreateInstance (

+  IN UINTNHostRegisterBase,

   IN UINTNNorFlashDeviceBase,

   IN UINTNNorFlashRegionBase,

   IN UINTNNorFlashSize,

@@ -118,9

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 11/14] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 11/14] 
Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp

From: sahil 

Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.

Signed-off-by: sahil 
---
 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 34 ++
 Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c   | 65 

 2 files changed, 99 insertions(+)

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..fad3bca79d3a
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,34 @@
+## @file

+#  NOR flash lib for ARM Neoverse N1 platform.

+#

+#  Copyright (c) 2024, ARM Limited. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x0001001B

+  BASE_NAME  = NorFlashNeoverseN1SocLib

+  FILE_GUID  = 7006fcf1-a585-4272-92e3-b286b1dff5bb

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashPlatformLib

+

+[Sources.common]

+  NorFlashLib.c

+

+[Packages]

+  MdeModulePkg/MdeModulePkg.dec

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+  Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec

+

+[LibraryClasses]

+  BaseLib

+

+[FixedPcd]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a48db9c74548
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,65 @@
+/** @file

+*  NOR flash lib for ARM Neoverse N1 platform

+*

+*  Copyright (c) 2024, ARM Limited. All rights reserved.

+*

+*  SPDX-License-Identifier: BSD-2-Clause-Patent

+*

+**/

+

+#include 

+#include 

+#include 

+

+#define FW_ENV_REGION_BASE  FixedPcdGet32 (PcdFlashNvStorageVariableBase)

+#define FW_ENV_REGION_SIZE  (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))

+

+STATIC NOR_FLASH_DESCRIPTION  mNorFlashDevices[] = {

+  {

+/// Environment variable region

+NEOVERSEN1SOC_SCP_QSPI_AHB_BASE,///< device base

+FW_ENV_REGION_BASE, ///< region base

+FW_ENV_REGION_SIZE, ///< region size

+SIZE_4KB,   ///< block size

+  },

+};

+

+/**

+  Dummy implementation of NorFlashPlatformInitialization to

+  comply with NorFlashPlatformLib structure.

+

+  @retvalEFI_SUCCESSSuccess.

+**/

+EFI_STATUS

+NorFlashPlatformInitialization (

+  VOID

+  )

+{

+  return EFI_SUCCESS;

+}

+

+/**

+  Get NOR flash region info

+

+  @param[out]NorFlashDevicesNOR flash regions info.

+  @param[out]Count  number of flash instance.

+

+  @retvalEFI_SUCCESSSuccess.

+  @retvalEFI_INVALID_PARAMETER  The parameters specified are not valid.

+**/

+EFI_STATUS

+NorFlashPlatformGetDevices (

+  OUT NOR_FLASH_DESCRIPTION  **NorFlashDevices,

+  OUT UINT32 *Count

+  )

+{

+  if ((NorFlashDevices == NULL) || (Count == NULL)) {

+return EFI_INVALID_PARAMETER;

+  }

+

+  *NorFlashDevices = mNorFlashDevices;

+  *Count   = ARRAY_SIZE (mNorFlashDevices);

+  return EFI_SUCCESS;

+}

--
2.25.1



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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 10/14] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 10/14] 
Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region

From: sahil 

Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.

Signed-off-by: sahil 
---
 Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h  | 7 +++
 Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h 
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 5483e7bc5f68..2dae57a0f01a 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -4,6 +4,9 @@
 *

 * SPDX-License-Identifier: BSD-2-Clause-Patent

 *

+* Arm Neoverse N1 System Development Platform Technical Reference Manual

+* https://developer.arm.com/documentation/101489//?lang=en

+*

 **/



 #ifndef NEOVERSEN1SOC_PLATFORM_H_

@@ -41,6 +44,10 @@
 #define NEOVERSEN1SOC_EXP_PERIPH_BASE0   0x1C00

 #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ0x130



+// SCP QSPI flash device

+#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE  0x1800

+#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200

+

 /*

  * Platform information structure stored in Non-secure SRAM. Platform

  * information are passed from the trusted firmware with the below structure

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c 
b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 80daedb33416..282bfbc81736 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -14,7 +14,7 @@
 #include 



 // The total number of descriptors, including the final "end-of-table" 
descriptor.

-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19

+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20



 /**

   Returns the Virtual Memory Map of the platform.

@@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length  = 
NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;

   VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;



+  // SCP QSPI flash device

+  VirtualMemoryTable[++Index].PhysicalBase  = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;

+  VirtualMemoryTable[Index].VirtualBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;

+  VirtualMemoryTable[Index].Length  = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;

+  VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

+

   if (PlatInfo->MultichipMode == 1) {

 //Remote DDR (2GB)

 VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdExtMemorySpace) +

--
2.25.1



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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 04/14] Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 04/14] 
Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c

From: sahil 

Refactoring done in this patch has two major parts:

1. Moving out NorFlashUnlockAndEraseSingleBlock and
NorFlashWriteFullBlock functions from NorFlashDxe.c and
NorFlashStandaloneMm.c to NorFlash.c files.

2. At the same time, we are adding NorFlashLock and NorFlashUnlock
functions which will take care of TPL related operations needed by
functions mentioned in point 1. These functions are implemented
in NorFlashDxe.c but are just dummy placeholder functions in
NorFlashStandaloneMm.c file.

Signed-off-by: sahil 
---
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h |  26 +++
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h   |  14 --
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 136 +-
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c  | 193 

 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 151 +++
 5 files changed, 225 insertions(+), 295 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index e0ebb1e2fd35..bd5c6a949cf0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -220,4 +220,30 @@ NorFlashWriteSingleWord (
   IN UINT32  WriteData

   );



+EFI_STATUS

+NorFlashWriteFullBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN EFI_LBA Lba,

+  IN UINT32  *DataBuffer,

+  IN UINT32  BlockSizeInWords

+  );

+

+EFI_STATUS

+NorFlashUnlockAndEraseSingleBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN UINTN   BlockAddress

+  );

+

+VOID

+EFIAPI

+NorFlashLock (

+  IN EFI_TPL  *OriginalTPL

+  );

+

+VOID

+EFIAPI

+NorFlashUnlock (

+  IN EFI_TPL OriginalTPL

+  );

+

 #endif /* __NOR_FLASH_H__ */

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index e329e0727617..c0a3b5861532 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -31,20 +31,6 @@
 //

 // NorFlashDxe.c

 //

-EFI_STATUS

-NorFlashWriteFullBlock (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINT32  *DataBuffer,

-  IN UINT32  BlockSizeInWords

-  );

-

-EFI_STATUS

-NorFlashUnlockAndEraseSingleBlock (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN UINTN   BlockAddress

-  );

-

 EFI_STATUS

 NorFlashCreateInstance (

   IN UINTNNorFlashDeviceBase,

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 4e5a97c83c7b..15000a692b02 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -10,7 +10,6 @@
 #include 



 #include "NorFlash.h"

-#include "NorFlashCommon.h"



 //

 // Global variable declarations

@@ -817,3 +816,138 @@ NorFlashReset (
   SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);

   return EFI_SUCCESS;

 }

+

+/**

+ * This function unlock and erase an entire NOR Flash block.

+**/

+EFI_STATUS

+NorFlashUnlockAndEraseSingleBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN UINTN   BlockAddress

+  )

+{

+  EFI_STATUS  Status;

+  UINTN   Index;

+  EFI_TPL OriginalTPL;

+

+  NorFlashLock ();

+

+  Index = 0;

+  // The block erase might fail a first time (SW bug ?). Retry it ...

+  do {

+// Unlock the block if we have to

+Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);

+if (EFI_ERROR (Status)) {

+  break;

+}

+

+Status = NorFlashEraseSingleBlock (Instance, BlockAddress);

+Index++;

+  } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));

+

+  if (Index == NOR_FLASH_ERASE_RETRY) {

+DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked 
Error (try to erase %d times)\n", BlockAddress, Index));

+  }

+

+  NorFlashUnlock (OriginalTPL);

+

+  return Status;

+}

+

+EFI_STATUS

+NorFlashWriteFullBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN EFI_LBA Lba,

+  IN UINT32  *DataBuffer,

+  IN UINT32  BlockSizeInWords

+  )

+{

+  EFI_STATUS  Status;

+  UINTN   WordAddress;

+  UINT32  WordIndex;

+  UINTN   BufferIndex;

+  UINTN   BlockAddress;

+  UINTN   BuffersInBlock;

+  UINTN   RemainingWords;

+  EFI_TPL OriginalTPL;

+  UINTN   Cnt;

+

+  Status = EFI_SUCCESS;

+

+  // Get the physical

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 03/14] Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 03/14] 
Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file

From: sahil 

This patch splits NorFlash.h and adds NorFlashCommon.h which
will have all the flash independent functions and macros.
Whereas all the flash specific functions will be in NorFlash.h
header file.

Signed-off-by: sahil 
---
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 199 
--
 Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 221 

 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 +
 Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 +
 9 files changed, 228 insertions(+), 199 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index cdf1f5c27f35..18e99bac 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -21,6 +21,7 @@
   NorFlash.h

   NorFlashBlockIoDxe.c

   NorFlashDxe.c

+  NorFlashCommon.h

   NorFlashFvb.c



 [Packages]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index 001f281220f2..69c40ccf9c27 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -22,6 +22,7 @@
   NorFlash.c

   NorFlash.h

   NorFlashFvb.c

+  NorFlashCommon.h

   NorFlashStandaloneMm.c



 [Packages]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index d4d97bd22cc5..e0ebb1e2fd35 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,9 +20,6 @@


 #include 

 #include 

-#include 

-#include 

-#include 



 #define NOR_FLASH_ERASE_RETRY  10



@@ -108,11 +105,6 @@
 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060

 #define P30_CMD_READ_CONFIGURATION_REGISTER0x0003



-#define NOR_FLASH_SIGNATURE  SIGNATURE_32('n', 'o', 'r', '0')

-#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, 
NOR_FLASH_SIGNATURE)

-#define INSTANCE_FROM_BLKIO_THIS(a)   CR(a, NOR_FLASH_INSTANCE, 
BlockIoProtocol, NOR_FLASH_SIGNATURE)

-#define INSTANCE_FROM_DISKIO_THIS(a)  CR(a, NOR_FLASH_INSTANCE, 
DiskIoProtocol, NOR_FLASH_SIGNATURE)

-

 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;



 #pragma pack (1)

@@ -158,197 +150,6 @@ NorFlashWriteBuffer (
   IN UINT32  *Buffer

   );



-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoReset (

-  IN EFI_BLOCK_IO_PROTOCOL  *This,

-  IN BOOLEANExtendedVerification

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoReadBlocks (

-  IN  EFI_BLOCK_IO_PROTOCOL  *This,

-  IN  UINT32 MediaId,

-  IN  EFI_LBALba,

-  IN  UINTN  BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoWriteBlocks (

-  IN  EFI_BLOCK_IO_PROTOCOL  *This,

-  IN  UINT32 MediaId,

-  IN  EFI_LBALba,

-  IN  UINTN  BufferSizeInBytes,

-  IN  VOID   *Buffer

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoFlushBlocks (

-  IN EFI_BLOCK_IO_PROTOCOL  *This

-  );

-

-//

-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk

-//

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoReadDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64Offset,

-  IN UINTN BufferSize,

-  OUT VOID *Buffer

-  );

-

-//

-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk

-//

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoWriteDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64Offset,

-  IN UINTN BufferSize,

-  IN VOID  *Buffer

-  );

-

-//

-// NorFlashFvbDxe.c

-//

-

-EFI_STATUS

-EFIAPI

-FvbGetAttributes (

-  IN CONST

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 06/14] Platform/ARM: Add P30NorFlashDeviceLib Library

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 06/14] 
Platform/ARM: Add P30NorFlashDeviceLib Library

From: sahil 

This patch implements functions to interact with P30 NOR Flash.
The code is taken from Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
file.

Signed-off-by: sahil 
---
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf |  35 +
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h   |  98 ++
 Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c   | 949 

 3 files changed, 1082 insertions(+)

diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
new file mode 100644
index ..0707edb54442
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
@@ -0,0 +1,35 @@
+#/** @file

+#

+#  Component description file for P30NorFlashDeviceLib library

+#

+#  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

+#  Copyright (c) 2020, Linaro, Ltd. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#**/

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = P30NorFlashDeviceLib

+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a1709

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashDeviceLib

+

+[Sources.common]

+  P30NorFlashDeviceLib.c

+  P30NorFlashDeviceLib.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+

+[LibraryClasses]

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  IoLib

+

+[Pcd.common]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked

diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
new file mode 100644
index ..c310b2310d62
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
@@ -0,0 +1,98 @@
+/** @file  P30NorFlashDeviceLib.h

+

+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

+  Copyright (c) 2020, Linaro, Ltd. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef P30_NOR_FLASH_DEVICE_LIB_H_

+#define P30_NOR_FLASH_DEVICE_LIB_H_

+

+#define NOR_FLASH_ERASE_RETRY  10

+

+// Device access macros

+// These are necessary because we use 2 x 16bit parts to make up 32bit data

+

+#define HIGH_16_BITS  0x

+#define LOW_16_BITS   0x

+#define LOW_8_BITS0x00FF

+

+#define FOLD_32BIT_INTO_16BIT(value)  ( ( value >> 16 ) | ( value & 
LOW_16_BITS ) )

+

+#define GET_LOW_BYTE(value)   ( value & LOW_8_BITS )

+#define GET_HIGH_BYTE(value)  ( GET_LOW_BYTE( value >> 16 ) )

+

+// Each command must be sent simultaneously to both chips,

+// i.e. at the lower 16 bits AND at the higher 16 bits

+#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)  ((BaseAddr) + ((OffsetAddr) 
<< 2))

+#define CREATE_DUAL_CMD(Cmd)  ( ( Cmd << 16) | ( Cmd & 
LOW_16_BITS) )

+#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)   MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))

+

+#define BOTH_ALIGNED(a, b, align)  UINTN)(a) | (UINTN)(b)) & ((align) - 
1)) == 0)

+

+// Status Register Bits

+#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)

+#define P30_SR_BIT_ERASE_SUSPEND(BIT6 << 16 | BIT6)

+#define P30_SR_BIT_ERASE(BIT5 << 16 | BIT5)

+#define P30_SR_BIT_PROGRAM  (BIT4 << 16 | BIT4)

+#define P30_SR_BIT_VPP  (BIT3 << 16 | BIT3)

+#define P30_SR_BIT_PROGRAM_SUSPEND  (BIT2 << 16 | BIT2)

+#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)

+#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)

+

+// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family

+

+// On chip buffer size for buffered programming operations

+// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each 
word is 2 bytes.

+// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes

+#define P30_MAX_BUFFER_SIZE_IN_BYTES  ((UINTN)128)

+#define P30_MAX_BUFFER_SIZE_IN_WORDS  (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))

+#define MAX_BUFFERED_PROG_ITERATIONS  1000

+#define BOUNDARY_OF_32_WORDS  0x7F

+

+// CFI Addresses

+#define P30_CFI_ADDR_QUERY_UNIQUE_QRY  0x10

+#define P30_CFI_ADDR_VENDOR_ID 0x13

+

+// CFI Data

+#define CFI_QRY  0x00595251

+

+// READ Commands

+#define P30_CMD_READ_DEVICE_ID 0x0090

+#define P30_CMD_READ_STATUS_REGISTER   0x0070

+#define P30_CMD_CLEAR_STATUS_REGISTER  0x0050

+#define P30_CMD_READ_ARRAY

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 01/14] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c

2024-04-24 Thread levi.yun

Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Sahil Kaushal 
via groups.io 
Sent: 23 April 2024 06:56
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm  ; Sami Mujawar; Sahil Kaushal
Subject: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 01/14] 
Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c

From: sahil 

Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.

Signed-off-by: sahil 
---
 Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 129 

 Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129 

 2 files changed, 129 insertions(+), 129 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
   return EFI_SUCCESS;

 }



-/*

-  Although DiskIoDxe will automatically install the DiskIO protocol whenever

-  we install the BlockIO protocol, its implementation is sub-optimal as it 
reads

-  and writes entire blocks using the BlockIO protocol. In fact we can access

-  NOR flash with a finer granularity than that, so we can improve performance

-  by directly producing the DiskIO protocol.

-*/

-

-/**

-  Read BufferSize bytes from Offset into Buffer.

-

-  @param  This  Protocol instance pointer.

-  @param  MediaId   Id of the media, changes every time the media 
is replaced.

-  @param  OffsetThe starting byte offset to read from

-  @param  BufferSizeSize of Buffer

-  @param  BufferBuffer containing read data

-

-  @retval EFI_SUCCESS   The data was read correctly from the device.

-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the read.

-  @retval EFI_NO_MEDIA  There is no media in the device.

-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.

-  @retval EFI_INVALID_PARAMETER The read request contains device addresses 
that are not

-valid for the device.

-

-**/

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoReadDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64DiskOffset,

-  IN UINTN BufferSize,

-  OUT VOID *Buffer

-  )

-{

-  NOR_FLASH_INSTANCE  *Instance;

-  UINT32  BlockSize;

-  UINT32  BlockOffset;

-  EFI_LBA Lba;

-

-  Instance = INSTANCE_FROM_DISKIO_THIS (This);

-

-  if (MediaId != Instance->Media.MediaId) {

-return EFI_MEDIA_CHANGED;

-  }

-

-  BlockSize = Instance->Media.BlockSize;

-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
);

-

-  return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);

-}

-

-/**

-  Writes a specified number of bytes to a device.

-

-  @param  This   Indicates a pointer to the calling context.

-  @param  MediaIdID of the medium to be written.

-  @param  Offset The starting byte offset on the logical block I/O device 
to write.

-  @param  BufferSize The size in bytes of Buffer. The number of bytes to write 
to the device.

-  @param  Buffer A pointer to the buffer containing the data to be written.

-

-  @retval EFI_SUCCESS   The data was written correctly to the device.

-  @retval EFI_WRITE_PROTECTED   The device can not be written to.

-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the write.

-  @retval EFI_NO_MEDIA  There is no media in the device.

-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.

-  @retval EFI_INVALID_PARAMETER The write request contains device addresses 
that are not

- valid for the device.

-

-**/

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoWriteDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64DiskOffset,

-  IN UINTN BufferSize,

-  IN VOID  *Buffer

-  )

-{

-  NOR_FLASH_INSTANCE  *Instance;

-  UINT32  BlockSize;

-  UINT32  BlockOffset;

-  EFI_LBA Lba;

-  UINTN   RemainingBytes;

-  UINTN   WriteSize;

-  EFI_STATUS  Status;

-

-  Instance = INSTANCE_FROM_DISKIO_THIS (This);

-

-  if (MediaId != Instance->Media.MediaId) {

-return EFI_MEDIA_CHANGED;

-  }

-

-  BlockSize = Instance->Media.BlockSize;

-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
);

-

-  RemainingBytes = BufferSize;

-

-  // Write either all the remaining bytes, or the number of bytes that bring

-  // us up to a block

Re: [edk2-devel] [PATCH] Add SHA3/SM3 functions with openssl for Mbedtls

2024-04-24 Thread Wenxing Hou

Hi Yi,

Thanks for your feedback.
I have changed the code and sent the PATCH v2.
Please review the  PATCH v2.

Thanks,
Wenxing



-Original Message-
From: Li, Yi1  
Sent: Monday, April 22, 2024 3:43 PM
To: Hou, Wenxing ; devel@edk2.groups.io
Cc: Yao, Jiewen 
Subject: RE: [PATCH] Add SHA3/SM3 functions with openssl for Mbedtls

Adding a copy of BaseCryptLib/Sm3/Sha3 seems like a workaround to me.
I prefer to use files directly from BaseCryptLib, such like:

DEFINE BASE_CRYPT_PATH= ../BaseCryptLib
[Sources]
  $(BASE_CRYPT_PATH)/Hash/CryptDispatchApDxe.c
  ...

Then I think DummyOpensslSupport.c should not be needed.

Regards,
Yi

-Original Message-
From: Hou, Wenxing  
Sent: Monday, April 22, 2024 9:34 AM
To: devel@edk2.groups.io
Cc: Yao, Jiewen ; Li, Yi1 
Subject: [PATCH] Add SHA3/SM3 functions with openssl for Mbedtls

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Because the Mbedlts 3.3.0 doesn't have SHA3 and Sm3, the SHA3 and Sm3
implementaion based on Openssl.

Cc: Jiewen Yao 
Cc: Yi Li 
Signed-off-by: Wenxing Hou 
---
 CryptoPkg/CryptoPkg.ci.yaml   |   1 +
 .../BaseCryptLibMbedTls/Hash/CryptCShake256.c | 282 +
 .../Hash/CryptDispatchApDxe.c |  49 ++
 .../Hash/CryptDispatchApMm.c  |  35 ++
 .../Hash/CryptDispatchApPei.c |  54 ++
 .../Hash/CryptParallelHash.c  | 254 
 .../Hash/CryptParallelHash.h  | 231 +++
 .../BaseCryptLibMbedTls/Hash/CryptSha3.c  | 166 +
 .../BaseCryptLibMbedTls/Hash/CryptSm3.c   | 235 +++
 .../BaseCryptLibMbedTls/Hash/CryptXkcp.c  | 107 
 .../SysCall/DummyOpensslSupport.c | 595 ++
 CryptoPkg/Library/MbedTlsLib/MbedTlsLib.inf   |   6 +
 .../Library/MbedTlsLib/MbedTlsLibFull.inf |   6 +
 13 files changed, 2021 insertions(+)
 create mode 100644 CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptCShake256.c
 create mode 100644 
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptDispatchApDxe.c
 create mode 100644 
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptDispatchApMm.c
 create mode 100644 
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptDispatchApPei.c
 create mode 100644 
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptParallelHash.c
 create mode 100644 
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptParallelHash.h
 create mode 100644 CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptSha3.c
 create mode 100644 CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptSm3.c
 create mode 100644 CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptXkcp.c
 create mode 100644 
CryptoPkg/Library/BaseCryptLibMbedTls/SysCall/DummyOpensslSupport.c

diff --git a/CryptoPkg/CryptoPkg.ci.yaml b/CryptoPkg/CryptoPkg.ci.yaml
index b601bcf85c..046cc05163 100644
--- a/CryptoPkg/CryptoPkg.ci.yaml
+++ b/CryptoPkg/CryptoPkg.ci.yaml
@@ -40,6 +40,7 @@
 "Library/Include/CrtLibSupport.h",

 # This has OpenSSL interfaces that aren't UEFI spec compliant

 "Library/BaseCryptLib/Hash/CryptParallelHash.h",

+"Library/BaseCryptLibMbedTls/Hash/CryptParallelHash.h",

 "Library/Include/fcntl.h",

 # This has Mbedtls interfaces that aren't UEFI spec compliant

 "Library/Include/stdint.h",

diff --git a/CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptCShake256.c 
b/CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptCShake256.c
new file mode 100644
index 00..64d8fa97c5
--- /dev/null
+++ b/CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptCShake256.c
@@ -0,0 +1,282 @@
+/** @file

+  cSHAKE-256 Digest Wrapper Implementations.

+

+Copyright (c) 2024, Intel Corporation. All rights reserved.

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include "CryptParallelHash.h"

+

+#define  CSHAKE256_SECURITY_STRENGTH  256

+#define  CSHAKE256_RATE_IN_BYTES  136

+

+CONST CHAR8  mZeroPadding[CSHAKE256_RATE_IN_BYTES] = { 0 };

+

+/**

+  CShake256 initial function.

+

+  Initializes user-supplied memory pointed by CShake256Context as cSHAKE-256 
hash context for

+  subsequent use.

+

+  @param[out] CShake256Context  Pointer to cSHAKE-256 context being 
initialized.

+  @param[in]  OutputLen The desired number of output length in bytes.

+  @param[in]  Name  Pointer to the function name string.

+  @param[in]  NameLen   The length of the function name in bytes.

+  @param[in]  Customization Pointer to the customization string.

+  @param[in]  CustomizationLen  The length of the customization string in 
bytes.

+

+  @retval TRUE   cSHAKE-256 context initialization succeeded.

+  @retval FALSE  cSHAKE-256 context initialization failed.

+  @retval FALSE  This interface is not supported.

+**/

+BOOLEAN

+EFIAPI

+CShake256Init (

+  OUT  VOID*CShake256Context,

+  IN   UINTN   OutputLen,

+  IN   CONST VOID  *Name,

+  IN   UINTN   NameLen,

+  IN   CONST VOID  *Customization,

+  IN

[edk2-devel] [PATCH v2] Add SHA3/SM3 functions with openssl for Mbedtls

2024-04-24 Thread Wenxing Hou

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4177

Because the Mbedlts 3.3.0 doesn't have SHA3 and Sm3, the SHA3 and Sm3
implementaion based on Openssl.
And the implementaion has passed build check.

Cc: Jiewen Yao 
Cc: Yi Li 
Signed-off-by: Wenxing Hou 
---
 CryptoPkg/Library/BaseCryptLibMbedTls/BaseCryptLib.inf   | 9 +++--
 CryptoPkg/Library/BaseCryptLibMbedTls/PeiCryptLib.inf| 9 +++--
 .../Library/BaseCryptLibMbedTls/RuntimeCryptLib.inf  | 3 ++-
 CryptoPkg/Library/BaseCryptLibMbedTls/SmmCryptLib.inf| 9 +++--
 .../Library/BaseCryptLibMbedTls/TestBaseCryptLib.inf | 4 +++-
 CryptoPkg/Library/MbedTlsLib/MbedTlsLib.inf  | 6 ++
 CryptoPkg/Library/MbedTlsLib/MbedTlsLibFull.inf  | 6 ++
 7 files changed, 38 insertions(+), 8 deletions(-)

diff --git a/CryptoPkg/Library/BaseCryptLibMbedTls/BaseCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLibMbedTls/BaseCryptLib.inf
index 16def792c5..999054500f 100644
--- a/CryptoPkg/Library/BaseCryptLibMbedTls/BaseCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibMbedTls/BaseCryptLib.inf
@@ -18,6 +18,7 @@
   MODULE_TYPE= DXE_DRIVER
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = BaseCryptLib|DXE_DRIVER DXE_CORE 
UEFI_APPLICATION UEFI_DRIVER
+  DEFINE BASE_CRYPT_PATH = ../BaseCryptLib
 
 #
 # The following information is for reference only and not required by the 
build tools.
@@ -31,10 +32,14 @@
   Cipher/CryptAes.c
   Hash/CryptSha256.c
   Hash/CryptSha512.c
-  Hash/CryptParallelHashNull.c
-  Hash/CryptSm3Null.c
   Hash/CryptMd5.c
   Hash/CryptSha1.c
+  $(BASE_CRYPT_PATH)/Hash/CryptCShake256.c
+  $(BASE_CRYPT_PATH)/Hash/CryptDispatchApDxe.c
+  $(BASE_CRYPT_PATH)/Hash/CryptParallelHash.c
+  $(BASE_CRYPT_PATH)/Hash/CryptSha3.c
+  $(BASE_CRYPT_PATH)/Hash/CryptSm3.c
+  $(BASE_CRYPT_PATH)/Hash/CryptXkcp.c
   Hmac/CryptHmac.c
   Kdf/CryptHkdf.c
   Pk/CryptRsaBasic.c
diff --git a/CryptoPkg/Library/BaseCryptLibMbedTls/PeiCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLibMbedTls/PeiCryptLib.inf
index 72b22a24e8..a153c0c8e4 100644
--- a/CryptoPkg/Library/BaseCryptLibMbedTls/PeiCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibMbedTls/PeiCryptLib.inf
@@ -26,6 +26,7 @@
   MODULE_TYPE= PEIM
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = BaseCryptLib|PEIM PEI_CORE
+  DEFINE BASE_CRYPT_PATH = ../BaseCryptLib
 
 #
 # The following information is for reference only and not required by the 
build tools.
@@ -38,9 +39,13 @@
   Hash/CryptMd5.c
   Hash/CryptSha1.c
   Hash/CryptSha256.c
-  Hash/CryptSm3Null.c
   Hash/CryptSha512.c
-  Hash/CryptParallelHashNull.c
+  $(BASE_CRYPT_PATH)/Hash/CryptCShake256.c
+  $(BASE_CRYPT_PATH)/Hash/CryptDispatchApPei.c
+  $(BASE_CRYPT_PATH)/Hash/CryptParallelHash.c
+  $(BASE_CRYPT_PATH)/Hash/CryptSha3.c
+  $(BASE_CRYPT_PATH)/Hash/CryptSm3.c
+  $(BASE_CRYPT_PATH)/Hash/CryptXkcp.c
   Hmac/CryptHmac.c
   Kdf/CryptHkdf.c
   Cipher/CryptAes.c
diff --git a/CryptoPkg/Library/BaseCryptLibMbedTls/RuntimeCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLibMbedTls/RuntimeCryptLib.inf
index 9f17ef00bf..1b33dbdaad 100644
--- a/CryptoPkg/Library/BaseCryptLibMbedTls/RuntimeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibMbedTls/RuntimeCryptLib.inf
@@ -25,6 +25,7 @@
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = BaseCryptLib|DXE_RUNTIME_DRIVER
   CONSTRUCTOR= RuntimeCryptLibConstructor
+  DEFINE BASE_CRYPT_PATH = ../BaseCryptLib
 
 #
 # The following information is for reference only and not required by the 
build tools.
@@ -37,9 +38,9 @@
   Hash/CryptMd5.c
   Hash/CryptSha1.c
   Hash/CryptSha256.c
-  Hash/CryptSm3Null.c
   Hash/CryptSha512.c
   Hash/CryptParallelHashNull.c
+  $(BASE_CRYPT_PATH)/Hash/CryptSm3.c
   Hmac/CryptHmac.c
   Kdf/CryptHkdf.c
   Cipher/CryptAes.c
diff --git a/CryptoPkg/Library/BaseCryptLibMbedTls/SmmCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLibMbedTls/SmmCryptLib.inf
index 40c56d1b7d..d9a9cb8d10 100644
--- a/CryptoPkg/Library/BaseCryptLibMbedTls/SmmCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibMbedTls/SmmCryptLib.inf
@@ -24,6 +24,7 @@
   VERSION_STRING = 1.0
   PI_SPECIFICATION_VERSION   = 0x0001000A
   LIBRARY_CLASS  = BaseCryptLib|DXE_SMM_DRIVER SMM_CORE 
MM_STANDALONE
+  DEFINE BASE_CRYPT_PATH = ../BaseCryptLib
 
 #
 # The following information is for reference only and not required by the 
build tools.
@@ -36,9 +37,13 @@
   Hash/CryptMd5.c
   Hash/CryptSha1.c
   Hash/CryptSha256.c
-  Hash/CryptSm3Null.c
   Hash/CryptSha512.c
-  Hash/CryptParallelHashNull.c
+  $(BASE_CRYPT_PATH)/Hash/CryptCShake256.c
+  $(BASE_CRYPT_PATH)/Hash/CryptDispatchApMm.c
+  $(BASE_CRYPT_PATH)/Hash/CryptParallelHash.c
+  $(BASE_CRYPT_PATH)/Hash/CryptSha3.c
+  $(BASE_CRYPT_PATH)/Hash/CryptSm3.c
+  $(BASE_CRYPT_PATH)/Hash/CryptXkcp.c
   Hmac/CryptHmac.c
   Kdf/CryptHkdf.c
   Cipher/CryptAes.c
diff --git

Re: [edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Yao, Jiewen

Reviewed-by: Jiewen Yao 

> -Original Message-
> From: Gerd Hoffmann 
> Sent: Wednesday, April 24, 2024 2:00 PM
> To: devel@edk2.groups.io
> Cc: Oliver Steffen ; Gerd Hoffmann
> ; Ard Biesheuvel ; Yao, Jiewen
> ; Srikanth Aithal 
> Subject: [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in 
> confidential
> guests
> 
> The VirtHstiDxe does not work in confidential guests.  There also isn't
> anything we can reasonably test, neither flash storage nor SMM mode will
> be used in that case.  So just skip driver load when running in a
> confidential guest.
> 
> Cc: Ard Biesheuvel 
> Cc: Jiewen Yao 
> Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
> Signed-off-by: Gerd Hoffmann 
> Tested-by: Srikanth Aithal 
> ---
>  OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
>  OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> index 9514933011e8..b5c237288766 100644
> --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
> @@ -49,6 +49,7 @@ [FeaturePcd]
>gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
> 
>  [Pcd]
> +  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
>gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
> 
> diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> index b6e53a1219d1..efaff0d1f3cb 100644
> --- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> +++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
> @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
> 
>  #include 
> @@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
>EFI_STATUS   Status;
>EFI_EVENTEvent;
> 
> +  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
> +DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
> +return EFI_UNSUPPORTED;
> +  }
> +
>DevId = VirtHstiGetHostBridgeDevId ();
>switch (DevId) {
>  case INTEL_82441_DEVICE_ID:
> --
> 2.44.0



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[edk2-devel] [PATCH v4 1/1] OvmfPkg/VirtHstiDxe: do not load driver in confidential guests

2024-04-24 Thread Gerd Hoffmann

The VirtHstiDxe does not work in confidential guests.  There also isn't
anything we can reasonably test, neither flash storage nor SMM mode will
be used in that case.  So just skip driver load when running in a
confidential guest.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Fixes: 506740982bba ("OvmfPkg/VirtHstiDxe: add code flash check")
Signed-off-by: Gerd Hoffmann 
Tested-by: Srikanth Aithal 
---
 OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf | 1 +
 OvmfPkg/VirtHstiDxe/VirtHstiDxe.c   | 6 ++
 2 files changed, 7 insertions(+)

diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
index 9514933011e8..b5c237288766 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.inf
@@ -49,6 +49,7 @@ [FeaturePcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
 
 [Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
   gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase
 
diff --git a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c 
b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
index b6e53a1219d1..efaff0d1f3cb 100644
--- a/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
+++ b/OvmfPkg/VirtHstiDxe/VirtHstiDxe.c
@@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -140,6 +141,11 @@ VirtHstiDxeEntrypoint (
   EFI_STATUS   Status;
   EFI_EVENTEvent;
 
+  if (PcdGet64 (PcdConfidentialComputingGuestAttr)) {
+DEBUG ((DEBUG_INFO, "%a: confidential guest\n", __func__));
+return EFI_UNSUPPORTED;
+  }
+
   DevId = VirtHstiGetHostBridgeDevId ();
   switch (DevId) {
 case INTEL_82441_DEVICE_ID:
-- 
2.44.0



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