Re: [edk2-devel] [PATCH v1 1/2] OvmfPkg: Add no hardcode version of FtdNorFlashQemuLib

[Chao Li]

Hi Gerd, Ard and other maintainers,

So, Could you help to review this patch set and give me the R-B?


Thanks,
Chao
On 2024/5/27 14:38, Gerd Hoffmann wrote:

On Fri, May 24, 2024 at 11:11:41AM GMT, Marcin Juszkiewicz wrote:

W dniu 17.05.2024 o 09:17, Chao Li via groups.io pisze:

This library is copied from ArmVirtPkg, in the Arm version, the value of
PcdFlashNvStorageVariableBase, PcdFlashNvStorageFtwWorkingBase and
PcdFlashNvStorageFtwSpareBase are hardcoded in INC file.

This version will calculate them from FDT resource and using the set PCD
to store when the NorFlashInitialise is called. By default, the first
available flash(not used for storage UEFI code) as NV variable storage
medium.

In this way, UEFI can better handle the change of flash base address,
which is suitable for different cpu architecture board implementation.

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4770

Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hoffmann
Cc: Jiewen Yao
Signed-off-by: Chao Li
Signed-off-by: Xianglai Li

Can you split it into driver itself and part which uses DT data to setup
parameters?

Hmm?  This split exists already.  This is a library for flash detection,
which is used by the flash driver (VirtNorFlashDxe) to find flash.  If
using fdt doesn't work for sbsa-ref you can implement an alternative
without rewriting the driver itself.

take care,
   Gerd



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Re: [edk2-devel] [PATCH v1 0/2] Add a new FdtNorFalshQemuLib and enable it in

[Chao Li]

Hi Ard and other maintainers,

Could you help to review this patch set?


Thanks,
Chao
On 2024/5/17 15:33, Chao Li wrote:


Hi Ard,

No, it's just that my email was bounced just now, the groupio didn't 
receive my email when I send the first time, and I sent them again 
after it unbounce.


On 2024/5/17 15:21, Ard Biesheuvel wrote:

Hello Chao Li,

You sent two series in quick succession. Is there any difference
between the two?


On Fri, 17 May 2024 at 09:17, Chao Li  wrote:

Patch1: Added a new library called FdtNorFlashQemuLib in OvmfPkg/Library
which is non-hardcode dependency.
Patch2: Enable the new library in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4770

I have verified on both of the two platforms:
Prepare:
install libvirt, virt-manager, qemu-systemaarch64.

Step 1:
Built the two platforms with ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc, and then using the command create the pflash
files:
Build the two platforms firmware using ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc, and then create the pflash files using following
command:
cat QEMU_EFI.fd  /dev/zero | head -c 64m > ./QEMU_EFI-pflash.raw
cat QEMU_VARS.fd  /dev/zero | head -c 64m > ./vars-template-pflash.raw
qemu-img convert -f raw -O qcow2 -o cluster_size=4096 -S 4096 
QEMU_EFI-pflash.raw  QEMU_EFI-pflash.qcow2
qemu-img convert -f raw -O qcow2 -o cluster_size=4096 -S 4096 
vars-template-pflash.raw vars-template-pflash.qcow2

Download a AARCH64 QCOW2 image.
Copy them into /usr/share/edk2/aarch64/.

Step 2:
Verification the pflash working:
ArmVirtQemu:
Run the QEMU ARM virt machine using the following command:
qemu-system-aarch64 \
 -blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/QEMU_EFI-pflash.qcow2","node-name":"libvirt-pflash0-storage","auto-read-only":true,"discard":"unmap"}'
 \
 -blockdev 
'{"node-name":"libvirt-pflash0-format","read-only":true,"driver":"qcow2","file":"libvirt-pflash0-storage"}'
 \
 -blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/vars-template-pflash.qcow2","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}'
 \
 -blockdev 
'{"node-name":"libvirt-pflash1-format","read-only":false,"driver":"qcow2","file":"libvirt-pflash1-storage"}'
 \
 -machine 
virt,pflash0=libvirt-pflash0-format,pflash1=libvirt-pflash1-format,acpi=on \
 -cpu cortex-a57 \
 -m size=2097152k \
 -serial stdio \
 -net none \
 -device ramfb \
 -device nec-usb-xhci \
 -device usb-mouse \
 -device usb-kbd

ArmVirtQemuKernel:
Run the QEMU kernel ARM virt machine using the following command:
qemu-system-aarch64 \
 -blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/vars-template-pflash.raw","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}'
 \
 -blockdev 
'{"node-name":"libvirt-pflash1-format","read-only":false,"driver":"raw","file":"libvirt-pflash1-storage"}'
 \
 -machine 
virt,usb=off,dump-guest-core=off,gic-version=3,pflash1=libvirt-pflash1-format \
 -cpu cortex-a57 \
 -m 4096 \
 -smp 1,sockets=1,cores=1,threads=1 \
 -no-user-config \
 -nodefaults \
 -device virtio-gpu-pci \
 -kernel /usr/share/edk2/aarch64/QEMU_EFI-pflash.raw \
 -serial stdio \
 -device nec-usb-xhci \
 -device usb-mouse \
 -device usb-kbd  \
 -hda /usr/share/edk2/aarch64/openEuler-22.03-LTS-SP3-aarch64.qcow2 \
 -monitor tcp::,server,nowait

Step 3:
After the virt-machines starts, enter "F2" to enter the setup UI, try to
change the boot order or some ther variables stored in the flash, then
enter "F10" to save the changes and reboot it.
After restarting, enter "F2" to enter the setup UI and check whether the
changes before the restart operation have been saved.


Using the above three steps, both platforms will works fine.

I have not created the PR in github yet, I will create it once the edk2
merge window reopens.

Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hoffmann
Cc: Jiewen Yao

Chao Li (2):
   OvmfPkg: Add no hardcode version of FtdNorFlashQemuLib
   ArmVirtPkg: Enable the non-hardcode version FtdNorFlashQemuLib

  ArmVirtPkg/ArmVirtQemu.dsc|  21 ++-
  ArmVirtPkg/ArmVirtQemuKernel.dsc  |  20 ++-
  ArmVirtPkg/VarStore.fdf.inc   |   5 +-
  .../FdtNorFlashQemuLib/FdtNorFlashQemuLib.c   | 165 ++
  .../FdtNorFlashQemuLib/FdtNorFlashQemuL

Re: [edk2-devel] [PATCH v1 0/2] Add a new FdtNorFalshQemuLib and enable it in

[Chao Li]

Hi Ard,

No, it's just that my email was bounced just now, the groupio didn't 
receive my email when I send the first time, and I sent them again after 
it unbounce.



Thanks,
Chao
On 2024/5/17 15:21, Ard Biesheuvel wrote:

Hello Chao Li,

You sent two series in quick succession. Is there any difference
between the two?


On Fri, 17 May 2024 at 09:17, Chao Li  wrote:

Patch1: Added a new library called FdtNorFlashQemuLib in OvmfPkg/Library
which is non-hardcode dependency.
Patch2: Enable the new library in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4770

I have verified on both of the two platforms:
Prepare:
install libvirt, virt-manager, qemu-systemaarch64.

Step 1:
Built the two platforms with ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc, and then using the command create the pflash
files:
Build the two platforms firmware using ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc, and then create the pflash files using following
command:
cat QEMU_EFI.fd  /dev/zero | head -c 64m > ./QEMU_EFI-pflash.raw
cat QEMU_VARS.fd  /dev/zero | head -c 64m > ./vars-template-pflash.raw
qemu-img convert -f raw -O qcow2 -o cluster_size=4096 -S 4096 
QEMU_EFI-pflash.raw  QEMU_EFI-pflash.qcow2
qemu-img convert -f raw -O qcow2 -o cluster_size=4096 -S 4096 
vars-template-pflash.raw vars-template-pflash.qcow2

Download a AARCH64 QCOW2 image.
Copy them into /usr/share/edk2/aarch64/.

Step 2:
Verification the pflash working:
ArmVirtQemu:
Run the QEMU ARM virt machine using the following command:
qemu-system-aarch64 \
 -blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/QEMU_EFI-pflash.qcow2","node-name":"libvirt-pflash0-storage","auto-read-only":true,"discard":"unmap"}'
 \
 -blockdev 
'{"node-name":"libvirt-pflash0-format","read-only":true,"driver":"qcow2","file":"libvirt-pflash0-storage"}'
 \
 -blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/vars-template-pflash.qcow2","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}'
 \
 -blockdev 
'{"node-name":"libvirt-pflash1-format","read-only":false,"driver":"qcow2","file":"libvirt-pflash1-storage"}'
 \
 -machine 
virt,pflash0=libvirt-pflash0-format,pflash1=libvirt-pflash1-format,acpi=on \
 -cpu cortex-a57 \
 -m size=2097152k \
 -serial stdio \
 -net none \
 -device ramfb \
 -device nec-usb-xhci \
 -device usb-mouse \
 -device usb-kbd

ArmVirtQemuKernel:
Run the QEMU kernel ARM virt machine using the following command:
qemu-system-aarch64 \
 -blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/vars-template-pflash.raw","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}'
 \
 -blockdev 
'{"node-name":"libvirt-pflash1-format","read-only":false,"driver":"raw","file":"libvirt-pflash1-storage"}'
 \
 -machine 
virt,usb=off,dump-guest-core=off,gic-version=3,pflash1=libvirt-pflash1-format \
 -cpu cortex-a57 \
 -m 4096 \
 -smp 1,sockets=1,cores=1,threads=1 \
 -no-user-config \
 -nodefaults \
 -device virtio-gpu-pci \
 -kernel /usr/share/edk2/aarch64/QEMU_EFI-pflash.raw \
 -serial stdio \
 -device nec-usb-xhci \
 -device usb-mouse \
 -device usb-kbd  \
 -hda /usr/share/edk2/aarch64/openEuler-22.03-LTS-SP3-aarch64.qcow2 \
 -monitor tcp::,server,nowait

Step 3:
After the virt-machines starts, enter "F2" to enter the setup UI, try to
change the boot order or some ther variables stored in the flash, then
enter "F10" to save the changes and reboot it.
After restarting, enter "F2" to enter the setup UI and check whether the
changes before the restart operation have been saved.


Using the above three steps, both platforms will works fine.

I have not created the PR in github yet, I will create it once the edk2
merge window reopens.

Cc: Ard Biesheuvel
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Gerd Hoffmann
Cc: Jiewen Yao

Chao Li (2):
   OvmfPkg: Add no hardcode version of FtdNorFlashQemuLib
   ArmVirtPkg: Enable the non-hardcode version FtdNorFlashQemuLib

  ArmVirtPkg/ArmVirtQemu.dsc|  21 ++-
  ArmVirtPkg/ArmVirtQemuKernel.dsc  |  20 ++-
  ArmVirtPkg/VarStore.fdf.inc   |   5 +-
  .../FdtNorFlashQemuLib/FdtNorFlashQemuLib.c   | 165 ++
  .../FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf |  46 +
  5 files changed, 249 insertions(+), 8 deletions(-)
  create mode 100644 OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.c
  create mode 100644 OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf

--
2.27.0













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[edk2-devel] [PATCH v1 2/2] ArmVirtPkg: Enable the non-hardcode version FtdNorFlashQemuLib

[Chao Li]

Enable the non-hardcode version of FtdNorFlashQemuLib in ArmVirtQemu.dsc
and ArmVirtQemuKernel.dsc, and it can work rightly after enabling it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4770

Build-tested (with "ArmVirtQemu.dsc" and "ArmVirtQemuKernel.dsc").

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Signed-off-by: Chao Li 
Signed-off-by: Xianglai Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 21 +++--
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 20 ++--
 ArmVirtPkg/VarStore.fdf.inc  |  5 +
 3 files changed, 38 insertions(+), 8 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index 7e2ff33ad1..2ecbb5d041 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -66,7 +66,7 @@ [LibraryClasses.common]
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
 
   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
-  
VirtNorFlashPlatformLib|ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf
+  
VirtNorFlashPlatformLib|OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
@@ -152,6 +152,9 @@ [PcdsFixedAtBuild.common]
   gArmTokenSpaceGuid.PcdVFPEnabled|1
 !endif
 
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|$(FD_SIZE)
+
   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x4007c000
   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
@@ -231,6 +234,10 @@ [PcdsFixedAtBuild.common]
   # System Memory Size -- 128 MB initially, actual size will be fetched from DT
   gArmTokenSpaceGuid.PcdSystemMemorySize|0x800
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize   | 0x4
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize   | 0x4
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize | 0x4
+
 [PcdsFixedAtBuild.AARCH64]
   # Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point,
   # if the entry point version is >= 3.0. AARCH64 OSes cannot assume the
@@ -243,6 +250,13 @@ [PcdsFixedAtBuild.AARCH64]
 [PcdsDynamicDefault.common]
   gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase | 0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64   | 0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64   | 0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase | 0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase   | 0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64 | 0
+
   ## If TRUE, OvmfPkg/AcpiPlatformDxe will not wait for PCI
   #  enumeration to complete before installing ACPI tables.
   gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
@@ -404,7 +418,10 @@ [Components.common]
   MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 !endif
   MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf {
+
+  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf
+  }
   
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
   MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
   EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf {
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index efe2df97bd..0242413dc8 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -65,7 +65,7 @@ [LibraryClasses.common]
   
ArmVirtMemInfoLib|ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf
 
   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
-  
VirtNorFlashPlatformLib|ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf
+  
VirtNorFlashPlatformLib|OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf
 
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
@@ -120,6 +120,8 @@ [PcdsFixedAtBuild.common]
   gArmTokenSpaceGuid.PcdVFPEnabled|1
 !endif
 
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|$(FD_SIZE)
   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
@@ -181,6 +183,10 @@ [PcdsFixedAtBuild.common]
   gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|3
   gEfiShellPkgTokenSpaceGuid.PcdShellFi

[edk2-devel] [PATCH v1 1/2] OvmfPkg: Add no hardcode version of FtdNorFlashQemuLib

[Chao Li]

This library is copied from ArmVirtPkg, in the Arm version, the value of
PcdFlashNvStorageVariableBase, PcdFlashNvStorageFtwWorkingBase and
PcdFlashNvStorageFtwSpareBase are hardcoded in INC file.

This version will calculate them from FDT resource and using the set PCD
to store when the NorFlashInitialise is called. By default, the first
available flash(not used for storage UEFI code) as NV variable storage
medium.

In this way, UEFI can better handle the change of flash base address,
which is suitable for different cpu architecture board implementation.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4770

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 
Signed-off-by: Chao Li 
Signed-off-by: Xianglai Li 
---
 .../FdtNorFlashQemuLib/FdtNorFlashQemuLib.c   | 165 ++
 .../FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf |  46 +
 2 files changed, 211 insertions(+)
 create mode 100644 OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.c
 create mode 100644 OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf

diff --git a/OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.c 
b/OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.c
new file mode 100644
index 00..e5c7d4cdfa
--- /dev/null
+++ b/OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.c
@@ -0,0 +1,165 @@
+/** @file
+
+  Copyright (c) 2014-2018, Linaro Ltd. All rights reserved.
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#define QEMU_NOR_BLOCK_SIZE  SIZE_256KB
+#define MAX_FLASH_BANKS  4
+
+STATIC VIRT_NOR_FLASH_DESCRIPTION  mNorFlashDevices[MAX_FLASH_BANKS];
+
+EFI_STATUS
+VirtNorFlashPlatformInitialization (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+VirtNorFlashPlatformGetDevices (
+  OUT VIRT_NOR_FLASH_DESCRIPTION  **NorFlashDescriptions,
+  OUT UINT32  *Count
+  )
+{
+  FDT_CLIENT_PROTOCOL  *FdtClient;
+  INT32Node;
+  EFI_STATUS   Status;
+  EFI_STATUS   FindNodeStatus;
+  CONST UINT32 *Reg;
+  UINT32   PropSize;
+  UINT32   Num;
+  UINT64   Base;
+  UINT64   Size;
+  BOOLEAN  Found;
+
+  Status = gBS->LocateProtocol (
+  ,
+  NULL,
+  (VOID **)
+  );
+  ASSERT_EFI_ERROR (Status);
+
+  Num   = 0;
+  Found = FALSE;
+  for (FindNodeStatus = FdtClient->FindCompatibleNode (
+ FdtClient,
+ "cfi-flash",
+ 
+ );
+   !EFI_ERROR (FindNodeStatus) && Num < MAX_FLASH_BANKS;
+   FindNodeStatus = FdtClient->FindNextCompatibleNode (
+ FdtClient,
+ "cfi-flash",
+ Node,
+ 
+ ))
+  {
+Status = FdtClient->GetNodeProperty (
+  FdtClient,
+  Node,
+  "reg",
+  (CONST VOID **),
+  
+  );
+if (EFI_ERROR (Status)) {
+  DEBUG ((
+DEBUG_ERROR,
+"%a: GetNodeProperty () failed (Status == %r)\n",
+__func__,
+Status
+));
+  continue;
+}
+
+ASSERT ((PropSize % (4 * sizeof (UINT32))) == 0);
+
+while (PropSize >= (4 * sizeof (UINT32)) && Num < MAX_FLASH_BANKS) {
+  Base = SwapBytes64 (ReadUnaligned64 ((VOID *)[0]));
+  Size = SwapBytes64 (ReadUnaligned64 ((VOID *)[2]));
+  Reg += 4;
+
+  PropSize -= 4 * sizeof (UINT32);
+
+  //
+  // Disregard any flash devices that overlap with the primary FV.
+  // The firmware is not updatable from inside the guest anyway.
+  //
+  if ((PcdGet32 (PcdOvmfFdBaseAddress) + PcdGet32 (PcdOvmfFirmwareFdSize) 
> Base) &&
+  ((Base + Size) > PcdGet32 (PcdOvmfFdBaseAddress)))
+  {
+continue;
+  }
+
+  mNorFlashDevices[Num].DeviceBaseAddress = (UINTN)Base;
+  mNorFlashDevices[Num].RegionBaseAddress = (UINTN)Base;
+  mNorFlashDevices[Num].Size  = (UINTN)Size;
+  mNorFlashDevices[Num].BlockSize = QEMU_NOR_BLOCK_SIZE;
+  Num++;
+  if (!Found) {
+//
+// By default, the second available flash is stored as a non-volatile 
variable.
+//
+Status = PcdSet32S (PcdFlashNvStorageVariableBase, Base);
+ASSERT_EFI_ERROR (Status);
+
+//
+// The Base is the value of PcdFlashNvStorageVariableBase,
+// PcdFlashNvStorageFtwWorkingB

[edk2-devel] [PATCH v1 0/2] Add a new FdtNorFalshQemuLib and enable it in

[Chao Li]

Patch1: Added a new library called FdtNorFlashQemuLib in OvmfPkg/Library
which is non-hardcode dependency.
Patch2: Enable the new library in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4770

I have verified on both of the two platforms:
Prepare:
install libvirt, virt-manager, qemu-systemaarch64.

Step 1:
Built the two platforms with ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc, and then using the command create the pflash
files:
Build the two platforms firmware using ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc, and then create the pflash files using following
command:
cat QEMU_EFI.fd  /dev/zero | head -c 64m > ./QEMU_EFI-pflash.raw
cat QEMU_VARS.fd  /dev/zero | head -c 64m > ./vars-template-pflash.raw
qemu-img convert -f raw -O qcow2 -o cluster_size=4096 -S 4096 
QEMU_EFI-pflash.raw  QEMU_EFI-pflash.qcow2
qemu-img convert -f raw -O qcow2 -o cluster_size=4096 -S 4096 
vars-template-pflash.raw vars-template-pflash.qcow2

Download a AARCH64 QCOW2 image.
Copy them into /usr/share/edk2/aarch64/.

Step 2:
Verification the pflash working:
ArmVirtQemu:
Run the QEMU ARM virt machine using the following command:
qemu-system-aarch64 \
-blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/QEMU_EFI-pflash.qcow2","node-name":"libvirt-pflash0-storage","auto-read-only":true,"discard":"unmap"}'
 \
-blockdev 
'{"node-name":"libvirt-pflash0-format","read-only":true,"driver":"qcow2","file":"libvirt-pflash0-storage"}'
 \
-blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/vars-template-pflash.qcow2","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}'
 \
-blockdev 
'{"node-name":"libvirt-pflash1-format","read-only":false,"driver":"qcow2","file":"libvirt-pflash1-storage"}'
 \
-machine 
virt,pflash0=libvirt-pflash0-format,pflash1=libvirt-pflash1-format,acpi=on \
-cpu cortex-a57 \
-m size=2097152k \
-serial stdio \
-net none \
-device ramfb \
-device nec-usb-xhci \
-device usb-mouse \
-device usb-kbd

ArmVirtQemuKernel:
Run the QEMU kernel ARM virt machine using the following command:
qemu-system-aarch64 \
-blockdev 
'{"driver":"file","filename":"/usr/share/edk2/aarch64/vars-template-pflash.raw","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}'
 \
-blockdev 
'{"node-name":"libvirt-pflash1-format","read-only":false,"driver":"raw","file":"libvirt-pflash1-storage"}'
 \
-machine 
virt,usb=off,dump-guest-core=off,gic-version=3,pflash1=libvirt-pflash1-format \
-cpu cortex-a57 \
-m 4096 \
-smp 1,sockets=1,cores=1,threads=1 \
-no-user-config \
-nodefaults \
-device virtio-gpu-pci \
-kernel /usr/share/edk2/aarch64/QEMU_EFI-pflash.raw \
-serial stdio \
-device nec-usb-xhci \
-device usb-mouse \
-device usb-kbd  \
-hda /usr/share/edk2/aarch64/openEuler-22.03-LTS-SP3-aarch64.qcow2 \
-monitor tcp::,server,nowait

Step 3:
After the virt-machines starts, enter "F2" to enter the setup UI, try to
change the boot order or some ther variables stored in the flash, then
enter "F10" to save the changes and reboot it.
After restarting, enter "F2" to enter the setup UI and check whether the
changes before the restart operation have been saved.


Using the above three steps, both platforms will works fine.

I have not created the PR in github yet, I will create it once the edk2
merge window reopens.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Gerd Hoffmann 
Cc: Jiewen Yao 

Chao Li (2):
  OvmfPkg: Add no hardcode version of FtdNorFlashQemuLib
  ArmVirtPkg: Enable the non-hardcode version FtdNorFlashQemuLib

 ArmVirtPkg/ArmVirtQemu.dsc|  21 ++-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |  20 ++-
 ArmVirtPkg/VarStore.fdf.inc   |   5 +-
 .../FdtNorFlashQemuLib/FdtNorFlashQemuLib.c   | 165 ++
 .../FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf |  46 +
 5 files changed, 249 insertions(+), 8 deletions(-)
 create mode 100644 OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.c
 create mode 100644 OvmfPkg/Library/FdtNorFlashQemuLib/FdtNorFlashQemuLib.inf

-- 
2.27.0



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Re: [edk2-devel] [edk2-platforms] Platform/Loongson: Fix compile error

[Chao Li]

Reviewed-by: Chao Li 


Thanks,
Chao
On 2024/5/15 17:47, Xianglai Li wrote:

QemuFwCfgLibMmio has been removed,
using the latest FwCfgLib to fix compilation errors

Cc: Bibo Mao
Cc: Chao Li
Cc: Gerd Hoffmann
Signed-off-by: Xianglai Li
---
  Platform/Loongson/LoongArchQemuPkg/Loongson.dsc | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index 58aa16d3a9..7e891ad225 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -180,7 +180,7 @@
#
VirtioLib| OvmfPkg/Library/VirtioLib/VirtioLib.inf
FrameBufferBltLib| 
MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
-  QemuFwCfgLib | 
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib | 
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
DebugLib | 
MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
PeiServicesLib   | 
MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
VariableFlashInfoLib | 
MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
@@ -257,7 +257,7 @@
ReportStatusCodeLib  | 
MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
UefiScsiLib  | 
MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
ExtractGuidedSectionLib  | 
MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
-  QemuFwCfgLib | 
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib | 
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
PciPcdProducerLib| 
OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
  
  [LibraryClasses.common.DXE_DRIVER]

@@ -269,7 +269,7 @@
CpuExceptionHandlerLib   | 
UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
ExtractGuidedSectionLib  | 
MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
QemuFwCfgS3Lib   | 
OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
-  QemuFwCfgLib | 
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib | 
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
PciPcdProducerLib| 
OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
PciExpressLib| 
MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
AcpiPlatformLib  | 
OvmfPkg/Library/AcpiPlatformLib/DxeAcpiPlatformLib.inf



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Re: [edk2-devel] edk2-test Release candidate 2: edk2-test-rc2_202405 // RE: [PATCH v2 0/4] TCG2 protocol clean up

[Chao Li]

Hi Edhay,

Okay, I will retest using the rc2 today and expect to upload the logs 
tonight or next Monday under edk2-test-rc2-202405.



Thanks,
Chao
On 2024/5/10 22:56, G Edhaya Chandran wrote:


Hi Chao,

Yes, it is best to test based on the new tag at-least on one environment.

Note: The difference between old and new tag is mainly resolving build 
related issues.


There is no change in test coverage.

With WarM Regards,
Edhay

*From:*Chao Li 
*Sent:* Thursday, May 9, 2024 9:56 PM
*To:* devel@edk2.groups.io; G Edhaya Chandran 
; David Wright ; 
Heinrich Schuchardt 
*Cc:* Alex Fox ; Stuart Yoder 
; gao...@byosoft.com.cn
*Subject:* Re: [edk2-devel] edk2-test Release candidate 2: 
edk2-test-rc2_202405 // RE: [PATCH v2 0/4] TCG2 protocol clean up


Hi Edhay,

Do I need to retest based on the edk2-test-rc2_202405 tag?

Thanks,
Chao

On 2024/5/10 10:43, G Edhaya Chandran wrote:

Thank you, David.

The results are well received.

With Warm Regards,
Edhay

*From:*David Wright 
<mailto:david_wri...@phoenix.com>
*Sent:* Thursday, May 9, 2024 3:23 PM
*To:* G Edhaya Chandran 
<mailto:edhaya.chand...@arm.com>; Heinrich Schuchardt

<mailto:heinrich.schucha...@canonical.com>
*Cc:* Alex Fox 
<mailto:alex_...@phoenix.com>; lic...@loongson.cn; Stuart Yoder
 <mailto:stuart.yo...@arm.com>;
devel@edk2.groups.io; gao...@byosoft.com.cn
*Subject:* RE: edk2-test Release candidate 2: edk2-test-rc2_202405
// RE: [PATCH v2 0/4] TCG2 protocol clean up

Hi all,

Phoenix has completed testing on *edk2-test-rc2_202405*

Results have been uploaded to their respective folders.

Thanks,

David Wright
QA Team Leader

david_wri...@phoenix.com

503-730-4537 Tel

www.phoenix.com

<https://mailgw.loongson.cn/linkserver?dest=http%3A%2F%2Fwww.phoenix.com%2F=_8Dx2enliT1mLVoKAA--.14549S3=lic...@loongson.cn=1=0>


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THE INTENDED RECIPIENT OF THIS MESSAGE, ANY USE OF THIS MESSAGE IS
STRICTLY PROHIBITED. IF YOU HAVE RECEIVED THIS MESSAGE IN ERROR,
PLEASE IMMEDIATELY NOTIFY THE SENDER BY TELEPHONE OR REPLY EMAIL,
AND IMMEDIATELY DELETE THIS MESSAGE AND ALL COPIES.

*From:*G Edhaya Chandran 
*Sent:* Friday, May 3, 2024 4:47 PM
*To:* Heinrich Schuchardt 
*Cc:* Alex Fox ; David Wright
; lic...@loongson.cn; Stuart Yoder
; devel@edk2.groups.io; gao...@byosoft.com.cn
*Subject:* edk2-test Release candidate 2: edk2-test-rc2_202405 //
RE: [PATCH v2 0/4] TCG2 protocol clean up

[Caution, this message was sent from an external sender.]

Hi All,

   A new release candidate is published after upstreaming Stuart's
commits on build cleanup.

https://github.com/tianocore/edk2-test/tree/edk2-test-rc2_202405
<https://github.com/tianocore/edk2-test/tree/edk2-test-rc2_202405>

The updates since the old tag are the following commits in the
patch series:

[PATCH v2 0/4] TCG2 protocol clean up (groups.io)

<https://mailgw.loongson.cn/linkserver?dest=https%3A%2F%2Fedk2.groups.io%2Fg%2Fdevel%2Fmessage%2F117882%3Fp%3D%252C%252C%252C20%252C0%252C0%252C0%253A%253Arecentpostdate%252Fsticky%252C%252Cstuart%2Byoder%252C20%252C2%252C0%252C105558005=_8Dx2enliT1mLVoKAA--.14549S3=lic...@loongson.cn=1=1>

The release candidate may be used for any further testing.

With Warm Regards,
Edhay

> -Original Message-

> From: G Edhaya Chandran

> Sent: Tuesday, April 23, 2024 4:52 AM

> To: Heinrich Schuchardt 

> Cc: alex_...@phoenix.com; david_wri...@phoenix.com;

> lic...@loongson.cn; Stuart Yoder ;

> devel@edk2.groups.io; gao...@byosoft.com.cn

> Subject: RE: [PATCH v2 0/4] TCG2 protocol clean up

> 


> Hi Heinrich,

> 


>    Yes. A new release candidate shall be published after review and 
upstream

> of the patches.

> Will further send an update.

> 


> With Warm Regards,

> Edhay

> 

> 


> > -Original Message-

> > From: Heinrich Schuchardt 

> > Sent: Tuesday, April 23, 2024 12:46 AM

> > To: G Edhaya Chandran 

> > Cc: alex_...@phoenix.com; david_wri...@phoenix.com;

> > lic...@loongson.cn; Stuart Yoder ;

> > devel@edk2.groups.io; gao...@byosoft.com.cn

> > Subject: Re: [PATCH v2 0/4] TCG2 protocol clean up

> >

> > On 4/16/24 16:53, Stuart Yoder wrote:

> > > This patch series cleans up some issues found when building

> > > edk2-test with a non-GCC compiler:

> > >    -TPMT_HA struct had an error due to incorrect use of C flexible

> > > array

> > member

> > >    -compute struct member offsets using OFFSET_OF, which is not GC

Re: [edk2-devel] edk2-test Release candidate 2: edk2-test-rc2_202405 // RE: [PATCH v2 0/4] TCG2 protocol clean up

[Chao Li]

Hi Edhay,

Do I need to retest based on the edk2-test-rc2_202405 tag?


Thanks,
Chao
On 2024/5/10 10:43, G Edhaya Chandran wrote:


Thank you, David.

The results are well received.

With Warm Regards,
Edhay

*From:*David Wright 
*Sent:* Thursday, May 9, 2024 3:23 PM
*To:* G Edhaya Chandran ; Heinrich Schuchardt 

*Cc:* Alex Fox ; lic...@loongson.cn; Stuart 
Yoder ; devel@edk2.groups.io; gao...@byosoft.com.cn
*Subject:* RE: edk2-test Release candidate 2: edk2-test-rc2_202405 // 
RE: [PATCH v2 0/4] TCG2 protocol clean up


Hi all,

Phoenix has completed testing on *edk2-test-rc2_202405*

Results have been uploaded to their respective folders.

Thanks,

David Wright
QA Team Leader

david_wri...@phoenix.com

503-730-4537 Tel

www.phoenix.com 




THIS MESSAGE MAY CONTAIN CONFIDENTIAL INFORMATION. UNLESS YOU ARE THE 
INTENDED RECIPIENT OF THIS MESSAGE, ANY USE OF THIS MESSAGE IS 
STRICTLY PROHIBITED. IF YOU HAVE RECEIVED THIS MESSAGE IN ERROR, 
PLEASE IMMEDIATELY NOTIFY THE SENDER BY TELEPHONE OR REPLY EMAIL, AND 
IMMEDIATELY DELETE THIS MESSAGE AND ALL COPIES.


*From:*G Edhaya Chandran 
*Sent:* Friday, May 3, 2024 4:47 PM
*To:* Heinrich Schuchardt 
*Cc:* Alex Fox ; David Wright 
; lic...@loongson.cn; Stuart Yoder 
; devel@edk2.groups.io; gao...@byosoft.com.cn
*Subject:* edk2-test Release candidate 2: edk2-test-rc2_202405 // RE: 
[PATCH v2 0/4] TCG2 protocol clean up


[Caution, this message was sent from an external sender.]

Hi All,

   A new release candidate is published after upstreaming Stuart's 
commits on build cleanup.


https://github.com/tianocore/edk2-test/tree/edk2-test-rc2_202405 



The updates since the old tag are the following commits in the patch 
series:


[PATCH v2 0/4] TCG2 protocol clean up (groups.io) 



The release candidate may be used for any further testing.

With Warm Regards,
Edhay

> -Original Message-

> From: G Edhaya Chandran

> Sent: Tuesday, April 23, 2024 4:52 AM

> To: Heinrich Schuchardt 

> Cc: alex_...@phoenix.com; david_wri...@phoenix.com;

> lic...@loongson.cn; Stuart Yoder ;

> devel@edk2.groups.io; gao...@byosoft.com.cn

> Subject: RE: [PATCH v2 0/4] TCG2 protocol clean up

> 


> Hi Heinrich,

> 


>    Yes. A new release candidate shall be published after review and upstream

> of the patches.

> Will further send an update.

> 


> With Warm Regards,

> Edhay

> 

> 


> > -Original Message-

> > From: Heinrich Schuchardt 

> > Sent: Tuesday, April 23, 2024 12:46 AM

> > To: G Edhaya Chandran 

> > Cc: alex_...@phoenix.com; david_wri...@phoenix.com;

> > lic...@loongson.cn; Stuart Yoder ;

> > devel@edk2.groups.io; gao...@byosoft.com.cn

> > Subject: Re: [PATCH v2 0/4] TCG2 protocol clean up

> >

> > On 4/16/24 16:53, Stuart Yoder wrote:

> > > This patch series cleans up some issues found when building

> > > edk2-test with a non-GCC compiler:

> > >   -TPMT_HA struct had an error due to incorrect use of C flexible

> > > array

> > member

> > >   -compute struct member offsets using OFFSET_OF, which is not GCC

> specific

> > >   -clean up of #pragma pack in one file

> > >   -resolve type conversion warnings

> > >

> > > Patches are in github here:

> > > https://github.com/stuyod01/edk2-test/tree/tcg2-cleanup

> > >

> > > Version 2

> > >   -add SM3 hash type to TPM2.h

> > >   -resolve type conversion warnings

> > >

> > > Stuart Yoder (4):

> > >   uefi-sct/SctPkg: TCG2 Protocol: correct definition of TPMT_HA struct

> > >   uefi-sct/SctPkg: TCG2 Protocol: use OFFSET_OF for computing offsets

> > >   uefi-sct/SctPkg: TCG2 Protocol: #pragma pack cleanup

> > >   uefi-sct/SctPkg: TCG2 Protocol: clean up type conversion warnings

> > >

> > >  uefi-

> >

> sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBBTe

> > st.h    |  3 +--

> > >  uefi-sct/SctPkg/UEFI/Protocol/TCG2.h | 17

> > +++--

> > >  uefi-

> > sct/SctPkg/TestCase/UEFI/EFI/Protocol/TCG2/BlackBoxTest/TCG2ProtocolBB

> > Te stConformance.c | 25 +---

> > >   3 files changed, 27 insertions(+), 18 deletions(-)

> > >

> >

> > Hello Edhaya,

> >

> > Will we have another release candidate with these patches included?

> >

> > Best regards

> >

> > Heinrich

IMPORTANT NOTICE: The contents of this email and any attachments are 
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Re: [edk2-devel] [PATCH v1 20/26] OvmfPkg/LoongArchVirt: Add NorFlashQemuLib

[Chao Li]

Hi Ard,


Thanks,
Chao
On 2024/5/6 18:24, Ard Biesheuvel wrote:

On Mon, 6 May 2024 at 12:02, Chao Li  wrote:

Hi Gerd,


Thanks,
Chao
On 2024/3/19 16:03, Gerd Hoffmann wrote:

   Hi,

I can't tell the implementation scheme of the current lib and existing
lib implementation scheme which one is better, Could you give we some
advice?

I'd suggest to merge your code as OvmfPkg/Library/FdtNorFlashQemuLib as
it is not really loongarch-specific.

If you want try switch aarch64 to use the same code that'll be great,
but sorting that out later is also fine with me.

If you think this design is looks better, then I'm prepare to commit this
change under the OvmfPkg/Library as a public library. And I will enable it
in aarch64 after merging this change, because I think it may be tweaked and
validated in aarch64 for many platforms. Do you think that is good?

The VirtNorFlashDxe is optimized for qemu-emulated pflash.  It tries to
avoid switching between read and write mode much, because that operation
has a significant overhead in virtualization.  So it's really only used
by ArmVirtPkg and not lots of other arm platforms.

I'm moving the ARM version of the library to OvmfPkg and adding the set PCD 
method, I have verified successfully on ArmVirtQemu.dsc(both -bios and pflash), 
but I found that the ArmVirtQemuKernel.dsc also depends this library, so what's 
the difference between the two platforms?

When I try to verify on ArmVirtQemuKernel.dsc that it works based on -bios option,  I use the command line 
"qemu-system-aarch64 -M virt -cpu cortex-a57 -bios LA_Virt_FW/AARCH64/QEMU_EFI.fd -net none -serial 
stdio -hdb /home/lichao/Software/Qemu/SctPkg/share.imag -device ramfb -device nec-usb-xhci -device usb-mouse 
-device usb-kbd", and it tells me "Could not open option rom 'vgabios-ramfb.bin': No such file or 
directory", I tried removing the option "-device ramfb", it looks like can't work.

How does ArmVirtQemuKernel.dsc work?


It uses the -kernel QEMU command line argument, not the -bios one.

This uses the Linux/arm64 kernel boot protocol (and runs the firmware
entirely from RAM) rather than booting from NOR flash.


Alright, I got it.

Does this mean that after this change, I just verify that the -kernel 
command line can boot the OS and that it can load/store some variables 
via the Linux OS?


If so, I have some plans:

1. Port the ARM version to OvmfPkg and add the setting PCD method. *Done*.

2. Enable the new library on ArmVirtQemu.dsc and remove the hardcode in 
INC file, verify this platform. *Done*.


3. Enable the new library on ArmVirtQemuKernel.dsc and verify this 
platform. *Just verfiy booting OS and load/store some variables via 
Linux kernel. In progress.*


4. Remove the ARM NorFlashQemuLib. *Pending.*

Is the plans mentioned above possible?









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Re: [edk2-devel] [PATCH v1 20/26] OvmfPkg/LoongArchVirt: Add NorFlashQemuLib

[Chao Li]

Hi Gerd,


Thanks,
Chao
On 2024/3/19 16:03, Gerd Hoffmann wrote:

   Hi,


I can't tell the implementation scheme of the current lib and existing
lib implementation scheme which one is better, Could you give we some
advice?

I'd suggest to merge your code as OvmfPkg/Library/FdtNorFlashQemuLib as
it is not really loongarch-specific.

If you want try switch aarch64 to use the same code that'll be great,
but sorting that out later is also fine with me.

If you think this design is looks better, then I'm prepare to commit this
change under the OvmfPkg/Library as a public library. And I will enable it
in aarch64 after merging this change, because I think it may be tweaked and
validated in aarch64 for many platforms. Do you think that is good?

The VirtNorFlashDxe is optimized for qemu-emulated pflash.  It tries to
avoid switching between read and write mode much, because that operation
has a significant overhead in virtualization.  So it's really only used
by ArmVirtPkg and not lots of other arm platforms.


I'm moving the ARM version of the library to OvmfPkg and adding the set 
PCD method, I have verified successfully on ArmVirtQemu.dsc(both -bios 
and pflash), but I found that the ArmVirtQemuKernel.dsc also depends 
this library, so what's the difference between the two platforms?


When I try to verify on ArmVirtQemuKernel.dsc that it works based on 
-bios option,  I use the command line "qemu-system-aarch64 -M virt -cpu 
cortex-a57 -bios LA_Virt_FW/AARCH64/QEMU_EFI.fd -net none -serial stdio 
-hdb /home/lichao/Software/Qemu/SctPkg/share.imag -device ramfb -device 
nec-usb-xhci -device usb-mouse -device usb-kbd", and it tells me "Could 
not open option rom 'vgabios-ramfb.bin': No such file or directory", I 
tried removing the option "-device ramfb", it looks like can't work.


How does ArmVirtQemuKernel.dsc work?



Doing it separate from this patch series makes sense nevertheless.

Speaking of this series: maybe split it into two?  The first part
of this series with the Mde*Pkg + UefiPkg changes looks almost ready
to merge to me, so maybe we can get that in while still sorting out
the remaining issues in the OvmfPkg patches ...

take care,
   Gerd



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[edk2-devel] [PATCH v5 8/8] OvmfPkg: Remove QemuFwCfgLibMmio.inf

[Chao Li]

All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 54 ---
 1 file changed, 54 deletions(-)
 delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
deleted file mode 100644
index 633053aaed..00
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ /dev/null
@@ -1,54 +0,0 @@
-## @file
-#
-#  Stateful, implicitly initialized fw_cfg library.
-#
-#  Copyright (C) 2013 - 2014, Red Hat, Inc.
-#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
-#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
-  INF_VERSION= 0x00010005
-  BASE_NAME  = QemuFwCfgLib
-  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
-  MODULE_TYPE= BASE
-  VERSION_STRING = 1.0
-  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
-
-  CONSTRUCTOR= QemuFwCfgInitialize
-
-#
-# The following information is for reference only and not required by the build
-# tools.
-#
-#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
-#
-
-[Sources]
-  QemuFwCfgLibMmio.c
-  QemuFwCfgMmioDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  OvmfPkg/OvmfPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  HobLib
-  IoLib
-  UefiBootServicesTableLib
-
-[Protocols]
-  gFdtClientProtocolGuid## CONSUMES
-
-[Guids]
-  gQemuFirmwareResourceHobGuid
-
-[Depex]
-  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v5 7/8] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc

Build-tested only (with "RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc 
b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v5 6/8] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f6f7835955..7e2ff33ad1 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v5 5/8] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf

[Chao Li]

Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf  | 54 +++
 1 file changed, 54 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
new file mode 100644
index 00..633053aaed
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
@@ -0,0 +1,54 @@
+## @file
+#
+#  Stateful, implicitly initialized fw_cfg library.
+#
+#  Copyright (C) 2013 - 2014, Red Hat, Inc.
+#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = QemuFwCfgLib
+  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
+
+  CONSTRUCTOR= QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+  QemuFwCfgLibMmio.c
+  QemuFwCfgMmioDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  IoLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gFdtClientProtocolGuid## CONSUMES
+
+[Guids]
+  gQemuFirmwareResourceHobGuid
+
+[Depex]
+  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v5 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Co-authored-by: Xianglai Li 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 236 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  45 
 2 files changed, 281 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..6f35fb4304
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,236 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  UINT32Signature;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  //
+  // Check whether the Qemu firmware configure resources HOB has been created,
+  // if so use the resources in the HOB.
+  //
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  if (FwCfgResource != NULL) {
+return RETURN_SUCCESS;
+  }
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  //
+  // Create resouce memory
+  //
+  FwCfgResource = AllocateZeroPool (sizeof (QEMU_FW_CFG_RESOURCE));
+  ASSERT (FwCfgResource != NULL);
+
+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type != NULL) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT()s express
+//
+//   Address + Size - 1 <= MAX_UINTN
+//
+// for both registers, that is, that the last byte in each MMIO range 
is
+// expressible as a MAX_UINTN. The form below is mathematically
+// equivalent, and it also prevents any unsigned overflow before the
+// comparison.
+//
+ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+ASSERT (FwCfgDataA

[edk2-devel] [PATCH v5 3/8] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 70 +++--
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |  5 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 71 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 97 ---
 4 files changed, 216 insertions(+), 27 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 2a2f3e67ac..6da689b1df 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -3,15 +3,21 @@
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
+#include 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -27,6 +33,50 @@ READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = 
MmioReadBytes;
 WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
 SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
 
+/**
+  Build firmware configure resource HOB.
+
+  @param[in]   FwCfgResource  A pointer to firmware configure resource.
+
+  @retval  VOID
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+  IN QEMU_FW_CFG_RESOURCE  *FwCfgResource
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *)FwCfgResource,
+sizeof (QEMU_FW_CFG_RESOURCE)
+);
+}
+
+/**
+  Get firmware configure resource in HOB.
+
+  @param VOID
+
+  @retval  non-NULL   The firmware configure resource in HOB.
+   NULL   The firmware configure resource not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+  VOID
+  )
+{
+  EFI_HOB_GUID_TYPE  *GuidHob;
+
+  GuidHob = NULL;
+
+  GuidHob = GetFirstGuidHob ();
+  if (GuidHob == NULL) {
+return NULL;
+  }
+
+  return (QEMU_FW_CFG_RESOURCE *)GET_GUID_HOB_DATA (GuidHob);
+}
+
 /**
   Returns a boolean indicating if the firmware configuration interface
   is available or not.
@@ -43,7 +93,7 @@ QemuFwCfgIsAvailable (
   VOID
   )
 {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
 }
 
 /**
@@ -62,7 +112,7 @@ QemuFwCfgSelectItem (
   )
 {
   if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
   }
 }
 
@@ -92,30 +142,30 @@ MmioReadBytes (
 
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
   while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
 Ptr   += 8;
   }
 
   if (Left & 4) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #else
   while (Ptr < End) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #endif
 
   if (Left & 2) {
-*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+*(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
 Ptr   += 2;
   }
 
   if (Left & 1) {
-*Ptr = MmioRead8 (mFwCfgDataAddress);
+*Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
   }
 }
 
@@ -168,9 +218,9 @@ DmaTransferBytes (
   // This will fire off the transfer.
   //
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
-  MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)));
+  MmioWrite64 (QemuGetFwCfgDmaAddress (), SwapBytes64 ((UINT64)));
  #else
-  MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)));
+  MmioWrite32 ((UINT32)(QemuGetFwCfgDmaAddress () + 4), SwapBytes32 
((UINT32)));
  #endif
 
   //
@@ -239,7 +289,7 @@ MmioWriteBytes (
   UINTN  Idx;
 
   for (Idx = 0; Idx < Size; ++Idx) {
-MmioWrite8 (mFwCfgDataAddress, ((UINT8 *)Buffer)[Idx]);
+MmioWrite8 (QemuGetFwCfgDataAddress (), ((UINT8 *)Buffer)[Idx]);
   }
 }
 
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
index b3017aef80..633053aaed 100644
--- a/OvmfPkg/

[edk2-devel] [PATCH v5 2/8] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

[Chao Li]

Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Some DXE stage variables became non-static in this patch, they will be
restored to static in the next patch.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 192 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   3 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 173 
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 145 +
 4 files changed, 327 insertions(+), 186 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..2a2f3e67ac 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,7 +1,5 @@
 /** @file
 
-  Stateful and implicitly initialized fw_cfg library implementation.
-
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
@@ -20,63 +18,14 @@
 
 #include 
 
-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
 
 //
 // These correspond to the implementation we detect at runtime.
 //
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
 
 /**
   Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +46,6 @@ QemuFwCfgIsAvailable (
   return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
 }
 
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress = SwapBytes64 (Reg[0]);
-  FwCfgDataSize= 8;
-  FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
-  FwCfgSelectorSize

[edk2-devel] [PATCH v5 1/8] OvmfPkg: Add a GUID for QemuFwCfgLib

[Chao Li]

Added a new GUID for QemuFwCfgLib MMIO version, called
gQemuFirmwareResourceHobGuid, which is used to save QEMU firmware
configure resource during PEI stage.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 OvmfPkg/OvmfPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 2f7bded926..731f67b727 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -167,6 +167,7 @@ [Guids]
   gUefiOvmfPkgTdxAcpiHobGuid= {0x6a0c5870, 0xd4ed, 0x44f4, {0xa1, 
0x35, 0xdd, 0x23, 0x8b, 0x6f, 0x0c, 0x8d}}
   gEfiNonCcFvGuid   = {0xae047c6d, 0xbce9, 0x426c, {0xae, 
0x03, 0xa6, 0x8e, 0x3b, 0x8a, 0x04, 0x88}}
   gOvmfVariableGuid = {0x50bea1e5, 0xa2c5, 0x46e9, {0x9b, 
0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a}}
+  gQemuFirmwareResourceHobGuid  = {0x3cc47b04, 0x0d3e, 0xaa64, {0x06, 
0xa6, 0x4b, 0xdc, 0x9a, 0x2c, 0x61, 0x19}}
 
 [Ppis]
   # PPI whose presence in the PPI database signals that the TPM base address
-- 
2.27.0



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[edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.

V2 -> V3:
1. Merge three HOBs into a single HOB.
2. Remove the dynamic global variables in PEI.

V3 -> V4:
1. Adjust the HOB content, this version saves all of structual contents
in HOB.
2. Remove the Loongson copyright in separation patch, and add it in the
funciton change patch.
3. Restored some variables as static in DXE version.
4. Added the HOB GUID in OvmfPkg.dec.

V4 -> V5
1. Adjust the PEI version some logic error, it will built the HOB after
the QEMU check passes.
2. Adjust some code style.
3. Remove the architecture comment in PEI INF.
4. Reoder the PEI INF in alphabetical order.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR: https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 

Chao Li (8):
  OvmfPkg: Add a GUID for QemuFwCfgLib
  OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
  OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
  OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
  OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
  ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg: Remove QemuFwCfgLibMmio.inf

 ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 244 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 238 +
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 214 +++
 ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |   8 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 236 +
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  45 
 OvmfPkg/OvmfPkg.dec   |   1 +
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
 10 files changed, 802 insertions(+), 190 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (78%)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

-- 
2.27.0



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Re: [edk2-devel] [PATCH v4 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Hi Ard,


Thanks,
Chao
On 2024/4/30 09:19, Chao Li wrote:


Hi Ard,

OK, I will submit the V5 today and make the adjustments according to 
your suggestions.


On 2024/4/29 21:11, Ard Biesheuvel wrote:

On Fri, 26 Apr 2024 at 10:29, Chao Li  wrote:

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Co-authored-by: Xianglai Li
Signed-off-by: Chao Li
---
  .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 235 ++
  .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  52 
  2 files changed, 287 insertions(+)
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..055148de8e
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,235 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+  VOID  *Buffer;
+
+  //
+  // Check whether the Qemu firmware configure resources HOB has been created,
+  // if so use the resources in the HOB.
+  //
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  if (FwCfgResource != NULL) {
+return RETURN_SUCCESS;
+  }
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  //
+  // Create resouce memory
+  //
+  Buffer = AllocatePages(EFI_SIZE_TO_PAGES (sizeof (QEMU_FW_CFG_RESOURCE)));
+  ASSERT (Buffer != NULL);
+  ZeroMem (Buffer, sizeof (QEMU_FW_CFG_RESOURCE));
+
+  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)Buffer;
+

You will need to respin after all, so please incorporate the fixes I
proposed on v4


+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&

and here


+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT(

Re: [edk2-devel] [PATCH v4 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Hi Ard,

OK, I will submit the V5 today and make the adjustments according to 
your suggestions.



Thanks,
Chao
On 2024/4/29 21:11, Ard Biesheuvel wrote:

On Fri, 26 Apr 2024 at 10:29, Chao Li  wrote:

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Co-authored-by: Xianglai Li
Signed-off-by: Chao Li
---
  .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 235 ++
  .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  52 
  2 files changed, 287 insertions(+)
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..055148de8e
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,235 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+  VOID  *Buffer;
+
+  //
+  // Check whether the Qemu firmware configure resources HOB has been created,
+  // if so use the resources in the HOB.
+  //
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  if (FwCfgResource != NULL) {
+return RETURN_SUCCESS;
+  }
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  //
+  // Create resouce memory
+  //
+  Buffer = AllocatePages(EFI_SIZE_TO_PAGES (sizeof (QEMU_FW_CFG_RESOURCE)));
+  ASSERT (Buffer != NULL);
+  ZeroMem (Buffer, sizeof (QEMU_FW_CFG_RESOURCE));
+
+  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)Buffer;
+

You will need to respin after all, so please incorporate the fixes I
proposed on v4


+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&

and here


+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT()s express
+//
+//   Address + Size - 1 <= MAX_U

Re: [edk2-devel] [PATCH v4 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Thanks,
Chao
On 2024/4/29 15:14, Ard Biesheuvel wrote:

On Mon, 29 Apr 2024 at 09:09, Chao Li  wrote:

Hi Ard,

OK, I will make adjustments according to your suggestions and submit the V5 
today.


No, please do not make any adjustments. I will take the v4 and apply
these changes directly.

Please do not send another revision unless there are other review comments.

OK, I see.








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Re: [edk2-devel] [PATCH v4 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Hi Ard,

OK, I will make adjustments according to your suggestions and submit the 
V5 today.



Thanks,
Chao
On 2024/4/29 14:56, Ard Biesheuvel wrote:

On Mon, 29 Apr 2024 at 03:17, Chao Li  wrote:

Hi Ard and Gerd and other maintainers,

Could you review this version and give your suggestions?


This looks ok to me now, modulo a few minor tweaks (see below) that I
will apply when merging.

I also changed the type signatures to

extern
VOID
(EFIAPI *InternalQemuFwCfgReadBytes) (
   IN UINTN  Size,
   IN VOID   *Buffer  OPTIONAL
   );

Note that the EFIAPI applies to the function itself, not the pointer
so it needs to be inside the ()



--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -104,7 +104,6 @@ QemuFwCfgInitialize (
UINT64FwCfgDmaAddress;
UINT64FwCfgDmaSize;
QEMU_FW_CFG_RESOURCE  *FwCfgResource;
-  VOID  *Buffer;

//
// Check whether the Qemu firmware configure resources HOB has been created,
@@ -125,11 +124,8 @@ QemuFwCfgInitialize (
//
// Create resouce memory
//
-  Buffer = AllocatePages(EFI_SIZE_TO_PAGES (sizeof (QEMU_FW_CFG_RESOURCE)));
-  ASSERT (Buffer != NULL);
-  ZeroMem (Buffer, sizeof (QEMU_FW_CFG_RESOURCE));
-
-  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)Buffer;
+  FwCfgResource = AllocateZeroPool (sizeof (QEMU_FW_CFG_RESOURCE));
+  ASSERT (FwCfgResource != NULL);

for (Prev = 0; ; Prev = Node) {
  Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
@@ -141,7 +137,7 @@ QemuFwCfgInitialize (
  // Check for memory node
  //
  Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
-if ((Type) &&
+if ((Type != NULL) &&
  (AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
  {
//







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Re: [edk2-devel] [PATCH v4 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Hi Ard and Gerd and other maintainers,

Could you review this version and give your suggestions?


Thanks,
Chao
On 2024/4/26 16:28, Chao Li wrote:

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.

V2 -> V3:
1. Merge three HOBs into a single HOB.
2. Remove the dynamic global variables in PEI.

V3 -> V4:
1. Adjust the HOB content, this version saves all of structual contents
in HOB.
2. Remove the Loongson copyright in separation patch, and add it in the
funciton change patch.
3. Restored some variables as static in DXE version.
4. Added the HOB GUID in OvmfPkg.dec.

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR:https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Sunil V L
Cc: Andrei Warkentin

Chao Li (8):
   OvmfPkg: Add a GUID for QemuFwCfgLib
   OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
   OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
   OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
   OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
   ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
   OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
   OvmfPkg: Remove QemuFwCfgLibMmio.inf

  ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
  ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
  .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 243 +
  .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 244 ++
  .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 214 +++
  ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |   8 +-
  .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 235 +
  .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  52 
  OvmfPkg/OvmfPkg.dec   |   1 +
  OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
  10 files changed, 814 insertions(+), 189 deletions(-)
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
  rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (78%)
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf




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[edk2-devel] [PATCH v4 8/8] OvmfPkg: Remove QemuFwCfgLibMmio.inf

[Chao Li]

All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 54 ---
 1 file changed, 54 deletions(-)
 delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
deleted file mode 100644
index 633053aaed..00
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ /dev/null
@@ -1,54 +0,0 @@
-## @file
-#
-#  Stateful, implicitly initialized fw_cfg library.
-#
-#  Copyright (C) 2013 - 2014, Red Hat, Inc.
-#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
-#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
-  INF_VERSION= 0x00010005
-  BASE_NAME  = QemuFwCfgLib
-  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
-  MODULE_TYPE= BASE
-  VERSION_STRING = 1.0
-  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
-
-  CONSTRUCTOR= QemuFwCfgInitialize
-
-#
-# The following information is for reference only and not required by the build
-# tools.
-#
-#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
-#
-
-[Sources]
-  QemuFwCfgLibMmio.c
-  QemuFwCfgMmioDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  OvmfPkg/OvmfPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  HobLib
-  IoLib
-  UefiBootServicesTableLib
-
-[Protocols]
-  gFdtClientProtocolGuid## CONSUMES
-
-[Guids]
-  gQemuFirmwareResourceHobGuid
-
-[Depex]
-  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v4 7/8] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc

Build-tested only (with "RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc 
b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v4 6/8] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f6f7835955..7e2ff33ad1 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v4 5/8] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf

[Chao Li]

Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf  | 54 +++
 1 file changed, 54 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
new file mode 100644
index 00..633053aaed
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
@@ -0,0 +1,54 @@
+## @file
+#
+#  Stateful, implicitly initialized fw_cfg library.
+#
+#  Copyright (C) 2013 - 2014, Red Hat, Inc.
+#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = QemuFwCfgLib
+  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
+
+  CONSTRUCTOR= QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+  QemuFwCfgLibMmio.c
+  QemuFwCfgMmioDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  IoLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gFdtClientProtocolGuid## CONSUMES
+
+[Guids]
+  gQemuFirmwareResourceHobGuid
+
+[Depex]
+  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v4 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Co-authored-by: Xianglai Li 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 235 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  52 
 2 files changed, 287 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..055148de8e
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,235 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+  VOID  *Buffer;
+
+  //
+  // Check whether the Qemu firmware configure resources HOB has been created,
+  // if so use the resources in the HOB.
+  //
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  if (FwCfgResource != NULL) {
+return RETURN_SUCCESS;
+  }
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  //
+  // Create resouce memory
+  //
+  Buffer = AllocatePages(EFI_SIZE_TO_PAGES (sizeof (QEMU_FW_CFG_RESOURCE)));
+  ASSERT (Buffer != NULL);
+  ZeroMem (Buffer, sizeof (QEMU_FW_CFG_RESOURCE));
+
+  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)Buffer;
+
+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT()s express
+//
+//   Address + Size - 1 <= MAX_UINTN
+//
+// for both registers, that is, that the last byte in each MMIO range 
is
+// expressible as a MAX_UINTN. The form below is mathematically
+// equivalent, and it also prevents any unsigned overflow before the
+// comparison.
+//
+  

[edk2-devel] [PATCH v4 3/8] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 71 --
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |  5 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 71 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 97 ---
 4 files changed, 217 insertions(+), 27 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 2a2f3e67ac..4da7890fc1 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -3,15 +3,21 @@
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
+#include 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -27,6 +33,51 @@ READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = 
MmioReadBytes;
 WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
 SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
 
+
+/**
+  Build firmware configure resource HOB.
+
+  @param[in]   FwCfgResource  A pointer to firmware configure resource.
+
+  @retval  VOID
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+  IN QEMU_FW_CFG_RESOURCE  *FwCfgResource
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *)FwCfgResource,
+sizeof (QEMU_FW_CFG_RESOURCE)
+);
+}
+
+/**
+  Get firmware configure resource in HOB.
+
+  @param VOID
+
+  @retval  non-NULL   The firmware configure resource in HOB.
+   NULL   The firmware configure resource not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+  VOID
+  )
+{
+  EFI_HOB_GUID_TYPE  *GuidHob;
+
+  GuidHob = NULL;
+
+  GuidHob = GetFirstGuidHob ();
+  if (GuidHob == NULL) {
+return NULL;
+  }
+
+  return (QEMU_FW_CFG_RESOURCE *)GET_GUID_HOB_DATA (GuidHob);
+}
+
 /**
   Returns a boolean indicating if the firmware configuration interface
   is available or not.
@@ -43,7 +94,7 @@ QemuFwCfgIsAvailable (
   VOID
   )
 {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
 }
 
 /**
@@ -62,7 +113,7 @@ QemuFwCfgSelectItem (
   )
 {
   if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
   }
 }
 
@@ -92,30 +143,30 @@ MmioReadBytes (
 
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
   while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
 Ptr   += 8;
   }
 
   if (Left & 4) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #else
   while (Ptr < End) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #endif
 
   if (Left & 2) {
-*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+*(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
 Ptr   += 2;
   }
 
   if (Left & 1) {
-*Ptr = MmioRead8 (mFwCfgDataAddress);
+*Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
   }
 }
 
@@ -168,9 +219,9 @@ DmaTransferBytes (
   // This will fire off the transfer.
   //
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
-  MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)));
+  MmioWrite64 (QemuGetFwCfgDmaAddress (), SwapBytes64 ((UINT64)));
  #else
-  MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)));
+  MmioWrite32 ((UINT32)(QemuGetFwCfgDmaAddress () + 4), SwapBytes32 
((UINT32)));
  #endif
 
   //
@@ -239,7 +290,7 @@ MmioWriteBytes (
   UINTN  Idx;
 
   for (Idx = 0; Idx < Size; ++Idx) {
-MmioWrite8 (mFwCfgDataAddress, ((UINT8 *)Buffer)[Idx]);
+MmioWrite8 (QemuGetFwCfgDataAddress (), ((UINT8 *)Buffer)[Idx]);
   }
 }
 
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
index b3017aef80..633053aaed 100644
--- a/OvmfPkg/

[edk2-devel] [PATCH v4 2/8] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

[Chao Li]

Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Some DXE stage variables became non-static in this patch, they will be
restored to static in the next patch.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 192 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   3 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 179 
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 145 +
 4 files changed, 333 insertions(+), 186 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..2a2f3e67ac 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,7 +1,5 @@
 /** @file
 
-  Stateful and implicitly initialized fw_cfg library implementation.
-
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
@@ -20,63 +18,14 @@
 
 #include 
 
-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
 
 //
 // These correspond to the implementation we detect at runtime.
 //
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
 
 /**
   Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +46,6 @@ QemuFwCfgIsAvailable (
   return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
 }
 
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress = SwapBytes64 (Reg[0]);
-  FwCfgDataSize= 8;
-  FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
-  FwCfgSelectorSize

[edk2-devel] [PATCH v4 1/8] OvmfPkg: Add a GUID for QemuFwCfgLib

[Chao Li]

Added a new GUID for QemuFwCfgLib MMIO version, called
gQemuFirmwareResourceHobGuid, which is used to save QEMU firmware
configure resource during PEI stage.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 OvmfPkg/OvmfPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 2f7bded926..731f67b727 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -167,6 +167,7 @@ [Guids]
   gUefiOvmfPkgTdxAcpiHobGuid= {0x6a0c5870, 0xd4ed, 0x44f4, {0xa1, 
0x35, 0xdd, 0x23, 0x8b, 0x6f, 0x0c, 0x8d}}
   gEfiNonCcFvGuid   = {0xae047c6d, 0xbce9, 0x426c, {0xae, 
0x03, 0xa6, 0x8e, 0x3b, 0x8a, 0x04, 0x88}}
   gOvmfVariableGuid = {0x50bea1e5, 0xa2c5, 0x46e9, {0x9b, 
0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a}}
+  gQemuFirmwareResourceHobGuid  = {0x3cc47b04, 0x0d3e, 0xaa64, {0x06, 
0xa6, 0x4b, 0xdc, 0x9a, 0x2c, 0x61, 0x19}}
 
 [Ppis]
   # PPI whose presence in the PPI database signals that the TPM base address
-- 
2.27.0



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[edk2-devel] [PATCH v4 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.

V2 -> V3:
1. Merge three HOBs into a single HOB.
2. Remove the dynamic global variables in PEI.

V3 -> V4:
1. Adjust the HOB content, this version saves all of structual contents
in HOB.
2. Remove the Loongson copyright in separation patch, and add it in the
funciton change patch.
3. Restored some variables as static in DXE version.
4. Added the HOB GUID in OvmfPkg.dec.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR: https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 

Chao Li (8):
  OvmfPkg: Add a GUID for QemuFwCfgLib
  OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
  OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
  OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
  OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
  ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg: Remove QemuFwCfgLibMmio.inf

 ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 243 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 244 ++
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 214 +++
 ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |   8 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 235 +
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  52 
 OvmfPkg/OvmfPkg.dec   |   1 +
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
 10 files changed, 814 insertions(+), 189 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (78%)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

-- 
2.27.0



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Re: [edk2-devel] [PATCH v3 2/7] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Hi Ard,


Thanks,
Chao
On 2024/4/26 09:20, Chao Li wrote:


Hi Ard,

On 2024/4/25 21:02, Ard Biesheuvel wrote:

On Thu, 25 Apr 2024 at 14:13, Chao Li  wrote:

Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Sunil V L
Cc: Andrei Warkentin
Signed-off-by: Chao Li
---
  .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 81 +++--
  .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |  1 +
  .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 74 +++
  .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 91 ---
  4 files changed, 226 insertions(+), 21 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index dc949c8e26..b5dbc5e4b5 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -8,11 +8,16 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
  **/

+#include 
  #include 

+#include 
+#include 
+
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -21,6 +26,62 @@

  #include "QemuFwCfgLibMmioInternal.h"

+EFI_GUID  mFwCfgResourceGuid = FW_CONFIG_RESOURCE_HOB_GUID;
+
+/**
+  Build firmware configure resource address HOB.
+
+  @param[in]   FwCfgResource  A pointer to firmware configure resource.
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+  IN QEMU_FW_CFG_RESOURCE  *FwCfgResource
+  )
+{
+  UINT64  Data64;
+
+  Data64 = (UINT64)(UINTN)FwCfgResource;
+
+  BuildGuidDataHob (
+,
+(VOID *),

This looks wrong: why are you taking the address of the stack variable
rather than the address of the resource descriptor?


It only saves the pointer of FwCfgResource, and the memory space has 
been created in the PEI constructor.  Do you mean saving all contents 
of FwCfgResource in the HOB?


The following line is indeed wrong. if only save the pointer, the size 
should be "sizeof (UINT64)".



I will save the real HOB data in the next version.



+sizeof (QEMU_FW_CFG_RESOURCE)
+);
+}
+
+/**
+  Get firmware configure resource in HOB.
+
+  @param VOID
+
+  @retval  FwCfgResourceThe firmware configure resouce in HOB.

resource

All right.

+   NULL The firmware configure resouce not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+  VOID
+  )
+{
+  EFI_HOB_GUID_TYPE *GuidHob;
+  VOID  *DataInHob;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  GuidHob   = NULL;
+  DataInHob = NULL;
+
+  GuidHob = GetFirstGuidHob ();

Please define this GUID in the package .DEC file and add it to the
[Guids] section in the .INF so that you can refer to its name
directly.

OK.

+  if (GuidHob == NULL) {
+return NULL;
+  }
+
+  DataInHob = GET_GUID_HOB_DATA (GuidHob);
+  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)(*(UINTN *)DataInHob);
+
+  return FwCfgResource;
+}
+
  /**
Returns a boolean indicating if the firmware configuration interface
is available or not.
@@ -37,7 +98,7 @@ QemuFwCfgIsAvailable (
VOID
)
  {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
  }

  /**
@@ -56,7 +117,7 @@ QemuFwCfgSelectItem (
)
  {
if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
}
  }

@@ -86,30 +147,30 @@ MmioReadBytes (

   #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
  Ptr   += 8;
}

if (Left & 4) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
  Ptr   += 4;
}

   #else
while (Ptr < End) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
  Ptr   += 4;
}

   #endif

if (Left & 2) {
-*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+*(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
  Ptr   += 2;
}

if (Left & 1) {
-*Ptr = MmioRead8 (mFwCfgDataAddress);
+*Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
}
  }

@@ -162,9 +223,9 @@ DmaTransferBytes (
// This will fire off the transfer.
//
   #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOO

Re: [edk2-devel] [PATCH v3 2/7] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Hi Ard,


Thanks,
Chao
On 2024/4/25 21:02, Ard Biesheuvel wrote:

On Thu, 25 Apr 2024 at 14:13, Chao Li  wrote:

Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Sunil V L
Cc: Andrei Warkentin
Signed-off-by: Chao Li
---
  .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 81 +++--
  .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |  1 +
  .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 74 +++
  .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 91 ---
  4 files changed, 226 insertions(+), 21 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index dc949c8e26..b5dbc5e4b5 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -8,11 +8,16 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
  **/

+#include 
  #include 

+#include 
+#include 
+
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -21,6 +26,62 @@

  #include "QemuFwCfgLibMmioInternal.h"

+EFI_GUID  mFwCfgResourceGuid = FW_CONFIG_RESOURCE_HOB_GUID;
+
+/**
+  Build firmware configure resource address HOB.
+
+  @param[in]   FwCfgResource  A pointer to firmware configure resource.
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+  IN QEMU_FW_CFG_RESOURCE  *FwCfgResource
+  )
+{
+  UINT64  Data64;
+
+  Data64 = (UINT64)(UINTN)FwCfgResource;
+
+  BuildGuidDataHob (
+,
+(VOID *),

This looks wrong: why are you taking the address of the stack variable
rather than the address of the resource descriptor?


It only saves the pointer of FwCfgResource, and the memory space has 
been created in the PEI constructor.  Do you mean saving all contents of 
FwCfgResource in the HOB?


The following line is indeed wrong. if only save the pointer, the size 
should be "sizeof (UINT64)".





+sizeof (QEMU_FW_CFG_RESOURCE)
+);
+}
+
+/**
+  Get firmware configure resource in HOB.
+
+  @param VOID
+
+  @retval  FwCfgResourceThe firmware configure resouce in HOB.

resource

All right.



+   NULL The firmware configure resouce not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+  VOID
+  )
+{
+  EFI_HOB_GUID_TYPE *GuidHob;
+  VOID  *DataInHob;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  GuidHob   = NULL;
+  DataInHob = NULL;
+
+  GuidHob = GetFirstGuidHob ();

Please define this GUID in the package .DEC file and add it to the
[Guids] section in the .INF so that you can refer to its name
directly.

OK.



+  if (GuidHob == NULL) {
+return NULL;
+  }
+
+  DataInHob = GET_GUID_HOB_DATA (GuidHob);
+  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)(*(UINTN *)DataInHob);
+
+  return FwCfgResource;
+}
+
  /**
Returns a boolean indicating if the firmware configuration interface
is available or not.
@@ -37,7 +98,7 @@ QemuFwCfgIsAvailable (
VOID
)
  {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
  }

  /**
@@ -56,7 +117,7 @@ QemuFwCfgSelectItem (
)
  {
if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
}
  }

@@ -86,30 +147,30 @@ MmioReadBytes (

   #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
  Ptr   += 8;
}

if (Left & 4) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
  Ptr   += 4;
}

   #else
while (Ptr < End) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
  Ptr   += 4;
}

   #endif

if (Left & 2) {
-*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+*(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
  Ptr   += 2;
}

if (Left & 1) {
-*Ptr = MmioRead8 (mFwCfgDataAddress);
+*Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
}
  }

@@ -162,9 +223,9 @@ DmaTransferBytes (
// This will fire off the transfer.
//
   #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
-  MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)));
+  MmioWrite64 (QemuGetFwCf

Re: [edk2-devel] [PATCH v3 1/7] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

[Chao Li]

Hi Ard,


Thanks,
Chao
On 2024/4/25 20:58, Ard Biesheuvel wrote:

On Thu, 25 Apr 2024 at 14:13, Chao Li  wrote:

Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Sunil V L
Cc: Andrei Warkentin
Signed-off-by: Chao Li
---
  .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 194 +-
  .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   4 +-
  .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 179 
  .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 153 ++
  4 files changed, 340 insertions(+), 190 deletions(-)
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
  create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..dc949c8e26 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,10 +1,9 @@
  /** @file

-  Stateful and implicitly initialized fw_cfg library implementation.
-
Copyright (C) 2013 - 2014, Red Hat, Inc.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
(C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.


Please only claim copyright for code that you wrote, not for code that
you just moved between files.
OK, I will remove Loongson copyright in this patch and add it in patch 2 
or 3.



SPDX-License-Identifier: BSD-2-Clause-Patent
  **/
@@ -20,63 +19,7 @@

  #include 

-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
-
-//
-// These correspond to the implementation we detect at runtime.
-//
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"

  /**
Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +40,6 @@ QemuFwCfgIsAvailable (
return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
  }

-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress  

[edk2-devel] [PATCH v3 6/7] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc

Build-tested only (with "RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc 
b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v3 7/7] OvmfPkg: Remove QemuFwCfgLibMmio.inf

[Chao Li]

All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 51 ---
 1 file changed, 51 deletions(-)
 delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
deleted file mode 100644
index 8e191f2d22..00
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ /dev/null
@@ -1,51 +0,0 @@
-## @file
-#
-#  Stateful, implicitly initialized fw_cfg library.
-#
-#  Copyright (C) 2013 - 2014, Red Hat, Inc.
-#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
-#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
-  INF_VERSION= 0x00010005
-  BASE_NAME  = QemuFwCfgLib
-  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
-  MODULE_TYPE= BASE
-  VERSION_STRING = 1.0
-  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
-
-  CONSTRUCTOR= QemuFwCfgInitialize
-
-#
-# The following information is for reference only and not required by the build
-# tools.
-#
-#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
-#
-
-[Sources]
-  QemuFwCfgLibMmio.c
-  QemuFwCfgMmioDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  OvmfPkg/OvmfPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  HobLib
-  IoLib
-  UefiBootServicesTableLib
-
-[Protocols]
-  gFdtClientProtocolGuid## CONSUMES
-
-[Depex]
-  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v3 5/7] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index e48c75b5e9..987b8bb238 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v3 4/7] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf

[Chao Li]

Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf  | 51 +++
 1 file changed, 51 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
new file mode 100644
index 00..8e191f2d22
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
@@ -0,0 +1,51 @@
+## @file
+#
+#  Stateful, implicitly initialized fw_cfg library.
+#
+#  Copyright (C) 2013 - 2014, Red Hat, Inc.
+#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = QemuFwCfgLib
+  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
+
+  CONSTRUCTOR= QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+  QemuFwCfgLibMmio.c
+  QemuFwCfgMmioDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  IoLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gFdtClientProtocolGuid## CONSUMES
+
+[Depex]
+  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v3 3/7] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Co-authored-by: Xianglai Li 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 228 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  49 
 2 files changed, 277 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..fa6f531e3a
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,228 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+//
+// These correspond to the implementation we detect at runtime.
+//
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+  VOID  *Buffer;
+
+  //
+  // Check whether the Qemu firmware configure resources HOB has been created,
+  // if so use the resources in the HOB.
+  //
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  if (FwCfgResource != NULL) {
+return RETURN_SUCCESS;
+  }
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  //
+  // Create resouce memory
+  //
+  Buffer = AllocatePages(EFI_SIZE_TO_PAGES (sizeof (QEMU_FW_CFG_RESOURCE)));
+  ASSERT (Buffer != NULL);
+  ZeroMem (Buffer, sizeof (QEMU_FW_CFG_RESOURCE));
+
+  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)Buffer;
+
+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT()s express
+//
+//   Address + Size - 1 <= MAX_UINTN
+//
+  

[edk2-devel] [PATCH v3 2/7] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 81 +++--
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |  1 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 74 +++
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 91 ---
 4 files changed, 226 insertions(+), 21 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index dc949c8e26..b5dbc5e4b5 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -8,11 +8,16 @@
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
+#include 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,6 +26,62 @@
 
 #include "QemuFwCfgLibMmioInternal.h"
 
+EFI_GUID  mFwCfgResourceGuid = FW_CONFIG_RESOURCE_HOB_GUID;
+
+/**
+  Build firmware configure resource address HOB.
+
+  @param[in]   FwCfgResource  A pointer to firmware configure resource.
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+  IN QEMU_FW_CFG_RESOURCE  *FwCfgResource
+  )
+{
+  UINT64  Data64;
+
+  Data64 = (UINT64)(UINTN)FwCfgResource;
+
+  BuildGuidDataHob (
+,
+(VOID *),
+sizeof (QEMU_FW_CFG_RESOURCE)
+);
+}
+
+/**
+  Get firmware configure resource in HOB.
+
+  @param VOID
+
+  @retval  FwCfgResourceThe firmware configure resouce in HOB.
+   NULL The firmware configure resouce not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+  VOID
+  )
+{
+  EFI_HOB_GUID_TYPE *GuidHob;
+  VOID  *DataInHob;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  GuidHob   = NULL;
+  DataInHob = NULL;
+
+  GuidHob = GetFirstGuidHob ();
+  if (GuidHob == NULL) {
+return NULL;
+  }
+
+  DataInHob = GET_GUID_HOB_DATA (GuidHob);
+  FwCfgResource = (QEMU_FW_CFG_RESOURCE *)(*(UINTN *)DataInHob);
+
+  return FwCfgResource;
+}
+
 /**
   Returns a boolean indicating if the firmware configuration interface
   is available or not.
@@ -37,7 +98,7 @@ QemuFwCfgIsAvailable (
   VOID
   )
 {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
 }
 
 /**
@@ -56,7 +117,7 @@ QemuFwCfgSelectItem (
   )
 {
   if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
   }
 }
 
@@ -86,30 +147,30 @@ MmioReadBytes (
 
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
   while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
 Ptr   += 8;
   }
 
   if (Left & 4) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #else
   while (Ptr < End) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #endif
 
   if (Left & 2) {
-*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+*(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
 Ptr   += 2;
   }
 
   if (Left & 1) {
-*Ptr = MmioRead8 (mFwCfgDataAddress);
+*Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
   }
 }
 
@@ -162,9 +223,9 @@ DmaTransferBytes (
   // This will fire off the transfer.
   //
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
-  MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)));
+  MmioWrite64 (QemuGetFwCfgDmaAddress (), SwapBytes64 ((UINT64)));
  #else
-  MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)));
+  MmioWrite32 ((UINT32)(QemuGetFwCfgDmaAddress () + 4), SwapBytes32 
((UINT32)));
  #endif
 
   //
@@ -233,7 +294,7 @@ MmioWriteBytes (
   UINTN  Idx;
 
   for (Idx = 0; Idx < Size; ++Idx) {
-MmioWrite8 (mFwCfgDataAddress, ((UINT8 *)Buffer)[Idx]);
+MmioWrite8 (QemuGetFwCfgDataAddress (), ((UINT8 *)Buffer)[Idx]);
   }
 }
 
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
index f2596f270e..8e191f2d22 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
@@ -4

[edk2-devel] [PATCH v3 1/7] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

[Chao Li]

Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 194 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   4 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 179 
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 153 ++
 4 files changed, 340 insertions(+), 190 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..dc949c8e26 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,10 +1,9 @@
 /** @file
 
-  Stateful and implicitly initialized fw_cfg library implementation.
-
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -20,63 +19,7 @@
 
 #include 
 
-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
-
-//
-// These correspond to the implementation we detect at runtime.
-//
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
 
 /**
   Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +40,6 @@ QemuFwCfgIsAvailable (
   return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
 }
 
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress = SwapBytes64 (Reg[0]);
-  FwCfgDataSize= 8;
-  FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
-  FwCfgSelectorSize= 2;
-
-  //
-  // The following ASSERT()s express
-  //
-  //   Address + Size - 1 <= MAX_UINTN
-  //
-  // for both registers, that is, that the last byte in each MMIO 

[edk2-devel] [PATCH v3 0/7] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.

V2 -> V3:
1. Merge three HOBs into a single HOB.
2. Remove the dynamic global variables in PEI.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR: https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 



Chao Li (7):
  OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
  OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
  OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
  OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
  ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg: Remove QemuFwCfgLibMmio.inf

 ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 249 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 253 ++
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 222 +++
 ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |   5 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 228 
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  49 
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
 9 files changed, 822 insertions(+), 190 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (81%)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

-- 
2.27.0



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Re: [edk2-devel] [PATCH v2 3/7] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Hi Gerd,

I get it, I will refactor the code as soon as I can, it looks like 
there's still some work and will take some time. I will try to send the 
V3 tonight if possible.



Thanks,
Chao
On 2024/4/25 17:02, Gerd Hoffmann wrote:

On Thu, Apr 25, 2024 at 04:06:13PM +0800, Chao Li wrote:

Hi Gerd,


Thanks,
Chao
On 2024/4/25 15:53, Gerd Hoffmann wrote:

Hi,


+UINTN  mFwCfgSelectorAddress;
+UINTN  mFwCfgDataAddress;
+UINTN  mFwCfgDmaAddress;

Hmm, global variables for PEI?  I think the point of storing these in
the HOB is to avoid the need for global variables?  Also does that work
when running PEI in-place from flash?

I think it would be useful if some platforms(not LoongArch) could use the
global variables in PEI, because the global variables are faster.

Performance isn't my main concern here, I very much prefer code which is
easy to maintain.  Taking the same code path on all platforms is good
for that.  It's less code and it also makes testing easier.  The risk of
breaking loongarch when changing something for riscv or arm is much
lower if all platforms work the same way.

I'd suggest to first refactor the existing DXE code to use a HOB instead
of global variables.  Have a helper function which looks up the HOB and
returns a pointer to the configuration struct.  That helper function can
be slightly different for DXE/PEI, the DXE variant can cache the pointer
to the struct in a global variable so it needs to do the lookup only
once.


+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;

First thing this function should do is check whenever the HOB already
exists.  Should that be the case there is no need to parse the device
tree.

This is a constructor in PEI, that has to parse the device tree and then
build the HOBs.

This is a library, so it can be linked into multiple PEI and DXE
modules.  So it must be prepared to run multiple times.  On the
second and all following runs the HOB will already exist.

The DXE variant will need the check for sure.  I'd strongly suggest to
add it to the PEI variant too, even though it might not be needed right
now because PlatformPei is the only PEI module using the library.

take care,
   Gerd








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Re: [edk2-devel] [PATCH v2 2/7] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Hi Ard and Gerd,


Thanks,
Chao
On 2024/4/25 16:11, Ard Biesheuvel wrote:

On Thu, 25 Apr 2024 at 10:10, Chao Li  wrote:

Hi Gerd,


Thanks,
Chao
On 2024/4/25 15:40, Gerd Hoffmann wrote:

   Hi,

+EFI_GUID  mFwCfgSelectorAddressGuid = FW_CONFIG_SELECTOR_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDataAddressGuid = FW_CONFIG_DATA_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDmaAddressGuid  = FW_CONFIG_DMA_ADDRESS_HOB_GUID;

Oh.  I assumed that would be obvious (because it's common practice for
HOBs), but I was thinking about a single HOB containing a struct with
all three values instead of a separate HOB for each value.

If uses a single HOB, it must define a structure in this library, and it may be 
more complicated to build and parse the HOB.


Please use a single HOB, and avoid global variables in PEI (PEI
modules may execute in place from read-only NOR flash, so global
variables are not allowed in PEI)

OK, I will adjust it now, and send the V3.








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Re: [edk2-devel] [PATCH v2 2/7] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Hi Gerd,


Thanks,
Chao
On 2024/4/25 15:40, Gerd Hoffmann wrote:

   Hi,


+EFI_GUID  mFwCfgSelectorAddressGuid = FW_CONFIG_SELECTOR_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDataAddressGuid = FW_CONFIG_DATA_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDmaAddressGuid  = FW_CONFIG_DMA_ADDRESS_HOB_GUID;

Oh.  I assumed that would be obvious (because it's common practice for
HOBs), but I was thinking about a single HOB containing a struct with
all three values instead of a separate HOB for each value.
If uses a single HOB, it must define a structure in this library, and it 
may be more complicated to build and parse the HOB.


take care,
   Gerd








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Re: [edk2-devel] [PATCH v2 3/7] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Hi Gerd,


Thanks,
Chao
On 2024/4/25 15:53, Gerd Hoffmann wrote:

   Hi,


+UINTN  mFwCfgSelectorAddress;
+UINTN  mFwCfgDataAddress;
+UINTN  mFwCfgDmaAddress;

Hmm, global variables for PEI?  I think the point of storing these in
the HOB is to avoid the need for global variables?  Also does that work
when running PEI in-place from flash?
I think it would be useful if some platforms(not LoongArch) could use 
the global variables in PEI, because the global variables are faster.



+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;

First thing this function should do is check whenever the HOB already
exists.  Should that be the case there is no need to parse the device
tree.
This is a constructor in PEI, that has to parse the device tree and then 
build the HOBs.


take care,
   Gerd








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[edk2-devel] [PATCH v2 7/7] OvmfPkg: Remove QemuFwCfgLibMmio.inf

[Chao Li]

All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 51 ---
 1 file changed, 51 deletions(-)
 delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
deleted file mode 100644
index 8e191f2d22..00
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ /dev/null
@@ -1,51 +0,0 @@
-## @file
-#
-#  Stateful, implicitly initialized fw_cfg library.
-#
-#  Copyright (C) 2013 - 2014, Red Hat, Inc.
-#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
-#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
-  INF_VERSION= 0x00010005
-  BASE_NAME  = QemuFwCfgLib
-  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
-  MODULE_TYPE= BASE
-  VERSION_STRING = 1.0
-  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
-
-  CONSTRUCTOR= QemuFwCfgInitialize
-
-#
-# The following information is for reference only and not required by the build
-# tools.
-#
-#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
-#
-
-[Sources]
-  QemuFwCfgLibMmio.c
-  QemuFwCfgMmioDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  OvmfPkg/OvmfPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  HobLib
-  IoLib
-  UefiBootServicesTableLib
-
-[Protocols]
-  gFdtClientProtocolGuid## CONSUMES
-
-[Depex]
-  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v2 6/7] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc

Build-tested only (with "RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc 
b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v2 4/7] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf

[Chao Li]

Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf  | 52 +++
 1 file changed, 52 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
new file mode 100644
index 00..7a36b2ad93
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
@@ -0,0 +1,52 @@
+## @file
+#
+#  Stateful, implicitly initialized fw_cfg library.
+#
+#  Copyright (C) 2013 - 2014, Red Hat, Inc.
+#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = QemuFwCfgLib
+  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
+
+  CONSTRUCTOR= QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+  QemuFwCfgLibMmio.c
+  QemuFwCfgMmioDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  IoLib
+  PcdLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gFdtClientProtocolGuid## CONSUMES
+
+[Depex]
+  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v2 5/7] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf

[Chao Li]

Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f6f7835955..7e2ff33ad1 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v2 2/7] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

[Chao Li]

Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 176 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   1 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   |  51 +
 3 files changed, 218 insertions(+), 10 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index dc949c8e26..c7cf5719e2 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -8,11 +8,16 @@
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
+#include 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,6 +26,157 @@
 
 #include "QemuFwCfgLibMmioInternal.h"
 
+EFI_GUID  mFwCfgSelectorAddressGuid = FW_CONFIG_SELECTOR_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDataAddressGuid = FW_CONFIG_DATA_ADDRESS_HOB_GUID;
+EFI_GUID  mFwCfgDmaAddressGuid  = FW_CONFIG_DMA_ADDRESS_HOB_GUID;
+
+/**
+  Build firmware configure selector address HOB.
+
+  @param[in]   FwCfgSelectorAddress  Firmware configure selector address
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgSelectorHob (
+  IN UINT64  FwCfgSelectorAddress
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *),
+sizeof (UINT64)
+);
+}
+
+/**
+  Build firmware configure data address HOB.
+
+  @param[in]   FwCfgDataAddress  Firmware configure data address.
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgDataHob (
+  IN UINT64  FwCfgDataAddress
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *),
+sizeof (UINT64)
+);
+}
+
+/**
+  Build firmware configure DMA address HOB.
+
+  @param[in]   FwCfgDmaAddress  Firmware configure DMA address.
+
+  @retval  NULL
+**/
+VOID
+QemuBuildFwCfgDmaHob (
+  IN UINT64  FwCfgDmaAddress
+  )
+{
+  BuildGuidDataHob (
+,
+(VOID *),
+sizeof (UINT64)
+);
+}
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgSelectorAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgSelectorAddress = mFwCfgSelectorAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgSelectorAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgSelectorAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgDataAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgDataAddress = mFwCfgDataAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgDataAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgDataAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  UINTN  FwCfgDmaAddress;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  VOID   *DataInHob;
+
+  FwCfgDmaAddress = mFwCfgDmaAddress;
+  GuidHob  = NULL;
+  DataInHob= NULL;
+
+  if (FwCfgDmaAddress == 0) {
+GuidHob  = GetFirstGuidHob ();
+DataInHob= GET_GUID_HOB_DATA (GuidHob);
+FwCfgDmaAddress = (UINT64)(*(UINTN *)DataInHob);
+  }
+
+  return FwCfgDmaAddress;
+}
+
 /**
   Returns a boolean indicating if the firmware configuration interface
   is available or not.
@@ -37,7 +193,7 @@ QemuFwCfgIsAvailable (
   VOID
   )
 {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
 }
 
 /**
@@ -56,7 +212,7 @@ QemuFwCfgSelectItem (
   )
 {
   if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
   }
 }
 
@@ -86,30 +242,30 @@ MmioReadBytes (
 
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
   while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAdd

[edk2-devel] [PATCH v2 3/7] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Co-authored-by: Xianglai Li 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 175 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  48 +
 2 files changed, 223 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..200d91b0f4
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,175 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+UINTN  mFwCfgSelectorAddress;
+UINTN  mFwCfgDataAddress;
+UINTN  mFwCfgDmaAddress;
+
+//
+// These correspond to the implementation we detect at runtime.
+//
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+ FwCfgDataAddress = SwapBytes64 (Reg[0]);
+ FwCfgDataSize= 8;
+ FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+ FwCfgSelectorSize= 2;
+
+ //
+ // The following ASSERT()s express
+ //
+ //   Address + Size - 1 <= MAX_UINTN
+ //
+ // for both registers, that is, that the last byte in each MMIO range 
is
+ // expressible as a MAX_UINTN. The form below is mathematically
+ // equivalent, and it also prevents any unsigned overflow before the
+ // comparison.
+ //
+ ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+ ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
+
+
+ mFwCfgSelectorAddress = FwCfgSelectorAddress;
+ if (mFwCfgSelectorAddress) {
+   QemuBuildFwCfgSelectorHob (FwCfgSelectorAddress);
+ }
+
+ mFwCfgDataAddress = FwCfgDataAddress;
+ if (mFwCfgDataAddress) {
+   QemuBuildFwCfgDataHob (FwCfgDataAddress);
+ }
+
+ DEBUG ((
+   DEBUG_INFO,
+   "Found FwCfg @ 0x%Lx/0x%Lx\n",
+   FwCfgSelectorAddress,
+   FwCfgDataAddress
+   ));
+
+ if (SwapBytes64 (Reg[1]) >= 0x18) {
+   FwCfgDmaAddress = FwCfgDataAddress + 0x10;
+   FwCfgDmaSize= 0x08;
+
+   //
+   // See explanation above.
+   //
+   ASSERT (FwCfgDmaAddress <= MAX_UINTN - FwCfgDmaSize + 1);
+
+   DEBUG ((DEBUG_INFO, "Found FwCfg DMA @ 0x%Lx\n", FwCfgDmaAddress));
+} else {
+  FwCfgDmaAddress = 0;
+}
+
+if (QemuFwCfgIsAvailable ()) {
+  UINT32  Signature;
+
+  QemuFwCfgSelectItem (QemuFwCfgItemSignature);
+  Signature = QemuFwCfgRead32 ();
+  if (Signature == SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
+//
+// F

[edk2-devel] [PATCH v2 1/7] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

[Chao Li]

Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 194 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   4 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 179 
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 153 ++
 4 files changed, 340 insertions(+), 190 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..dc949c8e26 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,10 +1,9 @@
 /** @file
 
-  Stateful and implicitly initialized fw_cfg library implementation.
-
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -20,63 +19,7 @@
 
 #include 
 
-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
-
-//
-// These correspond to the implementation we detect at runtime.
-//
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
 
 /**
   Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +40,6 @@ QemuFwCfgIsAvailable (
   return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
 }
 
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress = SwapBytes64 (Reg[0]);
-  FwCfgDataSize= 8;
-  FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
-  FwCfgSelectorSize= 2;
-
-  //
-  // The following ASSERT()s express
-  //
-  //   Address + Size - 1 <= MAX_UINTN
-  //
-  // for both registers, that is, that the last byte in each MMIO 

[edk2-devel] [PATCH v2 0/7] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR: https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 

Chao Li (7):
  OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
  OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
  OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
  OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
  ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg: Remove QemuFwCfgLibMmio.inf

 ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 324 --
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 230 +
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 153 +
 ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |   6 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 175 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  48 +++
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
 9 files changed, 762 insertions(+), 180 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (80%)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

-- 
2.27.0



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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Hi Ard,

OK, let's go with HOBs and today I'm going to send the V2. :)


Thanks,
Chao
On 2024/4/25 00:23, Ard Biesheuvel wrote:

On Wed, 24 Apr 2024 at 13:19, Gerd Hoffmann  wrote:

On Wed, Apr 24, 2024 at 09:57:50AM +0800, Chao Li wrote:

Hi Gerd and Ard,

Can I submit the V2 this week? I want all OvmfPkg changes to be meged before
the 202405 feature freeze.

Yea, go ahead, lets stick to the PCD approach, given that Ard seems to
not have objections to that ;)


Apologies for my late response.

As I have mentioned before (I think?) I strongly prefer HOBs over
dynamic PCDs for values that are determined during PEI and not updated
later.

For other cases, I actually prefer protocols over PCDs because you can
depex on protocols, and not on PCDs so you never know if the dispatch
order is correct, i.e., whether PCD producers are dispatched before
PCD consumers.







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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Gerd,

Ha, it seems that Ard have already given the answer... I will adjust 
according to Ard's suggestion and send the V2 today. :)



Thanks,
Chao
On 2024/4/24 19:19, Gerd Hoffmann wrote:

On Wed, Apr 24, 2024 at 09:57:50AM +0800, Chao Li wrote:

Hi Gerd and Ard,

Can I submit the V2 this week? I want all OvmfPkg changes to be meged before
the 202405 feature freeze.

Yea, go ahead, lets stick to the PCD approach, given that Ard seems to
not have objections to that ;)

take care,
   Gerd



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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Hi Gerd and Ard,

Can I submit the V2 this week? I want all OvmfPkg changes to be meged 
before the 202405 feature freeze.



Thanks,
Chao
On 2024/4/22 17:21, Chao Li wrote:


Hi Ard,

Could you take a look at this patch set and give you some suggestions?

On 2024/4/17 18:01, Chao Li wrote:


Hi Gerd,

On 2024/4/17 17:35, Gerd Hoffmann wrote:

On Wed, Apr 17, 2024 at 04:12:56PM +0800, Chao Li wrote:

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

Ok, I see, you are using the PCDs because global variables don't work
in PEI.

Yes. :)

Alternative approach would be to create a HOB for that (see
EFI_HOB_PLATFORM_INFO used by X64).  Not sure this is a good idea
though given that we have three different architectures using that code.
Ard, any advise?
I think HOB might be heavy, and the dynamically PCD is also uses the 
HOB, so this I think this way is more simpler. I'm also looking 
forward Ard's suggestions. :)

   OvmfPkg: Add three PCDs for QemuFwCfgLib
   OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

This patch should be splitted into two, one doing the code split without
functional change, and one which switches from global variables to PCDs
(or HOB).

OK, I will split it in V2.

Otherwise this looks good to me (and I'd suggest to keep and merge this
as separate patch series).

Sure!

take care,
   Gerd










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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Hi Ard,

Could you take a look at this patch set and give you some suggestions?


Thanks,
Chao
On 2024/4/17 18:01, Chao Li wrote:


Hi Gerd,

On 2024/4/17 17:35, Gerd Hoffmann wrote:

On Wed, Apr 17, 2024 at 04:12:56PM +0800, Chao Li wrote:

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

Ok, I see, you are using the PCDs because global variables don't work
in PEI.

Yes. :)

Alternative approach would be to create a HOB for that (see
EFI_HOB_PLATFORM_INFO used by X64).  Not sure this is a good idea
though given that we have three different architectures using that code.
Ard, any advise?
I think HOB might be heavy, and the dynamically PCD is also uses the 
HOB, so this I think this way is more simpler. I'm also looking 
forward Ard's suggestions. :)

   OvmfPkg: Add three PCDs for QemuFwCfgLib
   OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

This patch should be splitted into two, one doing the code split without
functional change, and one which switches from global variables to PCDs
(or HOB).

OK, I will split it in V2.

Otherwise this looks good to me (and I'd suggest to keep and merge this
as separate patch series).

Sure!

take care,
   Gerd










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Re: [edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Hi Gerd,


Thanks,
Chao
On 2024/4/17 17:35, Gerd Hoffmann wrote:

On Wed, Apr 17, 2024 at 04:12:56PM +0800, Chao Li wrote:

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

Ok, I see, you are using the PCDs because global variables don't work
in PEI.

Yes. :)


Alternative approach would be to create a HOB for that (see
EFI_HOB_PLATFORM_INFO used by X64).  Not sure this is a good idea
though given that we have three different architectures using that code.
Ard, any advise?
I think HOB might be heavy, and the dynamically PCD is also uses the 
HOB, so this I think this way is more simpler. I'm also looking forward 
Ard's suggestions. :)



   OvmfPkg: Add three PCDs for QemuFwCfgLib
   OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

This patch should be splitted into two, one doing the code split without
functional change, and one which switches from global variables to PCDs
(or HOB).

OK, I will split it in V2.


Otherwise this looks good to me (and I'd suggest to keep and merge this
as separate patch series).

Sure!


take care,
   Gerd








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[edk2-devel] [PATCH v1 3/4] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

[Chao Li]

Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Co-authored-by: Xianglai Li 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 159 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  50 ++
 2 files changed, 209 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..233a88c353
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,159 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+//
+// These correspond to the implementation we detect at runtime.
+//
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+  if ((Reg != 0) &&
+  (Len == (2 * sizeof (UINT64
+  {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT()s express
+//
+//   Address + Size - 1 <= MAX_UINTN
+//
+// for both registers, that is, that the last byte in each MMIO range 
is
+// expressible as a MAX_UINTN. The form below is mathematically
+// equivalent, and it also prevents any unsigned overflow before the
+// comparison.
+//
+ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
+
+PcdSet64S (PcdFwCfgSelectorAddress, FwCfgSelectorAddress);
+PcdSet64S (PcdFwCfgDataAddress, FwCfgDataAddress);
+DEBUG ((
+  DEBUG_INFO,
+  "Found FwCfg @ 0x%Lx/0x%Lx\n",
+  FwCfgSelectorAddress,
+  FwCfgDataAddress
+  ));
+
+if (SwapBytes64 (Reg[1]) >= 0x18) {
+  FwCfgDmaAddress = FwCfgDataAddress + 0x10;
+  FwCfgDmaSize= 0x08;
+
+  //
+  // See explanation above.
+  //
+  ASSERT (FwCfgDmaAddress <= MAX_UINTN - FwCfgDmaSize + 1);
+
+  DEBUG ((DEBUG_INFO, "Found FwCfg DMA @ 0x%Lx\n", FwCfgDmaAddress));
+} else {
+  FwCfgDmaAddress = 0;
+}
+
+if (QemuFwCfgIsAvailable ()) {
+  UINT32  Signature;
+
+  QemuFwCfgSelectItem (QemuFwCfgItemSignature);
+  Signature = QemuFwCfgRead32 ();
+  if (Signature == SIGNATURE_32 ('Q', 'E', 'M', 'U')) {
+//
+// For DMA support, we require the DTB to advertise the register, 
and the
+// feature bitmap (which we read without DMA) to confirm the 
feature.
+//
+if (FwCfgDmaAddress != 0) {
+  UINT32  Features;
+
+  

[edk2-devel] [PATCH v1 4/4] OvmfPkg: Rename QemuFwCfgLibMmio.inf and enable new name in AARCH64 and RISCV64 virtual machines

[Chao Li]

Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf, and enable the
new name in the AARCH64 and RISCV64 virtual machines.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc  | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc| 2 +-
 .../{QemuFwCfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf}   | 0
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
 4 files changed, 3 insertions(+), 3 deletions(-)
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (100%)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index e48c75b5e9..987b8bb238 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
similarity index 100%
rename from OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
rename to OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc 
b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v1 2/4] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

[Chao Li]

Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 213 ++
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |  10 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 174 ++
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 149 
 4 files changed, 346 insertions(+), 200 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..2a07273bed 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,7 +1,5 @@
 /** @file
 
-  Stateful and implicitly initialized fw_cfg library implementation.
-
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
@@ -20,63 +18,7 @@
 
 #include 
 
-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
-
-//
-// These correspond to the implementation we detect at runtime.
-//
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
 
 /**
   Returns a boolean indicating if the firmware configuration interface
@@ -94,127 +36,7 @@ QemuFwCfgIsAvailable (
   VOID
   )
 {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
-}
-
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress = SwapBytes64 (Reg[0]);
-  FwCfgDataSize= 8;
-  FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
-  FwCfgSelectorSize= 2;
-
-  //
-  // The following ASSERT()s express
-  //
-  //   Address + Size - 1 <= MAX_UINTN
-  //
-  // for both registers, that is, that the last byte in each MMIO range is
-  // expressible as a MAX_UINTN. The form below is mathematically
-  // equivalent, and it also prevents any unsig

[edk2-devel] [PATCH v1 1/4] OvmfPkg: Add three PCDs for QemuFwCfgLib

[Chao Li]

Added three PCDs named PcdFwCfgSelectorAddress, PcdFwCfgDataAddress and
PcdFwCfgDmaAddress, all of type PcdsDynamic and PcdDynamicEx, whcih will
be used in QemuFwCfgLibMmio version to replace the three global
variables in QemuFwCfgLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 OvmfPkg/OvmfPkg.dec | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index fbc81e4c80..c09b92df60 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -390,6 +390,24 @@ [PcdsDynamic, PcdsDynamicEx]
   #
   gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|0x0|BOOLEAN|0x69
 
+  #
+  # This PCD uses to save the fw_cfg selector address when using the QEMU
+  # as the emulator.
+  #
+  gUefiOvmfPkgTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x70
+
+  #
+  # This PCD uses to save the fw_cfg data address when using the QEMU
+  # as the emulator.
+  #
+  gUefiOvmfPkgTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x71
+
+  #
+  # This PCD uses to save the fw_cfg DMA address when using the QEMU
+  # as the emulator.
+  #
+  gUefiOvmfPkgTokenSpaceGuid.PcdFwCfgDmaAddress|0x0|UINT64|0x72
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   #
   # This is the physical address where the device tree is expected to be stored
-- 
2.27.0



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[edk2-devel] [PATCH v1 0/4] Adjust the QemuFwCfgLibMmio and add PEI stage

[Chao Li]

Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR: https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 

Chao Li (4):
  OvmfPkg: Add three PCDs for QemuFwCfgLib
  OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
  OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
  OvmfPkg: Rename QemuFwCfgLibMmio.inf and enable new name in AARCH64
and RISCV64 virtual machines

 ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 213 ++
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 174 ++
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 149 
 ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |  10 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 159 +
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  50 
 OvmfPkg/OvmfPkg.dec   |  18 ++
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
 10 files changed, 576 insertions(+), 203 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (69%)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

-- 
2.27.0



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Re: [edk2-devel] [PATCH v1 21/26] OvmfPkg/LoongArchVirt: Add FdtQemuFwCfgLib

[Chao Li]

Hi Gerd,


Thanks,
Chao
On 2024/4/17 14:59, Gerd Hoffmann wrote:

On Wed, Apr 17, 2024 at 10:53:21AM +0800, Chao Li wrote:

Hi Gerd,

Part 2 has been be merged, I'm separating  this Lib into two serve the PEI
stage and DXE stage.

Currently, This DXE library uses three global variables, and when I simulate
the no-mmio version: MmioLib.c + Dxe.c + Pei.c, I can abstract some helper
functions as the public functions in Mmio version.

Do you mind if I replace these three vaiables with three dynamically typed
PCDs? If so, the PEI and DXE stage libraries can using  some of the same
APIs.

What is your idea?  Let PEI discover fw_cfg, store results in PCDs, and
DXE will read the PCDs instead of using FdtClientProtocol to find the
fw_cfg?

Note that risc-v and arm don't need access to fw_cfg in PEI, so this
approach would not work for them.


No no no, I mean these two stages have their own way to get the FDT 
resouces, for example: PEI stage uses fdtlib to find the fw_cfg and the 
DXE stage uses FdtClientProtocol to find the fw_cfg, DXE will look for 
fw_cfg anyway.


Can I submit a patch set for quick review by you? It content only four 
patches.




take care,
   Gerd



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Re: [edk2-devel] [PATCH v1 21/26] OvmfPkg/LoongArchVirt: Add FdtQemuFwCfgLib

[Chao Li]

Hi Gerd,

Part 2 has been be merged, I'm separating  this Lib into two serve the 
PEI stage and DXE stage.


Currently, This DXE library uses three global variables, and when I 
simulate the no-mmio version: MmioLib.c + Dxe.c + Pei.c, I can abstract 
some helper functions as the public functions in Mmio version.


Do you mind if I replace these three vaiables with three dynamically 
typed PCDs? If so, the PEI and DXE stage libraries can using  some of 
the same APIs.



Thanks,
Chao
On 2024/3/21 20:27, Chao Li wrote:


Hi Gerd,

On 2024/3/21 19:39, Gerd Hoffmann wrote:

   Hi,


QemuFwCfgLibMmio.inf is looks like a DXE stage library, while this patch is
the PEI stage library we are dicussing.

I have tow plans:

*Plan A:* Keep this library under LoongArchQemuVirt.

*Plan  B:* Create a new INF named QemuFwCfgPeiLibMmio.inf under
OvmfPkg/Library/QemuFwCfgLib/, which will obtain the resources from FDT, and
store them in the HOB or dynamic PCD.

Which one do you like? I'm leaning toward B because more people will be
served if it's under OvmfPkg/Library.

Yes, Plan (b) is better.  Also try avoid code duplication.  The existing
code can be splitted into two files.  Move the code which works in DXE
only (i.e. the bits using FdtClientProtocol to find the fw_cfg mmio
address, maybe more) to QemuFwCfgLibMmioDxe.c, keep the code which can
work for both PEI and DXE in QemuFwCfgLibMmio.c.  Add
QemuFwCfgLibMmioPei.c for the PEI-specific code.

The ioport version of the library uses the same approach with
QemuFwCfgLib.c + QemuFwCfgDxe.c + QemuFwCfgPei.c
OK, I'm going to do the plan B next and commit it with the next 
version, which will probably be called "Part 3 patch set, enable 
LoongArchVirtQemu in OvmfPkg".

take care,
   Gerd










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[edk2-devel] [PATCH v4 13/13] UefiCpuPkg/UefiCpuPkg.dsc: Add CpuMmio2Dxe.inf to LoongArch64 field

[Chao Li]

LoongArch64 requires CpuMmio2Dxe, add it into LoongArch64 field.

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/UefiCpuPkg.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index e92ceb6466..1af5a0c525 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -213,6 +213,7 @@ [Components.RISCV64]
 
 [Components.LOONGARCH64]
   UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
+  UefiCpuPkg/CpuMmio2Dxe/CpuMmio2Dxe.inf
 
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
-- 
2.27.0



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[edk2-devel] [PATCH v4 12/13] UefiCpuPkg: Add CpuDxe driver for LoongArch64

[Chao Li]

Added LoongArch64 CPU driver into CpuDxe.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 
Acked-by: Gerd Hoffmann 
Acked-by: Ray Ni 
---
 UefiCpuPkg/CpuDxe/CpuDxe.inf  |  25 +-
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c| 514 
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h| 288 
 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c | 544 ++
 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c | 159 +++
 5 files changed, 1526 insertions(+), 4 deletions(-)
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 9e1c673283..fca74c44b3 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -3,6 +3,7 @@
 #
 #  Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -22,7 +23,7 @@ [Packages]
   MdeModulePkg/MdeModulePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
 
-[LibraryClasses]
+[LibraryClasses.common]
   BaseLib
   BaseMemoryLib
   CpuExceptionHandlerLib
@@ -30,9 +31,7 @@ [LibraryClasses]
   DebugLib
   DxeServicesTableLib
   HobLib
-  LocalApicLib
   MemoryAllocationLib
-  MtrrLib
   MpInitLib
   PeCoffGetEntryPointLib
   ReportStatusCodeLib
@@ -41,7 +40,15 @@ [LibraryClasses]
   UefiDriverEntryPoint
   UefiLib
 
-[Sources]
+[LibraryClasses.IA32, LibraryClasses.X64]
+  LocalApicLib
+  MtrrLib
+
+[LibraryClasses.LoongArch64]
+  CacheMaintenanceLib
+  CpuMmuLib
+
+[Sources.IA32, Sources.X64]
   CpuDxe.c
   CpuDxe.h
   CpuGdt.c
@@ -59,6 +66,13 @@ [Sources.X64]
   X64/CpuAsm.nasm
   X64/PagingAttribute.c
 
+[Sources.LoongArch64]
+  CpuMp.h
+  LoongArch64/CpuDxe.c
+  LoongArch64/CpuMp.c
+  LoongArch64/Exception.c
+  LoongArch64/CpuDxe.h
+
 [Protocols]
   gEfiCpuArchProtocolGuid   ## PRODUCES
   gEfiMpServiceProtocolGuid ## PRODUCES
@@ -81,6 +95,9 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize## 
CONSUMES
 
+[Pcd.LoongArch64]
+  gUefiCpuPkgTokenSpaceGuid.PcdLoongArchExceptionVectorBaseAddress  ## 
CONSUMES
+
 [Depex]
   TRUE
 
diff --git a/UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c 
b/UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
new file mode 100644
index 00..404ccfd30f
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
@@ -0,0 +1,514 @@
+/** @file CpuDxe.c
+
+  CPU DXE Module to produce CPU ARCH Protocol.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "CpuDxe.h"
+#include "CpuMp.h"
+#include 
+#include 
+#include 
+#include 
+
+UINT64  mTimerPeriod = 0;
+
+/**
+  IPI Interrupt Handler.
+
+  @param InterruptTypeThe type of interrupt that occurred
+  @param SystemContextA pointer to the system context when the interrupt 
occurred
+**/
+VOID
+EFIAPI
+IpiInterruptHandler (
+  IN EFI_EXCEPTION_TYPE  InterruptType,
+  IN EFI_SYSTEM_CONTEXT  SystemContext
+  );
+
+//
+// Globals used to initialize the protocol
+//
+EFI_HANDLE mCpuHandle = NULL;
+EFI_CPU_ARCH_PROTOCOL  gCpu   = {
+  CpuFlushCpuDataCache,
+  CpuEnableInterrupt,
+  CpuDisableInterrupt,
+  CpuGetInterruptState,
+  CpuInit,
+  CpuRegisterInterruptHandler,
+  CpuGetTimerValue,
+  CpuSetMemoryAttributes,
+  0,  // NumberOfTimers
+  4,  // DmaBufferAlignment
+};
+
+/**
+  This function flushes the range of addresses from Start to Start+Length
+  from the processor's data cache. If Start is not aligned to a cache line
+  boundary, then the bytes before Start to the preceding cache line boundary
+  are also flushed. If Start+Length is not aligned to a cache line boundary,
+  then the bytes past Start+Length to the end of the next cache line boundary
+  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+  supported. If the data cache is fully coherent with all DMA operations, then
+  this function can just return EFI_SUCCESS. If the processor does not support
+  flushing a range of the data cache, then the entire data cache can be 
flushed.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+  @param  StartThe beginning physical address to flush from the 
processor's data
+   cache.
+  @param  Length   The number of bytes to flush from the pro

[edk2-devel] [PATCH v4 11/13] UefiCpuPkg: Add multiprocessor library for LoongArch64

[Chao Li]

Added LoongArch multiprocessor initialization instance into MpInitLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |   23 +-
 .../Library/MpInitLib/LoongArch64/DxeMpLib.c  |  480 +
 .../Library/MpInitLib/LoongArch64/MpLib.c | 1626 +
 .../Library/MpInitLib/LoongArch64/MpLib.h |  350 
 .../Library/MpInitLib/LoongArch64/PeiMpLib.c  |  381 
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |   23 +-
 6 files changed, 2871 insertions(+), 12 deletions(-)
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/MpLib.c
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/MpLib.h
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/PeiMpLib.c

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 7ef4c0d4db..407f4988b5 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -2,6 +2,7 @@
 #  MP Initialize Library instance for DXE driver.
 #
 #  Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -18,7 +19,7 @@ [Defines]
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64
+#  VALID_ARCHITECTURES   = IA32 X64 LOONGARCH64
 #
 
 [Sources.IA32]
@@ -31,7 +32,7 @@ [Sources.X64]
   X64/CreatePageTable.c
   X64/MpFuncs.nasm
 
-[Sources.common]
+[Sources.IA32, Sources.X64]
   AmdSev.c
   DxeMpLib.c
   Microcode.c
@@ -40,6 +41,11 @@ [Sources.common]
   MpLib.h
   MpHandOff.h
 
+[Sources.LoongArch64]
+  LoongArch64/DxeMpLib.c
+  LoongArch64/MpLib.c
+  LoongArch64/MpLib.h
+
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
@@ -47,18 +53,20 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  CcExitLib
   CpuLib
   DebugAgentLib
   HobLib
-  LocalApicLib
   MemoryAllocationLib
-  MicrocodeLib
-  MtrrLib
   PcdLib
   SynchronizationLib
   UefiBootServicesTableLib
 
+[LibraryClasses.IA32, LibraryClasses.X64]
+  CcExitLib
+  LocalApicLib
+  MicrocodeLib
+  MtrrLib
+
 [LibraryClasses.X64]
   CpuPageTableLib
 
@@ -70,6 +78,9 @@ [Guids]
   gEfiEventLegacyBootGuid   ## SOMETIMES_CONSUMES  ## Event
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
 
+[Guids.LoongArch64]
+  gProcessorResourceHobGuid ## SOMETIMES_CONSUMES  ## HOB
+
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c 
b/UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c
new file mode 100644
index 00..739da77e32
--- /dev/null
+++ b/UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c
@@ -0,0 +1,480 @@
+/** @file
+  LoongArch64 MP initialize support functions for DXE phase.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "MpLib.h"
+
+#include 
+#include 
+#include 
+
+#include 
+
+CPU_MP_DATA   *mCpuMpData= NULL;
+EFI_EVENT mCheckAllApsEvent  = NULL;
+volatile BOOLEAN  mStopCheckAllApsStatus = TRUE;
+
+/**
+  Enable Debug Agent to support source debugging on AP function.
+
+**/
+VOID
+EnableDebugAgent (
+  VOID
+  )
+{
+  //
+  // Initialize Debug Agent to support source level debug in DXE phase
+  //
+  InitializeDebugAgent (DEBUG_AGENT_INIT_DXE_AP, NULL, NULL);
+}
+
+/**
+  Get the pointer to CPU MP Data structure.
+
+  @return  The pointer to CPU MP Data structure.
+**/
+CPU_MP_DATA *
+GetCpuMpData (
+  VOID
+  )
+{
+  ASSERT (mCpuMpData != NULL);
+  return mCpuMpData;
+}
+
+/**
+  Save the pointer to CPU MP Data structure.
+
+  @param[in] CpuMpData  The pointer to CPU MP Data structure will be saved.
+**/
+VOID
+SaveCpuMpData (
+  IN CPU_MP_DATA  *CpuMpData
+  )
+{
+  mCpuMpData = CpuMpData;
+}
+
+/**
+  Get available EfiBootServicesCode memory below 4GB by specified size.
+
+  This buffer is required to safely transfer AP from real address mode to
+  protected mode or long mode, due to the fact that the buffer returned by
+  GetWakeupBuffer() may be marked as non-executable.
+
+  @param[in] BufferSize   Wakeup transition buffer size.
+
+  @retval other   Return wakeup transition buffer address below 4GB.
+  @retval 0   Cannot find free memory below 4GB.
+**/
+UINTN
+GetModeTransitionBuffer (
+  IN UINTN  BufferSize
+  )
+{
+  return 0;
+}
+
+/**
+  Checks APs status and updates 

[edk2-devel] [PATCH v4 10/13] UefiCpuPkg: Add a new GUID to store the processors resource

[Chao Li]

On a multi-processor system, if the BSP dose not know how many APs are
online or cannot wake up the AP via broadcast, it can collect AP
resouces before wakeing up the AP and add a new HOB to save the
processor resouces.

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Include/Guid/ProcessorResourceHob.h   | 29 +++
 UefiCpuPkg/UefiCpuPkg.dec |  3 ++
 2 files changed, 32 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Guid/ProcessorResourceHob.h

diff --git a/UefiCpuPkg/Include/Guid/ProcessorResourceHob.h 
b/UefiCpuPkg/Include/Guid/ProcessorResourceHob.h
new file mode 100644
index 00..9890cc3ea9
--- /dev/null
+++ b/UefiCpuPkg/Include/Guid/ProcessorResourceHob.h
@@ -0,0 +1,29 @@
+/** @file
+  Processor resource HOB
+
+  If BSP does not known how many cores are online or the platform cannot
+  wake up AP via broadcast, this HOB can be used to store the processor
+  resource data that may come from ACPI or FDT, etc.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PROCESSOR_RESOURCE_HOB_H_
+#define PROCESSOR_RESOURCE_HOB_H_
+
+#define PROCESSOR_RESOURCE_HOB_GUID \
+  { \
+0xb855c7fe, 0xa758, 0x701f, { 0xa7, 0x30, 0x87, 0xf3, 0x9c, 0x03, 0x46, 
0x7e } \
+  }
+
+typedef struct {
+  UINT32NumberOfProcessor;
+  UINTN ApicId[];
+} PROCESSOR_RESOURCE_DATA;
+
+extern EFI_GUID  gProcessorResourceHobGuid;
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 1b890e975c..8ca3b7a5a6 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -96,6 +96,9 @@ [Guids]
   ## Include/Guid/MpInformation2.h
   gMpInformation2HobGuid = { 0x417a7f64, 0xf4e9, 0x4b32, {0x84, 0x6a, 
0x5c, 0xc4, 0xd8, 0x62, 0x18, 0x79 }}
 
+  ## Include/Guid/ProcessorResourceHob.h
+  gProcessorResourceHobGuid  = { 0xb855c7fe, 0xa758, 0x701f, { 0xa7, 0x30, 
0x87, 0xf3, 0x9c, 0x03, 0x46, 0x7e }}
+
 [Protocols]
   ## Include/Protocol/SmmCpuService.h
   gEfiSmmCpuServiceProtocolGuid   = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 
0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
-- 
2.27.0



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[edk2-devel] [PATCH v4 09/13] UefiCpuPkg: Add CpuMmuLib to UefiCpuPkg

[Chao Li]

Add a new base library named CpuMmuLib and add a LoongArch64 instance
with in the library.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
Acked-by: Gerd Hoffmann 
Acked-by: Ray Ni 
---
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf|  39 +
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni|  14 +
 .../Library/CpuMmuLib/LoongArch64/CpuMmu.c| 784 ++
 .../Library/CpuMmuLib/LoongArch64/Page.h  |  33 +
 .../LoongArch64/TlbExceptionHandle.S  |  51 ++
 .../LoongArch64/TlbExceptionHandle.h  |  36 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.S|  24 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.h|  24 +
 UefiCpuPkg/UefiCpuPkg.dsc |   3 +
 9 files changed, 1008 insertions(+)
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/Page.h
 create mode 100644 
UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbExceptionHandle.S
 create mode 100644 
UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbExceptionHandle.h
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbInvalid.S
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbInvalid.h

diff --git a/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf 
b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
new file mode 100644
index 00..5eecfb4838
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
@@ -0,0 +1,39 @@
+## @file
+#  CPU Memory Manager Unit library instance.
+#
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = CpuMmuLib
+  MODULE_UNI_FILE= CpuMmuLib.uni
+  FILE_GUID  = DA8F0232-FB14-42F0-922C-63104D2C70BE
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = CpuMmuLib
+
+#
+#  VALID_ARCHITECTURES   = LOONGARCH64
+#
+
+[Sources.LoongArch64]
+  LoongArch64/TlbInvalid.S | GCC
+  LoongArch64/TlbExceptionHandle.S | GCC
+  LoongArch64/CpuMmu.c
+  LoongArch64/Page.h
+  LoongArch64/TlbInvalid.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  MemoryAllocationLib
+
+[Pcd.LoongArch64]
+  gUefiCpuPkgTokenSpaceGuid.PcdLoongArchExceptionVectorBaseAddress  ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni 
b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni
new file mode 100644
index 00..2408f2f90b
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni
@@ -0,0 +1,14 @@
+// /** @file
+// CPU Memory Manager Unit library instance.
+//
+// CPU Memory Manager Unit library instance.
+//
+// Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Memory Manager 
Unit library instance."
+
+#string STR_MODULE_DESCRIPTION  #language en-US "CPU Memory Manager 
Unit library instance."
diff --git a/UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c 
b/UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c
new file mode 100644
index 00..8f8254362f
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c
@@ -0,0 +1,784 @@
+/** @file
+
+  CPU Memory Map Unit Handler Library common functions.
+
+  Copyright (c) 2011-2020, ARM Limited. All rights reserved.
+  Copyright (c) 2016, Linaro Limited. All rights reserved.
+  Copyright (c) 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2023, Ventana Micro Systems Inc. All Rights Reserved.
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "TlbInvalid.h"
+#include "TlbExceptionHandle.h"
+#include "Page.h"
+
+/**
+  Check to see if mmu successfully initializes.
+
+  @param  VOID.
+
+  @retval  TRUE  Initialization has been completed.
+   FALSE Initialization did not complete.
+**/
+STATIC
+BOOLEAN
+MmuIsInit (
+  VOID
+  )
+{
+  if (CsrRead (LOONGARCH_CSR_PGDL) != 0) {
+return TRUE;
+  }
+
+  return FALSE;
+}
+
+/**
+  Check to see if mmu is enabled.
+
+  @param  VOID.
+
+  @retval  TRUE  MMU has been enabled.
+   FALSE MMU did not enabled.
+**/
+STATIC
+BOOLEAN
+MmuIsEnabled (
+  VOID
+  )
+{
+  if ((CsrRead (LOONGARCH_CSR_CRMD) & 

[edk2-devel] [PATCH v4 08/13] UefiCpuPkg: Added a new PCD named PcdLoongArchExceptionVectorBaseAddress

[Chao Li]

Added PcdLoongArchExceptionVectorBaseAddress use for storing the CPU
exception vector base address. This PCD can be populated at build time
or changed at runtime, and is used only by LoongArch.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/UefiCpuPkg.dec | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index ca744fab55..1b890e975c 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2007 - 2023, Intel Corporation. All rights reserved.
 # Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -414,6 +415,11 @@ [PcdsFixedAtBuild.RISCV64]
   #  10 - 57bit mode.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode|10|UINT32|0x6021
 
+[PcdsFixedAtBuild.LOONGARCH64, PcdsPatchableInModule.LOONGARCH64, 
PcdsDynamic.LOONGARCH64, PcdsDynamicEx.LOONGARCH64]
+  ## This PCD Contains the pointer to a CPU exception vector base address.
+  # @Prompt The pointer to a CPU exception vector base address.
+  
gUefiCpuPkgTokenSpaceGuid.PcdLoongArchExceptionVectorBaseAddress|0x0|UINT64|0x6022
+
 [PcdsDynamic, PcdsDynamicEx]
   ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
   # @Prompt The pointer to a CPU S3 data buffer.
-- 
2.27.0



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[edk2-devel] [PATCH v4 07/13] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg

[Chao Li]

Add a new header file CpuMmuLib.h, whitch is referenced from
ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
LoongArch64 is added, and more architectures can be accommodated in the
future.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Include/Library/CpuMmuLib.h | 41 ++
 UefiCpuPkg/UefiCpuPkg.dec  |  4 +++
 2 files changed, 45 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h

diff --git a/UefiCpuPkg/Include/Library/CpuMmuLib.h 
b/UefiCpuPkg/Include/Library/CpuMmuLib.h
new file mode 100644
index 00..e6cfbd5168
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/CpuMmuLib.h
@@ -0,0 +1,41 @@
+/** @file
+
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CPU_MMU_LIB_H_
+#define CPU_MMU_LIB_H_
+
+#include 
+
+/**
+  Maps the memory region in the page table to the specified attributes.
+
+  @param[in, out] PageTable  The pointer to the page table to update, or 
pointer to NULL
+ if a new page table is to be created.
+  @param[in]  PageWalkCfgThe page walk controller configure.
+  @param[in]  BaseAddressThe base address of the memory region to set 
the Attributes.
+  @param[in]  Length The length of the memory region to set the 
Attributes.
+  @param[in]  Attributes The bitmask of attributes to set, which refer 
to UEFI SPEC
+ 7.2.3(EFI_BOOT_SERVICES.GetMemoryMap()).
+  @param[in]  AttributeMask  Mask of memory attributes to take into 
account.
+
+  @retval EFI_SUCCESSThe Attributes was set successfully or Length 
is 0.
+  @retval EFI_INVALID_PARAMETER  PageTable is NULL.
+  @retval EFI_UNSUPPORTED*PageTable is NULL.
+**/
+EFI_STATUS
+EFIAPI
+MemoryRegionMap (
+  IN OUT UINTN *PageTable  OPTIONAL,
+  IN UINT64PageWalkCfg,
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINT64Length,
+  IN UINT64Attributes,
+  IN UINT64AttributeMask
+  );
+
+#endif // CPU_MMU_LIB_H_
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 571b59b36f..ca744fab55 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -72,6 +72,10 @@ [LibraryClasses.RISCV64]
   ##
   RiscVMmuLib|Include/Library/BaseRiscVMmuLib.h
 
+[LibraryClasses.LoongArch64]
+  ##  @libraryclass  Provides functions for the memory management unit.
+  CpuMmuLib|Include/Library/CpuMmuLib.h
+
 [Guids]
   gUefiCpuPkgTokenSpaceGuid  = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 
0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
   gMsegSmramGuid = { 0x5802bce4, 0x, 0x4e33, { 0xa1, 0x30, 
0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
-- 
2.27.0



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[edk2-devel] [PATCH v4 06/13] UefiCpuPkg: Add CPU exception library for LoongArch

[Chao Li]

Added LoongArch exception handler into CpuExceptionHandlerLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 .../DxeCpuExceptionHandlerLib.inf |  23 +-
 .../LoongArch/DxeExceptionLib.c   | 198 ++
 .../LoongArch/ExceptionCommon.c   | 171 
 .../LoongArch/ExceptionCommon.h   | 131 +++
 .../LoongArch64/ArchExceptionHandler.c| 268 +
 .../LoongArch64/ExceptionHandlerAsm.S | 366 ++
 .../LoongArch/SecPeiExceptionLib.c| 102 +
 .../SecPeiCpuExceptionHandlerLib.inf  |  23 +-
 8 files changed, 1273 insertions(+), 9 deletions(-)
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/ExceptionCommon.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/ExceptionCommon.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/LoongArch64/ArchExceptionHandler.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/LoongArch64/ExceptionHandlerAsm.S
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/SecPeiExceptionLib.c

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
index aabcabff0f..9fcba009d6 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -2,6 +2,7 @@
 #  CPU Exception Handler library instance for DXE modules.
 #
 #  Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -18,7 +19,7 @@ [Defines]
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64
+#  VALID_ARCHITECTURES   = IA32 X64 LOONGARCH64
 #
 
 [Sources.Ia32]
@@ -32,12 +33,19 @@ [Sources.X64]
   X64/ArchInterruptDefs.h
   X64/ExceptionHandlerAsm.nasm
 
-[Sources.common]
+[Sources.Ia32, Sources.X64]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
   DxeException.c
   PeiDxeSmmCpuException.c
 
+[Sources.LoongArch64]
+  LoongArch/DxeExceptionLib.c
+  LoongArch/ExceptionCommon.h
+  LoongArch/ExceptionCommon.c
+  LoongArch/LoongArch64/ArchExceptionHandler.c
+  LoongArch/LoongArch64/ExceptionHandlerAsm.S | GCC
+
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
@@ -51,16 +59,21 @@ [Packages]
   MdeModulePkg/MdeModulePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
 
-[LibraryClasses]
+[LibraryClasses.common]
   BaseLib
-  CcExitLib
   DebugLib
-  LocalApicLib
   MemoryAllocationLib
   PeCoffGetEntryPointLib
   PrintLib
   SerialPortLib
   SynchronizationLib
 
+[LibraryClasses.Ia32, LibraryClasses.X64]
+  CcExitLib
+  LocalApicLib
+
+[LibraryClasses.LoongArch64]
+  CpuLib
+
 [BuildOptions]
   XCODE:*_*_X64_NASM_FLAGS = -D NO_ABSOLUTE_RELOCS_IN_TEXT
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
new file mode 100644
index 00..eed5644552
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
@@ -0,0 +1,198 @@
+/** @file DxeExceptionLib.c
+
+  LoongArch exception library implemenation for DXE modules.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ExceptionCommon.h"
+
+EFI_EXCEPTION_CALLBACK  ExternalInterruptHandler[MAX_LOONGARCH_INTERRUPT + 1] 
= { 0 };
+EFI_EXCEPTION_CALLBACK  ExceptionHandler[MAX_LOONGARCH_EXCEPTION + 1] 
= { 0 };
+
+/**
+  Registers a function to be called from the processor interrupt or exception 
handler.
+
+  This function registers and enables the handler specified by 
InterruptHandler for a processor
+  interrupt or exception type specified by InterruptType. If InterruptHandler 
is NULL, then the
+  handler for the processor interrupt or exception type specified by 
InterruptType is uninstalled.
+  The installed handler is called once for each processor interrupt or 
exception.
+
+  @param  InterruptTypeA pointer to the processor's current interrupt 
state. Set to TRUE if interrupts
+   are enabled and FALSE if interrupts are disabled.
+  @param  InterruptHandler A pointer to a function of type 
EFI_CPU_INTERRUPT_HANDLER that

[edk2-devel] [PATCH v4 05/13] UefiCpuPkg: Add LoongArch64 CPU Timer instance

[Chao Li]

Add the LoongArch64 CPU Timer instance to CpuTimerLib, using CPUCFG 0x4
and 0x5 for Stable Counter frequency.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 .../Library/CpuTimerLib/BaseCpuTimerLib.inf   |  15 +-
 .../CpuTimerLib/LoongArch64/CpuTimerLib.c | 250 ++
 UefiCpuPkg/UefiCpuPkg.dsc |   3 +
 3 files changed, 266 insertions(+), 2 deletions(-)
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
index f0f4ae902a..4a1c7c0510 100644
--- a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
@@ -1,10 +1,15 @@
 ## @file
 #  Base CPU Timer Library
 #
-#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  Provides basic timer support.
+#
+#  In x86, using CPUID Leaf 0x15 XTAL frequency. The performance
 #  counter features are provided by the processors time stamp counter.
 #
+#  In LoongArch64, using CPUCFG 0x4 and 0x5 for Stable Counter frequency.
+#
 #  Copyright (c) 2021, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -18,10 +23,13 @@ [Defines]
   LIBRARY_CLASS  = TimerLib
   MODULE_UNI_FILE= BaseCpuTimerLib.uni
 
-[Sources]
+[Sources.IA32, Sources.X64]
   CpuTimerLib.c
   BaseCpuTimerLib.c
 
+[Sources.LoongArch64]
+  LoongArch64/CpuTimerLib.c
+
 [Packages]
   MdePkg/MdePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
@@ -31,5 +39,8 @@ [LibraryClasses]
   DebugLib
   PcdLib
 
+[LibraryClasses.LoongArch64]
+  SafeIntLib
+
 [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c 
b/UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c
new file mode 100644
index 00..7ba7408498
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c
@@ -0,0 +1,250 @@
+/** @file
+  CPUCFG 0x4 and 0x5 for Stable Counter frequency instance of Timer Library.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Calculate clock frequency using CPUCFG 0x4 and 0x5 registers.
+
+  @param  VOID.
+
+  @return The frequency in Hz.
+
+**/
+STATIC
+UINT64
+CalcConstFreq (
+  VOID
+  )
+{
+  UINT32 BaseFreq;
+  UINT64 ClockMultiplier;
+  UINT32 ClockDivide;
+  CPUCFG_REG4_INFO_DATA  CcFreq;
+  CPUCFG_REG5_INFO_DATA  CpucfgReg5Data;
+  UINT64 StableTimerFreq;
+
+  //
+  // Get the the crystal frequency corresponding to the constant
+  // frequency timer and the clock used by the timer.
+  //
+  AsmCpucfg (CPUCFG_REG4_INFO, );
+
+  //
+  // Get the multiplication factor and frequency division factor
+  // corresponding to the constant frequency timer and the clock
+  // used by the timer.
+  //
+  AsmCpucfg (CPUCFG_REG5_INFO, );
+
+  BaseFreq= CcFreq.Bits.CC_FREQ;
+  ClockMultiplier = CpucfgReg5Data.Bits.CC_MUL & 0x;
+  ClockDivide = CpucfgReg5Data.Bits.CC_DIV & 0x;
+
+  if ((BaseFreq == 0x0) || (ClockMultiplier == 0x0) || (ClockDivide == 0x0)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "LoongArch Stable Timer is not available in the CPU, hence this library 
cannot be used.\n"
+  ));
+ASSERT (FALSE);
+CpuDeadLoop ();
+  }
+
+  StableTimerFreq = ((ClockMultiplier * BaseFreq) / ClockDivide);
+
+  ASSERT (StableTimerFreq != 0);
+
+  return StableTimerFreq;
+}
+
+/**
+  Stalls the CPU for at least the given number of microseconds.
+
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+  @param  MicroSeconds  The minimum number of microseconds to delay.
+
+  @return MicroSeconds
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+  IN UINTN  MicroSeconds
+  )
+{
+  UINT64 CurrentTicks, ExceptedTicks, Remaining;
+  RETURN_STATUS  Status;
+
+  Status = SafeUint64Mult (MicroSeconds, CalcConstFreq (), );
+  ASSERT_RETURN_ERROR (Status);
+
+  ExceptedTicks  = DivU64x32 (Remaining, 100U);
+  CurrentTicks   = AsmReadStableCounter ();
+  ExceptedTicks += CurrentTicks;
+
+  do {
+CurrentTicks = AsmReadStableCounter ();
+  } while (CurrentTicks < ExceptedTicks);
+
+  return MicroSeconds;
+}
+
+/**
+  Stalls the CPU for at least the given number of nanoseconds.
+
+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+  @param  NanoSeconds The minimum number of nanoseconds to delay.
+
+  @return NanoSeconds
+
+**/
+UINTN
+EFIAPI
+NanoSeco

[edk2-devel] [PATCH v4 03/13] UefiCpuPkg/MpInitLib: Reorder the INF files alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 29 ++-
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 25 
 2 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 55e46d4a1f..7ef4c0d4db 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -23,21 +23,21 @@ [Defines]
 
 [Sources.IA32]
   Ia32/AmdSev.c
-  Ia32/MpFuncs.nasm
   Ia32/CreatePageTable.c
+  Ia32/MpFuncs.nasm
 
 [Sources.X64]
   X64/AmdSev.c
-  X64/MpFuncs.nasm
   X64/CreatePageTable.c
+  X64/MpFuncs.nasm
 
 [Sources.common]
   AmdSev.c
-  MpEqu.inc
   DxeMpLib.c
+  Microcode.c
+  MpEqu.inc
   MpLib.c
   MpLib.h
-  Microcode.c
   MpHandOff.h
 
 [Packages]
@@ -47,17 +47,18 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
+  CcExitLib
+  CpuLib
+  DebugAgentLib
+  HobLib
   LocalApicLib
   MemoryAllocationLib
-  HobLib
+  MicrocodeLib
   MtrrLib
-  CpuLib
-  UefiBootServicesTableLib
-  DebugAgentLib
-  SynchronizationLib
   PcdLib
-  CcExitLib
-  MicrocodeLib
+  SynchronizationLib
+  UefiBootServicesTableLib
+
 [LibraryClasses.X64]
   CpuPageTableLib
 
@@ -70,6 +71,9 @@ [Guids]
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
 
 [Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## 
SOMETIMES_CONSUMES
@@ -82,6 +86,3 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi## 
CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## 
CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
CONSUMES
-  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index bc3d716aa9..599ca36bc2 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -31,31 +31,34 @@ [Sources.X64]
 
 [Sources.common]
   AmdSev.c
+  Microcode.c
   MpEqu.inc
-  PeiMpLib.c
   MpLib.c
   MpLib.h
-  Microcode.c
   MpHandOff.h
+  PeiMpLib.c
+
 [Packages]
   MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
 
 [LibraryClasses]
   BaseLib
+  CcExitLib
+  CpuLib
+  HobLib
   LocalApicLib
   MemoryAllocationLib
-  HobLib
+  MicrocodeLib
   MtrrLib
-  CpuLib
-  SynchronizationLib
-  PeiServicesLib
   PcdLib
-  CcExitLib
-  MicrocodeLib
+  PeiServicesLib
+  SynchronizationLib
 
 [Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## 
SOMETIMES_CONSUMES
@@ -66,9 +69,7 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi ## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## CONSUMES
-  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi## CONSUMES
 
 [Ppis]
   gEdkiiPeiShadowMicrocodePpiGuid## SOMETIMES_CONSUMES
-- 
2.27.0



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[edk2-devel] [PATCH v4 04/13] UefiCpuPkg/CpuDxe: Reorder the INF file alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/CpuDxe/CpuDxe.inf | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 1d3e9f8cdb..9e1c673283 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -25,21 +25,21 @@ [Packages]
 [LibraryClasses]
   BaseLib
   BaseMemoryLib
+  CpuExceptionHandlerLib
   CpuLib
   DebugLib
   DxeServicesTableLib
+  HobLib
+  LocalApicLib
   MemoryAllocationLib
   MtrrLib
+  MpInitLib
+  PeCoffGetEntryPointLib
+  ReportStatusCodeLib
+  TimerLib
   UefiBootServicesTableLib
   UefiDriverEntryPoint
-  LocalApicLib
   UefiLib
-  CpuExceptionHandlerLib
-  HobLib
-  ReportStatusCodeLib
-  MpInitLib
-  TimerLib
-  PeCoffGetEntryPointLib
 
 [Sources]
   CpuDxe.c
@@ -77,9 +77,9 @@ [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard   ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask   ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize## 
CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask## 
CONSUMES
 
 [Depex]
   TRUE
-- 
2.27.0



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[edk2-devel] [PATCH v4 02/13] UefiCpuPkg/CpuExceptionHandlerLib: Reorder the INF files alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 .../DxeCpuExceptionHandlerLib.inf | 20 +--
 .../PeiCpuExceptionHandlerLib.inf | 16 +++
 .../SecPeiCpuExceptionHandlerLib.inf  | 12 +--
 .../SmmCpuExceptionHandlerLib.inf | 16 +++
 4 files changed, 32 insertions(+), 32 deletions(-)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
index fdbebadab9..aabcabff0f 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -22,21 +22,21 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/ExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/ExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
-  PeiDxeSmmCpuException.c
   DxeException.c
+  PeiDxeSmmCpuException.c
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
@@ -53,14 +53,14 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
-  SynchronizationLib
+  CcExitLib
+  DebugLib
   LocalApicLib
-  PeCoffGetEntryPointLib
   MemoryAllocationLib
-  DebugLib
-  CcExitLib
+  PeCoffGetEntryPointLib
+  PrintLib
+  SerialPortLib
+  SynchronizationLib
 
 [BuildOptions]
   XCODE:*_*_X64_NASM_FLAGS = -D NO_ABSOLUTE_RELOCS_IN_TEXT
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
index 3bcaff5c5f..3a11516e32 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
@@ -22,15 +22,15 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/SecPeiExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/SecPeiExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
@@ -45,14 +45,14 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
-  LocalApicLib
-  PeCoffGetEntryPointLib
+  CcExitLib
   HobLib
+  LocalApicLib
   MemoryAllocationLib
+  PeCoffGetEntryPointLib
+  PrintLib
+  SerialPortLib
   SynchronizationLib
-  CcExitLib
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard# CONSUMES
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
index e7b1144f69..f8e597d86d 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
@@ -22,15 +22,15 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/SecPeiExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/SecPeiExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
@@ -44,11 +44,11 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
+  CcExitLib
   LocalApicLib
   PeCoffGetEntryPointLib
-  CcExitLib
+  PrintLib
+  SerialPortLib
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
index 27f0b96fa9..cc280a6ee7 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
@@ -22,15 +22,15 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/ExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/ExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
@@ -45,13 +45,13 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
-  SynchronizationLib
+  CcExitLib
+  DebugLib

[edk2-devel] [PATCH v4 01/13] UefiCpuPkg/CpuTimerLib: Reorder the INF file alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
index de0648de91..f0f4ae902a 100644
--- a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
@@ -28,8 +28,8 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  PcdLib
   DebugLib
+  PcdLib
 
 [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
-- 
2.27.0



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[edk2-devel] [PATCH v4 00/13] Part 2 patch set to add LoongArch support into UefiCpuPkg

[Chao Li]

This patch set adjusted some order in UefiCpuPig alphabetically, added
LoongArch libraries and drivers into UefiCpuPkg, it is a continuation of
the first patch series v8 submitted at
https://edk2.groups.io/g/devel/message/114526.

And also separated from https://edk2.groups.io/g/devel/message/116583.

This series only contents the changes for UefiCpuPkg.

Patch1-Patch4: Reorder some INF files located in UefiCpuPkg
alphabetically.

Patch5-Patch13: Added Timer, CpuMmuLib, CpuMmuInitLib, MpInitLib, CpuDxe
for LoongArch, and added some PCD and header files requested by the
above libraries and drivers.

Modfied modules: UefiCpuPkg

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

PR: https://github.com/tianocore/edk2/pull/5483

V1 -> V2:
1. Removed PcdCpuMmuIsEnabled.
2. Removed API GetMemoryRegionAttributes API as it is no longer needed.
3. Patch3, added two empty line in DXE and PEI INF files.
4. Patch5, added the Status check in GetTimeInnanoSecond function.
5. Separated into two series, this is series one, and the second one is
OvmfPkg.

V2 -> V3:
1. Remove CpuMmuInitLib.
2. Added a new GUID HOB named PROCESSOR_RESOURCE_HOG_GUID.
3. Following Ray suggest, adjust CpuMmuLib API, rename the API name.
4. Rename the PcdCpuExceptionVectorBaseAddress to
PcdLoongArch64ExceptionVectorBaseAddress.
5. Enable CpuMmio2Dxe in LoongArch.

V3 -> V4:
Patch 10, use flexible arrays in PROCESSOR_RESOURCE_DATA.

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Bibo Mao 
Cc: Dongyan Qian 



Chao Li (13):
  UefiCpuPkg/CpuTimerLib: Reorder the INF file alphabetically
  UefiCpuPkg/CpuExceptionHandlerLib: Reorder the INF files
alphabetically
  UefiCpuPkg/MpInitLib: Reorder the INF files alphabetically
  UefiCpuPkg/CpuDxe: Reorder the INF file alphabetically
  UefiCpuPkg: Add LoongArch64 CPU Timer instance
  UefiCpuPkg: Add CPU exception library for LoongArch
  UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg
  UefiCpuPkg: Added a new PCD named
PcdLoongArchExceptionVectorBaseAddress
  UefiCpuPkg: Add CpuMmuLib to UefiCpuPkg
  UefiCpuPkg: Add a new GUID to store the processors resource
  UefiCpuPkg: Add multiprocessor library for LoongArch64
  UefiCpuPkg: Add CpuDxe driver for LoongArch64
  UefiCpuPkg/UefiCpuPkg.dsc: Add CpuMmio2Dxe.inf to LoongArch64 field

 UefiCpuPkg/CpuDxe/CpuDxe.inf  |   39 +-
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c|  514 ++
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h|  288 +++
 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c |  544 ++
 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c |  159 ++
 .../Include/Guid/ProcessorResourceHob.h   |   29 +
 UefiCpuPkg/Include/Library/CpuMmuLib.h|   41 +
 .../DxeCpuExceptionHandlerLib.inf |   37 +-
 .../LoongArch/DxeExceptionLib.c   |  198 ++
 .../LoongArch/ExceptionCommon.c   |  171 ++
 .../LoongArch/ExceptionCommon.h   |  131 ++
 .../LoongArch64/ArchExceptionHandler.c|  268 +++
 .../LoongArch64/ExceptionHandlerAsm.S |  366 
 .../LoongArch/SecPeiExceptionLib.c|  102 ++
 .../PeiCpuExceptionHandlerLib.inf |   16 +-
 .../SecPeiCpuExceptionHandlerLib.inf  |   31 +-
 .../SmmCpuExceptionHandlerLib.inf |   16 +-
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf|   39 +
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni|   14 +
 .../Library/CpuMmuLib/LoongArch64/CpuMmu.c|  784 
 .../Library/CpuMmuLib/LoongArch64/Page.h  |   33 +
 .../LoongArch64/TlbExceptionHandle.S  |   51 +
 .../LoongArch64/TlbExceptionHandle.h  |   36 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.S|   24 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.h|   24 +
 .../Library/CpuTimerLib/BaseCpuTimerLib.inf   |   17 +-
 .../CpuTimerLib/LoongArch64/CpuTimerLib.c |  250 +++
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |   42 +-
 .../Library/MpInitLib/LoongArch64/DxeMpLib.c  |  480 +
 .../Library/MpInitLib/LoongArch64/MpLib.c | 1626 +
 .../Library/MpInitLib/LoongArch64/MpLib.h |  350 
 .../Library/MpInitLib/LoongArch64/PeiMpLib.c  |  381 
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |   40 +-
 UefiCpuPkg/UefiCpuPkg.dec |   13 +
 UefiCpuPkg/UefiCpuPkg.dsc |7 +
 35 files changed, 7082 insertions(+), 79 deletions(-)
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c
 create mode 100644 UefiCpuPkg/Include/Guid/ProcessorResourceHob.h
 create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/Exceptio

Re: [edk2-devel] [PATCH v3 10/13] UefiCpuPkg: Add a new GUID to store the processors resource

[Chao Li]

Hi Ray,


Thanks,
Chao
On 2024/4/15 10:10, Ni, Ray wrote:


+
+typedef struct {
+  UINT32    NumberOfProcessor;
+  UINTN *ApicId;

[Ray] How about "UINTN  ApicId[]"? The difference between the two is 
your version contains an 8-byte pointer pointing to somewhere else. My 
version implies the APIC ID array is just after "NumberOfProcessor".
Of curse, using the flexible arrays is better than my version and I will 
adjust this in V3.





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Re: [edk2-devel] [PATCH v1 16/26] OvmfPkg/LoongArchVirt: Add a NULL library named CollectApResouceLibNull

[Chao Li]

Hi Gerd,


Thanks,
Chao
On 2024/3/15 17:22, Gerd Hoffmann wrote:

On Mon, Mar 11, 2024 at 02:39:02AM -0700, Chao Li wrote:

This Library is used to collect APs resources, but is currently NULL
for OvmfPkg, because it is not used by the LoongArch virtual machine.

What is the point of having this library then?

This NULL library will be filled in the future.



+#include 
+#include 
+#include 
+#include 
+#include 
+#include "../../../UefiCpuPkg/Library/MpInitLib/LoongArch64/MpLib.h"

Including private header files of other libraries looks questionable.

OK, it will be removed next time.


take care,
   Gerd








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[edk2-devel] [PATCH v3 13/13] UefiCpuPkg/UefiCpuPkg.dsc: Add CpuMmio2Dxe.inf to LoongArch64 field

[Chao Li]

LoongArch64 requires CpuMmio2Dxe, add it into LoongArch64 field.

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 UefiCpuPkg/UefiCpuPkg.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index e92ceb6466..1af5a0c525 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -213,6 +213,7 @@ [Components.RISCV64]
 
 [Components.LOONGARCH64]
   UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
+  UefiCpuPkg/CpuMmio2Dxe/CpuMmio2Dxe.inf
 
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
-- 
2.27.0



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[edk2-devel] [PATCH v3 12/13] UefiCpuPkg: Add CpuDxe driver for LoongArch64

[Chao Li]

Added LoongArch64 CPU driver into CpuDxe.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 
Acked-by: Gerd Hoffmann 
---
 UefiCpuPkg/CpuDxe/CpuDxe.inf  |  25 +-
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c| 439 +
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h| 288 
 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c | 544 ++
 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c | 159 +++
 5 files changed, 1451 insertions(+), 4 deletions(-)
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 9e1c673283..fca74c44b3 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -3,6 +3,7 @@
 #
 #  Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -22,7 +23,7 @@ [Packages]
   MdeModulePkg/MdeModulePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
 
-[LibraryClasses]
+[LibraryClasses.common]
   BaseLib
   BaseMemoryLib
   CpuExceptionHandlerLib
@@ -30,9 +31,7 @@ [LibraryClasses]
   DebugLib
   DxeServicesTableLib
   HobLib
-  LocalApicLib
   MemoryAllocationLib
-  MtrrLib
   MpInitLib
   PeCoffGetEntryPointLib
   ReportStatusCodeLib
@@ -41,7 +40,15 @@ [LibraryClasses]
   UefiDriverEntryPoint
   UefiLib
 
-[Sources]
+[LibraryClasses.IA32, LibraryClasses.X64]
+  LocalApicLib
+  MtrrLib
+
+[LibraryClasses.LoongArch64]
+  CacheMaintenanceLib
+  CpuMmuLib
+
+[Sources.IA32, Sources.X64]
   CpuDxe.c
   CpuDxe.h
   CpuGdt.c
@@ -59,6 +66,13 @@ [Sources.X64]
   X64/CpuAsm.nasm
   X64/PagingAttribute.c
 
+[Sources.LoongArch64]
+  CpuMp.h
+  LoongArch64/CpuDxe.c
+  LoongArch64/CpuMp.c
+  LoongArch64/Exception.c
+  LoongArch64/CpuDxe.h
+
 [Protocols]
   gEfiCpuArchProtocolGuid   ## PRODUCES
   gEfiMpServiceProtocolGuid ## PRODUCES
@@ -81,6 +95,9 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize## 
CONSUMES
 
+[Pcd.LoongArch64]
+  gUefiCpuPkgTokenSpaceGuid.PcdLoongArchExceptionVectorBaseAddress  ## 
CONSUMES
+
 [Depex]
   TRUE
 
diff --git a/UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c 
b/UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
new file mode 100644
index 00..24b9d51ee7
--- /dev/null
+++ b/UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
@@ -0,0 +1,439 @@
+/** @file CpuDxe.c
+
+  CPU DXE Module to produce CPU ARCH Protocol.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "CpuDxe.h"
+#include "CpuMp.h"
+#include 
+#include 
+#include 
+#include 
+
+UINT64  mTimerPeriod = 0;
+
+/**
+  IPI Interrupt Handler.
+
+  @param InterruptTypeThe type of interrupt that occurred
+  @param SystemContextA pointer to the system context when the interrupt 
occurred
+**/
+VOID
+EFIAPI
+IpiInterruptHandler (
+  IN EFI_EXCEPTION_TYPE  InterruptType,
+  IN EFI_SYSTEM_CONTEXT  SystemContext
+  );
+
+//
+// Globals used to initialize the protocol
+//
+EFI_HANDLE mCpuHandle = NULL;
+EFI_CPU_ARCH_PROTOCOL  gCpu   = {
+  CpuFlushCpuDataCache,
+  CpuEnableInterrupt,
+  CpuDisableInterrupt,
+  CpuGetInterruptState,
+  CpuInit,
+  CpuRegisterInterruptHandler,
+  CpuGetTimerValue,
+  CpuSetMemoryAttributes,
+  0,  // NumberOfTimers
+  4,  // DmaBufferAlignment
+};
+
+/**
+  This function flushes the range of addresses from Start to Start+Length
+  from the processor's data cache. If Start is not aligned to a cache line
+  boundary, then the bytes before Start to the preceding cache line boundary
+  are also flushed. If Start+Length is not aligned to a cache line boundary,
+  then the bytes past Start+Length to the end of the next cache line boundary
+  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+  supported. If the data cache is fully coherent with all DMA operations, then
+  this function can just return EFI_SUCCESS. If the processor does not support
+  flushing a range of the data cache, then the entire data cache can be 
flushed.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+  @param  StartThe beginning physical address to flush from the 
processor's data
+   cache.
+  @param  Length   The number of bytes to flush from the processor's 
data cache. This
+ 

[edk2-devel] [PATCH v3 11/13] UefiCpuPkg: Add multiprocessor library for LoongArch64

[Chao Li]

Added LoongArch multiprocessor initialization instance into MpInitLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |   23 +-
 .../Library/MpInitLib/LoongArch64/DxeMpLib.c  |  480 +
 .../Library/MpInitLib/LoongArch64/MpLib.c | 1626 +
 .../Library/MpInitLib/LoongArch64/MpLib.h |  350 
 .../Library/MpInitLib/LoongArch64/PeiMpLib.c  |  381 
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |   23 +-
 6 files changed, 2871 insertions(+), 12 deletions(-)
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/MpLib.c
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/MpLib.h
 create mode 100644 UefiCpuPkg/Library/MpInitLib/LoongArch64/PeiMpLib.c

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 7ef4c0d4db..407f4988b5 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -2,6 +2,7 @@
 #  MP Initialize Library instance for DXE driver.
 #
 #  Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -18,7 +19,7 @@ [Defines]
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64
+#  VALID_ARCHITECTURES   = IA32 X64 LOONGARCH64
 #
 
 [Sources.IA32]
@@ -31,7 +32,7 @@ [Sources.X64]
   X64/CreatePageTable.c
   X64/MpFuncs.nasm
 
-[Sources.common]
+[Sources.IA32, Sources.X64]
   AmdSev.c
   DxeMpLib.c
   Microcode.c
@@ -40,6 +41,11 @@ [Sources.common]
   MpLib.h
   MpHandOff.h
 
+[Sources.LoongArch64]
+  LoongArch64/DxeMpLib.c
+  LoongArch64/MpLib.c
+  LoongArch64/MpLib.h
+
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
@@ -47,18 +53,20 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  CcExitLib
   CpuLib
   DebugAgentLib
   HobLib
-  LocalApicLib
   MemoryAllocationLib
-  MicrocodeLib
-  MtrrLib
   PcdLib
   SynchronizationLib
   UefiBootServicesTableLib
 
+[LibraryClasses.IA32, LibraryClasses.X64]
+  CcExitLib
+  LocalApicLib
+  MicrocodeLib
+  MtrrLib
+
 [LibraryClasses.X64]
   CpuPageTableLib
 
@@ -70,6 +78,9 @@ [Guids]
   gEfiEventLegacyBootGuid   ## SOMETIMES_CONSUMES  ## Event
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
 
+[Guids.LoongArch64]
+  gProcessorResourceHobGuid ## SOMETIMES_CONSUMES  ## HOB
+
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c 
b/UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c
new file mode 100644
index 00..739da77e32
--- /dev/null
+++ b/UefiCpuPkg/Library/MpInitLib/LoongArch64/DxeMpLib.c
@@ -0,0 +1,480 @@
+/** @file
+  LoongArch64 MP initialize support functions for DXE phase.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "MpLib.h"
+
+#include 
+#include 
+#include 
+
+#include 
+
+CPU_MP_DATA   *mCpuMpData= NULL;
+EFI_EVENT mCheckAllApsEvent  = NULL;
+volatile BOOLEAN  mStopCheckAllApsStatus = TRUE;
+
+/**
+  Enable Debug Agent to support source debugging on AP function.
+
+**/
+VOID
+EnableDebugAgent (
+  VOID
+  )
+{
+  //
+  // Initialize Debug Agent to support source level debug in DXE phase
+  //
+  InitializeDebugAgent (DEBUG_AGENT_INIT_DXE_AP, NULL, NULL);
+}
+
+/**
+  Get the pointer to CPU MP Data structure.
+
+  @return  The pointer to CPU MP Data structure.
+**/
+CPU_MP_DATA *
+GetCpuMpData (
+  VOID
+  )
+{
+  ASSERT (mCpuMpData != NULL);
+  return mCpuMpData;
+}
+
+/**
+  Save the pointer to CPU MP Data structure.
+
+  @param[in] CpuMpData  The pointer to CPU MP Data structure will be saved.
+**/
+VOID
+SaveCpuMpData (
+  IN CPU_MP_DATA  *CpuMpData
+  )
+{
+  mCpuMpData = CpuMpData;
+}
+
+/**
+  Get available EfiBootServicesCode memory below 4GB by specified size.
+
+  This buffer is required to safely transfer AP from real address mode to
+  protected mode or long mode, due to the fact that the buffer returned by
+  GetWakeupBuffer() may be marked as non-executable.
+
+  @param[in] BufferSize   Wakeup transition buffer size.
+
+  @retval other   Return wakeup transition buffer address below 4GB.
+  @retval 0   Cannot find free memory below 4GB.
+**/
+UINTN
+GetModeTransitionBuffer (
+  IN UINTN  BufferSize
+  )
+{
+  return 0;
+}
+
+/**
+  Checks APs status and updates 

[edk2-devel] [PATCH v3 10/13] UefiCpuPkg: Add a new GUID to store the processors resource

[Chao Li]

On a multi-processor system, if the BSP dose not know how many APs are
online or cannot wake up the AP via broadcast, it can collect AP
resouces before wakeing up the AP and add a new HOB to save the
processor resouces.

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Include/Guid/ProcessorResourceHob.h   | 29 +++
 UefiCpuPkg/UefiCpuPkg.dec |  3 ++
 2 files changed, 32 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Guid/ProcessorResourceHob.h

diff --git a/UefiCpuPkg/Include/Guid/ProcessorResourceHob.h 
b/UefiCpuPkg/Include/Guid/ProcessorResourceHob.h
new file mode 100644
index 00..da7f381d3b
--- /dev/null
+++ b/UefiCpuPkg/Include/Guid/ProcessorResourceHob.h
@@ -0,0 +1,29 @@
+/** @file
+  Processor resource HOB
+
+  If BSP does not known how many cores are online or the platform cannot
+  wake up AP via broadcast, this HOB can be used to store the processor
+  resource data that may come from ACPI or FDT, etc.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PROCESSOR_RESOURCE_HOB_H_
+#define PROCESSOR_RESOURCE_HOB_H_
+
+#define PROCESSOR_RESOURCE_HOB_GUID \
+  { \
+0xb855c7fe, 0xa758, 0x701f, { 0xa7, 0x30, 0x87, 0xf3, 0x9c, 0x03, 0x46, 
0x7e } \
+  }
+
+typedef struct {
+  UINT32NumberOfProcessor;
+  UINTN *ApicId;
+} PROCESSOR_RESOURCE_DATA;
+
+extern EFI_GUID  gProcessorResourceHobGuid;
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 1b890e975c..8ca3b7a5a6 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -96,6 +96,9 @@ [Guids]
   ## Include/Guid/MpInformation2.h
   gMpInformation2HobGuid = { 0x417a7f64, 0xf4e9, 0x4b32, {0x84, 0x6a, 
0x5c, 0xc4, 0xd8, 0x62, 0x18, 0x79 }}
 
+  ## Include/Guid/ProcessorResourceHob.h
+  gProcessorResourceHobGuid  = { 0xb855c7fe, 0xa758, 0x701f, { 0xa7, 0x30, 
0x87, 0xf3, 0x9c, 0x03, 0x46, 0x7e }}
+
 [Protocols]
   ## Include/Protocol/SmmCpuService.h
   gEfiSmmCpuServiceProtocolGuid   = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 
0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
-- 
2.27.0



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[edk2-devel] [PATCH v3 09/13] UefiCpuPkg: Add CpuMmuLib to UefiCpuPkg

[Chao Li]

Add a new base library named CpuMmuLib and add a LoongArch64 instance
with in the library.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 
Co-authored-by: Xianglai Li 
Co-authored-by: Bibo Mao 
Acked-by: Gerd Hoffmann 
---
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf|  39 +
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni|  14 +
 .../Library/CpuMmuLib/LoongArch64/CpuMmu.c| 785 ++
 .../Library/CpuMmuLib/LoongArch64/Page.h  |  33 +
 .../LoongArch64/TlbExceptionHandle.S  |  51 ++
 .../LoongArch64/TlbExceptionHandle.h  |  36 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.S|  24 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.h|  24 +
 UefiCpuPkg/UefiCpuPkg.dsc |   3 +
 9 files changed, 1009 insertions(+)
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/Page.h
 create mode 100644 
UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbExceptionHandle.S
 create mode 100644 
UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbExceptionHandle.h
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbInvalid.S
 create mode 100644 UefiCpuPkg/Library/CpuMmuLib/LoongArch64/TlbInvalid.h

diff --git a/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf 
b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
new file mode 100644
index 00..5eecfb4838
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf
@@ -0,0 +1,39 @@
+## @file
+#  CPU Memory Manager Unit library instance.
+#
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = CpuMmuLib
+  MODULE_UNI_FILE= CpuMmuLib.uni
+  FILE_GUID  = DA8F0232-FB14-42F0-922C-63104D2C70BE
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = CpuMmuLib
+
+#
+#  VALID_ARCHITECTURES   = LOONGARCH64
+#
+
+[Sources.LoongArch64]
+  LoongArch64/TlbInvalid.S | GCC
+  LoongArch64/TlbExceptionHandle.S | GCC
+  LoongArch64/CpuMmu.c
+  LoongArch64/Page.h
+  LoongArch64/TlbInvalid.h
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  MemoryAllocationLib
+
+[Pcd.LoongArch64]
+  gUefiCpuPkgTokenSpaceGuid.PcdLoongArchExceptionVectorBaseAddress  ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni 
b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni
new file mode 100644
index 00..2408f2f90b
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni
@@ -0,0 +1,14 @@
+// /** @file
+// CPU Memory Manager Unit library instance.
+//
+// CPU Memory Manager Unit library instance.
+//
+// Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_MODULE_ABSTRACT #language en-US "CPU Memory Manager 
Unit library instance."
+
+#string STR_MODULE_DESCRIPTION  #language en-US "CPU Memory Manager 
Unit library instance."
diff --git a/UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c 
b/UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c
new file mode 100644
index 00..6d77a1221f
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuMmuLib/LoongArch64/CpuMmu.c
@@ -0,0 +1,785 @@
+/** @file
+
+  CPU Memory Map Unit Handler Library common functions.
+
+  Copyright (c) 2011-2020, ARM Limited. All rights reserved.
+  Copyright (c) 2016, Linaro Limited. All rights reserved.
+  Copyright (c) 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2023, Ventana Micro Systems Inc. All Rights Reserved.
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "TlbInvalid.h"
+#include "TlbExceptionHandle.h"
+#include "Page.h"
+
+/**
+  Check to see if mmu successfully initializes.
+
+  @param  VOID.
+
+  @retval  TRUE  Initialization has been completed.
+   FALSE Initialization did not complete.
+**/
+STATIC
+BOOLEAN
+MmuIsInit (
+  VOID
+  )
+{
+  if (CsrRead (LOONGARCH_CSR_PGDL) != 0) {
+return TRUE;
+  }
+
+  return FALSE;
+}
+
+/**
+  Check to see if mmu is enabled.
+
+  @param  VOID.
+
+  @retval  TRUE  MMU has been enabled.
+   FALSE MMU did not enabled.
+**/
+STATIC
+BOOLEAN
+MmuIsEnabled (
+  VOID
+  )
+{
+  if ((CsrRead (LOONGARCH_CSR_CRMD) & BIT4) != 0) {
+return TRUE;
+  }

[edk2-devel] [PATCH v3 08/13] UefiCpuPkg: Added a new PCD named PcdLoongArchExceptionVectorBaseAddress

[Chao Li]

Added PcdLoongArchExceptionVectorBaseAddress use for storing the CPU
exception vector base address. This PCD can be populated at build time
or changed at runtime, and is used only by LoongArch.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
---
 UefiCpuPkg/UefiCpuPkg.dec | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index ca744fab55..1b890e975c 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2007 - 2023, Intel Corporation. All rights reserved.
 # Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -414,6 +415,11 @@ [PcdsFixedAtBuild.RISCV64]
   #  10 - 57bit mode.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode|10|UINT32|0x6021
 
+[PcdsFixedAtBuild.LOONGARCH64, PcdsPatchableInModule.LOONGARCH64, 
PcdsDynamic.LOONGARCH64, PcdsDynamicEx.LOONGARCH64]
+  ## This PCD Contains the pointer to a CPU exception vector base address.
+  # @Prompt The pointer to a CPU exception vector base address.
+  
gUefiCpuPkgTokenSpaceGuid.PcdLoongArchExceptionVectorBaseAddress|0x0|UINT64|0x6022
+
 [PcdsDynamic, PcdsDynamicEx]
   ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
   # @Prompt The pointer to a CPU S3 data buffer.
-- 
2.27.0



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[edk2-devel] [PATCH v3 07/13] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg

[Chao Li]

Add a new header file CpuMmuLib.h, whitch is referenced from
ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
LoongArch64 is added, and more architectures can be accommodated in the
future.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
---
 UefiCpuPkg/Include/Library/CpuMmuLib.h | 41 ++
 UefiCpuPkg/UefiCpuPkg.dec  |  4 +++
 2 files changed, 45 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h

diff --git a/UefiCpuPkg/Include/Library/CpuMmuLib.h 
b/UefiCpuPkg/Include/Library/CpuMmuLib.h
new file mode 100644
index 00..e6cfbd5168
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/CpuMmuLib.h
@@ -0,0 +1,41 @@
+/** @file
+
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef CPU_MMU_LIB_H_
+#define CPU_MMU_LIB_H_
+
+#include 
+
+/**
+  Maps the memory region in the page table to the specified attributes.
+
+  @param[in, out] PageTable  The pointer to the page table to update, or 
pointer to NULL
+ if a new page table is to be created.
+  @param[in]  PageWalkCfgThe page walk controller configure.
+  @param[in]  BaseAddressThe base address of the memory region to set 
the Attributes.
+  @param[in]  Length The length of the memory region to set the 
Attributes.
+  @param[in]  Attributes The bitmask of attributes to set, which refer 
to UEFI SPEC
+ 7.2.3(EFI_BOOT_SERVICES.GetMemoryMap()).
+  @param[in]  AttributeMask  Mask of memory attributes to take into 
account.
+
+  @retval EFI_SUCCESSThe Attributes was set successfully or Length 
is 0.
+  @retval EFI_INVALID_PARAMETER  PageTable is NULL.
+  @retval EFI_UNSUPPORTED*PageTable is NULL.
+**/
+EFI_STATUS
+EFIAPI
+MemoryRegionMap (
+  IN OUT UINTN *PageTable  OPTIONAL,
+  IN UINT64PageWalkCfg,
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINT64Length,
+  IN UINT64Attributes,
+  IN UINT64AttributeMask
+  );
+
+#endif // CPU_MMU_LIB_H_
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 571b59b36f..ca744fab55 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -72,6 +72,10 @@ [LibraryClasses.RISCV64]
   ##
   RiscVMmuLib|Include/Library/BaseRiscVMmuLib.h
 
+[LibraryClasses.LoongArch64]
+  ##  @libraryclass  Provides functions for the memory management unit.
+  CpuMmuLib|Include/Library/CpuMmuLib.h
+
 [Guids]
   gUefiCpuPkgTokenSpaceGuid  = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 
0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
   gMsegSmramGuid = { 0x5802bce4, 0x, 0x4e33, { 0xa1, 0x30, 
0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }}
-- 
2.27.0



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[edk2-devel] [PATCH v3 06/13] UefiCpuPkg: Add CPU exception library for LoongArch

[Chao Li]

Added LoongArch exception handler into CpuExceptionHandlerLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 .../DxeCpuExceptionHandlerLib.inf |  23 +-
 .../LoongArch/DxeExceptionLib.c   | 198 ++
 .../LoongArch/ExceptionCommon.c   | 171 
 .../LoongArch/ExceptionCommon.h   | 131 +++
 .../LoongArch64/ArchExceptionHandler.c| 268 +
 .../LoongArch64/ExceptionHandlerAsm.S | 366 ++
 .../LoongArch/SecPeiExceptionLib.c| 102 +
 .../SecPeiCpuExceptionHandlerLib.inf  |  23 +-
 8 files changed, 1273 insertions(+), 9 deletions(-)
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/ExceptionCommon.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/ExceptionCommon.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/LoongArch64/ArchExceptionHandler.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/LoongArch64/ExceptionHandlerAsm.S
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/SecPeiExceptionLib.c

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
index aabcabff0f..9fcba009d6 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -2,6 +2,7 @@
 #  CPU Exception Handler library instance for DXE modules.
 #
 #  Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -18,7 +19,7 @@ [Defines]
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64
+#  VALID_ARCHITECTURES   = IA32 X64 LOONGARCH64
 #
 
 [Sources.Ia32]
@@ -32,12 +33,19 @@ [Sources.X64]
   X64/ArchInterruptDefs.h
   X64/ExceptionHandlerAsm.nasm
 
-[Sources.common]
+[Sources.Ia32, Sources.X64]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
   DxeException.c
   PeiDxeSmmCpuException.c
 
+[Sources.LoongArch64]
+  LoongArch/DxeExceptionLib.c
+  LoongArch/ExceptionCommon.h
+  LoongArch/ExceptionCommon.c
+  LoongArch/LoongArch64/ArchExceptionHandler.c
+  LoongArch/LoongArch64/ExceptionHandlerAsm.S | GCC
+
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
@@ -51,16 +59,21 @@ [Packages]
   MdeModulePkg/MdeModulePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
 
-[LibraryClasses]
+[LibraryClasses.common]
   BaseLib
-  CcExitLib
   DebugLib
-  LocalApicLib
   MemoryAllocationLib
   PeCoffGetEntryPointLib
   PrintLib
   SerialPortLib
   SynchronizationLib
 
+[LibraryClasses.Ia32, LibraryClasses.X64]
+  CcExitLib
+  LocalApicLib
+
+[LibraryClasses.LoongArch64]
+  CpuLib
+
 [BuildOptions]
   XCODE:*_*_X64_NASM_FLAGS = -D NO_ABSOLUTE_RELOCS_IN_TEXT
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
new file mode 100644
index 00..eed5644552
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
@@ -0,0 +1,198 @@
+/** @file DxeExceptionLib.c
+
+  LoongArch exception library implemenation for DXE modules.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ExceptionCommon.h"
+
+EFI_EXCEPTION_CALLBACK  ExternalInterruptHandler[MAX_LOONGARCH_INTERRUPT + 1] 
= { 0 };
+EFI_EXCEPTION_CALLBACK  ExceptionHandler[MAX_LOONGARCH_EXCEPTION + 1] 
= { 0 };
+
+/**
+  Registers a function to be called from the processor interrupt or exception 
handler.
+
+  This function registers and enables the handler specified by 
InterruptHandler for a processor
+  interrupt or exception type specified by InterruptType. If InterruptHandler 
is NULL, then the
+  handler for the processor interrupt or exception type specified by 
InterruptType is uninstalled.
+  The installed handler is called once for each processor interrupt or 
exception.
+
+  @param  InterruptTypeA pointer to the processor's current interrupt 
state. Set to TRUE if interrupts
+   are enabled and FALSE if interrupts are disabled.
+  @param  InterruptHandler A pointer to a function of type 
EFI_CPU_INTERRUPT_HANDLER that

[edk2-devel] [PATCH v3 05/13] UefiCpuPkg: Add LoongArch64 CPU Timer instance

[Chao Li]

Add the LoongArch64 CPU Timer instance to CpuTimerLib, using CPUCFG 0x4
and 0x5 for Stable Counter frequency.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 .../Library/CpuTimerLib/BaseCpuTimerLib.inf   |  15 +-
 .../CpuTimerLib/LoongArch64/CpuTimerLib.c | 250 ++
 UefiCpuPkg/UefiCpuPkg.dsc |   3 +
 3 files changed, 266 insertions(+), 2 deletions(-)
 create mode 100644 UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c

diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
index f0f4ae902a..4a1c7c0510 100644
--- a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
@@ -1,10 +1,15 @@
 ## @file
 #  Base CPU Timer Library
 #
-#  Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The 
performance
+#  Provides basic timer support.
+#
+#  In x86, using CPUID Leaf 0x15 XTAL frequency. The performance
 #  counter features are provided by the processors time stamp counter.
 #
+#  In LoongArch64, using CPUCFG 0x4 and 0x5 for Stable Counter frequency.
+#
 #  Copyright (c) 2021, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -18,10 +23,13 @@ [Defines]
   LIBRARY_CLASS  = TimerLib
   MODULE_UNI_FILE= BaseCpuTimerLib.uni
 
-[Sources]
+[Sources.IA32, Sources.X64]
   CpuTimerLib.c
   BaseCpuTimerLib.c
 
+[Sources.LoongArch64]
+  LoongArch64/CpuTimerLib.c
+
 [Packages]
   MdePkg/MdePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
@@ -31,5 +39,8 @@ [LibraryClasses]
   DebugLib
   PcdLib
 
+[LibraryClasses.LoongArch64]
+  SafeIntLib
+
 [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
diff --git a/UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c 
b/UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c
new file mode 100644
index 00..7ba7408498
--- /dev/null
+++ b/UefiCpuPkg/Library/CpuTimerLib/LoongArch64/CpuTimerLib.c
@@ -0,0 +1,250 @@
+/** @file
+  CPUCFG 0x4 and 0x5 for Stable Counter frequency instance of Timer Library.
+
+  Copyright (c) 2024, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Calculate clock frequency using CPUCFG 0x4 and 0x5 registers.
+
+  @param  VOID.
+
+  @return The frequency in Hz.
+
+**/
+STATIC
+UINT64
+CalcConstFreq (
+  VOID
+  )
+{
+  UINT32 BaseFreq;
+  UINT64 ClockMultiplier;
+  UINT32 ClockDivide;
+  CPUCFG_REG4_INFO_DATA  CcFreq;
+  CPUCFG_REG5_INFO_DATA  CpucfgReg5Data;
+  UINT64 StableTimerFreq;
+
+  //
+  // Get the the crystal frequency corresponding to the constant
+  // frequency timer and the clock used by the timer.
+  //
+  AsmCpucfg (CPUCFG_REG4_INFO, );
+
+  //
+  // Get the multiplication factor and frequency division factor
+  // corresponding to the constant frequency timer and the clock
+  // used by the timer.
+  //
+  AsmCpucfg (CPUCFG_REG5_INFO, );
+
+  BaseFreq= CcFreq.Bits.CC_FREQ;
+  ClockMultiplier = CpucfgReg5Data.Bits.CC_MUL & 0x;
+  ClockDivide = CpucfgReg5Data.Bits.CC_DIV & 0x;
+
+  if ((BaseFreq == 0x0) || (ClockMultiplier == 0x0) || (ClockDivide == 0x0)) {
+DEBUG ((
+  DEBUG_ERROR,
+  "LoongArch Stable Timer is not available in the CPU, hence this library 
cannot be used.\n"
+  ));
+ASSERT (FALSE);
+CpuDeadLoop ();
+  }
+
+  StableTimerFreq = ((ClockMultiplier * BaseFreq) / ClockDivide);
+
+  ASSERT (StableTimerFreq != 0);
+
+  return StableTimerFreq;
+}
+
+/**
+  Stalls the CPU for at least the given number of microseconds.
+
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+  @param  MicroSeconds  The minimum number of microseconds to delay.
+
+  @return MicroSeconds
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+  IN UINTN  MicroSeconds
+  )
+{
+  UINT64 CurrentTicks, ExceptedTicks, Remaining;
+  RETURN_STATUS  Status;
+
+  Status = SafeUint64Mult (MicroSeconds, CalcConstFreq (), );
+  ASSERT_RETURN_ERROR (Status);
+
+  ExceptedTicks  = DivU64x32 (Remaining, 100U);
+  CurrentTicks   = AsmReadStableCounter ();
+  ExceptedTicks += CurrentTicks;
+
+  do {
+CurrentTicks = AsmReadStableCounter ();
+  } while (CurrentTicks < ExceptedTicks);
+
+  return MicroSeconds;
+}
+
+/**
+  Stalls the CPU for at least the given number of nanoseconds.
+
+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+  @param  NanoSeconds The minimum number of nanoseconds to delay.
+
+  @return NanoSeconds
+
+**/
+UINTN
+EFIAPI
+NanoSeco

[edk2-devel] [PATCH v3 04/13] UefiCpuPkg/CpuDxe: Reorder the INF file alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/CpuDxe/CpuDxe.inf | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf
index 1d3e9f8cdb..9e1c673283 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
@@ -25,21 +25,21 @@ [Packages]
 [LibraryClasses]
   BaseLib
   BaseMemoryLib
+  CpuExceptionHandlerLib
   CpuLib
   DebugLib
   DxeServicesTableLib
+  HobLib
+  LocalApicLib
   MemoryAllocationLib
   MtrrLib
+  MpInitLib
+  PeCoffGetEntryPointLib
+  ReportStatusCodeLib
+  TimerLib
   UefiBootServicesTableLib
   UefiDriverEntryPoint
-  LocalApicLib
   UefiLib
-  CpuExceptionHandlerLib
-  HobLib
-  ReportStatusCodeLib
-  MpInitLib
-  TimerLib
-  PeCoffGetEntryPointLib
 
 [Sources]
   CpuDxe.c
@@ -77,9 +77,9 @@ [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard   ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask   ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize## 
CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask## 
CONSUMES
 
 [Depex]
   TRUE
-- 
2.27.0



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[edk2-devel] [PATCH v3 03/13] UefiCpuPkg/MpInitLib: Reorder the INF files alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 29 ++-
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 25 
 2 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 55e46d4a1f..7ef4c0d4db 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -23,21 +23,21 @@ [Defines]
 
 [Sources.IA32]
   Ia32/AmdSev.c
-  Ia32/MpFuncs.nasm
   Ia32/CreatePageTable.c
+  Ia32/MpFuncs.nasm
 
 [Sources.X64]
   X64/AmdSev.c
-  X64/MpFuncs.nasm
   X64/CreatePageTable.c
+  X64/MpFuncs.nasm
 
 [Sources.common]
   AmdSev.c
-  MpEqu.inc
   DxeMpLib.c
+  Microcode.c
+  MpEqu.inc
   MpLib.c
   MpLib.h
-  Microcode.c
   MpHandOff.h
 
 [Packages]
@@ -47,17 +47,18 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
+  CcExitLib
+  CpuLib
+  DebugAgentLib
+  HobLib
   LocalApicLib
   MemoryAllocationLib
-  HobLib
+  MicrocodeLib
   MtrrLib
-  CpuLib
-  UefiBootServicesTableLib
-  DebugAgentLib
-  SynchronizationLib
   PcdLib
-  CcExitLib
-  MicrocodeLib
+  SynchronizationLib
+  UefiBootServicesTableLib
+
 [LibraryClasses.X64]
   CpuPageTableLib
 
@@ -70,6 +71,9 @@ [Guids]
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
 
 [Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## 
SOMETIMES_CONSUMES
@@ -82,6 +86,3 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi## 
CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## 
CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
CONSUMES
-  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index bc3d716aa9..599ca36bc2 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -31,31 +31,34 @@ [Sources.X64]
 
 [Sources.common]
   AmdSev.c
+  Microcode.c
   MpEqu.inc
-  PeiMpLib.c
   MpLib.c
   MpLib.h
-  Microcode.c
   MpHandOff.h
+  PeiMpLib.c
+
 [Packages]
   MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
 
 [LibraryClasses]
   BaseLib
+  CcExitLib
+  CpuLib
+  HobLib
   LocalApicLib
   MemoryAllocationLib
-  HobLib
+  MicrocodeLib
   MtrrLib
-  CpuLib
-  SynchronizationLib
-  PeiServicesLib
   PcdLib
-  CcExitLib
-  MicrocodeLib
+  PeiServicesLib
+  SynchronizationLib
 
 [Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## 
SOMETIMES_CONSUMES
@@ -66,9 +69,7 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi ## CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## CONSUMES
-  gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi## CONSUMES
 
 [Ppis]
   gEdkiiPeiShadowMicrocodePpiGuid## SOMETIMES_CONSUMES
-- 
2.27.0



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[edk2-devel] [PATCH v3 02/13] UefiCpuPkg/CpuExceptionHandlerLib: Reorder the INF files alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 .../DxeCpuExceptionHandlerLib.inf | 20 +--
 .../PeiCpuExceptionHandlerLib.inf | 16 +++
 .../SecPeiCpuExceptionHandlerLib.inf  | 12 +--
 .../SmmCpuExceptionHandlerLib.inf | 16 +++
 4 files changed, 32 insertions(+), 32 deletions(-)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
index fdbebadab9..aabcabff0f 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -22,21 +22,21 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/ExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/ExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
-  PeiDxeSmmCpuException.c
   DxeException.c
+  PeiDxeSmmCpuException.c
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
@@ -53,14 +53,14 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
-  SynchronizationLib
+  CcExitLib
+  DebugLib
   LocalApicLib
-  PeCoffGetEntryPointLib
   MemoryAllocationLib
-  DebugLib
-  CcExitLib
+  PeCoffGetEntryPointLib
+  PrintLib
+  SerialPortLib
+  SynchronizationLib
 
 [BuildOptions]
   XCODE:*_*_X64_NASM_FLAGS = -D NO_ABSOLUTE_RELOCS_IN_TEXT
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
index 3bcaff5c5f..3a11516e32 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
@@ -22,15 +22,15 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/SecPeiExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/SecPeiExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
@@ -45,14 +45,14 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
-  LocalApicLib
-  PeCoffGetEntryPointLib
+  CcExitLib
   HobLib
+  LocalApicLib
   MemoryAllocationLib
+  PeCoffGetEntryPointLib
+  PrintLib
+  SerialPortLib
   SynchronizationLib
-  CcExitLib
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard# CONSUMES
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
index e7b1144f69..f8e597d86d 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
@@ -22,15 +22,15 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/SecPeiExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/SecPeiExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
@@ -44,11 +44,11 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
+  CcExitLib
   LocalApicLib
   PeCoffGetEntryPointLib
-  CcExitLib
+  PrintLib
+  SerialPortLib
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
index 27f0b96fa9..cc280a6ee7 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
@@ -22,15 +22,15 @@ [Defines]
 #
 
 [Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ExceptionHandlerAsm.nasm
+  Ia32/ExceptionTssEntryAsm.nasm
 
 [Sources.X64]
-  X64/ExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/ExceptionHandlerAsm.nasm
 
 [Sources.common]
   CpuExceptionCommon.h
@@ -45,13 +45,13 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  SerialPortLib
-  PrintLib
-  SynchronizationLib
+  CcExitLib
+  DebugLib

[edk2-devel] [PATCH v3 01/13] UefiCpuPkg/CpuTimerLib: Reorder the INF file alphabetically

[Chao Li]

Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
Acked-by: Gerd Hoffmann 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf 
b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
index de0648de91..f0f4ae902a 100644
--- a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
+++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
@@ -28,8 +28,8 @@ [Packages]
 
 [LibraryClasses]
   BaseLib
-  PcdLib
   DebugLib
+  PcdLib
 
 [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency  ## CONSUMES
-- 
2.27.0



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[edk2-devel] [PATCH v3 00/13] Part 2 patch set to add LoongArch support into UefiCpuPkg

[Chao Li]

This patch set adjusted some order in UefiCpuPig alphabetically, added
LoongArch libraries and drivers into UefiCpuPkg, it is a continuation of
the first patch series v8 submitted at
https://edk2.groups.io/g/devel/message/114526.

And also separated from https://edk2.groups.io/g/devel/message/116583.

This series only contents the changes for UefiCpuPkg.

Patch1-Patch4: Reorder some INF files located in UefiCpuPkg
alphabetically.

Patch5-Patch13: Added Timer, CpuMmuLib, CpuMmuInitLib, MpInitLib, CpuDxe
for LoongArch, and added some PCD and header files requested by the
above libraries and drivers.

Modfied modules: UefiCpuPkg

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

PR: https://github.com/tianocore/edk2/pull/5483

V1 -> V2:
1. Removed PcdCpuMmuIsEnabled.
2. Removed API GetMemoryRegionAttributes API as it is no longer needed.
3. Patch3, added two empty line in DXE and PEI INF files.
4. Patch5, added the Status check in GetTimeInnanoSecond function.
5. Separated into two series, this is series one, and the second one is
OvmfPkg.

V2 -> V3:
1. Remove CpuMmuInitLib.
2. Added a new GUID HOB named PROCESSOR_RESOURCE_HOG_GUID.
3. Following Ray suggest, adjust CpuMmuLib API, rename the API name.
4. Rename the PcdCpuExceptionVectorBaseAddress to
PcdLoongArch64ExceptionVectorBaseAddress.
5. Enable CpuMmio2Dxe in LoongArch.

Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Bibo Mao 
Cc: Dongyan Qian 

Chao Li (13):
  UefiCpuPkg/CpuTimerLib: Reorder the INF file alphabetically
  UefiCpuPkg/CpuExceptionHandlerLib: Reorder the INF files
alphabetically
  UefiCpuPkg/MpInitLib: Reorder the INF files alphabetically
  UefiCpuPkg/CpuDxe: Reorder the INF file alphabetically
  UefiCpuPkg: Add LoongArch64 CPU Timer instance
  UefiCpuPkg: Add CPU exception library for LoongArch
  UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg
  UefiCpuPkg: Added a new PCD named
PcdLoongArchExceptionVectorBaseAddress
  UefiCpuPkg: Add CpuMmuLib to UefiCpuPkg
  UefiCpuPkg: Add a new GUID to store the processors resource
  UefiCpuPkg: Add multiprocessor library for LoongArch64
  UefiCpuPkg: Add CpuDxe driver for LoongArch64
  UefiCpuPkg/UefiCpuPkg.dsc: Add CpuMmio2Dxe.inf to LoongArch64 field

 UefiCpuPkg/CpuDxe/CpuDxe.inf  |   39 +-
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c|  439 +
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h|  288 +++
 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c |  544 ++
 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c |  159 ++
 .../Include/Guid/ProcessorResourceHob.h   |   29 +
 UefiCpuPkg/Include/Library/CpuMmuLib.h|   41 +
 .../DxeCpuExceptionHandlerLib.inf |   37 +-
 .../LoongArch/DxeExceptionLib.c   |  198 ++
 .../LoongArch/ExceptionCommon.c   |  171 ++
 .../LoongArch/ExceptionCommon.h   |  131 ++
 .../LoongArch64/ArchExceptionHandler.c|  268 +++
 .../LoongArch64/ExceptionHandlerAsm.S |  366 
 .../LoongArch/SecPeiExceptionLib.c|  102 ++
 .../PeiCpuExceptionHandlerLib.inf |   16 +-
 .../SecPeiCpuExceptionHandlerLib.inf  |   31 +-
 .../SmmCpuExceptionHandlerLib.inf |   16 +-
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf|   39 +
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni|   14 +
 .../Library/CpuMmuLib/LoongArch64/CpuMmu.c|  785 
 .../Library/CpuMmuLib/LoongArch64/Page.h  |   33 +
 .../LoongArch64/TlbExceptionHandle.S  |   51 +
 .../LoongArch64/TlbExceptionHandle.h  |   36 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.S|   24 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.h|   24 +
 .../Library/CpuTimerLib/BaseCpuTimerLib.inf   |   17 +-
 .../CpuTimerLib/LoongArch64/CpuTimerLib.c |  250 +++
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |   42 +-
 .../Library/MpInitLib/LoongArch64/DxeMpLib.c  |  480 +
 .../Library/MpInitLib/LoongArch64/MpLib.c | 1626 +
 .../Library/MpInitLib/LoongArch64/MpLib.h |  350 
 .../Library/MpInitLib/LoongArch64/PeiMpLib.c  |  381 
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |   40 +-
 UefiCpuPkg/UefiCpuPkg.dec |   13 +
 UefiCpuPkg/UefiCpuPkg.dsc |7 +
 35 files changed, 7008 insertions(+), 79 deletions(-)
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c
 create mode 100644 UefiCpuPkg/Include/Guid/ProcessorResourceHob.h
 create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/ExceptionCommon.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/Loo

[edk2-devel] [PATCH v3 00/13] Part 2 patch set to add LoongArch support into UefiCpuPkg

[Chao Li]

This patch set adjusted some order in UefiCpuPig alphabetically, added
LoongArch libraries and drivers into UefiCpuPkg, it is a continuation of
the first patch series v8 submitted at
https://edk2.groups.io/g/devel/message/114526.

And also separated from https://edk2.groups.io/g/devel/message/116583.

This series only contents the changes for UefiCpuPkg.

Patch1-Patch4: Reorder some INF files located in UefiCpuPkg
alphabetically.

Patch5-Patch13: Added Timer, CpuMmuLib, CpuMmuInitLib, MpInitLib, CpuDxe
for LoongArch, and added some PCD and header files requested by the
above libraries and drivers.

Modfied modules: UefiCpuPkg

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

PR: https://github.com/tianocore/edk2/pull/5483

V1 -> V2:
1. Removed PcdCpuMmuIsEnabled.
2. Removed API GetMemoryRegionAttributes API as it is no longer needed.
3. Patch3, added two empty line in DXE and PEI INF files.
4. Patch5, added the Status check in GetTimeInnanoSecond function.
5. Separated into two series, this is series one, and the second one is
OvmfPkg.

V2 -> V3:
1. Remove CpuMmuInitLib.
2. Added a new GUID HOB named PROCESSOR_RESOURCE_HOG_GUID.
3. Following Ray suggest, adjust CpuMmuLib API, rename the API name.
4. Rename the PcdCpuExceptionVectorBaseAddress to
PcdLoongArch64ExceptionVectorBaseAddress.
5. Enable CpuMmio2Dxe in LoongArch.

Chao Li (13):
  UefiCpuPkg/CpuTimerLib: Reorder the INF file alphabetically
  UefiCpuPkg/CpuExceptionHandlerLib: Reorder the INF files
alphabetically
  UefiCpuPkg/MpInitLib: Reorder the INF files alphabetically
  UefiCpuPkg/CpuDxe: Reorder the INF file alphabetically
  UefiCpuPkg: Add LoongArch64 CPU Timer instance
  UefiCpuPkg: Add CPU exception library for LoongArch
  UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg
  UefiCpuPkg: Added a new PCD named
PcdLoongArchExceptionVectorBaseAddress
  UefiCpuPkg: Add CpuMmuLib to UefiCpuPkg
  UefiCpuPkg: Add a new GUID to store the processors resource
  UefiCpuPkg: Add multiprocessor library for LoongArch64
  UefiCpuPkg: Add CpuDxe driver for LoongArch64
  UefiCpuPkg/UefiCpuPkg.dsc: Add CpuMmio2Dxe.inf to LoongArch64 field

 UefiCpuPkg/CpuDxe/CpuDxe.inf  |   39 +-
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c|  439 +
 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h|  288 +++
 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c |  544 ++
 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c |  159 ++
 .../Include/Guid/ProcessorResourceHob.h   |   29 +
 UefiCpuPkg/Include/Library/CpuMmuLib.h|   41 +
 .../DxeCpuExceptionHandlerLib.inf |   37 +-
 .../LoongArch/DxeExceptionLib.c   |  198 ++
 .../LoongArch/ExceptionCommon.c   |  171 ++
 .../LoongArch/ExceptionCommon.h   |  131 ++
 .../LoongArch64/ArchExceptionHandler.c|  268 +++
 .../LoongArch64/ExceptionHandlerAsm.S |  366 
 .../LoongArch/SecPeiExceptionLib.c|  102 ++
 .../PeiCpuExceptionHandlerLib.inf |   16 +-
 .../SecPeiCpuExceptionHandlerLib.inf  |   31 +-
 .../SmmCpuExceptionHandlerLib.inf |   16 +-
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.inf|   39 +
 UefiCpuPkg/Library/CpuMmuLib/CpuMmuLib.uni|   14 +
 .../Library/CpuMmuLib/LoongArch64/CpuMmu.c|  785 
 .../Library/CpuMmuLib/LoongArch64/Page.h  |   33 +
 .../LoongArch64/TlbExceptionHandle.S  |   51 +
 .../LoongArch64/TlbExceptionHandle.h  |   36 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.S|   24 +
 .../CpuMmuLib/LoongArch64/TlbInvalid.h|   24 +
 .../Library/CpuTimerLib/BaseCpuTimerLib.inf   |   17 +-
 .../CpuTimerLib/LoongArch64/CpuTimerLib.c |  250 +++
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |   42 +-
 .../Library/MpInitLib/LoongArch64/DxeMpLib.c  |  480 +
 .../Library/MpInitLib/LoongArch64/MpLib.c | 1626 +
 .../Library/MpInitLib/LoongArch64/MpLib.h |  350 
 .../Library/MpInitLib/LoongArch64/PeiMpLib.c  |  381 
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |   40 +-
 UefiCpuPkg/UefiCpuPkg.dec |   13 +
 UefiCpuPkg/UefiCpuPkg.dsc |7 +
 35 files changed, 7008 insertions(+), 79 deletions(-)
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuDxe.h
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/CpuMp.c
 create mode 100644 UefiCpuPkg/CpuDxe/LoongArch64/Exception.c
 create mode 100644 UefiCpuPkg/Include/Guid/ProcessorResourceHob.h
 create mode 100644 UefiCpuPkg/Include/Library/CpuMmuLib.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/DxeExceptionLib.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/ExceptionCommon.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/ExceptionCommon.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/LoongArch/Loong