Re: [edk2-devel] [PATCH v2 13/13] NetworkPkg: Update the PxeBcDhcp6GoogleTest due to underlying changes

[Saloni Kasbekar]

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: Doug Flick  
Sent: Wednesday, May 8, 2024 10:57 PM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 

Subject: [PATCH v2 13/13] NetworkPkg: Update the PxeBcDhcp6GoogleTest due to 
underlying changes

From: Doug Flick 

This patch updates the PxeBcDhcp6GoogleTest due to the changes in the 
underlying code. The changes are as follows:
 - Random now comes from the RngLib Protocol
 - The TCP ISN is now generated by the hash function

Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 

Signed-off-by: Doug Flick [MSFT] 
---
 NetworkPkg/Test/NetworkPkgHostTest.dsc|   1 +
 NetworkPkg/UefiPxeBcDxe/GoogleTest/UefiPxeBcDxeGoogleTest.inf |   3 +-
 NetworkPkg/UefiPxeBcDxe/GoogleTest/PxeBcDhcp6GoogleTest.cpp   | 102 
+++-
 3 files changed, 100 insertions(+), 6 deletions(-)

diff --git a/NetworkPkg/Test/NetworkPkgHostTest.dsc 
b/NetworkPkg/Test/NetworkPkgHostTest.dsc
index fa301a7a52ab..1772afb05815 100644
--- a/NetworkPkg/Test/NetworkPkgHostTest.dsc
+++ b/NetworkPkg/Test/NetworkPkgHostTest.dsc
@@ -30,6 +30,7 @@ [Components]
   NetworkPkg/UefiPxeBcDxe/GoogleTest/UefiPxeBcDxeGoogleTest.inf { 
   
UefiRuntimeServicesTableLib|MdePkg/Test/Mock/Library/GoogleTest/MockUefiRuntimeServicesTableLib/MockUefiRuntimeServicesTableLib.inf+
  
UefiBootServicesTableLib|MdePkg/Test/Mock/Library/GoogleTest/MockUefiBootServicesTableLib/MockUefiBootServicesTableLib.inf
   }  # Despite these library classes being listed in [LibraryClasses] below, 
they are not needed for the host-based unit tests.diff --git 
a/NetworkPkg/UefiPxeBcDxe/GoogleTest/UefiPxeBcDxeGoogleTest.inf 
b/NetworkPkg/UefiPxeBcDxe/GoogleTest/UefiPxeBcDxeGoogleTest.inf
index 301dcdf61109..8b092d9291d4 100644
--- a/NetworkPkg/UefiPxeBcDxe/GoogleTest/UefiPxeBcDxeGoogleTest.inf
+++ b/NetworkPkg/UefiPxeBcDxe/GoogleTest/UefiPxeBcDxeGoogleTest.inf
@@ -14,7 +14,7 @@ [Defines]
 # # The following information is for reference only and not required by the 
build tools. #-#  VALID_ARCHITECTURES   = IA32 X64+#  
VALID_ARCHITECTURES   = IA32 X64 AARCH64 #  [Sources]@@ -23,6 +23,7 @@ 
[Sources]
   PxeBcDhcp6GoogleTest.h   ../PxeBcDhcp6.c   ../PxeBcSupport.c+  
../../../MdePkg/Test/Mock/Library/GoogleTest/Protocol/MockRng.cpp  [Packages]   
MdePkg/MdePkg.decdiff --git 
a/NetworkPkg/UefiPxeBcDxe/GoogleTest/PxeBcDhcp6GoogleTest.cpp 
b/NetworkPkg/UefiPxeBcDxe/GoogleTest/PxeBcDhcp6GoogleTest.cpp
index bd423ebadfce..61736ff79e83 100644
--- a/NetworkPkg/UefiPxeBcDxe/GoogleTest/PxeBcDhcp6GoogleTest.cpp
+++ b/NetworkPkg/UefiPxeBcDxe/GoogleTest/PxeBcDhcp6GoogleTest.cpp
@@ -7,6 +7,8 @@
 #include  #include  
#include +#include 
+#include 
  extern "C" {   #include @@ -165,7 
+167,7 @@ protected:
 // Note: // Testing PxeBcHandleDhcp6Offer() is difficult because it depends on 
a // properly setup Private structure. Attempting to properly test this 
function-// without a signficant refactor is a fools errand. Instead, we will 
test+// without a significant refactor is a fools errand. Instead, we will test 
// that we can prevent an overflow in the function. TEST_F 
(PxeBcHandleDhcp6OfferTest, BasicUsageTest) {   PXEBC_DHCP6_PACKET_CACHE  
*Cache6 = NULL;@@ -238,6 +240,7 @@ TEST_F (PxeBcCacheDnsServerAddressesTest, 
BasicUsageTest) {
 FreePool (Option);   } }+ // Test Description // Test that we can prevent 
an overflow in the function TEST_F (PxeBcCacheDnsServerAddressesTest, 
AttemptOverflowTest) {@@ -470,10 +473,15 @@ TEST_F 
(PxeBcRequestBootServiceTest, AttemptRequestOverFlowExpectFailure) {
 class PxeBcDhcp6DiscoverTest : public ::testing::Test { public:   
PXEBC_PRIVATE_DATA Private = { 0 };+  // create a mock md5 hash+  UINT8 
Md5Hash[16] = { 0 };+   EFI_UDP6_PROTOCOL Udp6Read;  protected:   
MockUefiRuntimeServicesTableLib RtServicesMock;+  MockUefiBootServicesTableLib 
BsMock;+  MockRng RngMock;// Add any setup code if needed   virtual void@@ 
-527,8 +535,21 @@ TEST_F (PxeBcDhcp6DiscoverTest, BasicOverflowTest) {
Private.Dhcp6Request->Length = (UINT16)(Cursor - (UINT8 
*)Private.Dhcp6Request); -  EXPECT_CALL (RtServicesMock, gRT_GetTime)-
.WillOnce (::testing::Return (0));+  EXPECT_CALL (BsMock, gBS_LocateProtocol)+  
  .WillOnce (+   ::testing::DoAll (+
::testing::SetArgPointee<2> (::testing::ByRef (gRngProtocol)),+ 
   ::testing::Return (EFI_SUCCESS)+)+   );++  
EXPECT_CALL (RngMock, GetRng)+.WillOnce (+   ::testing::DoAll (+
::testing::SetArgPointee<3> (::testing::ByRef (Md5Hash[0])),+   
 ::testing::Return (EFI_SUCCESS)+)+   );
ASSERT_EQ ( PxeBcDhcp6Discover (@@ -558,8 +579,21 @@ TEST_F 
(PxeBcDhcp6DiscoverTest, BasicUsageTest) {
Private.Dhcp6Request->Length = (UINT16)(Cursor - (UINT8 
*)Private.Dhcp6Request); -  EXPECT_CALL (RtServicesMock, gRT_GetTim

Re: [edk2-devel] [PATCH v2 09/13] NetworkPkg: TcpDxe: SECURITY PATCH CVE-2023-45236

[Saloni Kasbekar]

No other concerns.

Reviewed-by: Saloni Kasbekar 


From: gaoliming 
Sent: Thursday, May 23, 2024 6:24 PM
To: devel@edk2.groups.io; dougfl...@microsoft.com; Kasbekar, Saloni 

Subject: 回复: [edk2-devel] [PATCH v2 09/13] NetworkPkg: TcpDxe: SECURITY PATCH 
CVE-2023-45236

Saloni:
  Have you any other comments for this patch?

Thanks
Liming
发件人: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> 代表 Doug Flick via groups.io
发送时间: 2024年5月22日 3:29
收件人: Saloni Kasbekar 
mailto:saloni.kasbe...@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>
主题: Re: [edk2-devel] [PATCH v2 09/13] NetworkPkg: TcpDxe: SECURITY PATCH 
CVE-2023-45236


This was more of a design decision. Both Hash2Protocol and HashLib serve 
similar purposes. The goal was to use Hash2Protocol to decouple and provide 
greater modularity and flexibility over HashLib.



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Re: [edk2-devel] [PATCH] NetworkPkg:MnpDxe:CoverityIssues

[Saloni Kasbekar]

Could you please update the commit message for the patch below? Also, all your 
patches seem to result in an error after applying them. Could you help resend 
them with the fix?

warning: quoted CRLF detected
error: corrupt patch at line 19

Thanks,
Saloni

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Santhosh Kumar V 
via groups.io
Sent: Tuesday, May 21, 2024 7:14 AM
To: devel@edk2.groups.io; Santhosh Kumar V 
Cc: Sivaraman Nainar ; Raj V Akilan ; 
Kasbekar, Saloni ; Clark-williams, Zachary 

Subject: [edk2-devel] [PATCH] NetworkPkg:MnpDxe:CoverityIssues

Both the cases have ASSERTs checking that the value is greater than 0. Move the 
checks to the same location as the ASSERT. I'd also prefer if we return with a 
failure instead of forcing continuation of the function with an invalid value.

Thanks,
Saloni


Addressed above comments and made changes, please review the latest changes 
below and kindly review coverity changes for other modules too.

Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 

Signed-off-by: SanthoshKumarV 
---
 NetworkPkg/MnpDxe/MnpConfig.c | 3 +++
 NetworkPkg/MnpDxe/MnpIo.c | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/NetworkPkg/MnpDxe/MnpConfig.c b/NetworkPkg/MnpDxe/MnpConfig.c 
index 93587d53aa..12fc80ad0c 100644
--- a/NetworkPkg/MnpDxe/MnpConfig.c
+++ b/NetworkPkg/MnpDxe/MnpConfig.c
@@ -1304,6 +1304,9 @@ MnpStop (
   NET_CHECK_SIGNATURE (MnpServiceData, MNP_SERVICE_DATA_SIGNATURE);

   MnpDeviceData = MnpServiceData->MnpDeviceData;

   ASSERT (MnpDeviceData->ConfiguredChildrenNumber > 0);

+

+  if (MnpDeviceData->ConfiguredChildrenNumber <= 0)

+return EFI_OUT_OF_RESOURCES;



   //

   // Configure the receive filters.

diff --git a/NetworkPkg/MnpDxe/MnpIo.c b/NetworkPkg/MnpDxe/MnpIo.c index 
087c879c46..24dfad10fa 100644
--- a/NetworkPkg/MnpDxe/MnpIo.c
+++ b/NetworkPkg/MnpDxe/MnpIo.c
@@ -326,6 +326,9 @@ MnpInstanceDeliverPacket (


   ASSERT (Instance->RcvdPacketQueueSize != 0);



+  if (Instance->RcvdPacketQueueSize == 0)

+return EFI_OUT_OF_RESOURCES;

+

   RxDataWrap = NET_LIST_HEAD (>RcvdPacketQueue, MNP_RXDATA_WRAP, 
WrapEntry);

   if (RxDataWrap->Nbuf->RefCnt > 2) {

 //

--
2.42.0.windows.2
-The information contained in this message may be confidential and proprietary 
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Re: [edk2-devel] [PATCH] NetworkPkg:MnpDxe:CoverityIssues

[Saloni Kasbekar]

Both the cases have ASSERTs checking that the value is greater than 0. Move the 
checks to the same location as the ASSERT. I'd also prefer if we return with a 
failure instead of forcing continuation of the function with an invalid value.

Thanks,
Saloni

-Original Message-
From: Santhosh Kumar V  
Sent: Friday, May 10, 2024 3:05 AM
To: devel@edk2.groups.io; Santhosh Kumar V 
Cc: Sivaraman Nainar ; Raj V Akilan ; 
Kasbekar, Saloni ; Clark-williams, Zachary 

Subject: [PATCH] NetworkPkg:MnpDxe:CoverityIssues

Resolved INTEGER_OVERFLOW Coverity Issues in MNP Dxe 
1.MnpStop,MnpInstanceDeliverPacket
Expression "MnpDeviceData->ConfiguredChildrenNumber--" and 
Instance->RcvdPacketQueueSize--  where Both variables are known to be equal to 
0, underflows the type that receives it.


Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 

Signed-off-by: SanthoshKumarV 
---
 NetworkPkg/MnpDxe/MnpConfig.c | 3 ++-
 NetworkPkg/MnpDxe/MnpIo.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/NetworkPkg/MnpDxe/MnpConfig.c b/NetworkPkg/MnpDxe/MnpConfig.c 
index 93587d53aa..80253e88de 100644
--- a/NetworkPkg/MnpDxe/MnpConfig.c
+++ b/NetworkPkg/MnpDxe/MnpConfig.c
@@ -1313,7 +1313,8 @@ MnpStop (
   //

   // Decrease the children number.

   //

-  MnpDeviceData->ConfiguredChildrenNumber--;

+  if (MnpDeviceData->ConfiguredChildrenNumber > 0)

+  MnpDeviceData->ConfiguredChildrenNumber--;



   if (MnpDeviceData->ConfiguredChildrenNumber > 0) {

 //

diff --git a/NetworkPkg/MnpDxe/MnpIo.c b/NetworkPkg/MnpDxe/MnpIo.c index 
087c879c46..492edd9b66 100644
--- a/NetworkPkg/MnpDxe/MnpIo.c
+++ b/NetworkPkg/MnpDxe/MnpIo.c
@@ -351,7 +351,8 @@ MnpInstanceDeliverPacket (
   // All resources are OK, remove the packet from the queue.

   //

   NetListRemoveHead (>RcvdPacketQueue);

-  Instance->RcvdPacketQueueSize--;

+  if (Instance->RcvdPacketQueueSize != 0)

+  Instance->RcvdPacketQueueSize--;



   RxData  = >RxData;

   SnpMode = MnpDeviceData->Snp->Mode;

--
2.42.0.windows.2
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.


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Re: [edk2-devel] [PATCH v2 09/13] NetworkPkg: TcpDxe: SECURITY PATCH CVE-2023-45236

[Saloni Kasbekar]

Doug,

I see you have used Hash2Protocol here, instead of HashLib. Is there an 
advantage of using Hash2Protocol over HashLib?

Thanks,
Saloni

-Original Message-
From: Doug Flick  
Sent: Wednesday, May 8, 2024 10:56 PM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 

Subject: [PATCH v2 09/13] NetworkPkg: TcpDxe: SECURITY PATCH CVE-2023-45236

From: Doug Flick 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4541
REF: https://www.rfc-editor.org/rfc/rfc1948.txt
REF: https://www.rfc-editor.org/rfc/rfc6528.txt
REF: https://www.rfc-editor.org/rfc/rfc9293.txt

Bug Overview:
PixieFail Bug #8
CVE-2023-45236
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:C/C:L/I:N/A:N
CWE-200 Exposure of Sensitive Information to an Unauthorized Actor

Updates TCP ISN generation to use a cryptographic hash of the connection's 
identifying parameters and a secret key.
This prevents an attacker from guessing the ISN used for some other connection.

This is follows the guidance in RFC 1948, RFC 6528, and RFC 9293.

RFC: 9293 Section 3.4.1.  Initial Sequence Number Selection

   A TCP implementation MUST use the above type of "clock" for clock-
   driven selection of initial sequence numbers (MUST-8), and SHOULD
   generate its initial sequence numbers with the expression:

   ISN = M + F(localip, localport, remoteip, remoteport, secretkey)

   where M is the 4 microsecond timer, and F() is a pseudorandom
   function (PRF) of the connection's identifying parameters ("localip,
   localport, remoteip, remoteport") and a secret key ("secretkey")
   (SHLD-1).  F() MUST NOT be computable from the outside (MUST-9), or
   an attacker could still guess at sequence numbers from the ISN used
   for some other connection.  The PRF could be implemented as a
   cryptographic hash of the concatenation of the TCP connection
   parameters and some secret data.  For discussion of the selection of
   a specific hash algorithm and management of the secret key data,
   please see Section 3 of [42].

   For each connection there is a send sequence number and a receive
   sequence number.  The initial send sequence number (ISS) is chosen by
   the data sending TCP peer, and the initial receive sequence number
   (IRS) is learned during the connection-establishing procedure.

   For a connection to be established or initialized, the two TCP peers
   must synchronize on each other's initial sequence numbers.  This is
   done in an exchange of connection-establishing segments carrying a
   control bit called "SYN" (for synchronize) and the initial sequence
   numbers.  As a shorthand, segments carrying the SYN bit are also
   called "SYNs".  Hence, the solution requires a suitable mechanism for
   picking an initial sequence number and a slightly involved handshake
   to exchange the ISNs.

Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 

Signed-off-by: Doug Flick [MSFT] 
---
 NetworkPkg/TcpDxe/TcpDxe.inf  |   8 +-
 NetworkPkg/TcpDxe/TcpFunc.h   |  23 +-
 NetworkPkg/TcpDxe/TcpMain.h   |  59 -
 NetworkPkg/TcpDxe/TcpDriver.c |  92 +++-  NetworkPkg/TcpDxe/TcpInput.c  |  
13 +-
 NetworkPkg/TcpDxe/TcpMisc.c   | 242 ++--
 NetworkPkg/TcpDxe/TcpTimer.c  |   3 +-
 NetworkPkg/SecurityFixes.yaml |  22 ++
 8 files changed, 414 insertions(+), 48 deletions(-)

diff --git a/NetworkPkg/TcpDxe/TcpDxe.inf b/NetworkPkg/TcpDxe/TcpDxe.inf index 
cf5423f4c537..76de4cf9ec3d 100644
--- a/NetworkPkg/TcpDxe/TcpDxe.inf
+++ b/NetworkPkg/TcpDxe/TcpDxe.inf
@@ -6,6 +6,7 @@
 #  stack has been loaded in system. This driver supports both IPv4 and IPv6 
network stack. # #  Copyright (c) 2009 - 2018, Intel Corporation. All rights 
reserved.+#  Copyright (c) Microsoft Corporation # #  
SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -68,7 +69,6 @@ [LibraryClasses]
   NetLib   IpIoLib - [Protocols]   ## SOMETIMES_CONSUMES   ## 
SOMETIMES_PRODUCES@@ -81,6 +81,12 @@ [Protocols]
   gEfiIp6ServiceBindingProtocolGuid ## TO_START   
gEfiTcp6ProtocolGuid  ## BY_START   
gEfiTcp6ServiceBindingProtocolGuid## BY_START+  
gEfiHash2ProtocolGuid ## BY_START+  
gEfiHash2ServiceBindingProtocolGuid   ## BY_START++[Guids]+  
gEfiHashAlgorithmMD5Guid  ## CONSUMES+  
gEfiHashAlgorithmSha256Guid   ## CONSUMES  [Depex]   
gEfiHash2ServiceBindingProtocolGuiddiff --git a/NetworkPkg/TcpDxe/TcpFunc.h 
b/NetworkPkg/TcpDxe/TcpFunc.h
index a7af01fff246..c707bee3e548 100644
--- a/NetworkPkg/TcpDxe/TcpFunc.h
+++ b/NetworkPkg/TcpDxe/TcpFunc.h
@@ -2,7 +2,7 @@
   Declaration of external functions shared in TCP driver.Copyright (c) 
2009 - 2014, Intel Corporation. All rights reserved.-+  Copyright (c) 
Microsoft Corporation   SPDX-License-Identifier: BSD-2-Clause-Patent  **/@@ 
-36,8 +36,11 @@ VOID
@param[in, out]  Tcb   Pointer to the TCP_CB of this TCP 
instance. +  @retval EFI_SUCCESS  

Re: [edk2-devel] [PATCH v2 08/13] NetworkPkg:: SECURITY PATCH CVE-2023-45237

[Saloni Kasbekar]

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: Doug Flick  
Sent: Wednesday, May 8, 2024 10:56 PM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 

Subject: [PATCH v2 08/13] NetworkPkg:: SECURITY PATCH CVE-2023-45237

From: Doug Flick 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4542

Bug Overview:
PixieFail Bug #9
CVE-2023-45237
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:N/A:N
CWE-338 Use of Cryptographically Weak Pseudo-Random Number Generator (PRNG)

Use of a Weak PseudoRandom Number Generator

Change Overview:

Updates all Instances of NET_RANDOM (NetRandomInitSeed ()) to either

>
> EFI_STATUS
> EFIAPI
> PseudoRandomU32 (
>  OUT UINT32  *Output
>  );
>

or (depending on the use case)

>
> EFI_STATUS
> EFIAPI
> PseudoRandom (
>  OUT  VOID   *Output,
>  IN   UINTN  OutputLength
>  );
>

This is because the use of

Example:

The following code snippet PseudoRandomU32 () function is used:

>
> UINT32 Random;
>
> Status = PseudoRandomU32 ();
> if (EFI_ERROR (Status)) {
>   DEBUG ((DEBUG_ERROR, "%a failed to generate random number: %r\n",
__func__, Status));
>   return Status;
> }
>

This also introduces a new PCD to enable/disable the use of the secure 
implementation of algorithms for PseudoRandom () and instead depend on the 
default implementation. This may be required for some platforms where the UEFI 
Spec defined algorithms are not available.

>
> PcdEnforceSecureRngAlgorithms
>

If the platform does not have any one of the UEFI defined secure RNG algorithms 
then the driver will assert.

Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 

Signed-off-by: Doug Flick [MSFT] 
---
 NetworkPkg/NetworkPkg.dec  |   7 ++
 NetworkPkg/Library/DxeNetLib/DxeNetLib.inf |  13 +-
 NetworkPkg/TcpDxe/TcpDxe.inf   |   3 +
 NetworkPkg/IScsiDxe/IScsiMisc.h|   6 +-
 NetworkPkg/Include/Library/NetLib.h|  40 --
 NetworkPkg/Ip6Dxe/Ip6Nd.h  |   8 +-
 NetworkPkg/Dhcp4Dxe/Dhcp4Driver.c  |  10 +-
 NetworkPkg/Dhcp6Dxe/Dhcp6Driver.c  |  11 +-
 NetworkPkg/DnsDxe/DnsDhcp.c|  10 +-
 NetworkPkg/DnsDxe/DnsImpl.c|  11 +-
 NetworkPkg/HttpBootDxe/HttpBootDhcp6.c |  10 +-
 NetworkPkg/IScsiDxe/IScsiCHAP.c|  19 ++-
 NetworkPkg/IScsiDxe/IScsiMisc.c|  14 +--
 NetworkPkg/Ip4Dxe/Ip4Driver.c  |  10 +-
 NetworkPkg/Ip6Dxe/Ip6ConfigImpl.c  |   9 +-
 NetworkPkg/Ip6Dxe/Ip6Driver.c  |  17 ++-
 NetworkPkg/Ip6Dxe/Ip6If.c  |  12 +-
 NetworkPkg/Ip6Dxe/Ip6Mld.c |  12 +-
 NetworkPkg/Ip6Dxe/Ip6Nd.c  |  33 -
 NetworkPkg/Library/DxeNetLib/DxeNetLib.c   | 129 +---
 NetworkPkg/TcpDxe/TcpDriver.c  |  15 ++-
 NetworkPkg/Udp4Dxe/Udp4Driver.c|  10 +-
 NetworkPkg/Udp6Dxe/Udp6Driver.c|  11 +-
 NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c   |   9 +-
 NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.c   |  11 +-
 NetworkPkg/UefiPxeBcDxe/PxeBcDriver.c  |  12 +-
 NetworkPkg/SecurityFixes.yaml  |  39 ++
 27 files changed, 408 insertions(+), 83 deletions(-)

diff --git a/NetworkPkg/NetworkPkg.dec b/NetworkPkg/NetworkPkg.dec index 
e06f35e7747c..7c4289b77b21 100644
--- a/NetworkPkg/NetworkPkg.dec
+++ b/NetworkPkg/NetworkPkg.dec
@@ -5,6 +5,7 @@
 # # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved. # 
(C) Copyright 2015-2020 Hewlett Packard Enterprise Development LP+# 
Copyright (c) Microsoft Corporation # # SPDX-License-Identifier: 
BSD-2-Clause-Patent #@@ -130,6 +131,12 @@ [PcdsFixedAtBuild, 
PcdsPatchableInModule]
   # @Prompt Indicates whether SnpDxe creates event for ExitBootServices() 
call.   
gEfiNetworkPkgTokenSpaceGuid.PcdSnpCreateExitBootServicesEvent|TRUE|BOOLEAN|0x100C
 +  ## Enforces the use of Secure UEFI spec defined RNG algorithms for all 
network connections.+  # TRUE  - Enforce the use of Secure UEFI spec defined 
RNG algorithms.+  # FALSE - Do not enforce and depend on the default 
implementation of RNG algorithm from the provider.+  # @Prompt Enforce the use 
of Secure UEFI spec defined RNG algorithms.+  
gEfiNetworkPkgTokenSpaceGuid.PcdEnforceSecureRngAlgorithms|TRUE|BOOLEAN|0x100D+
 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]   ## 
IPv6 DHCP Unique Identifier (DUID) Type configuration (From RFCs 3315 and 
6355).   # 01 = DUID Based on Link-layer Address Plus Time [DUID-LLT]diff --git 
a/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf 
b/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
index 8145d256ec10..236ccd362efe 100644
--- a/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
+++ b/NetworkPkg/Library/DxeNetLib/DxeNetLib.inf
@@ -3,6 +3,7 @@
 # #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. #  
(C) Copyright 2015 Hewlett Packard Enterprise Development LP+#  Copyright 
(c)

Re: [edk2-devel] [PATCH] Readme.md: Update AlderlakeOpenBoardPkg known limitations.

[Saloni Kasbekar]

Reviewed-by: Kasbekar, Saloni 

-Original Message-
From: Hsueh, DoraX  
Sent: Monday, April 22, 2024 1:39 AM
To: devel@edk2.groups.io
Cc: Hsueh, DoraX ; Chaganty, Rangasai V 
; Chuang, Rosen ; 
Kasbekar, Saloni ; Tang, Haoyu 
; Desimone, Nathaniel L ; 
Chiu, Chasel 
Subject: [PATCH] Readme.md: Update AlderlakeOpenBoardPkg known limitations.

From: DoraX Hsueh 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4667

Updates Alderlake P Rvp details to the Readme.md.

Cc: Sai Chaganty 
Cc: Rosen Chuang 
Cc: Saloni Kasbekar 
Cc: Haoyu Tang 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Signed-off-by: DoraX Hsueh 
---
 Platform/Intel/Readme.md | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index 
d29a9072..652b4ec5 100644
--- a/Platform/Intel/Readme.md
+++ b/Platform/Intel/Readme.md
@@ -410,7 +410,9 @@ For PurleyOpenBoardPkg (TiogaPass)
  **AlderlakeOpenBoardPkg** 1. This firmware project has been tested booting to 
Microsoft Windows 11 x64 with M2 SSD Disk and Integrated Graphic Device.-2. 
AlderlakeOpenBoardPkg/Acpi/MinDsdt has been modified from 
MinPlatformPkg/Acpi/MinDsdt to avoid hang on boot to Microsoft Windows 11 
x64.+2. Since the FSP binary is incompatible with the latest Edk2 version, a 
working edk2 version needs to be kept+   EDK2 SHA-1: 
e10f1f5a043a402fb2daf2091b8f725fd2951743+   EDK2-Platforms SHA-1: 
fc6e3523d868650ad4f8aaac0ccdd8f138370341  **WhitleyOpenBoardPkg** 1. This 
firmware project has been tested booting to UEFI shell with headless serial 
console-- 
2.26.2.windows.1



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Re: [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Halt the TCO timer.

[Saloni Kasbekar]

Reviewed-by: Kasbekar, Saloni 

-Original Message-
From: Hsueh, DoraX  
Sent: Monday, April 22, 2024 1:40 AM
To: devel@edk2.groups.io
Cc: Hsueh, DoraX ; Chaganty, Rangasai V 
; Chuang, Rosen ; 
Kasbekar, Saloni ; Tang, Haoyu 
; Desimone, Nathaniel L ; 
Chiu, Chasel 
Subject: [PATCH] AlderlakeOpenBoardPkg: Halt the TCO timer.

From: DoraX Hsueh 

https://bugzilla.tianocore.org/show_bug.cgi?id=4761

Halt the TCO timer to fix release mode hang.

Cc: Sai Chaganty 
Cc: Rosen Chuang 
Cc: Saloni Kasbekar 
Cc: Haoyu Tang 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Signed-off-by: DoraX Hsueh 
---
 .../AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc  | 3 ++-
 .../Library/SecFspWrapperPlatformSecLib/PlatformInit.c| 8 
 .../SecFspWrapperPlatformSecLib.inf   | 1 +
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
index 59350f06..ea92ec75 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
@@ -233,8 +233,9 @@
 

 [LibraryClasses.X64.DXE_SMM_DRIVER]

 

-!if $(TARGET) == DEBUG

   
SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf

+

+!if $(TARGET) == DEBUG

   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SmmTestPointCheckLib.inf

   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLibNull/TestPointCheckLibNull.inf

 !endif

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
index f7ec4f9e..e930c9c7 100644
--- 
a/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c
@@ -12,6 +12,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 

 #include 

 #include 

+#include 

+#include 

 

 /**

   Platform initialization.

@@ -28,6 +30,12 @@ PlatformInit (
   IN VOID *EndOfRange

   )

 {

+

+  ///

+  /// Halt the TCO timer as early as possible

+  ///

+  IoWrite16 (PcdGet16 (PcdTcoBaseAddress) + R_TCO_IO_TCO1_CNT, 
B_TCO_IO_TCO1_CNT_TMR_HLT);

+

   //

   // Platform initialization

   // Enable Serial port here

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
 
b/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
index 3e51cb36..abc84057 100644
--- 
a/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
@@ -89,6 +89,7 @@
   gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress  ## 
CONSUMES

   gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize  ## 
CONSUMES

   gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable   ## 
CONSUMES

+  gSiPkgTokenSpaceGuid.PcdTcoBaseAddress  ## 
CONSUMES

 

 [FixedPcd]

   gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase   ## 
CONSUMES

-- 
2.26.2.windows.1



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Re: [edk2-devel] [PATCH] NetworkPkg:Resolved Consecutive Pxe-Http Boot Issue

[Saloni Kasbekar]

Hi Siva,

Have you looked into getting this fixed in grub as Laszlo suggested? What's the 
expected timeline for this workaround?

Thanks,
Saloni

-Original Message-
From: Sivaraman Nainar  
Sent: Tuesday, March 19, 2024 4:32 AM
To: devel@edk2.groups.io; Laszlo Ersek ; Santhosh Kumar V 
; Kasbekar, Saloni ; 
Clark-williams, Zachary 
Cc: Raj V Akilan ; Soundharia R 
Subject: RE: [EXTERNAL] Re: [edk2-devel] [PATCH] NetworkPkg:Resolved 
Consecutive Pxe-Http Boot Issue

@Saloni Kasbekar,

Can you please comment on the changes?

Thanks
Siva
-Original Message-
From: Sivaraman Nainar
Sent: Monday, February 26, 2024 4:01 PM
To: devel@edk2.groups.io; Sivaraman Nainar ; Laszlo Ersek 
; Santhosh Kumar V ; Saloni Kasbekar 
; Zachary Clark-williams 

Cc: Raj V Akilan ; Soundharia R 
Subject: RE: [EXTERNAL] Re: [edk2-devel] [PATCH] NetworkPkg:Resolved 
Consecutive Pxe-Http Boot Issue

@Saloni Kasbekar, @Zachary Clark-williams,

Could you please add your feedback on the changes proposed?

Thanks
Siva
-Original Message-
From: devel@edk2.groups.io  On Behalf Of Sivaraman Nainar 
via groups.io
Sent: Thursday, February 22, 2024 7:33 AM
To: Laszlo Ersek ; devel@edk2.groups.io; Santhosh Kumar V 
; Saloni Kasbekar ; Zachary 
Clark-williams 
Cc: Raj V Akilan ; Soundharia R 
Subject: [EXTERNAL] Re: [edk2-devel] [PATCH] NetworkPkg:Resolved Consecutive 
Pxe-Http Boot Issue


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**

Laszlo:

Thanks for the detailed feedback on the changes for this issue. Since we are 
not sure if this change are valid / violate some purpose of SNP driver, it 
mentioned as Workaround.

@Saloni Kasbekar and @Clark-williams, Zachary can add more on these changes.

As you recommended, we can have PCD which controls these changes till the 
changes are addressed in grub.

@Santhosh Kumar V is this issue can be seen only in SLES 15 or it can be found 
in any OS having Grub 2.x?

Thanks
Siva
-Original Message-
From: Laszlo Ersek 
Sent: Thursday, February 22, 2024 5:15 AM
To: devel@edk2.groups.io; Santhosh Kumar V 
Cc: Sivaraman Nainar ; Raj V Akilan ; 
Soundharia R ; Saloni Kasbekar 
; Zachary Clark-williams 

Subject: [EXTERNAL] Re: [edk2-devel] [PATCH] NetworkPkg:Resolved Consecutive 
Pxe-Http Boot Issue


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**

On 2/21/24 18:15, Santhosh Kumar V via groups.io wrote:
> The customer has a server environment where PXE and HTTP service run in same 
> Linux Server. In this environment a SUT trying to boot to SLES 15 OS via PXE 
> from the Boot Menu. After PXE Boot file downloaded and grub Loaded without 
> continuing for installation Exit is pressed and control back to Setup.
> Now the HTTP boot to SLES 15 OS tried in the same environment and failed to 
> download the file. If there is a reconnect -r performed before this HTTP Boot 
> then boot file download and installation is getting success.
> Root cause of the issue is, when Exit from grub performed, boot Loader Stops 
> the SNP Driver and starts the same.

This sentence feels like the key one.

Are you saying that grub calls Snp->Start() just before it exits?

If so, am I right to suspect that that's a grub bug? It sounds like a resource 
leak, after all.

Can you perhaps include a grub source code location / pointer in the commit 
message?

> During this process SNP is in Initialized State. When HTTP boot is performed 
> immediately after PXE Failure, the MNP configure method initiates the SNP 
> Start again. Since the SNP already started by grub it returns 
> EFI_ALREADY_STARTED and none of the upper Layer drivers are getting started.
> As a work around in MNPConfigure(), if the SNP Start failed with Already 
> Started and in Initialized state we can return success so that rest of the 
> drivers can be loaded and HTTP boot can work.
>
>
> Cc: Saloni Kasbekar 
> Cc: Zachary Clark-williams 
>
> Signed-off-by: SanthoshKumar 
> ---
>  NetworkPkg/MnpDxe/MnpConfig.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/NetworkPkg/MnpDxe/MnpConfig.c 
> b/NetworkPkg/MnpDxe/MnpConfig.c index 93587d53aa..0f2df28d73 100644
> --- a/NetworkPkg/MnpDxe/MnpConfig.c
> +++ b/NetworkPkg/MnpDxe/MnpConfig.c
> @@ -1120,7 +1120,9 @@ MnpStartSnp (
>// Start the simple network.
>
>//
>
>Status = Snp->Start (Snp);
>
> -
>
> +  if ((Status == EFI_ALREADY_STARTED ) && (Snp->Mode->State ==
> + EfiSimpleNetworkInitialized)) {
>
> +  return EFI_SUCCESS;
>
> +  }
>
>if (!EFI_ERROR (Status)) {
>
>  //
>
>  // Initialize the simple network.
>

The commit message does say this is a workaro

Re: [edk2-devel] reg: HTTP Proxy Support

[Saloni Kasbekar]

Still waiting for the new UEFI Specification to be released. Plan to send out 
the edk2 patches as soon as it is released.

From: Vivian Shi (石丽) 
Sent: Tuesday, March 19, 2024 12:01 AM
To: Kasbekar, Saloni ; Sivaraman Nainar 
; devel@edk2.groups.io
Cc: Dhanaraj V ; Clark-williams, Zachary 
; Hunter Qi (戚硕) ; Ivan Gu 
(顾鸣磊) ; Joybird Gu (顾哲鹤) 
Subject: RE: [EXTERNAL] RE: reg: HTTP Proxy Support

Hi Saloni,

Sorry for the drop in.
Is there any schedule for pull in the HTTP Proxy changes from edk2-staging to 
edk2?

Thanks a lot!
Best Regards
Vivian Shi

American Megatrends Information Technology (Kunshan) Co., Ltd.

Tel: +86-512-57360204 #259

From: Vivian Shi (石丽)
Sent: Tuesday, January 30, 2024 9:19 AM
To: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; Sivaraman Nainar 
mailto:sivaram...@ami.com>>; 
devel@edk2.groups.io
Cc: Dhanaraj V mailto:vdhana...@ami.com>>; Clark-williams, 
Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Hunter Qi (戚硕) mailto:hunte...@ami.com>>; Ivan Gu (顾鸣磊) 
mailto:iva...@ami.com>>; Joybird Gu (顾哲鹤) 
mailto:joybir...@ami.com>>
Subject: RE: [EXTERNAL] RE: reg: HTTP Proxy Support

Cc more.

Thanks a lot!
Best Regards
Vivian Shi

American Megatrends Information Technology (Kunshan) Co., Ltd.

Tel: +86-512-57360204 #259

From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Tuesday, January 30, 2024 2:03 AM
To: Sivaraman Nainar mailto:sivaram...@ami.com>>; 
devel@edk2.groups.io
Cc: Dhanaraj V mailto:vdhana...@ami.com>>; Vivian Shi (石丽) 
mailto:vivian...@ami.com>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>
Subject: [EXTERNAL] RE: reg: HTTP Proxy Support


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**
Hi Siva,

The changes for HTTP Proxy in edk2-staging are part of the code first process 
since they are dependent on corresponding changes in the UEFI spec.
As a part of the code first process once the next version of UEFI spec is 
released, we can pull in the changes from edk2-staging to edk2.

Thanks,
Saloni

From: Sivaraman Nainar mailto:sivaram...@ami.com>>
Sent: Sunday, January 28, 2024 9:59 PM
To: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; 
devel@edk2.groups.io
Cc: Dhanaraj V mailto:vdhana...@ami.com>>; Vivian Shi (石丽) 
mailto:vivian...@ami.com>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>
Subject: reg: HTTP Proxy Support

Hello Saloni,

Update Code First markdown file for specification text changes · 
tianocore/edk2-staging@b8816aa · 
GitHub

This branch has support for HTTP Proxy. Do we have any plan to bring to to 
master tree?

Thanks
Siva
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
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Re: [edk2-devel] [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

[Saloni Kasbekar]

Liming, Mike,

Could you please help merge this PR?

Thanks,
Saloni

From: Ashish Singhal 
Sent: Wednesday, January 17, 2024 6:08 AM
To: Kasbekar, Saloni ; devel@edk2.groups.io; 
Clark-williams, Zachary ; Jeff Brasen 

Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

Hello,

Checking back for an update on when this PR can be merged or if there are any 
other changes you recommend.

Thanks
Ashish


From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Saturday, January 6, 2024 5:53 AM
To: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

Thanks Saloni. PR for getting this merged is available at 
https://github.com/tianocore/edk2/pull/5150

Thanks
Ashish


From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Saturday, January 6, 2024 1:31 AM
To: Ashish Singhal mailto:ashishsin...@nvidia.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: RE: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

External email: Use caution opening links or attachments


Yes, SetData does reset the previous configuration.



Reviewed-by: Saloni Kasbekar 
mailto:saloni.kasbe...@intel.com>>



Thanks,

Saloni



From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Friday, January 5, 2024 2:34 AM
To: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



I do not recommend doing that. Setting policy via SetData does enough to wipe 
out any previous manual configuration and that is the goal for reset to default.



From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Friday, January 5, 2024 2:30 AM
To: Ashish Singhal mailto:ashishsin...@nvidia.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: RE: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



External email: Use caution opening links or attachments



Makes sense. Should we also set IfrNvData->DhcpEnable = TRUE when updating the 
Policy then?



From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Wednesday, January 3, 2024 8:52 AM
To: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



Hello Saloni,



Thanks for the feedback. After the reset, or when we disable configure from 
menu, GetData returns policy to static as the enum value is 0. However, setting 
value as static does not have any benefit as it forces to reuse the old network 
settings. Using DHCP really mimics the reset behavior that we see without any 
configuration done manually.



Thanks

Ashish





From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Tuesday, January 2, 2024 1:47 PM
To: Ashish Singhal mailto:ashishsin...@nvidia.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: RE: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



External email: Use caution opening links or attachments



Hi Ashish,



+Ip4NvData->Policy = Ip4Config2PolicyDhcp;

+Status= Ip4Cfg2->SetData (

+   Ip4Cfg2,

+   Ip4Config2DataTypePolicy,

+   sizeof (EFI_IP4_CONFIG2_POLICY),

+   >Policy

+   );



Here we're assuming IfrFormNvData->DhcpEnable is TRUE. Should we check it 
before setting the policy and calling SetData()?



Thanks,

Saloni





From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Monday, January 1, 2024 8:48 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; 

Re: [edk2-devel] [PATCH V2 1/6] NetworkPkg/HttpDxe: Refactor TlsCreateChild

[Saloni Kasbekar]

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chang, Abner via 
groups.io
Sent: Sunday, January 7, 2024 5:27 AM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 
; Michael Brown ; Nickle Wang 
; Igor Kulchytskyy 
Subject: [edk2-devel] [PATCH V2 1/6] NetworkPkg/HttpDxe: Refactor TlsCreateChild

From: Abner Chang 

- Use HTTP instance as the parameter for TlsCreateChild function.
- Install TLS protocol on the HTTP instance thats create TLS child.

Signed-off-by: Abner Chang 
Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 
Cc: Michael Brown 
Cc: Nickle Wang 
Cc: Igor Kulchytskyy 
Reviewed-by: Michael Brown 
---
 NetworkPkg/HttpDxe/HttpProto.h|  3 +-
 NetworkPkg/HttpDxe/HttpsSupport.h | 18 ---
 NetworkPkg/HttpDxe/HttpImpl.c | 23 ++---
 NetworkPkg/HttpDxe/HttpProto.c|  7 +--
 NetworkPkg/HttpDxe/HttpsSupport.c | 78 ++-
 5 files changed, 64 insertions(+), 65 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpProto.h b/NetworkPkg/HttpDxe/HttpProto.h 
index 012f1f4b467..7e77b389a78 100644
--- a/NetworkPkg/HttpDxe/HttpProto.h
+++ b/NetworkPkg/HttpDxe/HttpProto.h
@@ -3,6 +3,7 @@
 
 Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
 (C) Copyright 2016 Hewlett Packard Enterprise Development LP
+Copyright (C) 2024 Advanced Micro Devices, Inc. All rights 
+reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -171,7 +172,7 @@ typedef struct _HTTP_PROTOCOL {
   BOOLEAN   UseHttps;
 
   EFI_SERVICE_BINDING_PROTOCOL  *TlsSb;
-  EFI_HANDLETlsChildHandle; /// Tls ChildHandle
+  BOOLEAN   TlsAlreadyCreated;
   TLS_CONFIG_DATA   TlsConfigData;
   EFI_TLS_PROTOCOL  *Tls;
   EFI_TLS_CONFIGURATION_PROTOCOL*TlsConfiguration;
diff --git a/NetworkPkg/HttpDxe/HttpsSupport.h 
b/NetworkPkg/HttpDxe/HttpsSupport.h
index 3c70825e8c3..5b44c7ac395 100644
--- a/NetworkPkg/HttpDxe/HttpsSupport.h
+++ b/NetworkPkg/HttpDxe/HttpsSupport.h
@@ -2,6 +2,7 @@
   The header files of miscellaneous routines specific to Https for HttpDxe 
driver.
 
 Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
+Copyright (C) 2024 Advanced Micro Devices, Inc. All rights 
+reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -30,21 +31,18 @@ IsHttpsUrl (
 /**
   Creates a Tls child handle, open EFI_TLS_PROTOCOL and 
EFI_TLS_CONFIGURATION_PROTOCOL.
 
-  @param[in]  ImageHandle   The firmware allocated handle for the UEFI 
image.
-  @param[out] TlsSb Pointer to the TLS 
SERVICE_BINDING_PROTOCOL.
-  @param[out] TlsProto  Pointer to the EFI_TLS_PROTOCOL instance.
-  @param[out] TlsConfiguration  Pointer to the 
EFI_TLS_CONFIGURATION_PROTOCOL instance.
+  @param[in]  HttpInstance  Pointer to HTTP_PROTOCOL structure.
 
-  @return  The child handle with opened EFI_TLS_PROTOCOL and 
EFI_TLS_CONFIGURATION_PROTOCOL.
+  @return  EFI_SUCCESSTLS child handle is returned in 
HttpInstance->TlsChildHandle
+  with opened EFI_TLS_PROTOCOL and 
EFI_TLS_CONFIGURATION_PROTOCOL.
+   EFI_DEVICE_ERROR   TLS service binding protocol is not found.
+   Otherwise  Fail to create TLS chile handle.
 
 **/
-EFI_HANDLE
+EFI_STATUS
 EFIAPI
 TlsCreateChild (
-  IN  EFI_HANDLE  ImageHandle,
-  OUT EFI_SERVICE_BINDING_PROTOCOL**TlsSb,
-  OUT EFI_TLS_PROTOCOL**TlsProto,
-  OUT EFI_TLS_CONFIGURATION_PROTOCOL  **TlsConfiguration
+  IN  HTTP_PROTOCOL  *HttpInstance
   );
 
 /**
diff --git a/NetworkPkg/HttpDxe/HttpImpl.c b/NetworkPkg/HttpDxe/HttpImpl.c 
index 7c5c925cf78..6606c293421 100644
--- a/NetworkPkg/HttpDxe/HttpImpl.c
+++ b/NetworkPkg/HttpDxe/HttpImpl.c
@@ -3,6 +3,7 @@
 
   Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
   (C) Copyright 2015-2016 Hewlett Packard Enterprise Development LP
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights 
+ reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -248,7 +249,6 @@ EfiHttpRequest (
   HTTP_TOKEN_WRAP*Wrap;
   CHAR8  *FileUrl;
   UINTN  RequestMsgSize;
-  EFI_HANDLE ImageHandle;
 
   //
   // Initializations
@@ -371,23 +371,10 @@ EfiHttpRequest (
 //
 // Check whether we need to create Tls child and open the TLS protocol.
 //
-if (HttpInstance->UseHttps && (HttpInstance->TlsChildHandle == NULL)) {
-  //
-  // Use TlsSb to create Tls child and open the TLS protocol.
-  //
-  if (HttpInstance->LocalAddressIsIPv6) {
-ImageHandle = HttpInstance->Service->Ip6DriverBindingHandle;
-  } else {
-ImageHandle = HttpInstance->Service->Ip4DriverBindingHandle;
-  }
-
-  HttpInstance->TlsChildHandle = TlsCreateChild (
-   

Re: [edk2-devel] [PATCH V2 3/6] NetworkPkg/HttpDxe: Add HttpEventTlsConfigured HTTP callback event

[Saloni Kasbekar]

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: abner.ch...@amd.com  
Sent: Sunday, January 7, 2024 5:27 AM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 
; Michael Brown ; Nickle Wang 
; Igor Kulchytskyy 
Subject: [PATCH V2 3/6] NetworkPkg/HttpDxe: Add HttpEventTlsConfigured HTTP 
callback event

From: Abner Chang 

Add HttpEventTlsConfigured HTTP callback event and notify callback functions 
when TlsConfigureSession () returns.

Signed-off-by: Abner Chang 
Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 
Cc: Michael Brown 
Cc: Nickle Wang 
Cc: Igor Kulchytskyy 
Reviewed-by: Michael Brown 
---
 NetworkPkg/Include/Protocol/HttpCallback.h | 15 ++-
 NetworkPkg/HttpDxe/HttpProto.c |  1 +
 NetworkPkg/HttpDxe/HttpsSupport.c  |  4 ++--
 3 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/NetworkPkg/Include/Protocol/HttpCallback.h 
b/NetworkPkg/Include/Protocol/HttpCallback.h
index 3accd2f8424..ae66cc9f771 100644
--- a/NetworkPkg/Include/Protocol/HttpCallback.h
+++ b/NetworkPkg/Include/Protocol/HttpCallback.h
@@ -2,6 +2,7 @@
   This file defines the EDKII HTTP Callback Protocol interface.
 
   Copyright (c) 2021, Intel Corporation. All rights reserved.
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights 
+ reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent  **/
 
@@ -55,7 +56,19 @@ typedef enum {
   /// EFI_SUCCESSThe initialization of session is done.
   /// Others Other error as indicated.
   ///
-  HttpEventInitSession
+  HttpEventInitSession,
+
+  ///
+  /// The Status of Event to configure TLS configuration data.
+  /// EventStatus:
+  /// EFI_SUCCESSThe TLS is configured successfully with the 
default value.
+  /// EFI_INVALID_PARAMETER  One or more input parameters to SetSessionData() 
is invalid.
+  /// EFI_NOT_READY  Current TLS session state is NOT 
EfiTlsSessionStateNotStarted.
+  /// EFI_NOT_FOUND  Fail to get 'HttpTlsCipherList' variable.
+  /// Others Other error as indicated.
+  ///
+  HttpEventTlsConfigured
+
 } EDKII_HTTP_CALLBACK_EVENT;
 
 /**
diff --git a/NetworkPkg/HttpDxe/HttpProto.c b/NetworkPkg/HttpDxe/HttpProto.c 
index 94900328ba9..9c3b497dce2 100644
--- a/NetworkPkg/HttpDxe/HttpProto.c
+++ b/NetworkPkg/HttpDxe/HttpProto.c
@@ -1418,6 +1418,7 @@ HttpInitSession (
   //
   if (TlsConfigure) {
 Status = TlsConfigureSession (HttpInstance);
+HttpNotify (HttpEventTlsConfigured, Status);
 if (EFI_ERROR (Status)) {
   return Status;
 }
diff --git a/NetworkPkg/HttpDxe/HttpsSupport.c 
b/NetworkPkg/HttpDxe/HttpsSupport.c
index 04a830f7152..8d7bffe1e9c 100644
--- a/NetworkPkg/HttpDxe/HttpsSupport.c
+++ b/NetworkPkg/HttpDxe/HttpsSupport.c
@@ -723,7 +723,7 @@ TlsConfigureSession (
   Status = TlsConfigCertificate (HttpInstance);
   if (EFI_ERROR (Status)) {
 if (Status == EFI_NOT_FOUND) {
-  DEBUG((DEBUG_WARN, "TLS Certificate is not found on the system!\n"));
+  DEBUG ((DEBUG_WARN, "TLS Certificate is not found on the 
+ system!\n"));
   //
   // We still return EFI_SUCCESS to the caller when TlsConfigCertificate
   // returns error, for the use case the platform doesn't require @@ 
-734,7 +734,7 @@ TlsConfigureSession (
   //
   Status = EFI_SUCCESS;
 } else {
-  DEBUG((DEBUG_ERROR, "TLS Certificate Config Error!\n"));
+  DEBUG ((DEBUG_ERROR, "TLS Certificate Config Error!\n"));
   return Status;
 }
   }
--
2.37.1.windows.1



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Re: [edk2-devel] [PATCH 1/5] NetwokrPkg/HttpDxe: Refactor TlsCreateChild

[Saloni Kasbekar]

 //
 // Check whether we need to create Tls child and open the TLS protocol.
 //
+if (HttpInstance->UseHttps && !HttpInstance->TlsAlreadyCreated) {
+  // Create TLS child for this HTTP instance.
+  Status = TlsCreateChild (HttpInstance);
+  if (EFI_ERROR (Status)) {
 return EFI_DEVICE_ERROR;
   }

Considering we're not creating TlsChildHandle anymore, we should probably 
rename TlsCreateChild() to TlsCreateHandle(). Also update the comments 
accordingly.

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Michael Brown
Sent: Friday, January 5, 2024 9:12 AM
To: abner.ch...@amd.com; devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 
; Nickle Wang ; Igor 
Kulchytskyy 
Subject: Re: [edk2-devel] [PATCH 1/5] NetwokrPkg/HttpDxe: Refactor 
TlsCreateChild

On 05/01/2024 08:37, abner.ch...@amd.com wrote:
> From: Abner Chang 
> 
> - Use HTTP instance as the parameter for TlsCreateChild function.
> - Install TLS protocol on the HTTP instance thats create TLS child.

Logic looks good to me, just some minor cosmetic comments.

Commit title has "NetwokrPkg" typo, should be "NetworkPkg".

> -  @return  The child handle with opened EFI_TLS_PROTOCOL and 
> EFI_TLS_CONFIGURATION_PROTOCOL.
> +  @return  EFI_SUCCESSTLS child handle is returned in 
> HttpInstance->TlsChildHandle
> +  with opened EFI_TLS_PROTOCOL and 
> EFI_TLS_CONFIGURATION_PROTOCOL.

Comment refers to TlsChildHandle, which no longer exists after this patch.

> -  @return  The child handle with opened EFI_TLS_PROTOCOL and 
> EFI_TLS_CONFIGURATION_PROTOCOL.
> +  @return  EFI_SUCCESSTLS child handle is returned in 
> HttpInstance->TlsChildHandle
> +  with opened EFI_TLS_PROTOCOL and 
> EFI_TLS_CONFIGURATION_PROTOCOL.

As above.

Reviewed-by: Michael Brown 

Michael








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Re: [edk2-devel] [PATCH 2/5] NetwokrPkg/HttpDxe: Consider TLS certificate not found as a success case

[Saloni Kasbekar]

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: abner.ch...@amd.com  
Sent: Friday, January 5, 2024 12:37 AM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 
; Michael Brown ; Nickle Wang 
; Igor Kulchytskyy 
Subject: [PATCH 2/5] NetwokrPkg/HttpDxe: Consider TLS certificate not found as 
a success case

From: Abner Chang 

We still return EFI_SUCCESS to the caller when TlsConfigCertificate returns 
error, for the use case the platform doesn't require certificate for the 
specific HTTP session. This ensures HttpInitSession function still initiated 
and returns EFI_SUCCESS to the caller. The failure is pushed back to TLS DXE 
driver if the HTTP communication actually requires certificate.

Signed-off-by: Abner Chang 
Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 
Cc: Michael Brown 
Cc: Nickle Wang 
Cc: Igor Kulchytskyy 
---
 NetworkPkg/HttpDxe/HttpsSupport.c | 17 +++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpsSupport.c 
b/NetworkPkg/HttpDxe/HttpsSupport.c
index a07323ff0bd..04a830f7152 100644
--- a/NetworkPkg/HttpDxe/HttpsSupport.c
+++ b/NetworkPkg/HttpDxe/HttpsSupport.c
@@ -722,8 +722,21 @@ TlsConfigureSession (
   //
   Status = TlsConfigCertificate (HttpInstance);
   if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "TLS Certificate Config Error!\n"));
-return Status;
+if (Status == EFI_NOT_FOUND) {
+  DEBUG((DEBUG_WARN, "TLS Certificate is not found on the system!\n"));
+  //
+  // We still return EFI_SUCCESS to the caller when TlsConfigCertificate
+  // returns error, for the use case the platform doesn't require
+  // certificate for the specific HTTP session. This ensures
+  // HttpInitSession function still initiated and returns EFI_SUCCESS to
+  // the caller. The failure is pushed back to TLS DXE driver if the
+  // HTTP communication actually requires certificate.
+  //
+  Status = EFI_SUCCESS;
+} else {
+  DEBUG((DEBUG_ERROR, "TLS Certificate Config Error!\n"));
+  return Status;
+}
   }
 
   //
--
2.37.1.windows.1



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Re: [edk2-devel] [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

[Saloni Kasbekar]

Yes, SetData does reset the previous configuration.

Reviewed-by: Saloni Kasbekar 

Thanks,
Saloni

From: Ashish Singhal 
Sent: Friday, January 5, 2024 2:34 AM
To: Kasbekar, Saloni ; devel@edk2.groups.io; 
Clark-williams, Zachary ; Jeff Brasen 

Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

I do not recommend doing that. Setting policy via SetData does enough to wipe 
out any previous manual configuration and that is the goal for reset to default.

From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Friday, January 5, 2024 2:30 AM
To: Ashish Singhal mailto:ashishsin...@nvidia.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: RE: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

External email: Use caution opening links or attachments


Makes sense. Should we also set IfrNvData->DhcpEnable = TRUE when updating the 
Policy then?



From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Wednesday, January 3, 2024 8:52 AM
To: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



Hello Saloni,



Thanks for the feedback. After the reset, or when we disable configure from 
menu, GetData returns policy to static as the enum value is 0. However, setting 
value as static does not have any benefit as it forces to reuse the old network 
settings. Using DHCP really mimics the reset behavior that we see without any 
configuration done manually.



Thanks

Ashish





From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Tuesday, January 2, 2024 1:47 PM
To: Ashish Singhal mailto:ashishsin...@nvidia.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: RE: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



External email: Use caution opening links or attachments



Hi Ashish,



+Ip4NvData->Policy = Ip4Config2PolicyDhcp;

+Status= Ip4Cfg2->SetData (

+   Ip4Cfg2,

+   Ip4Config2DataTypePolicy,

+   sizeof (EFI_IP4_CONFIG2_POLICY),

+   >Policy

+   );



Here we're assuming IfrFormNvData->DhcpEnable is TRUE. Should we check it 
before setting the policy and calling SetData()?



Thanks,

Saloni





From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Monday, January 1, 2024 8:48 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; Clark-williams, 
Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



Hello,



Checking again for some feedback on this.



Thanks

Ashish





From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Thursday, December 14, 2023 4:42 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>>; 
saloni.kasbe...@intel.com<mailto:saloni.kasbe...@intel.com> 
mailto:saloni.kasbe...@intel.com>>; 
zachary.clark-willi...@intel.com<mailto:zachary.clark-willi...@intel.com> 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Cc: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Subject: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



Exercising reset to default does not reset the settings.
Add handler code for the case where configuration is
disabled.

Signed-off-by: Ashish Singhal 
mailto:ashishsin...@nvidia.com>>
---
 NetworkPkg/Ip4Dxe/Ip4Config2Nv.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c b/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
index e0b6a4d4a9..dac5817b7c 100644
--- a/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
+++ b/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
@@ -586,6 +586,31 @@ Ip4Config2ConvertIfrNvDataToConfigNvData (
   }

   if (IfrFormNvData->Configure != TRUE) {
+if (Ip4NvData->DnsAddress != NULL) {
+  FreePool (Ip4NvData->DnsAddress);
+  Ip4NvData->DnsAddress  = NULL;
+  Ip4NvData->DnsAddressCount = 0;
+}
+
+if (Ip4NvData->GatewayAddress != NULL) {
+  FreePool (Ip4NvData->GatewayAddress);
+  Ip4NvData->

Re: [edk2-devel] [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

[Saloni Kasbekar]

Makes sense. Should we also set IfrNvData->DhcpEnable = TRUE when updating the 
Policy then?

From: Ashish Singhal 
Sent: Wednesday, January 3, 2024 8:52 AM
To: Kasbekar, Saloni ; devel@edk2.groups.io; 
Clark-williams, Zachary ; Jeff Brasen 

Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

Hello Saloni,

Thanks for the feedback. After the reset, or when we disable configure from 
menu, GetData returns policy to static as the enum value is 0. However, setting 
value as static does not have any benefit as it forces to reuse the old network 
settings. Using DHCP really mimics the reset behavior that we see without any 
configuration done manually.

Thanks
Ashish


From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Tuesday, January 2, 2024 1:47 PM
To: Ashish Singhal mailto:ashishsin...@nvidia.com>>; 
devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: RE: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

External email: Use caution opening links or attachments


Hi Ashish,



+Ip4NvData->Policy = Ip4Config2PolicyDhcp;

+Status= Ip4Cfg2->SetData (

+   Ip4Cfg2,

+   Ip4Config2DataTypePolicy,

+   sizeof (EFI_IP4_CONFIG2_POLICY),

+   >Policy

+   );



Here we're assuming IfrFormNvData->DhcpEnable is TRUE. Should we check it 
before setting the policy and calling SetData()?



Thanks,

Saloni





From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Monday, January 1, 2024 8:48 AM
To: devel@edk2.groups.io; Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>; Clark-williams, 
Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



Hello,



Checking again for some feedback on this.



Thanks

Ashish





From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Thursday, December 14, 2023 4:42 PM
To: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>; 
saloni.kasbe...@intel.com 
mailto:saloni.kasbe...@intel.com>>; 
zachary.clark-willi...@intel.com 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Cc: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Subject: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default



Exercising reset to default does not reset the settings.
Add handler code for the case where configuration is
disabled.

Signed-off-by: Ashish Singhal 
mailto:ashishsin...@nvidia.com>>
---
 NetworkPkg/Ip4Dxe/Ip4Config2Nv.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c b/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
index e0b6a4d4a9..dac5817b7c 100644
--- a/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
+++ b/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
@@ -586,6 +586,31 @@ Ip4Config2ConvertIfrNvDataToConfigNvData (
   }

   if (IfrFormNvData->Configure != TRUE) {
+if (Ip4NvData->DnsAddress != NULL) {
+  FreePool (Ip4NvData->DnsAddress);
+  Ip4NvData->DnsAddress  = NULL;
+  Ip4NvData->DnsAddressCount = 0;
+}
+
+if (Ip4NvData->GatewayAddress != NULL) {
+  FreePool (Ip4NvData->GatewayAddress);
+  Ip4NvData->GatewayAddress  = NULL;
+  Ip4NvData->GatewayAddressCount = 0;
+}
+
+if (Ip4NvData->ManualAddress != NULL) {
+  FreePool (Ip4NvData->ManualAddress);
+  Ip4NvData->ManualAddress  = NULL;
+  Ip4NvData->ManualAddressCount = 0;
+}
+
+Ip4NvData->Policy = Ip4Config2PolicyDhcp;
+Status= Ip4Cfg2->SetData (
+   Ip4Cfg2,
+   Ip4Config2DataTypePolicy,
+   sizeof (EFI_IP4_CONFIG2_POLICY),
+   >Policy
+   );
 return EFI_SUCCESS;
   }

--
2.17.1

Hello,
Hello Saloni,


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Re: [edk2-devel] [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

[Saloni Kasbekar]

Hi Ashish,

+Ip4NvData->Policy = Ip4Config2PolicyDhcp;
+Status= Ip4Cfg2->SetData (
+   Ip4Cfg2,
+   Ip4Config2DataTypePolicy,
+   sizeof (EFI_IP4_CONFIG2_POLICY),
+   >Policy
+   );

Here we're assuming IfrFormNvData->DhcpEnable is TRUE. Should we check it 
before setting the policy and calling SetData()?

Thanks,
Saloni


From: Ashish Singhal 
Sent: Monday, January 1, 2024 8:48 AM
To: devel@edk2.groups.io; Kasbekar, Saloni ; 
Clark-williams, Zachary ; Jeff Brasen 

Subject: Re: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

Hello,

Checking again for some feedback on this.

Thanks
Ashish


From: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Sent: Thursday, December 14, 2023 4:42 PM
To: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>; 
saloni.kasbe...@intel.com 
mailto:saloni.kasbe...@intel.com>>; 
zachary.clark-willi...@intel.com 
mailto:zachary.clark-willi...@intel.com>>; 
Jeff Brasen mailto:jbra...@nvidia.com>>
Cc: Ashish Singhal mailto:ashishsin...@nvidia.com>>
Subject: [PATCH] NetworkPkg/Ip4Dxe: Fix Reset To Default

Exercising reset to default does not reset the settings.
Add handler code for the case where configuration is
disabled.

Signed-off-by: Ashish Singhal 
mailto:ashishsin...@nvidia.com>>
---
 NetworkPkg/Ip4Dxe/Ip4Config2Nv.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c b/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
index e0b6a4d4a9..dac5817b7c 100644
--- a/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
+++ b/NetworkPkg/Ip4Dxe/Ip4Config2Nv.c
@@ -586,6 +586,31 @@ Ip4Config2ConvertIfrNvDataToConfigNvData (
   }

   if (IfrFormNvData->Configure != TRUE) {
+if (Ip4NvData->DnsAddress != NULL) {
+  FreePool (Ip4NvData->DnsAddress);
+  Ip4NvData->DnsAddress  = NULL;
+  Ip4NvData->DnsAddressCount = 0;
+}
+
+if (Ip4NvData->GatewayAddress != NULL) {
+  FreePool (Ip4NvData->GatewayAddress);
+  Ip4NvData->GatewayAddress  = NULL;
+  Ip4NvData->GatewayAddressCount = 0;
+}
+
+if (Ip4NvData->ManualAddress != NULL) {
+  FreePool (Ip4NvData->ManualAddress);
+  Ip4NvData->ManualAddress  = NULL;
+  Ip4NvData->ManualAddressCount = 0;
+}
+
+Ip4NvData->Policy = Ip4Config2PolicyDhcp;
+Status= Ip4Cfg2->SetData (
+   Ip4Cfg2,
+   Ip4Config2DataTypePolicy,
+   sizeof (EFI_IP4_CONFIG2_POLICY),
+   >Policy
+   );
 return EFI_SUCCESS;
   }

--
2.17.1
Hello,


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Re: [edk2-devel] [PATCH V3 2/2] NetworkPkg: RFC1323 definition changed to RFC7323

[Saloni Kasbekar]

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: Ren, SuqiangX  
Sent: Tuesday, December 26, 2023 1:02 AM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 

Subject: [PATCH V3 2/2] NetworkPkg: RFC1323 definition changed to RFC7323

According to UEFI spec 2.10, the definition of RFC1323 has changed to RFC7323 
on EFI_TCP6_OPTION. So align this change on NetworkPkg.

REF: UEFI spec 2.10 Table 28.2.5

Signed-off-by: Suqiang Ren 
Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 
---
 NetworkPkg/TcpDxe/TcpInput.c | 2 +-
 NetworkPkg/TcpDxe/TcpProto.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/NetworkPkg/TcpDxe/TcpInput.c b/NetworkPkg/TcpDxe/TcpInput.c index 
7b329be64dfe..97633a3908be 100644
--- a/NetworkPkg/TcpDxe/TcpInput.c
+++ b/NetworkPkg/TcpDxe/TcpInput.c
@@ -1177,7 +1177,7 @@ TcpInput (
   //
   if (TCP_FLG_ON (Option.Flag, TCP_OPTION_RCVD_TS)) {
 //
-// update TsRecent as specified in page 16 RFC1323.
+// update TsRecent as specified in page 17 RFC7323.
 // RcvWl2 equals to the variable "LastAckSent"
 // defined there.
 //
diff --git a/NetworkPkg/TcpDxe/TcpProto.h b/NetworkPkg/TcpDxe/TcpProto.h index 
81f6a875351f..94234f969681 100644
--- a/NetworkPkg/TcpDxe/TcpProto.h
+++ b/NetworkPkg/TcpDxe/TcpProto.h
@@ -277,7 +277,7 @@ struct _TCP_CONTROL_BLOCK {
   BOOLEAN ProbeTimerOn;///< If TRUE, the probe time is 
on.
 
   //
-  // RFC1323 defined variables, about window scale,
+  // RFC7323 defined variables, about window scale,
   // timestamp and PAWS
   //
   UINT8   SndWndScale; ///< Wndscale received from the peer.
--
2.26.2.windows.1



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Re: [edk2-devel] Clarification on LoadFile2 Protocol Installation for Network Boot Devices

[Saloni Kasbekar]

Hi Siva,

We can file a Mantis for the UEFI forum with the proposal to update the wording 
for #18 to include Network devices.

Thanks,
Saloni

From: Sivaraman Nainar 
Sent: Monday, December 18, 2023 10:54 PM
To: Kasbekar, Saloni ; devel@edk2.groups.io; 
Clark-williams, Zachary 
Cc: Natalya Kalistratova ; Dhanaraj V ; 
Santhosh Kumar V ; GengYou Zhou (周庚佑) 

Subject: RE: [EXTERNAL] RE: Clarification on LoadFile2 Protocol Installation 
for Network Boot Devices

Hello Saloni:

Thanks for Clarifying.

Yes. If Network Devices MUST install LoadFile2 then it would be good that 
section 18 includes network devices. Do we need to request UEFI forum for the 
same?

Thanks
Siva
From: Kasbekar, Saloni 
mailto:saloni.kasbe...@intel.com>>
Sent: Tuesday, December 19, 2023 1:41 AM
To: devel@edk2.groups.io; Sivaraman Nainar 
mailto:sivaram...@ami.com>>; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>
Cc: Natalya Kalistratova mailto:natal...@ami.com>>; Dhanaraj 
V mailto:vdhana...@ami.com>>; Santhosh Kumar V 
mailto:santhoshkum...@ami.com>>; GengYou Zhou (周庚佑) 
mailto:gengyouz...@ami.com>>
Subject: [EXTERNAL] RE: Clarification on LoadFile2 Protocol Installation for 
Network Boot Devices


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**
Hi Siva,

“The EFI_LOAD_FILE2_PROTOCOL is a simple protocol used to obtain files from 
arbitrary devices that are not boot
options”
“The EFI_LOAD_FILE_PROTOCOL is used for devices that do not directly support 
file systems. Network devices
commonly boot in this model where the image is materialized without the need of 
a file system.”

Based on the above statements, I believe the Network stack is fine using the 
current EFI_LOAD_FILE_PROTOCOL and not the EFI_LOAD_FILE2_PROTOCOL as they are 
currently loaded as boot options. We currently do install the 
EFI_LOAD_FILE_PROTOCOL within the Network stack. Eg -
  //
  // Create a child handle for the HTTP boot and install DevPath and Load file 
protocol on it.
  //
  CopyMem (>Ip6Nic->LoadFile, , sizeof 
(Private->LoadFile));
  Status = gBS->InstallMultipleProtocolInterfaces (
  >Ip6Nic->Controller,
  ,
  >Ip6Nic->LoadFile,
  ,
  Private->Ip6Nic->DevicePath,
  NULL
  );

Maybe we need to update #18 to include Network devices?

Thanks,
Saloni

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Sivaraman 
Nainar via groups.io
Sent: Friday, December 15, 2023 3:29 AM
To: devel@edk2.groups.io; Clark-williams, Zachary 
mailto:zachary.clark-willi...@intel.com>>; 
Kasbekar, Saloni mailto:saloni.kasbe...@intel.com>>
Cc: Natalya Kalistratova mailto:natal...@ami.com>>; Dhanaraj 
V mailto:vdhana...@ami.com>>; Santhosh Kumar V 
mailto:santhoshkum...@ami.com>>; GengYou Zhou (周庚佑) 
mailto:gengyouz...@ami.com>>
Subject: [edk2-devel] reg: Clarification on LoadFile2 Protocol Installation for 
Network Boot Devices

Hello ZClarkWilliams:

Could you please help to clarify if NetworkStack MUST install the LoadFile2 
Protocol or not. With reference to the below spec item, the LoadFile2 protocol 
must be implemented.

In one of the BIOS environment, the Setup Browser Locates the LoadFile2 
instance of Network Boot Device and it not found as it not installed by the 
current NetworkPkg.

Can you please comment if there is any reason behind not installing during the 
HTTP Boot.
“UEFI SPEC
2.6.3 Driver-Specific Elements There are a number of UEFI elements that can be 
added or removed depending on the features that a specific driver requires. 
Drivers can be implemented by platform firmware developers to support buses and 
devices in a specific platform. Drivers can also be implemented by add-in card 
vendors for devices that might be integrated into the platform hardware or 
added to a platform through an expansion slot. The following list includes 
possible driver features, and the UEFI elements that are required for each 
feature type:

  1.  If a driver is written for a boot device that is not a block-oriented 
device, a file system-based device, or a console device, then the 
EFI_LOAD_FILE2_PROTOCOL must be implemented.
“

Thanks
Siva
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.

-The information contained in this message may be confidential and proprietary 

Re: [edk2-devel] Clarification on LoadFile2 Protocol Installation for Network Boot Devices

[Saloni Kasbekar]

Hi Siva,

“The EFI_LOAD_FILE2_PROTOCOL is a simple protocol used to obtain files from 
arbitrary devices that are not boot
options”
“The EFI_LOAD_FILE_PROTOCOL is used for devices that do not directly support 
file systems. Network devices
commonly boot in this model where the image is materialized without the need of 
a file system.”

Based on the above statements, I believe the Network stack is fine using the 
current EFI_LOAD_FILE_PROTOCOL and not the EFI_LOAD_FILE2_PROTOCOL as they are 
currently loaded as boot options. We currently do install the 
EFI_LOAD_FILE_PROTOCOL within the Network stack. Eg -
  //
  // Create a child handle for the HTTP boot and install DevPath and Load file 
protocol on it.
  //
  CopyMem (>Ip6Nic->LoadFile, , sizeof 
(Private->LoadFile));
  Status = gBS->InstallMultipleProtocolInterfaces (
  >Ip6Nic->Controller,
  ,
  >Ip6Nic->LoadFile,
  ,
  Private->Ip6Nic->DevicePath,
  NULL
  );

Maybe we need to update #18 to include Network devices?

Thanks,
Saloni

From: devel@edk2.groups.io  On Behalf Of Sivaraman Nainar 
via groups.io
Sent: Friday, December 15, 2023 3:29 AM
To: devel@edk2.groups.io; Clark-williams, Zachary 
; Kasbekar, Saloni 
Cc: Natalya Kalistratova ; Dhanaraj V ; 
Santhosh Kumar V ; GengYou Zhou (周庚佑) 

Subject: [edk2-devel] reg: Clarification on LoadFile2 Protocol Installation for 
Network Boot Devices

Hello ZClarkWilliams:

Could you please help to clarify if NetworkStack MUST install the LoadFile2 
Protocol or not. With reference to the below spec item, the LoadFile2 protocol 
must be implemented.

In one of the BIOS environment, the Setup Browser Locates the LoadFile2 
instance of Network Boot Device and it not found as it not installed by the 
current NetworkPkg.

Can you please comment if there is any reason behind not installing during the 
HTTP Boot.
“UEFI SPEC
2.6.3 Driver-Specific Elements There are a number of UEFI elements that can be 
added or removed depending on the features that a specific driver requires. 
Drivers can be implemented by platform firmware developers to support buses and 
devices in a specific platform. Drivers can also be implemented by add-in card 
vendors for devices that might be integrated into the platform hardware or 
added to a platform through an expansion slot. The following list includes 
possible driver features, and the UEFI elements that are required for each 
feature type:

  1.  If a driver is written for a boot device that is not a block-oriented 
device, a file system-based device, or a console device, then the 
EFI_LOAD_FILE2_PROTOCOL must be implemented.
“

Thanks
Siva
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.



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Re: [edk2-devel] [PATCH v2] NetworkPkg: Triger regularly scan only if not connect to AP

[Saloni Kasbekar]

Mike,

Would you be able to help us merge the patch?

Thanks,
Saloni

-Original Message-
From: Luo, Heng  
Sent: Thursday, December 14, 2023 3:20 AM
To: Clark-williams, Zachary ; Kasbekar, 
Saloni ; devel@edk2.groups.io
Subject: RE: [PATCH v2] NetworkPkg: Triger regularly scan only if not connect 
to AP

Hi Saloni,
Could you help to merge the patch?

Thanks,
Heng

> -Original Message-
> From: Luo, Heng
> Sent: Monday, December 11, 2023 4:13 PM
> To: Clark-williams, Zachary ; 
> Kasbekar, Saloni ; devel@edk2.groups.io
> Subject: RE: [PATCH v2] NetworkPkg: Triger regularly scan only if not 
> connect to AP
> 
> Hi Zack,
> Could you please review the change?
> Thanks,
> Heng
> 
> > -Original Message-
> > From: Kasbekar, Saloni 
> > Sent: Saturday, December 2, 2023 5:25 AM
> > To: Luo, Heng ; devel@edk2.groups.io
> > Cc: Clark-williams, Zachary 
> > Subject: RE: [PATCH v2] NetworkPkg: Triger regularly scan only if 
> > not connect to AP
> >
> > Reviewed-by: Kasbekar, Saloni 
> >
> > Thanks,
> > Saloni
> >
> > -Original Message-
> > From: Luo, Heng 
> > Sent: Monday, November 27, 2023 7:07 PM
> > To: devel@edk2.groups.io
> > Cc: Kasbekar, Saloni ; Clark-williams, 
> > Zachary 
> > Subject: [PATCH v2] NetworkPkg: Triger regularly scan only if not 
> > connect to AP
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4605
> >
> > When UEFI Wi-Fi is in BSS connected state, the platform is 
> > considered as a static and Wi-Fi roaming support is not needed.
> > Wifi connection manager should not initiate Scan requests in this 
> > state affect BSS client connectivity and must be avoided.
> > Triger regularly scan only if not connect to AP.
> >
> > Signed-off-by: Heng Luo 
> > Cc: Saloni Kasbekar 
> > Cc: Zachary Clark-williams 
> > ---
> >  NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c | 4 ++-
> -
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git
> > a/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c
> > b/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c
> > index d1182e52bd..4c5460b65c 100644
> > --- a/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c
> > +++ b/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c
> > @@ -1506,8 +1506,8 @@ WifiMgrOnTimerTick (
> >}Nic->ScanTickTime++;-  if (((Nic->ScanTickTime >
> > WIFI_SCAN_FREQUENCY) || Nic->OneTimeScanRequest) &&-  (Nic-
> > >ScanState == WifiMgrScanFinished))+  if Nic->ScanTickTime >
> > WIFI_SCAN_FREQUENCY) && (Nic->ConnectState !=
> WifiMgrConnectedToAp))
> > ||+   Nic->OneTimeScanRequest) && (Nic->ScanState ==
> > WifiMgrScanFinished))   { Nic->OneTimeScanRequest = FALSE; Nic-
> > >ScanTickTime   = 0;--
> > 2.31.1.windows.1



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Re: [edk2-devel] [PATCH v2] NetworkPkg: Triger regularly scan only if not connect to AP

[Saloni Kasbekar]

Reviewed-by: Kasbekar, Saloni 

Thanks,
Saloni

-Original Message-
From: Luo, Heng  
Sent: Monday, November 27, 2023 7:07 PM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Clark-williams, Zachary 

Subject: [PATCH v2] NetworkPkg: Triger regularly scan only if not connect to AP

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4605

When UEFI Wi-Fi is in BSS connected state, the platform is considered as a 
static and Wi-Fi roaming support is not needed.
Wifi connection manager should not initiate Scan requests in this state affect 
BSS client connectivity and must be avoided.
Triger regularly scan only if not connect to AP.

Signed-off-by: Heng Luo 
Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 
---
 NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c 
b/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c
index d1182e52bd..4c5460b65c 100644
--- a/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c
+++ b/NetworkPkg/WifiConnectionManagerDxe/WifiConnectionMgrImpl.c
@@ -1506,8 +1506,8 @@ WifiMgrOnTimerTick (
   }Nic->ScanTickTime++;-  if (((Nic->ScanTickTime > WIFI_SCAN_FREQUENCY) 
|| Nic->OneTimeScanRequest) &&-  (Nic->ScanState == WifiMgrScanFinished))+  
if Nic->ScanTickTime > WIFI_SCAN_FREQUENCY) && (Nic->ConnectState != 
WifiMgrConnectedToAp)) ||+   Nic->OneTimeScanRequest) && (Nic->ScanState == 
WifiMgrScanFinished))   { Nic->OneTimeScanRequest = FALSE; 
Nic->ScanTickTime   = 0;-- 
2.31.1.windows.1



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[edk2-devel] [PATCH v2 10/10] AlderlakeSiliconPkg: Add Alderlake Product and SiPkg.dec

[Saloni Kasbekar]

Adds the following modules:
  - Product/Alderlake/Include
  - Product/Alderlake/Library
  - Product/Alderlake DSCs
  - SiPkg.dec

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Product/Alderlake/Include/Ppi/SiPolicy.h  |  55 ++
 .../Library/PeiSiPolicyLib/PeiSiPolicyLib.c   |  47 ++
 .../Library/PeiSiPolicyLib/PeiSiPolicyLib.inf |  47 ++
 .../PeiSiPolicyLib/PeiSiPolicyLibPreMem.c |  47 ++
 .../PeiSiPolicyLib/PeiSiPolicyLibrary.h   |  21 +
 .../Product/Alderlake/SiPkgBuildOption.dsc| 122 
 .../Product/Alderlake/SiPkgCommonLib.dsc  |  36 +
 .../Product/Alderlake/SiPkgDxe.dsc|  32 +
 .../Product/Alderlake/SiPkgDxeLib.dsc |  23 +
 .../Product/Alderlake/SiPkgPeiLib.dsc |  19 +
 Silicon/Intel/AlderlakeSiliconPkg/SiPkg.dec   | 625 ++
 11 files changed, 1074 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLibPreMem.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgBuildOption.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgCommonLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgDxe.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgDxeLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgPeiLib.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/SiPkg.dec

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h
new file mode 100644
index 00..703f0221bd
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h
@@ -0,0 +1,55 @@
+/** @file
+  Silicon Policy PPI is used for specifying platform
+  related Intel silicon information and policy setting.
+  This PPI is consumed by the silicon PEI modules and carried
+  over to silicon DXE modules.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SI_POLICY_PPI_H_
+#define _SI_POLICY_PPI_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifndef DISABLED
+#define DISABLED  0
+#endif
+#ifndef ENABLED
+#define ENABLED   1
+#endif
+
+extern EFI_GUID gSiPreMemPolicyPpiGuid;
+extern EFI_GUID gSiPolicyPpiGuid;
+
+
+#include 
+
+
+#include 
+#include 
+extern EFI_GUID gCpuPciePeiPreMemConfigGuid;
+extern EFI_GUID gCpuPcieRpConfigGuid;
+
+#include 
+extern EFI_GUID gMemoryConfigGuid;
+extern EFI_GUID gMemoryConfigNoCrcGuid;
+
+#include 
+extern EFI_GUID gSaMiscPeiPreMemConfigGuid;
+
+#include 
+extern EFI_GUID gHostBridgePeiPreMemConfigGuid;
+extern EFI_GUID gHostBridgePeiConfigGuid;
+
+typedef struct _SI_PREMEM_POLICY_STRUCT SI_PREMEM_POLICY_PPI;
+typedef struct _SI_POLICY_STRUCT SI_POLICY_PPI;
+
+#endif // _SI_POLICY_PPI_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
new file mode 100644
index 00..886415bdaa
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
@@ -0,0 +1,47 @@
+/** @file
+  This file is PeiSiPolicyLib library creates default settings of RC
+  Policy and installs RC Policy PPI.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#include "PeiSiPolicyLibrary.h"
+#include 
+#include 
+
+
+/**
+  SiInstallPolicyReadyPpi installs SiPolicyReadyPpi.
+  While installed, RC assumes the Policy is ready and finalized. So please 
update and override
+  any setting before calling this function.
+
+  @retval EFI_SUCCESSThe policy is installed.
+  @retval EFI_OUT_OF_RESOURCES   Insufficient resources to create buffer
+**/
+EFI_STATUS
+EFIAPI
+SiInstallPolicyReadyPpi (
+  VOID
+  )
+{
+  EFI_STATUS Status;
+  EFI_PEI_PPI_DESCRIPTOR *SiPolicyReadyPpiDesc;
+
+  SiPolicyReadyPpiDesc = (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool (sizeof 
(EFI_PEI_PPI_DESCRIPTOR));
+  if (SiPolicyReadyPpiDesc == NULL) {
+ASSERT (FALSE);
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  SiPolicyReadyPpiDesc->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | 
EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+  SiPolicyReadyPpiDesc->Guid  = 
+  SiPo

[edk2-devel] [PATCH v2 09/10] AlderlakeSiliconPkg: Add AdlPch Fru and IncludePrivate modules

[Saloni Kasbekar]

Adds the following modules:
  - AdlPch/Include
  - AdlPch/IncludePrivate
  - AdlPch/Library
  - AdlPch DSCs
  - IncludePrivate

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Fru/AdlPch/CommonLib.dsc  |  29 ++
 .../AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc|  10 +
 .../AlderlakeSiliconPkg/Fru/AdlPch/DxeLib.dsc |   7 +
 .../Fru/AdlPch/Include/PchBdfAssignment.h |  81 +
 .../Fru/AdlPch/Include/PchLimits.h|  47 +++
 .../Fru/AdlPch/Include/PchPcieRpInfo.h|  17 ++
 .../Fru/AdlPch/Include/PchReservedResources.h |  13 +
 .../AdlPch/Include/PchReservedResourcesAdpP.h |  36 +++
 .../IncludePrivate/Register/PchPcrRegs.h  |  59 
 .../IncludePrivate/Register/PchRegsLpcAdl.h   |  30 ++
 .../PeiDxeSmmPchInfoLib/PchInfoLibAdl.c   | 223 ++
 .../PeiDxeSmmPchInfoLib/PchInfoLibPrivate.h   |  44 +++
 .../PeiDxeSmmPchInfoLibAdl.inf|  37 +++
 .../AlderlakeSiliconPkg/Fru/AdlPch/Pei.dsc|   7 +
 .../AlderlakeSiliconPkg/Fru/AdlPch/PeiLib.dsc |  12 +
 .../IncludePrivate/RegisterAccess.h   | 288 ++
 16 files changed, 940 insertions(+)
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/DxeLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchBdfAssignment.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchLimits.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchPcieRpInfo.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchReservedResources.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchReservedResourcesAdpP.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/IncludePrivate/Register/PchPcrRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/IncludePrivate/Register/PchRegsLpcAdl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PchInfoLibAdl.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PchInfoLibPrivate.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PeiDxeSmmPchInfoLibAdl.inf
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Pei.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/PeiLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IncludePrivate/RegisterAccess.h

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc
new file mode 100644
index 00..3f508f83a1
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc
@@ -0,0 +1,29 @@
+## @file
+#  Component description file for the AlderLake PCH Common FRU libraries.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+  
PchPcrLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/Library/PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf
+  
PchSbiAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmPchSbiAccessLib/PeiDxeSmmPchSbiAccessLib.inf
+  
P2SbSidebandAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmP2SbSidebandAccessLib/PeiDxeSmmP2SbSidebandAccessLib.inf
+
+  
EspiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Espi/Library/PeiDxeSmmEspiLib/PeiDxeSmmEspiLib.inf
+
+
+  
PmcLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
+  
PmcPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLib.inf
+  
SpiCommonLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
+  
GpioLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/PeiDxeSmmGpioLib.inf
+  
PchDmiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf
+
+  
GpioPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/PeiDxeSmmGpioPrivateLib/PeiDxeSmmGpioPrivateLibVer2.inf
+  
PchPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PeiDxeSmmPchPcieRpLibVer2.inf
+
+
+  #
+  # Common FRU Libraries
+  #
+  
PchInfoLib|$(PLATFORM_SI_PACKAGE)/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PeiDxeSmmPchInfoLibAdl.inf
+
diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc
new file mode 100644
index 00..b443611d9a
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc
@@ -0,0 +1,10 @@
+## @file
+#  Component description file for the AlderLake PCH DXE FRU drivers.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent

[edk2-devel] [PATCH v2 08/10] AlderlakeSiliconPkg/Fru: Add AdlCpu Fru

[Saloni Kasbekar]

Adds the following modules:
  - AdlCpu/CpuPcieRp
  - AdlCpu/Include
  - AdlCpu/IncludePrivate
  - AdlCpu/LibraryPrivate
  - AdlCpu/PeiReportCpuHob
  - AdlCpu DSCs

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Fru/AdlCpu/CommonLib.dsc  |   9 +
 .../CpuPcieInfoFruLib.c   |  87 ++
 .../PeiDxeSmmCpuPcieInfoFruLib.inf|  39 +
 .../AlderlakeSiliconPkg/Fru/AdlCpu/DxeLib.dsc |   8 +
 .../Fru/AdlCpu/Include/CpuGenInfo.h   |  42 +
 .../Include/Library/CpuPcieInfoFruLib.h   |  45 +
 .../Include/Register/SaRegsHostBridge.h   |  64 +++
 .../AdlCpu/IncludePrivate/CpuGenInfoFruLib.h  |  44 +
 .../AdlCpu/IncludePrivate/Register/IgdRegs.h  |  34 
 .../BaseCpuInfoFruLib/BaseCpuInfoFruLib.c | 164 ++
 .../BaseCpuInfoFruLib/BaseCpuInfoFruLib.inf   |  29 
 .../PeiReportCpuHobLib/PeiReportCpuHobLib.c   |  22 +++
 .../PeiReportCpuHobLib/PeiReportCpuHobLib.inf |  26 +++
 13 files changed, 613 insertions(+)
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/DxeLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/Include/CpuGenInfo.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/Include/Library/CpuPcieInfoFruLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/Include/Register/SaRegsHostBridge.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/IncludePrivate/CpuGenInfoFruLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/IncludePrivate/Register/IgdRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/LibraryPrivate/BaseCpuInfoFruLib/BaseCpuInfoFruLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/LibraryPrivate/BaseCpuInfoFruLib/BaseCpuInfoFruLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/PeiReportCpuHob/Library/PeiReportCpuHobLib/PeiReportCpuHobLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/PeiReportCpuHob/Library/PeiReportCpuHobLib/PeiReportCpuHobLib.inf

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc
new file mode 100644
index 00..35a3cce916
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc
@@ -0,0 +1,9 @@
+## @file
+#  Component description file for the AlderLake CPU Common FRU libraries.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+CpuPcieInfoFruLib|$(PLATFORM_SI_PACKAGE)/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf
+CpuInfoFruLib|$(PLATFORM_SI_PACKAGE)/Fru/AdlCpu/LibraryPrivate/BaseCpuInfoFruLib/BaseCpuInfoFruLib.inf
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
new file mode 100644
index 00..277b73fe67
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
@@ -0,0 +1,87 @@
+/** @file
+  CPU PCIe information library.
+
+  All function in this library is available for PEI, DXE, and SMM,
+  But do not support UEFI RUNTIME environment call.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Get Maximum CPU Pcie Root Port Number
+
+  @retval Maximum CPU Pcie Root Port Number
+**/
+UINT8
+GetMaxCpuPciePortNum (
+  VOID
+  )
+{
+  switch (GetCpuSku ()) {
+case EnumCpuUlt:
+  return CPU_PCIE_ULT_MAX_ROOT_PORT;
+case EnumCpuUlx:
+  return CPU_PCIE_ULX_MAX_ROOT_PORT;
+default:
+  return CPU_PCIE_ULT_MAX_ROOT_PORT;
+  }
+}
+
+/**
+  Get CPU Pcie Root Port Device and Function Number by Root Port physical 
Number
+
+  @param[in]  RpNumber  Root port physical number. (0-based)
+  @param[out] RpDev Return corresponding root port device 
number.
+  @param[out] RpFun Return corresponding root port function 
number.
+
+  @retval EFI_SUCCESS   Root port device and function is retrieved
+  @retval EFI_INVALID_PARAMETER RpNumber is invalid
+**/
+EFI_STATUS
+EFIAPI
+GetCpuPcieRpDevFun (
+  IN  UINTN   RpNumber,
+  OUT UINTN   *RpDev,
+  OUT UINTN   *RpFun

[edk2-devel] [PATCH v2 07/10] AlderlakeSiliconPkg/Include: Add Protocol, Register, Other Includes

[Saloni Kasbekar]

Adds the following Includes:
  - Include/
  - Include/Protocol
  - Include/Register

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../AlderlakeSiliconPkg/Include/ConfigBlock.h |  53 +++
 .../AlderlakeSiliconPkg/Include/CpuPcieHob.h  |  48 +++
 .../Include/Protocol/IgdOpRegion.h|  22 ++
 .../Include/Protocol/Spi.h| 346 ++
 .../Include/Protocol/Wdt.h| 111 ++
 .../Include/Register/FlashRegs.h  |  73 
 .../Include/Register/GpioRegs.h   | 103 ++
 .../Include/Register/GpioRegsVer2.h   | 211 +++
 .../Include/Register/PchDmi14Regs.h   |  49 +++
 .../Include/Register/PchDmiRegs.h |  51 +++
 .../Include/Register/PchPcieRpRegs.h  |  45 +++
 .../Include/Register/PchRegsLpc.h |  77 
 .../Include/Register/PmcRegs.h| 134 +++
 .../Include/Register/RtcRegs.h|  44 +++
 .../Include/Register/TcoRegs.h|  71 
 .../Include/SerialIoDevices.h | 226 
 .../AlderlakeSiliconPkg/Include/SiConfigHob.h |  17 +
 .../Include/SiPolicyStruct.h  |  64 
 18 files changed, 1745 insertions(+)
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Protocol/IgdOpRegion.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Protocol/Spi.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Protocol/Wdt.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/FlashRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/GpioRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/GpioRegsVer2.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchDmi14Regs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchDmiRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchPcieRpRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchRegsLpc.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PmcRegs.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Register/RtcRegs.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Register/TcoRegs.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/SerialIoDevices.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/SiConfigHob.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/SiPolicyStruct.h

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h
new file mode 100644
index 00..2e609bc8d9
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h
@@ -0,0 +1,53 @@
+/** @file
+  Header file for Config Block Lib implementation
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _CONFIG_BLOCK_H_
+#define _CONFIG_BLOCK_H_
+
+#include 
+#include 
+#include 
+#include 
+
+#pragma pack (push,1)
+
+///
+/// Config Block Header
+///
+typedef struct _CONFIG_BLOCK_HEADER {
+  EFI_HOB_GUID_TYPE GuidHob;  ///< Offset 0-23  GUID 
extension HOB header
+  UINT8 Revision; ///< Offset 24Revision 
of this config block
+  UINT8 Attributes;   ///< Offset 25The main 
revision for config block
+  UINT8 Reserved[2];  ///< Offset 26-27 Reserved 
for future use
+} CONFIG_BLOCK_HEADER;
+
+///
+/// Config Block
+///
+typedef struct _CONFIG_BLOCK {
+  CONFIG_BLOCK_HEADERHeader;  ///< Offset 0-27  Header of 
config block
+  //
+  // Config Block Data
+  //
+} CONFIG_BLOCK;
+
+///
+/// Config Block Table Header
+///
+typedef struct _CONFIG_BLOCK_TABLE_STRUCT {
+  CONFIG_BLOCK_HEADERHeader;  ///< Offset 0-27  GUID 
number for main entry of config block
+  UINT8  Rsvd0[2];///< Offset 28-29 Reserved 
for future use
+  UINT16 NumberOfBlocks;  ///< Offset 30-31 Number of 
config blocks (N)
+  UINT32 AvailableSize;   ///< Offset 32-35 Current 
config block table size
+///
+/// Individual Config Block Structures are added here in memory as part of 
AddConfigBlock()
+///
+} CONFIG_BLOCK_TABLE_HEADER;
+#pragma pack (pop)
+
+#endif // _CONFIG_BLOCK_H_
+
diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h
new file mode 100644
index 00..dccd6e7d7a
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h

[edk2-devel] [PATCH v2 06/10] AlderlakeSiliconPkg/Include: Add Library, Pins, Ppi Includes

[Saloni Kasbekar]

Adds the following Includes:
  - Include/Library
  - Include/Pins
  - Include/Ppi

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/Library/ConfigBlockLib.h  |  64 +++
 .../Include/Library/EspiLib.h |  34 ++
 .../Include/Library/GpioConfig.h  | 372 ++
 .../Include/Library/GpioLib.h | 174 
 .../Include/Library/GpioNativeLib.h   | 135 +++
 .../Include/Library/GraphicsInfoLib.h |  46 +++
 .../Include/Library/MmPciLib.h|  27 ++
 .../Include/Library/PchPcieRpLib.h|  41 ++
 .../Include/Library/PchPcrLib.h   | 221 +++
 .../Library/PeiDxeSmmReserveMmio64SizeLib.h   |  21 +
 .../Include/Library/PeiSiPolicyUpdateLib.h| 154 
 .../Include/Library/PmcLib.h  |  40 ++
 .../Include/Library/ResetSystemLib.h  |  68 
 .../Include/Library/SecPlatformLib.h  |  81 
 .../Include/Library/SiConfigBlockLib.h|  56 +++
 .../Include/Library/SiPolicyLib.h |  39 ++
 .../Include/Library/SpiLib.h  |  21 +
 .../Include/Pins/GpioPinsVer2Lp.h |  36 ++
 .../Include/Ppi/FspmArchConfigPpi.h   |  32 ++
 .../Include/Ppi/PeiPreMemSiDefaultPolicy.h|  33 ++
 .../Include/Ppi/PeiSiDefaultPolicy.h  |  33 ++
 .../AlderlakeSiliconPkg/Include/Ppi/Spi.h |  29 ++
 .../AlderlakeSiliconPkg/Include/Ppi/Wdt.h |  22 ++
 23 files changed, 1779 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/EspiLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GpioConfig.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GpioLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GpioNativeLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GraphicsInfoLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/MmPciLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PchPcieRpLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PchPcrLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PeiDxeSmmReserveMmio64SizeLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PeiSiPolicyUpdateLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PmcLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ResetSystemLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SecPlatformLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SiConfigBlockLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SiPolicyLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SpiLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Pins/GpioPinsVer2Lp.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/FspmArchConfigPpi.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/PeiPreMemSiDefaultPolicy.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/PeiSiDefaultPolicy.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/Spi.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/Wdt.h

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h
new file mode 100644
index 00..d9966c76e9
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h
@@ -0,0 +1,64 @@
+/** @file
+  Header file for Config Block Lib implementation
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _CONFIG_BLOCK_LIB_H_
+#define _CONFIG_BLOCK_LIB_H_
+
+/**
+  Create config block table
+
+  @param[in] TotalSize- Max size to be allocated for 
the Config Block Table
+  @param[out]ConfigBlockTableAddress  - On return, points to a pointer 
to the beginning of Config Block Table Address
+
+  @retval EFI_INVALID_PARAMETER - Invalid Parameter
+  @retval EFI_OUT_OF_RESOURCES  - Out of resources
+  @retval EFI_SUCCESS   - Successfully created Config Block Table at 
ConfigBlockTableAddress
+**/
+EFI_STATUS
+EFIAPI
+CreateConfigBlockTable (
+  IN UINT16TotalSize,
+  OUTVOID  **ConfigBlockTableAddress
+  );
+
+/**
+  Add config block into config block table structure
+
+  @param[in] ConfigBlockTableAddress  - A pointer to the beginning of 
Config Block Table Address
+  @param[out]ConfigBlockAddress   - On return, points to a pointer 
to the beginning of Config Block Address
+
+  @retval EFI_OUT_OF_RESOURCES

[edk2-devel] [PATCH v2 03/10] AlderlakeSiliconPkg/IpBlock: Add P2sb, PchDmi components

[Saloni Kasbekar]

Adds the following modules:
  - IpBlock/P2sb/IncludePrivate
  - IpBlock/P2sb/Library
  - IpBlock/P2sb/LibraryPrivate
  - IpBlock/PchDmi/IncludePrivate
  - IpBlock/PchDmi/LibraryPrivate

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/P2SbSidebandAccessLib.h   | 105 +++
 .../IncludePrivate/Library/PchSbiAccessLib.h  |  58 
 .../P2sb/IncludePrivate/P2SbController.h  |  32 +++
 .../P2sb/IncludePrivate/Register/P2sbRegs.h   |  53 
 .../Library/PeiDxeSmmPchPcrLib/PchPcrLib.c| 266 ++
 .../PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf |  35 +++
 .../PeiDxeSmmP2SbSidebandAccessLib.c  | 208 ++
 .../PeiDxeSmmP2SbSidebandAccessLib.inf|  30 ++
 .../PchSbiAccessLib.c |  72 +
 .../PeiDxeSmmPchSbiAccessLib.inf  |  35 +++
 .../PchDmi/IncludePrivate/Library/PchDmiLib.h |  60 
 .../PeiDxeSmmPchDmiLib/PchDmi14.c |  34 +++
 .../PeiDxeSmmPchDmiLib/PchDmi14.h |  22 ++
 .../PeiDxeSmmPchDmiLib/PchDmiLib.c| 110 
 .../PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf |  43 +++
 15 files changed, 1163 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/PchSbiAccessLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/P2SbController.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Register/P2sbRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/Library/PeiDxeSmmPchPcrLib/PchPcrLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/Library/PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmP2SbSidebandAccessLib/PeiDxeSmmP2SbSidebandAccessLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmP2SbSidebandAccessLib/PeiDxeSmmP2SbSidebandAccessLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmPchSbiAccessLib/PchSbiAccessLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmPchSbiAccessLib/PeiDxeSmmPchSbiAccessLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/IncludePrivate/Library/PchDmiLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmi14.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmi14.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmiLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
new file mode 100644
index 00..e364508eb4
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
@@ -0,0 +1,105 @@
+/** @file
+  Header for P2SbSidebandAccessLib
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _P2SB_SIDEBAND_ACCESS_LIB_H_
+#define _P2SB_SIDEBAND_ACCESS_LIB_H_
+
+#include 
+#include 
+#include  // For PCH_SBI_PID definition
+
+typedef PCH_SBI_PID  P2SB_PID;
+
+typedef enum {
+  P2SbMemory = 0,
+  P2SbPciConfig,
+  P2SbPrivateConfig
+} P2SB_REGISTER_SPACE;
+
+typedef enum {
+  MemoryRead = 0x0,
+  MemoryWrite= 0x1,
+  PciConfigRead  = 0x4,
+  PciConfigWrite = 0x5,
+  PrivateControlRead = 0x6,
+  PrivateControlWrite= 0x7,
+  GpioLockUnlock = 0x13
+} P2SB_SBI_OPCODE;
+
+typedef enum {
+  SBI_SUCCESSFUL  = 0,
+  SBI_UNSUCCESSFUL= 1,
+  SBI_POWERDOWN   = 2,
+  SBI_MIXED   = 3,
+  SBI_INVALID_RESPONSE
+} P2SB_SBI_RESPONSE;
+
+typedef enum {
+  P2SbMmioAccess = 0,
+  P2SbMsgAccess
+} P2SB_SIDEBAND_ACCESS_METHOD;
+
+/**
+  REGISTER_ACCESS for P2SB device to support access to sideband registers.
+  Be sure to keep first member of this structure as REGISTER_ACCESS to allow
+  for correct casting between caller who sees this structure as REGISTER_ACCESS
+  and calle who will cast it to P2SB_SIDEBAND_REGISTER_ACCESS.
+**/
+typedef struct {
+  REGISTER_ACCESS  Access;
+  P2SB_SIDEBAND_ACCESS_METHOD  AccessMethod;
+  P2SB_PID P2SbPid;
+  UINT16   Fid;
+  P2SB_REGISTER_SPACE  RegisterSpace;
+  BOOLEAN  PostedWrites;
+  P2SB_CONTROLLER

[edk2-devel] [PATCH v2 04/10] AlderlakeSiliconPkg/IpBlock: Add Pmc, Spi components

[Saloni Kasbekar]

Adds the following modules:
  - IpBlock/Pmc/IncludePrivate
  - IpBlock/Pmc/Library
  - IpBlock/Pmc/LibraryPrivate
  - IpBlock/Spi/IncludePrivate
  - IpBlock/Spi/Library
  - IpBlock/Spi/LibraryPrivate
  - IpBlock/Spi/Smm

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../IncludePrivate/Library/PmcPrivateLib.h|   47 +
 .../IpBlock/Pmc/IncludePrivate/PmcSocConfig.h |   67 +
 .../PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf   |   38 +
 .../Pmc/Library/PeiDxeSmmPmcLib/PmcLib.c  |   50 +
 .../PeiDxeSmmPmcPrivateLib.inf|   43 +
 .../PeiDxeSmmPmcPrivateLib/PmcPrivateLib.c|   86 ++
 .../Spi/IncludePrivate/Library/SpiCommonLib.h |  376 ++
 .../Spi/IncludePrivate/Register/SpiRegs.h |  116 ++
 .../IpBlock/Spi/Library/PeiSpiLib/PchSpi.c|  209 +++
 .../Spi/Library/PeiSpiLib/PeiSpiLib.inf   |   41 +
 .../BaseSpiCommonLib/BaseSpiCommonLib.inf |   29 +
 .../BaseSpiCommonLib/SpiCommon.c  | 1127 +
 .../AlderlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c |  387 ++
 .../IpBlock/Spi/Smm/SpiSmm.inf|   46 +
 14 files changed, 2662 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PmcLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PmcPrivateLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Register/SpiRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Library/PeiSpiLib/PchSpi.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
new file mode 100644
index 00..6ec244b127
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
@@ -0,0 +1,47 @@
+/** @file
+  Header file for private PmcLib.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PMC_PRIVATE_LIB_H_
+#define _PMC_PRIVATE_LIB_H_
+
+#include 
+#include "Register/PmcRegs.h"
+
+typedef enum {
+  PmcSwSmiRate1p5ms = 0,
+  PmcSwSmiRate16ms,
+  PmcSwSmiRate32ms,
+  PmcSwSmiRate64ms
+} PMC_SWSMI_RATE;
+
+/**
+  This function sets SW SMI Rate.
+
+  @param[in] SwSmiRateRefer to PMC_SWSMI_RATE for possible values
+**/
+VOID
+PmcSetSwSmiRate (
+  IN PMC_SWSMI_RATE  SwSmiRate
+  );
+
+typedef enum {
+  PmcPeriodicSmiRate8s = 0,
+  PmcPeriodicSmiRate16s,
+  PmcPeriodicSmiRate32s,
+  PmcPeriodicSmiRate64s
+} PMC_PERIODIC_SMI_RATE;
+
+/**
+  This function sets Periodic SMI Rate.
+
+  @param[in] PeriodicSmiRateRefer to PMC_PERIODIC_SMI_RATE for 
possible values
+**/
+VOID
+PmcSetPeriodicSmiRate (
+  IN PMC_PERIODIC_SMI_RATEPeriodicSmiRate
+  );
+
+#endif // _PMC_PRIVATE_LIB_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h
new file mode 100644
index 00..523a84a180
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h
@@ -0,0 +1,67 @@
+/** @file
+  PMC SoC configuration
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PMC_SOC_CONFIGURATION_H_
+#define _PMC_SOC_CONFIGURATION_H_
+
+typedef enum {
+  AdrSinglePhase = 0,
+  AdrDualPhase
+} ADR_PHASE_TYPE;
+
+typedef enum {
+  AdrGpioB = 0,
+  AdrGpioC
+} ADR_GPIO;
+
+typedef enum {
+  AdrOverPmSync = 0,
+  AdrOverDmi
+} ADR_MSG_INTERFACE;
+
+typedef struct {
+  BOOLEANSupported;
+  ADR_PHASE_TYPE AdrPhaseType;
+  ADR_GPIO   AdrGpio;
+  ADR_MSG_INTERFACE  AdrMsgInterface;
+  //
+  // On some designs ADR_GEN_CFG has been moved in the HW.

[edk2-devel] [PATCH v2 02/10] AlderlakeSiliconPkg/IpBlock: Add Graphics, HostBridge, PcieRp components

[Saloni Kasbekar]

Adds the following modules:
  - IpBlock/Graphics/Include
  - IpBlock/Graphics/IncludePrivate
  - IpBlock/Graphics/Library
  - IpBlock/Graphics/LibraryPrivate
  - IpBlock/HostBridge/IncludePrivate
  - IpBlock/PcieRp/Library

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/Ppi/GraphicsPlatformPolicyPpi.h   |  76 +++
 .../Library/DxeGraphicsPolicyLib.h|  71 +++
 .../Library/DxeIgdOpRegionInitLib.h   | 115 +
 .../GraphicsInfoLibVer1.c |  52 
 .../GraphicsInfoLibVer1.inf   |  33 +
 .../DxeGraphicsPolicyLib.c| 116 +
 .../DxeGraphicsPolicyLib.inf  |  36 ++
 .../DxeIgdOpRegionInit.c  | 119 ++
 .../DxeIgdOpRegionInitLib.inf |  47 +++
 .../IncludePrivate/HostBridgeDataHob.h|  25 
 .../PchPcieRpLibInternal.h|  20 +++
 .../PeiDxeSmmPchPcieRpLib/PchPcieRpLibVer2.c  |  71 +++
 .../PeiDxeSmmPchPcieRpLibVer2.inf |  37 ++
 13 files changed, 818 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/IncludePrivate/Library/DxeGraphicsPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/IncludePrivate/Library/DxeIgdOpRegionInitLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Library/PeiDxeSmmGraphicsInfoLib/GraphicsInfoLibVer1.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Library/PeiDxeSmmGraphicsInfoLib/GraphicsInfoLibVer1.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeGraphicsPolicyLib/DxeGraphicsPolicyLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeGraphicsPolicyLib/DxeGraphicsPolicyLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeIgdOpRegionInitLib/DxeIgdOpRegionInit.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeIgdOpRegionInitLib/DxeIgdOpRegionInitLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/HostBridge/IncludePrivate/HostBridgeDataHob.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PchPcieRpLibInternal.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PchPcieRpLibVer2.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PeiDxeSmmPchPcieRpLibVer2.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
new file mode 100644
index 00..a8f67061a5
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
@@ -0,0 +1,76 @@
+/** @file
+  The PEI_GRAPHICS_PLATFORM_POLICY_PPI provides platform information to PEI 
Graphics PEIM.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PEI_GRAPHICS_PLATFORM_POLICY_PPI_H_
+#define _PEI_GRAPHICS_PLATFORM_POLICY_PPI_H_
+
+/**
+  Globally unique identifier for PEI platform policy PPI.
+**/
+#define PEI_GRAPHICS_PLATFORM_POLICY_PPI_GUID \
+{ \
+  0x4eabcd09, 0x43d3, 0x4b4d, { 0xb7, 0x3d, 0x43, 0xc8, 0xd9, 0x89, 0x99, 0x5 
} \
+}
+
+#define PEI_GRAPHICS_PLATFORM_POLICY_REVISION 1
+
+/**
+Pre-declaration of PEI graphics platform policy PPI.
+**/
+typedef struct _PEI_GRAPHICS_PLATFORM_POLICY_PPI 
PEI_GRAPHICS_PLATFORM_POLICY_PPI;
+
+/**
+  Enum defining the different lid status values
+**/
+typedef enum {
+  LidClosed,
+  LidOpen,
+  LidStatusMax
+} LID_STATUS;
+
+/**
+  This function gets the platform lid status for LFP displays.
+
+  @param[out] CurrentLidStatus  Output variable to store the lid status.
+
+  @retval EFI_SUCCESS   Correct lid status is returned.
+  @retval EFI_UNSUPPORTED   Platform does not support lid.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *GET_PLATFORM_LID_STATUS) (
+  OUT LID_STATUS  *CurrentLidStatus
+  );
+
+/**
+  This function gets the base address of loaded VBT.
+
+  @param[out] VbtAddressStarting address of the VBT is returned in this 
parameter.
+  @param[out] VbtSize   Size of the VBT is returned in this parameter.
+
+  @retval EFI_SUCCESS   If the VBT is loaded and parameters contain valid 
values.
+  @return Other error codes meaning VBT is not loaded and parameters 
contain invalid values.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *GET_VBT_DATA) (
+  OUT EFI_PHYSICAL_ADDRESS *VbtAddress,
+  OUT UINT32   *VbtSize

[edk2-devel] [PATCH 08/10] AlderlakeSiliconPkg/Fru: Add AdlCpu Fru

[Saloni Kasbekar]

Adds the following modules:
  - AdlCpu/CpuPcieRp
  - AdlCpu/Include
  - AdlCpu/IncludePrivate
  - AdlCpu/LibraryPrivate
  - AdlCpu/PeiReportCpuHob
  - AdlCpu DSCs

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Fru/AdlCpu/CommonLib.dsc  |   9 +
 .../CpuPcieInfoFruLib.c   |  87 
 .../PeiDxeSmmCpuPcieInfoFruLib.inf|  39 
 .../AlderlakeSiliconPkg/Fru/AdlCpu/DxeLib.dsc |   8 +
 .../Fru/AdlCpu/Include/CpuGenInfo.h   |  42 
 .../Include/Library/CpuPcieInfoFruLib.h   |  45 
 .../Include/Register/SaRegsHostBridge.h   |  64 ++
 .../AdlCpu/IncludePrivate/CpuGenInfoFruLib.h  | 176 
 .../AdlCpu/IncludePrivate/Register/IgdRegs.h  |  34 +++
 .../BaseCpuInfoFruLib/BaseCpuInfoFruLib.c | 193 ++
 .../BaseCpuInfoFruLib/BaseCpuInfoFruLib.inf   |  29 +++
 .../PeiReportCpuHobLib/PeiReportCpuHobLib.c   |  22 ++
 .../PeiReportCpuHobLib/PeiReportCpuHobLib.inf |  26 +++
 13 files changed, 774 insertions(+)
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/DxeLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/Include/CpuGenInfo.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/Include/Library/CpuPcieInfoFruLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/Include/Register/SaRegsHostBridge.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/IncludePrivate/CpuGenInfoFruLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/IncludePrivate/Register/IgdRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/LibraryPrivate/BaseCpuInfoFruLib/BaseCpuInfoFruLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/LibraryPrivate/BaseCpuInfoFruLib/BaseCpuInfoFruLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/PeiReportCpuHob/Library/PeiReportCpuHobLib/PeiReportCpuHobLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/PeiReportCpuHob/Library/PeiReportCpuHobLib/PeiReportCpuHobLib.inf

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc
new file mode 100644
index 00..35a3cce916
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CommonLib.dsc
@@ -0,0 +1,9 @@
+## @file
+#  Component description file for the AlderLake CPU Common FRU libraries.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+CpuPcieInfoFruLib|$(PLATFORM_SI_PACKAGE)/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/PeiDxeSmmCpuPcieInfoFruLib.inf
+CpuInfoFruLib|$(PLATFORM_SI_PACKAGE)/Fru/AdlCpu/LibraryPrivate/BaseCpuInfoFruLib/BaseCpuInfoFruLib.inf
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
new file mode 100644
index 00..277b73fe67
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/CpuPcieInfoFruLib.c
@@ -0,0 +1,87 @@
+/** @file
+  CPU PCIe information library.
+
+  All function in this library is available for PEI, DXE, and SMM,
+  But do not support UEFI RUNTIME environment call.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Get Maximum CPU Pcie Root Port Number
+
+  @retval Maximum CPU Pcie Root Port Number
+**/
+UINT8
+GetMaxCpuPciePortNum (
+  VOID
+  )
+{
+  switch (GetCpuSku ()) {
+case EnumCpuUlt:
+  return CPU_PCIE_ULT_MAX_ROOT_PORT;
+case EnumCpuUlx:
+  return CPU_PCIE_ULX_MAX_ROOT_PORT;
+default:
+  return CPU_PCIE_ULT_MAX_ROOT_PORT;
+  }
+}
+
+/**
+  Get CPU Pcie Root Port Device and Function Number by Root Port physical 
Number
+
+  @param[in]  RpNumber  Root port physical number. (0-based)
+  @param[out] RpDev Return corresponding root port device 
number.
+  @param[out] RpFun Return corresponding root port function 
number.
+
+  @retval EFI_SUCCESS   Root port device and function is retrieved
+  @retval EFI_INVALID_PARAMETER RpNumber is invalid
+**/
+EFI_STATUS
+EFIAPI
+GetCpuPcieRpDevFun (
+  IN  UINTN   RpNumber,
+  OUT UINTN   *RpDev,
+  OUT UINTN   *RpFun

[edk2-devel] [PATCH 10/10] AlderlakeSiliconPkg: Add Alderlake Product and SiPkg.dec

[Saloni Kasbekar]

Adds the following modules:
  - Product/Alderlake/Include
  - Product/Alderlake/Library
  - Product/Alderlake DSCs
  - SiPkg.dec

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Product/Alderlake/Include/Ppi/SiPolicy.h  |  55 ++
 .../Library/PeiSiPolicyLib/PeiSiPolicyLib.c   |  47 ++
 .../Library/PeiSiPolicyLib/PeiSiPolicyLib.inf |  47 ++
 .../PeiSiPolicyLib/PeiSiPolicyLibPreMem.c |  47 ++
 .../PeiSiPolicyLib/PeiSiPolicyLibrary.h   |  21 +
 .../Product/Alderlake/SiPkgBuildOption.dsc| 122 
 .../Product/Alderlake/SiPkgCommonLib.dsc  |  36 +
 .../Product/Alderlake/SiPkgDxe.dsc|  32 +
 .../Product/Alderlake/SiPkgDxeLib.dsc |  23 +
 .../Product/Alderlake/SiPkgPeiLib.dsc |  19 +
 Silicon/Intel/AlderlakeSiliconPkg/SiPkg.dec   | 625 ++
 11 files changed, 1074 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLibPreMem.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgBuildOption.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgCommonLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgDxe.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgDxeLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/SiPkgPeiLib.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/SiPkg.dec

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h
new file mode 100644
index 00..703f0221bd
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Include/Ppi/SiPolicy.h
@@ -0,0 +1,55 @@
+/** @file
+  Silicon Policy PPI is used for specifying platform
+  related Intel silicon information and policy setting.
+  This PPI is consumed by the silicon PEI modules and carried
+  over to silicon DXE modules.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SI_POLICY_PPI_H_
+#define _SI_POLICY_PPI_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifndef DISABLED
+#define DISABLED  0
+#endif
+#ifndef ENABLED
+#define ENABLED   1
+#endif
+
+extern EFI_GUID gSiPreMemPolicyPpiGuid;
+extern EFI_GUID gSiPolicyPpiGuid;
+
+
+#include 
+
+
+#include 
+#include 
+extern EFI_GUID gCpuPciePeiPreMemConfigGuid;
+extern EFI_GUID gCpuPcieRpConfigGuid;
+
+#include 
+extern EFI_GUID gMemoryConfigGuid;
+extern EFI_GUID gMemoryConfigNoCrcGuid;
+
+#include 
+extern EFI_GUID gSaMiscPeiPreMemConfigGuid;
+
+#include 
+extern EFI_GUID gHostBridgePeiPreMemConfigGuid;
+extern EFI_GUID gHostBridgePeiConfigGuid;
+
+typedef struct _SI_PREMEM_POLICY_STRUCT SI_PREMEM_POLICY_PPI;
+typedef struct _SI_POLICY_STRUCT SI_POLICY_PPI;
+
+#endif // _SI_POLICY_PPI_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
new file mode 100644
index 00..886415bdaa
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Product/Alderlake/Library/PeiSiPolicyLib/PeiSiPolicyLib.c
@@ -0,0 +1,47 @@
+/** @file
+  This file is PeiSiPolicyLib library creates default settings of RC
+  Policy and installs RC Policy PPI.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#include "PeiSiPolicyLibrary.h"
+#include 
+#include 
+
+
+/**
+  SiInstallPolicyReadyPpi installs SiPolicyReadyPpi.
+  While installed, RC assumes the Policy is ready and finalized. So please 
update and override
+  any setting before calling this function.
+
+  @retval EFI_SUCCESSThe policy is installed.
+  @retval EFI_OUT_OF_RESOURCES   Insufficient resources to create buffer
+**/
+EFI_STATUS
+EFIAPI
+SiInstallPolicyReadyPpi (
+  VOID
+  )
+{
+  EFI_STATUS Status;
+  EFI_PEI_PPI_DESCRIPTOR *SiPolicyReadyPpiDesc;
+
+  SiPolicyReadyPpiDesc = (EFI_PEI_PPI_DESCRIPTOR *) AllocateZeroPool (sizeof 
(EFI_PEI_PPI_DESCRIPTOR));
+  if (SiPolicyReadyPpiDesc == NULL) {
+ASSERT (FALSE);
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  SiPolicyReadyPpiDesc->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | 
EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+  SiPolicyReadyPpiDesc->Guid  = 
+  SiPo

[edk2-devel] [PATCH 07/10] AlderlakeSiliconPkg/Include: Add Protocol, Register, Other Includes

[Saloni Kasbekar]

Adds the following Includes:
  - Include/
  - Include/Protocol
  - Include/Register

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../AlderlakeSiliconPkg/Include/ConfigBlock.h |  53 +++
 .../AlderlakeSiliconPkg/Include/CpuPcieHob.h  |  48 +++
 .../Include/Protocol/IgdOpRegion.h|  22 ++
 .../Include/Protocol/Spi.h| 346 ++
 .../Include/Protocol/Wdt.h| 111 ++
 .../Include/Register/FlashRegs.h  |  73 
 .../Include/Register/GpioRegs.h   | 103 ++
 .../Include/Register/GpioRegsVer2.h   | 211 +++
 .../Include/Register/PchDmi14Regs.h   |  49 +++
 .../Include/Register/PchDmiRegs.h |  51 +++
 .../Include/Register/PchPcieRpRegs.h  |  45 +++
 .../Include/Register/PchRegsLpc.h |  77 
 .../Include/Register/PmcRegs.h| 134 +++
 .../Include/Register/RtcRegs.h|  44 +++
 .../Include/Register/TcoRegs.h|  71 
 .../Include/SerialIoDevices.h | 226 
 .../AlderlakeSiliconPkg/Include/SiConfigHob.h |  17 +
 .../Include/SiPolicyStruct.h  |  64 
 18 files changed, 1745 insertions(+)
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Protocol/IgdOpRegion.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Protocol/Spi.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Protocol/Wdt.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/FlashRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/GpioRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/GpioRegsVer2.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchDmi14Regs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchDmiRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchPcieRpRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PchRegsLpc.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Register/PmcRegs.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Register/RtcRegs.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Register/TcoRegs.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/SerialIoDevices.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/SiConfigHob.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/SiPolicyStruct.h

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h
new file mode 100644
index 00..2e609bc8d9
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Include/ConfigBlock.h
@@ -0,0 +1,53 @@
+/** @file
+  Header file for Config Block Lib implementation
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _CONFIG_BLOCK_H_
+#define _CONFIG_BLOCK_H_
+
+#include 
+#include 
+#include 
+#include 
+
+#pragma pack (push,1)
+
+///
+/// Config Block Header
+///
+typedef struct _CONFIG_BLOCK_HEADER {
+  EFI_HOB_GUID_TYPE GuidHob;  ///< Offset 0-23  GUID 
extension HOB header
+  UINT8 Revision; ///< Offset 24Revision 
of this config block
+  UINT8 Attributes;   ///< Offset 25The main 
revision for config block
+  UINT8 Reserved[2];  ///< Offset 26-27 Reserved 
for future use
+} CONFIG_BLOCK_HEADER;
+
+///
+/// Config Block
+///
+typedef struct _CONFIG_BLOCK {
+  CONFIG_BLOCK_HEADERHeader;  ///< Offset 0-27  Header of 
config block
+  //
+  // Config Block Data
+  //
+} CONFIG_BLOCK;
+
+///
+/// Config Block Table Header
+///
+typedef struct _CONFIG_BLOCK_TABLE_STRUCT {
+  CONFIG_BLOCK_HEADERHeader;  ///< Offset 0-27  GUID 
number for main entry of config block
+  UINT8  Rsvd0[2];///< Offset 28-29 Reserved 
for future use
+  UINT16 NumberOfBlocks;  ///< Offset 30-31 Number of 
config blocks (N)
+  UINT32 AvailableSize;   ///< Offset 32-35 Current 
config block table size
+///
+/// Individual Config Block Structures are added here in memory as part of 
AddConfigBlock()
+///
+} CONFIG_BLOCK_TABLE_HEADER;
+#pragma pack (pop)
+
+#endif // _CONFIG_BLOCK_H_
+
diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h
new file mode 100644
index 00..dccd6e7d7a
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Include/CpuPcieHob.h

[edk2-devel] [PATCH 09/10] AlderlakeSiliconPkg: Add AdlPch Fru and IncludePrivate modules

[Saloni Kasbekar]

Adds the following modules:
  - AdlPch/Include
  - AdlPch/IncludePrivate
  - AdlPch/Library
  - AdlPch DSCs
  - IncludePrivate

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Fru/AdlPch/CommonLib.dsc  |  29 ++
 .../AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc|  10 +
 .../AlderlakeSiliconPkg/Fru/AdlPch/DxeLib.dsc |   7 +
 .../Fru/AdlPch/Include/PchBdfAssignment.h |  81 +
 .../Fru/AdlPch/Include/PchLimits.h|  47 +++
 .../Fru/AdlPch/Include/PchPcieRpInfo.h|  17 ++
 .../Fru/AdlPch/Include/PchReservedResources.h |  13 +
 .../AdlPch/Include/PchReservedResourcesAdpP.h |  36 +++
 .../IncludePrivate/Register/PchPcrRegs.h  |  59 
 .../IncludePrivate/Register/PchRegsLpcAdl.h   |  30 ++
 .../PeiDxeSmmPchInfoLib/PchInfoLibAdl.c   | 223 ++
 .../PeiDxeSmmPchInfoLib/PchInfoLibPrivate.h   |  44 +++
 .../PeiDxeSmmPchInfoLibAdl.inf|  37 +++
 .../AlderlakeSiliconPkg/Fru/AdlPch/Pei.dsc|   7 +
 .../AlderlakeSiliconPkg/Fru/AdlPch/PeiLib.dsc |  12 +
 .../IncludePrivate/RegisterAccess.h   | 288 ++
 16 files changed, 940 insertions(+)
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/DxeLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchBdfAssignment.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchLimits.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchPcieRpInfo.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchReservedResources.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Include/PchReservedResourcesAdpP.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/IncludePrivate/Register/PchPcrRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/IncludePrivate/Register/PchRegsLpcAdl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PchInfoLibAdl.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PchInfoLibPrivate.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PeiDxeSmmPchInfoLibAdl.inf
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Pei.dsc
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/PeiLib.dsc
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IncludePrivate/RegisterAccess.h

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc
new file mode 100644
index 00..3f508f83a1
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/CommonLib.dsc
@@ -0,0 +1,29 @@
+## @file
+#  Component description file for the AlderLake PCH Common FRU libraries.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+  
PchPcrLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/Library/PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf
+  
PchSbiAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmPchSbiAccessLib/PeiDxeSmmPchSbiAccessLib.inf
+  
P2SbSidebandAccessLib|$(PLATFORM_SI_PACKAGE)/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmP2SbSidebandAccessLib/PeiDxeSmmP2SbSidebandAccessLib.inf
+
+  
EspiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Espi/Library/PeiDxeSmmEspiLib/PeiDxeSmmEspiLib.inf
+
+
+  
PmcLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
+  
PmcPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLib.inf
+  
SpiCommonLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
+  
GpioLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/PeiDxeSmmGpioLib.inf
+  
PchDmiLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf
+
+  
GpioPrivateLib|$(PLATFORM_SI_PACKAGE)/IpBlock/Gpio/LibraryPrivate/PeiDxeSmmGpioPrivateLib/PeiDxeSmmGpioPrivateLibVer2.inf
+  
PchPcieRpLib|$(PLATFORM_SI_PACKAGE)/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PeiDxeSmmPchPcieRpLibVer2.inf
+
+
+  #
+  # Common FRU Libraries
+  #
+  
PchInfoLib|$(PLATFORM_SI_PACKAGE)/Fru/AdlPch/Library/PeiDxeSmmPchInfoLib/PeiDxeSmmPchInfoLibAdl.inf
+
diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc 
b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc
new file mode 100644
index 00..b443611d9a
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Fru/AdlPch/Dxe.dsc
@@ -0,0 +1,10 @@
+## @file
+#  Component description file for the AlderLake PCH DXE FRU drivers.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent

[edk2-devel] [PATCH 04/10] AlderlakeSiliconPkg/IpBlock: Add Pmc, Spi components

[Saloni Kasbekar]

Adds the following modules:
  - IpBlock/Pmc/IncludePrivate
  - IpBlock/Pmc/Library
  - IpBlock/Pmc/LibraryPrivate
  - IpBlock/Spi/IncludePrivate
  - IpBlock/Spi/Library
  - IpBlock/Spi/LibraryPrivate
  - IpBlock/Spi/Smm

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../IncludePrivate/Library/PmcPrivateLib.h|   47 +
 .../IpBlock/Pmc/IncludePrivate/PmcSocConfig.h |   67 +
 .../PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf   |   38 +
 .../Pmc/Library/PeiDxeSmmPmcLib/PmcLib.c  |   50 +
 .../PeiDxeSmmPmcPrivateLib.inf|   43 +
 .../PeiDxeSmmPmcPrivateLib/PmcPrivateLib.c|   86 ++
 .../Spi/IncludePrivate/Library/SpiCommonLib.h |  376 ++
 .../Spi/IncludePrivate/Register/SpiRegs.h |  116 ++
 .../IpBlock/Spi/Library/PeiSpiLib/PchSpi.c|  209 +++
 .../Spi/Library/PeiSpiLib/PeiSpiLib.inf   |   41 +
 .../BaseSpiCommonLib/BaseSpiCommonLib.inf |   29 +
 .../BaseSpiCommonLib/SpiCommon.c  | 1127 +
 .../AlderlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c |  387 ++
 .../IpBlock/Spi/Smm/SpiSmm.inf|   46 +
 14 files changed, 2662 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PmcLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PmcPrivateLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Register/SpiRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Library/PeiSpiLib/PchSpi.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
new file mode 100644
index 00..6ec244b127
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/Library/PmcPrivateLib.h
@@ -0,0 +1,47 @@
+/** @file
+  Header file for private PmcLib.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PMC_PRIVATE_LIB_H_
+#define _PMC_PRIVATE_LIB_H_
+
+#include 
+#include "Register/PmcRegs.h"
+
+typedef enum {
+  PmcSwSmiRate1p5ms = 0,
+  PmcSwSmiRate16ms,
+  PmcSwSmiRate32ms,
+  PmcSwSmiRate64ms
+} PMC_SWSMI_RATE;
+
+/**
+  This function sets SW SMI Rate.
+
+  @param[in] SwSmiRateRefer to PMC_SWSMI_RATE for possible values
+**/
+VOID
+PmcSetSwSmiRate (
+  IN PMC_SWSMI_RATE  SwSmiRate
+  );
+
+typedef enum {
+  PmcPeriodicSmiRate8s = 0,
+  PmcPeriodicSmiRate16s,
+  PmcPeriodicSmiRate32s,
+  PmcPeriodicSmiRate64s
+} PMC_PERIODIC_SMI_RATE;
+
+/**
+  This function sets Periodic SMI Rate.
+
+  @param[in] PeriodicSmiRateRefer to PMC_PERIODIC_SMI_RATE for 
possible values
+**/
+VOID
+PmcSetPeriodicSmiRate (
+  IN PMC_PERIODIC_SMI_RATEPeriodicSmiRate
+  );
+
+#endif // _PMC_PRIVATE_LIB_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h
new file mode 100644
index 00..523a84a180
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Pmc/IncludePrivate/PmcSocConfig.h
@@ -0,0 +1,67 @@
+/** @file
+  PMC SoC configuration
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PMC_SOC_CONFIGURATION_H_
+#define _PMC_SOC_CONFIGURATION_H_
+
+typedef enum {
+  AdrSinglePhase = 0,
+  AdrDualPhase
+} ADR_PHASE_TYPE;
+
+typedef enum {
+  AdrGpioB = 0,
+  AdrGpioC
+} ADR_GPIO;
+
+typedef enum {
+  AdrOverPmSync = 0,
+  AdrOverDmi
+} ADR_MSG_INTERFACE;
+
+typedef struct {
+  BOOLEANSupported;
+  ADR_PHASE_TYPE AdrPhaseType;
+  ADR_GPIO   AdrGpio;
+  ADR_MSG_INTERFACE  AdrMsgInterface;
+  //
+  // On some designs ADR_GEN_CFG has been moved in the HW.

[edk2-devel] [PATCH 06/10] AlderlakeSiliconPkg/Include: Add Library, Pins, Ppi Includes

[Saloni Kasbekar]

Adds the following Includes:
  - Include/Library
  - Include/Pins
  - Include/Ppi

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/Library/ConfigBlockLib.h  |  64 +++
 .../Include/Library/EspiLib.h |  34 ++
 .../Include/Library/GpioConfig.h  | 372 ++
 .../Include/Library/GpioLib.h | 174 
 .../Include/Library/GpioNativeLib.h   | 135 +++
 .../Include/Library/GraphicsInfoLib.h |  46 +++
 .../Include/Library/MmPciLib.h|  27 ++
 .../Include/Library/PchPcieRpLib.h|  41 ++
 .../Include/Library/PchPcrLib.h   | 221 +++
 .../Library/PeiDxeSmmReserveMmio64SizeLib.h   |  21 +
 .../Include/Library/PeiSiPolicyUpdateLib.h| 154 
 .../Include/Library/PmcLib.h  |  40 ++
 .../Include/Library/ResetSystemLib.h  |  68 
 .../Include/Library/SecPlatformLib.h  |  81 
 .../Include/Library/SiConfigBlockLib.h|  56 +++
 .../Include/Library/SiPolicyLib.h |  39 ++
 .../Include/Library/SpiLib.h  |  21 +
 .../Include/Pins/GpioPinsVer2Lp.h |  36 ++
 .../Include/Ppi/FspmArchConfigPpi.h   |  32 ++
 .../Include/Ppi/PeiPreMemSiDefaultPolicy.h|  33 ++
 .../Include/Ppi/PeiSiDefaultPolicy.h  |  33 ++
 .../AlderlakeSiliconPkg/Include/Ppi/Spi.h |  29 ++
 .../AlderlakeSiliconPkg/Include/Ppi/Wdt.h |  22 ++
 23 files changed, 1779 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/EspiLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GpioConfig.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GpioLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GpioNativeLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/GraphicsInfoLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/MmPciLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PchPcieRpLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PchPcrLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PeiDxeSmmReserveMmio64SizeLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PeiSiPolicyUpdateLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/PmcLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ResetSystemLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SecPlatformLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SiConfigBlockLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SiPolicyLib.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Library/SpiLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Pins/GpioPinsVer2Lp.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/FspmArchConfigPpi.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/PeiPreMemSiDefaultPolicy.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/PeiSiDefaultPolicy.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/Spi.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Include/Ppi/Wdt.h

diff --git a/Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h
new file mode 100644
index 00..d9966c76e9
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Include/Library/ConfigBlockLib.h
@@ -0,0 +1,64 @@
+/** @file
+  Header file for Config Block Lib implementation
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _CONFIG_BLOCK_LIB_H_
+#define _CONFIG_BLOCK_LIB_H_
+
+/**
+  Create config block table
+
+  @param[in] TotalSize- Max size to be allocated for 
the Config Block Table
+  @param[out]ConfigBlockTableAddress  - On return, points to a pointer 
to the beginning of Config Block Table Address
+
+  @retval EFI_INVALID_PARAMETER - Invalid Parameter
+  @retval EFI_OUT_OF_RESOURCES  - Out of resources
+  @retval EFI_SUCCESS   - Successfully created Config Block Table at 
ConfigBlockTableAddress
+**/
+EFI_STATUS
+EFIAPI
+CreateConfigBlockTable (
+  IN UINT16TotalSize,
+  OUTVOID  **ConfigBlockTableAddress
+  );
+
+/**
+  Add config block into config block table structure
+
+  @param[in] ConfigBlockTableAddress  - A pointer to the beginning of 
Config Block Table Address
+  @param[out]ConfigBlockAddress   - On return, points to a pointer 
to the beginning of Config Block Address
+
+  @retval EFI_OUT_OF_RESOURCES

[edk2-devel] [PATCH 03/10] AlderlakeSiliconPkg/IpBlock: Add P2sb, PchDmi components

[Saloni Kasbekar]

Adds the following modules:
  - IpBlock/P2sb/IncludePrivate
  - IpBlock/P2sb/Library
  - IpBlock/P2sb/LibraryPrivate
  - IpBlock/PchDmi/IncludePrivate
  - IpBlock/PchDmi/LibraryPrivate

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/P2SbSidebandAccessLib.h   | 105 +++
 .../IncludePrivate/Library/PchSbiAccessLib.h  |  58 
 .../P2sb/IncludePrivate/P2SbController.h  |  32 +++
 .../P2sb/IncludePrivate/Register/P2sbRegs.h   |  53 
 .../Library/PeiDxeSmmPchPcrLib/PchPcrLib.c| 266 ++
 .../PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf |  35 +++
 .../PeiDxeSmmP2SbSidebandAccessLib.c  | 208 ++
 .../PeiDxeSmmP2SbSidebandAccessLib.inf|  30 ++
 .../PchSbiAccessLib.c |  72 +
 .../PeiDxeSmmPchSbiAccessLib.inf  |  35 +++
 .../PchDmi/IncludePrivate/Library/PchDmiLib.h |  60 
 .../PeiDxeSmmPchDmiLib/PchDmi14.c |  34 +++
 .../PeiDxeSmmPchDmiLib/PchDmi14.h |  22 ++
 .../PeiDxeSmmPchDmiLib/PchDmiLib.c| 110 
 .../PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf |  43 +++
 15 files changed, 1163 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/PchSbiAccessLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/P2SbController.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Register/P2sbRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/Library/PeiDxeSmmPchPcrLib/PchPcrLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/Library/PeiDxeSmmPchPcrLib/PeiDxeSmmPchPcrLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmP2SbSidebandAccessLib/PeiDxeSmmP2SbSidebandAccessLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmP2SbSidebandAccessLib/PeiDxeSmmP2SbSidebandAccessLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmPchSbiAccessLib/PchSbiAccessLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/LibraryPrivate/PeiDxeSmmPchSbiAccessLib/PeiDxeSmmPchSbiAccessLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/IncludePrivate/Library/PchDmiLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmi14.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmi14.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PchDmiLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PchDmi/LibraryPrivate/PeiDxeSmmPchDmiLib/PeiDxeSmmPchDmiLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
new file mode 100644
index 00..e364508eb4
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/P2sb/IncludePrivate/Library/P2SbSidebandAccessLib.h
@@ -0,0 +1,105 @@
+/** @file
+  Header for P2SbSidebandAccessLib
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _P2SB_SIDEBAND_ACCESS_LIB_H_
+#define _P2SB_SIDEBAND_ACCESS_LIB_H_
+
+#include 
+#include 
+#include  // For PCH_SBI_PID definition
+
+typedef PCH_SBI_PID  P2SB_PID;
+
+typedef enum {
+  P2SbMemory = 0,
+  P2SbPciConfig,
+  P2SbPrivateConfig
+} P2SB_REGISTER_SPACE;
+
+typedef enum {
+  MemoryRead = 0x0,
+  MemoryWrite= 0x1,
+  PciConfigRead  = 0x4,
+  PciConfigWrite = 0x5,
+  PrivateControlRead = 0x6,
+  PrivateControlWrite= 0x7,
+  GpioLockUnlock = 0x13
+} P2SB_SBI_OPCODE;
+
+typedef enum {
+  SBI_SUCCESSFUL  = 0,
+  SBI_UNSUCCESSFUL= 1,
+  SBI_POWERDOWN   = 2,
+  SBI_MIXED   = 3,
+  SBI_INVALID_RESPONSE
+} P2SB_SBI_RESPONSE;
+
+typedef enum {
+  P2SbMmioAccess = 0,
+  P2SbMsgAccess
+} P2SB_SIDEBAND_ACCESS_METHOD;
+
+/**
+  REGISTER_ACCESS for P2SB device to support access to sideband registers.
+  Be sure to keep first member of this structure as REGISTER_ACCESS to allow
+  for correct casting between caller who sees this structure as REGISTER_ACCESS
+  and calle who will cast it to P2SB_SIDEBAND_REGISTER_ACCESS.
+**/
+typedef struct {
+  REGISTER_ACCESS  Access;
+  P2SB_SIDEBAND_ACCESS_METHOD  AccessMethod;
+  P2SB_PID P2SbPid;
+  UINT16   Fid;
+  P2SB_REGISTER_SPACE  RegisterSpace;
+  BOOLEAN  PostedWrites;
+  P2SB_CONTROLLER

[edk2-devel] [PATCH 02/10] AlderlakeSiliconPkg/IpBlock: Add Graphics, HostBridge, PcieRp components

[Saloni Kasbekar]

Adds the following modules:
  - IpBlock/Graphics/Include
  - IpBlock/Graphics/IncludePrivate
  - IpBlock/Graphics/Library
  - IpBlock/Graphics/LibraryPrivate
  - IpBlock/HostBridge/IncludePrivate
  - IpBlock/PcieRp/Library

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/Ppi/GraphicsPlatformPolicyPpi.h   |  76 +++
 .../Library/DxeGraphicsPolicyLib.h|  71 +++
 .../Library/DxeIgdOpRegionInitLib.h   | 115 +
 .../GraphicsInfoLibVer1.c |  52 
 .../GraphicsInfoLibVer1.inf   |  33 +
 .../DxeGraphicsPolicyLib.c| 116 +
 .../DxeGraphicsPolicyLib.inf  |  36 ++
 .../DxeIgdOpRegionInit.c  | 119 ++
 .../DxeIgdOpRegionInitLib.inf |  47 +++
 .../IncludePrivate/HostBridgeDataHob.h|  25 
 .../PchPcieRpLibInternal.h|  20 +++
 .../PeiDxeSmmPchPcieRpLib/PchPcieRpLibVer2.c  |  71 +++
 .../PeiDxeSmmPchPcieRpLibVer2.inf |  37 ++
 13 files changed, 818 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/IncludePrivate/Library/DxeGraphicsPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/IncludePrivate/Library/DxeIgdOpRegionInitLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Library/PeiDxeSmmGraphicsInfoLib/GraphicsInfoLibVer1.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Library/PeiDxeSmmGraphicsInfoLib/GraphicsInfoLibVer1.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeGraphicsPolicyLib/DxeGraphicsPolicyLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeGraphicsPolicyLib/DxeGraphicsPolicyLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeIgdOpRegionInitLib/DxeIgdOpRegionInit.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/LibraryPrivate/DxeIgdOpRegionInitLib/DxeIgdOpRegionInitLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/HostBridge/IncludePrivate/HostBridgeDataHob.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PchPcieRpLibInternal.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PchPcieRpLibVer2.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/PcieRp/Library/PeiDxeSmmPchPcieRpLib/PeiDxeSmmPchPcieRpLibVer2.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
new file mode 100644
index 00..a8f67061a5
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Graphics/Include/Ppi/GraphicsPlatformPolicyPpi.h
@@ -0,0 +1,76 @@
+/** @file
+  The PEI_GRAPHICS_PLATFORM_POLICY_PPI provides platform information to PEI 
Graphics PEIM.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PEI_GRAPHICS_PLATFORM_POLICY_PPI_H_
+#define _PEI_GRAPHICS_PLATFORM_POLICY_PPI_H_
+
+/**
+  Globally unique identifier for PEI platform policy PPI.
+**/
+#define PEI_GRAPHICS_PLATFORM_POLICY_PPI_GUID \
+{ \
+  0x4eabcd09, 0x43d3, 0x4b4d, { 0xb7, 0x3d, 0x43, 0xc8, 0xd9, 0x89, 0x99, 0x5 
} \
+}
+
+#define PEI_GRAPHICS_PLATFORM_POLICY_REVISION 1
+
+/**
+Pre-declaration of PEI graphics platform policy PPI.
+**/
+typedef struct _PEI_GRAPHICS_PLATFORM_POLICY_PPI 
PEI_GRAPHICS_PLATFORM_POLICY_PPI;
+
+/**
+  Enum defining the different lid status values
+**/
+typedef enum {
+  LidClosed,
+  LidOpen,
+  LidStatusMax
+} LID_STATUS;
+
+/**
+  This function gets the platform lid status for LFP displays.
+
+  @param[out] CurrentLidStatus  Output variable to store the lid status.
+
+  @retval EFI_SUCCESS   Correct lid status is returned.
+  @retval EFI_UNSUPPORTED   Platform does not support lid.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *GET_PLATFORM_LID_STATUS) (
+  OUT LID_STATUS  *CurrentLidStatus
+  );
+
+/**
+  This function gets the base address of loaded VBT.
+
+  @param[out] VbtAddressStarting address of the VBT is returned in this 
parameter.
+  @param[out] VbtSize   Size of the VBT is returned in this parameter.
+
+  @retval EFI_SUCCESS   If the VBT is loaded and parameters contain valid 
values.
+  @return Other error codes meaning VBT is not loaded and parameters 
contain invalid values.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *GET_VBT_DATA) (
+  OUT EFI_PHYSICAL_ADDRESS *VbtAddress,
+  OUT UINT32   *VbtSize

[edk2-devel] [PATCH 01/10] AlderlakeSiliconPkg/IpBlock: Add CpuPcieRp, Espi, Gpio components

[Saloni Kasbekar]

Adds the following modules:
  - IpBlock/CpuPcieRp/Include
  - IpBlock/Espi/Library
  - IpBlock/Gpio/IncludePrivate
  - IpBlock/Gpio/Library
  - IpBlock/Gpio/LibraryPrivate

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../IpBlock/CpuPcieRp/Include/CpuPcieInfo.h   |  25 +
 .../Espi/Library/PeiDxeSmmEspiLib/EspiLib.c   |  58 ++
 .../PeiDxeSmmEspiLib/PeiDxeSmmEspiLib.inf |  38 ++
 .../IncludePrivate/Library/GpioHelpersLib.h   |  50 ++
 .../IncludePrivate/Library/GpioNativePads.h   | 245 
 .../IncludePrivate/Library/GpioPrivateLib.h   | 350 +++
 .../Gpio/Library/PeiDxeSmmGpioLib/GpioInit.c  | 546 ++
 .../Gpio/Library/PeiDxeSmmGpioLib/GpioLib.c   | 522 +
 .../Library/PeiDxeSmmGpioLib/GpioLibrary.h|  29 +
 .../Library/PeiDxeSmmGpioLib/GpioNativeLib.c  | 177 ++
 .../PeiDxeSmmGpioLib/PeiDxeSmmGpioLib.inf |  44 ++
 .../BaseGpioHelpersLibNull.c  |  51 ++
 .../BaseGpioHelpersLibNull.inf|  25 +
 .../GpioNativePrivateLibInternal.h|  48 ++
 .../PeiDxeSmmGpioPrivateLib/GpioPrivateLib.c  | 267 +
 .../GpioPrivateLibPch.c   | 172 ++
 .../GpioPrivateLibVer2.c  |  81 +++
 .../PeiDxeSmmGpioPrivateLibVer2.inf   |  40 ++
 .../PeiGpioHelpersLib/PeiGpioHelpersLib.c | 218 +++
 .../PeiGpioHelpersLib/PeiGpioHelpersLib.inf   |  46 ++
 20 files changed, 3032 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/CpuPcieRp/Include/CpuPcieInfo.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Espi/Library/PeiDxeSmmEspiLib/EspiLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Espi/Library/PeiDxeSmmEspiLib/PeiDxeSmmEspiLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/IncludePrivate/Library/GpioHelpersLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/IncludePrivate/Library/GpioNativePads.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/IncludePrivate/Library/GpioPrivateLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/GpioInit.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/GpioLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/GpioLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/GpioNativeLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/Library/PeiDxeSmmGpioLib/PeiDxeSmmGpioLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/BaseGpioHelpersLibNull/BaseGpioHelpersLibNull.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/BaseGpioHelpersLibNull/BaseGpioHelpersLibNull.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/PeiDxeSmmGpioPrivateLib/GpioNativePrivateLibInternal.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/PeiDxeSmmGpioPrivateLib/GpioPrivateLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/PeiDxeSmmGpioPrivateLib/GpioPrivateLibPch.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/PeiDxeSmmGpioPrivateLib/GpioPrivateLibVer2.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/PeiDxeSmmGpioPrivateLib/PeiDxeSmmGpioPrivateLibVer2.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/PeiGpioHelpersLib/PeiGpioHelpersLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Gpio/LibraryPrivate/PeiGpioHelpersLib/PeiGpioHelpersLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/CpuPcieRp/Include/CpuPcieInfo.h 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/CpuPcieRp/Include/CpuPcieInfo.h
new file mode 100644
index 00..a6f8b16d10
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/CpuPcieRp/Include/CpuPcieInfo.h
@@ -0,0 +1,25 @@
+/** @file
+  This file contains definitions of PCIe controller information
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _CPU_PCIE_INFO_H_
+#define _CPU_PCIE_INFO_H_
+
+#define PCIE_HWEQ_COEFFS_MAX5
+
+
+//
+// SA PCI Express* Port configuration
+//
+
+#define CPU_PCIE_MAX_ROOT_PORTS4
+#define CPU_PCIE_MAX_CONTROLLERS   3
+
+#define SA_PEG_MAX_FUN   0x04
+#define SA_PEG_MAX_LANE  0x14
+
+
+
+#endif
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Espi/Library/PeiDxeSmmEspiLib/EspiLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Espi/Library/PeiDxeSmmEspiLib/EspiLib.c
new file mode 100644
index 00..2e4d1375ca
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/IpBlock/Espi/Library

[edk2-devel] [PATCH 4/4] Maintainers.txt: Add maintainers

[Saloni Kasbekar]

Add AlderlakeSiliconPkg and AlderlakeOpenBoardPkg maintainers

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 Maintainers.txt | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index d1d7613ef4..936304d608 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -245,6 +245,13 @@ M: Sai Chaganty 
 M: Nate DeSimone 
 R: Heng Luo 
 
+Platform/Intel/AlderlakeOpenBoardPkg
+F: Platform/Intel/AlderlakeOpenBoardPkg/
+M: Sai Chaganty 
+M: Nate DeSimone 
+R: Rosen Chuang 
+R: Saloni Kasbekar 
+
 Platform/Intel/WhitleyOpenBoardPkg
 F: Platform/Intel/WhitleyOpenBoardPkg/
 M: Isaac Oram 
@@ -316,6 +323,13 @@ M: Sai Chaganty 
 M: Nate DeSimone 
 R: Heng Luo 
 
+Platform/Intel/AlderlakeSiliconPkg
+F: Platform/Intel/AlderlakeSiliconPkg/
+M: Sai Chaganty 
+M: Nate DeSimone 
+R: Rosen Chuang 
+R: Saloni Kasbekar 
+
 Silicon/Intel/WhitleySiliconPkg
 F: Silicon/Intel/WhitleySiliconPkg/
 M: Isaac Oram 
-- 
2.36.1.windows.1



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[edk2-devel] [PATCH 1/4] AlderlakeOpenBoardPkg/AlderlakePRvp: Add DSC and build files

[Saloni Kasbekar]

Adds the DSC and build files necessary to build the
AlderlakePRvp board instance.

Key files:
  * build_config.cfg - Board-specific build configuration file.
  * OpenBoardPkg.dsc - The AlderlakePRvp board description file.
  * OpenBoardPkgPcd.dsc - Used for other PCD customization.
  * OpenBoardPkg.fdf - The AlderlakePRvp board flash file.
  * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values.
  * FlashMapInclude.fdf - AlderlakePRvp flash map file.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/Fdf/FlashMapInclude.fdf   |  52 ++
 .../AlderlakePRvp/OpenBoardPkg.dsc| 481 
 .../AlderlakePRvp/OpenBoardPkg.fdf| 724 ++
 .../AlderlakePRvp/OpenBoardPkgBuildOption.dsc | 161 
 .../AlderlakePRvp/OpenBoardPkgPcd.dsc | 371 +
 .../AlderlakePRvp/build_config.cfg|  34 +
 6 files changed, 1823 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgBuildOption.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/build_config.cfg

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
new file mode 100644
index 00..03c198c06a
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
@@ -0,0 +1,52 @@
+## @file
+#  FDF file of Platform.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+#=#
+# 16 MB BIOS - for FSP wrapper
+#=#
+DEFINE FLASH_BASE   = 
0xFF00  #
+DEFINE FLASH_SIZE   = 
0x0100  #
+DEFINE FLASH_BLOCK_SIZE = 
0x0001  #
+DEFINE FLASH_NUM_BLOCKS = 
0x0100  #
+#=#
+
+#=#
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = 
0x  # Flash addr (0xFF00)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize   = 
0x0006  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = 
0x  # Flash addr (0xFF00)
+SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize  = 
0x0002E000  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset   = 
0x0002E000  # Flash addr (0xFF02E000)
+SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize= 
0x2000  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 
0x0003  # Flash addr (0xFF03)
+SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize  = 
0x0003  #
+
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset= 
0x000E  # Flash addr (0xFF0E)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize  = 
0x0031  #
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset   = 
0x003F  # Flash addr (0xFF40)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 
0x0036  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset= 
0x0075  # Flash addr (0xFF76)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize  = 
0x0009  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset  = 
0x007E  # Flash addr (0xFF7F)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize= 
0x000A  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset= 
0x0088  # Flash addr (0xFF86)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize  = 
0x0018  #
+
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset   = 
0x00A0  # Flash addr (0xFFA0)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 
0x0008  # Keep 0x8 or larger
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset  = 
0x00A8  # Flash addr (0xFFA8)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize= 
0x0023

[edk2-devel] [PATCH 2/4] Enable build for AlderlakeOpenBoardPkg

[Saloni Kasbekar]

This change adds the configuration to enable build for AlderlakePRvp.
Also it updates Alderlake P Rvp details to the Readme.md.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 Platform/Intel/Readme.md | 11 +++
 Platform/Intel/build.cfg |  1 +
 2 files changed, 12 insertions(+)

diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md
index 953260852d..112d0af1f6 100644
--- a/Platform/Intel/Readme.md
+++ b/Platform/Intel/Readme.md
@@ -59,6 +59,7 @@ A UEFI firmware implementation using MinPlatformPkg is 
constructed using the fol
 * The `WhiskeylakeOpenBoardPkg` contains board implementations for WhiskeyLake 
systems.
 * The `CometlakeOpenBoardPkg` contains board implementations for CometLake 
systems.
 * The `TigerlakeOpenBoardPkg` contains board implementations for TigerLake 
systems.
+* The `AlderlakeOpenBoardPkg` contains board implementations for AlderLake 
systems.
 * The `WhitleyOpenBoardPkg` contains board implementations for Ice Lake-SP and 
Cooper Lake systems.
 
 ### **Supported Hardware**
@@ -87,6 +88,7 @@ A UEFI firmware implementation using MinPlatformPkg is 
constructed using the fol
 | WHL-U DDR4 RVP| WhiskeyLake  
  | WhiskeylakeOpenBoardPkg  | WhiskeylakeURvp|
 | CML-U LPDDR3 RVP  | CometLake V1 
  | CometlakeOpenBoardPkg| CometlakeURvp  |
 | TGL-U DDR4 RVP| TigerLake
  | TigerlakeOpenBoardPkg| TigerlakeURvp  |
+| ADL-P DDR5 RVP| AlderLake
  | AlderlakeOpenBoardPkg| AlderlakePRvp  |
 | Wilson City RVP   | IceLake-SP (Xeon Scalable)   
  | WhitleyOpenBoardPkg  | WilsonCityRvp  |
 | Cooper City RVP   | Copper Lake  
  | WhitleyOpenBoardPkg  | CooperCityRvp  |
 
@@ -316,6 +318,11 @@ return back to the minimum platform caller.
   |   ||   |---build_config.cfg: TigerlakeURvp 
specific build
   |   || settings 
environment variables.
   |   ||
+  |   ||--AlderlakeOpenBoardPkg
+  |   ||   |--AlderlakePRvp
+  |   ||   |---build_config.cfg: AlderlakePRvp 
specific build
+  |   || settings 
environment variables.
+  |   ||
   |--FSP
   
 
@@ -401,6 +408,10 @@ For PurleyOpenBoardPkg (TiogaPass)
 1. This firmware project has been tested booting to Microsoft Windows 10 x64 
with AHCI mode and Integrated Graphic Device.
 2. This firmware project has been also tested booting to Puppy Linux 
BionicPup64 8.0 with AHCI mode and Integrated Graphic Device.
 
+**AlderlakeOpenBoardPkg**
+1. This firmware project has been tested booting to Microsoft Windows 11 x64 
with M2 SSD Disk and Integrated Graphic Device.
+2. AlderlakeOpenBoardPkg/Acpi/MinDsdt has been modified from 
MinPlatformPkg/Acpi/MinDsdt to avoid hang on boot to Microsoft Windows 11 x64.
+
 **WhitleyOpenBoardPkg**
 1. This firmware project has been tested booting to UEFI shell with headless 
serial console
 
diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg
index fe0ddb7a1e..2ff536bb3e 100644
--- a/Platform/Intel/build.cfg
+++ b/Platform/Intel/build.cfg
@@ -70,3 +70,4 @@ WilsonCityRvp = 
WhitleyOpenBoardPkg/WilsonCityRvp/build_config.cfg
 BoardTiogaPass = PurleyOpenBoardPkg/BoardTiogaPass/build_config.cfg
 JunctionCity = WhitleyOpenBoardPkg/JunctionCity/build_config.cfg
 Aowanda = WhitleyOpenBoardPkg/Aowanda/build_config.cfg
+AlderLakePRvp = AlderLakeOpenBoardPkg/AlderLakePRvp/build_config.cfg
-- 
2.36.1.windows.1



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[edk2-devel] [PATCH 3/4] Readme.md: Add AlderlakeOpenBoardPkg

[Saloni Kasbekar]

Add AlderlakeOpenBoardPkg in the Readme

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 Readme.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Readme.md b/Readme.md
index 624f9a6da6..8de9eaa7cf 100644
--- a/Readme.md
+++ b/Readme.md
@@ -254,6 +254,7 @@ they will be documented with the platform.
 * [Comet Lake](Platform/Intel/CometlakeOpenBoardPkg)
 * [Tiger Lake](Platform/Intel/TigerlakeOpenBoardPkg)
 * [Whitley/Cedar Island](Platform/Intel/WhitleyOpenBoardPkg)
+* [Alder Lake](Platform/Intel/AlderlakeOpenBoardPkg)
 
 For more information, see the
 [EDK II Minimum Platform 
Specification](https://edk2-docs.gitbooks.io/edk-ii-minimum-platform-specification).
-- 
2.36.1.windows.1



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Re: [edk2-devel] [PATCH] NetworkPkg: Increase HTTP buffer size and enable TCP window scaling

[Saloni Kasbekar]

Mike,

Could you help us merge the patch?

Thanks,
Saloni

-Original Message-
From: Li, Yi1  
Sent: Wednesday, September 6, 2023 1:52 AM
To: Kasbekar, Saloni ; devel@edk2.groups.io
Cc: Otcheretianski, Andrei ; Clark-williams, 
Zachary ; Luo, Heng 
Subject: RE: [PATCH] NetworkPkg: Increase HTTP buffer size and enable TCP 
window scaling

Hi Saloni and Zachary, can you help to merge this patch?  It got reviewed-by 
but not check-in, Thanks!

-Original Message-
From: Kasbekar, Saloni  
Sent: Tuesday, July 25, 2023 12:18 PM
To: Li, Yi1 ; devel@edk2.groups.io
Cc: Otcheretianski, Andrei ; Clark-williams, 
Zachary 
Subject: RE: [PATCH] NetworkPkg: Increase HTTP buffer size and enable TCP 
window scaling

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: Li, Yi1  
Sent: Thursday, July 20, 2023 10:18 PM
To: devel@edk2.groups.io
Cc: Li, Yi1 ; Otcheretianski, Andrei 
; Kasbekar, Saloni 
; Clark-williams, Zachary 

Subject: [PATCH] NetworkPkg: Increase HTTP buffer size and enable TCP window 
scaling

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4505
This gives something like ~3 fold throughput boost.

Signed-off-by: Andrei Otcheretianski 
Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 
---
 NetworkPkg/HttpBootDxe/HttpBootClient.h |  2 +-
 NetworkPkg/HttpDxe/HttpProto.c  | 48 +
 NetworkPkg/HttpDxe/HttpProto.h  |  2 +-
 3 files changed, 27 insertions(+), 25 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.h 
b/NetworkPkg/HttpBootDxe/HttpBootClient.h
index 2fba713679..86a28bc91a 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootClient.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootClient.h
@@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent  #ifndef 
__EFI_HTTP_BOOT_HTTP_H__  #define __EFI_HTTP_BOOT_HTTP_H__
 
-#define HTTP_BOOT_BLOCK_SIZE   1500
+#define HTTP_BOOT_BLOCK_SIZE   32000
 #define HTTP_USER_AGENT_EFI_HTTP_BOOT  "UefiHttpBoot/1.0"
 #define HTTP_BOOT_AUTHENTICATION_INFO_MAX_LEN  255
 
diff --git a/NetworkPkg/HttpDxe/HttpProto.c b/NetworkPkg/HttpDxe/HttpProto.c 
index 33ae622c3f..7dfb82dd2e 100644
--- a/NetworkPkg/HttpDxe/HttpProto.c
+++ b/NetworkPkg/HttpDxe/HttpProto.c
@@ -1073,18 +1073,19 @@ HttpConfigureTcp4 (
   Tcp4AP->ActiveFlag  = TRUE;
   IP4_COPY_ADDRESS (>RemoteAddress, >RemoteAddr);
 
-  Tcp4Option= Tcp4CfgData->ControlOption;
-  Tcp4Option->ReceiveBufferSize = HTTP_BUFFER_SIZE_DEAULT;
-  Tcp4Option->SendBufferSize= HTTP_BUFFER_SIZE_DEAULT;
-  Tcp4Option->MaxSynBackLog = HTTP_MAX_SYN_BACK_LOG;
-  Tcp4Option->ConnectionTimeout = HTTP_CONNECTION_TIMEOUT;
-  Tcp4Option->DataRetries   = HTTP_DATA_RETRIES;
-  Tcp4Option->FinTimeout= HTTP_FIN_TIMEOUT;
-  Tcp4Option->KeepAliveProbes   = HTTP_KEEP_ALIVE_PROBES;
-  Tcp4Option->KeepAliveTime = HTTP_KEEP_ALIVE_TIME;
-  Tcp4Option->KeepAliveInterval = HTTP_KEEP_ALIVE_INTERVAL;
-  Tcp4Option->EnableNagle   = TRUE;
-  Tcp4CfgData->ControlOption= Tcp4Option;
+  Tcp4Option  = Tcp4CfgData->ControlOption;
+  Tcp4Option->ReceiveBufferSize   = HTTP_BUFFER_SIZE_DEAULT;
+  Tcp4Option->SendBufferSize  = HTTP_BUFFER_SIZE_DEAULT;
+  Tcp4Option->MaxSynBackLog   = HTTP_MAX_SYN_BACK_LOG;
+  Tcp4Option->ConnectionTimeout   = HTTP_CONNECTION_TIMEOUT;
+  Tcp4Option->DataRetries = HTTP_DATA_RETRIES;
+  Tcp4Option->FinTimeout  = HTTP_FIN_TIMEOUT;
+  Tcp4Option->KeepAliveProbes = HTTP_KEEP_ALIVE_PROBES;
+  Tcp4Option->KeepAliveTime   = HTTP_KEEP_ALIVE_TIME;
+  Tcp4Option->KeepAliveInterval   = HTTP_KEEP_ALIVE_INTERVAL;
+  Tcp4Option->EnableNagle = TRUE;
+  Tcp4Option->EnableWindowScaling = TRUE;
+  Tcp4CfgData->ControlOption  = Tcp4Option;
 
   if ((HttpInstance->State == HTTP_STATE_TCP_CONNECTED) ||
   (HttpInstance->State == HTTP_STATE_TCP_CLOSED)) @@ -1156,17 +1157,18 @@ 
HttpConfigureTcp6 (
   IP6_COPY_ADDRESS (>StationAddress, 
>Ipv6Node.LocalAddress);
   IP6_COPY_ADDRESS (>RemoteAddress, >RemoteIpv6Addr);
 
-  Tcp6Option= Tcp6CfgData->ControlOption;
-  Tcp6Option->ReceiveBufferSize = HTTP_BUFFER_SIZE_DEAULT;
-  Tcp6Option->SendBufferSize= HTTP_BUFFER_SIZE_DEAULT;
-  Tcp6Option->MaxSynBackLog = HTTP_MAX_SYN_BACK_LOG;
-  Tcp6Option->ConnectionTimeout = HTTP_CONNECTION_TIMEOUT;
-  Tcp6Option->DataRetries   = HTTP_DATA_RETRIES;
-  Tcp6Option->FinTimeout= HTTP_FIN_TIMEOUT;
-  Tcp6Option->KeepAliveProbes   = HTTP_KEEP_ALIVE_PROBES;
-  Tcp6Option->KeepAliveTime = HTTP_KEEP_ALIVE_TIME;
-  Tcp6Option->KeepAliveInterval = HTTP_KEEP_ALIVE_INTERVAL;
-  Tcp6Option->EnableNagle   = TRUE;
+  Tcp6Option  = Tcp6CfgData->ControlOption;
+  Tcp6Option->ReceiveBufferSize   = HTTP_BUFFER_SIZE_DEAULT;
+  Tcp6Option->SendBufferSiz

[edk2-devel] [PATCH v2 2/7] AlderlakeSiliconPkg: Add Cpu modules

[Saloni Kasbekar]

Add Cpu/Include, Cpu/IncludePrivate and Cpu/Library

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Cpu/Include/ConfigBlock/CpuConfig.h   |  86 
 .../ConfigBlock/CpuConfigLibPreMemConfig.h| 195 ++
 .../ConfigBlock/CpuSecurityPreMemConfig.h |  63 ++
 .../AlderlakeSiliconPkg/Cpu/Include/CpuRegs.h |  63 ++
 .../Cpu/Include/Library/CpuPlatformLib.h  |  42 
 .../Cpu/Include/Register/CommonMsr.h  |  60 ++
 .../IncludePrivate/Library/CpuInfoFruLib.h|  64 ++
 .../CpuPlatformLibrary.c  |  55 +
 .../CpuPlatformLibrary.h  |  25 +++
 .../PeiDxeSmmCpuPlatformLib.inf   |  41 
 10 files changed, 694 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfigLibPreMemConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuSecurityPreMemConfig.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/CpuRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Library/CpuPlatformLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Register/CommonMsr.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/IncludePrivate/Library/CpuInfoFruLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/CpuPlatformLibrary.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/CpuPlatformLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/PeiDxeSmmCpuPlatformLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
new file mode 100644
index 00..9815f8b185
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
@@ -0,0 +1,86 @@
+/** @file
+  CPU Config Block.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _CPU_CONFIG_H_
+#define _CPU_CONFIG_H_
+
+#define CPU_CONFIG_REVISION 1
+
+extern EFI_GUID gCpuConfigGuid;
+
+#pragma pack (push,1)
+
+/**
+  CPU Configuration Structure.
+
+  Revision 1:
+  - Initial version.
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  UINT32MicrocodePatchRegionSize;
+  EFI_PHYSICAL_ADDRESS  MicrocodePatchAddress;///< Pointer to microcode 
patch that is suitable for this processor.
+  /**
+Enable or Disable Advanced Encryption Standard (AES) feature.
+For some countries, this should be disabled for legal reasons.
+-0: Disable
+- 1: Enable
+  **/
+  UINT32 AesEnable   : 1;
+  /**
+Enable or Disable Trusted Execution Technology (TXT) feature.
+-0: Disable
+- 1: Enable
+  **/
+  UINT32 TxtEnable   : 1;
+  UINT32 SkipMpInit  : 1; ///< For Fsp only, Silicon 
Initialization will skip MP Initialization (including BSP) if enabled. For 
non-FSP, this should always be 0.
+  /**
+Enable or Disable or Auto for PPIN Support to view Protected Processor 
Inventory Number.
+- 0: Disable
+-1: Enable
+-2: Auto : Feature is based on End Of Manufacturing (EOM) flag. If EOM 
is set, it is disabled.
+  **/
+  UINT32 PpinSupport : 2;
+  /**
+Enable or Disable #AC machine check on split lock.
+- 0: Disable
+-1: Enable
+  **/
+  UINT32 AcSplitLock : 1;
+  /**
+  Enable or Disable Avx.
+  -  1: Disable
+  -   0: Enable
+  **/
+  UINT32 AvxDisable  : 1;
+  /**
+  @deprecated
+  Enable or Disable Avx3.
+  -   1: Disable
+  -  0: Enable
+  **/
+  UINT32 Avx3Disable : 1;
+  /**
+Enable or Disable X2APIC Support.
+- 0: Disable
+-1: Enable
+  **/
+  UINT32 X2ApicSupport   : 1;
+  UINT32 RsvdBits: 23;///< Reserved for future use
+  /**
+Provide the option for platform to override the MaxSpeed field of Smbios 
Type 4.
+Value 4000 means 4000MHz.
+If this value is not zero, it dominates the field.
+If this value is zero, CPU RC will update the field according to the max 
radio.
+default is 0.
+  **/
+  UINT16 SmbiosType4MaxSpeedOverride;
+  UINT8  Reserved0[2];///< Reserved for future use
+} CPU_CONFIG;
+
+#pragma pack (pop)
+
+#endif // _CPU_CONFIG_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfigLibPreMemConfig.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfigLibPreMemConfig.h
new file mode 100644
index 00..68d4effe3f
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Incl

[edk2-devel] [PATCH v2 3/7] AlderlakeSiliconPkg/Pch: Add include headers

[Saloni Kasbekar]

Adds the following header files:
* Pch/Include

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/ConfigBlock/PchGeneralConfig.h|  86 
 .../Pch/Include/Library/PchCycleDecodingLib.h |  59 ++
 .../Pch/Include/Library/PchInfoDefs.h |  19 ++
 .../Pch/Include/Library/PchInfoLib.h  | 108 ++
 .../Pch/Include/Library/PchPciBdfLib.h| 187 ++
 .../Pch/Include/PchPolicyCommon.h |  30 +++
 .../Pch/Include/PchPreMemPolicyCommon.h   |  53 +
 .../Pch/Include/PchResetPlatformSpecific.h|  21 ++
 .../Pch/Include/Protocol/PchAcpiSmiDispatch.h | 134 +
 .../Pch/Include/Protocol/PchPcieSmiDispatch.h | 166 
 .../Pch/Include/Protocol/PchSmiDispatch.h | 132 +
 .../Include/Protocol/PchSmmIoTrapControl.h|  65 ++
 .../Protocol/PchSmmPeriodicTimerControl.h |  65 ++
 .../Pch/Include/Protocol/PchTcoSmiDispatch.h  | 150 ++
 .../Pch/Include/Protocol/SmmSmbus.h   |  13 ++
 .../Pch/Include/Register/PchRegs.h|  45 +
 16 files changed, 1333 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchCycleDecodingLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchInfoDefs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchInfoLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchPciBdfLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchPolicyCommon.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchPreMemPolicyCommon.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchResetPlatformSpecific.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchAcpiSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchPcieSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmmIoTrapControl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmmPeriodicTimerControl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchTcoSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/SmmSmbus.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Register/PchRegs.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
new file mode 100644
index 00..4501537fe2
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
@@ -0,0 +1,86 @@
+/** @file
+  PCH General policy
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_GENERAL_CONFIG_H_
+#define _PCH_GENERAL_CONFIG_H_
+
+
+extern EFI_GUID gPchGeneralConfigGuid;
+extern EFI_GUID gPchGeneralPreMemConfigGuid;
+
+#pragma pack (push,1)
+
+enum PCH_RESERVED_PAGE_ROUTE {
+  PchReservedPageToLpc,   ///< Port 80h cycles are sent to LPC.
+  PchReservedPageToPcie   ///< Port 80h cycles are sent to 
PCIe.
+};
+
+/**
+  PCH General Configuration
+  Revision 1:  - Initial version.
+  Revision 2:  - Added AcpiL6dPmeHandling
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  /**
+This member describes whether or not the Compatibility Revision ID (CRID) 
feature
+of PCH should be enabled. 0: Disable; 1: Enable
+  **/
+  UINT32Crid:  1;
+  /**
+Set to enable low latency of legacy IO.
+Some systems require lower IO latency irrespective of power.
+This is a tradeoff between power and IO latency.
+@note: Once this is enabled, DmiAspm, Pcie DmiAspm in SystemAgent
+and ITSS Clock Gating are forced to disabled.
+0: Disable, 1: Enable
+  **/
+  UINT32LegacyIoLowLatency  :  1;
+  /**
+  Enables _L6D ACPI handler.
+  PME GPE is shared by multiple devices So BIOS must verify the same in the 
ASL handler by reading offset for PMEENABLE and PMESTATUS bit
+  0: Disable, 1: Enable
+  **/
+  UINT32AcpiL6dPmeHandling  :  1;
+  UINT32RsvdBits0   : 29;   ///< Reserved bits
+} PCH_GENERAL_CONFIG;
+
+/**
+  PCH General Pre-Memory Configuration
+  Revision 1:  - Initial version.
+  Revision 2:  - Added GpioOverride.
+  Revision 3:  - Added IoeDebugEn, PmodeClkEn
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  /**
+Control where the Port 80h cycles are sent,

[edk2-devel] [PATCH v2 4/7] AlderlakeSiliconPkg/Pch: Add libraries

[Saloni Kasbekar]

Adds the following libraries:
- BasePchPciBdfLib
- BaseResetSystemLib
- PeiDxeSmmPchCycleDecodingLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePchPciBdfLib/BasePchPciBdfLib.inf |  32 ++
 .../Library/BasePchPciBdfLib/PchPciBdfLib.c   | 308 ++
 .../BaseResetSystemLib/BaseResetSystemLib.c   | 114 +++
 .../BaseResetSystemLib/BaseResetSystemLib.inf |  37 +++
 .../PchCycleDecodingLib.c | 194 +++
 .../PeiDxeSmmPchCycleDecodingLib.inf  |  41 +++
 6 files changed, 726 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BaseResetSystemLib/BaseResetSystemLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BaseResetSystemLib/BaseResetSystemLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PeiDxeSmmPchCycleDecodingLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
new file mode 100644
index 00..e65f564c1b
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
@@ -0,0 +1,32 @@
+## @file
+# PCH PCIe Bus Device Function Library.
+#
+# All functions from this library are available in PEI, DXE, and SMM,
+# But do not support UEFI RUNTIME environment call.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+INF_VERSION = 0x00010017
+BASE_NAME = PeiDxeSmmPchPciBdfLib
+FILE_GUID = A36363FC-2951-4DCF-AC81-16F4ED3FDA47
+VERSION_STRING = 1.0
+MODULE_TYPE = BASE
+LIBRARY_CLASS = PchPciBdfLib
+
+[LibraryClasses]
+BaseLib
+IoLib
+DebugLib
+PciSegmentLib
+PchInfoLib
+PchPcieRpLib
+
+[Packages]
+MdePkg/MdePkg.dec
+AlderlakeSiliconPkg/SiPkg.dec
+
+[Sources]
+PchPciBdfLib.c
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
new file mode 100644
index 00..c26625e2eb
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
@@ -0,0 +1,308 @@
+/** @file
+  PCH PCIe Bus Device Function Library.
+  All functions from this library are available in PEI, DXE, and SMM,
+  But do not support UEFI RUNTIME environment call.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Check if a Device is present for PCH FRU
+  If the data is defined for PCH RFU return it
+  If the data is not defined (Device is NOT present) assert.
+
+  @param[in]  DataToCheck   Device or Function number to check
+
+  @retval Device or Function number value if defined for PCH FRU
+  0xFF if not present in PCH FRU
+**/
+UINT8
+CheckAndReturn (
+  UINT8 DataToCheck
+  )
+{
+  if (DataToCheck == NOT_PRESENT) {
+ASSERT (FALSE);
+  }
+  return DataToCheck;
+}
+
+/**
+  Get P2SB PCI device number
+
+  @retval PCI dev number
+**/
+UINT8
+P2sbDevNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_P2SB);
+}
+
+/**
+  Get P2SB PCI function number
+
+  @retval PCI fun number
+**/
+UINT8
+P2sbFuncNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_P2SB);
+}
+
+/**
+  Get P2SB controller address that can be passed to the PCI Segment Library 
functions.
+
+  @retval P2SB controller address in PCI Segment Library representation
+**/
+UINT64
+P2sbPciCfgBase (
+  VOID
+  )
+{
+  return PCI_SEGMENT_LIB_ADDRESS (
+   DEFAULT_PCI_SEGMENT_NUMBER_PCH,
+   DEFAULT_PCI_BUS_NUMBER_PCH,
+   P2sbDevNumber (),
+   P2sbFuncNumber (),
+   0
+   );
+}
+
+
+
+/**
+  Returns PCH SPI Device number
+
+  @retval UINT8   PCH SPI Device number
+**/
+UINT8
+SpiDevNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SPI);
+}
+
+/**
+  Returns PCH SPI Function number
+
+  @retval UINT8   PCH SPI Function number
+**/
+UINT8
+SpiFuncNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SPI);
+}
+
+/**
+  Returns PCH SPI PCI Config Space base address
+
+  @retval  UINT64  PCH SPI Config Space base address
+**/
+UINT64
+SpiPciCfgBase (
+  VOID
+  )
+{
+  return PCI_SEGMENT_LIB_ADDRESS (
+   DEFAULT_PCI_SEGMENT_NUMBER_PCH,
+   DEFAULT_PCI_BUS_NUMBER_PCH,
+   SpiDevNumber

[edk2-devel] [PATCH v2 7/7] AlderlakeSiliconPkg/SystemAgent: Add library and driver modules

[Saloni Kasbekar]

Adds the following modules:
- Library/DxeSaPolicyLib
- SaInit

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/DxeSaPolicyLib/DxeSaPolicyLib.c   | 225 ++
 .../Library/DxeSaPolicyLib/DxeSaPolicyLib.inf |  46 
 .../DxeSaPolicyLib/DxeSaPolicyLibrary.h   |  30 +++
 .../SystemAgent/SaInit/Dxe/SaInit.c   |  97 
 .../SystemAgent/SaInit/Dxe/SaInit.h   |  42 
 .../SystemAgent/SaInit/Dxe/SaInitDxe.c|  87 +++
 .../SystemAgent/SaInit/Dxe/SaInitDxe.h|  97 
 .../SystemAgent/SaInit/Dxe/SaInitDxe.inf  |  90 +++
 8 files changed, 714 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInit.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInit.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
new file mode 100644
index 00..d812f300c1
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
@@ -0,0 +1,225 @@
+/** @file
+  This file provide services for DXE phase policy default initialization
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "DxeSaPolicyLibrary.h"
+#include 
+#include 
+#include "MemoryConfig.h"
+
+extern EFI_GUID gMemoryDxeConfigGuid;
+
+/**
+  This function prints the SA DXE phase policy.
+
+  @param[in] SaPolicy - SA DXE Policy protocol
+**/
+VOID
+SaPrintPolicyProtocol (
+  IN  SA_POLICY_PROTOCOL  *SaPolicy
+  )
+{
+  UINT8   ControllerIndex;
+  UINT8   ChannelIndex;
+  EFI_STATUS  Status;
+  MEMORY_DXE_CONFIG   *MemoryDxeConfig;
+
+  Status = GetConfigBlock ((VOID *) SaPolicy, , (VOID 
*));
+  ASSERT_EFI_ERROR (Status);
+
+
+  DEBUG_CODE_BEGIN ();
+  INTN  i;
+
+  DEBUG ((DEBUG_INFO, "\n SA Policy (DXE) print BEGIN 
-\n"));
+  DEBUG ((DEBUG_INFO, "Revision : %x\n", 
SaPolicy->TableHeader.Header.Revision));
+  ASSERT (SaPolicy->TableHeader.Header.Revision == 
SA_POLICY_PROTOCOL_REVISION);
+
+  DEBUG ((DEBUG_INFO, " SA_MEMORY_CONFIGURATION 
-\n"));
+
+  DEBUG ((DEBUG_INFO, " SpdAddressTable[%d] :", 4));
+  for (i = 0; i < 4; i++) {
+DEBUG ((DEBUG_INFO, " %x", MemoryDxeConfig->SpdAddressTable[i]));
+  }
+  DEBUG ((DEBUG_INFO, "\n"));
+
+  for (ControllerIndex = 0; ControllerIndex < MEM_CFG_MAX_CONTROLLERS; 
ControllerIndex++) {
+for (ChannelIndex = 0; ChannelIndex < MEM_CFG_MAX_CHANNELS; 
ChannelIndex++) {
+  DEBUG ((DEBUG_INFO, " SlotMap[%d][%d] : 0x%x\n", ControllerIndex, 
ChannelIndex, MemoryDxeConfig->SlotMap[ControllerIndex][ChannelIndex]));
+}
+  }
+  DEBUG ((DEBUG_INFO, " MrcTimeMeasure  : %x\n", 
MemoryDxeConfig->MrcTimeMeasure));
+  DEBUG ((DEBUG_INFO, " MrcFastBoot : %x\n", 
MemoryDxeConfig->MrcFastBoot));
+
+  DEBUG ((DEBUG_INFO, " CPU_PCIE_CONFIGURATION 
-\n"));
+  DEBUG ((DEBUG_INFO, " PegAspm[%d] :", SA_PEG_MAX_FUN));
+  DEBUG ((DEBUG_INFO, " PegRootPortHPE[%d] :", SA_PEG_MAX_FUN));
+  DEBUG ((DEBUG_INFO, "\n"));
+
+
+  DEBUG ((DEBUG_INFO, "\n SA Policy (DXE) print END 
-\n"));
+  DEBUG_CODE_END ();
+
+  return;
+}
+
+/**
+  Load DXE Config block default
+
+  @param[in] ConfigBlockPointer Pointer to config block
+**/
+VOID
+LoadMemoryDxeDefault (
+  IN VOID*ConfigBlockPointer
+  )
+{
+  UINT8ControllerIndex;
+  UINT8ChannelIndex;
+  MEMORY_DXE_CONFIG*MemoryDxeConfig;
+
+  MemoryDxeConfig = ConfigBlockPointer;
+  ///
+  /// Initialize the Memory Configuration
+  ///
+  ///
+  /// DIMM SMBus addresses info
+  /// Refer to the SpdAddressTable[] mapping rule in DxeSaPolicyLibrary.h
+  ///
+  MemoryDxeConfig->SpdAddressTable = AllocateZeroPool (sizeof (UINT8) * 4);
+  ASSERT (MemoryDxeConfig->SpdAddress

[edk2-devel] [PATCH v2 6/7] AlderlakeSiliconPkg/SystemAgent: Add include headers

[Saloni Kasbekar]

Adds the following header files:
* SystemAgent/Include

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/ConfigBlock/MemoryDxeConfig.h | 126 ++
 .../ConfigBlock/SaMiscPeiPreMemConfig.h   | 112 +
 .../Include/Library/DxeSaPolicyLib.h  |  58 +
 .../Include/Library/PeiSaPolicyLib.h  |  13 ++
 .../SystemAgent/Include/MemInfoHob.h  | 220 ++
 .../SystemAgent/Include/Protocol/SaPolicy.h   |  54 +
 .../SystemAgent/Include/SaDataHob.h   |  28 +++
 7 files changed, 611 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/SaMiscPeiPreMemConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Library/DxeSaPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Library/PeiSaPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/MemInfoHob.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Protocol/SaPolicy.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/SaDataHob.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
new file mode 100644
index 00..eca0c2f1ba
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
@@ -0,0 +1,126 @@
+/** @file
+  Memory DXE Policy definitions
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _MEMORY_DXE_CONFIG_H_
+#define _MEMORY_DXE_CONFIG_H_
+
+#pragma pack(push, 1)
+
+/**
+ Making any setup structure change after code frozen
+ will need to maintain backward compatibility, bump up
+ structure revision and update below history table\n
+  Revision 1:  - Initial version.
+**/
+#define MEMORY_DXE_CONFIG_REVISION 2
+
+typedef struct _MEMORY_DXE_CONFIG  MEMORY_DXE_CONFIG;
+
+/**
+  Retrieves the OEM custom string for the SMBIOS Type 17 Table DeviceLocator 
field.
+  Implementation of this function is optional, if this function pointer is 
NULL then
+  the reference implementation of DeviceLocator will be used.
+
+  @param[in]  This  A pointer to this instance of 
MEMORY_DXE_CONFIG.
+  @param[in]  ControllerDesired Controller to get a 
DeviceLocator string for.
+  @param[in]  Dimm  Desired DIMM to get a 
DeviceLocator string for.
+  @param[in]  MdSocket  0 = Memory Down, 1 = Socketed.
+
+  @retval   The DeviceLocator string
+  @retval NULL  If the return value is NULL, the 
default value will be used.
+**/
+typedef
+CHAR8*
+(EFIAPI *MEMORY_DXE_CONFIG_GET_DEVICE_LOCATOR_STRING)(
+  IN CONSTMEMORY_DXE_CONFIG   *This,
+  IN  UINT8   Controller,
+  IN  UINT8   Dimm,
+  IN  UINT8   MdSocket
+  );
+
+/**
+  Retrieves the OEM custom string for the SMBIOS Type 17 Table BankLocator 
field.
+  Implementation of this function is optional, if this function pointer is 
NULL then
+  the reference implementation of DeviceLocator will be used.
+
+  @param[in]  This  A pointer to this instance of 
MEMORY_DXE_CONFIG.
+  @param[in]  ControllerDesired Controller to get a 
BankLocator string for.
+  @param[in]  Dimm  Desired DIMM to get a BankLocator 
string for.
+  @param[in]  MdSocket  0 = Memory Down, 1 = Socketed.
+
+  @retval   The BankLocator string
+  @retval NULL  If the return value is NULL, the 
default value will be used.
+**/
+typedef
+CHAR8*
+(EFIAPI *MEMORY_DXE_CONFIG_GET_BANK_LOCATOR_STRING)(
+  IN CONSTMEMORY_DXE_CONFIG   *This,
+  IN  UINT8   Controller,
+  IN  UINT8   Dimm,
+  IN  UINT8   MdSocket
+  );
+
+/**
+  The Memory Configuration includes DIMM SPD address Map and DIMM Slot 
Mechanical present bit map.
+  The data elements should be initialized by a Platform Module.\n
+  Revision 1:
+  - Initial version.
+**/
+struct _MEMORY_DXE_CONFIG {
+  CONFIG_BLOCK_HEADER   Header;   ///< Offset 0-27: Config 
Block Header
+/**
+  Offset 28:
+  Dimm SPD address
+  Only Server support 2 channels * 3 slots per channel = 6 sockets totally
+  The Desktop and mobile only support 2 channels * 2 slots per channel = 4 
sockets totally
+  So there is mapping rule here for Desktop and mobile that there are no more 
4 DIMMS totally in a system:
+Channel A/ Slo

[edk2-devel] [PATCH v2 1/7] AlderlakeSiliconPkg: Add package and library instances

[Saloni Kasbekar]

Create the AlderlakeSiliconPkg to provide an initial package for
silicon initialization code for Alder Lake (ADL) products. Add the
following libraries -
- BasePciSegmentMultiSegLibPci
- BaseSiConfigBlockLib
- PeiPostMemSiliconPolicyInitLib
- PeiPreMemSiliconPolicyInitLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePciSegmentMultiSegLibPci.inf  |  37 ++
 .../BasePciSegmentMultiSegLibPci.uni  |  14 +
 .../PciSegmentLib.c   | 597 ++
 .../BaseSiConfigBlockLib.c|  87 +++
 .../BaseSiConfigBlockLib.inf  |  32 +
 .../PeiPostMemSiliconPolicyInitLib.c  |  94 +++
 .../PeiPostMemSiliconPolicyInitLib.inf|  36 ++
 .../PeiPreMemSiliconPolicyInitLib.c   |  98 +++
 .../PeiPreMemSiliconPolicyInitLib.inf |  36 ++
 9 files changed, 1031 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/PciSegmentLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiConfigBlockLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiConfigBlockLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPostMemSiliconPolicyInitLib/PeiPostMemSiliconPolicyInitLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPostMemSiliconPolicyInitLib/PeiPostMemSiliconPolicyInitLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPreMemSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPreMemSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
new file mode 100644
index 00..f3764d0187
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
@@ -0,0 +1,37 @@
+## @file
+# Instance of PCI Segment Library based on PCI Library.
+#
+# PCI Segment Library that layers on top of the PCI Library which only
+#  supports segment 0 and segment 1 PCI configuration access.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BasePciSegmentMultiSegLibPci
+  MODULE_UNI_FILE= BasePciSegmentMultiSegLibPci.uni
+  FILE_GUID  = AC65B409-DF03-466e-8D2B-6FCE1079F0B2
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PciSegmentLib
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = IA32 X64 IPF EBC
+#
+
+[Sources]
+  PciSegmentLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  AlderlakeSiliconPkg/SiPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PciLib
+  DebugLib
+  PcdLib
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
new file mode 100644
index 00..dd8d74bee8
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
@@ -0,0 +1,14 @@
+// /** @file
+// Instance of PCI Segment Library based on PCI Library.
+//
+// PCI Segment Library that layers on top of the PCI Library which only
+//  supports segment 0 and segment 1 PCI configuration access.
+//
+//   Copyright (c) 2022, Intel Corporation. All rights reserved.
+//   SPDX-License-Identifier: BSD-2-Clause-Patent
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "Instance of PCI 
Segment Library based on PCI Library."
+
+#string STR_MODULE_DESCRIPTION  #language en-US "PCI Segment Library 
that layers on top of the PCI Library which only supports segment 0 and segment 
1 PCI configuration access."
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/PciSegmentLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/PciSegmentLib.c
new file mode 100644
index 00..9bcb388016
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/PciSegmentLib.c
@@ -0,0 +1,597 @@
+/** @file
+  PCI Segment Library that layers on top of t

[edk2-devel] [PATCH v2 6/6] AlderlakeOpenBoardPkg: Add Library Instances

[Saloni Kasbekar]

Adds the following libraries
- BasePlatformHookLib
- PeiBoardConfigLib
- PeiGetFvInfoLib
- SmmSpiFlashCommonLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePlatformHookLib/BasePlatformHookLib.c |  38 
 .../BasePlatformHookLib.inf   |  44 
 .../PeiBoardConfigLib/PeiBoardConfigLib.c | 136 +++
 .../PeiBoardConfigLib/PeiBoardConfigLib.inf   |  56 +
 .../Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c |  89 
 .../PeiGetFvInfoLib/PeiGetFvInfoLib.inf   |  34 +++
 .../SmmSpiFlashCommonLib.inf  |  49 
 .../SmmSpiFlashCommonLib/SpiFlashCommon.c | 215 ++
 .../SpiFlashCommonSmmLib.c|  60 +
 9 files changed, 721 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
new file mode 100644
index 00..cccb1e18cc
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
@@ -0,0 +1,38 @@
+/** @file
+  Platform Hook Library instances
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+
+/**
+  Performs platform specific initialization required for the CPU to access
+  the hardware associated with a SerialPortLib instance.  This function does
+  not initialize the serial port hardware itself.  Instead, it initializes
+  hardware devices that are required for the CPU to access the serial port
+  hardware.  This function may be called more than once.
+
+  @retval RETURN_SUCCESS   The platform specific initialization succeeded.
+  @retval RETURN_DEVICE_ERROR  The platform specific initialization could not 
be completed.
+
+**/
+RETURN_STATUS
+EFIAPI
+PlatformHookSerialPortInitialize (
+  VOID
+  )
+{
+
+  //
+  // Enable I/O decoding for COM1(3F8h-3FFh), COM2(2F8h-2FFh), I/O port 
2Eh/2Fh, 4Eh/4Fh, 60h/64Fh and 62h/66h.
+  //
+  PchLpcIoDecodeRangesSet (PcdGet16 (PcdLpcIoDecodeRange));
+  PchLpcIoEnableDecodingSet (PcdGet16 (PchLpcIoEnableDecoding));
+
+  return RETURN_SUCCESS;
+}
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
new file mode 100644
index 00..b77724d5ab
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
@@ -0,0 +1,44 @@
+### @file
+# Platform Hook Library instance for Alderlake Mobile/Desktop CRB.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+  INF_VERSION= 0x00010017
+  BASE_NAME  = BasePlatformHookLib
+  FILE_GUID  = E22ADCC6-ED90-4A90-9837-C8E7FF9E963D
+  VERSION_STRING = 1.0
+  MODULE_TYPE= BASE
+  LIBRARY_CLASS  = PlatformHookLib
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC
+#
+
+[LibraryClasses]
+  BaseLib
+  IoLib
+  PciSegmentLib
+  PciLib
+  PchCycleDecodingLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MinPlatformPkg/MinPlatformPkg.dec
+  AlderlakeOpenBoardPkg/OpenBoardPkg.dec
+  AlderlakeSiliconPkg/SiPkg.dec
+
+[Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress## CONSUMES
+
+[FixedPcd]
+  gBoardModuleTokenSpaceGuid.PcdLpcIoDecodeRange   ## CONSUMES
+  gBoardModuleTokenSpaceGuid.PchLpcIoEnableDecoding## CONSUMES
+
+[Sources]
+  BasePlatformHookLib.c
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library

[edk2-devel] [PATCH v2 4/6] AlderlakeOpenBoardPkg: Add ACPI module

[Saloni Kasbekar]

Adds the MinDsdt driver

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Acpi/MinDsdt/MinDsdt.asl  |  68 +
 .../Acpi/MinDsdt/MinDsdt.c| 232 ++
 .../Acpi/MinDsdt/MinDsdt.inf  |  48 
 3 files changed, 348 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.asl
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.inf

diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.asl 
b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.asl
new file mode 100644
index 00..be110145bc
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.asl
@@ -0,0 +1,68 @@
+/** @file
+  ACPI minimum DSDT table
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+DefinitionBlock (
+  "DSDT.aml",
+  "DSDT",
+  0x01, // DSDT revision.
+// A Revision field value greater than or equal to 2 signifies that 
integers
+// declared within the Definition Block are to be evaluated as 64-bit 
values
+  "INTEL ",   // OEM ID (6 byte string)
+  "MIN ",// OEM table ID  (8 byte string)
+  0x00 // OEM version of DSDT table (4 byte Integer)
+)
+
+// BEGIN OF ASL SCOPE
+{
+  Scope(\_SB) {
+  //---
+  // Begin PCI tree object scope
+  //---
+Device(PCI0) { // PCI Bridge "Host Bridge"
+  Name(_HID, EISAID("PNP0A08")) // Indicates PCI Express/PCI-X Mode2 host 
hierarchy
+  Name(_CID, EISAID("PNP0A03")) // To support legacy OS that doesn't 
understand the new HID
+  Name(_SEG, 0)
+  Method(^BN00, 0){ return(0x) }  // Returns default Bus number for 
Peer PCI busses. Name can be overriden with control method placed directly 
under Device scope
+  Method(_BBN, 0){ return(BN00()) } // Bus number, optional for the Root 
PCI Bus
+  Name(_UID, 0x)  // Unique Bus ID, optional
+  Name(BUF0,ResourceTemplate()
+  {
+//
+// PCI Configuration Registers ( 0x0CF8 - 0x0CFF )
+//
+Io(Decode16,0x0CF8,0x0CF8,1,0x08)
+//
+// PCI MMIO space
+//
+DWordMemory(ResourceProducer,PosDecode,MinFixed,MaxFixed,NonCacheable,
+  ReadWrite,0x00,0x00,0x00,0x00,0x00,,,PM01)
+  })
+  Method(_CRS,0,Serialized)
+  {
+//
+// Create pointers to Memory Sizing values.
+//
+CreateDwordField(BUF0, ^PM01._MIN,M1MN)
+CreateDwordField(BUF0, ^PM01._MAX,M1MX)
+CreateDwordField(BUF0, ^PM01._LEN,M1LN)
+
+//
+// Set Memory Size Values. TLUD represents bits 31:20 of phyical
+// TOM, so shift these bits into the correct position and fix up
+// the Memory Region available to PCI.
+//
+Subtract 
(FixedPcdGet32(PcdPciReservedMemLimit),FixedPcdGet32(PcdPciReservedMemBase),M1LN)
+Store (FixedPcdGet32(PcdPciReservedMemBase), M1MN)
+Subtract (FixedPcdGet32(PcdPciReservedMemLimit), 1, M1MX)
+
+Return(BUF0)
+  }
+}
+  }
+}// End of ASL File
+
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.c 
b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.c
new file mode 100644
index 00..08709a43cd
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Acpi/MinDsdt/MinDsdt.c
@@ -0,0 +1,232 @@
+/** @file
+  Min DSDT Driver
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+//
+// Function implementations
+//
+
+/**
+  Locate the first instance of a protocol.  If the protocol requested is an
+  FV protocol, then it will return the first FV that contains the ACPI table
+  storage file.
+
+  @param[in]  Protocol   The protocol to find.
+  @param[in]  FfsGuidThe FFS that contains the ACPI table.
+  @param[out] Instance   Return pointer to the first instance of the 
protocol.
+
+  @retval EFI_SUCCESS   The function completed successfully.
+  @retval EFI_NOT_FOUND The protocol could not be located.
+  @retval EFI_OUT_OF_RESOURCES  There are not enough resources to find the 
protocol.
+**/
+EFI_STATUS
+LocateSupportProtocol (
+  IN EFI_GUID  *Protocol,
+  IN EFI_GUID  *FfsGuid,
+ OUT VOID  **Instance
+  )
+{
+  EFI_STATUS  Status;
+  EFI_HANDLE 

[edk2-devel] [PATCH v2 5/6] AlderlakeOpenBoardPkg: Adds the Policy Module

[Saloni Kasbekar]

Adds the following libraries within the Policy module
- DxeSiliconPolicyUpdateLib
- PeiPolicyUpdateLib
- PeiSiliconPolicyUpdateLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../DxeSaPolicyInit.c |  64 +++
 .../DxeSiliconPolicyUpdateLate.c  |  78 
 .../DxeSiliconPolicyUpdateLib.inf |  53 +++
 .../PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c   | 114 +
 .../PeiPolicyUpdateLib/PeiCpuPolicyUpdate.h   |  31 ++
 .../PeiCpuPolicyUpdatePreMem.c|  93 +
 .../PeiPolicyUpdateLib/PeiPchPolicyUpdate.c   | 210 ++
 .../PeiPolicyUpdateLib/PeiPchPolicyUpdate.h   |  24 ++
 .../PeiPchPolicyUpdatePreMem.c| 124 ++
 .../PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 208 ++
 .../PeiPolicyUpdateLib/PeiSaPolicyUpdate.c| 214 ++
 .../PeiPolicyUpdateLib/PeiSaPolicyUpdate.h|  27 ++
 .../PeiSaPolicyUpdatePreMem.c | 389 ++
 .../PeiSiliconPolicyUpdateLib.inf |  65 +++
 .../PeiSiliconPolicyUpdatePostMem.c   |  39 ++
 .../PeiSiliconPolicyUpdatePreMem.c|  37 ++
 16 files changed, 1770 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSiliconPolicyUpdateLate.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSiliconPolicyUpdateLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdatePreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdatePreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiSaPolicyUpdate.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiSaPolicyUpdate.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiSaPolicyUpdatePreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdatePostMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdatePreMem.c

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.c
new file mode 100644
index 00..da2f568e07
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.c
@@ -0,0 +1,64 @@
+/** @file
+  This file initialises and Installs GopPolicy Protocol.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+EFI_STATUS
+EFIAPI
+CreateSaDxeConfigBlocks (
+  IN OUT  VOID  **SaPolicy
+  );
+
+EFI_STATUS
+EFIAPI
+SaInstallPolicyProtocol (
+  IN  EFI_HANDLE  ImageHandle,
+  IN  VOID*SaPolicy
+  );
+
+/**
+  Initialize SA DXE Policy
+
+  @param[in] ImageHandle  Image handle of this driver.
+
+  @retval EFI_SUCCESS Initialization complete.
+  @retval EFI_UNSUPPORTED The chipset is unsupported by this driver.
+  @retval EFI_OUT_OF_RESOURCESDo not have enough resources to initialize 
the driver.
+  @retval EFI_DEVICE_ERRORDevice error, driver exits abnormally.
+**/
+EFI_STATUS
+EFIAPI
+SaPolicyInitDxe (
+  IN EFI_HANDLE   ImageHandle
+  )
+{
+  EFI_STATUS   Status;
+  SA_POLICY_PROTOCOL   *SaPolicy;
+
+  //
+  // Call CreateSaDxeConfigBlocks to create & initialize platform policy 
structure
+  // and get all Intel default policy settings.
+  //
+  Status = CreateSaDxeConfigBlocks ();
+  DEBUG ((DEBUG_INFO, "SaPolicy->TableHeader.NumberOfBlocks = 0x%x\n ", 
SaPolicy->TableHeader.NumberOfBlocks));
+  ASSERT_EFI_ERROR (Status);
+
+  //
+  // Install SaInstallPolicyProtocol.
+  //

[edk2-devel] [PATCH v2 2/6] AlderlakeOpenBoardPkg: Add modules

[Saloni Kasbekar]

Adds the following modules:
-BiosInfo
-OpenBoardPlatformInit
-SBCVpdStructurePcd

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 196 +++
 .../BiosInfo/BiosInfo.inf |  84 +++
 .../OpenBoardPlatformInitPostMem.c| 233 ++
 .../OpenBoardPlatformInitPostMem.inf  |  75 ++
 .../SBCVpdStructurePcd/AllStructPCD.dsc   |  19 ++
 .../GpioTableAdlPPostMem.dsc  |  40 +++
 .../GpioTableAdlPPreMem.dsc   |  29 +++
 .../MrcDqDqsSPD/AdlPSpdMap.dsc| 138 +++
 .../PcieClocks/AdlPPcieClocks.dsc |  31 +++
 9 files changed, 845 insertions(+)
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitPei/OpenBoardPlatformInitPostMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitPei/OpenBoardPlatformInitPostMem.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/AllStructPCD.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/GpioTableAdlPPostMem.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/GpioTableAdlPPreMem.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/MrcDqDqsSPD/AdlPSpdMap.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/PcieClocks/AdlPPcieClocks.dsc

diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c 
b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..64462900de
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,196 @@
+/** @file
+  PEIM to provide BiosInfo structure listing up all firmware volume's base 
addresses, sizes,
+  attributes, and information associated to the firmware volume.
+  Primarily the structure is used on FIT table creation and Bpm.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define BASE_FV_SIZE 10
+
+#define FSP_WRAPPER_FV_SIZE 3
+
+#define TSN_MAC_ADDRESS_FV_SIZE 0
+
+#define BIOS_INFO_STRUCT_SIZE (BASE_FV_SIZE + FSP_WRAPPER_FV_SIZE + 
TSN_MAC_ADDRESS_FV_SIZE)
+
+
+/*
+  BIOS_INFO structure is the base of the firmware volume layout for Intel 
platform BIOS implementation
+  so security checker module can run based on the structure and throw 
warnings, error or deadloop
+  when any unexpected firmware volumes are detected.
+
+  BIOS_INFO is recommended to support full entries of firmware volumes present 
in a flash
+  with right type, attribute, version, flash map base address and size,
+  all associated information which is defined by BIOS_INFO_STRUCT structure.
+  - IBB firmware volumes, which are expected to be measured or/and verified
+by hardware base security solution to meet SecureBoot chain of trust
+(Intel BootGuard for example), have attribute 0x0.
+  - Post IBB firmware volumes, which are expected to be measured or/and 
verified
+by BIOS (TCG code for measurement, RSA2048SHA256Sign algorithm for 
verification for example),
+have attribute BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB.
+  - Else, follows Firmware Interface Table specification.
+*/
+#pragma pack (1)
+typedef struct {
+  BIOS_INFO_HEADER  Header;
+  BIOS_INFO_STRUCT  Entry[BIOS_INFO_STRUCT_SIZE];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO  mBiosInfo = {
+  {
+BIOS_INFO_SIGNATURE,
+BIOS_INFO_STRUCT_SIZE,
+0,
+  },
+  {
+{
+  FIT_TYPE_07_BIOS_STARTUP_MODULE,
+  BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+  0x0100,
+  FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32 
(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32 
(PcdFlashNvStorageFtwSpareSize),
+  FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+},
+{
+  FIT_TYPE_07_BIOS_STARTUP_MODULE,
+  BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+  0x0100,
+  FixedPcdGet32 (PcdFlashFvAdvancedSize),
+  FixedPcdGet32 (PcdFlashFvAdvancedBase)
+},
+{
+  FIT_TYPE_07_BIOS_STARTUP_MODULE,
+  BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+  0x0100,
+  FixedPcdGet32 (PcdFlashFvOptionalSize),
+  FixedPcdGet32 (PcdFlashFvOptionalBase)
+},
+{
+  FIT_TYPE_07_BIOS_STARTUP_MODULE,
+  BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+  0x0100,
+  FixedPcdGet32 (PcdFlashFvSecuritySize),
+  FixedPcdGet32 (PcdFlashFvSecurityBase)
+},
+{
+  FIT_TYPE_07_BIOS_STARTUP_MODULE

[edk2-devel] [PATCH v2 3/6] AlderlakeOpenBoardPkg/AlderlakePRvp: Add libraries

[Saloni Kasbekar]

Adds the following library instances:
- BoardAcpiLib
- BoardInitLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../SmmAlderlakePRvpAcpiEnableLib.c   |  50 +
 .../SmmMultiBoardAcpiSupportLib.c |  88 
 .../SmmMultiBoardAcpiSupportLib.inf   |  41 
 .../BoardAcpiLib/SmmSiliconAcpiEnableLib.c| 134 
 .../BoardInitLib/Pei/BoardPchInitPreMemLib.c  | 104 +
 .../BoardInitLib/Pei/BoardSaConfigPreMem.h|  73 +++
 .../BoardInitLib/Pei/BoardSaInitPreMemLib.c   | 160 ++
 .../Library/BoardInitLib/Pei/PeiDetect.c  |  62 ++
 .../BoardInitLib/Pei/PeiInitPostMemLib.c  | 100 +
 .../BoardInitLib/Pei/PeiInitPreMemLib.c   | 202 ++
 .../Pei/PeiMultiBoardInitPostMemLib.c |  45 
 .../Pei/PeiMultiBoardInitPostMemLib.inf   |  53 +
 .../Pei/PeiMultiBoardInitPreMemLib.c  |  89 
 .../Pei/PeiMultiBoardInitPreMemLib.inf| 149 +
 14 files changed, 1350 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmAlderlakePRvpAcpiEnableLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardPchInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardSaConfigPreMem.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardSaInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiDetect.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiInitPostMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPostMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPostMemLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPreMemLib.inf

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmAlderlakePRvpAcpiEnableLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmAlderlakePRvpAcpiEnableLib.c
new file mode 100644
index 00..8dfc04c5f5
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmAlderlakePRvpAcpiEnableLib.c
@@ -0,0 +1,50 @@
+/** @file
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Enable Board Acpi
+
+  @param[in]  EnableSci Enable SCI if EnableSci parameters is True.
+
+  @retval EFI_SUCCESS   The function always return successfully.
+**/
+EFI_STATUS
+EFIAPI
+AdlBoardEnableAcpi (
+  IN BOOLEAN  EnableSci
+  )
+{
+  // enable additional board register
+  return EFI_SUCCESS;
+}
+
+/**
+  Disable Board Acpi
+
+  @param[in]  DisableSciDisable SCI if DisableSci parameters is True.
+
+  @retval EFI_SUCCESS   The function always return successfully.
+**/
+EFI_STATUS
+EFIAPI
+AdlBoardDisableAcpi (
+  IN BOOLEAN  DisableSci
+  )
+{
+  // enable additional board register
+  return EFI_SUCCESS;
+}
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c
new file mode 100644
index 00..ea0f7c966b
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c
@@ -0,0 +1,88 @@
+/** @file
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+EFI_STATUS
+EFIAPI
+AdlBoardEnableAcpi (
+  IN BOOLEAN  EnableSci
+  );
+
+EFI_STATUS
+EFIAPI
+AdlBoardDisableAcpi (
+  IN BOOLEAN  DisableSci
+  );
+
+EFI_STATUS
+EFIAPI
+SiliconEnableAcpi (
+  IN BOOLEAN  EnableSci
+  );
+
+EFI_STATUS

[edk2-devel] [PATCH v2 1/6] AlderlakeOpenBoardPkg: Add package and headers

[Saloni Kasbekar]

Create the AlderlakeOpenBoardPkg to provide board support code. The
package supports Alderlake Mobile board with LPDDR4. The package
serves as a support package in the EDK II Minimum Platform design.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/Library/BoardConfigLib.h  |  59 
 .../Include/Library/PeiGetFvInfoLib.h |  29 ++
 .../Include/Library/SpiFlashCommon.h  |  99 ++
 .../Include/PlatformBoardConfig.h |  93 ++
 .../Include/PlatformBoardId.h |  21 ++
 .../Include/PlatformGpioConfig.h  |  18 +
 .../Include/PlatformPostCode.h|  39 +++
 .../Include/PolicyUpdateMacro.h   |  48 +++
 .../AlderlakeOpenBoardPkg/OpenBoardPkg.dec| 307 ++
 9 files changed, 713 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/PeiGetFvInfoLib.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/SpiFlashCommon.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformBoardConfig.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformBoardId.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformGpioConfig.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformPostCode.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h 
b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h
new file mode 100644
index 00..3a07563c5d
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h
@@ -0,0 +1,59 @@
+/** @file
+  Function prototype of BoardConfigLib.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _BOARD_CONFIG_LIB_H_
+#define _BOARD_CONFIG_LIB_H_
+
+#include 
+#include 
+
+#define SIZE_OF_FIELD(TYPE, Field) (sizeof (((TYPE *)0)->Field))
+
+#define SIZE_OF_TABLE(TABLE, TYPE) (sizeof (TABLE) / sizeof (TYPE))
+
+#define BOARD_CONFIG PLATFORM_INFO
+
+#define PRE_MEM0
+#define POST_MEM   1
+#define EARLY_PRE_MEM  2
+
+/**
+  Procedure to detect current board HW configuration.
+
+**/
+VOID
+EFIAPI
+GetBoardConfig (
+  VOID
+  );
+
+
+/**
+  Count the number of GPIO settings in the Table.
+
+  @param[in]  GpioTable   The pointer of GPIO config table
+  @param[out] GpioCount   The number of GPIO config entries
+**/
+VOID
+GetGpioTableSize (
+  GPIO_INIT_CONFIG   *GpioTable,
+  OUT UINT16 *GpioCount
+  );
+
+
+/**
+  Configure GPIO pads in PEI phase.
+
+  @param[in]  GpioTable  Pointer to Gpio table
+**/
+VOID
+GpioInit (
+  IN GPIO_INIT_CONFIG *GpioTable
+  );
+
+#endif // _BOARD_CONFIG_LIB_H_
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/PeiGetFvInfoLib.h 
b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/PeiGetFvInfoLib.h
new file mode 100644
index 00..f2e5a77787
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/PeiGetFvInfoLib.h
@@ -0,0 +1,29 @@
+/** @file
+  Header file for PeiGetFvInfoLib..
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PEI_GET_FV_INFO_LIB_H_
+#define _PEI_GET_FV_INFO_LIB_H_
+
+/**
+  PeiGetSectionFromFv finds the file in FV and gets file Address and Size
+
+  @param[in] NameGuid  - File GUID
+  @param[out] Address  - Pointer to the File Address
+  @param[out] Size - Pointer to File Size
+
+  @retval EFI_SUCCESSSuccessfull in reading the section from FV
+**/
+EFI_STATUS
+EFIAPI
+PeiGetSectionFromFv (
+  IN CONST  EFI_GUIDNameGuid,
+  OUT VOID  **Address,
+  OUT UINT32*Size
+  );
+
+#endif
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/SpiFlashCommon.h 
b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/SpiFlashCommon.h
new file mode 100644
index 00..76ba3a8094
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/SpiFlashCommon.h
@@ -0,0 +1,99 @@
+/** @file
+  The header file includes the common header files, defines
+  internal structure and functions used by SpiFlashCommonLib.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __SPI_FLASH_COMMON_H__
+#define __SPI_FLASH_COMMON_H__
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SECTOR_SIZE_4KB   0x1000  // Common 4kBytes sector size
+/**
+  Enable block protect

Re: [edk2-devel] [PATCH] NetworkPkg: Increase HTTP buffer size and enable TCP window scaling

[Saloni Kasbekar]

Reviewed-by: Saloni Kasbekar 

-Original Message-
From: Li, Yi1  
Sent: Thursday, July 20, 2023 10:18 PM
To: devel@edk2.groups.io
Cc: Li, Yi1 ; Otcheretianski, Andrei 
; Kasbekar, Saloni 
; Clark-williams, Zachary 

Subject: [PATCH] NetworkPkg: Increase HTTP buffer size and enable TCP window 
scaling

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4505
This gives something like ~3 fold throughput boost.

Signed-off-by: Andrei Otcheretianski 
Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 
---
 NetworkPkg/HttpBootDxe/HttpBootClient.h |  2 +-
 NetworkPkg/HttpDxe/HttpProto.c  | 48 +
 NetworkPkg/HttpDxe/HttpProto.h  |  2 +-
 3 files changed, 27 insertions(+), 25 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.h 
b/NetworkPkg/HttpBootDxe/HttpBootClient.h
index 2fba713679..86a28bc91a 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootClient.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootClient.h
@@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent  #ifndef 
__EFI_HTTP_BOOT_HTTP_H__  #define __EFI_HTTP_BOOT_HTTP_H__
 
-#define HTTP_BOOT_BLOCK_SIZE   1500
+#define HTTP_BOOT_BLOCK_SIZE   32000
 #define HTTP_USER_AGENT_EFI_HTTP_BOOT  "UefiHttpBoot/1.0"
 #define HTTP_BOOT_AUTHENTICATION_INFO_MAX_LEN  255
 
diff --git a/NetworkPkg/HttpDxe/HttpProto.c b/NetworkPkg/HttpDxe/HttpProto.c 
index 33ae622c3f..7dfb82dd2e 100644
--- a/NetworkPkg/HttpDxe/HttpProto.c
+++ b/NetworkPkg/HttpDxe/HttpProto.c
@@ -1073,18 +1073,19 @@ HttpConfigureTcp4 (
   Tcp4AP->ActiveFlag  = TRUE;
   IP4_COPY_ADDRESS (>RemoteAddress, >RemoteAddr);
 
-  Tcp4Option= Tcp4CfgData->ControlOption;
-  Tcp4Option->ReceiveBufferSize = HTTP_BUFFER_SIZE_DEAULT;
-  Tcp4Option->SendBufferSize= HTTP_BUFFER_SIZE_DEAULT;
-  Tcp4Option->MaxSynBackLog = HTTP_MAX_SYN_BACK_LOG;
-  Tcp4Option->ConnectionTimeout = HTTP_CONNECTION_TIMEOUT;
-  Tcp4Option->DataRetries   = HTTP_DATA_RETRIES;
-  Tcp4Option->FinTimeout= HTTP_FIN_TIMEOUT;
-  Tcp4Option->KeepAliveProbes   = HTTP_KEEP_ALIVE_PROBES;
-  Tcp4Option->KeepAliveTime = HTTP_KEEP_ALIVE_TIME;
-  Tcp4Option->KeepAliveInterval = HTTP_KEEP_ALIVE_INTERVAL;
-  Tcp4Option->EnableNagle   = TRUE;
-  Tcp4CfgData->ControlOption= Tcp4Option;
+  Tcp4Option  = Tcp4CfgData->ControlOption;
+  Tcp4Option->ReceiveBufferSize   = HTTP_BUFFER_SIZE_DEAULT;
+  Tcp4Option->SendBufferSize  = HTTP_BUFFER_SIZE_DEAULT;
+  Tcp4Option->MaxSynBackLog   = HTTP_MAX_SYN_BACK_LOG;
+  Tcp4Option->ConnectionTimeout   = HTTP_CONNECTION_TIMEOUT;
+  Tcp4Option->DataRetries = HTTP_DATA_RETRIES;
+  Tcp4Option->FinTimeout  = HTTP_FIN_TIMEOUT;
+  Tcp4Option->KeepAliveProbes = HTTP_KEEP_ALIVE_PROBES;
+  Tcp4Option->KeepAliveTime   = HTTP_KEEP_ALIVE_TIME;
+  Tcp4Option->KeepAliveInterval   = HTTP_KEEP_ALIVE_INTERVAL;
+  Tcp4Option->EnableNagle = TRUE;
+  Tcp4Option->EnableWindowScaling = TRUE;
+  Tcp4CfgData->ControlOption  = Tcp4Option;
 
   if ((HttpInstance->State == HTTP_STATE_TCP_CONNECTED) ||
   (HttpInstance->State == HTTP_STATE_TCP_CLOSED)) @@ -1156,17 +1157,18 @@ 
HttpConfigureTcp6 (
   IP6_COPY_ADDRESS (>StationAddress, 
>Ipv6Node.LocalAddress);
   IP6_COPY_ADDRESS (>RemoteAddress, >RemoteIpv6Addr);
 
-  Tcp6Option= Tcp6CfgData->ControlOption;
-  Tcp6Option->ReceiveBufferSize = HTTP_BUFFER_SIZE_DEAULT;
-  Tcp6Option->SendBufferSize= HTTP_BUFFER_SIZE_DEAULT;
-  Tcp6Option->MaxSynBackLog = HTTP_MAX_SYN_BACK_LOG;
-  Tcp6Option->ConnectionTimeout = HTTP_CONNECTION_TIMEOUT;
-  Tcp6Option->DataRetries   = HTTP_DATA_RETRIES;
-  Tcp6Option->FinTimeout= HTTP_FIN_TIMEOUT;
-  Tcp6Option->KeepAliveProbes   = HTTP_KEEP_ALIVE_PROBES;
-  Tcp6Option->KeepAliveTime = HTTP_KEEP_ALIVE_TIME;
-  Tcp6Option->KeepAliveInterval = HTTP_KEEP_ALIVE_INTERVAL;
-  Tcp6Option->EnableNagle   = TRUE;
+  Tcp6Option  = Tcp6CfgData->ControlOption;
+  Tcp6Option->ReceiveBufferSize   = HTTP_BUFFER_SIZE_DEAULT;
+  Tcp6Option->SendBufferSize  = HTTP_BUFFER_SIZE_DEAULT;
+  Tcp6Option->MaxSynBackLog   = HTTP_MAX_SYN_BACK_LOG;
+  Tcp6Option->ConnectionTimeout   = HTTP_CONNECTION_TIMEOUT;
+  Tcp6Option->DataRetries = HTTP_DATA_RETRIES;
+  Tcp6Option->FinTimeout  = HTTP_FIN_TIMEOUT;
+  Tcp6Option->KeepAliveProbes = HTTP_KEEP_ALIVE_PROBES;
+  Tcp6Option->KeepAliveTime   = HTTP_KEEP_ALIVE_TIME;
+  Tcp6Option->KeepAliveInterval   = HTTP_KEEP_ALIVE_INTERVAL;
+  Tcp6Option->EnableNagle = TRUE;
+  Tcp6Option->EnableWindowScaling = TRUE;
 
   if ((HttpInstance->State == HTTP_STATE_TCP_CONNECTED) ||
   (HttpInstance->State == HTTP_STATE_TCP_CLOSED)) diff --git 
a/NetworkPkg/HttpDxe/HttpProto.

Re: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver binding start issue.

[Saloni Kasbekar]

Mike,

Would you be able to help us merge the patch?

Thanks,
Saloni

-Original Message-
From: Nickle Wang  
Sent: Wednesday, July 12, 2023 11:54 PM
To: devel@edk2.groups.io; Kasbekar, Saloni ; 
Clark-williams, Zachary 
Cc: Abner Chang ; Igor Kulchytskyy ; Nick 
Ramirez 
Subject: RE: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver binding 
start issue.

Hi Saloni,

Could you please help to merge this fix since there is no objection during past 
weeks?

Thanks,
Nickle

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Saloni 
> Kasbekar via groups.io
> Sent: Friday, June 30, 2023 6:28 AM
> To: Nickle Wang ; devel@edk2.groups.io
> Cc: Maciej Rabeda ; Siyuan Fu 
> ; Abner Chang ; Igor 
> Kulchytskyy ; Nick Ramirez 
> Subject: Re: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> binding start issue.
> 
> External email: Use caution opening links or attachments
> 
> 
> Hi Nickle,
> 
> That makes sense. Thanks for the clarification.
> 
> Reviewed-by: Saloni Kasbekar 
> 
> Thanks,
> Saloni
> 
> -Original Message-
> From: Nickle Wang 
> Sent: Wednesday, June 28, 2023 3:30 PM
> To: Kasbekar, Saloni ; devel@edk2.groups.io
> Cc: Maciej Rabeda ; Siyuan Fu 
> ; Abner Chang ; Igor 
> Kulchytskyy ; Nick Ramirez 
> Subject: RE: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> binding start issue.
> 
> Hi Saloni,
> 
> Thanks for your review.
> 
> When uninstall fails, per UEFI specification, the protocol will be 
> installed again and will be visible to UEFI drivers.
> 
> Page 190, UEFI spec. 2.10:
> "If any errors are generated while the protocol interfaces are being 
> uninstalled, then the protocols uninstalled prior to the error will be 
> reinstalled with the boot service
> EFI_BOOT_SERVICES.InstallProtocolInterface() and the status code 
> EFI_INVALID_PARAMETER is returned."
> 
> In this case, if we do FreePool while driver still can locate 
> gEfiHttpServiceBindingProtocolGuid. Driver will access to the memory 
> that is released to system. Memory issue may happen.
> 
> Regards,
> Nickle
> 
> > -Original Message-
> > From: Kasbekar, Saloni 
> > Sent: Thursday, June 29, 2023 3:07 AM
> > To: devel@edk2.groups.io; Nickle Wang 
> > Cc: Maciej Rabeda ; Siyuan Fu 
> > ; Abner Chang ; Igor 
> > Kulchytskyy ; Nick Ramirez 
> > Subject: RE: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> > binding start issue.
> >
> > External email: Use caution opening links or attachments
> >
> >
> > Hi Nickle,
> >
> > We would want to do the FreePool even if the Uninstall fails (like 
> > in the case where we failed to install the multiple protocol 
> > interfaces and then went to ON_ERROR). Do you think it's better if 
> > we change it to -
> >
> >   if (HttpService != NULL) {
> > HttpCleanService (HttpService, UsingIpv6);
> > Status = gBS->UninstallMultipleProtocolInterfaces (
> > ,
> > ,
> > >ServiceBinding,
> > NULL
> > );
> > if ((HttpService->Tcp4ChildHandle == NULL) && 
> > (HttpService->Tcp6ChildHandle == NULL)) {
> > FreePool (HttpService);
> > }
> >   }
> >
> > Thanks,
> > Saloni
> >
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of 
> > Nickle Wang via groups.io
> > Sent: Tuesday, June 27, 2023 5:56 PM
> > To: devel@edk2.groups.io; Nickle Wang 
> > Cc: Maciej Rabeda ; Siyuan Fu 
> > ; Abner Chang ; Igor 
> > Kulchytskyy ; Nick Ramirez 
> > Subject: Re: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> > binding start issue.
> >
> > May I know if someone can help to review this patch?
> >
> > Thanks,
> > Nickle
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io  On Behalf Of 
> > > Nickle Wang via groups.io
> > > Sent: Friday, February 10, 2023 8:34 PM
> > > To: devel@edk2.groups.io
> > > Cc: Maciej Rabeda ; Siyuan Fu 
> > > ; Abner Chang ; Igor 
> > > Kulchytskyy ; Nick Ramirez 
> > > Subject: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> > > binding start issue.
> > >
> > > External email: Use caution opening links or attachments
> > >
> > >
> > > When failure happens in HttpDxeStart, the error handling code 
> > > release the memory buffer but it does not uninstall HTTP service 
> > > bindnig proto

Re: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver binding start issue.

[Saloni Kasbekar]

Hi Nickle,

That makes sense. Thanks for the clarification.

Reviewed-by: Saloni Kasbekar 

Thanks,
Saloni

-Original Message-
From: Nickle Wang  
Sent: Wednesday, June 28, 2023 3:30 PM
To: Kasbekar, Saloni ; devel@edk2.groups.io
Cc: Maciej Rabeda ; Siyuan Fu 
; Abner Chang ; Igor Kulchytskyy 
; Nick Ramirez 
Subject: RE: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver binding 
start issue.

Hi Saloni,

Thanks for your review. 

When uninstall fails, per UEFI specification, the protocol will be installed 
again and will be visible to UEFI drivers.

Page 190, UEFI spec. 2.10:
"If any errors are generated while the
protocol interfaces are being uninstalled, then the protocols uninstalled prior 
to the error will be reinstalled with the boot service 
EFI_BOOT_SERVICES.InstallProtocolInterface() and the status code 
EFI_INVALID_PARAMETER is returned."

In this case, if we do FreePool while driver still can locate 
gEfiHttpServiceBindingProtocolGuid. Driver will access to the memory that is 
released to system. Memory issue may happen.

Regards,
Nickle

> -Original Message-
> From: Kasbekar, Saloni 
> Sent: Thursday, June 29, 2023 3:07 AM
> To: devel@edk2.groups.io; Nickle Wang 
> Cc: Maciej Rabeda ; Siyuan Fu 
> ; Abner Chang ; Igor 
> Kulchytskyy ; Nick Ramirez 
> Subject: RE: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> binding start issue.
> 
> External email: Use caution opening links or attachments
> 
> 
> Hi Nickle,
> 
> We would want to do the FreePool even if the Uninstall fails (like in 
> the case where we failed to install the multiple protocol interfaces 
> and then went to ON_ERROR). Do you think it's better if we change it 
> to -
> 
>   if (HttpService != NULL) {
> HttpCleanService (HttpService, UsingIpv6);
> Status = gBS->UninstallMultipleProtocolInterfaces (
> ,
> ,
> >ServiceBinding,
> NULL
> );
> if ((HttpService->Tcp4ChildHandle == NULL) && 
> (HttpService->Tcp6ChildHandle == NULL)) {
> FreePool (HttpService);
> }
>   }
> 
> Thanks,
> Saloni
> 
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Nickle 
> Wang via groups.io
> Sent: Tuesday, June 27, 2023 5:56 PM
> To: devel@edk2.groups.io; Nickle Wang 
> Cc: Maciej Rabeda ; Siyuan Fu 
> ; Abner Chang ; Igor 
> Kulchytskyy ; Nick Ramirez 
> Subject: Re: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> binding start issue.
> 
> May I know if someone can help to review this patch?
> 
> Thanks,
> Nickle
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of 
> > Nickle Wang via groups.io
> > Sent: Friday, February 10, 2023 8:34 PM
> > To: devel@edk2.groups.io
> > Cc: Maciej Rabeda ; Siyuan Fu 
> > ; Abner Chang ; Igor 
> > Kulchytskyy ; Nick Ramirez 
> > Subject: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> > binding start issue.
> >
> > External email: Use caution opening links or attachments
> >
> >
> > When failure happens in HttpDxeStart, the error handling code 
> > release the memory buffer but it does not uninstall HTTP service 
> > bindnig protocol. As the result, application can still locate this 
> > protocol and invoke service binding fucntions in released memory pool.
> >
> > Signed-off-by: Nickle Wang 
> > Cc: Maciej Rabeda 
> > Cc: Siyuan Fu 
> > Cc: Abner Chang 
> > Cc: Igor Kulchytskyy 
> > Cc: Nick Ramirez 
> > ---
> >  NetworkPkg/HttpDxe/HttpDriver.c | 13 +++--
> >  1 file changed, 11 insertions(+), 2 deletions(-)
> >
> > diff --git a/NetworkPkg/HttpDxe/HttpDriver.c 
> > b/NetworkPkg/HttpDxe/HttpDriver.c index 5d918d3c4d..f6d1263cad 
> > 100644
> > --- a/NetworkPkg/HttpDxe/HttpDriver.c
> > +++ b/NetworkPkg/HttpDxe/HttpDriver.c
> > @@ -3,6 +3,7 @@
> >
> >Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
> >(C) Copyright 2016 Hewlett Packard Enterprise Development LP
> > +  Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
> >
> >SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > @@ -464,8 +465,16 @@ ON_ERROR:
> >
> >if (HttpService != NULL) {
> >  HttpCleanService (HttpService, UsingIpv6);
> > -if ((HttpService->Tcp4ChildHandle == NULL) && (HttpService-
> > >Tcp6ChildHandle == NULL)) {
> > -  FreePool (HttpService);
> > +Status = gBS->UninstallMultipleProtocolInterfaces (
> > +,
> > +

Re: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver binding start issue.

[Saloni Kasbekar]

Hi Nickle,

We would want to do the FreePool even if the Uninstall fails (like in the case 
where we failed to install the multiple protocol interfaces and then went to 
ON_ERROR). Do you think it's better if we change it to - 

  if (HttpService != NULL) {
HttpCleanService (HttpService, UsingIpv6);
Status = gBS->UninstallMultipleProtocolInterfaces (
,
,
>ServiceBinding,
NULL
);
if ((HttpService->Tcp4ChildHandle == NULL) && (HttpService->Tcp6ChildHandle 
== NULL)) {
FreePool (HttpService);
}
  }

Thanks,
Saloni

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Nickle Wang via 
groups.io
Sent: Tuesday, June 27, 2023 5:56 PM
To: devel@edk2.groups.io; Nickle Wang 
Cc: Maciej Rabeda ; Siyuan Fu 
; Abner Chang ; Igor Kulchytskyy 
; Nick Ramirez 
Subject: Re: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver binding 
start issue.

May I know if someone can help to review this patch?

Thanks,
Nickle

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Nickle 
> Wang via groups.io
> Sent: Friday, February 10, 2023 8:34 PM
> To: devel@edk2.groups.io
> Cc: Maciej Rabeda ; Siyuan Fu 
> ; Abner Chang ; Igor 
> Kulchytskyy ; Nick Ramirez 
> Subject: [edk2-devel] [PATCH 2/2] NetworkPkg/HttpDxe: fix driver 
> binding start issue.
> 
> External email: Use caution opening links or attachments
> 
> 
> When failure happens in HttpDxeStart, the error handling code release 
> the memory buffer but it does not uninstall HTTP service bindnig 
> protocol. As the result, application can still locate this protocol 
> and invoke service binding fucntions in released memory pool.
> 
> Signed-off-by: Nickle Wang 
> Cc: Maciej Rabeda 
> Cc: Siyuan Fu 
> Cc: Abner Chang 
> Cc: Igor Kulchytskyy 
> Cc: Nick Ramirez 
> ---
>  NetworkPkg/HttpDxe/HttpDriver.c | 13 +++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/NetworkPkg/HttpDxe/HttpDriver.c 
> b/NetworkPkg/HttpDxe/HttpDriver.c index 5d918d3c4d..f6d1263cad 100644
> --- a/NetworkPkg/HttpDxe/HttpDriver.c
> +++ b/NetworkPkg/HttpDxe/HttpDriver.c
> @@ -3,6 +3,7 @@
> 
>Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
>(C) Copyright 2016 Hewlett Packard Enterprise Development LP
> +  Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
> 
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> @@ -464,8 +465,16 @@ ON_ERROR:
> 
>if (HttpService != NULL) {
>  HttpCleanService (HttpService, UsingIpv6);
> -if ((HttpService->Tcp4ChildHandle == NULL) && (HttpService-
> >Tcp6ChildHandle == NULL)) {
> -  FreePool (HttpService);
> +Status = gBS->UninstallMultipleProtocolInterfaces (
> +,
> +,
> +>ServiceBinding,
> +NULL
> +);
> +if (!EFI_ERROR (Status)) {
> +  if ((HttpService->Tcp4ChildHandle == NULL) && (HttpService-
> >Tcp6ChildHandle == NULL)) {
> +FreePool (HttpService);
> +  }
>  }
>}
> 
> --
> 2.39.1.windows.1
> 
> 
> 
> 
> 








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[edk2-devel] [PATCH 8/8] AlderlakeSiliconPkg/SystemAgent: Add library and driver modules

[Saloni Kasbekar]

Adds the following modules:
- Library/DxeSaPolicyLib
- SaInit

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/DxeSaPolicyLib/DxeSaPolicyLib.c   | 225 ++
 .../Library/DxeSaPolicyLib/DxeSaPolicyLib.inf |  46 
 .../DxeSaPolicyLib/DxeSaPolicyLibrary.h   |  30 +++
 .../SystemAgent/SaInit/Dxe/SaAcpi.c   | 193 +++
 .../SystemAgent/SaInit/Dxe/SaInit.c   |  97 
 .../SystemAgent/SaInit/Dxe/SaInit.h   |  42 
 .../SystemAgent/SaInit/Dxe/SaInitDxe.c|  90 +++
 .../SystemAgent/SaInit/Dxe/SaInitDxe.h| 119 +
 .../SystemAgent/SaInit/Dxe/SaInitDxe.inf  |  98 
 9 files changed, 940 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaAcpi.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInit.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInit.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
new file mode 100644
index 00..d812f300c1
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
@@ -0,0 +1,225 @@
+/** @file
+  This file provide services for DXE phase policy default initialization
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "DxeSaPolicyLibrary.h"
+#include 
+#include 
+#include "MemoryConfig.h"
+
+extern EFI_GUID gMemoryDxeConfigGuid;
+
+/**
+  This function prints the SA DXE phase policy.
+
+  @param[in] SaPolicy - SA DXE Policy protocol
+**/
+VOID
+SaPrintPolicyProtocol (
+  IN  SA_POLICY_PROTOCOL  *SaPolicy
+  )
+{
+  UINT8   ControllerIndex;
+  UINT8   ChannelIndex;
+  EFI_STATUS  Status;
+  MEMORY_DXE_CONFIG   *MemoryDxeConfig;
+
+  Status = GetConfigBlock ((VOID *) SaPolicy, , (VOID 
*));
+  ASSERT_EFI_ERROR (Status);
+
+
+  DEBUG_CODE_BEGIN ();
+  INTN  i;
+
+  DEBUG ((DEBUG_INFO, "\n SA Policy (DXE) print BEGIN 
-\n"));
+  DEBUG ((DEBUG_INFO, "Revision : %x\n", 
SaPolicy->TableHeader.Header.Revision));
+  ASSERT (SaPolicy->TableHeader.Header.Revision == 
SA_POLICY_PROTOCOL_REVISION);
+
+  DEBUG ((DEBUG_INFO, " SA_MEMORY_CONFIGURATION 
-\n"));
+
+  DEBUG ((DEBUG_INFO, " SpdAddressTable[%d] :", 4));
+  for (i = 0; i < 4; i++) {
+DEBUG ((DEBUG_INFO, " %x", MemoryDxeConfig->SpdAddressTable[i]));
+  }
+  DEBUG ((DEBUG_INFO, "\n"));
+
+  for (ControllerIndex = 0; ControllerIndex < MEM_CFG_MAX_CONTROLLERS; 
ControllerIndex++) {
+for (ChannelIndex = 0; ChannelIndex < MEM_CFG_MAX_CHANNELS; 
ChannelIndex++) {
+  DEBUG ((DEBUG_INFO, " SlotMap[%d][%d] : 0x%x\n", ControllerIndex, 
ChannelIndex, MemoryDxeConfig->SlotMap[ControllerIndex][ChannelIndex]));
+}
+  }
+  DEBUG ((DEBUG_INFO, " MrcTimeMeasure  : %x\n", 
MemoryDxeConfig->MrcTimeMeasure));
+  DEBUG ((DEBUG_INFO, " MrcFastBoot : %x\n", 
MemoryDxeConfig->MrcFastBoot));
+
+  DEBUG ((DEBUG_INFO, " CPU_PCIE_CONFIGURATION 
-\n"));
+  DEBUG ((DEBUG_INFO, " PegAspm[%d] :", SA_PEG_MAX_FUN));
+  DEBUG ((DEBUG_INFO, " PegRootPortHPE[%d] :", SA_PEG_MAX_FUN));
+  DEBUG ((DEBUG_INFO, "\n"));
+
+
+  DEBUG ((DEBUG_INFO, "\n SA Policy (DXE) print END 
-\n"));
+  DEBUG_CODE_END ();
+
+  return;
+}
+
+/**
+  Load DXE Config block default
+
+  @param[in] ConfigBlockPointer Pointer to config block
+**/
+VOID
+LoadMemoryDxeDefault (
+  IN VOID*ConfigBlockPointer
+  )
+{
+  UINT8ControllerIndex;
+  UINT8ChannelIndex;
+  MEMORY_DXE_CONFIG*MemoryDxeConfig;
+
+  MemoryDxeConfig = ConfigBlockPointer;
+  ///
+  /// Initialize the Memory Configuration
+  ///
+  ///
+  /// DIMM SMBus addresses info
+  /// Refer to the SpdAddressTable[] mapping ru

[edk2-devel] [PATCH 7/8] AlderlakeSiliconPkg/SystemAgent: Add include headers

[Saloni Kasbekar]

Adds the following header files:
* SystemAgent/Include

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/ConfigBlock/MemoryDxeConfig.h | 126 ++
 .../ConfigBlock/SaMiscPeiPreMemConfig.h   | 112 +
 .../Include/Library/DxeSaPolicyLib.h  |  58 +
 .../Include/Library/PeiSaPolicyLib.h  |  13 ++
 .../SystemAgent/Include/MemInfoHob.h  | 220 ++
 .../SystemAgent/Include/Protocol/SaPolicy.h   |  54 +
 .../SystemAgent/Include/SaDataHob.h   |  28 +++
 7 files changed, 611 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/SaMiscPeiPreMemConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Library/DxeSaPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Library/PeiSaPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/MemInfoHob.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Protocol/SaPolicy.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/SaDataHob.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
new file mode 100644
index 00..eca0c2f1ba
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
@@ -0,0 +1,126 @@
+/** @file
+  Memory DXE Policy definitions
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _MEMORY_DXE_CONFIG_H_
+#define _MEMORY_DXE_CONFIG_H_
+
+#pragma pack(push, 1)
+
+/**
+ Making any setup structure change after code frozen
+ will need to maintain backward compatibility, bump up
+ structure revision and update below history table\n
+  Revision 1:  - Initial version.
+**/
+#define MEMORY_DXE_CONFIG_REVISION 2
+
+typedef struct _MEMORY_DXE_CONFIG  MEMORY_DXE_CONFIG;
+
+/**
+  Retrieves the OEM custom string for the SMBIOS Type 17 Table DeviceLocator 
field.
+  Implementation of this function is optional, if this function pointer is 
NULL then
+  the reference implementation of DeviceLocator will be used.
+
+  @param[in]  This  A pointer to this instance of 
MEMORY_DXE_CONFIG.
+  @param[in]  ControllerDesired Controller to get a 
DeviceLocator string for.
+  @param[in]  Dimm  Desired DIMM to get a 
DeviceLocator string for.
+  @param[in]  MdSocket  0 = Memory Down, 1 = Socketed.
+
+  @retval   The DeviceLocator string
+  @retval NULL  If the return value is NULL, the 
default value will be used.
+**/
+typedef
+CHAR8*
+(EFIAPI *MEMORY_DXE_CONFIG_GET_DEVICE_LOCATOR_STRING)(
+  IN CONSTMEMORY_DXE_CONFIG   *This,
+  IN  UINT8   Controller,
+  IN  UINT8   Dimm,
+  IN  UINT8   MdSocket
+  );
+
+/**
+  Retrieves the OEM custom string for the SMBIOS Type 17 Table BankLocator 
field.
+  Implementation of this function is optional, if this function pointer is 
NULL then
+  the reference implementation of DeviceLocator will be used.
+
+  @param[in]  This  A pointer to this instance of 
MEMORY_DXE_CONFIG.
+  @param[in]  ControllerDesired Controller to get a 
BankLocator string for.
+  @param[in]  Dimm  Desired DIMM to get a BankLocator 
string for.
+  @param[in]  MdSocket  0 = Memory Down, 1 = Socketed.
+
+  @retval   The BankLocator string
+  @retval NULL  If the return value is NULL, the 
default value will be used.
+**/
+typedef
+CHAR8*
+(EFIAPI *MEMORY_DXE_CONFIG_GET_BANK_LOCATOR_STRING)(
+  IN CONSTMEMORY_DXE_CONFIG   *This,
+  IN  UINT8   Controller,
+  IN  UINT8   Dimm,
+  IN  UINT8   MdSocket
+  );
+
+/**
+  The Memory Configuration includes DIMM SPD address Map and DIMM Slot 
Mechanical present bit map.
+  The data elements should be initialized by a Platform Module.\n
+  Revision 1:
+  - Initial version.
+**/
+struct _MEMORY_DXE_CONFIG {
+  CONFIG_BLOCK_HEADER   Header;   ///< Offset 0-27: Config 
Block Header
+/**
+  Offset 28:
+  Dimm SPD address
+  Only Server support 2 channels * 3 slots per channel = 6 sockets totally
+  The Desktop and mobile only support 2 channels * 2 slots per channel = 4 
sockets totally
+  So there is mapping rule here for Desktop and mobile that there are no more 
4 DIMMS totally in a system:
+Channel A/ Slo

[edk2-devel] [PATCH 6/8] AlderlakeSiliconPkg/SystemAgent: Add NVS support

[Saloni Kasbekar]

Adds the System Agent NVS ACPI table and structures

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../SystemAgent/AcpiTables/SaSsdt/SaNvs.asl   | 18 +++
 .../IncludePrivate/Protocol/SaNvsArea.h   | 30 +++
 .../SystemAgent/IncludePrivate/SaNvsAreaDef.h | 22 ++
 3 files changed, 70 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl
new file mode 100644
index 00..e9785873d2
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl
@@ -0,0 +1,18 @@
+/**@file
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+  //
+  // Define SA NVS Area operation region.
+  //
+
+
+  OperationRegion(SANV,SystemMemory,SANB,SANL)
+  Field(SANV,AnyAcc,Lock,Preserve)
+  {  Offset(0),  M64B, 64, // Offset(0),   Base of above 4GB MMIO resource
+  Offset(8),M64L, 64, // Offset(8),   Length of above 4GB MMIO resource
+  Offset(16),M32B, 32, // Offset(16),   Base of below 4GB MMIO resource
+  Offset(20),M32L, 32, // Offset(20),   Length of below 4GB MMIO resource
+  }
\ No newline at end of file
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
new file mode 100644
index 00..3a75465843
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
@@ -0,0 +1,30 @@
+/** @file
+  Definition of the System Agent global NVS area protocol.
+  This protocol publishes the address and format of a global ACPI NVS buffer
+  used as a communications buffer between SMM/DXE/PEI code and ASL code.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SYSTEM_AGENT_NVS_AREA_H_
+#define _SYSTEM_AGENT_NVS_AREA_H_
+
+//
+// SA NVS Area definition
+//
+#include 
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gSaNvsAreaProtocolGuid;
+
+///
+/// System Agent Global NVS Area Protocol
+///
+typedef struct {
+  SYSTEM_AGENT_NVS_AREA *Area;///< System Agent Global NVS Area 
Structure
+} SYSTEM_AGENT_NVS_AREA_PROTOCOL;
+
+#endif // _SYSTEM_AGENT_NVS_AREA_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h
new file mode 100644
index 00..5b8136866a
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h
@@ -0,0 +1,22 @@
+/**@file
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+  //
+  // Define SA NVS Area operation region.
+  //
+#ifndef _SA_NVS_AREA_DEF_H_
+#define _SA_NVS_AREA_DEF_H_
+
+#pragma pack (push,1)
+typedef struct {
+  UINT64   Mmio64Base;  ///< Offset 0 Base of 
above 4GB MMIO resource
+  UINT64   Mmio64Length;///< Offset 8 Length 
of above 4GB MMIO resource
+  UINT32   Mmio32Base;  ///< Offset 16 Base of 
below 4GB MMIO resource
+  UINT32   Mmio32Length;///< Offset 20 Length 
of below 4GB MMIO resource
+} SYSTEM_AGENT_NVS_AREA;
+
+#pragma pack(pop)
+#endif
-- 
2.36.1.windows.1



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[edk2-devel] [PATCH 4/8] AlderlakeSiliconPkg/Pch: Add libraries

[Saloni Kasbekar]

Adds the following libraries:
- BasePchPciBdfLib
- BaseResetSystemLib
- PeiDxeSmmPchCycleDecodingLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePchPciBdfLib/BasePchPciBdfLib.inf |  32 ++
 .../Library/BasePchPciBdfLib/PchPciBdfLib.c   | 308 ++
 .../BaseResetSystemLib/BaseResetSystemLib.c   | 114 +++
 .../BaseResetSystemLib/BaseResetSystemLib.inf |  37 +++
 .../PchCycleDecodingLib.c | 194 +++
 .../PeiDxeSmmPchCycleDecodingLib.inf  |  41 +++
 6 files changed, 726 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BaseResetSystemLib/BaseResetSystemLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BaseResetSystemLib/BaseResetSystemLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PeiDxeSmmPchCycleDecodingLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
new file mode 100644
index 00..e65f564c1b
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
@@ -0,0 +1,32 @@
+## @file
+# PCH PCIe Bus Device Function Library.
+#
+# All functions from this library are available in PEI, DXE, and SMM,
+# But do not support UEFI RUNTIME environment call.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+INF_VERSION = 0x00010017
+BASE_NAME = PeiDxeSmmPchPciBdfLib
+FILE_GUID = A36363FC-2951-4DCF-AC81-16F4ED3FDA47
+VERSION_STRING = 1.0
+MODULE_TYPE = BASE
+LIBRARY_CLASS = PchPciBdfLib
+
+[LibraryClasses]
+BaseLib
+IoLib
+DebugLib
+PciSegmentLib
+PchInfoLib
+PchPcieRpLib
+
+[Packages]
+MdePkg/MdePkg.dec
+AlderlakeSiliconPkg/SiPkg.dec
+
+[Sources]
+PchPciBdfLib.c
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
new file mode 100644
index 00..c26625e2eb
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
@@ -0,0 +1,308 @@
+/** @file
+  PCH PCIe Bus Device Function Library.
+  All functions from this library are available in PEI, DXE, and SMM,
+  But do not support UEFI RUNTIME environment call.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Check if a Device is present for PCH FRU
+  If the data is defined for PCH RFU return it
+  If the data is not defined (Device is NOT present) assert.
+
+  @param[in]  DataToCheck   Device or Function number to check
+
+  @retval Device or Function number value if defined for PCH FRU
+  0xFF if not present in PCH FRU
+**/
+UINT8
+CheckAndReturn (
+  UINT8 DataToCheck
+  )
+{
+  if (DataToCheck == NOT_PRESENT) {
+ASSERT (FALSE);
+  }
+  return DataToCheck;
+}
+
+/**
+  Get P2SB PCI device number
+
+  @retval PCI dev number
+**/
+UINT8
+P2sbDevNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_P2SB);
+}
+
+/**
+  Get P2SB PCI function number
+
+  @retval PCI fun number
+**/
+UINT8
+P2sbFuncNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_P2SB);
+}
+
+/**
+  Get P2SB controller address that can be passed to the PCI Segment Library 
functions.
+
+  @retval P2SB controller address in PCI Segment Library representation
+**/
+UINT64
+P2sbPciCfgBase (
+  VOID
+  )
+{
+  return PCI_SEGMENT_LIB_ADDRESS (
+   DEFAULT_PCI_SEGMENT_NUMBER_PCH,
+   DEFAULT_PCI_BUS_NUMBER_PCH,
+   P2sbDevNumber (),
+   P2sbFuncNumber (),
+   0
+   );
+}
+
+
+
+/**
+  Returns PCH SPI Device number
+
+  @retval UINT8   PCH SPI Device number
+**/
+UINT8
+SpiDevNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SPI);
+}
+
+/**
+  Returns PCH SPI Function number
+
+  @retval UINT8   PCH SPI Function number
+**/
+UINT8
+SpiFuncNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SPI);
+}
+
+/**
+  Returns PCH SPI PCI Config Space base address
+
+  @retval  UINT64  PCH SPI Config Space base address
+**/
+UINT64
+SpiPciCfgBase (
+  VOID
+  )
+{
+  return PCI_SEGMENT_LIB_ADDRESS (
+   DEFAULT_PCI_SEGMENT_NUMBER_PCH,
+   DEFAULT_PCI_BUS_NUMBER_PCH,
+   SpiDevNumber

[edk2-devel] [PATCH 3/8] AlderlakeSiliconPkg/Pch: Add include headers

[Saloni Kasbekar]

Adds the following header files:
* Pch/Include

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/ConfigBlock/PchGeneralConfig.h|  86 
 .../Pch/Include/Library/PchCycleDecodingLib.h |  59 ++
 .../Pch/Include/Library/PchInfoDefs.h |  19 ++
 .../Pch/Include/Library/PchInfoLib.h  | 108 ++
 .../Pch/Include/Library/PchPciBdfLib.h| 187 ++
 .../Pch/Include/PchPolicyCommon.h |  30 +++
 .../Pch/Include/PchPreMemPolicyCommon.h   |  53 +
 .../Pch/Include/PchResetPlatformSpecific.h|  21 ++
 .../Pch/Include/Protocol/PchAcpiSmiDispatch.h | 134 +
 .../Pch/Include/Protocol/PchPcieSmiDispatch.h | 166 
 .../Pch/Include/Protocol/PchSmiDispatch.h | 132 +
 .../Include/Protocol/PchSmmIoTrapControl.h|  65 ++
 .../Protocol/PchSmmPeriodicTimerControl.h |  65 ++
 .../Pch/Include/Protocol/PchTcoSmiDispatch.h  | 150 ++
 .../Pch/Include/Protocol/SmmSmbus.h   |  13 ++
 .../Pch/Include/Register/PchRegs.h|  45 +
 16 files changed, 1333 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchCycleDecodingLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchInfoDefs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchInfoLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchPciBdfLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchPolicyCommon.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchPreMemPolicyCommon.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchResetPlatformSpecific.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchAcpiSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchPcieSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmmIoTrapControl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmmPeriodicTimerControl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchTcoSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/SmmSmbus.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Register/PchRegs.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
new file mode 100644
index 00..4501537fe2
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
@@ -0,0 +1,86 @@
+/** @file
+  PCH General policy
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_GENERAL_CONFIG_H_
+#define _PCH_GENERAL_CONFIG_H_
+
+
+extern EFI_GUID gPchGeneralConfigGuid;
+extern EFI_GUID gPchGeneralPreMemConfigGuid;
+
+#pragma pack (push,1)
+
+enum PCH_RESERVED_PAGE_ROUTE {
+  PchReservedPageToLpc,   ///< Port 80h cycles are sent to LPC.
+  PchReservedPageToPcie   ///< Port 80h cycles are sent to 
PCIe.
+};
+
+/**
+  PCH General Configuration
+  Revision 1:  - Initial version.
+  Revision 2:  - Added AcpiL6dPmeHandling
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  /**
+This member describes whether or not the Compatibility Revision ID (CRID) 
feature
+of PCH should be enabled. 0: Disable; 1: Enable
+  **/
+  UINT32Crid:  1;
+  /**
+Set to enable low latency of legacy IO.
+Some systems require lower IO latency irrespective of power.
+This is a tradeoff between power and IO latency.
+@note: Once this is enabled, DmiAspm, Pcie DmiAspm in SystemAgent
+and ITSS Clock Gating are forced to disabled.
+0: Disable, 1: Enable
+  **/
+  UINT32LegacyIoLowLatency  :  1;
+  /**
+  Enables _L6D ACPI handler.
+  PME GPE is shared by multiple devices So BIOS must verify the same in the 
ASL handler by reading offset for PMEENABLE and PMESTATUS bit
+  0: Disable, 1: Enable
+  **/
+  UINT32AcpiL6dPmeHandling  :  1;
+  UINT32RsvdBits0   : 29;   ///< Reserved bits
+} PCH_GENERAL_CONFIG;
+
+/**
+  PCH General Pre-Memory Configuration
+  Revision 1:  - Initial version.
+  Revision 2:  - Added GpioOverride.
+  Revision 3:  - Added IoeDebugEn, PmodeClkEn
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  /**
+Control where the Port 80h cycles are sent,

[edk2-devel] [PATCH 1/8] AlderlakeSiliconPkg: Add package and library instances

[Saloni Kasbekar]

Create the AlderlakeSiliconPkg to provide an initial package for
silicon initialization code for Alder Lake (ADL) products. Add the
following libraries -
- BasePciSegmentMultiSegLibPci
- BaseSiConfigBlockLib
- PeiDxeSmmReserveMmio64SizeLib
- PeiPostMemSiliconPolicyInitLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePciSegmentMultiSegLibPci.inf  |  37 ++
 .../BasePciSegmentMultiSegLibPci.uni  |  14 +
 .../PciSegmentLib.c   | 597 ++
 .../BaseSiConfigBlockLib.c|  87 +++
 .../BaseSiConfigBlockLib.inf  |  32 +
 .../PeiDxeSmmReserveMmio64SizeLib.c   |  22 +
 .../PeiDxeSmmReserveMmio64SizeLib.inf |  28 +
 .../PeiPostMemSiliconPolicyInitLib.c  |  94 +++
 .../PeiPostMemSiliconPolicyInitLib.inf|  39 ++
 .../PeiPreMemSiliconPolicyInitLib.c   |  98 +++
 .../PeiPreMemSiliconPolicyInitLib.inf |  36 ++
 11 files changed, 1084 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/PciSegmentLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiConfigBlockLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiConfigBlockLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiDxeSmmReserveMmio64SizeLib/PeiDxeSmmReserveMmio64SizeLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiDxeSmmReserveMmio64SizeLib/PeiDxeSmmReserveMmio64SizeLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPostMemSiliconPolicyInitLib/PeiPostMemSiliconPolicyInitLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPostMemSiliconPolicyInitLib/PeiPostMemSiliconPolicyInitLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPreMemSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPreMemSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
new file mode 100644
index 00..f3764d0187
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
@@ -0,0 +1,37 @@
+## @file
+# Instance of PCI Segment Library based on PCI Library.
+#
+# PCI Segment Library that layers on top of the PCI Library which only
+#  supports segment 0 and segment 1 PCI configuration access.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BasePciSegmentMultiSegLibPci
+  MODULE_UNI_FILE= BasePciSegmentMultiSegLibPci.uni
+  FILE_GUID  = AC65B409-DF03-466e-8D2B-6FCE1079F0B2
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PciSegmentLib
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = IA32 X64 IPF EBC
+#
+
+[Sources]
+  PciSegmentLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  AlderlakeSiliconPkg/SiPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PciLib
+  DebugLib
+  PcdLib
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
new file mode 100644
index 00..dd8d74bee8
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
@@ -0,0 +1,14 @@
+// /** @file
+// Instance of PCI Segment Library based on PCI Library.
+//
+// PCI Segment Library that layers on top of the PCI Library which only
+//  supports segment 0 and segment 1 PCI configuration access.
+//
+//   Copyright (c) 2022, Intel Corporation. All rights reserved.
+//   SPDX-License-Identifier: BSD-2-Clause-Patent
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "Instance of PCI 
Segment Library based on PCI Library."
+
+#string STR_MODULE_DESCRIPTION  #language en-US "PCI Segment Library 
that layers on top of the PCI Library which only supports segment 0 and segment 
1 PCI configuration access."
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciS

[edk2-devel] [PATCH 2/8] AlderlakeSiliconPkg: Add Cpu modules

[Saloni Kasbekar]

Add Cpu/Include, Cpu/IncludePrivate and Cpu/Library

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Cpu/Include/ConfigBlock/CpuConfig.h   |  86 
 .../ConfigBlock/CpuConfigLibPreMemConfig.h| 195 ++
 .../ConfigBlock/CpuSecurityPreMemConfig.h |  63 ++
 .../AlderlakeSiliconPkg/Cpu/Include/CpuRegs.h |  63 ++
 .../Cpu/Include/Library/CpuPlatformLib.h  |  42 
 .../Cpu/Include/Protocol/CpuPolicyProtocol.h  |  95 +
 .../Cpu/Include/Register/CommonMsr.h  |  60 ++
 .../IncludePrivate/Library/CpuInfoFruLib.h|  64 ++
 .../CpuPlatformLibrary.c  |  55 +
 .../CpuPlatformLibrary.h  |  25 +++
 .../PeiDxeSmmCpuPlatformLib.inf   |  41 
 11 files changed, 789 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfigLibPreMemConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuSecurityPreMemConfig.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/CpuRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Library/CpuPlatformLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Protocol/CpuPolicyProtocol.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Register/CommonMsr.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/IncludePrivate/Library/CpuInfoFruLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/CpuPlatformLibrary.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/CpuPlatformLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/PeiDxeSmmCpuPlatformLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
new file mode 100644
index 00..9815f8b185
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
@@ -0,0 +1,86 @@
+/** @file
+  CPU Config Block.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _CPU_CONFIG_H_
+#define _CPU_CONFIG_H_
+
+#define CPU_CONFIG_REVISION 1
+
+extern EFI_GUID gCpuConfigGuid;
+
+#pragma pack (push,1)
+
+/**
+  CPU Configuration Structure.
+
+  Revision 1:
+  - Initial version.
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  UINT32MicrocodePatchRegionSize;
+  EFI_PHYSICAL_ADDRESS  MicrocodePatchAddress;///< Pointer to microcode 
patch that is suitable for this processor.
+  /**
+Enable or Disable Advanced Encryption Standard (AES) feature.
+For some countries, this should be disabled for legal reasons.
+-0: Disable
+- 1: Enable
+  **/
+  UINT32 AesEnable   : 1;
+  /**
+Enable or Disable Trusted Execution Technology (TXT) feature.
+-0: Disable
+- 1: Enable
+  **/
+  UINT32 TxtEnable   : 1;
+  UINT32 SkipMpInit  : 1; ///< For Fsp only, Silicon 
Initialization will skip MP Initialization (including BSP) if enabled. For 
non-FSP, this should always be 0.
+  /**
+Enable or Disable or Auto for PPIN Support to view Protected Processor 
Inventory Number.
+- 0: Disable
+-1: Enable
+-2: Auto : Feature is based on End Of Manufacturing (EOM) flag. If EOM 
is set, it is disabled.
+  **/
+  UINT32 PpinSupport : 2;
+  /**
+Enable or Disable #AC machine check on split lock.
+- 0: Disable
+-1: Enable
+  **/
+  UINT32 AcSplitLock : 1;
+  /**
+  Enable or Disable Avx.
+  -  1: Disable
+  -   0: Enable
+  **/
+  UINT32 AvxDisable  : 1;
+  /**
+  @deprecated
+  Enable or Disable Avx3.
+  -   1: Disable
+  -  0: Enable
+  **/
+  UINT32 Avx3Disable : 1;
+  /**
+Enable or Disable X2APIC Support.
+- 0: Disable
+-1: Enable
+  **/
+  UINT32 X2ApicSupport   : 1;
+  UINT32 RsvdBits: 23;///< Reserved for future use
+  /**
+Provide the option for platform to override the MaxSpeed field of Smbios 
Type 4.
+Value 4000 means 4000MHz.
+If this value is not zero, it dominates the field.
+If this value is zero, CPU RC will update the field according to the max 
radio.
+default is 0.
+  **/
+  UINT16 SmbiosType4MaxSpeedOverride;
+  UINT8  Reserved0[2];///< Reserved for future use
+} CPU_CONFIG;
+
+#pragma pack (pop)
+
+#endif // _CPU_CONFIG_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfigLibPreMemConfig.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Incl

[edk2-devel] [PATCH 6/6] AlderlakeOpenBoardPkg: Add Library Instances

[Saloni Kasbekar]

Adds the following libraries
- BasePlatformHookLib
- DxeAcpiGnvsInitLib
- PeiBoardConfigLib
- PeiGetFvInfoLib
- PeiReportFvLib
- SmmSpiFlashCommonLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePlatformHookLib/BasePlatformHookLib.c |   38 +
 .../BasePlatformHookLib.inf   |   48 +
 .../DxeAcpiGnvsInitLib/DxeAcpiGnvsInitLib.c   |   62 +
 .../DxeAcpiGnvsInitLib/DxeAcpiGnvsInitLib.inf |   34 +
 .../PeiBoardConfigLib/PeiBoardConfigLib.c |  252 
 .../PeiBoardConfigLib/PeiBoardConfigLib.inf   |   73 ++
 .../Library/PeiBoardConfigLib/PeiSpdTables.c  | 1041 +
 .../Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c |   89 ++
 .../PeiGetFvInfoLib/PeiGetFvInfoLib.inf   |   34 +
 .../Library/PeiReportFvLib/PeiReportFvLib.c   |  372 ++
 .../Library/PeiReportFvLib/PeiReportFvLib.inf |   78 ++
 .../SmmSpiFlashCommonLib.inf  |   52 +
 .../SmmSpiFlashCommonLib/SpiFlashCommon.c |  215 
 .../SpiFlashCommonSmmLib.c|   64 +
 14 files changed, 2452 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/DxeAcpiGnvsInitLib/DxeAcpiGnvsInitLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/DxeAcpiGnvsInitLib/DxeAcpiGnvsInitLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiBoardConfigLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiBoardConfigLib/PeiSpdTables.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiGetFvInfoLib/PeiGetFvInfoLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
new file mode 100644
index 00..cccb1e18cc
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c
@@ -0,0 +1,38 @@
+/** @file
+  Platform Hook Library instances
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+
+/**
+  Performs platform specific initialization required for the CPU to access
+  the hardware associated with a SerialPortLib instance.  This function does
+  not initialize the serial port hardware itself.  Instead, it initializes
+  hardware devices that are required for the CPU to access the serial port
+  hardware.  This function may be called more than once.
+
+  @retval RETURN_SUCCESS   The platform specific initialization succeeded.
+  @retval RETURN_DEVICE_ERROR  The platform specific initialization could not 
be completed.
+
+**/
+RETURN_STATUS
+EFIAPI
+PlatformHookSerialPortInitialize (
+  VOID
+  )
+{
+
+  //
+  // Enable I/O decoding for COM1(3F8h-3FFh), COM2(2F8h-2FFh), I/O port 
2Eh/2Fh, 4Eh/4Fh, 60h/64Fh and 62h/66h.
+  //
+  PchLpcIoDecodeRangesSet (PcdGet16 (PcdLpcIoDecodeRange));
+  PchLpcIoEnableDecodingSet (PcdGet16 (PchLpcIoEnableDecoding));
+
+  return RETURN_SUCCESS;
+}
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
new file mode 100644
index 00..19458e7724
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
@@ -0,0 +1,48 @@
+### @file
+# Platform Hook Library instance for Alderlake Mobile/Desktop CRB.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+###
+
+[Defines]
+  INF_VERSION= 0x00010017
+  BASE_NAME  = BasePlatformHookLib
+  FILE_GUID  = E22ADCC6-ED90-4A90-9837-C8E7FF9E963D
+  VERSION_STRING = 1.0
+  MODULE_TYPE= BASE
+  LIBRARY_CLASS  = PlatformHookLib
+#
+# The following information

[edk2-devel] [PATCH 5/6] AlderlakeOpenBoardPkg: Adds the Policy Module

[Saloni Kasbekar]

Adds the following libraries within the Policy module
- DxeSiliconPolicyUpdateLib
- PeiPolicyBoardConfigLib
- PeiPolicyUpdateLib
- PeiSiliconPolicyUpdateLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../DxeCpuPolicyInit.c| 147 +
 .../DxeSaPolicyInit.c |  64 +++
 .../DxeSiliconPolicyInit.c|  49 ++
 .../DxeSiliconPolicyUpdateLate.c  | 122 +
 .../DxeSiliconPolicyUpdateLib.inf |  61 +++
 .../PeiCpuPolicyBoardConfigPreMem.c   |  59 ++
 .../PeiMePolicyBoardConfig.c  |  39 ++
 .../PeiMePolicyBoardConfigPreMem.c|  39 ++
 .../PeiPchPolicyBoardConfigPreMem.c   |  42 ++
 .../PeiPolicyBoardConfig.h|  29 +
 .../PeiPolicyBoardConfigLib.inf   |  72 +++
 .../PeiPolicyBoardConfigLibFsp.inf|  67 +++
 .../PeiSaPolicyBoardConfig.c  |  47 ++
 .../PeiSaPolicyBoardConfigPreMem.c|  48 ++
 .../PeiSiPolicyBoardConfig.c  |  23 +
 .../PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c   | 344 
 .../PeiPolicyUpdateLib/PeiCpuPolicyUpdate.h   |  31 ++
 .../PeiCpuPolicyUpdatePreMem.c| 120 +
 .../PeiPolicyUpdateLib/PeiMePolicyUpdate.c|  65 +++
 .../PeiMePolicyUpdatePreMem.c |  60 +++
 .../PeiPolicyUpdateLib/PeiPchPolicyUpdate.c   | 267 ++
 .../PeiPolicyUpdateLib/PeiPchPolicyUpdate.h   |  34 ++
 .../PeiPchPolicyUpdatePreMem.c| 173 ++
 .../PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 225 
 .../PeiPolicyUpdateLib/PeiSaPolicyUpdate.c| 293 ++
 .../PeiPolicyUpdateLib/PeiSaPolicyUpdate.h|  47 ++
 .../PeiSaPolicyUpdatePreMem.c | 502 ++
 .../PeiPolicyUpdateLib/PeiSiPolicyUpdate.c| 114 
 .../PeiPolicyUpdateLib/PeiSiPolicyUpdate.h|  17 +
 .../PeiSiliconPolicyUpdateLib/PeiCpuPolicy.h  |  22 +
 .../PeiSiliconPolicyUpdateLib/PeiMePolicy.h   |  21 +
 .../PeiSiliconPolicyUpdateLib/PeiPolicy.h |  21 +
 .../PeiSiliconPolicyUpdateLib/PeiSaPolicy.h   |  22 +
 .../PeiSiliconPolicyUpdateLib/PeiSiPolicy.h   |  21 +
 .../PeiSiliconPolicyUpdateLate.c  |  18 +
 .../PeiSiliconPolicyUpdateLib.inf |  67 +++
 .../PeiSiliconPolicyUpdatePostMem.c   |  53 ++
 .../PeiSiliconPolicyUpdatePreMem.c|  49 ++
 38 files changed, 3494 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeCpuPolicyInit.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSiliconPolicyInit.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSiliconPolicyUpdateLate.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSiliconPolicyUpdateLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiCpuPolicyBoardConfigPreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiMePolicyBoardConfig.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiMePolicyBoardConfigPreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiPchPolicyBoardConfigPreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiPolicyBoardConfig.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiPolicyBoardConfigLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiPolicyBoardConfigLibFsp.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiSaPolicyBoardConfig.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiSaPolicyBoardConfigPreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyBoardConfigLib/PeiSiPolicyBoardConfig.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdatePreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiMePolicyUpdate.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiMePolicyUpdatePreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Policy

[edk2-devel] [PATCH 2/6] AlderlakeOpenBoardPkg: Add modules

[Saloni Kasbekar]

Adds the following modules:
-BiosInfo
-OpenBoardPlatformInit
-SBCVpdStructurePcd
-SmmMultiBoardAcpiSupportLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 196 +++
 .../BiosInfo/BiosInfo.inf |  91 
 .../OpenBoardPlatformInitPostMem.c| 499 ++
 .../OpenBoardPlatformInitPostMem.inf  |  84 +++
 .../OpenBoardPlatformInitPreMem.c | 192 +++
 .../OpenBoardPlatformInitPreMem.inf   |  59 +++
 .../OpenBoardPlatformInitSmm.c| 250 +
 .../OpenBoardPlatformInitSmm.h|  50 ++
 .../OpenBoardPlatformInitSmm.inf  |  60 +++
 .../SBCVpdStructurePcd/AllStructPCD.dsc   |  19 +
 .../GpioTableAdlPPostMem.dsc  |  40 ++
 .../GpioTableAdlPPreMem.dsc   |  29 +
 .../MrcDqDqsSPD/AdlPSpdMap.dsc| 138 +
 .../PcieClocks/AdlPPcieClocks.dsc |  32 ++
 .../SmmAcpiEnableLib.c|  51 ++
 .../SmmMultiBoardAcpiSupportLib.c |  89 
 .../SmmMultiBoardAcpiSupportLib.inf   |  40 ++
 .../SmmSiliconAcpiEnableLib.c | 157 ++
 18 files changed, 2076 insertions(+)
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitPei/OpenBoardPlatformInitPostMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitPei/OpenBoardPlatformInitPostMem.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitPei/OpenBoardPlatformInitPreMem.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitPei/OpenBoardPlatformInitPreMem.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitSmm/OpenBoardPlatformInitSmm.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitSmm/OpenBoardPlatformInitSmm.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPlatformInit/OpenBoardPlatformInitSmm/OpenBoardPlatformInitSmm.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/AllStructPCD.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/GpioTableAdlPPostMem.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/GpioTableAdlPPreMem.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/MrcDqDqsSPD/AdlPSpdMap.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SBCVpdStructurePcd/PcieClocks/AdlPPcieClocks.dsc
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SmmMultiBoardAcpiSupportLib/SmmAcpiEnableLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SmmMultiBoardAcpiSupportLib/SmmMultiBoardAcpiSupportLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SmmMultiBoardAcpiSupportLib/SmmMultiBoardAcpiSupportLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/SmmMultiBoardAcpiSupportLib/SmmSiliconAcpiEnableLib.c

diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c 
b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..64462900de
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,196 @@
+/** @file
+  PEIM to provide BiosInfo structure listing up all firmware volume's base 
addresses, sizes,
+  attributes, and information associated to the firmware volume.
+  Primarily the structure is used on FIT table creation and Bpm.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define BASE_FV_SIZE 10
+
+#define FSP_WRAPPER_FV_SIZE 3
+
+#define TSN_MAC_ADDRESS_FV_SIZE 0
+
+#define BIOS_INFO_STRUCT_SIZE (BASE_FV_SIZE + FSP_WRAPPER_FV_SIZE + 
TSN_MAC_ADDRESS_FV_SIZE)
+
+
+/*
+  BIOS_INFO structure is the base of the firmware volume layout for Intel 
platform BIOS implementation
+  so security checker module can run based on the structure and throw 
warnings, error or deadloop
+  when any unexpected firmware volumes are detected.
+
+  BIOS_INFO is recommended to support full entries of firmware volumes present 
in a flash
+  with right type, attribute, version, flash map base address and size,
+  all associated information which is defined by BIOS_INFO_STRUCT structure.
+  - IBB firmware volumes, which are expected to be measured or/and verified
+by hardware base security solution to meet SecureBoot chain of trust
+(Intel BootGuard

[edk2-devel] [PATCH 1/6] AlderlakeOpenBoardPkg: Add package and headers

[Saloni Kasbekar]

Create the AlderlakeOpenBoardPkg to provide board support code. The
package may support Alderlake boards. The package serves as a board
support package in the EDK II Minimum Platform design.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/Library/BoardConfigLib.h  | 157 
 .../Include/Library/DxeAcpiGnvsInitLib.h  |  26 +
 .../Include/Library/PeiGetFvInfoLib.h |  29 +
 .../Include/Library/PeiPolicyBoardConfigLib.h | 108 +++
 .../Include/Library/SpiFlashCommon.h  |  99 +++
 .../AlderlakeOpenBoardPkg/Include/Platform.h  |  24 +
 .../Include/PlatformBoardConfig.h | 130 +++
 .../Include/PlatformBoardId.h |  30 +
 .../Include/PlatformBoardType.h   |  15 +
 .../Include/PlatformGpioConfig.h  |  18 +
 .../Include/PlatformNvsAreaDef.h  | 751 ++
 .../Include/PlatformPostCode.h|  39 +
 .../Include/PolicyUpdateMacro.h   |  48 ++
 .../Include/Protocol/PlatformNvsArea.h|  36 +
 .../AlderlakeOpenBoardPkg/OpenBoardPkg.dec| 605 ++
 15 files changed, 2115 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/DxeAcpiGnvsInitLib.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/PeiGetFvInfoLib.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/PeiPolicyBoardConfigLib.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/SpiFlashCommon.h
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/Include/Platform.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformBoardConfig.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformBoardId.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformBoardType.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformGpioConfig.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformNvsAreaDef.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PlatformPostCode.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/Include/Protocol/PlatformNvsArea.h
 create mode 100644 Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h 
b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h
new file mode 100644
index 00..e782028bed
--- /dev/null
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/Include/Library/BoardConfigLib.h
@@ -0,0 +1,157 @@
+/** @file
+  Function prototype of BoardConfigLib.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _BOARD_CONFIG_LIB_H_
+#define _BOARD_CONFIG_LIB_H_
+
+#include 
+#include 
+
+#define SIZE_OF_FIELD(TYPE, Field) (sizeof (((TYPE *)0)->Field))
+
+#define SIZE_OF_TABLE(TABLE, TYPE) (sizeof (TABLE) / sizeof (TYPE))
+
+//
+// @todo Define BOARD_CONFIG
+//
+#define BOARD_CONFIG PLATFORM_INFO
+
+#define PRE_MEM0
+#define POST_MEM   1
+#define EARLY_PRE_MEM  2
+
+/**
+  Procedure to detect current board HW configuration.
+
+**/
+VOID
+EFIAPI
+GetBoardConfig (
+  VOID
+  );
+
+
+/**
+  Count the number of GPIO settings in the Table.
+
+  @param[in]  GpioTable   The pointer of GPIO config table
+  @param[out] GpioCount   The number of GPIO config entries
+**/
+VOID
+GetGpioTableSize (
+  GPIO_INIT_CONFIG   *GpioTable,
+  OUT UINT16 *GpioCount
+  );
+
+/**
+  Configure GPIO Table setting to PcdBoardGpioTablePreMem && PcdBoardGpioTable
+
+  @param[in]  GpioTable   The pointer of GPIO config table
+  @param[in]  IsPostMem   Is call from PostMem/PreMem
+  True - PostMem, False - PreMem
+**/
+VOID
+ConfigureGpioTabletoPCD(
+  IN GPIO_INIT_CONFIG   *GpioTable,
+  IN UINT16IsPostMem
+  );
+
+/**
+  Configure GPIO pads in PEI phase.
+
+  @param[in]  GpioTable  Pointer to Gpio table
+**/
+VOID
+GpioInit (
+  IN GPIO_INIT_CONFIG *GpioTable
+  );
+
+/**
+  Check if given rootport has device connected and enable wake capability
+
+  @param[in]  RpNum   An unsigned integer represent the root port 
number.
+
+  @retval TRUE if endpoint was connected
+  @retval FALSE if no endpoint was detected
+**/
+BOOLEAN
+IsPcieEndPointPresent (
+  IN UINT8 RpNum
+  );
+
+// LPDDR4 200b 8Gb die, DDP, 2 channels per die, x16
+// Samsung K4F6E304Hx-MGCJ
+// or Hynix H9HCNNNBUUxLHR-NMx
+// or Micron MT53B512M32D2NP-053
+// 3733, 32-34-34-79
+// 2 ranks per channel, 2 SDRAMs per channel, 2x2x8Gb = 4GB total per channel
+extern const UINT8 mLpddr4Ddp8Gb200bSpd;
+
+// L

[edk2-devel] [PATCH 3/6] AlderlakeOpenBoardPkg/AlderlakePRvp: Add library instances

[Saloni Kasbekar]

Adds the following library instances:
* AlderlakePRvp/Library/BoardAcpiLib
* AlderlakePRvp/Library/BoardInitLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/BoardAcpiLib/BaseAcpiTableLib.c   |  30 ++
 .../BaseMultiBoardAcpiSupportLib.c|  53 
 .../BaseMultiBoardAcpiSupportLib.inf  |  43 +++
 .../Library/BoardInitLib/Dxe/DxeInitLib.c | 164 +++
 .../BoardInitLib/Dxe/DxeMultiBoardInitLib.c   |  65 +
 .../BoardInitLib/Dxe/DxeMultiBoardInitlib.inf |  91 ++
 .../BoardInitLib/Pei/BoardPchInitPreMemLib.c  | 131 +
 .../BoardInitLib/Pei/BoardSaConfigPreMem.h|  81 ++
 .../BoardInitLib/Pei/BoardSaInitPreMemLib.c   | 244 
 .../BoardInitLib/Pei/GpioTableAdlPPostMem.h   |  25 ++
 .../Library/BoardInitLib/Pei/PeiDetect.c  |  63 +
 .../BoardInitLib/Pei/PeiInitPostMemLib.c  | 245 
 .../BoardInitLib/Pei/PeiInitPreMemLib.c   | 261 ++
 .../Pei/PeiMultiBoardInitPostMemLib.c |  50 
 .../Pei/PeiMultiBoardInitPostMemLib.inf   | 111 
 .../Pei/PeiMultiBoardInitPreMemLib.c  |  88 ++
 .../Pei/PeiMultiBoardInitPreMemLib.inf| 210 ++
 17 files changed, 1955 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Dxe/DxeInitLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Dxe/DxeMultiBoardInitLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Dxe/DxeMultiBoardInitlib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardPchInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardSaConfigPreMem.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardSaInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/GpioTableAdlPPostMem.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiDetect.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiInitPostMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPostMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPostMemLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPreMemLib.inf

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
new file mode 100644
index 00..c8154b84c7
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
@@ -0,0 +1,30 @@
+/** @file
+  Board ACPI Table Library
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  Update ACPI Table
+
+  @param[in, out]  TablePointer to table, need to be update in Acpi table.
+  @param[in, out]  Version  ACPI table version
+
+  @retval EFI_SUCCESS   The function always return successfully.
+**/
+EFI_STATUS
+EFIAPI
+AdlPBoardUpdateAcpiTable (
+  IN OUT EFI_ACPI_COMMON_HEADER   *Table,
+  IN OUT EFI_ACPI_TABLE_VERSION   *Version
+  )
+{
+  return EFI_SUCCESS;
+}
+
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
new file mode 100644
index 00..c78bee4b0a
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
@@ -0,0 +1,53 @@
+/** @file
+  Multi-Board ACPI Support Library
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include

[edk2-devel] [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and reviewers

[Saloni Kasbekar]

Add Zack, Saloni and remove unused IDs

Cc: Michael D Kinney 
Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Zachary Clark-willilams 
Signed-off-by: Saloni Kasbekar 
---
 Maintainers.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index 42e40dced3c7..cf40934acc82 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -465,8 +465,8 @@ R: James Lu  [jameslu8]
 NetworkPkg
 F: NetworkPkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
-M: Maciej Rabeda  [mrabeda]
-R: Siyuan Fu  [sfu5]
+R: Saloni Kasbekar  [SaloniKasbekar]
+R: Zachary Clark-williams  [Zclarkwilliams]
 
 OvmfPkg
 F: OvmfPkg/
-- 
2.36.1.windows.1



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Re: [edk2-devel] [edk2-platforms] AlderlakeOpenBoardPkg/AlderlakePRvp: Add library instances

[Saloni Kasbekar]

Hi Pedro,

Yes, this is. I will be sending more patches over the next few days to add 
support for Intel Alderlake platform in edk2-platforms.

Thanks,
Saloni

-Original Message-
From: Pedro Falcato  
Sent: Tuesday, June 6, 2023 1:59 PM
To: devel@edk2.groups.io; Kasbekar, Saloni 
Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L 
; Oram, Isaac W ; 
Chuang, Rosen 
Subject: Re: [edk2-devel] [edk2-platforms] AlderlakeOpenBoardPkg/AlderlakePRvp: 
Add library instances

On Tue, Jun 6, 2023 at 8:41 PM Saloni Kasbekar  
wrote:
>
> Adds the following library instances:
> AlderlakePRvp/Library/BoardAcpiLib
> AlderlakePRvp/Library/BoardInitLib

Hi Saloni,

Thanks for the patch. Is this part of a larger series? There's no 
AlderlakeOpenBoardPkg in-tree, and this patch does nothing except adding two 
libs for a platform that's not in-tree.

--
Pedro


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[edk2-devel] [edk2-platforms] AlderlakeOpenBoardPkg/AlderlakePRvp: Add library instances

[Saloni Kasbekar]

Adds the following library instances:
AlderlakePRvp/Library/BoardAcpiLib
AlderlakePRvp/Library/BoardInitLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/BoardAcpiLib/BaseAcpiTableLib.c   |  30 ++
 .../BaseMultiBoardAcpiSupportLib.c|  53 +++
 .../BaseMultiBoardAcpiSupportLib.inf  |  43 +++
 .../Library/BoardInitLib/Dxe/DxeInitLib.c | 178 ++
 .../BoardInitLib/Dxe/DxeMultiBoardInitLib.c   |  65 
 .../BoardInitLib/Dxe/DxeMultiBoardInitlib.inf |  97 ++
 .../BoardInitLib/Pei/BoardPchInitPreMemLib.c  | 131 
 .../BoardInitLib/Pei/BoardSaConfigPreMem.h|  81 +
 .../BoardInitLib/Pei/BoardSaInitPreMemLib.c   | 245 ++
 .../BoardInitLib/Pei/GpioTableAdlPPostMem.h   |  25 ++
 .../Library/BoardInitLib/Pei/PeiDetect.c  |  63 
 .../BoardInitLib/Pei/PeiInitPostMemLib.c  | 306 ++
 .../BoardInitLib/Pei/PeiInitPreMemLib.c   | 236 ++
 .../Pei/PeiMultiBoardInitPostMemLib.c |  50 +++
 .../Pei/PeiMultiBoardInitPostMemLib.inf   | 156 +
 .../Pei/PeiMultiBoardInitPreMemLib.c  | 105 ++
 .../Pei/PeiMultiBoardInitPreMemLib.inf| 230 +
 17 files changed, 2094 insertions(+)
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Dxe/DxeInitLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Dxe/DxeMultiBoardInitLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Dxe/DxeMultiBoardInitlib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardPchInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardSaConfigPreMem.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/BoardSaInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/GpioTableAdlPPostMem.h
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiDetect.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiInitPostMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPostMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPostMemLib.inf
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPreMemLib.c
 create mode 100644 
Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardInitLib/Pei/PeiMultiBoardInitPreMemLib.inf

diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
new file mode 100644
index 00..c8154b84c7
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseAcpiTableLib.c
@@ -0,0 +1,30 @@
+/** @file
+  Board ACPI Table Library
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+
+/**
+  Update ACPI Table
+
+  @param[in, out]  TablePointer to table, need to be update in Acpi table.
+  @param[in, out]  Version  ACPI table version
+
+  @retval EFI_SUCCESS   The function always return successfully.
+**/
+EFI_STATUS
+EFIAPI
+AdlPBoardUpdateAcpiTable (
+  IN OUT EFI_ACPI_COMMON_HEADER   *Table,
+  IN OUT EFI_ACPI_TABLE_VERSION   *Version
+  )
+{
+  return EFI_SUCCESS;
+}
+
diff --git 
a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
new file mode 100644
index 00..c78bee4b0a
--- /dev/null
+++ 
b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Library/BoardAcpiLib/BaseMultiBoardAcpiSupportLib.c
@@ -0,0 +1,53 @@
+/** @file
+  Multi-Board ACPI Support Library
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include

[edk2-devel] [edk2-staging/Intel/HttpProxy] Introduction of new branch

[Saloni Kasbekar]

Hello EDK2 Community,

The "Intel/HttpProxy" branch was created in edk2-staging repository.
Role of this branch is to intercept HTTP Proxy feature for Intel product 
intercept. The branch is based on edk2-staging/HttpProxy branch that follows 
the code first process for HTTP Proxy feature development and UEFI 
specification update.

Link to branch: https://github.com/tianocore/edk2-staging/tree/Intel/HttpProxy
Base edk2 commit: 
https://github.com/tianocore/edk2/commit/2c17d676e402d75a3a674499342f7ddaccf387bd

Relevant BZs:
https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Thanks,
Saloni Kasbekar


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[edk2-devel] Request for access to create edk2-staging branch

[Saloni Kasbekar]

Hi,

I would like to request write access to edk2-staging repository to create a new 
staging branch for Intel's product intercept for HTTP Proxy feature. Currently 
HttpProxy (https://github.com/tianocore/edk2-staging/tree/HttpProxy) is used as 
a staging branch for the code first process to enable HTTP Proxy feature which 
requires UEFI specification update. We'd like to create a separate branch to be 
used for product intercept.

Please let me know if you require any additional information or if there are 
any steps I need to take in order to gain access.

Thanks,
Saloni Kasbekar


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[edk2-devel] [edk2-staging/HttpProxy PATCH v3 7/7] NetworkPkg/HttpBootDxe: Add Proxy URI input in setup menu

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Allows users to input the Proxy Server URI in the
HTTP setup menu

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootConfig.c   | 99 ++-
 .../HttpBootDxe/HttpBootConfigNVDataStruc.h   |  4 +-
 .../HttpBootDxe/HttpBootConfigStrings.uni |  2 +
 NetworkPkg/HttpBootDxe/HttpBootConfigVfr.vfr  |  9 ++
 4 files changed, 88 insertions(+), 26 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootConfig.c 
b/NetworkPkg/HttpBootDxe/HttpBootConfig.c
index 42d3fdc1fb..2cdd5043fe 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootConfig.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootConfig.c
@@ -18,6 +18,7 @@ CHAR16  mHttpBootConfigStorageName[] = 
L"HTTP_BOOT_CONFIG_IFR_NVDATA";
   @param[in]  UsingIpv6   Set to TRUE if creating boot option for IPv6.
   @param[in]  Description The description text of the boot option.
   @param[in]  Uri The URI string of the boot file.
+  @param[in]  ProxyUriThe Proxy URI string for the boot path.
 
   @retval EFI_SUCCESS The boot option is created successfully.
   @retval Others  Failed to create new boot option.
@@ -28,48 +29,59 @@ HttpBootAddBootOption (
   IN   HTTP_BOOT_PRIVATE_DATA  *Private,
   IN   BOOLEAN UsingIpv6,
   IN   CHAR16  *Description,
-  IN   CHAR16  *Uri
+  IN   CHAR16  *Uri,
+  IN   CHAR16  *ProxyUri
   )
 {
   EFI_DEV_PATH  *Node;
   EFI_DEVICE_PATH_PROTOCOL  *TmpDevicePath;
   EFI_DEVICE_PATH_PROTOCOL  *NewDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL  *FinalDevicePath;
   UINTN Length;
   CHAR8 AsciiUri[URI_STR_MAX_SIZE];
+  CHAR8 AsciiProxyUri[URI_STR_MAX_SIZE];
+  UINTN AsciiProxyUriSize;
   EFI_STATUSStatus;
-  UINTN Index;
   EFI_BOOT_MANAGER_LOAD_OPTION  NewOption;
 
-  NewDevicePath = NULL;
-  Node  = NULL;
-  TmpDevicePath = NULL;
+  NewDevicePath   = NULL;
+  Node= NULL;
+  TmpDevicePath   = NULL;
+  FinalDevicePath = NULL;
 
   if (StrLen (Description) == 0) {
 return EFI_INVALID_PARAMETER;
   }
 
   //
-  // Convert the scheme to all lower case.
+  // Check the URI Scheme
   //
-  for (Index = 0; Index < StrLen (Uri); Index++) {
-if (Uri[Index] == L':') {
-  break;
+  UnicodeStrToAsciiStrS (Uri, AsciiUri, sizeof (AsciiUri));
+  UnicodeStrToAsciiStrS (ProxyUri, AsciiProxyUri, sizeof (AsciiProxyUri));
+  Status = HttpBootCheckUriScheme (AsciiUri);
+  if (EFI_ERROR (Status)) {
+if (Status == EFI_INVALID_PARAMETER) {
+  DEBUG ((DEBUG_ERROR, "Error: Invalid URI address.\n"));
+} else if (Status == EFI_ACCESS_DENIED) {
+  DEBUG ((DEBUG_ERROR, "Error: Access forbidden, only HTTPS connection is 
allowed.\n"));
 }
 
-if ((Uri[Index] >= L'A') && (Uri[Index] <= L'Z')) {
-  Uri[Index] -= (CHAR16)(L'A' - L'a');
-}
+return Status;
   }
 
-  //
-  // Only accept empty URI, or http and https URI.
-  //
-  if ((StrLen (Uri) != 0) && (StrnCmp (Uri, L"http://;, 7) != 0) && (StrnCmp 
(Uri, L"https://;, 8) != 0)) {
-return EFI_INVALID_PARAMETER;
+  Status = HttpBootCheckUriScheme (AsciiProxyUri);
+  if (EFI_ERROR (Status)) {
+if (Status == EFI_INVALID_PARAMETER) {
+  DEBUG ((DEBUG_ERROR, "Error: Invalid URI address.\n"));
+} else if (Status == EFI_ACCESS_DENIED) {
+  DEBUG ((DEBUG_ERROR, "Error: Access forbidden, only HTTPS connection is 
allowed.\n"));
+}
+
+return Status;
   }
 
   //
-  // Create a new device path by appending the IP node and URI node to
+  // Create a new device path by appending the IP node, Proxy node and URI 
node to
   // the driver's parent device path
   //
   if (!UsingIpv6) {
@@ -100,15 +112,43 @@ HttpBootAddBootOption (
 return EFI_OUT_OF_RESOURCES;
   }
 
+  //
+  // Update the Proxy node with the input Proxy URI
+  //
+  if (StrLen (ProxyUri) != 0) {
+AsciiProxyUriSize = AsciiStrSize (AsciiProxyUri);
+Length= sizeof (EFI_DEVICE_PATH_PROTOCOL) + AsciiProxyUriSize;
+Node  = AllocatePool (Length);
+if (Node == NULL) {
+  Status = EFI_OUT_OF_RESOURCES;
+  goto ON_EXIT;
+}
+
+Node->DevPath.Type= MESSAGING_DEVICE_PATH;
+Node->DevPath.SubType = MSG_URI_DP;
+SetDevicePathNodeLength (Node, Length);
+CopyMem (
+  (UINT8 *)Node + sizeof (EFI_DEVICE_PATH_PROTOCOL),
+  AsciiProxyUri,
+  AsciiProxyUriSize
+  );
+NewDevicePath = AppendDevicePathNode (TmpDevicePath, 
(EFI_DEVICE_PATH_PROTOCOL *)Node);
+FreePool (Node);
+if (NewDevicePath == NULL) {
+  Status = EFI_OUT_OF_RESOURCES;
+  goto ON_EXIT;
+}
+ 

[edk2-devel] [edk2-staging/HttpProxy PATCH v3 5/7] NetworkPkg: Add support for HTTP CONNECT Method

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add support for the HTTP CONNECT method to request the Proxy Server
to open a tunnel to the EndPoint Server

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootClient.c| 176 +
 NetworkPkg/HttpBootDxe/HttpBootClient.h|  15 ++
 NetworkPkg/HttpBootDxe/HttpBootImpl.c  |  16 +-
 NetworkPkg/HttpBootDxe/HttpBootImpl.h  |   1 +
 NetworkPkg/HttpDxe/HttpDriver.h|   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf |   1 +
 NetworkPkg/HttpDxe/HttpImpl.c  | 151 ++
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c |   5 +
 8 files changed, 335 insertions(+), 32 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index b13155b576..b4d02eaff2 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootClient.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootClient.c
@@ -905,6 +905,182 @@ HttpBootGetBootFileCallback (
   return EFI_SUCCESS;
 }
 
+/**
+  This function establishes a connection through a proxy server
+
+  @param[in]   Private The pointer to the driver's private data.
+
+  @retval EFI_SUCCESS  Connection successful.
+  @retval EFI_OUT_OF_RESOURCES Could not allocate needed resources
+  @retval Others   Unexpected error happened.
+
+**/
+EFI_STATUS
+HttpBootConnectProxy (
+  IN HTTP_BOOT_PRIVATE_DATA  *Private
+  )
+{
+  EFI_STATUS Status;
+  EFI_HTTP_STATUS_CODE   StatusCode;
+  CHAR8  *HostName;
+  EFI_HTTP_REQUEST_DATA  *RequestData;
+  HTTP_IO_RESPONSE_DATA  *ResponseData;
+  HTTP_IO*HttpIo;
+  HTTP_IO_HEADER *HttpIoHeader;
+  CHAR16 *Url;
+  CHAR16 *ProxyUrl;
+  UINTN  UrlSize;
+
+  Url  = NULL;
+  ProxyUrl = NULL;
+  RequestData  = NULL;
+  ResponseData = NULL;
+  HttpIoHeader = NULL;
+
+  UrlSize = AsciiStrSize (Private->BootFileUri);
+  Url = AllocatePool (UrlSize * sizeof (CHAR16));
+  if (Url == NULL) {
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  AsciiStrToUnicodeStrS (Private->BootFileUri, Url, UrlSize);
+
+  UrlSize  = AsciiStrSize (Private->ProxyUri);
+  ProxyUrl = AllocatePool (UrlSize * (sizeof (CHAR16)));
+  if (ProxyUrl == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  AsciiStrToUnicodeStrS (Private->ProxyUri, ProxyUrl, UrlSize);
+
+  //
+  // Send HTTP request message.
+  //
+
+  //
+  // Build HTTP header for the request, 2 headers are needed to send a CONNECT 
method:
+  //   Host
+  //   User
+  //
+  HttpIoHeader = HttpIoCreateHeader (2);
+  if (HttpIoHeader == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  //
+  // Add HTTP header field 1: Host (EndPoint URI)
+  //
+  HostName = NULL;
+  Status   = HttpUrlGetHostName (
+   Private->BootFileUri,
+   Private->BootFileUriParser,
+   
+   );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  Status = HttpIoSetHeader (
+ HttpIoHeader,
+ HTTP_HEADER_HOST,
+ HostName
+ );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  //
+  // Add HTTP header field 2: User-Agent
+  //
+  Status = HttpIoSetHeader (
+ HttpIoHeader,
+ HTTP_HEADER_USER_AGENT,
+ HTTP_USER_AGENT_EFI_HTTP_BOOT
+ );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  //
+  // Build the rest of HTTP request info.
+  //
+  RequestData = AllocatePool (sizeof (EFI_HTTP_REQUEST_DATA));
+  if (RequestData == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  RequestData->Method   = HttpMethodConnect;
+  RequestData->ProxyUrl = ProxyUrl;
+  RequestData->Url  = Url;
+
+  //
+  // Send out the request to HTTP server.
+  //
+  HttpIo = >HttpIo;
+  Status = HttpIoSendRequest (
+ HttpIo,
+ RequestData,
+ HttpIoHeader->HeaderCount,
+ HttpIoHeader->Headers,
+ 0,
+ NULL
+ );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  //
+  // Receive HTTP response message.
+  //
+
+  //
+  // Use zero BodyLength to only receive the response headers.
+  //
+  ResponseData = AllocateZeroPool (sizeof (HTTP_IO_RESPONSE_DATA));
+  if (ResponseData == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  Status = HttpIoRecvResponse (
+ >HttpIo,
+ TRUE,
+ ResponseData
+ );
+
+  if (EFI_ERROR (Status) || EFI_ERROR (ResponseData->Status)) {
+if (EFI_ERROR (ResponseData->Status)) {
+  StatusCode = HttpIo->RspToken.Message->Data.Response->StatusCode;
+  HttpBootPrintErrorMessage (StatusCode);
+  Status = ResponseData->Status;
+}
+  }
+
+EXIT:
+  if (ResponseData != NULL) {
+F

[edk2-devel] [edk2-staging/HttpProxy PATCH v3 6/7] NetworkPkg/HttpDxe: Support HTTPS EndPoint server with Proxy

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add support for Proxy server to connect to a HTTPS EndPoint server.
TLS Connection to be created during GET/HEAD after CONNECT method.

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpDxe/HttpImpl.c |  9 +++
 NetworkPkg/HttpDxe/HttpProto.c| 40 ++-
 NetworkPkg/HttpDxe/HttpProto.h|  8 +--
 NetworkPkg/HttpDxe/HttpsSupport.c | 16 +
 4 files changed, 46 insertions(+), 27 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpImpl.c b/NetworkPkg/HttpDxe/HttpImpl.c
index 2a305e0864..f7d6a4c8f6 100644
--- a/NetworkPkg/HttpDxe/HttpImpl.c
+++ b/NetworkPkg/HttpDxe/HttpImpl.c
@@ -511,9 +511,10 @@ EfiHttpRequest (
   if ((HttpInstance->ConnectionClose == FALSE) &&
   (HttpInstance->RemotePort == RemotePort) &&
   (AsciiStrCmp (HttpInstance->RemoteHost, HostName) == 0) &&
-  (!HttpInstance->UseHttps || (HttpInstance->UseHttps &&
-   !TlsConfigure &&
-   (HttpInstance->TlsSessionState == 
EfiTlsSessionDataTransferring
+  (!HttpInstance->UseHttps ||
+   HttpInstance->ProxyConnected || (HttpInstance->UseHttps &&
+!TlsConfigure &&
+(HttpInstance->TlsSessionState == 
EfiTlsSessionDataTransferring
   {
 //
 // Host Name and port number of the request URL are the same with 
previous call to Request().
@@ -666,7 +667,7 @@ EfiHttpRequest (
 goto Error2;
   }
 
-  if (!Configure && !ReConfigure && !TlsConfigure) {
+  if ((!Configure && !ReConfigure) && ((HttpInstance->ProxyConnected && 
TlsConfigure) || (!TlsConfigure))) {
 //
 // For the new HTTP token, create TX TCP token events.
 //
diff --git a/NetworkPkg/HttpDxe/HttpProto.c b/NetworkPkg/HttpDxe/HttpProto.c
index 6767d90c7d..cc69401943 100644
--- a/NetworkPkg/HttpDxe/HttpProto.c
+++ b/NetworkPkg/HttpDxe/HttpProto.c
@@ -1222,6 +1222,7 @@ HttpConfigureTcp6 (
   connect one TLS session if required.
 
   @param[in]  HttpInstance   The HTTP instance private data.
+  @param[in]  TlsConfigure   The Flag indicates whether it's the new Tls 
session.
 
   @retval EFI_SUCCESSThe TCP connection is established.
   @retval EFI_NOT_READY  TCP4 protocol child is not created or 
configured.
@@ -1230,7 +1231,8 @@ HttpConfigureTcp6 (
 **/
 EFI_STATUS
 HttpConnectTcp4 (
-  IN  HTTP_PROTOCOL  *HttpInstance
+  IN  HTTP_PROTOCOL  *HttpInstance,
+  IN  BOOLEANTlsConfigure
   )
 {
   EFI_STATUS Status;
@@ -1253,16 +1255,18 @@ HttpConnectTcp4 (
 return Status;
   }
 
-  if (Tcp4State == Tcp4StateEstablished) {
+  if ((Tcp4State == Tcp4StateEstablished) && (!HttpInstance->ProxyConnected || 
!TlsConfigure)) {
 return EFI_SUCCESS;
-  } else if (Tcp4State > Tcp4StateEstablished ) {
+  } else if (Tcp4State > Tcp4StateEstablished) {
 HttpCloseConnection (HttpInstance);
   }
 
-  Status = HttpCreateConnection (HttpInstance);
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "Tcp4 Connection fail - %x\n", Status));
-return Status;
+  if (!HttpInstance->ProxyConnected) {
+Status = HttpCreateConnection (HttpInstance);
+if (EFI_ERROR (Status)) {
+  DEBUG ((DEBUG_ERROR, "Tcp4 Connection fail - %x\n", Status));
+  return Status;
+}
   }
 
   //
@@ -1314,6 +1318,7 @@ HttpConnectTcp4 (
   connect one TLS session if required.
 
   @param[in]  HttpInstance   The HTTP instance private data.
+  @param[in]  TlsConfigure   The Flag indicates whether it's the new Tls 
session.
 
   @retval EFI_SUCCESSThe TCP connection is established.
   @retval EFI_NOT_READY  TCP6 protocol child is not created or 
configured.
@@ -1322,7 +1327,8 @@ HttpConnectTcp4 (
 **/
 EFI_STATUS
 HttpConnectTcp6 (
-  IN  HTTP_PROTOCOL  *HttpInstance
+  IN  HTTP_PROTOCOL  *HttpInstance,
+  IN  BOOLEANTlsConfigure
   )
 {
   EFI_STATUS Status;
@@ -1346,16 +1352,18 @@ HttpConnectTcp6 (
 return Status;
   }
 
-  if (Tcp6State == Tcp6StateEstablished) {
+  if ((Tcp6State == Tcp6StateEstablished) && (!HttpInstance->ProxyConnected || 
!TlsConfigure)) {
 return EFI_SUCCESS;
-  } else if (Tcp6State > Tcp6StateEstablished ) {
+  } else if (Tcp6State > Tcp6StateEstablished) {
 HttpCloseConnection (HttpInstance);
   }
 
-  Status = HttpCreateConnection (HttpInstance);
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "Tcp6 Connection fail - %x\n", Status));
-return Status;
+  if (!HttpInstance->ProxyConnected) {
+Status = HttpCreateConnection (HttpInstance);
+if (EFI_ERROR (Status)) {

[edk2-devel] [edk2-staging/HttpProxy PATCH v3 4/7] NetworkPkg: Add Proxy Support to HTTP_PROTOCOL

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Update HTTP Protocol with variables to support Proxy
Use state machine to call HttpBootGetBootFile()
Add switch/case for EfiHttpRequest request method

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 178 +-
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   7 +
 NetworkPkg/HttpDxe/HttpImpl.c |  59 +++--
 NetworkPkg/HttpDxe/HttpProto.c|  18 ++-
 NetworkPkg/HttpDxe/HttpProto.h|   9 ++
 5 files changed, 199 insertions(+), 72 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootImpl.c 
b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
index 5735b96d9e..4748de0603 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootImpl.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
@@ -278,6 +278,122 @@ HttpBootDhcp (
   return Status;
 }
 
+/**
+  Issue calls to HttpBootGetBootFile() based on current Boot File State
+
+  @param[in]  Private The pointer to the driver's private data.
+  @param[in, out] BufferSize  On input the size of Buffer in bytes. On 
output with a return
+  code of EFI_SUCCESS, the amount of data 
transferred to
+  Buffer. On output with a return code of 
EFI_BUFFER_TOO_SMALL,
+  the size of Buffer required to retrieve 
the requested file.
+  @param[in]  Buffer  The memory buffer to transfer the file 
to. If Buffer is NULL,
+  then the size of the requested file is 
returned in
+  BufferSize.
+  @param[out] ImageType   The image type of the downloaded file.
+
+  @retval EFI_SUCCESS  The file was loaded.
+  @retval EFI_INVALID_PARAMETERBufferSize is NULL or Buffer Size is not 
NULL but Buffer is NULL.
+  @retval EFI_OUT_OF_RESOURCES Could not allocate needed resources
+  @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the 
current directory entry.
+   BufferSize has been updated with the size 
needed to complete
+   the request.
+  @retval EFI_ACCESS_DENIEDServer authentication failed.
+  @retval Others   Unexpected error happened.
+
+**/
+EFI_STATUS
+HttpBootGetBootFileCaller (
+  IN HTTP_BOOT_PRIVATE_DATA  *Private,
+  IN OUT UINTN   *BufferSize,
+  IN VOID*BufferOPTIONAL,
+  OUT HTTP_BOOT_IMAGE_TYPE   *ImageType
+  )
+{
+  HTTP_GET_BOOT_FILE_STATE  State;
+  EFI_STATUSStatus;
+
+  if (Private->BootFileSize == 0) {
+State = GetBootFileHead;
+  } else {
+State = LoadBootFile;
+  }
+
+  for ( ; ;) {
+switch (State) {
+  case GetBootFileHead:
+//
+// Try to use HTTP HEAD method.
+//
+Status = HttpBootGetBootFile (
+   Private,
+   TRUE,
+   >BootFileSize,
+   NULL,
+   >ImageType
+   );
+if ((EFI_ERROR (Status)) && (Status != EFI_BUFFER_TOO_SMALL)) {
+  if ((Private->AuthData != NULL) && (Status == EFI_ACCESS_DENIED)) {
+//
+// Try to use HTTP HEAD method again since the Authentication 
information is provided.
+//
+State = GetBootFileHead;
+  } else {
+State = GetBootFileGet;
+  }
+} else {
+  State = LoadBootFile;
+}
+
+break;
+
+  case GetBootFileGet:
+//
+// Failed to get file size by HEAD method, may be trunked encoding, 
try HTTP GET method.
+//
+ASSERT (Private->BootFileSize == 0);
+Status = HttpBootGetBootFile (
+   Private,
+   FALSE,
+   >BootFileSize,
+   NULL,
+   >ImageType
+   );
+if (EFI_ERROR (Status) && (Status != EFI_BUFFER_TOO_SMALL)) {
+  State = GetBootFileError;
+} else {
+  State = LoadBootFile;
+}
+
+break;
+
+  case LoadBootFile:
+if (*BufferSize < Private->BootFileSize) {
+  *BufferSize = Private->BootFileSize;
+  *ImageType  = Private->ImageType;
+  Status  = EFI_BUFFER_TOO_SMALL;
+  return Status;
+}
+
+//
+// Load the boot file into Buffer
+//
+Status = HttpBootGetBootFile (
+   Private,
+   FALSE,
+   BufferSize,
+   Buffer,
+   ImageType
+   );
+return Status;
+
+  case GetBootFileError:
+  default:
+AsciiPrint ("\n  Error: Could not retrieve NBP file size from HTTP 
server.

[edk2-devel] [edk2-staging/HttpProxy PATCH v3 3/7] NetworkPkg/HttpBootDxe: Update HTTP Boot Driver with parsed Proxy URL

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add ProxyUri to HTTP_BOOT_PRIVATE_DATA
Parse HTTP Boot Device path to process Proxy and EndPoint URLs

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootClient.c  |  30 -
 NetworkPkg/HttpBootDxe/HttpBootDxe.h |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c|  57 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c | 154 +--
 NetworkPkg/HttpBootDxe/HttpBootSupport.h |  13 +-
 5 files changed, 189 insertions(+), 71 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index 40f64fcb6b..b13155b576 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootClient.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootClient.c
@@ -678,6 +678,10 @@ HttpBootFreeCache (
 FreePool (Cache->RequestData->Url);
   }
 
+  if (Cache->RequestData->ProxyUrl != NULL) {
+FreePool (Cache->RequestData->ProxyUrl);
+  }
+
   FreePool (Cache->RequestData);
 }
 
@@ -950,6 +954,7 @@ HttpBootGetBootFile (
   UINT8*Block;
   UINTNUrlSize;
   CHAR16   *Url;
+  CHAR16   *ProxyUrl;
   BOOLEAN  IdentityMode;
   UINTNReceivedSize;
   CHAR8BaseAuthValue[80];
@@ -989,6 +994,22 @@ HttpBootGetBootFile (
   // Not found in cache, try to download it through HTTP.
   //
 
+  //
+  // Initialize ProxyUrl - Set to NULL if connecting without Proxy
+  //
+  if (Private->ProxyUri != NULL) {
+UrlSize  = AsciiStrSize (Private->ProxyUri);
+ProxyUrl = AllocatePool (UrlSize * (sizeof (CHAR16)));
+if (ProxyUrl == NULL) {
+  Status = EFI_OUT_OF_RESOURCES;
+  goto ERROR_1;
+}
+
+AsciiStrToUnicodeStrS (Private->ProxyUri, ProxyUrl, UrlSize);
+  } else {
+ProxyUrl = NULL;
+  }
+
   //
   // 1. Create a temp cache item for the requested URI if caller doesn't 
provide buffer.
   //
@@ -1106,8 +1127,9 @@ HttpBootGetBootFile (
 goto ERROR_3;
   }
 
-  RequestData->Method = HeaderOnly ? HttpMethodHead : HttpMethodGet;
-  RequestData->Url= Url;
+  RequestData->Method   = HeaderOnly ? HttpMethodHead : HttpMethodGet;
+  RequestData->Url  = Url;
+  RequestData->ProxyUrl = ProxyUrl;
 
   //
   // 2.3 Record the request info in a temp cache item.
@@ -1441,6 +1463,10 @@ ERROR_2:
   }
 
 ERROR_1:
+  if (ProxyUrl != NULL) {
+FreePool (ProxyUrl);
+  }
+
   if (Url != NULL) {
 FreePool (Url);
   }
diff --git a/NetworkPkg/HttpBootDxe/HttpBootDxe.h 
b/NetworkPkg/HttpBootDxe/HttpBootDxe.h
index 5ff8ad4698..8caf2e9a45 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootDxe.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootDxe.h
@@ -223,6 +223,12 @@ struct _HTTP_BOOT_PRIVATE_DATA {
   CHAR8*FilePathUri;
   VOID *FilePathUriParser;
 
+  //
+  // URI string for the Proxy host if BootFileUri contains a Proxy
+  // URI in the path
+  //
+  CHAR8*ProxyUri;
+
   //
   // Cached HTTP data
   //
diff --git a/NetworkPkg/HttpBootDxe/HttpBootImpl.c 
b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
index b4c61925b9..5735b96d9e 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootImpl.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
@@ -115,19 +115,21 @@ HttpBootStart (
 {
   UINTN   Index;
   EFI_STATUS  Status;
-  CHAR8   *Uri;
+  CHAR8   *ProxyUri;
+  CHAR8   *EndPointUri;
 
-  Uri = NULL;
+  ProxyUri= NULL;
+  EndPointUri = NULL;
 
   if ((Private == NULL) || (FilePath == NULL)) {
 return EFI_INVALID_PARAMETER;
   }
 
   //
-  // Check the URI in the input FilePath, in order to see whether it is
+  // Check the URIs in the input FilePath, in order to see whether it is
   // required to boot from a new specified boot file.
   //
-  Status = HttpBootParseFilePath (FilePath, );
+  Status = HttpBootParseFilePath (FilePath, , );
   if (EFI_ERROR (Status)) {
 return EFI_INVALID_PARAMETER;
   }
@@ -143,28 +145,21 @@ HttpBootStart (
 // recorded before.
 //
 if ((UsingIpv6 != Private->UsingIpv6) ||
-((Uri != NULL) && (AsciiStrCmp (Private->BootFileUri, Uri) != 0)))
+((EndPointUri != NULL) && (AsciiStrCmp (Private->BootFileUri, 
EndPointUri) != 0)))
 {
   //
   // Restart is required, first stop then continue this start function.
   //
   Status = HttpBootStop (Private);
   if (EFI_ERROR (Status)) {
-if (Uri != NULL) {
-  FreePool (Uri);
-}
-
-return Status;
+goto ERROR;
   }
 } else {
   //
   // Restart is not required.
   //
-  if (Uri != NULL) {
-FreePool (Uri);
-  }
-
-  return EFI_ALREADY_STARTED;
+  Status = EFI_ALREADY_STARTED;
+  goto ERROR;
 }
   }
 
@@ -176,17 +171,16 @

[edk2-devel] [edk2-staging/HttpProxy PATCH v3 2/7] MdePkg/Include: Add Proxy Server URL in EFI_HTTP_REQUEST_DATA

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add Proxy Server URL to EFI_HTTP_REQUEST_DATA.
This will be used when a Proxy Server URL is a part of the
HTTP Boot device path.

Cc: Zhiguang Liu 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Maciej Rabeda 
Signed-off-by: Saloni Kasbekar 
---
 MdePkg/Include/Protocol/Http.h | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/Protocol/Http.h b/MdePkg/Include/Protocol/Http.h
index 28e6221593..9ee08baa14 100644
--- a/MdePkg/Include/Protocol/Http.h
+++ b/MdePkg/Include/Protocol/Http.h
@@ -188,9 +188,17 @@ typedef struct {
   /// The URI of a remote host. From the information in this field, the HTTP 
instance
   /// will be able to determine whether to use HTTP or HTTPS and will also be 
able to
   /// determine the port number to use. If no port number is specified, port 
80 (HTTP)
-  /// is assumed. See RFC 3986 for more details on URI syntax.
+  /// or 443 (HTTPS) is assumed. See RFC 3986 for more details on URI syntax.
   ///
   CHAR16 *Url;
+  ///
+  /// The URI of an Proxy Host. This field will be NULL if there is no Proxy 
Host
+  /// in the device path. From the information in this field, the HTTP 
instance will
+  /// be able to determine whether to use HTTP or HTTPS and will also be able 
to
+  /// determine the port number to use. If no port number is specified, port 
80 (HTTP)
+  /// or 443 (HTTPS) is assumed. See RFC 3986 for more details on URI syntax.
+  ///
+  CHAR16 *ProxyUrl;
 } EFI_HTTP_REQUEST_DATA;
 
 ///
-- 
2.36.1.windows.1



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[edk2-devel] [edk2-staging/HttpProxy PATCH v3 1/7] MdeModulePkg/Library: Support multi-URI HTTP Boot device path

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Process device path with proxy server and endpoint server included.
Update comment for sample HTTP Boot device path.

Cc: Jian J Wang 
Cc: Liming Gao 
Cc: Maciej Rabeda 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/UefiBootManagerLib/BmBoot.c   | 28 +++
 .../UefiBootManagerLib/BmBootDescription.c|  4 +--
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 962892d38f..fdef1ba292 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1513,6 +1513,9 @@ BmExpandLoadFiles (
   UINTN HandleCount;
   UINTN Index;
   EFI_DEVICE_PATH_PROTOCOL  *Node;
+  URI_DEVICE_PATH   *NullUriPath;
+
+  NullUriPath = NULL;
 
   //
   // Get file buffer from load file instance.
@@ -1545,11 +1548,36 @@ BmExpandLoadFiles (
 
 for (Index = 0; Index < HandleCount; Index++) {
   if (BmMatchHttpBootDevicePath (DevicePathFromHandle (Handles[Index]), 
FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+//
+Handle = Handles[Index];
+goto Done;
+  }
+}
+
+NullUriPath = (URI_DEVICE_PATH *)CreateDeviceNode (
+   MESSAGING_DEVICE_PATH,
+   MSG_URI_DP,
+   (UINT16)(sizeof (URI_DEVICE_PATH))
+   );
+for (Index = 0; Index < HandleCount; Index++) {
+  if (BmMatchHttpBootDevicePath (AppendDevicePathNode 
(DevicePathFromHandle (Handles[Index]), (EFI_DEVICE_PATH_PROTOCOL 
*)NullUriPath), FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)/Uri(...)
+//
 Handle = Handles[Index];
 break;
   }
 }
 
+FreePool (NullUriPath);
+
+Done:
 if (Handles != NULL) {
   FreePool (Handles);
 }
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
index fac33b9ee9..108efd8096 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
@@ -412,8 +412,8 @@ BmGetNetworkDescription (
   //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)
   //
   // The HTTP device path is like:
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)][/Uri(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)][/Uri(...)]/Uri(...)
   //
   while (!IsDevicePathEnd (DevicePath) &&
  ((DevicePathType (DevicePath) != MESSAGING_DEVICE_PATH) ||
-- 
2.36.1.windows.1



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[edk2-devel] [edk2-staging/HttpProxy PATCH v3 0/7] Support HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4052

- Add CONNECT HTTP Method to create a tunnel through the Proxy Server
- TLS adjustments to establish handshake with the Endpoint Server
- Use multi-URI device path to support Proxy Server URI as a 
  part of the Http Boot Device Path
- Add Proxy URI field in the setup menu

Saloni Kasbekar (7):
  MdeModulePkg/Library: Support multi-URI HTTP Boot device path
  MdePkg/Include: Add Proxy Server URL in EFI_HTTP_REQUEST_DATA
  NetworkPkg/HttpBootDxe: Update HTTP Boot Driver with parsed Proxy URL
  NetworkPkg: Add Proxy Support to HTTP_PROTOCOL
  NetworkPkg: Add support for HTTP CONNECT Method
  NetworkPkg/HttpDxe: Support HTTPS EndPoint server with Proxy
  NetworkPkg/HttpBootDxe: Add Proxy URI input in setup menu

 .../Library/UefiBootManagerLib/BmBoot.c   |  28 ++
 .../UefiBootManagerLib/BmBootDescription.c|   4 +-
 MdePkg/Include/Protocol/Http.h|  10 +-
 NetworkPkg/HttpBootDxe/HttpBootClient.c   | 206 ++-
 NetworkPkg/HttpBootDxe/HttpBootClient.h   |  15 ++
 NetworkPkg/HttpBootDxe/HttpBootConfig.c   |  99 +--
 .../HttpBootDxe/HttpBootConfigNVDataStruc.h   |   4 +-
 .../HttpBootDxe/HttpBootConfigStrings.uni |   2 +
 NetworkPkg/HttpBootDxe/HttpBootConfigVfr.vfr  |   9 +
 NetworkPkg/HttpBootDxe/HttpBootDxe.h  |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 249 --
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c  | 154 ---
 NetworkPkg/HttpBootDxe/HttpBootSupport.h  |  13 +-
 NetworkPkg/HttpDxe/HttpDriver.h   |   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf|   1 +
 NetworkPkg/HttpDxe/HttpImpl.c | 215 +++
 NetworkPkg/HttpDxe/HttpProto.c|  58 ++--
 NetworkPkg/HttpDxe/HttpProto.h|  17 +-
 NetworkPkg/HttpDxe/HttpsSupport.c |  16 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c|   5 +
 21 files changed, 893 insertions(+), 228 deletions(-)

-- 
2.36.1.windows.1



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[edk2-devel] [[edk2-staging/HttpProxy PATCH v2] 5/6] NetworkPkg: Add support for HTTP CONNECT Method

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add support for the HTTP CONNECT method to request the Proxy Server
to open a tunnel to the EndPoint Server

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootClient.c| 176 +
 NetworkPkg/HttpBootDxe/HttpBootClient.h|  15 ++
 NetworkPkg/HttpBootDxe/HttpBootImpl.c  |  16 +-
 NetworkPkg/HttpBootDxe/HttpBootImpl.h  |   1 +
 NetworkPkg/HttpDxe/HttpDriver.h|   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf |   1 +
 NetworkPkg/HttpDxe/HttpImpl.c  | 151 ++
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c |   5 +
 8 files changed, 335 insertions(+), 32 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index b13155b576..b4d02eaff2 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootClient.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootClient.c
@@ -905,6 +905,182 @@ HttpBootGetBootFileCallback (
   return EFI_SUCCESS;
 }
 
+/**
+  This function establishes a connection through a proxy server
+
+  @param[in]   Private The pointer to the driver's private data.
+
+  @retval EFI_SUCCESS  Connection successful.
+  @retval EFI_OUT_OF_RESOURCES Could not allocate needed resources
+  @retval Others   Unexpected error happened.
+
+**/
+EFI_STATUS
+HttpBootConnectProxy (
+  IN HTTP_BOOT_PRIVATE_DATA  *Private
+  )
+{
+  EFI_STATUS Status;
+  EFI_HTTP_STATUS_CODE   StatusCode;
+  CHAR8  *HostName;
+  EFI_HTTP_REQUEST_DATA  *RequestData;
+  HTTP_IO_RESPONSE_DATA  *ResponseData;
+  HTTP_IO*HttpIo;
+  HTTP_IO_HEADER *HttpIoHeader;
+  CHAR16 *Url;
+  CHAR16 *ProxyUrl;
+  UINTN  UrlSize;
+
+  Url  = NULL;
+  ProxyUrl = NULL;
+  RequestData  = NULL;
+  ResponseData = NULL;
+  HttpIoHeader = NULL;
+
+  UrlSize = AsciiStrSize (Private->BootFileUri);
+  Url = AllocatePool (UrlSize * sizeof (CHAR16));
+  if (Url == NULL) {
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  AsciiStrToUnicodeStrS (Private->BootFileUri, Url, UrlSize);
+
+  UrlSize  = AsciiStrSize (Private->ProxyUri);
+  ProxyUrl = AllocatePool (UrlSize * (sizeof (CHAR16)));
+  if (ProxyUrl == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  AsciiStrToUnicodeStrS (Private->ProxyUri, ProxyUrl, UrlSize);
+
+  //
+  // Send HTTP request message.
+  //
+
+  //
+  // Build HTTP header for the request, 2 headers are needed to send a CONNECT 
method:
+  //   Host
+  //   User
+  //
+  HttpIoHeader = HttpIoCreateHeader (2);
+  if (HttpIoHeader == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  //
+  // Add HTTP header field 1: Host (EndPoint URI)
+  //
+  HostName = NULL;
+  Status   = HttpUrlGetHostName (
+   Private->BootFileUri,
+   Private->BootFileUriParser,
+   
+   );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  Status = HttpIoSetHeader (
+ HttpIoHeader,
+ HTTP_HEADER_HOST,
+ HostName
+ );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  //
+  // Add HTTP header field 2: User-Agent
+  //
+  Status = HttpIoSetHeader (
+ HttpIoHeader,
+ HTTP_HEADER_USER_AGENT,
+ HTTP_USER_AGENT_EFI_HTTP_BOOT
+ );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  //
+  // Build the rest of HTTP request info.
+  //
+  RequestData = AllocatePool (sizeof (EFI_HTTP_REQUEST_DATA));
+  if (RequestData == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  RequestData->Method   = HttpMethodConnect;
+  RequestData->ProxyUrl = ProxyUrl;
+  RequestData->Url  = Url;
+
+  //
+  // Send out the request to HTTP server.
+  //
+  HttpIo = >HttpIo;
+  Status = HttpIoSendRequest (
+ HttpIo,
+ RequestData,
+ HttpIoHeader->HeaderCount,
+ HttpIoHeader->Headers,
+ 0,
+ NULL
+ );
+  if (EFI_ERROR (Status)) {
+goto EXIT;
+  }
+
+  //
+  // Receive HTTP response message.
+  //
+
+  //
+  // Use zero BodyLength to only receive the response headers.
+  //
+  ResponseData = AllocateZeroPool (sizeof (HTTP_IO_RESPONSE_DATA));
+  if (ResponseData == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto EXIT;
+  }
+
+  Status = HttpIoRecvResponse (
+ >HttpIo,
+ TRUE,
+ ResponseData
+ );
+
+  if (EFI_ERROR (Status) || EFI_ERROR (ResponseData->Status)) {
+if (EFI_ERROR (ResponseData->Status)) {
+  StatusCode = HttpIo->RspToken.Message->Data.Response->StatusCode;
+  HttpBootPrintErrorMessage (StatusCode);
+  Status = ResponseData->Status;
+}
+  }
+
+EXIT:
+  if (ResponseData != NULL) {
+F

[edk2-devel] [[edk2-staging/HttpProxy PATCH v2] 6/6] NetworkPkg/HttpDxe: Support HTTPS EndPoint server with Proxy

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add support for Proxy server to connect to a HTTPS EndPoint server.
TLS Connection to be created during GET/HEAD after CONNECT method.

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpDxe/HttpImpl.c |  9 +++
 NetworkPkg/HttpDxe/HttpProto.c| 40 ++-
 NetworkPkg/HttpDxe/HttpProto.h|  8 +--
 NetworkPkg/HttpDxe/HttpsSupport.c | 16 +
 4 files changed, 46 insertions(+), 27 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpImpl.c b/NetworkPkg/HttpDxe/HttpImpl.c
index 2a305e0864..f7d6a4c8f6 100644
--- a/NetworkPkg/HttpDxe/HttpImpl.c
+++ b/NetworkPkg/HttpDxe/HttpImpl.c
@@ -511,9 +511,10 @@ EfiHttpRequest (
   if ((HttpInstance->ConnectionClose == FALSE) &&
   (HttpInstance->RemotePort == RemotePort) &&
   (AsciiStrCmp (HttpInstance->RemoteHost, HostName) == 0) &&
-  (!HttpInstance->UseHttps || (HttpInstance->UseHttps &&
-   !TlsConfigure &&
-   (HttpInstance->TlsSessionState == 
EfiTlsSessionDataTransferring
+  (!HttpInstance->UseHttps ||
+   HttpInstance->ProxyConnected || (HttpInstance->UseHttps &&
+!TlsConfigure &&
+(HttpInstance->TlsSessionState == 
EfiTlsSessionDataTransferring
   {
 //
 // Host Name and port number of the request URL are the same with 
previous call to Request().
@@ -666,7 +667,7 @@ EfiHttpRequest (
 goto Error2;
   }
 
-  if (!Configure && !ReConfigure && !TlsConfigure) {
+  if ((!Configure && !ReConfigure) && ((HttpInstance->ProxyConnected && 
TlsConfigure) || (!TlsConfigure))) {
 //
 // For the new HTTP token, create TX TCP token events.
 //
diff --git a/NetworkPkg/HttpDxe/HttpProto.c b/NetworkPkg/HttpDxe/HttpProto.c
index 6767d90c7d..cc69401943 100644
--- a/NetworkPkg/HttpDxe/HttpProto.c
+++ b/NetworkPkg/HttpDxe/HttpProto.c
@@ -1222,6 +1222,7 @@ HttpConfigureTcp6 (
   connect one TLS session if required.
 
   @param[in]  HttpInstance   The HTTP instance private data.
+  @param[in]  TlsConfigure   The Flag indicates whether it's the new Tls 
session.
 
   @retval EFI_SUCCESSThe TCP connection is established.
   @retval EFI_NOT_READY  TCP4 protocol child is not created or 
configured.
@@ -1230,7 +1231,8 @@ HttpConfigureTcp6 (
 **/
 EFI_STATUS
 HttpConnectTcp4 (
-  IN  HTTP_PROTOCOL  *HttpInstance
+  IN  HTTP_PROTOCOL  *HttpInstance,
+  IN  BOOLEANTlsConfigure
   )
 {
   EFI_STATUS Status;
@@ -1253,16 +1255,18 @@ HttpConnectTcp4 (
 return Status;
   }
 
-  if (Tcp4State == Tcp4StateEstablished) {
+  if ((Tcp4State == Tcp4StateEstablished) && (!HttpInstance->ProxyConnected || 
!TlsConfigure)) {
 return EFI_SUCCESS;
-  } else if (Tcp4State > Tcp4StateEstablished ) {
+  } else if (Tcp4State > Tcp4StateEstablished) {
 HttpCloseConnection (HttpInstance);
   }
 
-  Status = HttpCreateConnection (HttpInstance);
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "Tcp4 Connection fail - %x\n", Status));
-return Status;
+  if (!HttpInstance->ProxyConnected) {
+Status = HttpCreateConnection (HttpInstance);
+if (EFI_ERROR (Status)) {
+  DEBUG ((DEBUG_ERROR, "Tcp4 Connection fail - %x\n", Status));
+  return Status;
+}
   }
 
   //
@@ -1314,6 +1318,7 @@ HttpConnectTcp4 (
   connect one TLS session if required.
 
   @param[in]  HttpInstance   The HTTP instance private data.
+  @param[in]  TlsConfigure   The Flag indicates whether it's the new Tls 
session.
 
   @retval EFI_SUCCESSThe TCP connection is established.
   @retval EFI_NOT_READY  TCP6 protocol child is not created or 
configured.
@@ -1322,7 +1327,8 @@ HttpConnectTcp4 (
 **/
 EFI_STATUS
 HttpConnectTcp6 (
-  IN  HTTP_PROTOCOL  *HttpInstance
+  IN  HTTP_PROTOCOL  *HttpInstance,
+  IN  BOOLEANTlsConfigure
   )
 {
   EFI_STATUS Status;
@@ -1346,16 +1352,18 @@ HttpConnectTcp6 (
 return Status;
   }
 
-  if (Tcp6State == Tcp6StateEstablished) {
+  if ((Tcp6State == Tcp6StateEstablished) && (!HttpInstance->ProxyConnected || 
!TlsConfigure)) {
 return EFI_SUCCESS;
-  } else if (Tcp6State > Tcp6StateEstablished ) {
+  } else if (Tcp6State > Tcp6StateEstablished) {
 HttpCloseConnection (HttpInstance);
   }
 
-  Status = HttpCreateConnection (HttpInstance);
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "Tcp6 Connection fail - %x\n", Status));
-return Status;
+  if (!HttpInstance->ProxyConnected) {
+Status = HttpCreateConnection (HttpInstance);
+if (EFI_ERROR (Status)) {

[edk2-devel] [[edk2-staging/HttpProxy PATCH v2] 4/6] NetworkPkg: Add Proxy Support to HTTP_PROTOCOL

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Update HTTP Protocol with variables to support Proxy
Use state machine to call HttpBootGetBootFile()
Add switch/case for EfiHttpRequest request method

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 178 +-
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   7 +
 NetworkPkg/HttpDxe/HttpImpl.c |  59 +++--
 NetworkPkg/HttpDxe/HttpProto.c|  18 ++-
 NetworkPkg/HttpDxe/HttpProto.h|   9 ++
 5 files changed, 199 insertions(+), 72 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootImpl.c 
b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
index 5735b96d9e..4748de0603 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootImpl.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
@@ -278,6 +278,122 @@ HttpBootDhcp (
   return Status;
 }
 
+/**
+  Issue calls to HttpBootGetBootFile() based on current Boot File State
+
+  @param[in]  Private The pointer to the driver's private data.
+  @param[in, out] BufferSize  On input the size of Buffer in bytes. On 
output with a return
+  code of EFI_SUCCESS, the amount of data 
transferred to
+  Buffer. On output with a return code of 
EFI_BUFFER_TOO_SMALL,
+  the size of Buffer required to retrieve 
the requested file.
+  @param[in]  Buffer  The memory buffer to transfer the file 
to. If Buffer is NULL,
+  then the size of the requested file is 
returned in
+  BufferSize.
+  @param[out] ImageType   The image type of the downloaded file.
+
+  @retval EFI_SUCCESS  The file was loaded.
+  @retval EFI_INVALID_PARAMETERBufferSize is NULL or Buffer Size is not 
NULL but Buffer is NULL.
+  @retval EFI_OUT_OF_RESOURCES Could not allocate needed resources
+  @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the 
current directory entry.
+   BufferSize has been updated with the size 
needed to complete
+   the request.
+  @retval EFI_ACCESS_DENIEDServer authentication failed.
+  @retval Others   Unexpected error happened.
+
+**/
+EFI_STATUS
+HttpBootGetBootFileCaller (
+  IN HTTP_BOOT_PRIVATE_DATA  *Private,
+  IN OUT UINTN   *BufferSize,
+  IN VOID*BufferOPTIONAL,
+  OUT HTTP_BOOT_IMAGE_TYPE   *ImageType
+  )
+{
+  HTTP_GET_BOOT_FILE_STATE  State;
+  EFI_STATUSStatus;
+
+  if (Private->BootFileSize == 0) {
+State = GetBootFileHead;
+  } else {
+State = LoadBootFile;
+  }
+
+  for ( ; ;) {
+switch (State) {
+  case GetBootFileHead:
+//
+// Try to use HTTP HEAD method.
+//
+Status = HttpBootGetBootFile (
+   Private,
+   TRUE,
+   >BootFileSize,
+   NULL,
+   >ImageType
+   );
+if ((EFI_ERROR (Status)) && (Status != EFI_BUFFER_TOO_SMALL)) {
+  if ((Private->AuthData != NULL) && (Status == EFI_ACCESS_DENIED)) {
+//
+// Try to use HTTP HEAD method again since the Authentication 
information is provided.
+//
+State = GetBootFileHead;
+  } else {
+State = GetBootFileGet;
+  }
+} else {
+  State = LoadBootFile;
+}
+
+break;
+
+  case GetBootFileGet:
+//
+// Failed to get file size by HEAD method, may be trunked encoding, 
try HTTP GET method.
+//
+ASSERT (Private->BootFileSize == 0);
+Status = HttpBootGetBootFile (
+   Private,
+   FALSE,
+   >BootFileSize,
+   NULL,
+   >ImageType
+   );
+if (EFI_ERROR (Status) && (Status != EFI_BUFFER_TOO_SMALL)) {
+  State = GetBootFileError;
+} else {
+  State = LoadBootFile;
+}
+
+break;
+
+  case LoadBootFile:
+if (*BufferSize < Private->BootFileSize) {
+  *BufferSize = Private->BootFileSize;
+  *ImageType  = Private->ImageType;
+  Status  = EFI_BUFFER_TOO_SMALL;
+  return Status;
+}
+
+//
+// Load the boot file into Buffer
+//
+Status = HttpBootGetBootFile (
+   Private,
+   FALSE,
+   BufferSize,
+   Buffer,
+   ImageType
+   );
+return Status;
+
+  case GetBootFileError:
+  default:
+AsciiPrint ("\n  Error: Could not retrieve NBP file size from HTTP 
server.

[edk2-devel] [[edk2-staging/HttpProxy PATCH v2] 3/6] NetworkPkg/HttpBootDxe: Update HTTP Boot Driver with parsed Proxy URL

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add ProxyUri to HTTP_BOOT_PRIVATE_DATA
Parse HTTP Boot Device path to process Proxy and EndPoint URLs

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootClient.c  |  30 -
 NetworkPkg/HttpBootDxe/HttpBootDxe.h |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c|  57 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c | 154 +--
 NetworkPkg/HttpBootDxe/HttpBootSupport.h |  13 +-
 5 files changed, 189 insertions(+), 71 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index 40f64fcb6b..b13155b576 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootClient.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootClient.c
@@ -678,6 +678,10 @@ HttpBootFreeCache (
 FreePool (Cache->RequestData->Url);
   }
 
+  if (Cache->RequestData->ProxyUrl != NULL) {
+FreePool (Cache->RequestData->ProxyUrl);
+  }
+
   FreePool (Cache->RequestData);
 }
 
@@ -950,6 +954,7 @@ HttpBootGetBootFile (
   UINT8*Block;
   UINTNUrlSize;
   CHAR16   *Url;
+  CHAR16   *ProxyUrl;
   BOOLEAN  IdentityMode;
   UINTNReceivedSize;
   CHAR8BaseAuthValue[80];
@@ -989,6 +994,22 @@ HttpBootGetBootFile (
   // Not found in cache, try to download it through HTTP.
   //
 
+  //
+  // Initialize ProxyUrl - Set to NULL if connecting without Proxy
+  //
+  if (Private->ProxyUri != NULL) {
+UrlSize  = AsciiStrSize (Private->ProxyUri);
+ProxyUrl = AllocatePool (UrlSize * (sizeof (CHAR16)));
+if (ProxyUrl == NULL) {
+  Status = EFI_OUT_OF_RESOURCES;
+  goto ERROR_1;
+}
+
+AsciiStrToUnicodeStrS (Private->ProxyUri, ProxyUrl, UrlSize);
+  } else {
+ProxyUrl = NULL;
+  }
+
   //
   // 1. Create a temp cache item for the requested URI if caller doesn't 
provide buffer.
   //
@@ -1106,8 +1127,9 @@ HttpBootGetBootFile (
 goto ERROR_3;
   }
 
-  RequestData->Method = HeaderOnly ? HttpMethodHead : HttpMethodGet;
-  RequestData->Url= Url;
+  RequestData->Method   = HeaderOnly ? HttpMethodHead : HttpMethodGet;
+  RequestData->Url  = Url;
+  RequestData->ProxyUrl = ProxyUrl;
 
   //
   // 2.3 Record the request info in a temp cache item.
@@ -1441,6 +1463,10 @@ ERROR_2:
   }
 
 ERROR_1:
+  if (ProxyUrl != NULL) {
+FreePool (ProxyUrl);
+  }
+
   if (Url != NULL) {
 FreePool (Url);
   }
diff --git a/NetworkPkg/HttpBootDxe/HttpBootDxe.h 
b/NetworkPkg/HttpBootDxe/HttpBootDxe.h
index 5ff8ad4698..8caf2e9a45 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootDxe.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootDxe.h
@@ -223,6 +223,12 @@ struct _HTTP_BOOT_PRIVATE_DATA {
   CHAR8*FilePathUri;
   VOID *FilePathUriParser;
 
+  //
+  // URI string for the Proxy host if BootFileUri contains a Proxy
+  // URI in the path
+  //
+  CHAR8*ProxyUri;
+
   //
   // Cached HTTP data
   //
diff --git a/NetworkPkg/HttpBootDxe/HttpBootImpl.c 
b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
index b4c61925b9..5735b96d9e 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootImpl.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootImpl.c
@@ -115,19 +115,21 @@ HttpBootStart (
 {
   UINTN   Index;
   EFI_STATUS  Status;
-  CHAR8   *Uri;
+  CHAR8   *ProxyUri;
+  CHAR8   *EndPointUri;
 
-  Uri = NULL;
+  ProxyUri= NULL;
+  EndPointUri = NULL;
 
   if ((Private == NULL) || (FilePath == NULL)) {
 return EFI_INVALID_PARAMETER;
   }
 
   //
-  // Check the URI in the input FilePath, in order to see whether it is
+  // Check the URIs in the input FilePath, in order to see whether it is
   // required to boot from a new specified boot file.
   //
-  Status = HttpBootParseFilePath (FilePath, );
+  Status = HttpBootParseFilePath (FilePath, , );
   if (EFI_ERROR (Status)) {
 return EFI_INVALID_PARAMETER;
   }
@@ -143,28 +145,21 @@ HttpBootStart (
 // recorded before.
 //
 if ((UsingIpv6 != Private->UsingIpv6) ||
-((Uri != NULL) && (AsciiStrCmp (Private->BootFileUri, Uri) != 0)))
+((EndPointUri != NULL) && (AsciiStrCmp (Private->BootFileUri, 
EndPointUri) != 0)))
 {
   //
   // Restart is required, first stop then continue this start function.
   //
   Status = HttpBootStop (Private);
   if (EFI_ERROR (Status)) {
-if (Uri != NULL) {
-  FreePool (Uri);
-}
-
-return Status;
+goto ERROR;
   }
 } else {
   //
   // Restart is not required.
   //
-  if (Uri != NULL) {
-FreePool (Uri);
-  }
-
-  return EFI_ALREADY_STARTED;
+  Status = EFI_ALREADY_STARTED;
+  goto ERROR;
 }
   }
 
@@ -176,17 +171,16 @

[edk2-devel] [[edk2-staging/HttpProxy PATCH v2] 2/6] MdePkg/Include: Add Proxy Server URL in EFI_HTTP_REQUEST_DATA

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Add Proxy Server URL to EFI_HTTP_REQUEST_DATA.
This will be used when a Proxy Server URL is a part of the
HTTP Boot device path.

Cc: Zhiguang Liu 
Cc: Michael D Kinney 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 MdePkg/Include/Protocol/Http.h | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/Protocol/Http.h b/MdePkg/Include/Protocol/Http.h
index 28e6221593..9ee08baa14 100644
--- a/MdePkg/Include/Protocol/Http.h
+++ b/MdePkg/Include/Protocol/Http.h
@@ -188,9 +188,17 @@ typedef struct {
   /// The URI of a remote host. From the information in this field, the HTTP 
instance
   /// will be able to determine whether to use HTTP or HTTPS and will also be 
able to
   /// determine the port number to use. If no port number is specified, port 
80 (HTTP)
-  /// is assumed. See RFC 3986 for more details on URI syntax.
+  /// or 443 (HTTPS) is assumed. See RFC 3986 for more details on URI syntax.
   ///
   CHAR16 *Url;
+  ///
+  /// The URI of an Proxy Host. This field will be NULL if there is no Proxy 
Host
+  /// in the device path. From the information in this field, the HTTP 
instance will
+  /// be able to determine whether to use HTTP or HTTPS and will also be able 
to
+  /// determine the port number to use. If no port number is specified, port 
80 (HTTP)
+  /// or 443 (HTTPS) is assumed. See RFC 3986 for more details on URI syntax.
+  ///
+  CHAR16 *ProxyUrl;
 } EFI_HTTP_REQUEST_DATA;
 
 ///
-- 
2.36.1.windows.1



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[edk2-devel] [[edk2-staging/HttpProxy PATCH v2] 1/6] MdeModulePkg/Library: Support multi-URI HTTP Boot device path

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951

Process device path with proxy server and endpoint server included.
Update comment for sample HTTP Boot device path.

Cc: Jian J Wang 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/UefiBootManagerLib/BmBoot.c   | 28 +++
 .../UefiBootManagerLib/BmBootDescription.c|  4 +--
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 962892d38f..fdef1ba292 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1513,6 +1513,9 @@ BmExpandLoadFiles (
   UINTN HandleCount;
   UINTN Index;
   EFI_DEVICE_PATH_PROTOCOL  *Node;
+  URI_DEVICE_PATH   *NullUriPath;
+
+  NullUriPath = NULL;
 
   //
   // Get file buffer from load file instance.
@@ -1545,11 +1548,36 @@ BmExpandLoadFiles (
 
 for (Index = 0; Index < HandleCount; Index++) {
   if (BmMatchHttpBootDevicePath (DevicePathFromHandle (Handles[Index]), 
FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+//
+Handle = Handles[Index];
+goto Done;
+  }
+}
+
+NullUriPath = (URI_DEVICE_PATH *)CreateDeviceNode (
+   MESSAGING_DEVICE_PATH,
+   MSG_URI_DP,
+   (UINT16)(sizeof (URI_DEVICE_PATH))
+   );
+for (Index = 0; Index < HandleCount; Index++) {
+  if (BmMatchHttpBootDevicePath (AppendDevicePathNode 
(DevicePathFromHandle (Handles[Index]), (EFI_DEVICE_PATH_PROTOCOL 
*)NullUriPath), FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)/Uri(...)
+//
 Handle = Handles[Index];
 break;
   }
 }
 
+FreePool (NullUriPath);
+
+Done:
 if (Handles != NULL) {
   FreePool (Handles);
 }
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
index fac33b9ee9..108efd8096 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
@@ -412,8 +412,8 @@ BmGetNetworkDescription (
   //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)
   //
   // The HTTP device path is like:
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)][/Uri(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)][/Uri(...)]/Uri(...)
   //
   while (!IsDevicePathEnd (DevicePath) &&
  ((DevicePathType (DevicePath) != MESSAGING_DEVICE_PATH) ||
-- 
2.36.1.windows.1



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[edk2-devel] [[edk2-staging/HttpProxy PATCH v2] 0/6] Support HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4052

- Add CONNECT HTTP Method to create a tunnel through the Proxy Server
- TLS adjustments to establish handshake with the Endpoint Server
- Use multi-URI device path to support Proxy Server URI as a 
  part of the Http Boot Device Path

Saloni Kasbekar (6):
  MdeModulePkg/Library: Support multi-URI HTTP Boot device path
  MdePkg/Include: Add Proxy Server URL in EFI_HTTP_REQUEST_DATA
  NetworkPkg/HttpBootDxe: Update HTTP Boot Driver with parsed Proxy URL
  NetworkPkg: Add Proxy Support to HTTP_PROTOCOL
  NetworkPkg: Add support for HTTP CONNECT Method
  NetworkPkg/HttpDxe: Support HTTPS EndPoint server with Proxy

 .../Library/UefiBootManagerLib/BmBoot.c   |  28 ++
 .../UefiBootManagerLib/BmBootDescription.c|   4 +-
 MdePkg/Include/Protocol/Http.h|  10 +-
 NetworkPkg/HttpBootDxe/HttpBootClient.c   | 206 ++-
 NetworkPkg/HttpBootDxe/HttpBootClient.h   |  15 ++
 NetworkPkg/HttpBootDxe/HttpBootDxe.h  |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 249 --
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c  | 154 ---
 NetworkPkg/HttpBootDxe/HttpBootSupport.h  |  13 +-
 NetworkPkg/HttpDxe/HttpDriver.h   |   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf|   1 +
 NetworkPkg/HttpDxe/HttpImpl.c | 215 +++
 NetworkPkg/HttpDxe/HttpProto.c|  58 ++--
 NetworkPkg/HttpDxe/HttpProto.h|  17 +-
 NetworkPkg/HttpDxe/HttpsSupport.c |  16 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c|   5 +
 17 files changed, 805 insertions(+), 202 deletions(-)

-- 
2.36.1.windows.1



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[edk2-devel] [[edk2-staging/HttpProxy] 3/3] NetworkPkg/HttpBootDxe: Add Support for HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

Add CONNECT HTTP command to create a tunnel from Proxy to EndPoint Server.
Process the multi-URI device path in the input FilePath.

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Signed-off-by: Saloni Kasbekar 
---
 NetworkPkg/HttpBootDxe/HttpBootClient.c| 211 -
 NetworkPkg/HttpBootDxe/HttpBootClient.h|  15 ++
 NetworkPkg/HttpBootDxe/HttpBootDxe.h   |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c  | 262 -
 NetworkPkg/HttpBootDxe/HttpBootImpl.h  |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c   |  24 +-
 NetworkPkg/HttpBootDxe/HttpBootSupport.h   |   8 +-
 NetworkPkg/HttpDxe/HttpDriver.h|   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf |   1 +
 NetworkPkg/HttpDxe/HttpImpl.c  | 139 +--
 NetworkPkg/HttpDxe/HttpProto.c |  41 ++--
 NetworkPkg/HttpDxe/HttpProto.h |  14 +-
 NetworkPkg/HttpDxe/HttpsSupport.c  |  14 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c |   5 +
 14 files changed, 642 insertions(+), 108 deletions(-)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index 40f64fcb6b..bfad4809de 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootClient.c
+++ b/NetworkPkg/HttpBootDxe/HttpBootClient.c
@@ -678,6 +678,10 @@ HttpBootFreeCache (
 FreePool (Cache->RequestData->Url);
   }
 
+  if (Cache->RequestData->EndPointUrl != NULL) {
+FreePool (Cache->RequestData->EndPointUrl);
+  }
+
   FreePool (Cache->RequestData);
 }
 
@@ -901,6 +905,189 @@ HttpBootGetBootFileCallback (
   return EFI_SUCCESS;
 }
 
+/**
+  This function establishes a connection through a proxy server
+
+  @param[in]   Private The pointer to the driver's private data.
+
+  @retval EFI_SUCCESS  Connection successful.
+  @retval EFI_OUT_OF_RESOURCES Could not allocate needed resources
+  @retval Others   Unexpected error happened.
+
+**/
+EFI_STATUS
+HttpBootConnectProxy (
+  IN HTTP_BOOT_PRIVATE_DATA  *Private
+  )
+{
+  EFI_STATUS Status;
+  EFI_HTTP_STATUS_CODE   StatusCode;
+  CHAR8  *HostName;
+  EFI_HTTP_REQUEST_DATA  *RequestData;
+  HTTP_IO_RESPONSE_DATA  *ResponseData;
+  HTTP_IO*HttpIo;
+  HTTP_IO_HEADER *HttpIoHeader;
+  CHAR16 *Url;
+  CHAR16 *EndPointUrl;
+  UINTN  UrlSize;
+  VOID   *UrlParser;
+
+  Url  = NULL;
+  EndPointUrl  = NULL;
+  RequestData  = NULL;
+  ResponseData = NULL;
+  HttpIoHeader = NULL;
+
+  UrlSize = AsciiStrSize (Private->BootFileUri);
+  Url = AllocatePool (UrlSize * sizeof (CHAR16));
+  if (Url == NULL) {
+return EFI_OUT_OF_RESOURCES;
+  }
+
+  AsciiStrToUnicodeStrS (Private->BootFileUri, Url, UrlSize);
+
+  UrlSize = AsciiStrSize (Private->EndPointUri);
+  EndPointUrl = AllocatePool (UrlSize * (sizeof (CHAR16)));
+  if (EndPointUrl == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto ERROR;
+  }
+
+  AsciiStrToUnicodeStrS (Private->EndPointUri, EndPointUrl, UrlSize);
+
+  //
+  // Send HTTP request message.
+  //
+
+  //
+  // Build HTTP header for the request, 2 headers are needed to send a CONNECT 
method:
+  //   Host
+  //   User
+  //
+  HttpIoHeader = HttpIoCreateHeader (2);
+  if (HttpIoHeader == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto ERROR;
+  }
+
+  //
+  // Add HTTP header field 1: Host (EndPoint URI)
+  //
+  Status = HttpParseUrl (Private->EndPointUri, (UINT32)AsciiStrLen 
(Private->EndPointUri), FALSE, );
+  if (EFI_ERROR (Status)) {
+goto ERROR;
+  }
+
+  Status = HttpUrlGetHostName (
+ Private->EndPointUri,
+ UrlParser,
+ 
+ );
+  if (EFI_ERROR (Status)) {
+goto ERROR;
+  }
+
+  Status = HttpIoSetHeader (
+ HttpIoHeader,
+ HTTP_HEADER_HOST,
+ HostName
+ );
+  if (EFI_ERROR (Status)) {
+goto ERROR;
+  }
+
+  //
+  // Add HTTP header field 2: User-Agent
+  //
+  Status = HttpIoSetHeader (
+ HttpIoHeader,
+ HTTP_HEADER_USER_AGENT,
+ HTTP_USER_AGENT_EFI_HTTP_BOOT
+ );
+  if (EFI_ERROR (Status)) {
+goto ERROR;
+  }
+
+  //
+  // Build the rest of HTTP request info.
+  //
+  RequestData = AllocatePool (sizeof (EFI_HTTP_REQUEST_DATA));
+  if (RequestData == NULL) {
+Status = EFI_OUT_OF_RESOURCES;
+goto ERROR;
+  }
+
+  RequestData->Method  = HttpMethodConnect;
+  RequestData->Url = Url;
+  RequestData->EndPointUrl = EndPointUrl;
+
+  //
+  // Send out the request to HTTP server.
+  //
+  HttpIo = >HttpIo;
+  Status = HttpIoSendRequest (
+ HttpIo,
+ RequestData,
+ HttpIoHeader->HeaderCount,
+ HttpIoHeader->Headers,
+ 0,
+ NULL
+ );
+  if (EFI_ERROR (Status)) {
+

[edk2-devel] [[edk2-staging/HttpProxy] 2/3] MdeModulePkg/Library: Add support for multi-URI device path

[Saloni Kasbekar]

Process device path with proxy server and endpoint server included.
Update comment for sample HTTP device path.

Cc: Jian J Wang 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/UefiBootManagerLib/BmBoot.c   | 28 +++
 .../UefiBootManagerLib/BmBootDescription.c|  4 +--
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 962892d38f..fdef1ba292 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1513,6 +1513,9 @@ BmExpandLoadFiles (
   UINTN HandleCount;
   UINTN Index;
   EFI_DEVICE_PATH_PROTOCOL  *Node;
+  URI_DEVICE_PATH   *NullUriPath;
+
+  NullUriPath = NULL;
 
   //
   // Get file buffer from load file instance.
@@ -1545,11 +1548,36 @@ BmExpandLoadFiles (
 
 for (Index = 0; Index < HandleCount; Index++) {
   if (BmMatchHttpBootDevicePath (DevicePathFromHandle (Handles[Index]), 
FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+//
+Handle = Handles[Index];
+goto Done;
+  }
+}
+
+NullUriPath = (URI_DEVICE_PATH *)CreateDeviceNode (
+   MESSAGING_DEVICE_PATH,
+   MSG_URI_DP,
+   (UINT16)(sizeof (URI_DEVICE_PATH))
+   );
+for (Index = 0; Index < HandleCount; Index++) {
+  if (BmMatchHttpBootDevicePath (AppendDevicePathNode 
(DevicePathFromHandle (Handles[Index]), (EFI_DEVICE_PATH_PROTOCOL 
*)NullUriPath), FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)/Uri(...)
+//
 Handle = Handles[Index];
 break;
   }
 }
 
+FreePool (NullUriPath);
+
+Done:
 if (Handles != NULL) {
   FreePool (Handles);
 }
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
index fac33b9ee9..19b7cd1457 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
@@ -412,8 +412,8 @@ BmGetNetworkDescription (
   //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)
   //
   // The HTTP device path is like:
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)[/Uri(...)]
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)[/Uri(...)]
   //
   while (!IsDevicePathEnd (DevicePath) &&
  ((DevicePathType (DevicePath) != MESSAGING_DEVICE_PATH) ||
-- 
2.36.1.windows.1



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[edk2-devel] [[edk2-staging/HttpProxy] 1/3] MdePkg/Include: Add the EndPoint Server's URL in HTTP Request Data

[Saloni Kasbekar]

Add EndPoint Server URL to HTTP Request Data to
be used when a Proxy Server URL is a part of the device path

Cc: Zhiguang Liu 
Cc: Michael D Kinney 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 MdePkg/Include/Protocol/Http.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/MdePkg/Include/Protocol/Http.h b/MdePkg/Include/Protocol/Http.h
index 28e6221593..4f77220587 100644
--- a/MdePkg/Include/Protocol/Http.h
+++ b/MdePkg/Include/Protocol/Http.h
@@ -191,6 +191,11 @@ typedef struct {
   /// is assumed. See RFC 3986 for more details on URI syntax.
   ///
   CHAR16 *Url;
+  ///
+  /// The URI of an endpoint host if the Url field contains the address of a 
proxy server.
+  /// This field will be NULL if there is no proxy server in the device path.
+  ///
+  CHAR16 *EndPointUrl;
 } EFI_HTTP_REQUEST_DATA;
 
 ///
-- 
2.36.1.windows.1



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[edk2-devel] [[edk2-staging/HttpProxy] 0/3] Support HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3951
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4052

- Add CONNECT HTTP Method to create a tunnel through the Proxy Server
- TLS adjustments to establish handshake with the Endpoint Server
- Use multi-URI device path to support Proxy Server URI as a 
  part of the FilePath

Saloni Kasbekar (3):
  MdePkg/Include: Add the EndPoint Server's URL in HTTP Request Data
  MdeModulePkg/Library: Add support for multi-URI device path
  NetworkPkg/HttpBootDxe: Add Support for HTTPS Proxy Server for HTTP
Boot

 .../Library/UefiBootManagerLib/BmBoot.c   |  28 ++
 .../UefiBootManagerLib/BmBootDescription.c|   4 +-
 MdePkg/Include/Protocol/Http.h|   5 +
 NetworkPkg/HttpBootDxe/HttpBootClient.c   | 211 +-
 NetworkPkg/HttpBootDxe/HttpBootClient.h   |  15 +
 NetworkPkg/HttpBootDxe/HttpBootDxe.h  |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 262 +-
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c  |  24 +-
 NetworkPkg/HttpBootDxe/HttpBootSupport.h  |   8 +-
 NetworkPkg/HttpDxe/HttpDriver.h   |   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf|   1 +
 NetworkPkg/HttpDxe/HttpImpl.c | 139 --
 NetworkPkg/HttpDxe/HttpProto.c|  41 ++-
 NetworkPkg/HttpDxe/HttpProto.h|  14 +-
 NetworkPkg/HttpDxe/HttpsSupport.c |  14 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c|   5 +
 17 files changed, 677 insertions(+), 110 deletions(-)

-- 
2.36.1.windows.1



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[edk2-devel] [PATCH v6 1/1] NetworkPkg/HttpBootDxe: Add Support for HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

Add CONNECT HTTP command to create a tunnel from Proxy to EndPoint Server.
Add support to connect through proxy server using multi-URI DevicePath
sent to the Boot Manager.

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Cc: Jian J Wang 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/UefiBootManagerLib/BmBoot.c   |  28 +++
 .../UefiBootManagerLib/BmBootDescription.c|   4 +-
 MdePkg/Include/Protocol/Http.h|   5 +
 NetworkPkg/HttpBootDxe/HttpBootClient.c   | 222 +-
 NetworkPkg/HttpBootDxe/HttpBootClient.h   |  15 ++
 NetworkPkg/HttpBootDxe/HttpBootDxe.h  |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 211 -
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c  |  18 +-
 NetworkPkg/HttpBootDxe/HttpBootSupport.h  |   8 +-
 NetworkPkg/HttpDxe/HttpDriver.h   |   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf|   1 +
 NetworkPkg/HttpDxe/HttpImpl.c | 139 +--
 NetworkPkg/HttpDxe/HttpProto.c|  41 ++--
 NetworkPkg/HttpDxe/HttpProto.h|  14 +-
 NetworkPkg/HttpDxe/HttpsSupport.c |  14 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c|   5 +
 17 files changed, 631 insertions(+), 110 deletions(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 962892d38f14..fdef1ba292e2 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1513,6 +1513,9 @@ BmExpandLoadFiles (
   UINTN HandleCount;
   UINTN Index;
   EFI_DEVICE_PATH_PROTOCOL  *Node;
+  URI_DEVICE_PATH   *NullUriPath;
+
+  NullUriPath = NULL;
 
   //
   // Get file buffer from load file instance.
@@ -1545,11 +1548,36 @@ BmExpandLoadFiles (
 
 for (Index = 0; Index < HandleCount; Index++) {
   if (BmMatchHttpBootDevicePath (DevicePathFromHandle (Handles[Index]), 
FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+//
+Handle = Handles[Index];
+goto Done;
+  }
+}
+
+NullUriPath = (URI_DEVICE_PATH *)CreateDeviceNode (
+   MESSAGING_DEVICE_PATH,
+   MSG_URI_DP,
+   (UINT16)(sizeof (URI_DEVICE_PATH))
+   );
+for (Index = 0; Index < HandleCount; Index++) {
+  if (BmMatchHttpBootDevicePath (AppendDevicePathNode 
(DevicePathFromHandle (Handles[Index]), (EFI_DEVICE_PATH_PROTOCOL 
*)NullUriPath), FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)/Uri(...)
+//
 Handle = Handles[Index];
 break;
   }
 }
 
+FreePool (NullUriPath);
+
+Done:
 if (Handles != NULL) {
   FreePool (Handles);
 }
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
index fac33b9ee915..19b7cd14575f 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
@@ -412,8 +412,8 @@ BmGetNetworkDescription (
   //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)
   //
   // The HTTP device path is like:
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)[/Uri(...)]
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)[/Uri(...)]
   //
   while (!IsDevicePathEnd (DevicePath) &&
  ((DevicePathType (DevicePath) != MESSAGING_DEVICE_PATH) ||
diff --git a/MdePkg/Include/Protocol/Http.h b/MdePkg/Include/Protocol/Http.h
index 28e622159392..d47092c58e5a 100644
--- a/MdePkg/Include/Protocol/Http.h
+++ b/MdePkg/Include/Protocol/Http.h
@@ -191,6 +191,11 @@ typedef struct {
   /// is assumed. See RFC 3986 for more details on URI syntax.
   ///
   CHAR16 *Url;
+  ///
+  /// The URI of an endpoint host if the Url field contains the address of a 
proxy server.
+  /// This field will be NULL there is no proxy server in the device path.
+  ///
+  CHAR16 *EndPointUrl;
 } EFI_HTTP_REQUEST_DATA;
 
 ///
diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index 40f64fcb6bf8..f8ff5d0e8956 100644
--- a/NetworkP

[edk2-devel] [PATCH v5 1/1] NetworkPkg/HttpBootDxe: Add Support for HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

Add CONNECT HTTP command to create a tunnel from Proxy to EndPoint Server.
Add support to connect through proxy server using multi-URI DevicePath
sent to the Boot Manager.

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Cc: Jian J Wang 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/UefiBootManagerLib/BmBoot.c   |  28 +++
 .../UefiBootManagerLib/BmBootDescription.c|   4 +-
 MdePkg/Include/Protocol/Http.h|   5 +
 NetworkPkg/HttpBootDxe/HttpBootClient.c   | 214 +-
 NetworkPkg/HttpBootDxe/HttpBootClient.h   |  15 ++
 NetworkPkg/HttpBootDxe/HttpBootDxe.h  |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 211 -
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c  |  18 +-
 NetworkPkg/HttpBootDxe/HttpBootSupport.h  |   8 +-
 NetworkPkg/HttpDxe/HttpDriver.h   |   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf|   1 +
 NetworkPkg/HttpDxe/HttpImpl.c | 139 ++--
 NetworkPkg/HttpDxe/HttpProto.c|  41 ++--
 NetworkPkg/HttpDxe/HttpProto.h|  14 +-
 NetworkPkg/HttpDxe/HttpsSupport.c |  14 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c|   5 +
 17 files changed, 623 insertions(+), 110 deletions(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 962892d38f14..fdef1ba292e2 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1513,6 +1513,9 @@ BmExpandLoadFiles (
   UINTN HandleCount;
   UINTN Index;
   EFI_DEVICE_PATH_PROTOCOL  *Node;
+  URI_DEVICE_PATH   *NullUriPath;
+
+  NullUriPath = NULL;
 
   //
   // Get file buffer from load file instance.
@@ -1545,11 +1548,36 @@ BmExpandLoadFiles (
 
 for (Index = 0; Index < HandleCount; Index++) {
   if (BmMatchHttpBootDevicePath (DevicePathFromHandle (Handles[Index]), 
FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+//
+Handle = Handles[Index];
+goto Done;
+  }
+}
+
+NullUriPath = (URI_DEVICE_PATH *)CreateDeviceNode (
+   MESSAGING_DEVICE_PATH,
+   MSG_URI_DP,
+   (UINT16)(sizeof (URI_DEVICE_PATH))
+   );
+for (Index = 0; Index < HandleCount; Index++) {
+  if (BmMatchHttpBootDevicePath (AppendDevicePathNode 
(DevicePathFromHandle (Handles[Index]), (EFI_DEVICE_PATH_PROTOCOL 
*)NullUriPath), FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)/Uri(...)
+//
 Handle = Handles[Index];
 break;
   }
 }
 
+FreePool (NullUriPath);
+
+Done:
 if (Handles != NULL) {
   FreePool (Handles);
 }
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
index fac33b9ee915..19b7cd14575f 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
@@ -412,8 +412,8 @@ BmGetNetworkDescription (
   //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)
   //
   // The HTTP device path is like:
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)[/Uri(...)]
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)[/Uri(...)]
   //
   while (!IsDevicePathEnd (DevicePath) &&
  ((DevicePathType (DevicePath) != MESSAGING_DEVICE_PATH) ||
diff --git a/MdePkg/Include/Protocol/Http.h b/MdePkg/Include/Protocol/Http.h
index 28e622159392..d47092c58e5a 100644
--- a/MdePkg/Include/Protocol/Http.h
+++ b/MdePkg/Include/Protocol/Http.h
@@ -191,6 +191,11 @@ typedef struct {
   /// is assumed. See RFC 3986 for more details on URI syntax.
   ///
   CHAR16 *Url;
+  ///
+  /// The URI of an endpoint host if the Url field contains the address of a 
proxy server.
+  /// This field will be NULL there is no proxy server in the device path.
+  ///
+  CHAR16 *EndPointUrl;
 } EFI_HTTP_REQUEST_DATA;
 
 ///
diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index 40f64fcb6bf8..8f3805c62bcb 100644
--- a/NetworkP

[edk2-devel] [PATCH v4 1/1] NetworkPkg/HttpBootDxe: Add Support for HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

Add CONNECT HTTP command to create a tunnel from Proxy to EndPoint Server.
Add support to connect through proxy server using multi-URI DevicePath
sent to the Boot Manager.

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Cc: Jian J Wang 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/UefiBootManagerLib/BmBoot.c   |  28 +++
 .../UefiBootManagerLib/BmBootDescription.c|   4 +-
 MdePkg/Include/Protocol/Http.h|   5 +
 NetworkPkg/HttpBootDxe/HttpBootClient.c   | 206 -
 NetworkPkg/HttpBootDxe/HttpBootClient.h   |  15 ++
 NetworkPkg/HttpBootDxe/HttpBootDxe.h  |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 211 +-
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c  |  18 +-
 NetworkPkg/HttpBootDxe/HttpBootSupport.h  |   8 +-
 NetworkPkg/HttpDxe/HttpDriver.h   |   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf|   1 +
 NetworkPkg/HttpDxe/HttpImpl.c | 131 +--
 NetworkPkg/HttpDxe/HttpProto.c|  41 ++--
 NetworkPkg/HttpDxe/HttpProto.h|  14 +-
 NetworkPkg/HttpDxe/HttpsSupport.c |  14 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c|   5 +
 17 files changed, 607 insertions(+), 110 deletions(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 962892d38f14..fdef1ba292e2 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1513,6 +1513,9 @@ BmExpandLoadFiles (
   UINTN HandleCount;
   UINTN Index;
   EFI_DEVICE_PATH_PROTOCOL  *Node;
+  URI_DEVICE_PATH   *NullUriPath;
+
+  NullUriPath = NULL;
 
   //
   // Get file buffer from load file instance.
@@ -1545,11 +1548,36 @@ BmExpandLoadFiles (
 
 for (Index = 0; Index < HandleCount; Index++) {
   if (BmMatchHttpBootDevicePath (DevicePathFromHandle (Handles[Index]), 
FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+//
+Handle = Handles[Index];
+goto Done;
+  }
+}
+
+NullUriPath = (URI_DEVICE_PATH *)CreateDeviceNode (
+   MESSAGING_DEVICE_PATH,
+   MSG_URI_DP,
+   (UINT16)(sizeof (URI_DEVICE_PATH))
+   );
+for (Index = 0; Index < HandleCount; Index++) {
+  if (BmMatchHttpBootDevicePath (AppendDevicePathNode 
(DevicePathFromHandle (Handles[Index]), (EFI_DEVICE_PATH_PROTOCOL 
*)NullUriPath), FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)/Uri(...)
+//
 Handle = Handles[Index];
 break;
   }
 }
 
+FreePool (NullUriPath);
+
+Done:
 if (Handles != NULL) {
   FreePool (Handles);
 }
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
index fac33b9ee915..19b7cd14575f 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
@@ -412,8 +412,8 @@ BmGetNetworkDescription (
   //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)
   //
   // The HTTP device path is like:
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)[/Uri(...)]
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)[/Uri(...)]
   //
   while (!IsDevicePathEnd (DevicePath) &&
  ((DevicePathType (DevicePath) != MESSAGING_DEVICE_PATH) ||
diff --git a/MdePkg/Include/Protocol/Http.h b/MdePkg/Include/Protocol/Http.h
index 28e622159392..d47092c58e5a 100644
--- a/MdePkg/Include/Protocol/Http.h
+++ b/MdePkg/Include/Protocol/Http.h
@@ -191,6 +191,11 @@ typedef struct {
   /// is assumed. See RFC 3986 for more details on URI syntax.
   ///
   CHAR16 *Url;
+  ///
+  /// The URI of an endpoint host if the Url field contains the address of a 
proxy server.
+  /// This field will be NULL there is no proxy server in the device path.
+  ///
+  CHAR16 *EndPointUrl;
 } EFI_HTTP_REQUEST_DATA;
 
 ///
diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index 40f64fcb6bf8..2bdf07560382 100644
--- a/NetworkP