Re: [edk2-devel] [PATCH v1] UefiCpuPkg/Library: Cleanup debug message in LmceSupport

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Wu, Jiaxin  
Sent: Monday, April 29, 2024 1:32 PM
To: devel@edk2.groups.io
Cc: Ni, Ray ; Zeng, Star ; Gerd Hoffmann 
; Kumar, Rahul R 
Subject: [PATCH v1] UefiCpuPkg/Library: Cleanup debug message in LmceSupport

ProcessorNumber 0 is not always BSP. Debug message based on 0
of ProcessorNumber is incorrect.

This patch is to clean the debug message in LmceSupport
directly.

Cc: Ray Ni 
Cc: Zeng Star 
Cc: Gerd Hoffmann 
Cc: Rahul Kumar 
Signed-off-by: Jiaxin Wu 
---
 UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c 
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index d8b070d9f1..cb569769a1 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -1,9 +1,9 @@
 /** @file
   Machine Check features.
 
-  Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+  Copyright (c) 2017 - 2024, Intel Corporation. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
 #include "CpuCommonFeatures.h"
@@ -287,13 +287,10 @@ LmceSupport (
   if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
 return FALSE;
   }
 
   McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
-  if (ProcessorNumber == 0) {
-DEBUG ((DEBUG_INFO, "LMCE enable = %x\n", (BOOLEAN)(McgCap.Bits.MCG_LMCE_P 
!= 0)));
-  }
 
   return (BOOLEAN)(McgCap.Bits.MCG_LMCE_P != 0);
 }
 
 /**
-- 
2.16.2.windows.1



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Re: [edk2-devel] [PATCH v1 1/2] MdePkg/SmBios.h: Add New ProcessorUpgrade definitions for SMBIOS Type4

[Zeng, Star]

Reviewed-by: Star Zeng  to this series.

-Original Message-
From: Lou, Yun  
Sent: Sunday, April 14, 2024 11:24 PM
To: devel@edk2.groups.io
Cc: Lou, Yun ; Liu, Zhiguang ; Bi, 
Dandan ; Zeng, Star ; Gao, Zhichao 
; Lin, Benny ; Guo, Gua 
; Kinney, Michael D ; Liming Gao 

Subject: [PATCH v1 1/2] MdePkg/SmBios.h: Add New ProcessorUpgrade definitions 
for SMBIOS Type4

From: Jason Lou 

The patch adds new ProcessorUpgrade definitions for SMBIOS Type4 based
on SMBIOS 3.8.0.

Signed-off-by: Jason Lou 
Cc: Zhiguang Liu 
Cc: Dandan Bi 
Cc: Star Zeng 
Cc: Zhichao Gao 
Cc: Benny Lin 
Cc: Gua Guo 
Cc: Michael D Kinney 
Cc: Liming Gao 
---
 MdePkg/Include/IndustryStandard/SmBios.h | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
b/MdePkg/Include/IndustryStandard/SmBios.h
index bdb28fc3a3..020733b777 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -880,7 +880,14 @@ typedef enum {
   ProcessorUpgradeSocketBGA1190   = 0x4D,

   ProcessorUpgradeSocketBGA4129   = 0x4E,

   ProcessorUpgradeSocketLGA4710   = 0x4F,

-  ProcessorUpgradeSocketLGA7529   = 0x50

+  ProcessorUpgradeSocketLGA7529   = 0x50,

+  ProcessorUpgradeSocketBGA1964   = 0x51,

+  ProcessorUpgradeSocketBGA1792   = 0x52,

+  ProcessorUpgradeSocketBGA2049   = 0x53,

+  ProcessorUpgradeSocketBGA2551   = 0x54,

+  ProcessorUpgradeSocketLGA1851   = 0x55,

+  ProcessorUpgradeSocketBGA2114   = 0x56,

+  ProcessorUpgradeSocketBGA2833   = 0x57

 } PROCESSOR_UPGRADE;

 

 ///

-- 
2.44.0.windows.1



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Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries

[Zeng, Star]

Thank you Laszlo.

Is ler...@redhat.com still reachable for now ? 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of gaoliming via 
groups.io
Sent: Monday, March 11, 2024 8:22 AM
To: devel@edk2.groups.io; pedro.falc...@gmail.com; ler...@redhat.com
Cc: Kinney, Michael D ; 'Andrew Fish' 
; 'Ard Biesheuvel' ; 'Gerd 
Hoffmann' ; Yao, Jiewen ; 'Leif 
Lindholm' ; Kumar, Rahul R 
; Ni, Ray ; 'Sami Mujawar' 

Subject: 回复: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries

Thank you for your quick and great support on edk2 community. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Pedro Falcato
> 发送时间: 2024年3月8日 23:07
> 收件人: devel@edk2.groups.io; ler...@redhat.com
> 抄送: michael.d.kin...@intel.com; Andrew Fish ; Ard 
> Biesheuvel ; Gerd Hoffmann 
> ; Yao, Jiewen ; Leif Lindholm 
> ; Kumar, Rahul R ; 
> Ni, Ray ; Sami Mujawar 
> 主题: Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo's entries
> 
> On Fri, Mar 8, 2024 at 9:14 AM Laszlo Ersek  wrote:
> >
> > On 3/6/24 23:22, Michael D Kinney wrote:
> > > Reviewed-by: Michael D Kinney 
> >
> > Merged as commit ccf91b518f22, via
> > .
> >
> > Thank you all for everything,
> 
> Thank you for your great (and often thankless) work throughout the 
> whole of EDK2 and OVMF. It was great to have learned from you 
> throughout the years.
> 
> PS: CREDITS file anyone?
> 
> --
> Pedro
> 
> 
> 
> 










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Re: [edk2-devel] [PATCH v2 08/10] IntelFsp2Pkg: auto-generate SEC ProcessLibraryConstructorList() decl

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Laszlo Ersek
Sent: Thursday, March 7, 2024 5:10 AM
To: edk2-devel-groups-io 
Cc: S, Ashraf Ali ; Chiu, Chasel 
; Duggapu, Chinni B ; 
Desimone, Nathaniel L ; Zeng, Star 
; Mohapatra, Susovan ; Kuo, 
Ted 
Subject: Re: [edk2-devel] [PATCH v2 08/10] IntelFsp2Pkg: auto-generate SEC 
ProcessLibraryConstructorList() decl

Can I please get a quick R-b for this patch -- it's urgent because of 
<https://edk2.groups.io/g/devel/message/116453>.

Thank you,
Laszlo

On 3/5/24 12:38, Laszlo Ersek wrote:
> Rely on AutoGen for declaring ProcessLibraryConstructorList().
> 
> Build-tested with:
> 
>   build -a X64 -b DEBUG -m IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf \
> -p IntelFsp2Pkg/IntelFsp2Pkg.dsc -t GCC5
> 
>   build -a X64 -b DEBUG -m IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf \
> -p IntelFsp2Pkg/IntelFsp2Pkg.dsc -t GCC5
> 
> Cc: Ashraf Ali S 
> Cc: Chasel Chiu 
> Cc: Duggapu Chinni B 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Susovan Mohapatra 
> Cc: Ted Kuo 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
> Signed-off-by: Laszlo Ersek 
> ---
>  IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf |  2 +-
>  IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf   |  2 +-
>  IntelFsp2Pkg/FspSecCore/SecMain.h | 12 
>  3 files changed, 2 insertions(+), 14 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf 
> b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> index cb011f99f964..7d60e2283e26 100644
> --- a/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> @@ -8,7 +8,7 @@
>  ##
>  
>  [Defines]
> -  INF_VERSION= 0x00010005
> +  INF_VERSION= 1.30
>BASE_NAME  = Fsp24SecCoreM
>FILE_GUID  = C5BC0719-4A23-4F6E-94DA-05FB6A0DFA9C
>MODULE_TYPE= SEC
> diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf 
> b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> index 8029832235ec..d496f3957d1b 100644
> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> @@ -8,7 +8,7 @@
>  ##
>  
>  [Defines]
> -  INF_VERSION= 0x00010005
> +  INF_VERSION= 1.30
>BASE_NAME  = FspSecCoreM
>FILE_GUID  = C2F9AE46-3437-4FEF-9CB1-9A568B282FEE
>MODULE_TYPE= SEC
> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h 
> b/IntelFsp2Pkg/FspSecCore/SecMain.h
> index 023deb7e2bda..eb1458d19773 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.h
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
> @@ -110,18 +110,6 @@ SecStartup (
>IN UINT32  ApiIdx
>);
>  
> -/**
> -  Autogenerated function that calls the library constructors for all 
> of the module's
> -  dependent libraries.  This function must be called by the SEC Core 
> once a stack has
> -  been established.
> -
> -**/
> -VOID
> -EFIAPI
> -ProcessLibraryConstructorList (
> -  VOID
> -  );
> -
>  /**
>  
>Return value of esp.
> 
> 
> 
> 
> 
> 








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Re: [edk2-devel] [PATCH v4 1/2] MdePkg/SmBios.h: Add New ProcessorFamily definitions for SMBIOS Type4

[Zeng, Star]

Reviewed-by: Star Zeng  to this series.

-Original Message-
From: gaoliming  
Sent: Monday, February 26, 2024 9:32 PM
To: devel@edk2.groups.io; Lou, Yun 
Cc: Liu, Zhiguang ; Bi, Dandan ; 
Zeng, Star ; Gao, Zhichao ; Lin, 
Benny ; Guo, Gua ; Kinney, Michael D 

Subject: 回复: [edk2-devel] [PATCH v4 1/2] MdePkg/SmBios.h: Add New 
ProcessorFamily definitions for SMBIOS Type4

Reviewed-by: Liming Gao 

> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Jason Lou
> 发送时间: 2024年2月25日 17:06
> 收件人: devel@edk2.groups.io
> 抄送: Jason Lou ; Zhiguang Liu
;
> Dandan Bi ; Star Zeng ; 
> Zhichao Gao ; Benny Lin ; 
> Gua Guo ; Michael D Kinney 
> ; Liming Gao 
> 主题: [edk2-devel] [PATCH v4 1/2] MdePkg/SmBios.h: Add New 
> ProcessorFamily definitions for SMBIOS Type4
> 
> From: Jason Lou 
> 
> The patch adds new ProcessorFamily definitions for SMBIOS Type4 based 
> on SMBIOS 3.8.0.
> 
> Signed-off-by: Jason Lou 
> Cc: Zhiguang Liu 
> Cc: Dandan Bi 
> Cc: Star Zeng 
> Cc: Zhichao Gao 
> Cc: Benny Lin 
> Cc: Gua Guo 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> ---
>  MdePkg/Include/IndustryStandard/SmBios.h | 14 +++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
> b/MdePkg/Include/IndustryStandard/SmBios.h
> index 56cec615a0..bdb28fc3a3 100644
> --- a/MdePkg/Include/IndustryStandard/SmBios.h
> +++ b/MdePkg/Include/IndustryStandard/SmBios.h
> @@ -1,7 +1,7 @@
>  /** @file
> 
> -  Industry Standard Definitions of SMBIOS Table Specification v3.7.0.
> 
> +  Industry Standard Definitions of SMBIOS Table Specification v3.8.0.
> 
> 
> 
> -Copyright (c) 2006 - 2023, Intel Corporation. All rights 
> reserved.
> 
> +Copyright (c) 2006 - 2024, Intel Corporation. All rights 
> +reserved.
> 
>  (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
> 
>  (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development 
> LP
> 
>  Copyright (c) 2022, AMD Incorporated. All rights reserved.
> 
> @@ -774,7 +774,15 @@ typedef enum {
>ProcessorFamilyQuadCoreLoongson3B  = 0x026E,
> 
>ProcessorFamilyMultiCoreLoongson3B = 0x026F,
> 
>ProcessorFamilyMultiCoreLoongson3C = 0x0270,
> 
> -  ProcessorFamilyMultiCoreLoongson3D = 0x0271
> 
> +  ProcessorFamilyMultiCoreLoongson3D = 0x0271,
> 
> +  ProcessorFamilyIntelCore3  = 0x0300,
> 
> +  ProcessorFamilyIntelCore5  = 0x0301,
> 
> +  ProcessorFamilyIntelCore7  = 0x0302,
> 
> +  ProcessorFamilyIntelCore9  = 0x0303,
> 
> +  ProcessorFamilyIntelCoreUltra3 = 0x0304,
> 
> +  ProcessorFamilyIntelCoreUltra5 = 0x0305,
> 
> +  ProcessorFamilyIntelCoreUltra7 = 0x0306,
> 
> +  ProcessorFamilyIntelCoreUltra9 = 0x0307
> 
>  } PROCESSOR_FAMILY2_DATA;
> 
> 
> 
>  ///
> 
> --
> 2.39.1.windows.1
> 
> 
> 
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> [gaolim...@byosoft.com.cn]
> -=-=-=-=-=-=
> 





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Re: [edk2-devel] [PATCH v1 1/1] MdePkg/Include/IndustryStandard/SmBios.h: Add New Intel Processor family for SMBIOS Type 4 from SMBIOS 3.7.0

[Zeng, Star]

Reviewed-by: Star Zeng 

BTW: You'd better to have a separated patch to also update 
https://github.com/tianocore/edk2/blob/master/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c#L1713.

-Original Message-
From: gaoliming  
Sent: Tuesday, September 5, 2023 10:29 AM
To: devel@edk2.groups.io; Bhargava, Avinash 
Cc: Liu, Zhiguang ; Bi, Dandan ; 
Zeng, Star ; Gao, Zhichao 
Subject: 回复: [edk2-devel] [PATCH v1 1/1] 
MdePkg/Include/IndustryStandard/SmBios.h: Add New Intel Processor family for 
SMBIOS Type 4 from SMBIOS 3.7.0

Avi:
  The change is good.  Reviewed-by: Liming Gao 
  
  But, I have one minor comment. Please see below. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Avinash
> 发送时间: 2023年9月2日 2:21
> 收件人: devel@edk2.groups.io
> 抄送: avinashbhargava ; Zhiguang Liu 
> ; Dandan Bi ; Star Zeng 
> ; Zhichao Gao 
> 主题: [edk2-devel] [PATCH v1 1/1]
> MdePkg/Include/IndustryStandard/SmBios.h: Add New Intel Processor 
> family for SMBIOS Type 4 from SMBIOS 3.7.0
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4547
> 
> Add New Intel Processor family for SMBIOS Type 4 from SMBIOS 3.7.0 Hex 
> value - 16h Name - Intel® Processor

[Liming] Please remove non ascii char ® in the commit message. 

Thanks
Liming
> 
> Signed-off-by: avinashbhargava 
> Cc: Zhiguang Liu 
> Cc: Dandan Bi 
> Cc: Star Zeng 
> Cc: Zhichao Gao 
> ---
>  MdePkg/Include/IndustryStandard/SmBios.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
> b/MdePkg/Include/IndustryStandard/SmBios.h
> index 40bdc9a937c0..56cec615a010 100644
> --- a/MdePkg/Include/IndustryStandard/SmBios.h
> +++ b/MdePkg/Include/IndustryStandard/SmBios.h
> @@ -554,6 +554,7 @@ typedef enum {
>ProcessorFamilyM2  = 0x13,
> 
>ProcessorFamilyIntelCeleronM   = 0x14,
> 
>ProcessorFamilyIntelPentium4Ht = 0x15,
> 
> +  ProcessorFamilyIntel   = 0x16,
> 
>ProcessorFamilyAmdDuron= 0x18,
> 
>ProcessorFamilyK5  = 0x19,
> 
>ProcessorFamilyK6  = 0x1A,
> 
> --
> 2.37.3.windows.1
> 
> 
> 
> 
> 





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Re: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0

[Zeng, Star]

Liming,

Need your help to review and merge this patch series after the code freeze.

Thanks,
Star
-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zeng, Star
Sent: Friday, August 18, 2023 7:34 PM
To: Gao, Liming ; devel@edk2.groups.io; Cuevas 
Farfan, Eduardo 
Cc: Kinney, Michael D ; Liu, Zhiguang 
; Gao, Zhichao ; Zeng, Star 

Subject: Re: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket definitions 
from SMBIOS 3.7.0

Got it, thanks Liming. So we need wait until 2023-08-25, then you can help 
merge the patches. 

-Original Message-
From: gaoliming 
Sent: Friday, August 18, 2023 3:03 PM
To: devel@edk2.groups.io; Zeng, Star ; Cuevas Farfan, 
Eduardo 
Cc: Kinney, Michael D ; Liu, Zhiguang 
; Gao, Zhichao 
Subject: 回复: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket definitions 
from SMBIOS 3.7.0

This patch seems a new feature to add new definition from SMBIOS 3.7.0. It is 
sent and reviewed after soft feature freeze. 

Based on the release rule, it will not be merged for this stable tag 202308. It 
can be merged after the stable tag is created. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Zeng, Star
> 发送时间: 2023年8月18日 11:11
> 收件人: Gao, Liming ; devel@edk2.groups.io; 
> Cuevas Farfan, Eduardo 
> 抄送: Kinney, Michael D ; Liu, Zhiguang 
> ; Gao, Zhichao ; Zeng, 
> Star 
> 主题: Re: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket 
> definitions from SMBIOS 3.7.0
> 
> I have given review to both patches and Zhichao has given review to 
> ShellPkg patch.
> Liming, need your help to review and merge the patches. 
> 
> 
> Thanks,
> Star
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Eduardo 
> Cuevas Farfan
> Sent: Friday, August 11, 2023 12:32 AM
> To: devel@edk2.groups.io
> Cc: Cuevas Farfan, Eduardo 
> Subject: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket 
> definitions from SMBIOS 3.7.0
> 
> Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0 to edk2 
> sources
> 
> Eduardo Cuevas Farfan (2):
>   MdePkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0
>   ShellPkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0
> 
>  MdePkg/Include/IndustryStandard/SmBios.h  | 12 +--
>  .../SmbiosView/QueryTable.c   | 34
> ++-
>  2 files changed, 43 insertions(+), 3 deletions(-)
> 
> --
> 2.26.2.windows.1
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 










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Re: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0

[Zeng, Star]

Got it, thanks Liming. So we need wait until 2023-08-25, then you can help 
merge the patches. 

-Original Message-
From: gaoliming  
Sent: Friday, August 18, 2023 3:03 PM
To: devel@edk2.groups.io; Zeng, Star ; Cuevas Farfan, 
Eduardo 
Cc: Kinney, Michael D ; Liu, Zhiguang 
; Gao, Zhichao 
Subject: 回复: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket definitions 
from SMBIOS 3.7.0

This patch seems a new feature to add new definition from SMBIOS 3.7.0. It is 
sent and reviewed after soft feature freeze. 

Based on the release rule, it will not be merged for this stable tag 202308. It 
can be merged after the stable tag is created. 

Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Zeng, Star
> 发送时间: 2023年8月18日 11:11
> 收件人: Gao, Liming ; devel@edk2.groups.io; 
> Cuevas Farfan, Eduardo 
> 抄送: Kinney, Michael D ; Liu, Zhiguang 
> ; Gao, Zhichao ; Zeng, 
> Star 
> 主题: Re: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket 
> definitions from SMBIOS 3.7.0
> 
> I have given review to both patches and Zhichao has given review to 
> ShellPkg patch.
> Liming, need your help to review and merge the patches. 
> 
> 
> Thanks,
> Star
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Eduardo 
> Cuevas Farfan
> Sent: Friday, August 11, 2023 12:32 AM
> To: devel@edk2.groups.io
> Cc: Cuevas Farfan, Eduardo 
> Subject: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket 
> definitions from SMBIOS 3.7.0
> 
> Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0 to edk2 
> sources
> 
> Eduardo Cuevas Farfan (2):
>   MdePkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0
>   ShellPkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0
> 
>  MdePkg/Include/IndustryStandard/SmBios.h  | 12 +--
>  .../SmbiosView/QueryTable.c   | 34
> ++-
>  2 files changed, 43 insertions(+), 3 deletions(-)
> 
> --
> 2.26.2.windows.1
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 





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Re: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0

[Zeng, Star]

I have given review to both patches and Zhichao has given review to ShellPkg 
patch.
Liming, need your help to review and merge the patches. 


Thanks,
Star
-Original Message-
From: devel@edk2.groups.io  On Behalf Of Eduardo Cuevas 
Farfan
Sent: Friday, August 11, 2023 12:32 AM
To: devel@edk2.groups.io
Cc: Cuevas Farfan, Eduardo 
Subject: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocket definitions 
from SMBIOS 3.7.0

Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0 to edk2 sources

Eduardo Cuevas Farfan (2):
  MdePkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0
  ShellPkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0

 MdePkg/Include/IndustryStandard/SmBios.h  | 12 +--
 .../SmbiosView/QueryTable.c   | 34 ++-
 2 files changed, 43 insertions(+), 3 deletions(-)

-- 
2.26.2.windows.1








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Re: [edk2-devel] [PATCH V2 2/2] ShellPkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Eduardo Cuevas 
Farfan
Sent: Friday, August 11, 2023 12:32 AM
To: devel@edk2.groups.io
Cc: Cuevas Farfan, Eduardo 
Subject: [edk2-devel] [PATCH V2 2/2] ShellPkg: Add ProcessorUpgradeSocket 
definitions from SMBIOS 3.7.0

This patch adds below definitions from SMBIOS 3.7.0 into QueryTable.c
- ProcessorUpgradeSocketAM5
- ProcessorUpgradeSocketSP5
- ProcessorUpgradeSocketSP6
- ProcessorUpgradeSocketBGA883
- ProcessorUpgradeSocketBGA1190
- ProcessorUpgradeSocketBGA4129
- ProcessorUpgradeSocketLGA4710
- ProcessorUpgradeSocketLGA7529

Signed-off-by: Eduardo Cuevas Farfan 
---
 .../SmbiosView/QueryTable.c   | 34 ++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 29b5a2900150..82bb7a41f0e6 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -2,7 +2,7 @@
   Build a table, each item is (Key, Info) pair.

   And give a interface of query a string out of a table.

 

-  Copyright (c) 2005 - 2021, Intel Corporation. All rights reserved.

+  Copyright (c) 2005 - 2023, Intel Corporation. All rights reserved.

   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP

   Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -638,6 +638,38 @@ TABLE_ITEM  ProcessorUpgradeTable[] = {
   {

 0x48,

 L"Socket BGA5773"

+  },

+  {

+0x49,

+L"Socket AM5"

+  },

+  {

+0x4A,

+L"Socket SP5"

+  },

+  {

+0x4B,

+L"Socket SP6"

+  },

+  {

+0x4C,

+L"Socket BGA883"

+  },

+  {

+0x4D,

+L"Socket BGA1190"

+  },

+  {

+0x4E,

+L"Socket BGA4129"

+  },

+  {

+0x4F,

+L"Socket LGA4710"

+  },

+  {

+0x50,

+L"Socket LGA7529"

   }

 };

 

-- 
2.26.2.windows.1



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Re: [edk2-devel] [PATCH V2 1/2] MdePkg: Add ProcessorUpgradeSocket definitions from SMBIOS 3.7.0

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Eduardo Cuevas 
Farfan
Sent: Friday, August 11, 2023 12:32 AM
To: devel@edk2.groups.io
Cc: Cuevas Farfan, Eduardo 
Subject: [edk2-devel] [PATCH V2 1/2] MdePkg: Add ProcessorUpgradeSocket 
definitions from SMBIOS 3.7.0

This patch adds below definitions from SMBIOS 3.7.0 into Smbios.h
- ProcessorUpgradeSocketAM5
- ProcessorUpgradeSocketSP5
- ProcessorUpgradeSocketSP6
- ProcessorUpgradeSocketBGA883
- ProcessorUpgradeSocketBGA1190
- ProcessorUpgradeSocketBGA4129
- ProcessorUpgradeSocketLGA4710
- ProcessorUpgradeSocketLGA7529

Signed-off-by: Eduardo Cuevas Farfan 
---
 MdePkg/Include/IndustryStandard/SmBios.h | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
b/MdePkg/Include/IndustryStandard/SmBios.h
index 89985bb4186b..fb6ed2dee051 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
 /** @file

   Industry Standard Definitions of SMBIOS Table Specification v3.6.0.

 

-Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.

+Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.

 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP

 (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP

 Copyright (c) 2022, AMD Incorporated. All rights reserved.

@@ -863,7 +863,15 @@ typedef enum {
   ProcessorUpgradeSocketLGA1211   = 0x45,

   ProcessorUpgradeSocketLGA2422   = 0x46,

   ProcessorUpgradeSocketLGA5773   = 0x47,

-  ProcessorUpgradeSocketBGA5773   = 0x48

+  ProcessorUpgradeSocketBGA5773   = 0x48,

+  ProcessorUpgradeSocketAM5   = 0x49,

+  ProcessorUpgradeSocketSP5   = 0x4A,

+  ProcessorUpgradeSocketSP6   = 0x4B,

+  ProcessorUpgradeSocketBGA883= 0x4C,

+  ProcessorUpgradeSocketBGA1190   = 0x4D,

+  ProcessorUpgradeSocketBGA4129   = 0x4E,

+  ProcessorUpgradeSocketLGA4710   = 0x4F,

+  ProcessorUpgradeSocketLGA7529   = 0x50

 } PROCESSOR_UPGRADE;

 

 ///

-- 
2.26.2.windows.1



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Re: [edk2-devel] [PATCH 2/2] ShellPkg: Add ProcessorUpgradeSocket definitios from SMBIOS 3.7.0

[Zeng, Star]

There is typo definitios -> definitions in subject.
Please correct it.

Cc maintainers.

Thanks,
Star

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Eduardo Cuevas 
Farfan
Sent: Wednesday, August 9, 2023 11:03 AM
To: devel@edk2.groups.io
Cc: Cuevas Farfan, Eduardo 
Subject: [edk2-devel] [PATCH 2/2] ShellPkg: Add ProcessorUpgradeSocket 
definitios from SMBIOS 3.7.0

This patch adds below definitions from SMBIOS 3.7.0 into QueryTable.c
- ProcessorUpgradeSocketAM5
- ProcessorUpgradeSocketSP5
- ProcessorUpgradeSocketSP6
- ProcessorUpgradeSocketBGA883
- ProcessorUpgradeSocketBGA1190
- ProcessorUpgradeSocketBGA4129
- ProcessorUpgradeSocketLGA4710
- ProcessorUpgradeSocketLGA7529

Signed-off-by: Eduardo Cuevas Farfan 
---
 .../SmbiosView/QueryTable.c   | 34 ++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 29b5a29001..82bb7a41f0 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -2,7 +2,7 @@
   Build a table, each item is (Key, Info) pair.

   And give a interface of query a string out of a table.

 

-  Copyright (c) 2005 - 2021, Intel Corporation. All rights reserved.

+  Copyright (c) 2005 - 2023, Intel Corporation. All rights reserved.

   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP

   Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -638,6 +638,38 @@ TABLE_ITEM  ProcessorUpgradeTable[] = {
   {

 0x48,

 L"Socket BGA5773"

+  },

+  {

+0x49,

+L"Socket AM5"

+  },

+  {

+0x4A,

+L"Socket SP5"

+  },

+  {

+0x4B,

+L"Socket SP6"

+  },

+  {

+0x4C,

+L"Socket BGA883"

+  },

+  {

+0x4D,

+L"Socket BGA1190"

+  },

+  {

+0x4E,

+L"Socket BGA4129"

+  },

+  {

+0x4F,

+L"Socket LGA4710"

+  },

+  {

+0x50,

+L"Socket LGA7529"

   }

 };

 

-- 
2.26.2.windows.1



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Re: [edk2-devel] [PATCH 1/2] MdePkg: Add ProcessorUpgradeSocket definitios from SMBIOS 3.7.0

[Zeng, Star]

There is typo definitios -> definitions in subject.
Please correct it.

Cc maintainers.

Thanks,
Star

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Eduardo Cuevas 
Farfan
Sent: Wednesday, August 9, 2023 11:03 AM
To: devel@edk2.groups.io
Cc: Cuevas Farfan, Eduardo 
Subject: [edk2-devel] [PATCH 1/2] MdePkg: Add ProcessorUpgradeSocket definitios 
from SMBIOS 3.7.0

This patch adds below definitions from SMBIOS 3.7.0 into Smbios.h
- ProcessorUpgradeSocketAM5
- ProcessorUpgradeSocketSP5
- ProcessorUpgradeSocketSP6
- ProcessorUpgradeSocketBGA883
- ProcessorUpgradeSocketBGA1190
- ProcessorUpgradeSocketBGA4129
- ProcessorUpgradeSocketLGA4710
- ProcessorUpgradeSocketLGA7529

Signed-off-by: Eduardo Cuevas Farfan 
---
 MdePkg/Include/IndustryStandard/SmBios.h | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
b/MdePkg/Include/IndustryStandard/SmBios.h
index 89985bb418..fb6ed2dee0 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
 /** @file

   Industry Standard Definitions of SMBIOS Table Specification v3.6.0.

 

-Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.

+Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.

 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP

 (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP

 Copyright (c) 2022, AMD Incorporated. All rights reserved.

@@ -863,7 +863,15 @@ typedef enum {
   ProcessorUpgradeSocketLGA1211   = 0x45,

   ProcessorUpgradeSocketLGA2422   = 0x46,

   ProcessorUpgradeSocketLGA5773   = 0x47,

-  ProcessorUpgradeSocketBGA5773   = 0x48

+  ProcessorUpgradeSocketBGA5773   = 0x48,

+  ProcessorUpgradeSocketAM5   = 0x49,

+  ProcessorUpgradeSocketSP5   = 0x4A,

+  ProcessorUpgradeSocketSP6   = 0x4B,

+  ProcessorUpgradeSocketBGA883= 0x4C,

+  ProcessorUpgradeSocketBGA1190   = 0x4D,

+  ProcessorUpgradeSocketBGA4129   = 0x4E,

+  ProcessorUpgradeSocketLGA4710   = 0x4F,

+  ProcessorUpgradeSocketLGA7529   = 0x50

 } PROCESSOR_UPGRADE;

 

 ///

-- 
2.26.2.windows.1



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Re: [edk2-devel] [Patch V4 3/4] OvmfPkg: Disable PcdFirstTimeWakeUpAPsBySipi.

[Zeng, Star]

Minor comment " to indicate whether to broadcast INIT-SIPI-SIPI or SIPI" -> " 
to broadcast INIT-SIPI-SIPI for first time AP wakeup" or similar.

Thanks,
Star
-Original Message-
From: Xie, Yuanhao  
Sent: Friday, July 28, 2023 1:24 PM
To: Zeng, Star 
Cc: Dong, Eric ; Ni, Ray ; Kumar, Rahul 
R ; Gerd Hoffmann ; Ard Biesheuvel 
; Yao, Jiewen ; Justen, Jordan 
L ; devel@edk2.groups.io
Subject: RE: [Patch V4 3/4] OvmfPkg: Disable PcdFirstTimeWakeUpAPsBySipi.

Hi Star,

Could you please review this patch, I have made updates to the comments for:
Do we really want to mention OVMF specifically in UefiCpuPkg.dec PCD 
definition ?
Those comments may be better to be in OVMF dsc PCD override.
 
Thanks for the feedback
Yuanhao

-Original Message-
From: Xie, Yuanhao 
Sent: Friday, July 28, 2023 1:18 PM
To: devel@edk2.groups.io
Cc: Dong, Eric ; Ni, Ray ; Kumar, Rahul 
R ; Gerd Hoffmann ; Ard Biesheuvel 
; Yao, Jiewen ; Justen, Jordan 
L ; Xie, Yuanhao 
Subject: [Patch V4 3/4] OvmfPkg: Disable PcdFirstTimeWakeUpAPsBySipi.

Disable PcdFirstTimeWakeUpAPsBySipi for OVMF to let BSP wake up APs by 
INIT-SIPI-SIPI.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Jordan Justen 
Signed-off-by: Yuanhao Xie 
Reviewed-by: Ray Ni 
---
 OvmfPkg/OvmfPkgIa32.dsc| 9 -
 OvmfPkg/OvmfPkgIa32X64.dsc | 7 +++
 OvmfPkg/OvmfPkgX64.dsc | 7 +++
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 
ed36935770..0193ea8af8 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  EFI/Framework Open Virtual Machine Firmware (OVMF) platform  # -#  
Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
+#  Copyright (c) 2006 - 2023, Intel Corporation. All rights 
+reserved.
 #  (C) Copyright 2016 Hewlett Packard Enterprise Development LP  #  
Copyright (c) Microsoft Corporation.
 #
@@ -585,6 +585,13 @@
 
   # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 
0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+  #
+  # INIT is now triggered before BIOS by ucode/hardware. In the OVMF  # 
+ environment, QEMU lacks a simulation for the INIT process.
+  # To address this, PcdFirstTimeWakeUpAPsBySipi set to FALSE to  # 
+ indicate whether to broadcast INIT-SIPI-SIPI or SIPI.
+  #
+  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|FALSE
 
 

 #
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 
919315e4cb..05ded289ad 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -566,6 +566,13 @@
 !if $(SOURCE_DEBUG_ENABLE) == TRUE
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
 !endif
+  #
+  # INIT is now triggered before BIOS by ucode/hardware. In the OVMF  # 
+ environment, QEMU lacks a simulation for the INIT process.
+  # To address this, PcdFirstTimeWakeUpAPsBySipi set to FALSE to  # 
+ indicate whether to broadcast INIT-SIPI-SIPI or SIPI.
+  #
+  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|FALSE
 
 [PcdsFixedAtBuild.IA32]
   #
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 
823de0d0f9..d588e09da5 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -615,6 +615,13 @@
 
   # Point to the MdeModulePkg/Application/UiApp/UiApp.inf
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 
0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+  #
+  # INIT is now triggered before BIOS by ucode/hardware. In the OVMF  # 
+ environment, QEMU lacks a simulation for the INIT process.
+  # To address this, PcdFirstTimeWakeUpAPsBySipi set to FALSE to  # 
+ indicate whether to broadcast INIT-SIPI-SIPI or SIPI.
+  #
+  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|FALSE
 
 

 #
--
2.36.1.windows.1



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Re: [edk2-devel] [Patch V4 2/4] UefiCpuPkg: Add PcdFirstTimeWakeUpAPsBySipi

[Zeng, Star]

Would like to highlight it is for first time.

" Determining Whether APs Awakened from SIPI or INIT-SIPI-SIPI" to "Determining 
APs first time wakeup by SIPI or INIT-SIPI-SIPI" or similar.
" BSP Broadcast Method" -> " BSP Broadcast Method for first time AP wakeup" or 
similar.

Thanks,
Star
-Original Message-
From: Xie, Yuanhao  
Sent: Friday, July 28, 2023 1:24 PM
To: Zeng, Star 
Cc: Dong, Eric ; Ni, Ray ; Kumar, Rahul 
R ; Gerd Hoffmann ; 
devel@edk2.groups.io
Subject: RE: [Patch V4 2/4] UefiCpuPkg: Add PcdFirstTimeWakeUpAPsBySipi

Hi Star,

Could you please review this patch, I have made updates to the comments for:
Do we really want to mention OVMF specifically in UefiCpuPkg.dec PCD 
definition ?
Those comments may be better to be in OVMF dsc PCD override.
 
Thanks for the feedback
Yuanhao

-Original Message-
From: Xie, Yuanhao 
Sent: Friday, July 28, 2023 1:18 PM
To: devel@edk2.groups.io
Cc: Dong, Eric ; Ni, Ray ; Kumar, Rahul 
R ; Gerd Hoffmann ; Xie, Yuanhao 

Subject: [Patch V4 2/4] UefiCpuPkg: Add PcdFirstTimeWakeUpAPsBySipi

Add PcdFirstTimeWakeUpAPsBySipi to check if it is in the OVMF environment  and 
necessary to wake up APs by INIT-SIPI-SIPI.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Yuanhao Xie 
Reviewed-by: Ray Ni 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |  1 +  
UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |  1 +
 UefiCpuPkg/UefiCpuPkg.dec | 11 +++
 3 files changed, 13 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 7d45d3ad4d..55e46d4a1f 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -81,6 +81,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckIntervalInMicroSeconds  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ## 
CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ## 
SOMETIMES_CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
CONSUMES
   gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## 
CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index 83e9028d0f..bc3d716aa9 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -66,6 +66,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ## 
SOMETIMES_CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ## CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi ## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## CONSUMES
   gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ## CONSUMES
 
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 
e7726a605c..fcfbd618dc 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -214,6 +214,17 @@
   # @Prompt Configure the SEV-ES work area base
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize|0x0|UINT32|0x30002006
 
+  ## Determining Whether APs Awakened from SIPI or INIT-SIPI-SIPI.
+  # Following a power-up or RESET of an MP system, The APs complete a # 
+ minimal self-configuration, then wait for a startup signal (a SIPI # 
+ message) from the BSP processor.
+  #
+  #   TRUE  - Broadcast SIPI.
+  #   FALSE - Broadcast INIT-SIPI-SIPI.
+  #
+  # @Prompt BSP Broadcast Method.
+  
+ gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|TRUE|BOOLEAN|0x3
+ 0002007
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## This value is the CPU Local APIC base address, which aligns the address 
on a 4-KByte boundary.
   # @Prompt Configure base address of CPU Local APIC
--
2.36.1.windows.1



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Re: [edk2-devel] [Patch V3 2/4] UefiCpuPkg: Add PcdFirstTimeWakeUpAPsBySipi

[Zeng, Star]

Do we really want to mention OVMF specifically in UefiCpuPkg.dec PCD definition 
?
Those comments may be better to be in OVMF dsc PCD override.

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Ni, Ray
Sent: Friday, July 21, 2023 11:52 AM
To: Xie, Yuanhao ; devel@edk2.groups.io
Cc: Dong, Guo ; Rhodes, Sean ; Lu, 
James ; Guo, Gua 
Subject: Re: [edk2-devel] [Patch V3 2/4] UefiCpuPkg: Add 
PcdFirstTimeWakeUpAPsBySipi

Reviewed-by: Ray Ni 

> -Original Message-
> From: Xie, Yuanhao 
> Sent: Thursday, July 20, 2023 3:08 PM
> To: devel@edk2.groups.io
> Cc: Dong, Guo ; Ni, Ray ; 
> Rhodes, Sean ; Lu, James ; 
> Guo, Gua ; Xie, Yuanhao 
> Subject: [Patch V3 2/4] UefiCpuPkg: Add PcdFirstTimeWakeUpAPsBySipi
> 
> Add PcdFirstTimeWakeUpAPsBySipi to check if it is in the OVMF 
> environment  and necessary to wake up APs by INIT-SIPI-SIPI.
> 
> Cc: Guo Dong 
> Cc: Ray Ni 
> Cc: Sean Rhodes 
> Cc: James Lu 
> Cc: Gua Guo 
> Signed-off-by: Yuanhao Xie 
> ---
>  UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |  1 +  
> UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |  1 +
>  UefiCpuPkg/UefiCpuPkg.dec | 11 +++
>  3 files changed, 13 insertions(+)
> 
> diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> index 7d45d3ad4d..55e46d4a1f 100644
> --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> @@ -81,6 +81,7 @@
>gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckIntervalInMicroSeconds  
> ## CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ##
> CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ##
> SOMETIMES_CONSUMES
> +  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi##
> CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ##
> CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
> CONSUMES
>gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ##
> CONSUMES
> diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
> b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
> index 83e9028d0f..bc3d716aa9 100644
> --- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
> +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
> @@ -66,6 +66,7 @@
>gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ##
> SOMETIMES_CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase   ##
> SOMETIMES_CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdGhcbHypervisorFeatures  ##
> CONSUMES
> +  gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi ##
> CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase   ## 
> CONSUMES
>gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr   ##
> CONSUMES
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec 
> index e7726a605c..cef0cbd43b 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dec
> +++ b/UefiCpuPkg/UefiCpuPkg.dec
> @@ -214,6 +214,17 @@
># @Prompt Configure the SEV-ES work area base
> 
> gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize|0x0|UINT32|0x30002006
> 
> +  ## INIT is now triggered before BIOS by ucode/hardware. In the OVMF  
> + # environment, QEMU lacks a simulation for the INIT process.
> +  # To address this, PcdFirstTimeWakeUpAPsBySipi is to indicate  # 
> + whether to broadcast INIT-SIPI-SIPI or SIPI.
> +  #
> +  #   TRUE  - Broadcast SIPI in the OVMF environment.
> +  #   FALSE - Broadcast INIT-SIPI-SIPI.
> +  #
> +  # @Prompt Ovmf environement Check.
> +
> gUefiCpuPkgTokenSpaceGuid.PcdFirstTimeWakeUpAPsBySipi|TRUE|BOOLEAN|0
> x30002007
> +
>  [PcdsFixedAtBuild, PcdsPatchableInModule]
>## This value is the CPU Local APIC base address, which aligns the 
> address on a 4-KByte boundary.
># @Prompt Configure base address of CPU Local APIC
> --
> 2.36.1.windows.1








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Re: [edk2-devel] [PATCH v1] UefiCpuPkg/PiSmmCpuDxeSmm: Fix S3 failure in SmmRestoreCpu

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Wu, Jiaxin  
Sent: Monday, March 13, 2023 3:04 PM
To: devel@edk2.groups.io
Cc: Dong, Eric ; Ni, Ray ; Zeng, Star 
; Laszlo Ersek ; Gerd Hoffmann 

Subject: [PATCH v1] UefiCpuPkg/PiSmmCpuDxeSmm: Fix S3 failure in SmmRestoreCpu

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4368

This issue is caused by the commit:
ec07fd0e35d90dbcc36be300a9ceeac29c5de2ad

GetFirstGuidHob() should not be used after exit boot service.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Zeng Star 
Cc: Laszlo Ersek 
Cc: Gerd Hoffmann 
Signed-off-by: Jiaxin Wu 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 14 +-
 1 file changed, 1 insertion(+), 13 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index d408b3f9f7..240eee6a7d 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -821,23 +821,11 @@ SmmRestoreCpu (
 // First time microcode load and restore MTRRs
 //
 InitializeCpuBeforeRebase ();
   }
 
-  //
-  // Make sure the gSmmBaseHobGuid existence status is the same between normal 
and S3 boot.
-  //
-  ASSERT (mSmmRelocated == (BOOLEAN)(GetFirstGuidHob () != 
NULL));
-  if (mSmmRelocated != (BOOLEAN)(GetFirstGuidHob () != NULL)) {
-DEBUG ((
-  DEBUG_ERROR,
-  "gSmmBaseHobGuid %a produced in normal boot but %a in S3 boot!",
-  mSmmRelocated ? "is" : "is not",
-  mSmmRelocated ? "is not" : "is"
-  ));
-CpuDeadLoop ();
-  }
+  DEBUG ((DEBUG_INFO, "SmmRestoreCpu: mSmmRelocated is %d\n", mSmmRelocated));
 
   //
   // Check whether Smm Relocation is done or not.
   // If not, will do the SmmBases Relocation here!!!
   //
-- 
2.16.2.windows.1



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Re: [edk2-devel] [PATCH] [IntelFsp2Pkg]: Fix GCC Compiler warning

[Zeng, Star]

Reviewed-by: Star Zeng  with typo defination -> definition 
fixed in commit message.

-Original Message-
From: Chaganty, Rangasai V  
Sent: Friday, March 10, 2023 8:27 AM
To: S, Ashraf Ali ; devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star 
Subject: RE: [PATCH] [IntelFsp2Pkg]: Fix GCC Compiler warning

Reviewed-by: Sai Chaganty 

-Original Message-
From: S, Ashraf Ali  
Sent: Thursday, March 09, 2023 8:06 AM
To: devel@edk2.groups.io
Cc: S, Ashraf Ali ; Chiu, Chasel 
; Desimone, Nathaniel L 
; Chaganty, Rangasai V 
; Zeng, Star 
Subject: [PATCH] [IntelFsp2Pkg]: Fix GCC Compiler warning

Function defination should match with declaration.
[-Wlto-type-mismatch]

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Sai Chaganty 
Cc: Star Zeng 

Signed-off-by: Ashraf Ali S 
---
 IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c 
b/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c
index 795bb28c0f..a5a51c804c 100644
--- a/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c
+++ b/IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c
@@ -296,6 +296,7 @@ FspTempRamExitDone2 (
 
 **/
 VOID
+EFIAPI
 FspWaitForNotify (
   VOID
   )
-- 
2.38.1.windows.1



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Re: [edk2-devel] [PATCH v2] UefiCpuPkg: Calculate DisplayFamily correctly

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Liu, Zhiguang  
Sent: Tuesday, March 7, 2023 2:32 PM
To: devel@edk2.groups.io
Cc: Liu, Zhiguang ; Dong, Eric ; 
Ni, Ray ; Kumar, Rahul R ; Gerd 
Hoffmann ; Zeng, Star ; Mike Maslenkin 

Subject: [PATCH v2] UefiCpuPkg: Calculate DisplayFamily correctly

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4348

Per SDM:
DisplayFamily = Extended_Family_ID + Family_ID.
DisplayModelID = (Extended_Model_ID << 4) + Family_ID.
Correct the related code.

Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Reviewed-by: Star Zeng 
Cc: Mike Maslenkin 
Signed-off-by: Zhiguang Liu 
---
 UefiCpuPkg/Application/Cpuid/Cpuid.c| 6 +++---
 .../Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c  | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/UefiCpuPkg/Application/Cpuid/Cpuid.c 
b/UefiCpuPkg/Application/Cpuid/Cpuid.c
index 372c6ef87d..172476a275 100644
--- a/UefiCpuPkg/Application/Cpuid/Cpuid.c
+++ b/UefiCpuPkg/Application/Cpuid/Cpuid.c
@@ -1,7 +1,7 @@
 /** @file
   UEFI Application to display CPUID leaf information.
 
-  Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2023, Intel Corporation. All rights 
+ reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -217,12 +217,12 @@ CpuidVersionInfo (
 
   DisplayFamily = Eax.Bits.FamilyId;
   if (Eax.Bits.FamilyId == 0x0F) {
-DisplayFamily |= (Eax.Bits.ExtendedFamilyId << 4);
+DisplayFamily += Eax.Bits.ExtendedFamilyId;
   }
 
   DisplayModel = Eax.Bits.Model;
   if ((Eax.Bits.FamilyId == 0x06) || (Eax.Bits.FamilyId == 0x0f)) {
-DisplayModel |= (Eax.Bits.ExtendedModelId << 4);
+DisplayModel += (Eax.Bits.ExtendedModelId << 4);
   }
 
   Print (L"  Family = %x  Model = %x  Stepping = %x\n", DisplayFamily, 
DisplayModel, Eax.Bits.SteppingId); diff --git 
a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index a8e4f920fc..552fdab417 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -1,7 +1,7 @@
 /** @file
   CPU Features Initialize functions.
 
-  Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
+  Copyright (c) 2017 - 2023, Intel Corporation. All rights 
+ reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -67,12 +67,12 @@ FillProcessorInfo (
 
   DisplayedFamily = Eax.Bits.FamilyId;
   if (Eax.Bits.FamilyId == 0x0F) {
-DisplayedFamily |= (Eax.Bits.ExtendedFamilyId << 4);
+DisplayedFamily += Eax.Bits.ExtendedFamilyId;
   }
 
   DisplayedModel = Eax.Bits.Model;
   if ((Eax.Bits.FamilyId == 0x06) || (Eax.Bits.FamilyId == 0x0f)) {
-DisplayedModel |= (Eax.Bits.ExtendedModelId << 4);
+DisplayedModel += (Eax.Bits.ExtendedModelId << 4);
   }
 
   CpuInfo->DisplayFamily  = DisplayedFamily;
--
2.31.1.windows.1



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Re: [edk2-devel] [PATCH] UefiCpuPkg: Calculate DisplayFamily correctly

[Zeng, Star]

BTW, look like wrong Bugzilla ID is used in commit message, please correct it 
when merging the patch.

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zeng, Star
Sent: Monday, March 6, 2023 6:35 PM
To: devel@edk2.groups.io; Liu, Zhiguang 
Cc: Dong, Eric ; Ni, Ray ; Kumar, Rahul 
R ; Gerd Hoffmann ; Zeng, Star 

Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Calculate DisplayFamily correctly

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zhiguang Liu
Sent: Thursday, March 2, 2023 9:27 AM
To: devel@edk2.groups.io
Cc: Liu, Zhiguang ; Dong, Eric ; 
Ni, Ray ; Kumar, Rahul R ; Gerd 
Hoffmann 
Subject: [edk2-devel] [PATCH] UefiCpuPkg: Calculate DisplayFamily correctly

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4238

Per SDM, DisplayFamily = Extended_Family_ID + Family_ID.
Correct the related code.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Zhiguang Liu 
---
 UefiCpuPkg/Application/Cpuid/Cpuid.c  | 4 ++--
 .../Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c| 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/Application/Cpuid/Cpuid.c 
b/UefiCpuPkg/Application/Cpuid/Cpuid.c
index 372c6ef87d..51c463fb10 100644
--- a/UefiCpuPkg/Application/Cpuid/Cpuid.c
+++ b/UefiCpuPkg/Application/Cpuid/Cpuid.c
@@ -1,7 +1,7 @@
 /** @file
   UEFI Application to display CPUID leaf information.
 
-  Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -217,7 +217,7 @@ CpuidVersionInfo (
 
   DisplayFamily = Eax.Bits.FamilyId;
   if (Eax.Bits.FamilyId == 0x0F) {
-DisplayFamily |= (Eax.Bits.ExtendedFamilyId << 4);
+DisplayFamily += Eax.Bits.ExtendedFamilyId;
   }
 
   DisplayModel = Eax.Bits.Model;
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index a8e4f920fc..25b8958252 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -1,7 +1,7 @@
 /** @file
   CPU Features Initialize functions.
 
-  Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
+  Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -67,7 +67,7 @@ FillProcessorInfo (
 
   DisplayedFamily = Eax.Bits.FamilyId;
   if (Eax.Bits.FamilyId == 0x0F) {
-DisplayedFamily |= (Eax.Bits.ExtendedFamilyId << 4);
+DisplayedFamily += Eax.Bits.ExtendedFamilyId;
   }
 
   DisplayedModel = Eax.Bits.Model;
-- 
2.31.1.windows.1













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Re: [edk2-devel] [PATCH] UefiCpuPkg: Calculate DisplayFamily correctly

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zhiguang Liu
Sent: Thursday, March 2, 2023 9:27 AM
To: devel@edk2.groups.io
Cc: Liu, Zhiguang ; Dong, Eric ; 
Ni, Ray ; Kumar, Rahul R ; Gerd 
Hoffmann 
Subject: [edk2-devel] [PATCH] UefiCpuPkg: Calculate DisplayFamily correctly

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4238

Per SDM, DisplayFamily = Extended_Family_ID + Family_ID.
Correct the related code.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Zhiguang Liu 
---
 UefiCpuPkg/Application/Cpuid/Cpuid.c  | 4 ++--
 .../Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c| 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/Application/Cpuid/Cpuid.c 
b/UefiCpuPkg/Application/Cpuid/Cpuid.c
index 372c6ef87d..51c463fb10 100644
--- a/UefiCpuPkg/Application/Cpuid/Cpuid.c
+++ b/UefiCpuPkg/Application/Cpuid/Cpuid.c
@@ -1,7 +1,7 @@
 /** @file
   UEFI Application to display CPUID leaf information.
 
-  Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -217,7 +217,7 @@ CpuidVersionInfo (
 
   DisplayFamily = Eax.Bits.FamilyId;
   if (Eax.Bits.FamilyId == 0x0F) {
-DisplayFamily |= (Eax.Bits.ExtendedFamilyId << 4);
+DisplayFamily += Eax.Bits.ExtendedFamilyId;
   }
 
   DisplayModel = Eax.Bits.Model;
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index a8e4f920fc..25b8958252 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -1,7 +1,7 @@
 /** @file
   CPU Features Initialize functions.
 
-  Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
+  Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -67,7 +67,7 @@ FillProcessorInfo (
 
   DisplayedFamily = Eax.Bits.FamilyId;
   if (Eax.Bits.FamilyId == 0x0F) {
-DisplayedFamily |= (Eax.Bits.ExtendedFamilyId << 4);
+DisplayedFamily += Eax.Bits.ExtendedFamilyId;
   }
 
   DisplayedModel = Eax.Bits.Model;
-- 
2.31.1.windows.1








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Re: [edk2-devel] [PATCH] UefiCpuPkg: Fix SMM code hangs when InitPaging

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zhiguang Liu
Sent: Wednesday, January 4, 2023 1:41 PM
To: devel@edk2.groups.io
Cc: Liu, Zhiguang ; Ni, Ray ; Kumar, 
Rahul R ; Dong, Eric 
Subject: [edk2-devel] [PATCH] UefiCpuPkg: Fix SMM code hangs when InitPaging

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4246

In function InitPaging, NumberOfPml5Entries is calculated by below code 
NumberOfPml5Entries = (UINTN)LShiftU64 (1, SizeOfMemorySpace - 48); If the 
SizeOfMemorySpace is larger than 48, NumberOfPml5Entries will be larger than 1. 
However, this doesn't make sense if the hardware doesn't support 5 level page 
table.

Cc: Ray Ni 
Cc: Rahul Kumar 
Signed-off-by: Eric Dong 
Signed-off-by: Zhiguang Liu 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
index c1efda7126..c597b39b8c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
@@ -1,7 +1,7 @@
 /** @file
 Enable SMM profile.
 
-Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2023, Intel Corporation. All rights reserved.
 Copyright (c) 2017 - 2020, AMD Incorporated. All rights reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -587,15 +587,17 @@ InitPaging (
 }
 
 SizeOfMemorySpace = HighBitSet64 (gPhyMask) + 1;
+ASSERT (SizeOfMemorySpace <= 52);
+
 //
-// Calculate the table entries of PML4E and PDPTE.
+// Calculate the table entries of PML5E, PML4E and PDPTE.
 //
 NumberOfPml5Entries = 1;
-if (SizeOfMemorySpace > 48) {
+if (Enable5LevelPaging && (SizeOfMemorySpace > 48)) {
   NumberOfPml5Entries = (UINTN)LShiftU64 (1, SizeOfMemorySpace - 48);
-  SizeOfMemorySpace   = 48;
 }
 
+SizeOfMemorySpace   = SizeOfMemorySpace > 48 ? 48 : SizeOfMemorySpace;
 NumberOfPml4Entries = 1;
 if (SizeOfMemorySpace > 39) {
   NumberOfPml4Entries = (UINTN)LShiftU64 (1, SizeOfMemorySpace - 39);
--
2.31.1.windows.1








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Re: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage handling

[Zeng, Star]

Thanks Ray. 

-Original Message-
From: Ni, Ray  
Sent: Tuesday, December 13, 2022 5:05 PM
To: Zeng, Star ; devel@edk2.groups.io; Wu, Jiaxin 
; Guenzel, Robert 
Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage handling

Star,
It has been merged last week.

> -Original Message-
> From: Zeng, Star 
> Sent: Tuesday, December 13, 2022 4:41 PM
> To: devel@edk2.groups.io; Wu, Jiaxin ; Ni, Ray 
> ; Guenzel, Robert 
> Cc: Zeng, Star 
> Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage 
> handling
> 
> Hi,
> 
> When could the patch be merged ?
> 
> Thanks,
> Star
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Wu, 
> Jiaxin
> Sent: Wednesday, November 30, 2022 8:47 AM
> To: devel@edk2.groups.io; Ni, Ray ; Guenzel, Robert 
> 
> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage 
> handling
> 
> Glad to see this fix, could you add/include the existing Bugzilla in the 
> comment?
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4168
> 
> Thanks,
> Jiaxin
> 
> 
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Ni, 
> > Ray
> > Sent: Wednesday, November 16, 2022 8:57 AM
> > To: devel@edk2.groups.io; Guenzel, Robert 
> > Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage 
> > handling
> >
> > Reviewed-by: Ray Ni 
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io  On Behalf Of
> > Guenzel, Robert
> > > Sent: Thursday, November 10, 2022 9:51 PM
> > > To: devel@edk2.groups.io
> > > Subject: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage 
> > > handling
> > >
> > > When build in DEBUG, the code asserts that 5LPage support is there 
> > > when the physical address width is larger than 48.
> > > In a RELEASE build it will just force LA57 to 1 in CR4 even if 
> > > CPUID(7).ECX[16] says it is not supported.
> > >
> > > The hang (in the ASSERT) in DEBUG is not warranted as there are 
> > > legal configurations with CPUID(7).ECX[16](==LA57)=0 and with a 
> > > physical address width of larger than 48 (like 52).
> > >
> > > This is also supported by this code:
> > >
> > https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDx
> > eSmm/X64/PageTbl.c#L221
> > > There (as long as physical address width is smaller or equal to 
> > > 52) any address width above 48 will be reduced to 48 and the 
> > > system can and will work without 5LPaging.
> > >
> > > The forced setting of LA57 in CR4 (in the absence of LA57 in
> > > CPUID(7).ECX) is a spec violation and should not happen.
> > >
> > > Hence the proposed fix
> > > a) removes the assert.
> > > b) only returns TRUE from Is5LevelPagingNeeded if 5LPaging is actually
> > >supported by HW.
> > >
> > > Signed-off-by: Robert Guenzel mailto:robert.guen...@intel.com
> > > ---
> > >  UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> > > index 6587212f4e..f8b1ac31f1 100644
> > > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> > > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> > > @@ -104,8 +104,8 @@ Is5LevelPagingNeeded (
> > >  ExtFeatureEcx.Bits.FiveLevelPage
> > >  ));
> > >
> > > -  if (VirPhyAddressSize.Bits.PhysicalAddressBits > 4 * 9 + 12) {
> > > -ASSERT (ExtFeatureEcx.Bits.FiveLevelPage == 1);
> > > +  if ((VirPhyAddressSize.Bits.PhysicalAddressBits > 4 * 9 + 12) &&
> > > +  (ExtFeatureEcx.Bits.FiveLevelPage == 1)) {
> > >  return TRUE;
> > >} else {
> > >  return FALSE;
> > > --
> > > 2.34.1
> > > Intel Deutschland GmbH
> > > Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
> > > Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de> Managing
> > > Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva 
> > > Chairperson of the Supervisory Board: Nicole Lau Registered Office:
> > > Munich Commercial Register: Amtsgericht Muenchen HRB 186928
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage handling

[Zeng, Star]

Hi,

When could the patch be merged ?

Thanks,
Star
-Original Message-
From: devel@edk2.groups.io  On Behalf Of Wu, Jiaxin
Sent: Wednesday, November 30, 2022 8:47 AM
To: devel@edk2.groups.io; Ni, Ray ; Guenzel, Robert 

Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage handling

Glad to see this fix, could you add/include the existing Bugzilla in the 
comment?

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4168

Thanks,
Jiaxin



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Ni, Ray
> Sent: Wednesday, November 16, 2022 8:57 AM
> To: devel@edk2.groups.io; Guenzel, Robert 
> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage 
> handling
> 
> Reviewed-by: Ray Ni 
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of
> Guenzel, Robert
> > Sent: Thursday, November 10, 2022 9:51 PM
> > To: devel@edk2.groups.io
> > Subject: [edk2-devel] [PATCH] UefiCpuPkg: Bug fix in 5LPage handling
> >
> > When build in DEBUG, the code asserts that 5LPage support is there 
> > when the physical address width is larger than 48.
> > In a RELEASE build it will just force LA57 to 1 in CR4 even if 
> > CPUID(7).ECX[16] says it is not supported.
> >
> > The hang (in the ASSERT) in DEBUG is not warranted as there are 
> > legal configurations with CPUID(7).ECX[16](==LA57)=0 and with a 
> > physical address width of larger than 48 (like 52).
> >
> > This is also supported by this code:
> >
> https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDx
> eSmm/X64/PageTbl.c#L221
> > There (as long as physical address width is smaller or equal to 52) 
> > any address width above 48 will be reduced to 48 and the system can 
> > and will work without 5LPaging.
> >
> > The forced setting of LA57 in CR4 (in the absence of LA57 in 
> > CPUID(7).ECX) is a spec violation and should not happen.
> >
> > Hence the proposed fix
> > a) removes the assert.
> > b) only returns TRUE from Is5LevelPagingNeeded if 5LPaging is actually
> >supported by HW.
> >
> > Signed-off-by: Robert Guenzel mailto:robert.guen...@intel.com
> > ---
> >  UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> > index 6587212f4e..f8b1ac31f1 100644
> > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
> > @@ -104,8 +104,8 @@ Is5LevelPagingNeeded (
> >  ExtFeatureEcx.Bits.FiveLevelPage
> >  ));
> >
> > -  if (VirPhyAddressSize.Bits.PhysicalAddressBits > 4 * 9 + 12) {
> > -ASSERT (ExtFeatureEcx.Bits.FiveLevelPage == 1);
> > +  if ((VirPhyAddressSize.Bits.PhysicalAddressBits > 4 * 9 + 12) &&
> > +  (ExtFeatureEcx.Bits.FiveLevelPage == 1)) {
> >  return TRUE;
> >} else {
> >  return FALSE;
> > --
> > 2.34.1
> > Intel Deutschland GmbH
> > Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
> > Tel: +49 89 99 8853-0, www.intel.de  Managing 
> > Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva 
> > Chairperson of the Supervisory Board: Nicole Lau Registered Office: 
> > Munich Commercial Register: Amtsgericht Muenchen HRB 186928
> >
> >
> >
> >
> >
> 
> 
> 
> 
> 








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Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Kuo, Ted  
Sent: Thursday, September 15, 2022 9:16 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star ; S, Ashraf 
Ali ; Duggapu, Chinni B 
Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: NvsBufferPtr is missing in 
Fsp24ApiEntryM.nasm

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063
Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm to align 
with FSP 2.4 SPEC.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm 
b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
index 8880721f29..a3b38e4585 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
@@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24
 .Revision:  resb  1

 .Reserved:  resb  3

 .Length resd  1

+.NvsBufferPtr   resq  1

 .StackBase: resq  1

 .StackSize: resq  1

 .BootLoaderTolumSize:   resd  1

 .BootMode:  resd  1

 .FspEventHandlerresq  1

-.Reserved1: resb 24

+.Reserved1: resb 16

 ; }

 .size:

 endstruc

--
2.35.3.windows.1



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Re: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSPM_ARCH2_UPD mismatching bug.

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: Monday, August 15, 2022 2:23 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star 
Subject: [PATCH v2] IntelFsp2Pkg: FSPM_ARCH2_UPD mismatching bug.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4019

FSPM_ARCH2_UPD in FspApiEntryM.nasm was not up-to-date and
should be fixed for both IA32 and X64 builds.

Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm | 3 ++-
 IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm  | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
index 5dada2af54..61ab4612a3 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
@@ -40,12 +40,13 @@ struc FSPM_UPD_COMMON_FSP24
 .Revision:  resb  1

 .Reserved:  resb  3

 .Length resd  1

+.NvsBufferPtr   resq  1

 .StackBase: resq  1

 .StackSize: resq  1

 .BootLoaderTolumSize:   resd  1

 .BootMode:  resd  1

 .FspEventHandlerresq  1

-.Reserved1: resb 24

+.Reserved1: resb 16

 ; }

 .size:

 endstruc

diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm 
b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm
index dacf515845..2d2f75b1f0 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryM.nasm
@@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24
 .Revision:  resb  1

 .Reserved:  resb  3

 .Length resd  1

+.NvsBufferPtr   resq  1

 .StackBase: resq  1

 .StackSize: resq  1

 .BootLoaderTolumSize:   resd  1

 .BootMode:  resd  1

 .FspEventHandlerresq  1

-.Reserved1: resb 24

+.Reserved1: resb 16

 ; }

 .size:

 endstruc

-- 
2.35.0.windows.1



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[edk2-devel] [PATCH] MdeModulePkg XhciPei: Fix dead loop issue in UsbHcFreeMemPool()

[Zeng, Star]

Use Block->Next instead of Pool->Head->Next, otherwise the for loop
will be not able to come out.
It will also match with the UsbHcFreeMemPool() in EhciPei.

Cc: Hao A Wu 
Cc: Ray Ni 
Cc: Zhikai Sun 
Signed-off-by: Star Zeng 
---
 MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c 
b/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c
index c64b38fcfc89..148425ae844e 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c
+++ b/MdeModulePkg/Bus/Pci/XhciPei/UsbHcMem.c
@@ -385,7 +385,7 @@ UsbHcFreeMemPool (
   // UsbHcUnlinkMemBlock can't be used to unlink and free the
   // first block.
   //
-  for (Block = Pool->Head->Next; Block != NULL; Block = Pool->Head->Next) {
+  for (Block = Pool->Head->Next; Block != NULL; Block = Block->Next) {
 // UsbHcUnlinkMemBlock (Pool->Head, Block);
 UsbHcFreeMemBlock (Pool, Block);
   }
-- 
2.33.1.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix GenCfgOpt bug for FSPI_UPD support.

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: Friday, July 29, 2022 10:57 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star 
Subject: [PATCH] IntelFsp2Pkg: Fix GenCfgOpt bug for FSPI_UPD support.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
Fixed a logic bug in GenCfgOpt.py to skip FSPI_UPD when platforms
do not support.

Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/Tools/GenCfgOpt.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index 71c48f10e0..13be81ddbc 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -1301,7 +1301,7 @@ EndList
elif '_S' in SignatureStr[6:6+2]:

TxtBody.append("#define FSPS_UPD_SIGNATURE   %s 
   /* '%s' */\n\n" % (Item['value'], SignatureStr))

elif '_I' in SignatureStr[6:6+2]:

-   if NoFSPI == True:

+   if NoFSPI == False:

TxtBody.append("#define FSPI_UPD_SIGNATURE  
 %s/* '%s' */\n\n" % (Item['value'], SignatureStr))

 TxtBody.append("\n")

 

-- 
2.35.0.windows.1



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Re: [edk2-devel] [PATCH v2] IntelFsp2Pkg: FSPI_UPD is not mandatory.

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: Thursday, July 28, 2022 1:15 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star 
Subject: [PATCH v2] IntelFsp2Pkg: FSPI_UPD is not mandatory.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
FSPI_UPD is required only When platforms implemented FSP_I component.
Updated the scripts to allow FSPI_UPD not present scenario.
Also fixed FSP_GLOBAL_DATA structure alignment issue and unnecessary
non-backward compatibility change in previous FSP_I patch.

Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/Include/FspGlobalData.h | 43 
+--
 IntelFsp2Pkg/Tools/GenCfgOpt.py  | 14 ++
 2 files changed, 31 insertions(+), 26 deletions(-)

diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h 
b/IntelFsp2Pkg/Include/FspGlobalData.h
index cf94f7b6a5..32c6d460e4 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -42,58 +42,57 @@ typedef struct  {
 #define FSP_PERFORMANCE_DATA_TIMER_MASK  0xFF

 

 typedef struct  {

-  UINT32Signature;

-  UINT8 Version;

-  UINT8 Reserved1[3];

+  UINT32 Signature;

+  UINT8  Version;

+  UINT8  Reserved1[3];

   ///

   /// Offset 0x08

   ///

-  UINTN CoreStack;

-  UINTN Reserved2;

+  UINTN  CoreStack;

+  VOID   *SmmInitUpdPtr;

   ///

   /// IA32: Offset 0x10; X64: Offset 0x18

   ///

-  UINT32StatusCode;

-  UINT8 ApiIdx;

+  UINT32 StatusCode;

+  UINT8  ApiIdx;

   ///

   /// 0: FSP in API mode; 1: FSP in DISPATCH mode

   ///

-  UINT8 FspMode;

-  UINT8 OnSeparateStack;

-  UINT8 Reserved3;

-  UINT32NumberOfPhases;

-  UINT32PhasesExecuted;

-  UINT32Reserved4[8];

+  UINT8  FspMode;

+  UINT8  OnSeparateStack;

+  UINT8  Reserved2;

+  UINT32 NumberOfPhases;

+  UINT32 PhasesExecuted;

+  UINT32 Reserved3[8];

   ///

   /// IA32: Offset 0x40; X64: Offset 0x48

   /// Start of UINTN and pointer section

-  /// All UINTN and pointer members must be put in this section

-  /// except CoreStack and Reserved2. In addition, the number of

-  /// UINTN and pointer members must be even for natural alignment

-  /// in both IA32 and X64.

+  /// All UINTN and pointer members are put in this section

+  /// for maintaining natural alignment for both IA32 and X64 builds.

   ///

   FSP_PLAT_DATA  PlatformData;

   VOID   *TempRamInitUpdPtr;

   VOID   *MemoryInitUpdPtr;

   VOID   *SiliconInitUpdPtr;

-  VOID   *SmmInitUpdPtr;

   ///

-  /// IA32: Offset 0x68; X64: Offset 0x98

+  /// IA32: Offset 0x64; X64: Offset 0x90

   /// To store function parameters pointer

   /// so it can be retrieved after stack switched.

   ///

   VOID   *FunctionParameterPtr;

   FSP_INFO_HEADER*FspInfoHeader;

   VOID   *UpdDataPtr;

-  UINTN  Reserved5;

   ///

   /// End of UINTN and pointer section

+  /// At this point, next field offset must be either *0h or *8h to

+  /// meet natural alignment requirement.

   ///

-  UINT8  Reserved6[16];

+  UINT8  Reserved4[16];

   UINT32 PerfSig;

   UINT16 PerfLen;

-  UINT16 Reserved7;

+  UINT16 Reserved5;

   UINT32 PerfIdx;

+  UINT32 Reserved6;

   UINT64 PerfData[32];

 } FSP_GLOBAL_DATA;

 

diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index 128b896592..71c48f10e0 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -959,8 +959,13 @@ EndList
 UpdTxtFile = ''

 FvDir = self._FvDir

 if GuidList[Index] not in self._MacroDict:

-self.Error = "%s definition is missing in DSC file" % 
(GuidList[Index])

-return 1

+NoFSPI = False

+if GuidList[Index] == 'FSP_I_UPD_TOOL_GUID':

+NoFSPI = True

+continue

+else:

+self.Error = "%s definition is missing in DSC file" % 
(GuidList[Index])

+return 1

 

 if UpdTxtFile == '':

 UpdTxtFile = os.path.join(FvDir, 
self._MacroDict[GuidList[Index]] + '.txt')

@@ -1296,7 +1301,8 @@ EndList
elif '_S' in SignatureStr[6:6+2]:

TxtBody.append("#define FSPS_UPD_SIGNATURE   %s 
   /* '%s' */\n\n" % (Item['value'], SignatureStr))

elif '_I' in SignatureStr[6:6+2]:

-   TxtBody.append("#define FSPI_UPD_SIGNATURE   %s 
   /* '%s' */\

Re: [edk2-devel] [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.

[Zeng, Star]

The spec looks wrong to me.

Thanks,
Star
-Original Message-
From: Chiu, Chasel  
Sent: Thursday, July 21, 2022 11:16 AM
To: Zeng, Star ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L 
Subject: RE: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.


Hi Star, this is following current specification.

Thanks,
Chasel


> -Original Message-
> From: Zeng, Star 
> Sent: Wednesday, July 20, 2022 8:07 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Desimone, Nathaniel L ; Zeng, Star 
> 
> Subject: RE: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
> 
> Is the reserved bytes number correct for FSPI_ARCH_UPD alignment?
>  UINT16  BootloaderSmmFvContextDataLength;
>  UINT8Reserved1[24];
> 
> Thanks,
> Star
> -Original Message-
> From: Chiu, Chasel 
> Sent: Thursday, July 21, 2022 10:29 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L 
> ; Zeng, Star 
> Subject: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993
> 
> Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up, 
> and some comments for clarification.
> Also fixed a bug in SplitFspBin.py for FSP-I support.
> 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Chasel Chiu 
> ---
>  IntelFsp2Pkg/Include/FspEas/FspApi.h  | 71
> --
> -
>  IntelFsp2Pkg/Include/FspGlobalData.h  |  2 +-
>  IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++--
>  IntelFsp2Pkg/Tools/SplitFspBin.py |  2 +-
>  4 files changed, 85 insertions(+), 11 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> index bf46f13f73..3f368574e8 100644
> --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
> +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
> @@ -1,6 +1,6 @@
>  /** @file
> 
>Intel FSP API definition from Intel Firmware Support Package 
> External
> 
> -  Architecture Specification v2.0 - v2.2
> 
> +  Architecture Specification v2.0 and above.
> 
> 
> 
>Copyright (c) 2014 - 2022, Intel Corporation. All rights 
> reserved.
> 
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> @@ -100,13 +100,14 @@ typedef struct {
>/// "XX_T" for FSP-T
> 
>/// "XX_M" for FSP-M
> 
>/// "XX_S" for FSP-S
> 
> +  /// "XX_I" for FSP-I
> 
>/// Where XX is an unique signature
> 
>///
> 
>UINT64Signature;
> 
>///
> 
>/// Revision of the Data structure.
> 
> -  ///   For FSP spec 2.0/2.1 value is 1.
> 
> -  ///   For FSP spec 2.2 value is 2.
> 
> +  ///   For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having
> ARCH_UPD.
> 
> +  ///   For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in 
> all
> UPD structures.
> 
>///
> 
>UINT8 Revision;
> 
>UINT8 Reserved[23];
> 
> @@ -134,7 +135,7 @@ typedef struct {
>  } FSPT_ARCH_UPD;
> 
> 
> 
>  ///
> 
> -/// FSPT_ARCH2_UPD Configuration.
> 
> +/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.
> 
>  ///
> 
>  typedef struct {
> 
>///
> 
> @@ -196,7 +197,7 @@ typedef struct {
>  } FSPM_ARCH_UPD;
> 
> 
> 
>  ///
> 
> -/// FSPM_ARCH2_UPD Configuration.
> 
> +/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.
> 
>  ///
> 
>  typedef struct {
> 
>///
> 
> @@ -209,6 +210,13 @@ typedef struct {
>///
> 
>UINT32  Length;
> 
>///
> 
> +  /// Pointer to the non-volatile storage (NVS) data buffer.
> 
> +  /// If it is NULL it indicates the NVS data is not available.
> 
> +  /// This value is deprecated starting with v2.4 of the FSP 
> + specification,
> 
> +  /// and will be removed in an upcoming version of the FSP specification.
> 
> +  ///
> 
> +  EFI_PHYSICAL_ADDRESSNvsBufferPtr;
> 
> +  ///
> 
>/// Pointer to the temporary stack base address to be
> 
>/// consumed inside FspMemoryInit() API.
> 
>///
> 
> @@ -232,7 +240,7 @@ typedef struct {
>/// This value is only valid if Revision is >= 2.
> 
>///
> 
>EFI_PHYSICAL_ADDRESSFspEventHandler;
> 
> -  UINT8   Reserved1[24];
> 
> +  UINT8   Reserved1[16];
> 
>  } FSPM_ARCH2_UPD;
> 
> 
> 
>  ///
> 
> @@ -265,7 +273,7 @@ typedef struct {
>  } FSPS_ARCH_UPD;
> 
> 
> 
>  ///
> 
> -/// FSPS_ARCH2_UPD Configuration.
> 
> +/// FSPS_ARCH2_U

Re: [edk2-devel] [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.

[Zeng, Star]

Is the reserved bytes number correct for FSPI_ARCH_UPD alignment?
 UINT16  BootloaderSmmFvContextDataLength;
 UINT8Reserved1[24];

Thanks,
Star
-Original Message-
From: Chiu, Chasel  
Sent: Thursday, July 21, 2022 10:29 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star 
Subject: [PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993

Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
and some comments for clarification.
Also fixed a bug in SplitFspBin.py for FSP-I support.

Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/Include/FspEas/FspApi.h  | 71 
---
 IntelFsp2Pkg/Include/FspGlobalData.h  |  2 +-
 IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++--
 IntelFsp2Pkg/Tools/SplitFspBin.py |  2 +-
 4 files changed, 85 insertions(+), 11 deletions(-)

diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h 
b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index bf46f13f73..3f368574e8 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -1,6 +1,6 @@
 /** @file

   Intel FSP API definition from Intel Firmware Support Package External

-  Architecture Specification v2.0 - v2.2

+  Architecture Specification v2.0 and above.

 

   Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -100,13 +100,14 @@ typedef struct {
   /// "XX_T" for FSP-T

   /// "XX_M" for FSP-M

   /// "XX_S" for FSP-S

+  /// "XX_I" for FSP-I

   /// Where XX is an unique signature

   ///

   UINT64Signature;

   ///

   /// Revision of the Data structure.

-  ///   For FSP spec 2.0/2.1 value is 1.

-  ///   For FSP spec 2.2 value is 2.

+  ///   For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having 
ARCH_UPD.

+  ///   For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in 
all UPD structures.

   ///

   UINT8 Revision;

   UINT8 Reserved[23];

@@ -134,7 +135,7 @@ typedef struct {
 } FSPT_ARCH_UPD;

 

 ///

-/// FSPT_ARCH2_UPD Configuration.

+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.

 ///

 typedef struct {

   ///

@@ -196,7 +197,7 @@ typedef struct {
 } FSPM_ARCH_UPD;

 

 ///

-/// FSPM_ARCH2_UPD Configuration.

+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.

 ///

 typedef struct {

   ///

@@ -209,6 +210,13 @@ typedef struct {
   ///

   UINT32  Length;

   ///

+  /// Pointer to the non-volatile storage (NVS) data buffer.

+  /// If it is NULL it indicates the NVS data is not available.

+  /// This value is deprecated starting with v2.4 of the FSP specification,

+  /// and will be removed in an upcoming version of the FSP specification.

+  ///

+  EFI_PHYSICAL_ADDRESSNvsBufferPtr;

+  ///

   /// Pointer to the temporary stack base address to be

   /// consumed inside FspMemoryInit() API.

   ///

@@ -232,7 +240,7 @@ typedef struct {
   /// This value is only valid if Revision is >= 2.

   ///

   EFI_PHYSICAL_ADDRESSFspEventHandler;

-  UINT8   Reserved1[24];

+  UINT8   Reserved1[16];

 } FSPM_ARCH2_UPD;

 

 ///

@@ -265,7 +273,7 @@ typedef struct {
 } FSPS_ARCH_UPD;

 

 ///

-/// FSPS_ARCH2_UPD Configuration.

+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.

 ///

 typedef struct {

   ///

@@ -285,6 +293,40 @@ typedef struct {
   UINT8   Reserved1[16];

 } FSPS_ARCH2_UPD;

 

+///

+/// FSPI_ARCH_UPD Configuration.

+///

+typedef struct {

+  ///

+  /// Revision of the structure is 1 for this version of the specification.

+  ///

+  UINT8   Revision;

+  UINT8   Reserved[3];

+  ///

+  /// Length of the structure in bytes. The current value for this field is 32.

+  ///

+  UINT32  Length;

+  ///

+  /// The physical memory-mapped base address of the bootloader SMM firmware 
volume (FV).

+  ///

+  EFI_PHYSICAL_ADDRESSBootloaderSmmFvBaseAddress;

+  ///

+  /// The length in bytes of the bootloader SMM firmware volume (FV).

+  ///

+  UINT64  BootloaderSmmFvLength;

+  ///

+  /// The physical memory-mapped base address of the bootloader SMM FV context 
data.

+  /// This data is provided to bootloader SMM drivers through a HOB by the FSP 
MM Foundation.

+  ///

+  EFI_PHYSICAL_ADDRESSBootloaderSmmFvContextData;

+  ///

+  /// The length in bytes of the bootloader SMM FV context data.

+  /// This data is provided to bootloader SMM drivers through a HOB by the FSP 
MM Foundation.

+  ///

+  UINT16  BootloaderSmmFvContextDataLength;

+  UINT8   Reserved1[24];

+} FSPI_ARCH_UPD;

+

 ///

 /// FSPT_UPD_COMMON Configuration.

 ///

@@ -393,6 +4

Re: [edk2-devel] [PATCH] MdeModulePkg/FaultTolerantWriteDxe: Don't check for address alignment

[Zeng, Star]

When length is larger than block size and block size aligned, if the address is 
not block size aligned, that means the range will mix with other range, but 
erase operation will be done per block, that will be risky and may break the 
fault tolerant mechanism.
I could not remember all the details. Personally, I do not think it is right 
way to remove the check.


Thanks,
Star
From: Lean Sheng Tan 
Sent: Tuesday, May 17, 2022 7:58 PM
To: devel@edk2.groups.io; Wu, Hao A 
Cc: Zeng, Star ; Gao, Liming ; 
Rhodes, Sean 
Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/FaultTolerantWriteDxe: Don't 
check for address alignment

Hi Star & Liming,
Any update on this?
Much appreciated.

Best Regards,
Lean Sheng Tan

[http://static.9elements.com/logo-signature.png]
9elements GmbH, Kortumstraße 19-21, 44787 Bochum, Germany
Email: sheng@9elements.com<mailto:sheng@9elements.com>
Phone: +49 234 68 94 188
Mobile: +49 176 76 113842

Registered office: Bochum
Commercial register: Amtsgericht Bochum, HRB 17519
Management: Sebastian German, Eray Bazaar

Data protection information according to Art. 13 
GDPR<https://9elements.com/privacy>


On Mon, 16 May 2022 at 11:03, Wu, Hao A 
mailto:hao.a...@intel.com>> wrote:
Sorry Star and Liming,

For the below patch (removing the alignment check for WorkSpace & SpareArea):
https://edk2.groups.io/g/devel/message/89742

Do you think it will impact the FTW service on flash device? Thanks in advance.

Best Regards,
Hao Wu

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Sean Rhodes
Sent: Monday, May 16, 2022 3:54 PM
To: Wu, Hao A mailto:hao.a...@intel.com>>
Cc: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/FaultTolerantWriteDxe: Don't 
check for address alignment

The bug discovered was with coreboot, and the PCD values are derived from the 
block size of its SMMStore (NvStorage) region. The discussion on the patch can 
be found here: https://review.coreboot.org/c/coreboot/+/62990

Hacking the PCDs could work,, but why would we want to keep an incorrect check?

Thanks!


On Mon, 16 May 2022 at 08:36, Wu, Hao A 
mailto:hao.a...@intel.com>> wrote:
Sorry for not being clear on what I mean.
Is it possible to change the platform PCD values and keep these block size 
alignment requirements.

Best Regards,
Hao Wu

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Sean Rhodes
Sent: Monday, May 16, 2022 3:00 PM
To: Wu; Wu, Hao A mailto:hao.a...@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/FaultTolerantWriteDxe: Don't 
check for address alignment

Hi Hao

Yes, it does conflict - I will update the patch to fix these comments :)

Thank you



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[edk2-devel] Shouldn't PcdSevEsIsEnabled be removed from UefiCpuPkg?

[Zeng, Star]

Hi,

After 
https://github.com/tianocore/edk2/pull/2269/commits/c6c83f98fabbe3e58bc0579bade3a807c93dd690,
 no consumer to PcdSevEsIsEnabled anymore.
Shouldn't PcdSevEsIsEnabled be removed from UefiCpuPkg?


Thanks,
Star


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Re: [edk2-devel] [PATCH v1 01/15] IntelFsp2Pkg: Add CpuLib to module INFs that depend on UefiCpuLib

[Zeng, Star]

Yu,
You have sent this patch series for many times, so you should update v1 to vX 
accordingly. Just a reminder.


Thanks,
Star

-Original Message-
From: Pu, Yu  
Sent: Monday, April 11, 2022 5:46 PM
To: devel@edk2.groups.io
Cc: Pu, Yu ; Chiu, Chasel ; Desimone, 
Nathaniel L ; Zeng, Star 
Subject: [PATCH v1 01/15] IntelFsp2Pkg: Add CpuLib to module INFs that depend 
on UefiCpuLib

There are two libraries: MdePkg/CpuLib and UefiCpuPkg/UefiCpuLib and 
UefiCpuPkg/UefiCpuLib will be merged to MdePkg/CpuLib. To avoid build failure, 
add CpuLib dependency to all modules that depend on UefiCpuLib.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Yu Pu 
---
 IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 1 +
 IntelFsp2Pkg/FspSecCore/SecMain.h   | 1 +
 2 files changed, 2 insertions(+)

diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf 
b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
index 7b05cae64130..830471adcf2f 100644
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
@@ -51,6 +51,7 @@
   FspSwitchStackLib   FspCommonLib   FspSecPlatformLib+  CpuLib   UefiCpuLib  
[Pcd]diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h 
b/IntelFsp2Pkg/FspSecCore/SecMain.h
index 7794255af13d..edb7447d9eff 100644
--- a/IntelFsp2Pkg/FspSecCore/SecMain.h
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
@@ -20,6 +20,7 @@
 #include  #include  
#include +#include  #include 
 #include  --
2.30.0.windows.2



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Re: [edk2-devel] [PATCH] ShellPkg: Update smbiosview type 9 with SMBIOS 3.5 fields

[Zeng, Star]

Personally, you'd better to split this one patch to two, one is for MdePkg and 
another is for ShellPkg.
Also cc MdePkg and ShellPkg maintainers.


Thanks,
Star
-Original Message-
From: Ke, Bo-ChangX  
Sent: Friday, April 8, 2022 1:55 PM
To: devel@edk2.groups.io
Cc: Bi, Dandan ; Zeng, Star 
Subject: [PATCH] ShellPkg: Update smbiosview type 9 with SMBIOS 3.5 fields

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3896

update smbiosview type 9 related fileds.

Signed-off-by: Bo Chang Ke 
Cc: Dandan Bi 
Cc: Star Zeng 
---
 MdePkg/Include/IndustryStandard/SmBios.h  |  50 +++-
 .../SmbiosView/PrintInfo.c|  11 +-
 .../SmbiosView/QueryTable.c   | 238 ++
 .../SmbiosView/QueryTable.h   |  36 +++
 .../SmbiosView/SmbiosViewStrings.uni  |   5 +-
 5 files changed, 334 insertions(+), 6 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
b/MdePkg/Include/IndustryStandard/SmBios.h
index 2b1567b052..cb39470c92 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1306,6 +1306,11 @@ typedef enum {
   SlotTypePciExpressMini52pinWithBSKO= 0x21,///< PCI Express Mini 
52-pin (CEM spec. 2.0) with bottom-side keep-outs.
   SlotTypePciExpressMini52pinWithoutBSKO = 0x22,///< PCI Express Mini 
52-pin (CEM spec. 2.0) without bottom-side keep-outs.
   SlotTypePciExpressMini76pin= 0x23,///< PCI Express Mini 
76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
+  SlotTypePCIExpressGen4SFF_8639 = 0x24,///< U.2
+  SlotTypePCIExpressGen5SFF_8639 = 0x25,///< U.2
+  SlotTypeOCPNIC30SmallFormFactor= 0x26,///< SFF
+  SlotTypeOCPNIC30LargeFormFactor= 0x27,///< LFF
+  SlotTypeOCPNICPriorto30= 0x28,
   SlotTypeCXLFlexbus10   = 0x30,
   SlotTypePC98C20= 0xA0,
   SlotTypePC98C24= 0xA1,
@@ -1335,7 +1340,17 @@ typedef enum {
   SlotTypePciExpressGen4X2   = 0xBA,
   SlotTypePciExpressGen4X4   = 0xBB,
   SlotTypePciExpressGen4X8   = 0xBC,
-  SlotTypePciExpressGen4X16  = 0xBD
+  SlotTypePciExpressGen4X16  = 0xBD,
+  SlotTypePCIExpressGen5 = 0xBE,
+  SlotTypePCIExpressGen5X1   = 0xBF,
+  SlotTypePCIExpressGen5X2   = 0xC0,
+  SlotTypePCIExpressGen5X4   = 0xC1,
+  SlotTypePCIExpressGen5X8   = 0xC2,
+  SlotTypePCIExpressGen5X16  = 0xC3,
+  SlotTypePCIExpressGen6andBeyond= 0xC4,
+  SlotTypeEnterpriseandDatacenter1UE1FormFactorSlot = 0xC5,  
+ SlotTypeEnterpriseandDatacenter3E3FormFactorSlot  = 0xC6
+
 } MISC_SLOT_TYPE;
 
 ///
@@ -1358,6 +1373,39 @@ typedef enum {
   SlotDataBusWidth32X = 0x0E ///< Or X32
 } MISC_SLOT_DATA_BUS_WIDTH;
 
+///
+/// System Slots - Slot Physical Width.
+///
+typedef enum {
+  SlotPhysicalWidthOther   = 0x01,
+  SlotPhysicalWidthUnknown = 0x02,
+  SlotPhysicalWidth8Bit= 0x03,
+  SlotPhysicalWidth16Bit   = 0x04,
+  SlotPhysicalWidth32Bit   = 0x05,
+  SlotPhysicalWidth64Bit   = 0x06,
+  SlotPhysicalWidth128Bit  = 0x07,
+  SlotPhysicalWidth1X  = 0x08,///< Or X1
+  SlotPhysicalWidth2X  = 0x09,///< Or X2
+  SlotPhysicalWidth4X  = 0x0A,///< Or X4
+  SlotPhysicalWidth8X  = 0x0B,///< Or X8
+  SlotPhysicalWidth12X = 0x0C,///< Or X12
+  SlotPhysicalWidth16X = 0x0D,///< Or X16
+  SlotPhysicalWidth32X = 0x0E ///< Or X32
+} MISC_SLOT_PHYSICAL_WIDTH;
+
+///
+/// System Slots - Slot Information.
+///
+typedef enum{
+  others = 0x00,
+  Gen1   = 0x01,
+  Gen2   = 0x01,
+  Gen3   = 0x03,
+  Gen4   = 0x04,
+  Gen5   = 0x05,
+  Gen6   = 0x06
+}MISC_SLOT_INFORMATION;
+
 ///
 /// System Slots - Current Usage.
 ///
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
index b144600a25..0fa40dbe0c 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
@@ -637,6 +637,13 @@ SmbiosPrintStructure (
   }
 }
   }
+  if (AE_SMBIOS_VERSION (0x3, 0x2)) {
+if (Struct->Hdr->Length > 0x12) {
+  DisplaySystemSlotHeight(Struct->Type9->SlotHeight, Option);
+  DisplaySystemSlotPhysicalWidth(Struct->Type9->SlotPhysicalWidth, 
Option);
+  DisplaySystemSlotInformation(Struct->Type9->SlotInformation, Option);
+}
+  }
 
   break;
 }
@@ -2898,10 +2905,6 @@ DisplaySystemSlotId (
   IN UINT8   Option
   )
 {
-  //
-  // Display slot type first
-  //
-  DisplaySystemSlotType (SlotType, Option);
 
   ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN 
(STR_SMBIOSVIEW_PRINTINFO_SLOT_ID), gShellDebug1HiiHandle);
   //
diff --gi

Re: [edk2-devel] [PATCH] ShellPkg: Update smbiosview type 41 with SMBIOS 3.5 fields

[Zeng, Star]

Personally, I think "eMMC" should be enough to instead " embedded Multi-Media 
Controller ".
Others look good to me.

And you'd better to get RB from ShellPkg's maintainer (Cced).

Thanks,
Star

-Original Message-
From: Ke, Bo-ChangX  
Sent: Saturday, April 9, 2022 12:26 AM
To: devel@edk2.groups.io
Cc: Bi, Dandan ; Zeng, Star 
Subject: [PATCH] ShellPkg: Update smbiosview type 41 with SMBIOS 3.5 fields

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3900

update smbiosview type 41 related fileds.

Signed-off-by: Bo Chang Ke 
Cc: Dandan Bi 
Cc: Star Zeng 
---
 .../SmbiosView/QueryTable.c   | 24 +++
 1 file changed, 24 insertions(+)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index c4a6acb167..7ec6d2b5f1 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -1766,6 +1766,30 @@ TABLE_ITEM  OnboardDeviceTypesTable[] = {
 0x0A,
 L"  Sas Controller"
   },
+  {
+0x0B,
+L"  Wireless LAN"
+  },
+  {
+0x0C,
+L"  Bluetooth"
+  },
+  {
+0x0D,
+L"  WWAN"
+  },
+  {
+0x0E,
+L"  embedded Multi-Media Controller"
+  },
+  {
+0x0F,
+L"  NVMe Controller"
+  },
+  {
+0x10,
+L"  UFS Controller"
+  }
 };
 
 TABLE_ITEM  SELTypesTable[] = {
-- 
2.32.0.windows.1



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Re: [edk2-devel] [PATCH v1 1/6] IntelFsp2Pkg: Add CpuLib to module INFs that depend on UefiCpuLib

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: Wednesday, April 6, 2022 11:42 AM
To: Pu, Yu ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Zeng, Star 

Subject: RE: [PATCH v1 1/6] IntelFsp2Pkg: Add CpuLib to module INFs that depend 
on UefiCpuLib


Thanks Yu!
Reviewed-by: Chasel Chiu 

> -Original Message-
> From: Pu, Yu 
> Sent: Friday, April 1, 2022 1:22 PM
> To: devel@edk2.groups.io
> Cc: Pu, Yu ; Chiu, Chasel ; 
> Desimone, Nathaniel L ; Zeng, Star 
> 
> Subject: [PATCH v1 1/6] IntelFsp2Pkg: Add CpuLib to module INFs that 
> depend on UefiCpuLib
> 
> Step 1 to merge UefiCpuLib to CpuLib.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Yu Pu 
> ---
>  IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 1 +
>  IntelFsp2Pkg/FspSecCore/SecMain.h   | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> index 7b05cae64130..830471adcf2f 100644
> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> @@ -51,6 +51,7 @@
>FspSwitchStackLib
> 
>FspCommonLib
> 
>FspSecPlatformLib
> 
> +  CpuLib
> 
>UefiCpuLib
> 
> 
> 
>  [Pcd]
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h
> b/IntelFsp2Pkg/FspSecCore/SecMain.h
> index 7794255af13d..edb7447d9eff 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.h
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
> @@ -20,6 +20,7 @@
>  #include 
> 
>  #include 
> 
>  #include 
> 
> +#include 
> 
>  #include 
> 
>  #include 
> 
> 
> 
> --
> 2.30.0.windows.2



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Re: [edk2-devel] [PATCH v1 2/6] IntelFsp2WrapperPkg: Add CpuLib to module INFs that depend on UefiCpuLib.

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: Wednesday, April 6, 2022 11:42 AM
To: Pu, Yu ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Zeng, Star 

Subject: RE: [PATCH v1 2/6] IntelFsp2WrapperPkg: Add CpuLib to module INFs that 
depend on UefiCpuLib.


Thanks Yu!
Reviewed-by: Chasel Chiu 


> -Original Message-
> From: Pu, Yu 
> Sent: Friday, April 1, 2022 1:22 PM
> To: devel@edk2.groups.io
> Cc: Pu, Yu ; Chiu, Chasel ; 
> Desimone, Nathaniel L ; Zeng, Star 
> 
> Subject: [PATCH v1 2/6] IntelFsp2WrapperPkg: Add CpuLib to module INFs 
> that depend on UefiCpuLib.
> 
> Step 1 to merge UefiCpuLib to CpuLib.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Yu Pu 
> ---
>  IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 1 + 
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> index 5d0e0214015f..e2262d693c55 100644
> --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> @@ -37,6 +37,7 @@
>HobLib   FspWrapperPlatformLib   FspWrapperHobProcessLib+  CpuLib
> UefiCpuLib   PeCoffGetEntryPointLib   PeCoffExtraActionLibdiff --git
> a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> index da0049a65435..0598f85ab3ac 100644
> --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
> @@ -38,6 +38,7 @@
>MemoryAllocationLib   FspWrapperPlatformLib
> FspWrapperHobProcessLib+  CpuLib   UefiCpuLib   PeCoffGetEntryPointLib
> PeCoffExtraActionLib--
> 2.30.0.windows.2



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Re: [edk2-devel] [Patch 1/1] MdeModulePkg/Bus/Pci/PciBusDxe: Support platform PCI ROM override

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Kinney, Michael D  
Sent: Saturday, January 22, 2022 9:41 AM
To: devel@edk2.groups.io
Cc: Wu, Hao A ; Ni, Ray ; Zeng, Star 

Subject: [Patch 1/1] MdeModulePkg/Bus/Pci/PciBusDxe: Support platform PCI ROM 
override

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3811

Remove ASSERT() statements that are triggered if a platform provides an 
override of PCI ROM attached to a PCI Controller.  The PCI Platform Protocol 
allows the platform to provide a PCI ROM image for a PCI Controller.  This 
works for PCI Controllers that do not have an attached PCI ROM, but the 
platform is not allowed to replace the PCI ROM for a PCI Controller that has 
its own PCI ROM.  Removing these ASSERT() statements enables this additional 
use case.

Cc: Hao A Wu 
Cc: Ray Ni 
Cc: Star Zeng 
Signed-off-by: Michael D Kinney 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
index 5535bd3013b8..cb845ec2b186 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c
@@ -58,10 +58,9 @@ PciRomAddImageMapping (
 {
   //
   // Expect once RomImage and RomSize are recorded, they will be passed in
-  // later when updating ImageHandle
+  // later when updating ImageHandle. They may also be updated with new
+  // values if the platform provides an override of RomImage and RomSize.
   //
-  ASSERT ((mRomImageTable[Index].RomImage == NULL) || (RomImage == 
mRomImageTable[Index].RomImage));
-  ASSERT ((mRomImageTable[Index].RomSize  == 0) || (RomSize  == 
mRomImageTable[Index].RomSize));
   break;
 }
   }
--
2.32.0.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: ExtendedImageRevision was not printed.

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: 2021年12月28日 18:58
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Ma, Maurice ; 
Desimone, Nathaniel L ; Zeng, Star 

Subject: [PATCH] IntelFsp2Pkg/FspSecCore: ExtendedImageRevision was not printed.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3791

ExtendedImageRevision should be printed when Header revision >= 6.

Cc: Maurice Ma 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/FspSecCore/SecFsp.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
index ae03fa228e..f79d45900e 100644
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -1,6 +1,6 @@
 /** @file

 

-  Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.

+  Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

 

 **/

@@ -199,8 +199,12 @@ FspGlobalDataInit (
 ImageId, \

 (PeiFspData->FspInfoHeader->ImageRevision >> 24) & 0xFF, \

 (PeiFspData->FspInfoHeader->ImageRevision >> 16) & 0xFF, \

-(PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF, \

-PeiFspData->FspInfoHeader->ImageRevision & 0xFF

+(PeiFspData->FspInfoHeader->HeaderRevision >= 6) ? \

+  (((PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF) | 
(PeiFspData->FspInfoHeader->ExtendedImageRevision & 0xFF00)) :\

+((PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF), \

+(PeiFspData->FspInfoHeader->HeaderRevision >= 6) ? \

+  ((PeiFspData->FspInfoHeader->ImageRevision & 0xFF) | 
((PeiFspData->FspInfoHeader->ExtendedImageRevision & 0xFF) << 8)): \

+(PeiFspData->FspInfoHeader->ImageRevision & 0xFF)

 ));

 }

 

-- 
2.28.0.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2WrapperPkg : Remove EFIAPI from local functions.

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
Sent: Tuesday, December 21, 2021 8:40 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star ; Ni, Ray 
; S, Ashraf Ali 
Subject: [edk2-devel] [PATCH] IntelFsp2WrapperPkg : Remove EFIAPI from local 
functions.

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642

Local functions do not need EFIAPI.

Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ray Ni 
Cc: Ashraf Ali S 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 1 -
 IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 1 -
 2 files changed, 2 deletions(-)

diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c 
b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index 49fbb27eca..b0c6b2f8a6 100644
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -45,7 +45,6 @@ extern EFI_GUID  gFspHobGuid;
 **/

 

 UINTN

-EFIAPI

 GetFspmUpdDataAddress (

   VOID

   )

diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c 
b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index ddee9cd029..fadadd40e6 100644
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -188,7 +188,6 @@ FspSiliconInitDoneGetFspHobList (
 **/

 

 UINTN

-EFIAPI

 GetFspsUpdDataAddress (

   VOID

   )

-- 
2.28.0.windows.1



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Re: [edk2-devel] [PATCH] MdeModulePkg/ScsiDisk: Change TPL to NOTIFY

[Zeng, Star]

Jeff's statement about the TPLs in variable and PCD drivers seems correct, not 
sure the impact to change them. No good idea from me about the TPL change in 
ScsiDisk. 


Side question: Variable service is an arch service which should be ready at DXE 
phase, ScsiDisk is a driver model driver which will be only ready/connected at 
BDS phase, right?


Thanks,
Star
-Original Message-
From: Wu, Hao A  
Sent: 2021年12月15日 13:43
To: Jeff Brasen ; devel@edk2.groups.io; Kinney, Michael D 
; Gao, Liming ; Zeng, 
Star 
Cc: Ni, Ray 
Subject: RE: [PATCH] MdeModulePkg/ScsiDisk: Change TPL to NOTIFY

(Add more people)

Hello Mike, Liming and Star,

Do you have suggestions for the below question raised from Jeff Brasen:

" The core of the issue I am trying to solve it support variable services on a 
UFS device. When the UFS blockIO is invoked from variable services it is not 
allowed (which does align from the UEFI spec perspective but does not allow me 
to implement variables services on UFS)  The other way that worked was lowering 
the lock TPL level in the PCD driver and Variable down to callback. The PCD one 
seems like it should be done as variable services is supposed to only be called 
from <= TPL_CALLBACK. However, I was worried about that having a larger system 
impact on that change."

Thanks in advance.

Best Regards,
Hao Wu

> -Original Message-
> From: Jeff Brasen 
> Sent: Wednesday, December 15, 2021 12:48 PM
> To: Wu, Hao A ; devel@edk2.groups.io
> Cc: Ni, Ray 
> Subject: RE: [PATCH] MdeModulePkg/ScsiDisk: Change TPL to NOTIFY
> 
> 
> 
> > -Original Message-
> > From: Wu, Hao A 
> > Sent: Tuesday, December 14, 2021 8:00 PM
> > To: Jeff Brasen ; devel@edk2.groups.io
> > Cc: Ni, Ray 
> > Subject: RE: [PATCH] MdeModulePkg/ScsiDisk: Change TPL to NOTIFY
> >
> > External email: Use caution opening links or attachments
> >
> >
> > > -Original Message-
> > > From: Jeff Brasen 
> > > Sent: Wednesday, December 15, 2021 1:59 AM
> > > To: devel@edk2.groups.io
> > > Cc: Wu, Hao A ; Ni, Ray ; 
> > > Jeff Brasen 
> > > Subject: [PATCH] MdeModulePkg/ScsiDisk: Change TPL to NOTIFY
> > >
> > > Increase TPL to TPL_NOTIFY to allow for use if caller is > TPL_CALLBACK.
> > > This allows services like variable services that run at TPL_NOTIFY 
> > > to be hosted on ScsiDisks (i.e. UFS)
> > >
> > > Aligns with the eMMC driver that also uses a higher TPL.
> > > This change was made in 3b1d8241d0dac25c5e678c364fa2754ac1731060
> >
> >
> > Sorry, my take is that this change is not equivalent to the one made 
> > in the SD/MMC stack.
> >
> > For the SD/MMC change you mentioned (commit 
> > 3b1d8241d0dac25c5e678c364fa2754ac1731060), the TPL is raised to 
> > TPL_NOTIFY only when:
> >   a) Operation to the linked lists that manage the asynchronous IO tasks
> >   b) Callback functions that process the asynchronous IO tasks The 
> > TPL remains TPL_CALLBACK during the BlockIO services and the 
> > majority of the
> > BlockIO2 services (operations to asynchronous tasks linked list are 
> > the exceptions).
> >
> > But the proposed change in ScsiDisk modifies the TPL level of the 
> > entire
> > BlockIO/BlockIO2 (and other protocols) services to TPL_NOTIFY.
> > For me, this is not aligned with the "TPL Restrictions" documented 
> > in the UEFI specification.
> >
> > Best Regards,
> > Hao Wu
> >
> >
> 
> I had sent out a query on this before and didn't see any response. The 
> core of the issue I am trying to solve it support variable services on a UFS 
> device.
> When the UFS blockIO is invoked from variable services it is not 
> allowed (which does align from the UEFI spec perspective but does not 
> allow me to implement variables services on UFS)
> 
>  The other way that worked was lowering the lock TPL level in the PCD 
> driver and Variable down to callback. The PCD one seems like it should 
> be done as variable services is supposed to only be called from <= 
> TPL_CALLBACK.
> However, I was worried about that having a larger system impact on 
> that change.
> 
> > >
> > > Signed-off-by: Jeff Brasen 
> > > ---
> > >  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c | 22
> > > ++--
> > >  1 file changed, 11 insertions(+), 11 deletions(-)
> > >
> > > diff --git a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c
> > > b/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c
> > > index 98e84b4ea8..b6e5848e77 100644
> > > --- a/MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDisk.c
&

Re: [edk2-devel] [PATCH v8] IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type

[Zeng, Star]

How about adding the minor comments like below? 

#
# Non-0 means PcdFspmUpdDataAddress will be ignored, otherwise 
PcdFspmUpdDataAddress will be used.
#
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress64|0x|UINT64|0x5002
#
# Non-0 means PcdFspsUpdDataAddress will be ignored, otherwise 
PcdFspsUpdDataAddress will be used.
#
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress64|0x|UINT64|0x5003


Anyway, Reviewed-by: Star Zeng 


Thanks,
Star
-Original Message-
From: Chiu, Chasel  
Sent: 2021年12月17日 11:48
To: S, Ashraf Ali ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Zeng, Star 
; Kuo, Ted ; Duggapu, Chinni B 
; Chaganty, Rangasai V 
; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 

Subject: RE: [PATCH v8] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type


Thanks Ashraf!
Reviewed-by: Chasel Chiu 



> -Original Message-
> From: S, Ashraf Ali 
> Sent: Thursday, December 16, 2021 4:10 PM
> To: devel@edk2.groups.io
> Cc: S, Ashraf Ali ; Chiu, Chasel 
> ; Desimone, Nathaniel L 
> ; Zeng, Star ; 
> Kuo, Ted ; Duggapu, Chinni B 
> ; Chaganty, Rangasai V 
> ; Solanki, Digant H 
> ; V, Sangeetha ; 
> Ni, Ray 
> Subject: [PATCH v8] IntelFsp2WrapperPkg : FSPM/S UPD data address 
> based on Build Type
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642
> when the module is not building in IA32 mode which will lead to building 
> error.
> when a module built-in X64 function pointer will be the size of 64bit 
> width which cannot be fit in 32bit address which will lead to error. 
> to overcome this issue introducing the 2 new PCD's for the 64bit 
> modules can consume it. based on the which pcd platform set, use that.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Kuo Ted 
> Cc: Duggapu Chinni B 
> Cc: Rangasai V Chaganty 
> Cc: Digant H Solanki 
> Cc: Sangeetha V 
> Cc: Ray Ni 
> Signed-off-by: Ashraf Ali S 
> ---
>  .../FspmWrapperPeim/FspmWrapperPeim.c | 25 ---
>  .../FspmWrapperPeim/FspmWrapperPeim.inf   |  3 ++-
>  .../FspsWrapperPeim/FspsWrapperPeim.c | 25 ---
>  .../FspsWrapperPeim/FspsWrapperPeim.inf   |  3 ++-
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec   |  2 ++
>  5 files changed, 50 insertions(+), 8 deletions(-)
> 
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> index 287e7f9159..49fbb27eca 100644
> --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> @@ -3,7 +3,7 @@
>register TemporaryRamDonePpi to call TempRamExit API, and register 
> MemoryDiscoveredPpi
>notify to call FspSiliconInit API.
> 
> -  Copyright (c) 2014 - 2020, Intel Corporation. All rights 
> reserved.
> +  Copyright (c) 2014 - 2021, Intel Corporation. All rights 
> + reserved.
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -38,6 +38,25 @@
> 
>  extern EFI_GUID  gFspHobGuid;
> 
> +/**
> +  Get the FSP M UPD Data address
> +
> +  @return FSP-M UPD Data Address
> +**/
> +
> +UINTN
> +EFIAPI
> +GetFspmUpdDataAddress (
> +  VOID
> +  )
> +{
> +  if (PcdGet64 (PcdFspmUpdDataAddress64) != 0) {
> +return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
> +  } else {
> +return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
> +  }
> +}
> +
>  /**
>Call FspMemoryInit API.
> 
> @@ -67,7 +86,7 @@ PeiFspMemoryInit (
>  return EFI_DEVICE_ERROR;
>}
> 
> -  if ((PcdGet32 (PcdFspmUpdDataAddress) == 0) && (FspmHeaderPtr-
> >CfgRegionSize != 0) && (FspmHeaderPtr->CfgRegionOffset != 0)) {
> +  if ((GetFspmUpdDataAddress () == 0) && 
> + (FspmHeaderPtr->CfgRegionSize != 0) && 
> + (FspmHeaderPtr->CfgRegionOffset != 0)) {
>  //
>  // Copy default FSP-M UPD data from Flash
>  //
> @@ -79,7 +98,7 @@ PeiFspMemoryInit (
>  //
>  // External UPD is ready, get the buffer from PCD pointer.
>  //
> -FspmUpdDataPtr = (FSPM_UPD_COMMON *)PcdGet32
> (PcdFspmUpdDataAddress);
> +FspmUpdDataPtr = (FSPM_UPD_COMMON *) GetFspmUpdDataAddress();
>  ASSERT (FspmUpdDataPtr != NULL);
>}
> 
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> index 00166e56a0..5d0e021401 100644
> --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
> @@ -6,7 +6,7 @@
>  # register TemporaryRamDonePpi to call TempRamExit API, and register 
> MemoryDiscoveredPpi  # notify to call FspSiliconInit A

[edk2-devel] [PATCH] IntelFsp2Pkg SplitFspBin.py: Correct file name in file header

[Zeng, Star]

Cc: Maurice Ma 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Signed-off-by: Star Zeng 
---
 IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py 
b/IntelFsp2Pkg/Tools/SplitFspBin.py
index 24272e82af88..c3165dd4ae69 100644
--- a/IntelFsp2Pkg/Tools/SplitFspBin.py
+++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
@@ -1,4 +1,4 @@
-## @ FspTool.py
+## @ SplitFspBin.py
 #
 # Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
-- 
2.27.0.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg/SplitFspBin.py: adopt FSP 2.3 specification.

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: Tuesday, October 26, 2021 4:06 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Ma, Maurice ; 
Desimone, Nathaniel L ; Zeng, Star 

Subject: [PATCH] IntelFsp2Pkg/SplitFspBin.py: adopt FSP 2.3 specification.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3705

FSP 2.3 has updated FSP_INFO_HEADER to support ExtendedImageRevision
and SplitFspBin.py needs to support it.

Also updated script to display integer value basing on length.

Cc: Maurice Ma 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/Tools/SplitFspBin.py | 66 
--
 1 file changed, 44 insertions(+), 22 deletions(-)

diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py 
b/IntelFsp2Pkg/Tools/SplitFspBin.py
index 24272e82af..20e329a76e 100644
--- a/IntelFsp2Pkg/Tools/SplitFspBin.py
+++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
@@ -1,6 +1,6 @@
 ## @ FspTool.py

 #

-# Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.

+# Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.

 # SPDX-License-Identifier: BSD-2-Clause-Patent

 #

 ##

@@ -103,26 +103,29 @@ class FSP_COMMON_HEADER(Structure):
 

 class FSP_INFORMATION_HEADER(Structure):

  _fields_ = [

-('Signature',ARRAY(c_char, 4)),

-('HeaderLength', c_uint32),

-('Reserved1',c_uint16),

-('SpecVersion',  c_uint8),

-('HeaderRevision',   c_uint8),

-('ImageRevision',c_uint32),

-('ImageId',  ARRAY(c_char, 8)),

-('ImageSize',c_uint32),

-('ImageBase',c_uint32),

-('ImageAttribute',   c_uint16),

-('ComponentAttribute',   c_uint16),

-('CfgRegionOffset',  c_uint32),

-('CfgRegionSize',c_uint32),

-('Reserved2',c_uint32),

-('TempRamInitEntryOffset', c_uint32),

-('Reserved3',  c_uint32),

-('NotifyPhaseEntryOffset', c_uint32),

-('FspMemoryInitEntryOffset',   c_uint32),

-('TempRamExitEntryOffset', c_uint32),

-('FspSiliconInitEntryOffset',  c_uint32)

+('Signature',  ARRAY(c_char, 4)),

+('HeaderLength',   c_uint32),

+('Reserved1',  c_uint16),

+('SpecVersion',c_uint8),

+('HeaderRevision', c_uint8),

+('ImageRevision',  c_uint32),

+('ImageId',ARRAY(c_char, 8)),

+('ImageSize',  c_uint32),

+('ImageBase',  c_uint32),

+('ImageAttribute', c_uint16),

+('ComponentAttribute', c_uint16),

+('CfgRegionOffset',c_uint32),

+('CfgRegionSize',  c_uint32),

+('Reserved2',  c_uint32),

+('TempRamInitEntryOffset', c_uint32),

+('Reserved3',  c_uint32),

+('NotifyPhaseEntryOffset', c_uint32),

+('FspMemoryInitEntryOffset',   c_uint32),

+('TempRamExitEntryOffset', c_uint32),

+('FspSiliconInitEntryOffset',  c_uint32),

+('FspMultiPhaseSiInitEntryOffset', c_uint32),

+('ExtendedImageRevision',  c_uint16),

+('Reserved4',  c_uint16)

 ]

 

 class FSP_PATCH_TABLE(Structure):

@@ -390,7 +393,26 @@ def OutputStruct (obj, indent = 0, plen = 0):
 if IsStrType (val):

 rep = HandleNameStr (val)

 elif IsIntegerType (val):

-rep = '0x%X' % val

+if (key == 'ImageRevision'):

+FspImageRevisionMajor   = ((val >> 24) & 0xFF)

+FspImageRevisionMinor   = ((val >> 16) & 0xFF)

+FspImageRevisionRevision= ((val >> 8) & 0xFF)

+FspImageRevisionBuildNumber = (val & 0xFF)

+rep = '0x%08X' % val

+elif (key == 'ExtendedImageRevision'):

+FspImageRevisionRevision|= (val & 0xFF00)

+FspImageRevisionBuildNumber |= ((val << 8) & 0xFF00)

+rep = "0x%04X ('%02X.%02X.%04X.%04X')" % (val, 
FspImageRevisionMajor, FspImageRevisionMinor, FspImageRevisionRevision, 
FspImageRevisionBuildNumber)

+elif field[1] == c_uint64:

+rep = '0x%016X' % val

+elif field[1] == c_uint32:

+rep = '0x%08X' % val

+elif field[1] == c_uint16:

+rep = '0x%04X' % val

+elif field[1] == c_uint8:

+ 

[edk2-devel] [PATCH] MdePkg Cpuid.h: Define CPUID.(EAX=7,ECX=0):EDX[30]

[Zeng, Star]

This patch follows new Intel SDM to define CPUID.(EAX=7,ECX=0):EDX[30].

Signed-off-by: Star Zeng 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Ray Ni 
---
 MdePkg/Include/Register/Intel/Cpuid.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/Register/Intel/Cpuid.h 
b/MdePkg/Include/Register/Intel/Cpuid.h
index 6f77e174c115..5ec85ba561ac 100644
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -1587,9 +1587,9 @@ typedef union {
 ///
 UINT32  EnumeratesSupportForCapability:1;
 ///
-/// [Bit 30] Reserved.
+/// [Bit 30] Enumerates support for the IA32_CORE_CAPABILITIES MSR.
 ///
-UINT32  Reserved3:1;
+UINT32  EnumeratesSupportForCoreCapabilitiesMsr:1;
 ///
 /// [Bit 31] Enumerates support for Speculative Store Bypass Disable 
(SSBD).
 /// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. They 
allow
-- 
2.27.0.windows.1



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Re: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

[Zeng, Star]

Thanks Liming for the review.

Help push the patches if no other feedback is received. 


Star

-Original Message-
From: devel@edk2.groups.io  On Behalf Of gaoliming
Sent: 2021年9月28日 13:31
To: devel@edk2.groups.io; Zeng, Star 
Subject: 回复: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocketLGA4677 from 
SMBIOS 3.5.0

Reviewed-by: Liming Gao 

> -邮件原件-
> 发件人: devel@edk2.groups.io  代表 Zeng, Star
> 发送时间: 2021年9月28日 10:36
> 收件人: devel@edk2.groups.io
> 抄送: Star Zeng 
> 主题: [edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocketLGA4677 from 
> SMBIOS 3.5.0
> 
> V2: Split patches for packages.
> 
> Star Zeng (2):
>   MdePkg: Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0
>   ShellPkg: Support ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0
> 
>  MdePkg/Include/IndustryStandard/SmBios.h   |  7 +--
>  .../SmbiosView/QueryTable.c| 14
> +-
>  2 files changed, 18 insertions(+), 3 deletions(-)
> 
> --
> 2.27.0.windows.1
> 
> 
> 
> 
> 










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Re: [edk2-devel] [PATCH] MdePkg,ShellPkg: Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

[Zeng, Star]

Good comment.
Saw 0db89a661f38b10012ff4f62e1853bfc48efd462 does so for both MdePkg and 
ShellPkg, but that is different for fixing typo which must change both MdePkg 
and ShellPkg in same patch.

Please check V2.


Thanks,
Star
-Original Message-
From: Ni, Ray  
Sent: 2021年9月28日 10:12
To: Zeng, Star ; devel@edk2.groups.io
Cc: gaolim...@byosoft.com.cn; Kinney, Michael D ; 
Liu, Zhiguang ; Gao, Zhichao 
Subject: RE: [edk2-devel] [PATCH] MdePkg,ShellPkg: Add 
ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

Star,
It might be better to split the patch to two patches.
one is to change MdePkg adding the definitions.
The other is to change ShellPkg consuming the definitions.

> -Original Message-
> From: Zeng, Star 
> Sent: Tuesday, September 28, 2021 10:11 AM
> To: devel@edk2.groups.io; Zeng, Star 
> Cc: gaolim...@byosoft.com.cn; Kinney, Michael D 
> ; Liu, Zhiguang ; 
> Ni, Ray ; Gao, Zhichao 
> Subject: RE: [edk2-devel] [PATCH] MdePkg,ShellPkg: Add 
> ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0
> 
> + Maintainers and Reviewers
> 
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Zeng, 
> Star
> Sent: 2021年9月28日 10:04
> To: devel@edk2.groups.io
> Cc: Zeng, Star 
> Subject: [edk2-devel] [PATCH] MdePkg,ShellPkg: Add 
> ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0
> 
> This patch adds ProcessorUpgradeSocketLGA4677 definition into Smbios.h from 
> SMBIOS 3.5.0 and entry into QueryTable.c.
> It also adds ProcessorUpgradeSocketLGA4189 and 
> ProcessorUpgradeSocketLGA1200 into from SMBIOS 3.4.0 and entries into 
> QueryTable.c.
> 
> Signed-off-by: Star Zeng 
> ---
>  MdePkg/Include/IndustryStandard/SmBios.h   |  7 +--
>  .../SmbiosView/QueryTable.c| 14 +-
>  2 files changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
> b/MdePkg/Include/IndustryStandard/SmBios.h
> index 6918f58cce44..2c2b32b8d462 100644
> --- a/MdePkg/Include/IndustryStandard/SmBios.h
> +++ b/MdePkg/Include/IndustryStandard/SmBios.h
> @@ -1,7 +1,7 @@
>  /** @file   Industry Standard Definitions of SMBIOS Table Specification 
> v3.3.0. -Copyright (c) 2006 - 2019, Intel Corporation. All
> rights reserved.+Copyright (c) 2006 - 2021, Intel Corporation. All 
> rights reserved. (C) Copyright 2015-2017 Hewlett Packard 
> Enterprise Development LP (C) Copyright 2015 - 2019 Hewlett 
> Packard Enterprise Development LP SPDX-
> License-Identifier: BSD-2-Clause-Patent@@ -810,7 +810,10 @@ typedef enum {
>ProcessorUpgradeSocketLGA2066   = 0x39,   ProcessorUpgradeSocketBGA1392   
> = 0x3A,   ProcessorUpgradeSocketBGA1510
> = 0x3B,-  ProcessorUpgradeSocketBGA1528   = 0x3C+  
> ProcessorUpgradeSocketBGA1528   = 0x3C,+
> ProcessorUpgradeSocketLGA4189   = 0x3D,+  ProcessorUpgradeSocketLGA1200   = 
> 0x3E,+  ProcessorUpgradeSocketLGA4677   =
> 0x3F } PROCESSOR_UPGRADE;  ///diff --git 
> a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
> b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
> index 7fc9d38a3b03..c312a7f8f227 100644
> --- 
> a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
> +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.
> +++ c
> @@ -2,7 +2,7 @@
>Build a table, each item is (Key, Info) pair.   And give a interface of 
> query a string out of a table. -  Copyright (c) 2005 - 2019,
> Intel Corporation. All rights reserved.+  Copyright (c) 2005 - 2021, 
> Intel Corporation. All rights reserved.   (C) Copyright
> 2016-2019 Hewlett Packard Enterprise Development LP   
> SPDX-License-Identifier: BSD-2-Clause-Patent @@ -589,6 +589,18
> @@ TABLE_ITEM  ProcessorUpgradeTable[] = {
>{ 0x3C, L"Socket BGA1528"+  },+  {+0x3D,+L"Socket 
> LGA4189"+  },+  {+0x3E,+L"Socket LGA1200"+  },+  {+0x3F,+
> L"Socket LGA4677"   } }; --
> 2.27.0.windows.1
> 
> 
> 
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> [star.z...@intel.com] -=-=-=-=-=-=
> 



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[edk2-devel] [PATCH V2 1/2] MdePkg: Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

[Zeng, Star]

This patch adds ProcessorUpgradeSocketLGA4677 definition into Smbios.h
from SMBIOS 3.5.0.
It also adds ProcessorUpgradeSocketLGA4189 and ProcessorUpgradeSocketLGA1200
definitions into from SMBIOS 3.4.0.

Signed-off-by: Star Zeng 
---
 MdePkg/Include/IndustryStandard/SmBios.h | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
b/MdePkg/Include/IndustryStandard/SmBios.h
index 6918f58cce44..2c2b32b8d462 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
 /** @file
   Industry Standard Definitions of SMBIOS Table Specification v3.3.0.
 
-Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
 (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP
 SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -810,7 +810,10 @@ typedef enum {
   ProcessorUpgradeSocketLGA2066   = 0x39,
   ProcessorUpgradeSocketBGA1392   = 0x3A,
   ProcessorUpgradeSocketBGA1510   = 0x3B,
-  ProcessorUpgradeSocketBGA1528   = 0x3C
+  ProcessorUpgradeSocketBGA1528   = 0x3C,
+  ProcessorUpgradeSocketLGA4189   = 0x3D,
+  ProcessorUpgradeSocketLGA1200   = 0x3E,
+  ProcessorUpgradeSocketLGA4677   = 0x3F
 } PROCESSOR_UPGRADE;
 
 ///
-- 
2.27.0.windows.1



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[edk2-devel] [PATCH V2 2/2] ShellPkg: Support ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

[Zeng, Star]

This patch adds entry into QueryTable.c for ProcessorUpgradeSocketLGA4677
from SMBIOS 3.5.0.
It also adds entries into QueryTable.c for ProcessorUpgradeSocketLGA4189
and ProcessorUpgradeSocketLGA1200 from SMBIOS 3.4.0.

Signed-off-by: Star Zeng 
---
 .../SmbiosView/QueryTable.c| 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 7fc9d38a3b03..c312a7f8f227 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -2,7 +2,7 @@
   Build a table, each item is (Key, Info) pair.
   And give a interface of query a string out of a table.
 
-  Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.
+  Copyright (c) 2005 - 2021, Intel Corporation. All rights reserved.
   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -589,6 +589,18 @@ TABLE_ITEM  ProcessorUpgradeTable[] = {
   {
 0x3C,
 L"Socket BGA1528"
+  },
+  {
+0x3D,
+L"Socket LGA4189"
+  },
+  {
+0x3E,
+L"Socket LGA1200"
+  },
+  {
+0x3F,
+L"Socket LGA4677"
   }
 };
 
-- 
2.27.0.windows.1



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[edk2-devel] [PATCH V2 0/2] Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

[Zeng, Star]

V2: Split patches for packages.

Star Zeng (2):
  MdePkg: Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0
  ShellPkg: Support ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

 MdePkg/Include/IndustryStandard/SmBios.h   |  7 +--
 .../SmbiosView/QueryTable.c| 14 +-
 2 files changed, 18 insertions(+), 3 deletions(-)

-- 
2.27.0.windows.1



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Re: [edk2-devel] [PATCH] MdePkg,ShellPkg: Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

[Zeng, Star]

+ Maintainers and Reviewers

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zeng, Star
Sent: 2021年9月28日 10:04
To: devel@edk2.groups.io
Cc: Zeng, Star 
Subject: [edk2-devel] [PATCH] MdePkg,ShellPkg: Add 
ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

This patch adds ProcessorUpgradeSocketLGA4677 definition into Smbios.h from 
SMBIOS 3.5.0 and entry into QueryTable.c.
It also adds ProcessorUpgradeSocketLGA4189 and ProcessorUpgradeSocketLGA1200 
into from SMBIOS 3.4.0 and entries into QueryTable.c.

Signed-off-by: Star Zeng 
---
 MdePkg/Include/IndustryStandard/SmBios.h   |  7 +--
 .../SmbiosView/QueryTable.c| 14 +-
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
b/MdePkg/Include/IndustryStandard/SmBios.h
index 6918f58cce44..2c2b32b8d462 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
 /** @file   Industry Standard Definitions of SMBIOS Table Specification 
v3.3.0. -Copyright (c) 2006 - 2019, Intel Corporation. All rights 
reserved.+Copyright (c) 2006 - 2021, Intel Corporation. All rights 
reserved. (C) Copyright 2015-2017 Hewlett Packard Enterprise Development 
LP (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP 
SPDX-License-Identifier: BSD-2-Clause-Patent@@ -810,7 +810,10 @@ typedef enum {
   ProcessorUpgradeSocketLGA2066   = 0x39,   ProcessorUpgradeSocketBGA1392   = 
0x3A,   ProcessorUpgradeSocketBGA1510   = 0x3B,-  ProcessorUpgradeSocketBGA1528 
  = 0x3C+  ProcessorUpgradeSocketBGA1528   = 0x3C,+  
ProcessorUpgradeSocketLGA4189   = 0x3D,+  ProcessorUpgradeSocketLGA1200   = 
0x3E,+  ProcessorUpgradeSocketLGA4677   = 0x3F } PROCESSOR_UPGRADE;  ///diff 
--git a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 7fc9d38a3b03..c312a7f8f227 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.
+++ c
@@ -2,7 +2,7 @@
   Build a table, each item is (Key, Info) pair.   And give a interface of 
query a string out of a table. -  Copyright (c) 2005 - 2019, Intel Corporation. 
All rights reserved.+  Copyright (c) 2005 - 2021, Intel Corporation. All 
rights reserved.   (C) Copyright 2016-2019 Hewlett Packard Enterprise 
Development LP   SPDX-License-Identifier: BSD-2-Clause-Patent @@ -589,6 
+589,18 @@ TABLE_ITEM  ProcessorUpgradeTable[] = {
   { 0x3C, L"Socket BGA1528"+  },+  {+0x3D,+L"Socket LGA4189"+  
},+  {+0x3E,+L"Socket LGA1200"+  },+  {+0x3F,+L"Socket LGA4677" 
  } }; -- 
2.27.0.windows.1



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[edk2-devel] [PATCH] MdePkg,ShellPkg: Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0

[Zeng, Star]

This patch adds ProcessorUpgradeSocketLGA4677 definition into Smbios.h
from SMBIOS 3.5.0 and entry into QueryTable.c.
It also adds ProcessorUpgradeSocketLGA4189 and ProcessorUpgradeSocketLGA1200
into from SMBIOS 3.4.0 and entries into QueryTable.c.

Signed-off-by: Star Zeng 
---
 MdePkg/Include/IndustryStandard/SmBios.h   |  7 +--
 .../SmbiosView/QueryTable.c| 14 +-
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h 
b/MdePkg/Include/IndustryStandard/SmBios.h
index 6918f58cce44..2c2b32b8d462 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
 /** @file
   Industry Standard Definitions of SMBIOS Table Specification v3.3.0.
 
-Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
 (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP
 SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -810,7 +810,10 @@ typedef enum {
   ProcessorUpgradeSocketLGA2066   = 0x39,
   ProcessorUpgradeSocketBGA1392   = 0x3A,
   ProcessorUpgradeSocketBGA1510   = 0x3B,
-  ProcessorUpgradeSocketBGA1528   = 0x3C
+  ProcessorUpgradeSocketBGA1528   = 0x3C,
+  ProcessorUpgradeSocketLGA4189   = 0x3D,
+  ProcessorUpgradeSocketLGA1200   = 0x3E,
+  ProcessorUpgradeSocketLGA4677   = 0x3F
 } PROCESSOR_UPGRADE;
 
 ///
diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
index 7fc9d38a3b03..c312a7f8f227 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
@@ -2,7 +2,7 @@
   Build a table, each item is (Key, Info) pair.
   And give a interface of query a string out of a table.
 
-  Copyright (c) 2005 - 2019, Intel Corporation. All rights reserved.
+  Copyright (c) 2005 - 2021, Intel Corporation. All rights reserved.
   (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -589,6 +589,18 @@ TABLE_ITEM  ProcessorUpgradeTable[] = {
   {
 0x3C,
 L"Socket BGA1528"
+  },
+  {
+0x3D,
+L"Socket LGA4189"
+  },
+  {
+0x3E,
+L"Socket LGA1200"
+  },
+  {
+0x3F,
+L"Socket LGA4677"
   }
 };
 
-- 
2.27.0.windows.1



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Re: [edk2-devel] [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type

[Zeng, Star]

Typo "ignored" to "not ignored".

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Zeng, Star
Sent: 2021年9月27日 18:36
To: S, Ashraf Ali ; Chiu, Chasel 
; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Kuo, Ted 
; Duggapu, Chinni B ; Chaganty, 
Rangasai V ; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 
; Zeng, Star 
Subject: Re: [edk2-devel] [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data 
address based on Build Type

If someone sets the PCD PcdFspmUpdDataAddress64 accidentally, it is better to 
be caught by some way but ignored.

BTW, if the function GetFspmUpdDataAddress() is a internal function in the 
module, no EFIAPI is needed in the declaration.

And, @Chiu, Chasel, is PcdFspmUpdDataAddress supposed to be always configured 
to be Dynamic type by platform?

If yes, maybe we can have two help functions in FspWrapperPlatformLib like 
below and remove "PcdsFixedAtBuild, PcdsPatchableInModule" in dec. Platform can 
use SetFspmUpdDataAddress() without need to be aware of the PCDs.

UINTN
EFIAPI
GetFspmUpdDataAddress (
  VOID
  )
{
  if (PcdGet64 (PcdFspmUpdDataAddress64) != 0) {
return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
  } else {
return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
  }
}

VOID
EFIAPI
SetFspmUpdDataAddress (
  IN UINTN Address
  )
{
  if (Address <= MAX_UINT32) {
PcdSet32S (PcdFspmUpdDataAddress, (UINT32) Address);
  } else {
PcdSet64S (PcdFspmUpdDataAddress64, (UINT64) Address);
  }
}


-Original Message-
From: S, Ashraf Ali 
Sent: 2021年9月27日 18:16
To: Zeng, Star ; Chiu, Chasel ; 
devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Kuo, Ted 
; Duggapu, Chinni B ; Chaganty, 
Rangasai V ; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 

Subject: RE: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type

Hi., @Zeng, Star

Creating a single function is doable, but the problem with that is If someone 
set the PCD  PcdFspmUpdDataAddress64 accidentally which should be applicable 
only in X64. Since the PCD has some junk value, it will return the false data 
in IA32 case. Which will break everything with respect to FSP-S/M.

To Avoid Such cases separating the IA32 vs X64 is more feasible. And easily 
differentiating with IA32 and X64. 

Regards,
Ashraf Ali S
Intel Technology India Pvt. Ltd. 

-Original Message-
From: Zeng, Star 
Sent: Monday, September 27, 2021 2:15 PM
To: Chiu, Chasel ; S, Ashraf Ali 
; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Kuo, Ted 
; Duggapu, Chinni B ; Chaganty, 
Rangasai V ; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 
; Zeng, Star 
Subject: RE: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type

Curious: It does not work to have one function implementation like below?

UINTN
EFIAPI
GetFspmUpdDataAddress (
  VOID
  )
{
  if (PcdGet64 (PcdFspmUpdDataAddress64) != 0) {
return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
  } else {
return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
  }
}

Thanks,
Star

-Original Message-
From: Chiu, Chasel 
Sent: Monday, September 27, 2021 9:10 AM
To: S, Ashraf Ali ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Zeng, Star 
; Kuo, Ted ; Duggapu, Chinni B 
; Chaganty, Rangasai V 
; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 

Subject: RE: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type


Reviewed-by: Chasel Chiu 

> -Original Message-
> From: S, Ashraf Ali 
> Sent: Friday, September 24, 2021 7:43 PM
> To: devel@edk2.groups.io
> Cc: S, Ashraf Ali ; Chiu, Chasel 
> ; Desimone, Nathaniel L 
> ; Zeng, Star ; 
> Kuo, Ted ; Duggapu, Chinni B 
> ; Chaganty, Rangasai V 
> ; Solanki, Digant H 
> ; V, Sangeetha ; 
> Ni, Ray 
> Subject: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address 
> based on Build Type
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642
> when the module is not building in IA32 mode which will lead to building 
> error.
> when a module built-in X64 function pointer will be the size of 64bit 
> width which cannot be fit in 32bit address which will lead to error.
> to overcome this issue introducing the 2 new PCD's for the 64bit modules can 
> consume it.
> Creating the API's to support different architecture
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Kuo Ted 
> Cc: Duggapu Chinni B 
> Cc: Rangasai V Chaganty 
> Cc: Digant H Solanki 
> Cc: Sangeetha V 
> Cc: Ray Ni 
> Signed-off-by: Ashraf Ali S 
> ---
>  .../FspmWrapperPeim/FspmWrapperPeim.c | 19 +++---
>  .../FspmWrapperPeim/FspmWrapperPeim.inf   | 16 ++--
>  .../FspmWrapperPeim/IA32/FspmHelper.c | 26 +++
>  .../FspmWrapperPeim/X64/FspmHelper.c  | 26 +++
>  .../FspsWrapperPeim/FspsWrapperPeim.c | 17 +---
>  .../FspsWrapperPeim

Re: [edk2-devel] [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type

[Zeng, Star]

If someone sets the PCD PcdFspmUpdDataAddress64 accidentally, it is better to 
be caught by some way but ignored.

BTW, if the function GetFspmUpdDataAddress() is a internal function in the 
module, no EFIAPI is needed in the declaration.

And, @Chiu, Chasel, is PcdFspmUpdDataAddress supposed to be always configured 
to be Dynamic type by platform?

If yes, maybe we can have two help functions in FspWrapperPlatformLib like 
below and remove "PcdsFixedAtBuild, PcdsPatchableInModule" in dec. Platform can 
use SetFspmUpdDataAddress() without need to be aware of the PCDs.

UINTN
EFIAPI
GetFspmUpdDataAddress (
  VOID
  )
{
  if (PcdGet64 (PcdFspmUpdDataAddress64) != 0) {
return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
  } else {
return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
  }
}

VOID
EFIAPI
SetFspmUpdDataAddress (
  IN UINTN Address
  )
{
  if (Address <= MAX_UINT32) {
PcdSet32S (PcdFspmUpdDataAddress, (UINT32) Address);
  } else {
PcdSet64S (PcdFspmUpdDataAddress64, (UINT64) Address);
  }
}


-Original Message-
From: S, Ashraf Ali  
Sent: 2021年9月27日 18:16
To: Zeng, Star ; Chiu, Chasel ; 
devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Kuo, Ted 
; Duggapu, Chinni B ; Chaganty, 
Rangasai V ; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 

Subject: RE: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type

Hi., @Zeng, Star

Creating a single function is doable, but the problem with that is If someone 
set the PCD  PcdFspmUpdDataAddress64 accidentally which should be applicable 
only in X64. Since the PCD has some junk value, it will return the false data 
in IA32 case. Which will break everything with respect to FSP-S/M.

To Avoid Such cases separating the IA32 vs X64 is more feasible. And easily 
differentiating with IA32 and X64. 

Regards,
Ashraf Ali S
Intel Technology India Pvt. Ltd. 

-Original Message-----
From: Zeng, Star 
Sent: Monday, September 27, 2021 2:15 PM
To: Chiu, Chasel ; S, Ashraf Ali 
; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Kuo, Ted 
; Duggapu, Chinni B ; Chaganty, 
Rangasai V ; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 
; Zeng, Star 
Subject: RE: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type

Curious: It does not work to have one function implementation like below?

UINTN
EFIAPI
GetFspmUpdDataAddress (
  VOID
  )
{
  if (PcdGet64 (PcdFspmUpdDataAddress64) != 0) {
return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
  } else {
return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
  }
}

Thanks,
Star

-Original Message-
From: Chiu, Chasel 
Sent: Monday, September 27, 2021 9:10 AM
To: S, Ashraf Ali ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Zeng, Star 
; Kuo, Ted ; Duggapu, Chinni B 
; Chaganty, Rangasai V 
; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 

Subject: RE: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type


Reviewed-by: Chasel Chiu 

> -Original Message-
> From: S, Ashraf Ali 
> Sent: Friday, September 24, 2021 7:43 PM
> To: devel@edk2.groups.io
> Cc: S, Ashraf Ali ; Chiu, Chasel 
> ; Desimone, Nathaniel L 
> ; Zeng, Star ; 
> Kuo, Ted ; Duggapu, Chinni B 
> ; Chaganty, Rangasai V 
> ; Solanki, Digant H 
> ; V, Sangeetha ; 
> Ni, Ray 
> Subject: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address 
> based on Build Type
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642
> when the module is not building in IA32 mode which will lead to building 
> error.
> when a module built-in X64 function pointer will be the size of 64bit 
> width which cannot be fit in 32bit address which will lead to error. 
> to overcome this issue introducing the 2 new PCD's for the 64bit modules can 
> consume it.
> Creating the API's to support different architecture
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Kuo Ted 
> Cc: Duggapu Chinni B 
> Cc: Rangasai V Chaganty 
> Cc: Digant H Solanki 
> Cc: Sangeetha V 
> Cc: Ray Ni 
> Signed-off-by: Ashraf Ali S 
> ---
>  .../FspmWrapperPeim/FspmWrapperPeim.c | 19 +++---
>  .../FspmWrapperPeim/FspmWrapperPeim.inf   | 16 ++--
>  .../FspmWrapperPeim/IA32/FspmHelper.c | 26 +++
>  .../FspmWrapperPeim/X64/FspmHelper.c  | 26 +++
>  .../FspsWrapperPeim/FspsWrapperPeim.c | 17 +---
>  .../FspsWrapperPeim/FspsWrapperPeim.inf   | 14 +-
>  .../FspsWrapperPeim/IA32/FspsHelper.c | 26 +++
>  .../FspsWrapperPeim/X64/FspsHelper.c  | 26 +++
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec   |  2 ++
>  9 files changed, 162 insertions(+), 10 deletions(-)  create mode 
> 100644 IntelFsp2WrapperPkg/FspmWrapperPeim/IA32/FspmHelper.c
>  create mode 100644
> IntelFsp2WrapperPkg/FspmWrapperPeim/X6

Re: [edk2-devel] [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type

[Zeng, Star]

Curious: It does not work to have one function implementation like below?

UINTN
EFIAPI
GetFspmUpdDataAddress (
  VOID
  )
{
  if (PcdGet64 (PcdFspmUpdDataAddress) != 0) {
return (UINTN) PcdGet64 (PcdFspmUpdDataAddress64);
  } else {
return (UINTN) PcdGet32 (PcdFspmUpdDataAddress);
  }
}

Thanks,
Star

-Original Message-
From: Chiu, Chasel  
Sent: Monday, September 27, 2021 9:10 AM
To: S, Ashraf Ali ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Zeng, Star 
; Kuo, Ted ; Duggapu, Chinni B 
; Chaganty, Rangasai V 
; Solanki, Digant H 
; V, Sangeetha ; Ni, Ray 

Subject: RE: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address based on 
Build Type


Reviewed-by: Chasel Chiu 

> -Original Message-
> From: S, Ashraf Ali 
> Sent: Friday, September 24, 2021 7:43 PM
> To: devel@edk2.groups.io
> Cc: S, Ashraf Ali ; Chiu, Chasel 
> ; Desimone, Nathaniel L 
> ; Zeng, Star ; 
> Kuo, Ted ; Duggapu, Chinni B 
> ; Chaganty, Rangasai V 
> ; Solanki, Digant H 
> ; V, Sangeetha ; 
> Ni, Ray 
> Subject: [PATCH v7] IntelFsp2WrapperPkg : FSPM/S UPD data address 
> based on Build Type
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3642
> when the module is not building in IA32 mode which will lead to building 
> error.
> when a module built-in X64 function pointer will be the size of 64bit 
> width which cannot be fit in 32bit address which will lead to error. 
> to overcome this issue introducing the 2 new PCD's for the 64bit modules can 
> consume it.
> Creating the API's to support different architecture
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Kuo Ted 
> Cc: Duggapu Chinni B 
> Cc: Rangasai V Chaganty 
> Cc: Digant H Solanki 
> Cc: Sangeetha V 
> Cc: Ray Ni 
> Signed-off-by: Ashraf Ali S 
> ---
>  .../FspmWrapperPeim/FspmWrapperPeim.c | 19 +++---
>  .../FspmWrapperPeim/FspmWrapperPeim.inf   | 16 ++--
>  .../FspmWrapperPeim/IA32/FspmHelper.c | 26 +++
>  .../FspmWrapperPeim/X64/FspmHelper.c  | 26 +++
>  .../FspsWrapperPeim/FspsWrapperPeim.c | 17 +---
>  .../FspsWrapperPeim/FspsWrapperPeim.inf   | 14 +-
>  .../FspsWrapperPeim/IA32/FspsHelper.c | 26 +++
>  .../FspsWrapperPeim/X64/FspsHelper.c  | 26 +++
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec   |  2 ++
>  9 files changed, 162 insertions(+), 10 deletions(-)  create mode 
> 100644 IntelFsp2WrapperPkg/FspmWrapperPeim/IA32/FspmHelper.c
>  create mode 100644
> IntelFsp2WrapperPkg/FspmWrapperPeim/X64/FspmHelper.c
>  create mode 100644
> IntelFsp2WrapperPkg/FspsWrapperPeim/IA32/FspsHelper.c
>  create mode 100644 
> IntelFsp2WrapperPkg/FspsWrapperPeim/X64/FspsHelper.c
> 
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> index 24ab534620..4a15136c39 100644
> --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> @@ -3,7 +3,7 @@
>register TemporaryRamDonePpi to call TempRamExit API, and register 
> MemoryDiscoveredPpi
>notify to call FspSiliconInit API.
> 
> -  Copyright (c) 2014 - 2020, Intel Corporation. All rights 
> reserved.
> +  Copyright (c) 2014 - 2021, Intel Corporation. All rights 
> + reserved.
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -39,6 +39,17 @@
> 
>  extern EFI_GUID gFspHobGuid;
> 
> +/**
> +  Get the Fspm Upd Data Address from the PCD
> +
> +  @return FSPM UPD Data Address
> +**/
> +UINTN
> +EFIAPI
> +GetFspmUpdDataAddress (
> +  VOID
> +  );
> +
>  /**
>Call FspMemoryInit API.
> 
> @@ -59,7 +70,7 @@ PeiFspMemoryInit (
> 
>DEBUG ((DEBUG_INFO, "PeiFspMemoryInit enter\n"));
> 
> -  FspHobListPtr = NULL;
> +  FspHobListPtr  = NULL;
>FspmUpdDataPtr = NULL;
> 
>FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 
> (PcdFspmBaseAddress)); @@ -68,7 +79,7 @@ PeiFspMemoryInit (
>  return EFI_DEVICE_ERROR;
>}
> 
> -  if (PcdGet32 (PcdFspmUpdDataAddress) == 0 && (FspmHeaderPtr-
> >CfgRegionSize != 0) && (FspmHeaderPtr->CfgRegionOffset != 0)) {
> +  if (GetFspmUpdDataAddress () == 0 && (FspmHeaderPtr->CfgRegionSize 
> + !=
> + 0) && (FspmHeaderPtr->CfgRegionOffset != 0)) {
>  //
>  // Copy default FSP-M UPD data from Flash
>  //
> @@ -80,7 +91,7 @@ PeiFspMemoryInit (
>  //
>  // External UPD is ready, get the buffer from PCD pointer.
>  //
> -FspmUpdDataPtr = (FSPM_UPD_COMMON *)PcdGet32
> (PcdFspmUpdDataAddress);
> +FspmUpd

Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo Ersek's entries

[Zeng, Star]

I'd like to also say thank you Laszlo.

Star

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Laszlo
> Ersek
> Sent: Friday, July 9, 2021 7:58 PM
> To: Ard Biesheuvel 
> Cc: edk2-devel-groups-io ; Andrew Fish
> ; Ard Biesheuvel ; Dong,
> Eric ; Justen, Jordan L ;
> Leif Lindholm ; Kinney, Michael D
> ; Philippe Mathieu-Daudé
> ; Kumar, Rahul1 ; Ni, Ray
> ; Sami Mujawar 
> Subject: Re: [edk2-devel] [PATCH] Maintainers.txt: remove Laszlo Ersek's
> entries
> 
> On 07/09/21 09:42, Ard Biesheuvel wrote:
> > On Thu, 8 Jul 2021 at 09:09, Laszlo Ersek  wrote:
> >>
> >> I'm relinquishing all my roles listed in "Maintainers.txt", for
> >> personal reasons.
> >>
> >> My email address  remains functional.
> >>
> >> To my understanding, my employer is working to assign others
> >> engineers to the edk2 project (at their discretion).
> >>
> >> Cc: Andrew Fish 
> >> Cc: Ard Biesheuvel 
> >> Cc: Eric Dong 
> >> Cc: Jordan Justen 
> >> Cc: Leif Lindholm 
> >> Cc: Michael D Kinney 
> >> Cc: Philippe Mathieu-Daudé 
> >> Cc: Rahul Kumar 
> >> Cc: Ray Ni 
> >> Cc: Sami Mujawar 
> >> Signed-off-by: Laszlo Ersek 
> >
> > Thanks for shaping the Tianocore project as you have done over the
> > past years. And apologies for my limited involvement as a
> > co-maintainer - I hope this was not a dominant factor in your
> > decision.
> 
> I want to be very clear about this: there is *zero* blaming others involved in
> my retirement from edk2.
> 
> Thank you!
> Laszlo
> 
> >
> > Reviewed-by: Ard Biesheuvel 
> >
> > With all the Confidential Computing work going on, we need to get your
> > position filled asap, although it seems unlikely that we will ever
> > find someone with the same knowledge level in both EDK2 and QEMU\/virt
> > topics. Recommendations welcome, I will ask around in Google as well.
> >
> >
> >> ---
> >>  Maintainers.txt | 4 
> >>  1 file changed, 4 deletions(-)
> >>
> >> diff --git a/Maintainers.txt b/Maintainers.txt index
> >> f4e4c72d0628..e9dda5c5ca0c 100644
> >> --- a/Maintainers.txt
> >> +++ b/Maintainers.txt
> >> @@ -69,7 +69,6 @@ Tianocore Stewards
> >>  --
> >>  F: *
> >>  M: Andrew Fish 
> >> -M: Laszlo Ersek 
> >>  M: Leif Lindholm 
> >>  M: Michael D Kinney 
> >>
> >> @@ -143,7 +142,6 @@ M: Ard Biesheuvel 
> >> ArmVirtPkg
> >>  F: ArmVirtPkg/
> >>  W: https://github.com/tianocore/tianocore.github.io/wiki/ArmVirtPkg
> >> -M: Laszlo Ersek 
> >>  M: Ard Biesheuvel 
> >>  R: Leif Lindholm 
> >>  R: Sami Mujawar  @@ -421,7 +419,6 @@ R:
> Siyuan
> >> Fu   OvmfPkg
> >>  F: OvmfPkg/
> >>  W: http://www.tianocore.org/ovmf/
> >> -M: Laszlo Ersek 
> >>  M: Ard Biesheuvel 
> >>  R: Jordan Justen 
> >>  S: Maintained
> >> @@ -567,7 +564,6 @@ F: UefiCpuPkg/
> >>  W: https://github.com/tianocore/tianocore.github.io/wiki/UefiCpuPkg
> >>  M: Eric Dong 
> >>  M: Ray Ni 
> >> -R: Laszlo Ersek 
> >>  R: Rahul Kumar 
> >>
> >>  UefiCpuPkg: Sec related modules
> >> --
> >> 2.19.1.3.g30247aa5d201
> >>
> >
> 
> 
> 
> 
> 



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Re: [edk2-devel] Possibly incorrect size in memory profile structure

[Zeng, Star]

Not sure I can understand your question correctly. But try best to recall and 
comment since not on it for long time. 

[2], [3] and [4] are all for interior storage management by 
MEMORY_PROFILE_DRIVER_INFO_DATA, MEMORY_PROFILE_DRIVER_INFO_DATA.PdbString 
points to the PDB string.

Exterior storage are managed by ProfileProtocolGetData() and 
MemoryProfileCopyData() from interior storage, 8B alignment are for exterior 
storage, PDB string is at the end of MEMORY_PROFILE_DRIVER_INFO structure.


Thanks,
Star
-Original Message-
From: devel@edk2.groups.io  On Behalf Of Marvin Häuser
Sent: 2021年6月19日 18:56
To: Zeng, Star ; Yao, Jiewen ; 
devel@edk2.groups.io
Subject: [edk2-devel] Possibly incorrect size in memory profile structure

Good day,

I have a question regarding a part of the memory profiling code. Namely this 
piece of code [1] introduced storing the PDB file name among the driver 
information. This is implement by a string pointer in the 
"MEMORY_PROFILE_DRIVER_INFO_DATA" structure (which embeds the 
"MEMORY_PROFILE_DRIVER_INFO" structure [2]). The length of the embedded 
"MEMORY_PROFILE_DRIVER_INFO" instance is set to the header size plus the 
8B-aligned size of the PDB name [3], albeit its storage is not used for the PDB 
file name, and the storage that is used instead is not aligned by 8B [4]. 
Ominously, the interior structure does have a comment that indicates it is (or 
was) supposed to hold the PDB file name at some point [5].

I do not see that concept being used, and instead see the previously described 
way of storage, so I believe the aligned size is a forgotten piece from a 
refactoring. I imagine early on, the interior structure was supposed to hold 
the PDB name, and the alignment was needed to satisfy the following data's 
requirements. However, the change to the exterior storage should make this 
superfluous, and the specified size seems to be incorrect in all cases.

Can you please give this a quick look and help me determine whether this is a 
bug? Thank you for your time!

Best regards,
Marvin

[1]
https://github.com/tianocore/edk2/commit/1d60fe96422206d37e1d74198bb11b2cf6195157#diff-b42ade68f10fa42dfa25570f0f9a165db4b974877c98d8845e384a40252ec220R407-R428

[2]
https://github.com/tianocore/edk2/blob/a63914d3f603580e5aeceb5edbafe56688210141/MdeModulePkg/Core/Dxe/Mem/MemoryProfileRecord.c#L25

[3]
https://github.com/tianocore/edk2/blob/a63914d3f603580e5aeceb5edbafe56688210141/MdeModulePkg/Core/Dxe/Mem/MemoryProfileRecord.c#L417

[4]
https://github.com/tianocore/edk2/blob/a63914d3f603580e5aeceb5edbafe56688210141/MdeModulePkg/Core/Dxe/Mem/MemoryProfileRecord.c#L404

[5]
https://github.com/tianocore/edk2/blob/a63914d3f603580e5aeceb5edbafe56688210141/MdeModulePkg/Include/Guid/MemoryProfile.h#L59







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Re: [edk2-devel] [PATCH v1 0/2] Define AML_NAME_SEG_SIZE

[Zeng, Star]

Just like to give my RB: Reviewed-by: Star Zeng 
Please also get the RB from maintainer. 


Thanks,
Star
-Original Message-
From: devel@edk2.groups.io  On Behalf Of PierreGondois
Sent: 2021年6月2日 6:05
To: devel@edk2.groups.io; Bi, Dandan ; 
gaolim...@byosoft.com.cn; Kinney, Michael D ; 
sami.muja...@arm.com; alexei.fedo...@arm.com
Subject: [edk2-devel] [PATCH v1 0/2] Define AML_NAME_SEG_SIZE

From: Pierre Gondois 

There is currently multiple AML_NAME_SEG_SIZE define in the edk2 repository. 
One in the MdeModulePkg and one in the DynamicTablesPkg package. Since the 
value can be inferred from the ACPI specification, it could be moved to 
MdePkg/Include/IndustryStandard/ and avoid re-definitions 

The two patches should be merged at once to avoid having multiple definitions 
of AML_NAME_SEG_SIZE.

The changes can be seen at:
https://github.com/PierreARM/edk2/tree/1750_Add_AML_NAMESEG_SIZE_v1
The results of the CI can be seen at:
https://github.com/tianocore/edk2/pull/1681

Pierre Gondois (2):
  MdePkg/MdeModulePkg: Move AML_NAME_SEG_SIZE definition
  DynamicTablesPkg: Use AML_NAME_SEG_SIZE define

 .../Acpi/Arm/AcpiSsdtCmn600LibArm/SsdtCmn600Generator.c  | 4 ++--
 .../AcpiSsdtSerialPortLibArm/SsdtSerialPortGenerator.c   | 4 ++--
 DynamicTablesPkg/Library/Common/AmlLib/AmlDefines.h  | 9 +
 MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiSdt.h   | 1 -
 MdePkg/Include/IndustryStandard/AcpiAml.h| 7 ++-
 5 files changed, 11 insertions(+), 14 deletions(-)

--
2.17.1








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Re: [edk2-devel] [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info

[Zeng, Star]

In C1e.c, the MSR_FEATURE_CONFIG is better to be corrected to 
MSR_NEHALEM_POWER_CTL.

Thanks,
Star

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Ni, Ray
Sent: Tuesday, June 1, 2021 11:25 PM
To: Li, Daoxiang ; devel@edk2.groups.io
Cc: Dong, Eric ; Laszlo Ersek ; Kumar, 
Rahul1 
Subject: Re: [edk2-devel] [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: 
Update processor location info

Reviewed-by: Ray Ni 

> -Original Message-
> From: Li, Daoxiang 
> Sent: Tuesday, June 1, 2021 3:25 PM
> To: devel@edk2.groups.io
> Cc: Li, Daoxiang ; Dong, Eric 
> ; Ni, Ray ; Laszlo Ersek 
> ; Kumar, Rahul1 
> Subject: [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update 
> processor location info
> 
> From: Daoxiang Li 
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424
> 
> Processor location information check needs to updated When Core 0 is 
> disabled
> 
> Signed-off-by: Daoxiang Li 
> CC: Eric Dong 
> CC: Ray Ni 
> CC: Laszlo Ersek 
> CC: Rahul Kumar 
> ---
>  UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c  | 4 ++--
>  UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 4 ++--
>  UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c | 6 +++---
>  3 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c 
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> index e6e5db75917c..c867802f0bb0 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> @@ -63,9 +63,9 @@ C1eInitialize (
>  {
> 
>//
> 
>// The scope of C1EEnable bit in the MSR_NEHALEM_POWER_CTL is 
> Package, only program
> 
> -  // MSR_FEATURE_CONFIG for thread 0 core 0 in each package.
> 
> +  // MSR_FEATURE_CONFIG once for each package.
> 
>//
> 
> -  if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || 
> (CpuInfo->ProcessorInfo.Location.Core != 0)) {
> 
> +  if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
> 
>return RETURN_SUCCESS;
> 
>}
> 
> 
> 
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> index bb5d983d1f4b..a3a2861cee5b 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> @@ -152,10 +152,10 @@ McaInitialize (
> 
> 
>//
> 
>// The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package for 
> below processor type, only program
> 
> -  // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in each 
> package.
> 
> +  // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS once for each package.
> 
>//
> 
>if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, 
> CpuInfo->DisplayModel)) {
> 
> -if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || 
> (CpuInfo->ProcessorInfo.Location.Core != 0)) {
> 
> +if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
> 
>return RETURN_SUCCESS;
> 
>  }
> 
>}
> 
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c 
> b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> index 8450c7ea3eaf..3c4c1bc706ba 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> @@ -130,10 +130,10 @@ PpinInitialize (
>// Support function already check the processor which support PPIN 
> feature, so this function not need
> 
>// to check the processor again.
> 
>//
> 
> -  // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only 
> program MSR_IVY_BRIDGE_PPIN_CTL for
> 
> -  // thread 0 core 0 in each package.
> 
> +  // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only 
> + program MSR_IVY_BRIDGE_PPIN_CTL
> 
> +  // once for each package.
> 
>//
> 
> -  if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || 
> (CpuInfo->ProcessorInfo.Location.Core != 0)) {
> 
> +  if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
> 
>  return RETURN_SUCCESS;
> 
>}
> 
> 
> 
> --
> 2.28.0.windows.1








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Re: [edk2-devel] [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs

[Zeng, Star]

Agree with you Chasel.
Deprecating them step by step, it will benefit further code sync for platforms 
consuming the PCDs.


Thanks,
Star
-Original Message-
From: Chiu, Chasel  
Sent: Thursday, April 15, 2021 3:26 PM
To: Lou, Yun ; devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Zeng, Star 
; Ni, Ray 
Subject: RE: [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs


Hi Yun,

I would recommend that we split this patch and remove PCD from DEC as last step 
after all involved platforms not consuming them, what do you think?

Thanks,
Chasel


> -Original Message-
> From: Lou, Yun 
> Sent: Thursday, April 15, 2021 2:49 PM
> To: devel@edk2.groups.io
> Cc: Lou, Yun ; Chiu, Chasel 
> ; Desimone, Nathaniel L 
> ; Zeng, Star ; 
> Ni, Ray 
> Subject: [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3334
> 
> IntelFsp2WrapperPkg defines following PCDs:
>   PcdCpuMicrocodePatchAddress
>   PcdCpuMicrocodePatchRegionSize
>   PcdFlashMicrocodeOffset
> 
> But the PCD name caused confusion because UefiCpuPkg defines:
>   PcdCpuMicrocodePatchAddress
>   PcdCpuMicrocodePatchRegionSize
> 
> PcdCpuMicrocodePatchAddress in IntelFsp2WrapperPkg means the base 
> address of the FV that holds the microcode.
> PcdCpuMicrocodePatchAddress in UefiCpuPkg means the address of the 
> microcode.
> 
> The relationship between the PCDs is:
> IntelFsp2WrapperPkg.PcdCpuMicrocodePatchAddress
>  +  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
>  == UefiCpuPkg.PcdCpuMicrocodePatchAddress
> 
> IntelFsp2WrapperPkg.PcdCpuMicrocodePatchRegionSize
>  -  IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset
>  == UefiCpuPkg.PcdCpuMicrocodePatchRegionSize
> 
> To avoid confusion and actually the PCDs in IntelFsp2WrapperPkg are 
> only used by a sample FSP-T wrapper, this patch removes the 3 PCDs 
> defined in IntelFsp2WrapperPkg.
> 
> The FSP-T wrapper is updated to directly use the ones in UefiCpuPkg.
> 
> Signed-off-by: Jason Lou 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Ray Ni 
> ---
> 
> IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInit
> Data.c  | 6 +++---
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> | 8 +---
> 
> IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWr
> a pperPlatformSecLibSample.inf | 7 +++
>  3 files changed, 7 insertions(+), 14 deletions(-)
> 
> diff --git
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRam
> I
> nitData.c
> b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRam
> I
> nitData.c
> index 96b47e23da..e57b5b57be 100644
> ---
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRam
> I
> nitData.c
> +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Se
> +++ cR
> +++ amInitData.c
> @@ -1,7 +1,7 @@
>  /** @file   Sample to provide TempRamInitParams data. -  Copyright (c) 2014 -
> 2020, Intel Corporation. All rights reserved.+  Copyright (c) 2014 - 2021,
> Intel Corporation. All rights reserved.   SPDX-License-Identifier: BSD-2-
> Clause-Patent  **/@@ -52,8 +52,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED 
> CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
>  }   },   {-((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) +
> FixedPcdGet32 (PcdFlashMicrocodeOffset)),-((UINT32)FixedPcdGet64
> (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32
> (PcdFlashMicrocodeOffset)),+FixedPcdGet32
> (PcdCpuMicrocodePatchAddress),+FixedPcdGet32
> (PcdCpuMicrocodePatchRegionSize), FixedPcdGet32
> (PcdFlashCodeCacheAddress), FixedPcdGet32 (PcdFlashCodeCacheSize),   }diff
> --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> index 6852bf1271..a3b9363779 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> @@ -1,7 +1,7 @@
>  ## @file # Provides drivers and definitions to support fsp in EDKII 
> bios. #-# Copyright (c) 2014 - 2020, Intel Corporation. All rights 
> reserved.+# Copyright (c) 2014 - 2021, Intel Corporation. All 
> rights reserved. # SPDX-
> License-Identifier: BSD-2-Clause-Patent # ##@@ -56,12 +56,6 @@
>## Provides the size of the BIOS Flash Device.
> gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x0020|UINT
> 32|0x1002 -  ## Indicates the base address of the first Microcode 
> 32|Patch in
> the Microcode Region-
> gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT6
> 4|0x1005-
> gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UI
> NT64|0x1006-  ## Indicates the offset 

Re: [edk2-devel] [PATCH 2/2] UefiCpuPkg/MpInitLib: Use XADD to avoid lock acquire/release

[Zeng, Star]

Hi All,

Do you think it worth or not to also update MpFuncs.nasm in 
Edk2\UefiCpuPkg\PiSmmCpuDxeSmm?


Thanks,
Star
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Ni, Ray
> Sent: Thursday, February 4, 2021 10:59 AM
> To: devel@edk2.groups.io
> Cc: Laszlo Ersek ; Dong, Eric ;
> Kumar, Rahul1 
> Subject: [edk2-devel] [PATCH 2/2] UefiCpuPkg/MpInitLib: Use XADD to avoid
> lock acquire/release
> 
> When AP firstly wakes up, MpFuncs.nasm contains below logic to assign an
> unique ApIndex to each AP according to who comes first:
> ---ASM---
> TestLock:
> xchg   [edi], eax
> cmpeax, NotVacantFlag
> jz TestLock
> 
> movecx, esi
> addecx, ApIndexLocation
> incdword [ecx]
> movebx, [ecx]
> 
> Releaselock:
> moveax, VacantFlag
> xchg   [edi], eax
> ---ASM END---
> 
> "lock inc" cannot be used to increase ApIndex because not only the global
> ApIndex should be increased, but also the result should be stored to a local
> general purpose register EBX.
> 
> This patch learns from the NASM implementation of
> InternalSyncIncrement() to use "XADD" instruction which can increase the
> global ApIndex and store the original ApIndex to EBX in one instruction.
> 
> With this patch, OVMF when running in a 255 threads QEMU spends about
> one second to wakeup all APs. Original implementation needs more than
> 10 seconds.
> 
> Signed-off-by: Ray Ni 
> Cc: Laszlo Ersek 
> Cc: Eric Dong 
> Cc: Rahul1 Kumar 
> ---
>  UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc   |  4 
>  .../Library/MpInitLib/Ia32/MpFuncs.nasm   | 21 +--
>  UefiCpuPkg/Library/MpInitLib/MpLib.c  |  3 +--
>  UefiCpuPkg/Library/MpInitLib/MpLib.h  |  3 +--
>  UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc|  4 
>  UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 18 
>  6 files changed, 11 insertions(+), 42 deletions(-)
> 
> diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
> b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
> index 244c1e72b7..5f1f0351d2 100644
> --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
> +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
> @@ -12,16 +12,12 @@
>  ; 
> ;---
>  -
> VacantFlagequ00h-NotVacantFlag 
> equ0ffh-
> CPU_SWITCH_STATE_IDLE equ0 CPU_SWITCH_STATE_STORED
> equ1 CPU_SWITCH_STATE_LOADED   equ2
> MP_CPU_EXCHANGE_INFO_OFFSET equ (SwitchToRealProcEnd -
> RendezvousFunnelProcStart) struc MP_CPU_EXCHANGE_INFO-  .Lock:
> resd 1   .StackStart:   resd 1   .StackSize:resd 1   
> .CFunction:
> resd 1diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> index 908c2eb447..b7267393db 100644
> --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> @@ -122,23 +122,12 @@ SkipEnableExecuteDisable:
>   ; AP init movedi, esi-addedi,
> MP_CPU_EXCHANGE_INFO_OFFSET-moveax, NotVacantFlag--
> TestLock:-xchg   [edi], eax-cmpeax, NotVacantFlag-jz
> TestLock--movecx, esi-addecx,
> MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.ApIndex-
> incdword [ecx]-movebx, [ecx]--Releaselock:-mov
> eax,
> VacantFlag-xchg   [edi], eax+addedi,
> MP_CPU_EXCHANGE_INFO_OFFSET +
> MP_CPU_EXCHANGE_INFO.ApIndex+movebx, 1+lock xadd  [edi],
> ebx   ; EBX = ApIndex+++incebx
>   ; EBX is
> CpuNumber +; program stack movedi, esi addedi,
> MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.StackSize
> moveax, [edi]diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> index 8b1f7f84ba..32a3951742 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> @@ -1,7 +1,7 @@
>  /** @file   CPU MP Initialize Library common functions. -  Copyright (c) 
> 2016 -
> 2020, Intel Corporation. All rights reserved.+  Copyright (c) 2016 - 2021,
> Intel Corporation. All rights reserved.   Copyright (c) 2020, AMD Inc. All
> rights reserved.SPDX-License-Identifier: BSD-2-Clause-Patent@@ -
> 1012,7 +1012,6 @@ FillExchangeInfoData (
>IA32_CR4 Cr4;ExchangeInfo  = 
> CpuMpData-
> >MpCpuExchangeInfo;-  ExchangeInfo->Lock= 0;   ExchangeInfo-
> >StackStart  = CpuMpData->Buffer;   ExchangeInfo->StackSize   =
> CpuMpData->CpuApStackSize;   ExchangeInfo->BufferStart = CpuMpData-
> >WakeupBuffer;diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h
> b/UefiCpuPkg/Library/MpInitLib/MpLib.h
> index 02652eaae1..0bd60388b1 100644
> --- 

Re: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP VolatileRegisters race condition

[Zeng, Star]

> -Original Message-
> From: Ni, Ray 
> Sent: Tuesday, January 26, 2021 10:26 AM
> To: Laszlo Ersek ; Zeng, Star ;
> Kinney, Michael D ; devel@edk2.groups.io
> Cc: Dong, Eric ; Kumar, Rahul1
> 
> Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP
> VolatileRegisters race condition
> 
> > > CpuMpData = (CPU_MP_DATA *) (Idtr.Base + Idtr.Limit + 1);
> > > +ASSERT (CpuMpData != NULL);
> 
> In this case, Idtr.Base, Idtr.Limit both equal to zero and CpuMpData is 1.
> ASSERT () cannot trigger assertion here.

Oh, got it. Then the assert may be like below to check Idtr.Base.
ASSERT (Idtr.Base != 0);

Thanks,
Star



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Re: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP VolatileRegisters race condition

[Zeng, Star]

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Laszlo
> Ersek
> Sent: Tuesday, January 26, 2021 5:18 AM
> To: Zeng, Star ; Ni, Ray ; Kinney,
> Michael D ; devel@edk2.groups.io
> Cc: Dong, Eric ; Kumar, Rahul1
> 
> Subject: Re: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP
> VolatileRegisters race condition
> 
> On 01/25/21 12:04, Zeng, Star wrote:
> > BTW:
> >
> > Do you think it worth or not to add the check like below in
> Edk2\UefiCpuPkg\Library\MpInitLib\PeiMpLib.c GetCpuMpData()? If the
> assert was there, it would facilitate the debug?
> >
> > CpuMpData = (CPU_MP_DATA *) (Idtr.Base + Idtr.Limit + 1);
> > +ASSERT (CpuMpData != NULL);
> 
> Could be worthwhile, but in a separate patch, IMO.

Make sense, Reviewed-by: Star Zeng  to this patch.


Thanks,
Star

> 
> Thanks
> Laszlo
> 
> >> -Original Message-
> >> From: Ni, Ray 
> >> Sent: Monday, January 25, 2021 4:53 PM
> >> To: Zeng, Star ; Kinney, Michael D
> >> ; devel@edk2.groups.io
> >> Cc: Dong, Eric ; Laszlo Ersek
> >> ; Kumar, Rahul1 
> >> Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> >> Fix AP VolatileRegisters race condition
> >>
> >> Star,
> >> You are right. There is no sequence requirement between
> >> FinishedCount++ and NumApsExecuting--.
> >>
> >> In fact, I have submitted another bugzilla
> >> https://bugzilla.tianocore.org/show_bug.cgi?id=3179.
> >>
> >> With that Bugzilla, the wait on (FinishedCount == CpuCount - 1) will
> >> be removed for the 1st wake up case.
> >>
> >> Thanks,
> >> Ray
> >>
> >>
> >>> -Original Message-
> >>> From: Zeng, Star 
> >>> Sent: Monday, January 25, 2021 4:43 PM
> >>> To: Kinney, Michael D ;
> >>> devel@edk2.groups.io
> >>> Cc: Dong, Eric ; Ni, Ray ;
> >>> Laszlo Ersek ; Kumar, Rahul1
> >>> ; Zeng, Star 
> >>> Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> >>> Fix AP VolatileRegisters race condition
> >>>
> >>> Mike,
> >>>
> >>> Oh, see it.
> >>> There is no sequence dependence between FinishedCount increment
> and
> >>> NumApsExecuting decrement, right?
> >>>
> >>>  InterlockedIncrement ((UINT32 *) >FinishedCount);
> >>>
> >>>  InterlockedDecrement ((UINT32 *) 
> >>> MpCpuExchangeInfo-
> >>>> NumApsExecuting);
> >>>
> >>>
> >>> Thanks,
> >>> Star
> >>>
> >>>> -Original Message-
> >>>> From: Kinney, Michael D 
> >>>> Sent: Monday, January 25, 2021 1:16 PM
> >>>> To: Zeng, Star ; devel@edk2.groups.io; Kinney,
> >>>> Michael D 
> >>>> Cc: Dong, Eric ; Ni, Ray ;
> >>>> Laszlo Ersek ; Kumar, Rahul1
> >>>> 
> >>>> Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> >>>> Fix AP VolatileRegisters race condition
> >>>>
> >>>> Hi Star,
> >>>>
> >>>> That line is only active when (CpuMpData->SevEsIsEnabled) is TRUE.
> >>>>
> >>>> The race condition addressed by this BZ is for systems with
> >>>> SecEsIsEnabled FALSE.
> >>>>
> >>>> From comments in this file the SecEsIsEnabled cases have already
> >>>> been handled.
> >>>>
> >>>> Mike
> >>>>
> >>>>> -Original Message-
> >>>>> From: Zeng, Star 
> >>>>> Sent: Sunday, January 24, 2021 7:15 PM
> >>>>> To: devel@edk2.groups.io; Kinney, Michael D
> >>>>> 
> >>>>> Cc: Dong, Eric ; Ni, Ray ;
> >>>>> Laszlo Ersek ; Kumar, Rahul1
> >>>>> ; Zeng, Star 
> >>>>> Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> >>>>> Fix AP VolatileRegisters race condition
> >>>>>
> >>>>> Does
> >>>>>
> >>>>
> >>>
> >>
> https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Library/MpIn
> >> i
> >>>>> tLib/MpLib.c#L909 (also decrements
> >>>>> NumApsExecuting) also need be handled?
> >>>>>
> >>>&

Re: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP VolatileRegisters race condition

[Zeng, Star]

BTW:

Do you think it worth or not to add the check like below in 
Edk2\UefiCpuPkg\Library\MpInitLib\PeiMpLib.c GetCpuMpData()? If the assert was 
there, it would facilitate the debug?

CpuMpData = (CPU_MP_DATA *) (Idtr.Base + Idtr.Limit + 1);
+ASSERT (CpuMpData != NULL);

Thanks,
Star
> -Original Message-
> From: Ni, Ray 
> Sent: Monday, January 25, 2021 4:53 PM
> To: Zeng, Star ; Kinney, Michael D
> ; devel@edk2.groups.io
> Cc: Dong, Eric ; Laszlo Ersek ;
> Kumar, Rahul1 
> Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP
> VolatileRegisters race condition
> 
> Star,
> You are right. There is no sequence requirement between FinishedCount++
> and NumApsExecuting--.
> 
> In fact, I have submitted another bugzilla
> https://bugzilla.tianocore.org/show_bug.cgi?id=3179.
> 
> With that Bugzilla, the wait on (FinishedCount == CpuCount - 1) will be
> removed for the 1st wake up case.
> 
> Thanks,
> Ray
> 
> 
> > -Original Message-
> > From: Zeng, Star 
> > Sent: Monday, January 25, 2021 4:43 PM
> > To: Kinney, Michael D ;
> > devel@edk2.groups.io
> > Cc: Dong, Eric ; Ni, Ray ;
> > Laszlo Ersek ; Kumar, Rahul1
> > ; Zeng, Star 
> > Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> > Fix AP VolatileRegisters race condition
> >
> > Mike,
> >
> > Oh, see it.
> > There is no sequence dependence between FinishedCount increment and
> > NumApsExecuting decrement, right?
> >
> >  InterlockedIncrement ((UINT32 *) >FinishedCount);
> >
> >  InterlockedDecrement ((UINT32 *) 
> >MpCpuExchangeInfo-
> > >NumApsExecuting);
> >
> >
> > Thanks,
> > Star
> >
> > > -Original Message-
> > > From: Kinney, Michael D 
> > > Sent: Monday, January 25, 2021 1:16 PM
> > > To: Zeng, Star ; devel@edk2.groups.io; Kinney,
> > > Michael D 
> > > Cc: Dong, Eric ; Ni, Ray ;
> > > Laszlo Ersek ; Kumar, Rahul1
> > > 
> > > Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> > > Fix AP VolatileRegisters race condition
> > >
> > > Hi Star,
> > >
> > > That line is only active when (CpuMpData->SevEsIsEnabled) is TRUE.
> > >
> > > The race condition addressed by this BZ is for systems with
> > > SecEsIsEnabled FALSE.
> > >
> > > From comments in this file the SecEsIsEnabled cases have already
> > > been handled.
> > >
> > > Mike
> > >
> > > > -Original Message-
> > > > From: Zeng, Star 
> > > > Sent: Sunday, January 24, 2021 7:15 PM
> > > > To: devel@edk2.groups.io; Kinney, Michael D
> > > > 
> > > > Cc: Dong, Eric ; Ni, Ray ;
> > > > Laszlo Ersek ; Kumar, Rahul1
> > > > ; Zeng, Star 
> > > > Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> > > > Fix AP VolatileRegisters race condition
> > > >
> > > > Does
> > > >
> > >
> >
> https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Library/MpIni
> > > > tLib/MpLib.c#L909 (also decrements
> > > > NumApsExecuting) also need be handled?
> > > >
> > > > Thanks,
> > > > Star
> > > >
> > > > > -Original Message-
> > > > > From: devel@edk2.groups.io  On Behalf Of
> > > > > Michael D Kinney
> > > > > Sent: Saturday, January 23, 2021 1:10 AM
> > > > > To: devel@edk2.groups.io
> > > > > Cc: Dong, Eric ; Ni, Ray
> > > > > ; Laszlo Ersek ; Kumar,
> > > > > Rahul1 
> > > > > Subject: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> > > > > Fix AP VolatileRegisters race condition
> > > > >
> > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3182
> > > > >
> > > > > Fix the order of operations in ApWakeupFunction() when
> > > > > PcdCpuApLoopMode is set to HLT mode that uses INIT-SIPI-SIPI to
> > wake
> > > > > APs.  In this mode, volatile state is restored and saved each
> > > > > time a INIT-SIPI-SIPI is sent to an AP to request a function to
> > > > > be executed on the AP.  When the function is completed the
> > > > > volatile state of the AP is saved.  However, the counters
> > > > > NumApsExecuting and FinishedCount are updated before the
> 

Re: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP VolatileRegisters race condition

[Zeng, Star]

Mike,

Oh, see it.
There is no sequence dependence between FinishedCount increment and 
NumApsExecuting decrement, right?

 InterlockedIncrement ((UINT32 *) >FinishedCount);
 
 InterlockedDecrement ((UINT32 *) 
>MpCpuExchangeInfo->NumApsExecuting);


Thanks,
Star

> -Original Message-
> From: Kinney, Michael D 
> Sent: Monday, January 25, 2021 1:16 PM
> To: Zeng, Star ; devel@edk2.groups.io; Kinney,
> Michael D 
> Cc: Dong, Eric ; Ni, Ray ; Laszlo
> Ersek ; Kumar, Rahul1 
> Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP
> VolatileRegisters race condition
> 
> Hi Star,
> 
> That line is only active when (CpuMpData->SevEsIsEnabled) is TRUE.
> 
> The race condition addressed by this BZ is for systems with SecEsIsEnabled
> FALSE.
> 
> From comments in this file the SecEsIsEnabled cases have already been
> handled.
> 
> Mike
> 
> > -Original Message-
> > From: Zeng, Star 
> > Sent: Sunday, January 24, 2021 7:15 PM
> > To: devel@edk2.groups.io; Kinney, Michael D
> > 
> > Cc: Dong, Eric ; Ni, Ray ;
> > Laszlo Ersek ; Kumar, Rahul1
> > ; Zeng, Star 
> > Subject: RE: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib:
> > Fix AP VolatileRegisters race condition
> >
> > Does
> >
> https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Library/MpIni
> > tLib/MpLib.c#L909 (also decrements
> > NumApsExecuting) also need be handled?
> >
> > Thanks,
> > Star
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io  On Behalf Of
> > > Michael D Kinney
> > > Sent: Saturday, January 23, 2021 1:10 AM
> > > To: devel@edk2.groups.io
> > > Cc: Dong, Eric ; Ni, Ray ;
> > > Laszlo Ersek ; Kumar, Rahul1
> > > 
> > > Subject: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix
> > > AP VolatileRegisters race condition
> > >
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3182
> > >
> > > Fix the order of operations in ApWakeupFunction() when
> > > PcdCpuApLoopMode is set to HLT mode that uses INIT-SIPI-SIPI to wake
> > > APs.  In this mode, volatile state is restored and saved each time a
> > > INIT-SIPI-SIPI is sent to an AP to request a function to be executed
> > > on the AP.  When the function is completed the volatile state of the
> > > AP is saved.  However, the counters NumApsExecuting and
> > > FinishedCount are updated before the volatile state is saved.  This
> > > allows for a race condition window for the BSP that is waiting on
> > > these counters to request a new INIT-SIPI-SIPI before all the APs
> > > have completely saved their volatile state.  The fix is to save the
> > > AP volatile state before updating the NumApsExecuting and
> > > FinishedCount counters.
> > >
> > > Cc: Eric Dong 
> > > Cc: Ray Ni 
> > > Cc: Laszlo Ersek 
> > > Cc: Rahul Kumar 
> > > Signed-off-by: Michael D Kinney 
> > > ---
> > >  UefiCpuPkg/Library/MpInitLib/MpLib.c | 31
> > > 
> > >  1 file changed, 18 insertions(+), 13 deletions(-)
> > >
> > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> > > b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> > > index 681fa79b4cff..8b1f7f84bad6 100644
> > > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> > > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> > > @@ -769,15 +769,6 @@ ApWakeupFunction (
> > >RestoreVolatileRegisters
> > > (>CpuData[0].VolatileRegisters,
> > > FALSE);
> > >InitializeApData (CpuMpData, ProcessorNumber, BistData,
> > > ApTopOfStack);
> > >ApStartupSignalBuffer = CpuMpData-
> > > >CpuData[ProcessorNumber].StartupApSignal;
> > > -
> > > -  //
> > > -  // Delay decrementing the APs executing count when SEV-ES is
> enabled
> > > -  // to allow the APs to issue an AP_RESET_HOLD before the BSP
> possibly
> > > -  // performs another INIT-SIPI-SIPI sequence.
> > > -  //
> > > -  if (!CpuMpData->SevEsIsEnabled) {
> > > -InterlockedDecrement ((UINT32 *) 
> > > >MpCpuExchangeInfo->NumApsExecuting);
> > > -  }
> > >  } else {
> > >//
> > >// Execute AP function if AP is ready @@ -866,19 +857,33 @@
> > > ApWakeupFunction (
> > >}
> > >  }
> > >
> > > +  

Re: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP VolatileRegisters race condition

[Zeng, Star]

Does 
https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Library/MpInitLib/MpLib.c#L909
 (also decrements NumApsExecuting) also need be handled?

Thanks,
Star

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Michael
> D Kinney
> Sent: Saturday, January 23, 2021 1:10 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Laszlo
> Ersek ; Kumar, Rahul1 
> Subject: [edk2-devel] [Patch 1/1] UefiCpuPkg/Library/MpInitLib: Fix AP
> VolatileRegisters race condition
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3182
> 
> Fix the order of operations in ApWakeupFunction() when
> PcdCpuApLoopMode
> is set to HLT mode that uses INIT-SIPI-SIPI to wake APs.  In this mode,
> volatile state is restored and saved each time a INIT-SIPI-SIPI is sent
> to an AP to request a function to be executed on the AP.  When the
> function is completed the volatile state of the AP is saved.  However,
> the counters NumApsExecuting and FinishedCount are updated before
> the volatile state is saved.  This allows for a race condition window
> for the BSP that is waiting on these counters to request a new
> INIT-SIPI-SIPI before all the APs have completely saved their volatile
> state.  The fix is to save the AP volatile state before updating the
> NumApsExecuting and FinishedCount counters.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Cc: Rahul Kumar 
> Signed-off-by: Michael D Kinney 
> ---
>  UefiCpuPkg/Library/MpInitLib/MpLib.c | 31 
>  1 file changed, 18 insertions(+), 13 deletions(-)
> 
> diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> index 681fa79b4cff..8b1f7f84bad6 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> @@ -769,15 +769,6 @@ ApWakeupFunction (
>RestoreVolatileRegisters (>CpuData[0].VolatileRegisters,
> FALSE);
>InitializeApData (CpuMpData, ProcessorNumber, BistData,
> ApTopOfStack);
>ApStartupSignalBuffer = CpuMpData-
> >CpuData[ProcessorNumber].StartupApSignal;
> -
> -  //
> -  // Delay decrementing the APs executing count when SEV-ES is enabled
> -  // to allow the APs to issue an AP_RESET_HOLD before the BSP possibly
> -  // performs another INIT-SIPI-SIPI sequence.
> -  //
> -  if (!CpuMpData->SevEsIsEnabled) {
> -InterlockedDecrement ((UINT32 *) 
> >MpCpuExchangeInfo->NumApsExecuting);
> -  }
>  } else {
>//
>// Execute AP function if AP is ready
> @@ -866,19 +857,33 @@ ApWakeupFunction (
>}
>  }
> 
> +if (CpuMpData->ApLoopMode == ApInHltLoop) {
> +  //
> +  // Save AP volatile registers
> +  //
> +  SaveVolatileRegisters (
> >CpuData[ProcessorNumber].VolatileRegisters);
> +}
> +
>  //
>  // AP finished executing C code
>  //
>  InterlockedIncrement ((UINT32 *) >FinishedCount);
> 
> +if (CpuMpData->InitFlag == ApInitConfig) {
> +  //
> +  // Delay decrementing the APs executing count when SEV-ES is enabled
> +  // to allow the APs to issue an AP_RESET_HOLD before the BSP possibly
> +  // performs another INIT-SIPI-SIPI sequence.
> +  //
> +  if (!CpuMpData->SevEsIsEnabled) {
> +InterlockedDecrement ((UINT32 *) 
> >MpCpuExchangeInfo->NumApsExecuting);
> +  }
> +}
> +
>  //
>  // Place AP is specified loop mode
>  //
>  if (CpuMpData->ApLoopMode == ApInHltLoop) {
> -  //
> -  // Save AP volatile registers
> -  //
> -  SaveVolatileRegisters (
> >CpuData[ProcessorNumber].VolatileRegisters);
>//
>// Place AP in HLT-loop
>//
> --
> 2.29.2.windows.2
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: NumberOfCpus may be uninitialized

[Zeng, Star]

> -Original Message-
> From: Laszlo Ersek 
> Sent: Thursday, January 21, 2021 10:38 PM
> To: devel@edk2.groups.io; Zeng, Star 
> Cc: Dong, Eric ; Ni, Ray 
> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib:
> NumberOfCpus may be uninitialized
> 
> On 01/21/21 10:39, Zeng, Star wrote:
> > NumberOfCpus local variable in GetAcpiCpuData will be uninitialized
> > when CpuS3DataDxe runs before DxeRegisterCpuFeaturesLib (linked by
> > CpuFeaturesDxe) because there is no code to initialize it at
> > (AcpiCpuData != NULL) execution path.
> >
> > The issue is exposed after cefad282fb31aff3e1a6dcbd368cbbffc3fce900
> > and 38ee7bafa72f58982f99ac6f61eef160f80bad69.
> > There was negligence in that code review.
> > One further topic may be "Could EDK2 CI be enhanced to catch this kind
> > of uninitialized local variable case?". :)
> >
> > This patch fixes this regression issue.
> >
> > Cc: Eric Dong 
> > Cc: Ray Ni 
> > Cc: Laszlo Ersek 
> > Signed-off-by: Star Zeng 
> > ---
> >  .../Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c  | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
> > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
> > index 7bb92404027f..60daa5cc87f0 100644
> > ---
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
> > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib
> > +++ .c
> > @@ -957,6 +957,7 @@ GetAcpiCpuData (
> >  //
> >  // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable
> for all CPUs
> >  //
> > +NumberOfCpus = AcpiCpuData->NumberOfCpus;
> >  TableSize = 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE);
> >  RegisterTable  = AllocatePages (EFI_SIZE_TO_PAGES (TableSize));
> >  ASSERT (RegisterTable != NULL);
> >
> 
> Merged as commit 6c5801be6ef3, via
> <https://github.com/tianocore/edk2/pull/1380>.
> 
> I've picked up Ray's R-b from the detached message
> <https://edk2.groups.io/g/devel/message/70615>.
> 
> I've also updated the original ticket:
> <https://bugzilla.tianocore.org/show_bug.cgi?id=3159>.
> 
> Thanks & sorry about the regression,
> Laszlo

No worry, it was my negligence for the original code review series.
Fortunately, we catch it quickly. 

Star



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Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: NumberOfCpus may be uninitialized

[Zeng, Star]

> -Original Message-
> From: Laszlo Ersek 
> Sent: Thursday, January 21, 2021 9:48 PM
> To: devel@edk2.groups.io; Zeng, Star 
> Cc: Dong, Eric ; Ni, Ray 
> Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib:
> NumberOfCpus may be uninitialized
> 
> On 01/21/21 10:39, Zeng, Star wrote:
> > NumberOfCpus local variable in GetAcpiCpuData will be uninitialized
> > when CpuS3DataDxe runs before DxeRegisterCpuFeaturesLib (linked by
> > CpuFeaturesDxe) because there is no code to initialize it at
> > (AcpiCpuData != NULL) execution path.
> >
> > The issue is exposed after cefad282fb31aff3e1a6dcbd368cbbffc3fce900
> > and 38ee7bafa72f58982f99ac6f61eef160f80bad69.
> 
> Oops, sorry!
> 
> > There was negligence in that code review.
> > One further topic may be "Could EDK2 CI be enhanced to catch this kind
> > of uninitialized local variable case?". :)
> 
> Indeed I don't know why none of the toolchains caught this issue in CI.
> :/ GCC is otherwise known for its "variable may be used without
> initialization" warnings.
> 
> >
> > This patch fixes this regression issue.
> >
> > Cc: Eric Dong 
> > Cc: Ray Ni 
> > Cc: Laszlo Ersek 
> > Signed-off-by: Star Zeng 
> > ---
> >  .../Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c  | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
> > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
> > index 7bb92404027f..60daa5cc87f0 100644
> > ---
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
> > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib
> > +++ .c
> > @@ -957,6 +957,7 @@ GetAcpiCpuData (
> >  //
> >  // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable
> for all CPUs
> >  //
> > +NumberOfCpus = AcpiCpuData->NumberOfCpus;
> >  TableSize = 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE);
> >  RegisterTable  = AllocatePages (EFI_SIZE_TO_PAGES (TableSize));
> >  ASSERT (RegisterTable != NULL);
> >
> 
> Reviewed-by: Laszlo Ersek 
> 
> (Also, I think Ray's R-b from
> <https://edk2.groups.io/g/devel/message/70615> applies here, so I'm going
> to pick that up.)

Laszlo and Ray, thanks for the R-b.
Please help push it by pull request if no other feedback is received.

Thanks,
Star

> 
> Thanks & sorry again
> Laszlo



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[edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: NumberOfCpus may be uninitialized

[Zeng, Star]

NumberOfCpus local variable in GetAcpiCpuData will be uninitialized
when CpuS3DataDxe runs before DxeRegisterCpuFeaturesLib (linked by
CpuFeaturesDxe) because there is no code to initialize it at
(AcpiCpuData != NULL) execution path.

The issue is exposed after cefad282fb31aff3e1a6dcbd368cbbffc3fce900
and 38ee7bafa72f58982f99ac6f61eef160f80bad69.
There was negligence in that code review.
One further topic may be "Could EDK2 CI be enhanced to catch this kind
of uninitialized local variable case?". :)

This patch fixes this regression issue.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Star Zeng 
---
 .../Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c  | 1 +
 1 file changed, 1 insertion(+)

diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
index 7bb92404027f..60daa5cc87f0 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
@@ -957,6 +957,7 @@ GetAcpiCpuData (
 //
 // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for 
all CPUs
 //
+NumberOfCpus = AcpiCpuData->NumberOfCpus;
 TableSize = 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE);
 RegisterTable  = AllocatePages (EFI_SIZE_TO_PAGES (TableSize));
 ASSERT (RegisterTable != NULL);
-- 
2.27.0.windows.1



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Re: [edk2-devel] [PATCH v2 0/4] UefiCpuPkg, OvmfPkg: do not allocate useless register tables for S3 resume

[Zeng, Star]

Series Reviewed-by: Star Zeng 

> -Original Message-
> From: Laszlo Ersek 
> Sent: Tuesday, January 19, 2021 11:55 PM
> To: edk2-devel-groups-io 
> Cc: Ard Biesheuvel ; Dong, Eric
> ; Justen, Jordan L ;
> Philippe Mathieu-Daudé ; Kumar, Rahul1
> ; Ni, Ray ; Zeng, Star
> 
> Subject: [PATCH v2 0/4] UefiCpuPkg, OvmfPkg: do not allocate useless
> register tables for S3 resume
> 
> Ref:https://bugzilla.tianocore.org/show_bug.cgi?id=3159
> Repo:   https://pagure.io/lersek/edk2.git
> Branch: remove-cpu-reg-table-alloc-3159-v2
> 
> Updates in v2:
> 
> - v1 patches have not received any updates, I've only picked up the
>   feedback tags.
> 
> - Patch v2 #1 -- for RegisterCpuFeaturesLib -- is new; authored by Ray
>   and updated slightly by myself. Star and/or Eric should please approve
>   this patch.
> 
> v1 was posted at:
> 
>   [edk2-devel] [PATCH 0/3] UefiCpuPkg, OvmfPkg: do not allocate useless
>   register tables for S3 resume
> 
>   Message-Id: <20210112191934.12459-1-ler...@redhat.com>
>   https://edk2.groups.io/g/devel/message/70167
>   https://www.redhat.com/archives/edk2-devel-archive/2021-
> January/msg00652.html
> 
> Cc: Ard Biesheuvel 
> Cc: Eric Dong 
> Cc: Jordan Justen 
> Cc: Philippe Mathieu-Daudé 
> Cc: Rahul Kumar 
> Cc: Ray Ni 
> Cc: Star Zeng 
> 
> Thanks
> Laszlo
> 
> Laszlo Ersek (3):
>   UefiCpuPkg/AcpiCpuData: update comments on register table fields
>   UefiCpuPkg/CpuS3DataDxe: do not allocate useless register tables
>   OvmfPkg/CpuS3DataDxe: do not allocate useless register tables
> 
> Ray Ni (1):
>   UefiCpuPkg/CpuFeature: Don't assume CpuS3DataDxe alloc RegisterTable
> 
>  OvmfPkg/CpuS3DataDxe/CpuS3Data.c   | 70 
> +---
> -
>  OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf  |  1 -
>  UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c| 32 
> 
>  UefiCpuPkg/Include/AcpiCpuData.h   |  4 +
>  UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 80
> +++-
>  5 files changed, 48 insertions(+), 139 deletions(-)
> 
> 
> base-commit: 83facfd184021874f95a6a34b2e47e0ebb34a762
> --
> 2.19.1.3.g30247aa5d201



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Re: [edk2-devel] [PATCH v1 1/1] UefiCpuPkg: Remove PEI/DXE instances of CpuTimerLib.

[Zeng, Star]

A little surprised by "Average time taken to find CpuCrystalFrequencyHob: about 
2000 ns".
It depends on the hob is built early or late?
Seemingly, NanoSecondDelay() will always have some deviation.

Thanks,
Star
-Original Message-
From: devel@edk2.groups.io  On Behalf Of Laszlo Ersek
Sent: Friday, September 25, 2020 2:46 PM
To: Ni, Ray ; Lou, Yun ; 
devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul1 
Subject: Re: [edk2-devel] [PATCH v1 1/1] UefiCpuPkg: Remove PEI/DXE instances 
of CpuTimerLib.

On 09/25/20 07:25, Ni, Ray wrote:
> Reviewed-by: Ray Ni 

Acked-by: Laszlo Ersek 

Thanks
Laszlo

> 
>> -Original Message-
>> From: Lou, Yun 
>> Sent: Friday, September 25, 2020 11:58 AM
>> To: devel@edk2.groups.io
>> Cc: Lou, Yun ; Ni, Ray ; Dong, 
>> Eric ; Laszlo Ersek ; Kumar, 
>> Rahul1 
>> Subject: [PATCH v1 1/1] UefiCpuPkg: Remove PEI/DXE instances of CpuTimerLib.
>>
>> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2832
>>
>> 1. Remove PEI instance(PeiCpuTimerLib).
>> PeiCpuTimerLib is currently designed to save time by getting CPU TSC 
>> frequncy from Hob.
>> BaseCpuTimerLib is designed to calculate TSC frequency by using CPUID[15h] 
>> each time.
>> The time it takes to find CpuCrystalFrequencyHob (about 2000ns) is 
>> much longer than it takes to calculate TSC frequency with CPUID[15h] 
>> (about 450ns), which means using BaseCpuTimerLib to trigger a delay 
>> is more accurate than using PeiCpuTimerLib, recommend to use BaseCpuTimerLib 
>> instead of PeiCpuTimerLib.
>>
>> 2. Remove DXE instance(DxeCpuTimerLib).
>> DxeCpuTimerLib is designed to calculate TSC frequency with CPUID[15h] 
>> in its constructor function, then save it in a global variable. For 
>> this design, once the driver containing this instance is running, the 
>> constructor function is called, it will take extra time to calculate TSC 
>> frequency.
>> The time it takes to get TSC frequncy from global variable is shorter 
>> than it takes to calculate TSC frequency with CPUID[15h], but 450ns is a 
>> short time, the impact on the platform is very limited.
>> In addition, in order to simplify the code, recommend to use BaseCpuTimerLib 
>> instead of DxeCpuTimerLib.
>>
>> I did some experiments on one Intel server platform and collected the 
>> following data:
>> 1. Average time taken to find CpuCrystalFrequencyHob: about 2000 ns.
>> 2. Average time taken to calculate TSC frequency: about 450 ns.
>>
>> Reference code:
>> //
>> // Calculate average time taken to find Hob.
>> //
>> DEBUG((DEBUG_ERROR, "[PeiCpuTimerLib] GetPerformanceCounterFrequency - 
>> GetFirstGuidHob (1000 cycles)\n"));
>> Ticks1 = AsmReadTsc();
>> for (i = 0; i < 1000; i++) {
>>   GuidHob = GetFirstGuidHob ();
>> }
>> Ticks2 = AsmReadTsc();
>>
>> if (GuidHob == NULL) {
>>   DEBUG((DEBUG_ERROR, "[PeiCpuTimerLib]  - CpuCrystalFrequencyHob can 
>> not be found!\n"));
>> } else {
>>   DEBUG((DEBUG_ERROR, "[PeiCpuTimerLib]  - Average time taken to find 
>> Hob = %d ns\n", \
>>   DivU64x32(DivU64x64Remainder(MultU64x32((Ticks2 - Ticks1), 
>> 10), *CpuCrystalCounterFrequency, NULL), 1000)));
>> }
>>
>> //
>> // Calculate average time taken to calculate CPU frequency.
>> //
>> DEBUG((DEBUG_ERROR, "[PeiCpuTimerLib] 
>> GetPerformanceCounterFrequency - CpuidCoreClockCalculateTscFrequency
>> (1000 cycles)\n"));
>> Ticks1 = AsmReadTsc();
>> for (i = 0; i < 1000; i++) {
>>   Freq = CpuidCoreClockCalculateTscFrequency ();
>> }
>> Ticks2 = AsmReadTsc();
>> DEBUG((DEBUG_ERROR, "[PeiCpuTimerLib]  - Average time taken to calculate 
>> TSC frequency = %d ns\n", \
>> DivU64x32(DivU64x64Remainder(MultU64x32((Ticks2 - Ticks1), 
>> 10), *CpuCrystalCounterFrequency, NULL), 1000)));
>>
>> Signed-off-by: Jason Lou 
>> Cc: Ray Ni 
>> Cc: Eric Dong 
>> Cc: Laszlo Ersek 
>> Cc: Rahul Kumar 
>> ---
>>  UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c   | 85 
>>  UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c   | 58 -
>>  UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf | 37 -  
>> UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni | 17   
>> UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf | 36 -  
>> UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni | 17 
>>  UefiCpuPkg/UefiCpuPkg.dsc |  4 +-
>>  7 files changed, 1 insertion(+), 253 deletions(-)
>>
>> diff --git a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c 
>> b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c
>> deleted file mode 100644
>> index 269e5a3e83d7..
>> --- a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c
>> +++ /dev/null
>> @@ -1,85 +0,0 @@
>> -/** @file
>>
>> -  CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer 
>> Library.
>>
>> -
>>
>> -  Copyright (c) 2019 Intel Corporation. All rights reserved.
>>
>> -  SPDX-License-Identifier: BSD-2-Clause-Patent
>>
>> -
>>
>> -**/
>>

Re: [edk2-devel] [PATCH] IntelFsp2Pkg GenCfgOpt.py: Initialize IncLines as empty list

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Chiu, Chasel  
Sent: Wednesday, September 16, 2020 8:21 PM
To: devel@edk2.groups.io; gaolim...@byosoft.com.cn
Cc: Desimone, Nathaniel L ; Zeng, Star 

Subject: RE: [edk2-devel] [PATCH] IntelFsp2Pkg GenCfgOpt.py: Initialize 
IncLines as empty list


Reviewed-by: Chasel Chiu 

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of 
> gaoliming
> Sent: Wednesday, September 16, 2020 5:58 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L 
> ; Zeng, Star 
> Subject: [edk2-devel] [PATCH] IntelFsp2Pkg GenCfgOpt.py: Initialize 
> IncLines as empty list
> 
> IncLines as empty list for the case when InputHeaderFile is not specified.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Liming Gao 
> ---
>  IntelFsp2Pkg/Tools/GenCfgOpt.py | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py 
> b/IntelFsp2Pkg/Tools/GenCfgOpt.py index e9de128e..bcced590 100644
> --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
> +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
> @@ -1177,6 +1177,7 @@ EndList
>  UpdSignatureCheck = ['FSPT_UPD_SIGNATURE', 
> 'FSPM_UPD_SIGNATURE', 'FSPS_UPD_SIGNATURE']
>  ExcludedSpecificUpd = ['FSPT_ARCH_UPD', 'FSPM_ARCH_UPD', 
> 'FSPS_ARCH_UPD']
> 
> +IncLines = []
>  if InputHeaderFile != '':
>  if not os.path.exists(InputHeaderFile):
>   self.Error = "Input header file '%s' does not exist" 
> % InputHeaderFile
> --
> 2.27.0.windows.1
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH V3] Maintainers.txt: Add reviewer for serial and disk

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Gao, Zhichao
Sent: 2020年8月3日 14:05
To: devel@edk2.groups.io
Cc: Gao, Zhichao ; Wang, Jian J ; 
Wu, Hao A ; Gao, Liming ; Ni, Ray 
; Bi, Dandan ; Zeng, Star 

Subject: [edk2-devel] [PATCH V3] Maintainers.txt: Add reviewer for serial and 
disk

From: "Gao, Zhichao" 

Signed-off-by: Zhichao Gao 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Liming Gao 
Cc: Ray Ni 
Cc: Dandan Bi 
Cc: Star Zeng 
---
V2:
Forget to remove the *SerailPort*.h from the common device section in V1.
Fix it in V2.

V3:
Add the missing ':' in V2 for Disk mdoules.
Add one more module reviewer for SMBIOS.

 Maintainers.txt | 17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt index 5504bb3d17..fe7f04831f 
100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -286,16 +286,27 @@ F: MdeModulePkg/Universal/SecurityStubDxe/SecurityStub.c
 R: Dandan Bi 
 R: Liming Gao 
 
+MdeModulePkg: Serial modules
+F: MdeModulePkg/*Serial*/
+F: MdeModulePkg/Include/*SerialPort*.h
+R: Hao A Wu 
+R: Ray Ni 
+R: Zhichao Gao 
+
+MdeModulePkg: Disk modules
+F: MdeModulePkg/Universal/Disk/
+R: Hao A Wu 
+R: Ray Ni 
+R: Zhichao Gao 
+
 MdeModulePkg: Device and Peripheral modules
 F: MdeModulePkg/*PciHostBridge*/
-F: MdeModulePkg/*Serial*/
 F: MdeModulePkg/Bus/
 F: MdeModulePkg/Include/*Ata*.h
 F: MdeModulePkg/Include/*IoMmu*.h
 F: MdeModulePkg/Include/*NonDiscoverableDevice*.h
 F: MdeModulePkg/Include/*NvmExpress*.h
 F: MdeModulePkg/Include/*SdMmc*.h
-F: MdeModulePkg/Include/*SerialPort*.h
 F: MdeModulePkg/Include/*Ufs*.h
 F: MdeModulePkg/Include/*Usb*.h
 F: MdeModulePkg/Include/Guid/RecoveryDevice.h
@@ -304,7 +315,6 @@ F: MdeModulePkg/Include/Library/PciHostBridgeLib.h
 F: MdeModulePkg/Include/Ppi/StorageSecurityCommand.h
 F: MdeModulePkg/Include/Protocol/Ps2Policy.h
 F: MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/
-F: MdeModulePkg/Universal/Disk/
 F: MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/
 R: Hao A Wu 
 R: Ray Ni 
@@ -365,6 +375,7 @@ MdeModulePkg: SMBIOS modules
 F: MdeModulePkg/Universal/Smbios*/
 R: Dandan Bi 
 R: Star Zeng 
+R: Zhichao Gao 
 
 MdeModulePkg: UEFI Variable modules
 F: MdeModulePkg/*Var*/
--
2.21.0.windows.1





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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Add Fsp22SecCoreS.inf to Dsc.

[Zeng, Star]

Reviewed-by: Star Zeng  with the copyright year correction.

> -Original Message-
> From: Desimone, Nathaniel L 
> Sent: Thursday, June 11, 2020 4:35 AM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Ma, Maurice ; Zeng, Star 
> Subject: RE: [PATCH] IntelFsp2Pkg: Add Fsp22SecCoreS.inf to Dsc.
> 
> Please fix copyright year. With that change...
> 
> Reviewed-by: Nate DeSimone 
> 
> -Original Message-
> From: Chiu, Chasel 
> Sent: Tuesday, June 9, 2020 7:33 PM
> To: devel@edk2.groups.io
> Cc: Ma, Maurice ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [PATCH] IntelFsp2Pkg: Add Fsp22SecCoreS.inf to Dsc.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2788
> 
> DSC is incomplete according to the established CI policies.
> Fsp22SecCoreS.inf needs to be added to the Components section for
> completeness.
> 
> Cc: Maurice Ma 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Chasel Chiu 
> ---
>  IntelFsp2Pkg/IntelFsp2Pkg.dsc | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
> index 02fe9cb188..9b5e38c5d9 100644
> --- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc
> +++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
> @@ -1,7 +1,7 @@
>  ## @file
>  # Provides driver and definitions to build fsp.
>  #
> -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
> +# Copyright (c) 2014 - 2022, Intel Corporation. All rights
> +reserved.
>  # SPDX-License-Identifier: BSD-2-Clause-Patent  #  ## @@ -65,6 +65,7 @@
>IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
>IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
>IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf
> +  IntelFsp2Pkg/FspSecCore/Fsp22SecCoreS.inf
>IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf
> 
>  [PcdsFixedAtBuild.common]
> --
> 2.13.3.windows.1


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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to FspGlobalData.

[Zeng, Star]

No need to resend new patch, you can go ahead with Nate's review after the 
correction.

> -Original Message-
> From: Chiu, Chasel 
> Sent: Wednesday, May 20, 2020 12:25 PM
> To: Zeng, Star ; Desimone, Nathaniel L
> ; devel@edk2.groups.io
> Cc: Ma, Maurice 
> Subject: RE: [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to
> FspGlobalData.
> 
> 
> Yes, thanks for good catch! I will correct it.
> 
> > -Original Message-
> > From: Zeng, Star 
> > Sent: Wednesday, May 20, 2020 12:21 PM
> > To: Desimone, Nathaniel L ; Chiu,
> > Chasel ; devel@edk2.groups.io
> > Cc: Ma, Maurice ; Zeng, Star
> > 
> > Subject: RE: [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to
> > FspGlobalData.
> >
> > equilivant is a typo?
> >
> > > -Original Message-
> > > From: Desimone, Nathaniel L 
> > > Sent: Wednesday, May 20, 2020 12:12 PM
> > > To: Chiu, Chasel ; devel@edk2.groups.io
> > > Cc: Ma, Maurice ; Zeng, Star
> > > 
> > > Subject: RE: [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to
> > > FspGlobalData.
> > >
> > > Reviewed-by: Nate DeSimone 
> > >
> > > > -Original Message-
> > > > From: Chiu, Chasel 
> > > > Sent: Tuesday, May 19, 2020 8:34 PM
> > > > To: devel@edk2.groups.io
> > > > Cc: Ma, Maurice ; Desimone, Nathaniel L
> > > > ; Zeng, Star 
> > > > Subject: [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to
> > FspGlobalData.
> > > >
> > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2726
> > > >
> > > > When FSP switching stack and calling bootloader functions, the
> > > > function parameter in stack may not be accessible easily.
> > > > We can store the function parameter pointer to FspGlobalData and
> > > > retrieve it after stack switched.
> > > >
> > > > Also need to add Loader2PeiSwitchStack () to header file as public
> > > > function for platform FSP code to consume.
> > > >
> > > > Cc: Maurice Ma 
> > > > Cc: Nate DeSimone 
> > > > Cc: Star Zeng 
> > > > Signed-off-by: Chasel Chiu 
> > > > ---
> > > >  IntelFsp2Pkg/Include/FspGlobalData.h | 12
> > ++--
> > > >  IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h | 18
> > > > +-
> > > >  2 files changed, 27 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
> > > > b/IntelFsp2Pkg/Include/FspGlobalData.h
> > > > index 5bde316893..dba9b48e1a 100644
> > > > --- a/IntelFsp2Pkg/Include/FspGlobalData.h
> > > > +++ b/IntelFsp2Pkg/Include/FspGlobalData.h
> > > > @@ -52,12 +52,20 @@ typedef struct  {
> > > > VOID   *MemoryInitUpdPtr;
> > > > VOID   *SiliconInitUpdPtr;
> > > > UINT8  ApiIdx;
> > > > -   UINT8  FspMode; // 0: FSP in API mode; 1: FSP in
> > > DISPATCH mode
> > > > +   ///
> > > > +   /// 0: FSP in API mode; 1: FSP in DISPATCH mode
> > > > +   ///
> > > > +   UINT8  FspMode;
> > > > UINT8  OnSeparateStack;
> > > > UINT8  Reserved3;
> > > > UINT32 NumberOfPhases;
> > > > UINT32 PhasesExecuted;
> > > > -   UINT8  Reserved4[20];
> > > > +   ///
> > > > +   /// To store function parameters pointer
> > > > +   /// so it can be retrieved after stack switched.
> > > > +   ///
> > > > +   VOID   *FunctionParameterPtr;
> > > > +   UINT8  Reserved4[16];
> > > > UINT32 PerfSig;
> > > > UINT16 PerfLen;
> > > > UINT16 Reserved5;
> > > > diff --git a/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > > > b/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > > > index 0c76e9f022..bed2a5d677 100644
> > > > --- a/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > > > +++ b/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > > > @@ -1,6 +1,6 @@
> > > >  /** @file
> > > >
> > > > -  Copyright (c) 2014, Intel Corporation. All rights reserved.
> > > > +  Copyright (c) 2014 - 2020, Intel Corporation. All rights
> > > > + reserved.
> > > >SPDX-License-Identifier: BSD-2-Clause-Patent
> > > >
> > > >  **/
> > > > @@ -36,4 +36,20 @@ Pei2LoaderSwitchStack (
> > > >VOID
> > > >);
> > > >
> > > > +/**
> > > > +
> > > > +  This function is equilivant to Pei2LoaderSwitchStack () but
> > > > + just indicates  the stack after switched is FSP stack.
> > > > +
> > > > +  @return ReturnKey  After switching to the saved stack,
> > > > + this value will be saved in eax
> > > > + before
> > > returning.
> > > > +
> > > > +
> > > > +**/
> > > > +UINT32
> > > > +EFIAPI
> > > > +Loader2PeiSwitchStack (
> > > > +  VOID
> > > > +  );
> > > > +
> > > >  #endif
> > > > --
> > > > 2.13.3.windows.1


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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to FspGlobalData.

[Zeng, Star]

equilivant is a typo?

> -Original Message-
> From: Desimone, Nathaniel L 
> Sent: Wednesday, May 20, 2020 12:12 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Ma, Maurice ; Zeng, Star 
> Subject: RE: [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to
> FspGlobalData.
> 
> Reviewed-by: Nate DeSimone 
> 
> > -Original Message-
> > From: Chiu, Chasel 
> > Sent: Tuesday, May 19, 2020 8:34 PM
> > To: devel@edk2.groups.io
> > Cc: Ma, Maurice ; Desimone, Nathaniel L
> > ; Zeng, Star 
> > Subject: [PATCH] IntelFsp2Pkg: Add FunctionParametePtr to FspGlobalData.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2726
> >
> > When FSP switching stack and calling bootloader functions, the
> > function parameter in stack may not be accessible easily.
> > We can store the function parameter pointer to FspGlobalData and
> > retrieve it after stack switched.
> >
> > Also need to add Loader2PeiSwitchStack () to header file as public
> > function for platform FSP code to consume.
> >
> > Cc: Maurice Ma 
> > Cc: Nate DeSimone 
> > Cc: Star Zeng 
> > Signed-off-by: Chasel Chiu 
> > ---
> >  IntelFsp2Pkg/Include/FspGlobalData.h | 12 ++--
> >  IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h | 18
> > +-
> >  2 files changed, 27 insertions(+), 3 deletions(-)
> >
> > diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
> > b/IntelFsp2Pkg/Include/FspGlobalData.h
> > index 5bde316893..dba9b48e1a 100644
> > --- a/IntelFsp2Pkg/Include/FspGlobalData.h
> > +++ b/IntelFsp2Pkg/Include/FspGlobalData.h
> > @@ -52,12 +52,20 @@ typedef struct  {
> > VOID   *MemoryInitUpdPtr;
> > VOID   *SiliconInitUpdPtr;
> > UINT8  ApiIdx;
> > -   UINT8  FspMode; // 0: FSP in API mode; 1: FSP in
> DISPATCH mode
> > +   ///
> > +   /// 0: FSP in API mode; 1: FSP in DISPATCH mode
> > +   ///
> > +   UINT8  FspMode;
> > UINT8  OnSeparateStack;
> > UINT8  Reserved3;
> > UINT32 NumberOfPhases;
> > UINT32 PhasesExecuted;
> > -   UINT8  Reserved4[20];
> > +   ///
> > +   /// To store function parameters pointer
> > +   /// so it can be retrieved after stack switched.
> > +   ///
> > +   VOID   *FunctionParameterPtr;
> > +   UINT8  Reserved4[16];
> > UINT32 PerfSig;
> > UINT16 PerfLen;
> > UINT16 Reserved5;
> > diff --git a/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > b/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > index 0c76e9f022..bed2a5d677 100644
> > --- a/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > +++ b/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h
> > @@ -1,6 +1,6 @@
> >  /** @file
> >
> > -  Copyright (c) 2014, Intel Corporation. All rights reserved.
> > +  Copyright (c) 2014 - 2020, Intel Corporation. All rights
> > + reserved.
> >SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >  **/
> > @@ -36,4 +36,20 @@ Pei2LoaderSwitchStack (
> >VOID
> >);
> >
> > +/**
> > +
> > +  This function is equilivant to Pei2LoaderSwitchStack () but just
> > + indicates  the stack after switched is FSP stack.
> > +
> > +  @return ReturnKey  After switching to the saved stack,
> > + this value will be saved in eax before
> returning.
> > +
> > +
> > +**/
> > +UINT32
> > +EFIAPI
> > +Loader2PeiSwitchStack (
> > +  VOID
> > +  );
> > +
> >  #endif
> > --
> > 2.13.3.windows.1


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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Support Multi-Phase silicon initialization.

[Zeng, Star]

Reviewed-by: Star Zeng 

> -Original Message-
> From: Desimone, Nathaniel L 
> Sent: Friday, May 1, 2020 5:59 AM
> To: devel@edk2.groups.io; Chiu, Chasel 
> Cc: Ma, Maurice ; Zeng, Star 
> Subject: RE: [edk2-devel] [PATCH] IntelFsp2Pkg: Support Multi-Phase silicon
> initialization.
> 
> Reviewed-by: Nate DeSimone 
> 
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Chiu,
> Chasel
> Sent: Wednesday, April 29, 2020 6:38 PM
> To: devel@edk2.groups.io
> Cc: Ma, Maurice ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Support Multi-Phase silicon
> initialization.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2698
> 
> To enhance FSP silicon initialization flexibility an optional Multi-Phase API 
> is
> introduced and FSP header needs update for new API offset.
> 
> Cc: Maurice Ma 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Chasel Chiu 
> ---
>  IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 10 --
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
> b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
> index 16f43a1273..3474bac1de 100644
> --- a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
> +++ b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
> @@ -1,8 +1,8 @@
>  /** @file
>Intel FSP Header File definition from Intel Firmware Support Package
> External
> -  Architecture Specification v2.0.
> +  Architecture Specification v2.0 and above.
> 
> -  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
> +  Copyright (c) 2014 - 2020, Intel Corporation. All rights
> + reserved.
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -110,6 +110,12 @@ typedef struct {
>/// Byte 0x44: The offset for the API to initialize the CPU and chipset.
>///
>UINT32  FspSiliconInitEntryOffset;
> +  ///
> +  /// Byte 0x48: Offset for the API for the optional Multi-Phase processor
> and chipset initialization.
> +  ///This value is only valid if FSP HeaderRevision is >= 5.
> +  ///If the value is set to 0x, then this API is not
> available in this component.
> +  ///
> +  UINT32  FspMultiPhaseSiInitEntryOffset;
>  } FSP_INFO_HEADER;
> 
>  ///
> --
> 2.13.3.windows.1
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH v3] UefiCpuPkg/PiSmmCpuDxeSmm: Improve the performance of GetFreeToken()

[Zeng, Star]

Reviewed-by: Star Zeng 

> -Original Message-
> From: Dong, Eric 
> Sent: Friday, April 10, 2020 11:00 AM
> To: Ray Ni ; devel@edk2.groups.io
> Cc: Ni, Ray ; Zeng, Star 
> Subject: RE: [PATCH v3] UefiCpuPkg/PiSmmCpuDxeSmm: Improve the
> performance of GetFreeToken()
> 
> Reviewed-by: Eric Dong 
> 
> > -Original Message-
> > From: Ray Ni [mailto:niru...@users.noreply.github.com]
> > Sent: Friday, April 10, 2020 10:51 AM
> > To: devel@edk2.groups.io
> > Cc: Ni, Ray ; Dong, Eric ;
> > Zeng, Star 
> > Subject: [PATCH v3] UefiCpuPkg/PiSmmCpuDxeSmm: Improve the
> performance
> > of GetFreeToken()
> >
> > Today's GetFreeToken() runs at the algorithm complexity of O(n) where
> > n is the size of the token list.
> >
> > The change introduces a new global variable FirstFreeToken and it
> > always points to the first free token. So the algorithm complexity of
> > GetFreeToken() decreases from O(n) to O(1).
> >
> > The improvement matters when some SMI code uses StartupThisAP()
> > service for each of the AP such that the algorithm complexity becomes
> > O(n)
> > * O(m) where m is the AP count.
> >
> > As next steps,
> > 1. PROCEDURE_TOKEN.Used field can be optimized out because all tokens
> > before FirstFreeToken should have "Used" set while all after
> > FirstFreeToken should have "Used" cleared.
> > 2. ResetTokens() can be optimized to only reset tokens before
> > FirstFreeToken.
> >
> > v2: add missing line in InitializeDataForMmMp.
> > v3: update copyright year to 2020.
> >
> > Signed-off-by: Ray Ni 
> > Cc: Eric Dong 
> > Cc: Star Zeng 
> > ---
> >  UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  | 71
> --
> >  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h |  3 +-
> >  2 files changed, 27 insertions(+), 47 deletions(-)
> >
> > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > index c285a70ebb..93cac5e4fa 100644
> > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > @@ -453,6 +453,11 @@ ResetTokens (
> >
> >  Link = GetNextNode (>TokenList, Link);
> >}
> > +
> > +  //
> > +  // Reset the FirstFreeToken to the beginning of token list upon exiting
> SMI.
> > +  //
> > +  gSmmCpuPrivate->FirstFreeToken = GetFirstNode
> > + (>TokenList);
> >  }
> >
> >  /**
> > @@ -1060,23 +1065,21 @@ IsTokenInUse (
> >  /**
> >Allocate buffer for the SPIN_LOCK and PROCEDURE_TOKEN.
> >
> > +  @return First token of the token buffer.
> >  **/
> > -VOID
> > +LIST_ENTRY *
> >  AllocateTokenBuffer (
> >VOID
> >)
> >  {
> >UINTN   SpinLockSize;
> >UINT32  TokenCountPerChunk;
> > -  UINTN   ProcTokenSize;
> >UINTN   Index;
> > -  PROCEDURE_TOKEN *ProcToken;
> >SPIN_LOCK   *SpinLock;
> >UINT8   *SpinLockBuffer;
> > -  UINT8   *ProcTokenBuffer;
> > +  PROCEDURE_TOKEN *ProcTokens;
> >
> >SpinLockSize = GetSpinLockProperties ();
> > -  ProcTokenSize = sizeof (PROCEDURE_TOKEN);
> >
> >TokenCountPerChunk = FixedPcdGet32
> > (PcdCpuSmmMpTokenCountPerChunk);
> >ASSERT (TokenCountPerChunk != 0);
> > @@ -1092,49 +1095,22 @@ AllocateTokenBuffer (
> >SpinLockBuffer = AllocatePool (SpinLockSize * TokenCountPerChunk);
> >ASSERT (SpinLockBuffer != NULL);
> >
> > -  ProcTokenBuffer = AllocatePool (ProcTokenSize *
> > TokenCountPerChunk);
> > -  ASSERT (ProcTokenBuffer != NULL);
> > +  ProcTokens = AllocatePool (sizeof (PROCEDURE_TOKEN) *
> > + TokenCountPerChunk);  ASSERT (ProcTokens != NULL);
> >
> >for (Index = 0; Index < TokenCountPerChunk; Index++) {
> >  SpinLock = (SPIN_LOCK *)(SpinLockBuffer + SpinLockSize * Index);
> >  InitializeSpinLock (SpinLock);
> >
> > -ProcToken = (PROCEDURE_TOKEN *)(ProcTokenBuffer +
> ProcTokenSize *
> > Index);
> > -ProcToken->Signature = PROCEDURE_TOKEN_SIGNATURE;
> > -ProcToken->SpinLock = SpinLock;
> > -ProcToken->Used = FALSE;
> > -ProcToken->RunningApCount = 0;
> > +ProcTokens[Index].Signature  =
> PROCEDURE_TOKEN_SIGNATURE;
> > +ProcTokens[Index].SpinLock   = SpinLock;
> > +ProcTokens[Index].Used   = FALSE;
> > +ProcTokens[Index].RunningApCount = 0;
> 

Re: [edk2-devel] [PATCH v2] UefiCpuPkg/PiSmmCpuDxeSmm: Improve the performance of GetFreeToken()

[Zeng, Star]

Your time is super fast. 

> -Original Message-
> From: Ni, Ray 
> Sent: Friday, April 10, 2020 10:50 AM
> To: Dong, Eric ; Ray Ni
> ; devel@edk2.groups.io
> Cc: Zeng, Star 
> Subject: RE: [PATCH v2] UefiCpuPkg/PiSmmCpuDxeSmm: Improve the
> performance of GetFreeToken()
> 
> My bad. I thought it is 2021 now. let me send v3.
> 
> > -Original Message-
> > From: Dong, Eric 
> > Sent: Friday, April 10, 2020 10:26 AM
> > To: Ray Ni ; devel@edk2.groups.io
> > Cc: Ni, Ray ; Zeng, Star 
> > Subject: RE: [PATCH v2] UefiCpuPkg/PiSmmCpuDxeSmm: Improve the
> > performance of GetFreeToken()
> >
> > Hi Ray,
> >
> > It still has copyright year issue. Should 2020, not 2021.
> >
> > Thanks,
> > Eric
> > -Original Message-
> > From: Ray Ni 
> > Sent: Friday, April 10, 2020 10:07 AM
> > To: devel@edk2.groups.io
> > Cc: Ni, Ray ; Dong, Eric ;
> > Zeng, Star 
> > Subject: [PATCH v2] UefiCpuPkg/PiSmmCpuDxeSmm: Improve the
> performance
> > of GetFreeToken()
> >
> > Today's GetFreeToken() runs at the algorithm complexity of O(n) where n is
> the size of the token list.
> >
> > The change introduces a new global variable FirstFreeToken and it
> > always points to the first free token. So the algorithm complexity of
> GetFreeToken() decreases from O(n) to O(1).
> >
> > The improvement matters when some SMI code uses StartupThisAP()
> > service for each of the AP such that the algorithm complexity becomes O(n)
> * O(m) where m is the AP count.
> >
> > As next steps,
> > 1. PROCEDURE_TOKEN.Used field can be optimized out because all tokens
> > before FirstFreeToken should have "Used" set while all after
> FirstFreeToken should have "Used" cleared.
> > 2. ResetTokens() can be optimized to only reset tokens before
> FirstFreeToken.
> >
> > Signed-off-by: Ray Ni 
> > Cc: Eric Dong 
> > Cc: Star Zeng 
> > ---
> >  UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c  | 73
> --
> >  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h |  3 +-
> >  2 files changed, 28 insertions(+), 48 deletions(-)
> >
> > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > index c285a70ebb..b3f6c9e6a6 100644
> > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
> > @@ -1,7 +1,7 @@
> >  /** @file
> >  SMM MP service implementation
> >
> > -Copyright (c) 2009 - 2020, Intel Corporation. All rights
> > reserved.
> > +Copyright (c) 2009 - 2021, Intel Corporation. All rights
> > +reserved.
> >  Copyright (c) 2017, AMD Incorporated. All rights reserved.
> >
> >  SPDX-License-Identifier: BSD-2-Clause-Patent @@ -453,6 +453,11 @@
> > ResetTokens (
> >
> >  Link = GetNextNode (>TokenList, Link);
> >}
> > +
> > +  //
> > +  // Reset the FirstFreeToken to the beginning of token list upon exiting
> SMI.
> > +  //
> > +  gSmmCpuPrivate->FirstFreeToken = GetFirstNode
> > + (>TokenList);
> >  }
> >
> >  /**
> > @@ -1060,23 +1065,21 @@ IsTokenInUse (
> >  /**
> >Allocate buffer for the SPIN_LOCK and PROCEDURE_TOKEN.
> >
> > +  @return First token of the token buffer.
> >  **/
> > -VOID
> > +LIST_ENTRY *
> >  AllocateTokenBuffer (
> >VOID
> >)
> >  {
> >UINTN   SpinLockSize;
> >UINT32  TokenCountPerChunk;
> > -  UINTN   ProcTokenSize;
> >UINTN   Index;
> > -  PROCEDURE_TOKEN *ProcToken;
> >SPIN_LOCK   *SpinLock;
> >UINT8   *SpinLockBuffer;
> > -  UINT8   *ProcTokenBuffer;
> > +  PROCEDURE_TOKEN *ProcTokens;
> >
> >SpinLockSize = GetSpinLockProperties ();
> > -  ProcTokenSize = sizeof (PROCEDURE_TOKEN);
> >
> >TokenCountPerChunk = FixedPcdGet32
> (PcdCpuSmmMpTokenCountPerChunk);
> >ASSERT (TokenCountPerChunk != 0);
> > @@ -1092,49 +1095,22 @@ AllocateTokenBuffer (
> >SpinLockBuffer = AllocatePool (SpinLockSize * TokenCountPerChunk);
> >ASSERT (SpinLockBuffer != NULL);
> >
> > -  ProcTokenBuffer = AllocatePool (ProcTokenSize *
> > TokenCountPerChunk);
> > -  ASSERT (ProcTokenBuffer != NULL);
> > +  ProcTokens = AllocatePool (sizeof (PROCEDURE_TOKEN) *
> > + TokenCountPerChunk);  ASSERT (ProcTokens != NULL);
> >
> >for (Index = 0; Index < TokenCountPerChunk; Index++) {
&g

Re: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

[Zeng, Star]

> -Original Message-
> From: Wu, Hao A
> Sent: Tuesday, March 24, 2020 3:12 PM
> To: Zeng, Star ; devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Laszlo
> Ersek ; Kinney, Michael D
> ; Brian J . Johnson 
> Subject: RE: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to
> control AP status check interval
> 
> > -Original Message-
> > From: Zeng, Star
> > Sent: Tuesday, March 24, 2020 3:02 PM
> > To: devel@edk2.groups.io; Wu, Hao A
> > Cc: Dong, Eric; Ni, Ray; Laszlo Ersek; Kinney, Michael D; Brian J .
> > Johnson; Zeng, Star
> > Subject: RE: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD
> > to control AP status check interval
> >
> > The code logic is good to me.
> > Only minor concern, do we really need the PCD to be UINT64 type? :)
> 
> 
> Hi Star,
> 
> I am thinking the UINT64 type fits with the parameter for the SetTimer()
> service in EFI_BOOT_SERVICES when preparing the patch.
> 
> If there is concern, I can switch it to other type.

Got your good point.
For me, UINT32 (h = 4294967295d = 4294967.295 second = 71582.78825 
minutes ~= 1193.04647083 hours) should be totally enough.
I do not insist on that if others think UINT64 is ok.

Thanks,
Star

> 
> Best Regards,
> Hao Wu
> 
> 
> >
> > Thanks,
> > Star
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf
> > > Of Wu, Hao A
> > > Sent: Tuesday, March 24, 2020 2:33 PM
> > > To: devel@edk2.groups.io
> > > Cc: Wu, Hao A ; Dong, Eric
> > > ; Ni, Ray ; Laszlo Ersek
> > > ; Kinney, Michael D ;
> Zeng, Star ; Brian J .
> > > Johnson 
> > > Subject: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD
> > > to control AP status check interval
> > >
> > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2627
> > >
> > > The commit will introduce a static PCD to specify the periodic
> > > interval for checking the AP status when MP services StartupAllAPs()
> > > and
> > > StartupThisAP() are being executed in a non-blocking manner. Or in
> > > other words, specifies the interval for callback function 
> > > CheckApsStatus().
> > >
> > > The purpose is to provide the platform owners with the ability to
> > > choose the proper interval value to trigger CheckApsStatus() according to:
> > > A) The number of processors in the system;
> > > B) How MP services (StartupAllAPs & StartupThisAP) being used.
> > >
> > > Setting the PCD to a small value means the AP status check callback
> > > will be trigerred more frequently, it can benefit the performance
> > > for the case when the BSP uses WaitForEvent() or uses CheckEvent()
> > > in a loop to wait for AP(s) to complete the task, especially when
> > > the task can be finished considerably fast on AP(s).
> > >
> > > An example is within function CpuFeaturesInitialize() under
> > > UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.
> > > c, where BSP will perform the same task with APs and requires all
> > > the processors to finish the task before BSP proceeds to its next
> > > task.
> > >
> > > Setting the PCD to a big value, on the other hand, can reduce the
> > > impact on BSP by the time being consumed in CheckApsStatus(),
> > > especially when the number of processors is huge so that the time
> > > consumed in CheckApsStatus() is not negligible.
> > >
> > > For least impact, the default value of the new PCD will be the same
> > > with the current interval value, which is 100 milliseconds.
> > >
> > > Unitest done:
> > > OS boot successfully.
> > >
> > > Cc: Eric Dong 
> > > Cc: Ray Ni 
> > > Cc: Laszlo Ersek 
> > > Cc: Michael D Kinney 
> > > Cc: Star Zeng 
> > > Cc: Brian J. Johnson 
> > > Signed-off-by: Hao A Wu 
> > > ---
> > >  UefiCpuPkg/UefiCpuPkg.dec | 6 ++
> > >  UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 2 +-
> > >  UefiCpuPkg/Library/MpInitLib/DxeMpLib.c   | 3 +--
> > >  UefiCpuPkg/UefiCpuPkg.uni | 5 -
> > >  4 files changed, 12 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
> > > index
> > > e91dc68cbe..06a3d52060 100644
> > > --- a/UefiCpuPkg/UefiCpuPkg.dec
> > > +++

Re: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

[Zeng, Star]

The code logic is good to me.
Only minor concern, do we really need the PCD to be UINT64 type? :)

Thanks,
Star

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Wu, Hao A
> Sent: Tuesday, March 24, 2020 2:33 PM
> To: devel@edk2.groups.io
> Cc: Wu, Hao A ; Dong, Eric ; Ni,
> Ray ; Laszlo Ersek ; Kinney, Michael
> D ; Zeng, Star ; Brian J .
> Johnson 
> Subject: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to
> control AP status check interval
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2627
> 
> The commit will introduce a static PCD to specify the periodic interval for
> checking the AP status when MP services StartupAllAPs() and
> StartupThisAP() are being executed in a non-blocking manner. Or in other
> words, specifies the interval for callback function CheckApsStatus().
> 
> The purpose is to provide the platform owners with the ability to choose the
> proper interval value to trigger CheckApsStatus() according to:
> A) The number of processors in the system;
> B) How MP services (StartupAllAPs & StartupThisAP) being used.
> 
> Setting the PCD to a small value means the AP status check callback will be
> trigerred more frequently, it can benefit the performance for the case when
> the BSP uses WaitForEvent() or uses CheckEvent() in a loop to wait for AP(s)
> to complete the task, especially when the task can be finished considerably
> fast on AP(s).
> 
> An example is within function CpuFeaturesInitialize() under
> UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c,
> where BSP will perform the same task with APs and requires all the
> processors to finish the task before BSP proceeds to its next task.
> 
> Setting the PCD to a big value, on the other hand, can reduce the impact on
> BSP by the time being consumed in CheckApsStatus(), especially when the
> number of processors is huge so that the time consumed in CheckApsStatus()
> is not negligible.
> 
> For least impact, the default value of the new PCD will be the same with the
> current interval value, which is 100 milliseconds.
> 
> Unitest done:
> OS boot successfully.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Cc: Michael D Kinney 
> Cc: Star Zeng 
> Cc: Brian J. Johnson 
> Signed-off-by: Hao A Wu 
> ---
>  UefiCpuPkg/UefiCpuPkg.dec | 6 ++
>  UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 2 +-
>  UefiCpuPkg/Library/MpInitLib/DxeMpLib.c   | 3 +--
>  UefiCpuPkg/UefiCpuPkg.uni | 5 -
>  4 files changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index
> e91dc68cbe..06a3d52060 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dec
> +++ b/UefiCpuPkg/UefiCpuPkg.dec
> @@ -230,6 +230,12 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
># @Prompt This PCD is the nominal frequency of the core crystal clock in Hz
> as is CPUID Leaf 0x15:ECX
> 
> gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|2400|
> UINT64|0x32132113
> 
> +  ## Specifies the periodic interval value in milliseconds for the
> + status check  #  of APs for StartupAllAPs() and StartupThisAP()
> + executed in non-blocking  #  mode in DXE phase.
> +  # @Prompt Periodic interval value in milliseconds for AP status check in
> DXE.
> +
> +
> gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckInterval|100|UINT64|0x
> 000
> + 0001E
> +
>  [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
>## Specifies max supported number of Logical Processors.
># @Prompt Configure max supported number of Logical Processors diff --git
> a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> index 45aaa179ff..05e004dc3c 100644
> --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> @@ -69,5 +69,5 @@ [Pcd]
>gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ##
> CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode   ##
> CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ##
> SOMETIMES_CONSUMES
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckInterval##
> CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ##
> CONSUMES
> -
> diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
> b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
> index a987c32109..683547dc99 100644
> --- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
> @@ -15,7 +15,6 @@
> 
>  #include 
> 
> -#define  AP_CHECK_INTERVA

Re: [edk2-devel] [PATCH V2] UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier

[Zeng, Star]

Hi Liming,

This is a minor change and has been reviewed by Laszlo and Eric.
It will be better if it can be caught by 202002 stable tag.
You or Eric may help submit it.


Thanks,
Star
> -Original Message-
> From: Dong, Eric 
> Sent: Wednesday, February 5, 2020 10:43 AM
> To: devel@edk2.groups.io; Zeng, Star 
> Cc: Ni, Ray ; Laszlo Ersek 
> Subject: RE: [edk2-devel] [PATCH V2] UefiCpuPkg RegisterCpuFeaturesLib:
> Match data type and format specifier
> 
> Reviewed-by: Eric Dong 
> 
> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Zeng,
> Star
> Sent: Tuesday, February 4, 2020 3:02 PM
> To: devel@edk2.groups.io
> Cc: Zeng, Star ; Dong, Eric ; Ni,
> Ray ; Laszlo Ersek 
> Subject: [edk2-devel] [PATCH V2] UefiCpuPkg RegisterCpuFeaturesLib:
> Match data type and format specifier
> 
> Match data type and format specifier for printing.
> 1. Type cast ProcessorNumber and FeatureIndex to UINT32
>   as %d only expects a UINT32.
> 2. Use %08x instead of %08lx for CacheControl to print Index
>   as it is UINT32 type.
> 3. Use %016lx instead of %08lx for MemoryMapped to print
>   (Index | LShiftU64 (HighIndex, 32)) as it is UINT64 type.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Signed-off-by: Star Zeng 
> ---
>  .../CpuFeaturesInitialize.c   | 24 +--
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git
> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> index 0a4fcff033a3..fc96fb4372cf 100644
> --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> @@ -430,8 +430,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, MSR  : %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -442,8 +442,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, CR   : %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -453,9 +453,9 @@ DumpRegisterTableOnProcessor (
>  case MemoryMapped:
>DEBUG ((
>  DebugPrintErrorLevel,
> -"Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +"Processor: %04d: Index %04d, MMIO : %016lx, Bit Start: %02d,
> Bit Length: %02d, Value: %016lx\r\n",
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index | LShiftU64
> (RegisterTableEntry->HighIndex, 32),
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -465,9 +465,9 @@ DumpRegisterTableOnProcessor (
>  case CacheControl:
>DEBUG ((
>  DebugPrintErrorLevel,
> -"Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +"Processor: %04d: Index %04d, CACHE: %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -478,8 +478,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, SEMAP: %s\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value,
> InvalidDepType)]
>  ));
>break;
> --
> 2.21.0.windows.1
> 
> 
> 


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Re: [edk2-devel] [PATCH 0/2] IntelFsp2Pkg: Coverity scan flags issues

[Zeng, Star]

Reviewed-by: Star Zeng 

> -Original Message-
> From: Chiu, Chasel 
> Sent: Monday, February 10, 2020 11:53 AM
> To: devel@edk2.groups.io
> Cc: Ma, Maurice ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [PATCH 0/2] IntelFsp2Pkg: Coverity scan flags issues
> 
> GenCfgOpt.py:
> Issue was: invalid_operation: Invalid operation on null-like value "Base".
> Fixed it by initializing Base to 0 before entering while loop.
> 
> SplitFspBin.py:
> Issues were:
> 1. copy_paste_error: PeOptHdr vs PePlusOptHdr.
> 2. invalid_operation: Invalid operation on null-like value "roffset".
> 3. invalid_operation: Invalid operation on null-like value "rsize".
> Fixed them by initializing roffset and rsize as PE32 image type and overriding
> them when PE32+ header found.
> 
> Cc: Maurice Ma 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Chasel Chiu 
> 
> Chasel Chiu (2):
>   IntelFsp2Pkg/GenCfgOpt.py: Coverity scan flags issues.
>   IntelFsp2Pkg/SplitFspBin.py: Coverity scan flags issues.
> 
>  IntelFsp2Pkg/Tools/GenCfgOpt.py   |  3 ++-
>  IntelFsp2Pkg/Tools/SplitFspBin.py | 10 +-
>  2 files changed, 7 insertions(+), 6 deletions(-)
> 
> --
> 2.13.3.windows.1


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Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Use %08x to print CacheControl Index

[Zeng, Star]

> -Original Message-
> From: Laszlo Ersek 
> Sent: Monday, February 3, 2020 9:23 PM
> To: Zeng, Star ; devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray 
> Subject: Re: [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Use %08x to print
> CacheControl Index
> 
> On 02/03/20 10:09, Zeng, Star wrote:
> >> -Original Message-
> >> From: Laszlo Ersek 
> >> Sent: Monday, February 3, 2020 4:47 PM
> >> To: Zeng, Star ; devel@edk2.groups.io
> >> Cc: Dong, Eric ; Ni, Ray 
> >> Subject: Re: [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Use %08x to
> >> print CacheControl Index
> >>
> >> Hello Star,
> >>
> >> On 02/03/20 08:06, Star Zeng wrote:
> >>> Instead of %08lx, use %08x to print CacheControl Index as it is
> >>> UINT32 type.
> >>>
> >>> Cc: Eric Dong 
> >>> Cc: Ray Ni 
> >>> Cc: Laszlo Ersek 
> >>> Signed-off-by: Star Zeng 
> >>> ---
> >>>  .../Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c  | 2
> +-
> >>>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git
> >>> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> >>> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> >>> index 0a4fcff033a3..1a02809b0e7c 100644
> >>> ---
> >>> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> >>> +++
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.
> >>> +++ c
> >>> @@ -465,7 +465,7 @@ DumpRegisterTableOnProcessor (
> >>>  case CacheControl:
> >>>DEBUG ((
> >>>  DebugPrintErrorLevel,
> >>> -"Processor: %04d: Index %04d, CACHE: %08lx, Bit
> Start: %02d,
> >> Bit Length: %02d, Value: %016lx\r\n",
> >>> +"Processor: %04d: Index %04d, CACHE: %08x, Bit
> Start: %02d,
> >>> + Bit Length: %02d, Value: %016lx\r\n",
> >>>  ProcessorNumber,
> >>>  FeatureIndex,
> >>>  RegisterTableEntry->Index,
> >>>
> >>
> >> if you are already touching this DEBUG invocation, can you please fix
> >> the rest of the issues with the format string?
> >>
> >> - ProcessorNumber is UINTN. If we know for sure it can be represented
> >> in a UINT32, then it should be cast to UINT32 explicitly, and logged with
> "%04u".
> >> (Otherwise, UINTN needs to be cast to UINT64, and logged with %lu or
> >> %lx.)
> >>
> >> - Ditto for FeatureIndex.
> >
> > %04u or %04d is not enough for UINT32 which needs %08x.
> > I thought the code is just taking assumption about their value should be
> not > u. It is not a real issue.
> 
> I disagree. It's not about the field width / padding (4 vs. 8 characters), but
> the width of the data type. The parameter that's being passed is a UINTN,
> which is UINT64 on X64. But the format specifier (%d, %u, %x all alike) only
> expect a UINT32.
> 
> If we pass a UINT64 (in the form of a UINTN), then we should print it with a
> UINT64 specifier (such as %lu or %lx).
> 
> Alternatively, if we know for sure that the value of the UINT64 in question
> will fit in a UINT32, then we can use %u or %x for printing, but then we need
> to truncate (cast) the data that's being passed in, to UINT32.
> 
> My point is that the data size should be a match between what's passed in
> and what is described with a format specifier. There is no format specifier
> that directly matches UINTN, so you either need to cast UINTN to UINT64
> and use %lx, or cast UINTN to UINT32 and use %x.
> 
> >
> > This patch is to fix a real issue, without it, the print for ValidBitStart,
> ValidBitLength and Value will be wrong because the parameter for them are
> shifted for Index to fetch UINT64 value.
> 
> The patch is not wrong, it's just incomplete (given that we're modifying a
> format string that mismatches the argument list in other places too).
> 
> ProcessorNumber and FeatureIndex are UINTNs, and they are being printed
> with %d. Those are real issues too.
> 
> > I found another real issue is MMIO : %08lx should be MMIO : %016lx as the
> code is on purpose to get UINT64 MMIO address.
> 
> Field width / padding are useful to get right, but getting the data types to
> match is even more important.

Got your point, sent an updated patch at 
https://edk2.groups.io/g/devel/message/53703.

Thanks,
Star

> 
> Thanks
> Laszlo
> 
> > I prefer to just handle the real issue in this patch. How do you
> > think? 
> 


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Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier

[Zeng, Star]

Sorry, the title is incorrect. Please see the thread with title " [PATCH V2] 
UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier"

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Zeng,
> Star
> Sent: Tuesday, February 4, 2020 2:57 PM
> To: devel@edk2.groups.io
> Cc: Zeng, Star ; Dong, Eric ; Ni,
> Ray ; Laszlo Ersek 
> Subject: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Match
> data type and format specifier
> 
> Match data type and format specifier for printing.
> 1. Type cast ProcessorNumber and FeatureIndex to UINT32
>   as %d only expects a UINT32.
> 2. Use %08x instead of %08lx for CacheControl to print Index
>   as it is UINT32 type.
> 3. Use %016lx instead of %08lx for MemoryMapped to print
>   (Index | LShiftU64 (HighIndex, 32)) as it is UINT64 type.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Signed-off-by: Star Zeng 
> ---
> 
> Notes:
> v2: Address Laszlo's feedback in v1 at
> https://edk2.groups.io/g/devel/message/53663.
> 
>  .../CpuFeaturesInitialize.c   | 24 +--
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git
> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> index 0a4fcff033a3..fc96fb4372cf 100644
> --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> @@ -430,8 +430,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, MSR  : %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -442,8 +442,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, CR   : %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -453,9 +453,9 @@ DumpRegisterTableOnProcessor (
>  case MemoryMapped:
>DEBUG ((
>  DebugPrintErrorLevel,
> -"Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +"Processor: %04d: Index %04d, MMIO : %016lx, Bit Start: %02d,
> Bit Length: %02d, Value: %016lx\r\n",
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index | LShiftU64
> (RegisterTableEntry->HighIndex, 32),
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -465,9 +465,9 @@ DumpRegisterTableOnProcessor (
>  case CacheControl:
>DEBUG ((
>  DebugPrintErrorLevel,
> -"Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +"Processor: %04d: Index %04d, CACHE: %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -478,8 +478,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, SEMAP: %s\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value,
> InvalidDepType)]
>  ));
>break;
> --
> 2.21.0.windows.1
> 
> 
> 


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Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier

[Zeng, Star]

Sorry, the title is incorrect. Please see the thread with title " [PATCH V2] 
UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier"

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Zeng,
> Star
> Sent: Tuesday, February 4, 2020 3:00 PM
> To: devel@edk2.groups.io
> Cc: Zeng, Star ; Dong, Eric ; Ni,
> Ray ; Laszlo Ersek 
> Subject: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Match
> data type and format specifier
> 
> Match data type and format specifier for printing.
> 1. Type cast ProcessorNumber and FeatureIndex to UINT32
>   as %d only expects a UINT32.
> 2. Use %08x instead of %08lx for CacheControl to print Index
>   as it is UINT32 type.
> 3. Use %016lx instead of %08lx for MemoryMapped to print
>   (Index | LShiftU64 (HighIndex, 32)) as it is UINT64 type.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Signed-off-by: Star Zeng 
> ---
> 
> Notes:
> v2: Address Laszlo's feedback in v1 at
> https://edk2.groups.io/g/devel/message/53663.
> 
>  .../CpuFeaturesInitialize.c   | 24 +--
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git
> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> index 0a4fcff033a3..fc96fb4372cf 100644
> --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> @@ -430,8 +430,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, MSR  : %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -442,8 +442,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, CR   : %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -453,9 +453,9 @@ DumpRegisterTableOnProcessor (
>  case MemoryMapped:
>DEBUG ((
>  DebugPrintErrorLevel,
> -"Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +"Processor: %04d: Index %04d, MMIO : %016lx, Bit Start: %02d,
> Bit Length: %02d, Value: %016lx\r\n",
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index | LShiftU64
> (RegisterTableEntry->HighIndex, 32),
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -465,9 +465,9 @@ DumpRegisterTableOnProcessor (
>  case CacheControl:
>DEBUG ((
>  DebugPrintErrorLevel,
> -"Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +"Processor: %04d: Index %04d, CACHE: %08x, Bit Start: %02d, Bit
> Length: %02d, Value: %016lx\r\n",
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  RegisterTableEntry->Index,
>  RegisterTableEntry->ValidBitStart,
>  RegisterTableEntry->ValidBitLength,
> @@ -478,8 +478,8 @@ DumpRegisterTableOnProcessor (
>DEBUG ((
>  DebugPrintErrorLevel,
>  "Processor: %04d: Index %04d, SEMAP: %s\r\n",
> -ProcessorNumber,
> -FeatureIndex,
> +(UINT32) ProcessorNumber,
> +(UINT32) FeatureIndex,
>  mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value,
> InvalidDepType)]
>  ));
>break;
> --
> 2.21.0.windows.1
> 
> 
> 


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[edk2-devel] [PATCH V2] UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier

[Zeng, Star]

Match data type and format specifier for printing.
1. Type cast ProcessorNumber and FeatureIndex to UINT32
  as %d only expects a UINT32.
2. Use %08x instead of %08lx for CacheControl to print Index
  as it is UINT32 type.
3. Use %016lx instead of %08lx for MemoryMapped to print
  (Index | LShiftU64 (HighIndex, 32)) as it is UINT64 type.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Star Zeng 
---
 .../CpuFeaturesInitialize.c   | 24 +--
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index 0a4fcff033a3..fc96fb4372cf 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -430,8 +430,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, MSR  : %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -442,8 +442,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, CR   : %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -453,9 +453,9 @@ DumpRegisterTableOnProcessor (
 case MemoryMapped:
   DEBUG ((
 DebugPrintErrorLevel,
-"Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+"Processor: %04d: Index %04d, MMIO : %016lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 
32),
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -465,9 +465,9 @@ DumpRegisterTableOnProcessor (
 case CacheControl:
   DEBUG ((
 DebugPrintErrorLevel,
-"Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+"Processor: %04d: Index %04d, CACHE: %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -478,8 +478,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, SEMAP: %s\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value, InvalidDepType)]
 ));
   break;
-- 
2.21.0.windows.1


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[edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier

[Zeng, Star]

Match data type and format specifier for printing.
1. Type cast ProcessorNumber and FeatureIndex to UINT32
  as %d only expects a UINT32.
2. Use %08x instead of %08lx for CacheControl to print Index
  as it is UINT32 type.
3. Use %016lx instead of %08lx for MemoryMapped to print
  (Index | LShiftU64 (HighIndex, 32)) as it is UINT64 type.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Star Zeng 
---

Notes:
v2: Address Laszlo's feedback in v1 at 
https://edk2.groups.io/g/devel/message/53663.

 .../CpuFeaturesInitialize.c   | 24 +--
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index 0a4fcff033a3..fc96fb4372cf 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -430,8 +430,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, MSR  : %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -442,8 +442,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, CR   : %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -453,9 +453,9 @@ DumpRegisterTableOnProcessor (
 case MemoryMapped:
   DEBUG ((
 DebugPrintErrorLevel,
-"Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+"Processor: %04d: Index %04d, MMIO : %016lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 
32),
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -465,9 +465,9 @@ DumpRegisterTableOnProcessor (
 case CacheControl:
   DEBUG ((
 DebugPrintErrorLevel,
-"Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+"Processor: %04d: Index %04d, CACHE: %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -478,8 +478,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, SEMAP: %s\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value, InvalidDepType)]
 ));
   break;
-- 
2.21.0.windows.1


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[edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Match data type and format specifier

[Zeng, Star]

Match data type and format specifier for printing.
1. Type cast ProcessorNumber and FeatureIndex to UINT32
  as %d only expects a UINT32.
2. Use %08x instead of %08lx for CacheControl to print Index
  as it is UINT32 type.
3. Use %016lx instead of %08lx for MemoryMapped to print
  (Index | LShiftU64 (HighIndex, 32)) as it is UINT64 type.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Star Zeng 
---

Notes:
v2: Address Laszlo's feedback in v1 at 
https://edk2.groups.io/g/devel/message/53663.

 .../CpuFeaturesInitialize.c   | 24 +--
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index 0a4fcff033a3..fc96fb4372cf 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -430,8 +430,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, MSR  : %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -442,8 +442,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, CR   : %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -453,9 +453,9 @@ DumpRegisterTableOnProcessor (
 case MemoryMapped:
   DEBUG ((
 DebugPrintErrorLevel,
-"Processor: %04d: Index %04d, MMIO : %08lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+"Processor: %04d: Index %04d, MMIO : %016lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 
32),
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -465,9 +465,9 @@ DumpRegisterTableOnProcessor (
 case CacheControl:
   DEBUG ((
 DebugPrintErrorLevel,
-"Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
-ProcessorNumber,
-FeatureIndex,
+"Processor: %04d: Index %04d, CACHE: %08x, Bit Start: %02d, Bit 
Length: %02d, Value: %016lx\r\n",
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 RegisterTableEntry->Index,
 RegisterTableEntry->ValidBitStart,
 RegisterTableEntry->ValidBitLength,
@@ -478,8 +478,8 @@ DumpRegisterTableOnProcessor (
   DEBUG ((
 DebugPrintErrorLevel,
 "Processor: %04d: Index %04d, SEMAP: %s\r\n",
-ProcessorNumber,
-FeatureIndex,
+(UINT32) ProcessorNumber,
+(UINT32) FeatureIndex,
 mDependTypeStr[MIN ((UINT32)RegisterTableEntry->Value, InvalidDepType)]
 ));
   break;
-- 
2.21.0.windows.1


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Re: [edk2-devel] [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Use %08x to print CacheControl Index

[Zeng, Star]

> -Original Message-
> From: Laszlo Ersek 
> Sent: Monday, February 3, 2020 4:47 PM
> To: Zeng, Star ; devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray 
> Subject: Re: [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Use %08x to print
> CacheControl Index
> 
> Hello Star,
> 
> On 02/03/20 08:06, Star Zeng wrote:
> > Instead of %08lx, use %08x to print CacheControl Index as it is UINT32
> > type.
> >
> > Cc: Eric Dong 
> > Cc: Ray Ni 
> > Cc: Laszlo Ersek 
> > Signed-off-by: Star Zeng 
> > ---
> >  .../Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c  | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > index 0a4fcff033a3..1a02809b0e7c 100644
> > ---
> > a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> > +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.
> > +++ c
> > @@ -465,7 +465,7 @@ DumpRegisterTableOnProcessor (
> >  case CacheControl:
> >DEBUG ((
> >  DebugPrintErrorLevel,
> > -"Processor: %04d: Index %04d, CACHE: %08lx, Bit Start: %02d,
> Bit Length: %02d, Value: %016lx\r\n",
> > +"Processor: %04d: Index %04d, CACHE: %08x, Bit Start: %02d,
> > + Bit Length: %02d, Value: %016lx\r\n",
> >  ProcessorNumber,
> >  FeatureIndex,
> >  RegisterTableEntry->Index,
> >
> 
> if you are already touching this DEBUG invocation, can you please fix the
> rest of the issues with the format string?
> 
> - ProcessorNumber is UINTN. If we know for sure it can be represented in a
> UINT32, then it should be cast to UINT32 explicitly, and logged with "%04u".
> (Otherwise, UINTN needs to be cast to UINT64, and logged with %lu or %lx.)
> 
> - Ditto for FeatureIndex.

%04u or %04d is not enough for UINT32 which needs %08x.
I thought the code is just taking assumption about their value should be not > 
u. It is not a real issue.

This patch is to fix a real issue, without it, the print for ValidBitStart, 
ValidBitLength and Value will be wrong because the parameter for them are 
shifted for Index to fetch UINT64 value.

I found another real issue is MMIO : %08lx should be MMIO : %016lx as the code 
is on purpose to get UINT64 MMIO address.

I prefer to just handle the real issue in this patch. How do you think? 


Thanks,
Star

> 
> The rest of the format specifications (including the now-fixed
> CPU_REGISTER_TABLE_ENTRY.Index) are OK.
> 
> Thanks
> Laszlo


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Re: [edk2-devel] [PATCH v2 3/3] UefiCpuPkg/CpuFeature: Introduce First to indicate 1st unit.

[Zeng, Star]

Got the point.

With the typo fixed, Reviewed-by: Star Zeng 

> -Original Message-
> From: Ni, Ray
> Sent: Thursday, January 2, 2020 11:15 AM
> To: Zeng, Star ; Ray Ni
> ; devel@edk2.groups.io
> Cc: Dong, Eric ; Kinney, Michael D
> 
> Subject: RE: [PATCH v2 3/3] UefiCpuPkg/CpuFeature: Introduce First to indicate
> 1st unit.
> 
> >
> > Need some patches to update individual InitializeFunc() for features.
> > These patches can be a separated patch series.
> >
> Yes.
> 
> > >
> > > The patch adds a new field Fist to indicate the CPU's location in
> >
> > "Firt" should be "First".
> Will fix the typo in next version of patch or pushing.
> 
> > > +  //
> > > +  // Set First.Die/Tile/Module for each thread assuming:
> > > +  //  single Die under each package, single Tile under each Die, single
> > Module
> > > under each Tile
> >
> > This assumption needs to be addressed in this or a separated patch series.
> 
> The assumption will be fixed after the below changes are merged to trunk.
> https://github.com/tianocore/edk2-staging/tree/cpu/6-level
> 
> 
> > > +  for (PackageIndex = 0; PackageIndex < CpuStatus->PackageCount;
> > > PackageIndex++) {
> > > +//
> > > +// Set First.Core for each thread in the first core of each package.
> > > +//
> > > +First = MAX_UINT32;
> > > +for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus;
> > > ProcessorNumber++) {
> > > +  Location = 
> > > >InitOrder[ProcessorNumber].CpuInfo.ProcessorInfo.Location;
> > > +  if (Location->Package == PackageIndex) {
> >
> > Here the code is assuming Location->Package starts from 0 and consecutive.
> 
> CpuStatus->PackageCount is assigned in CpuInitDataInitialize():
> >  CpuStatus->PackageCount= Package + 1;
> >  CpuStatus->MaxCoreCount= Core + 1;
> >  CpuStatus->MaxThreadCount  = Thread + 1;
> So PackageCount actually is the value of max package ID + 1.
> With that, the code change isn't assuming Location->Package starts from 0 and
> consecutive.
> 
> >
> > Here the code is assuming Location->Package and Location->Core start from
> > 0 and consecutive.
> > We could not have this assumption, this patch is to resolve this assumption.
> Similarly, The code change above isn't assuming Location->Core starts from 0
> and consecutive.
> 
> >
> >
> > Thanks,
> > Star
> >


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Re: [edk2-devel] [PATCH 5/6] MdeModulePkg/Smbios: Add TCG PFP rev 105 support.

[Zeng, Star]

> -Original Message-
> From: Yao, Jiewen
> Sent: Thursday, January 2, 2020 10:16 PM
> To: Zeng, Star ; devel@edk2.groups.io
> Cc: Wang, Jian J ; Wu, Hao A ;
> Bi, Dandan 
> Subject: RE: [PATCH 5/6] MdeModulePkg/Smbios: Add TCG PFP rev 105
> support.
> 
> Below:
> 
> > -----Original Message-
> > From: Zeng, Star 
> > Sent: Thursday, January 2, 2020 7:09 PM
> > To: Yao, Jiewen ; devel@edk2.groups.io
> > Cc: Wang, Jian J ; Wu, Hao A
> > ; Bi, Dandan ; Zeng, Star
> > 
> > Subject: RE: [PATCH 5/6] MdeModulePkg/Smbios: Add TCG PFP rev 105
> support.
> >
> > Minor comments.
> >
> > > -Original Message-
> > > From: Yao, Jiewen
> > > Sent: Tuesday, December 31, 2019 2:44 PM
> > > To: devel@edk2.groups.io
> > > Cc: Wang, Jian J ; Wu, Hao A
> > > ; Bi, Dandan ; Zeng, Star
> > > 
> > > Subject: [PATCH 5/6] MdeModulePkg/Smbios: Add TCG PFP rev 105
> support.
> > >
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2439
> > >
> > > Report EV_EFI_HANDOFF_TABLES2 if the platform chooses PFP >= 105.
> > >
> > > Cc: Jian J Wang 
> > > Cc: Hao A Wu 
> > > Cc: Dandan Bi 
> > > Cc: Star Zeng 
> > > Signed-off-by: Jiewen Yao 
> > > ---
> > >  .../SmbiosMeasurementDxe.c| 35 +--
> > >  .../SmbiosMeasurementDxe.inf  |  3 ++
> > >  2 files changed, 35 insertions(+), 3 deletions(-)
> > >
> > > diff --git
> > >
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> > > tDxe.c
> > >
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> > > ntDxe.c
> > > index 5ec2aca095..a5839c09f1 100644
> > > ---
> > >
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> > > tDxe.c
> > > +++
> > >
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> > > ntDxe.c
> > > @@ -108,6 +108,18 @@ SMBIOS_FILTER_STRUCT
> > > mSmbiosFilterStandardTableBlackList[] = {  EFI_SMBIOS_PROTOCOL
> > > *mSmbios;
> > >  UINTN   mMaxLen;
> > >
> > > +#pragma pack (1)
> > > +
> > > +#define SMBIOS_HANDOFF_TABLE_DESC  "SmbiosTable"
> > > +typedef struct {
> > > +  UINT8 TableDescriptionSize;
> > > +  UINT8
> > > TableDescription[sizeof(SMBIOS_HANDOFF_TABLE_DESC)];
> > > +  UINT64NumberOfTables;
> > > +  EFI_CONFIGURATION_TABLE   TableEntry[1];
> > > +} SMBIOS_HANDOFF_TABLE_POINTERS2;
> >
> > Curious about that there is no standard structure defined in public
> > header instead of defining it internal here?
> [Jiewen] Right. The first byte is the size of the following description.
> The table owner may define different description for the table.
> 
> >
> > > +
> > > +#pragma pack ()
> > > +
> > >  /**
> > >
> > >This function dump raw data.
> > > @@ -460,6 +472,10 @@ MeasureSmbiosTable (  {
> > >EFI_STATUSStatus;
> > >EFI_HANDOFF_TABLE_POINTERSHandoffTables;
> > > +  SMBIOS_HANDOFF_TABLE_POINTERS2SmbiosHandoffTables2;
> > > +  UINT32EventType;
> > > +  VOID  *EventLog;
> > > +  UINT32EventLogSize;
> > >SMBIOS_TABLE_ENTRY_POINT  *SmbiosTable;
> > >SMBIOS_TABLE_3_0_ENTRY_POINT  *Smbios3Table;
> > >VOID  *SmbiosTableAddress;
> > > @@ -569,11 +585,24 @@ MeasureSmbiosTable (
> > >CopyGuid (&(HandoffTables.TableEntry[0].VendorGuid),
> > > );
> > >HandoffTables.TableEntry[0].VendorTable = SmbiosTable;
> > >  }
> > > +EventType = EV_EFI_HANDOFF_TABLES;
> > > +EventLog = 
> > > +EventLogSize = sizeof (HandoffTables);
> >
> > How about making them into the else condition in the if condition below?
> [Jiewen] My purpose is that all the rev 105 content are scoped in following 
> if.
> For rev 0, people can just see the above logic.
> It is more straight forward than putting partial of logic into else.
> 
> >
> > > +
> > > +if (PcdGet32(PcdTcgPfpMeasurementRevision) >=
> > > TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM2_REV_105) {
> > > +  SmbiosHandoffTable

Re: [edk2-devel] [PATCH 5/6] MdeModulePkg/Smbios: Add TCG PFP rev 105 support.

[Zeng, Star]

Minor comments.

> -Original Message-
> From: Yao, Jiewen
> Sent: Tuesday, December 31, 2019 2:44 PM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J ; Wu, Hao A ;
> Bi, Dandan ; Zeng, Star 
> Subject: [PATCH 5/6] MdeModulePkg/Smbios: Add TCG PFP rev 105 support.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2439
> 
> Report EV_EFI_HANDOFF_TABLES2 if the platform chooses PFP >= 105.
> 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Cc: Dandan Bi 
> Cc: Star Zeng 
> Signed-off-by: Jiewen Yao 
> ---
>  .../SmbiosMeasurementDxe.c| 35 +--
>  .../SmbiosMeasurementDxe.inf  |  3 ++
>  2 files changed, 35 insertions(+), 3 deletions(-)
> 
> diff --git
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> tDxe.c
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> ntDxe.c
> index 5ec2aca095..a5839c09f1 100644
> ---
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> tDxe.c
> +++
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> ntDxe.c
> @@ -108,6 +108,18 @@ SMBIOS_FILTER_STRUCT
> mSmbiosFilterStandardTableBlackList[] = {  EFI_SMBIOS_PROTOCOL
> *mSmbios;
>  UINTN   mMaxLen;
> 
> +#pragma pack (1)
> +
> +#define SMBIOS_HANDOFF_TABLE_DESC  "SmbiosTable"
> +typedef struct {
> +  UINT8 TableDescriptionSize;
> +  UINT8
> TableDescription[sizeof(SMBIOS_HANDOFF_TABLE_DESC)];
> +  UINT64NumberOfTables;
> +  EFI_CONFIGURATION_TABLE   TableEntry[1];
> +} SMBIOS_HANDOFF_TABLE_POINTERS2;

Curious about that there is no standard structure defined in public header 
instead of defining it internal here?

> +
> +#pragma pack ()
> +
>  /**
> 
>This function dump raw data.
> @@ -460,6 +472,10 @@ MeasureSmbiosTable (  {
>EFI_STATUSStatus;
>EFI_HANDOFF_TABLE_POINTERSHandoffTables;
> +  SMBIOS_HANDOFF_TABLE_POINTERS2SmbiosHandoffTables2;
> +  UINT32EventType;
> +  VOID  *EventLog;
> +  UINT32EventLogSize;
>SMBIOS_TABLE_ENTRY_POINT  *SmbiosTable;
>SMBIOS_TABLE_3_0_ENTRY_POINT  *Smbios3Table;
>VOID  *SmbiosTableAddress;
> @@ -569,11 +585,24 @@ MeasureSmbiosTable (
>CopyGuid (&(HandoffTables.TableEntry[0].VendorGuid),
> );
>HandoffTables.TableEntry[0].VendorTable = SmbiosTable;
>  }
> +EventType = EV_EFI_HANDOFF_TABLES;
> +EventLog = 
> +EventLogSize = sizeof (HandoffTables);

How about making them into the else condition in the if condition below?

> +
> +if (PcdGet32(PcdTcgPfpMeasurementRevision) >=
> TCG_EfiSpecIDEventStruct_SPEC_ERRATA_TPM2_REV_105) {
> +  SmbiosHandoffTables2.TableDescriptionSize =
> sizeof(SmbiosHandoffTables2.TableDescription);
> +  CopyMem (SmbiosHandoffTables2.TableDescription,
> SMBIOS_HANDOFF_TABLE_DESC,
> sizeof(SmbiosHandoffTables2.TableDescription));
> +  SmbiosHandoffTables2.NumberOfTables =
> HandoffTables.NumberOfTables;
> +  CopyMem (&(SmbiosHandoffTables2.TableEntry[0]),
> &(HandoffTables.TableEntry[0]),
> sizeof(SmbiosHandoffTables2.TableEntry[0]));
> +  EventType = EV_EFI_HANDOFF_TABLES2;
> +  EventLog = 
> +  EventLogSize = sizeof (SmbiosHandoffTables2);
> +}
>  Status = TpmMeasureAndLogData (
> 1,   // PCRIndex
> -   EV_EFI_HANDOFF_TABLES,   // EventType
> -   ,  // EventLog
> -   sizeof (HandoffTables),  // LogLen
> +   EventType,   // EventType
> +   EventLog,// EventLog
> +   EventLogSize,// LogLen
> TableAddress,// HashData
> TableLength  // HashDataLen
> );
> diff --git
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> tDxe.inf
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> ntDxe.inf
> index a074044c84..81d3655dc7 100644
> ---
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> tDxe.inf
> +++
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> ntDxe.i
> +++ nf
> @@ -57,6 +57,9 @@
>gEfiSmbiosTableGuid   ## SOMETIMES_CONSUMES ##
> SystemTable
>gEfiSmbios3TableGuid  ## SOMETIMES_CONSUMES ##
> SystemTable
> 
> +[Pcd]
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdTcgPfpMeasurementRevision
> ## CONSUMES

To be explicit, how a

Re: [edk2-devel] [PATCH 3/6] MdeModulePkg/Smbios: Done measure Smbios multiple times.

[Zeng, Star]

Reviewed-by: Star Zeng 

> -Original Message-
> From: Yao, Jiewen
> Sent: Tuesday, December 31, 2019 2:44 PM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J ; Wu, Hao A ;
> Bi, Dandan ; Zeng, Star 
> Subject: [PATCH 3/6] MdeModulePkg/Smbios: Done measure Smbios
> multiple times.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2439
> 
> In current implementation, the SMBIOS table is measured multiple time in
> every readytoboot event.
> 
> This causes Smbios Table record appears multiple time in the TCG event log
> and confuses people.
> 
> This issue makes it hard to implement 800-155 reference measurement.
> 
> This patch closes the event to make sure Smbios is measured only once.
> 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Cc: Dandan Bi 
> Cc: Star Zeng 
> Signed-off-by: Jiewen Yao 
> ---
>  .../Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c | 4 ++-
> -
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> tDxe.c
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> ntDxe.c
> index 7b5d473146..5ec2aca095 100644
> ---
> a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasuremen
> tDxe.c
> +++
> b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasureme
> ntDxe.c
> @@ -577,8 +577,8 @@ MeasureSmbiosTable (
> TableAddress,// HashData
> TableLength  // HashDataLen
> );
> -if (EFI_ERROR (Status)) {
> -  return ;
> +if (!EFI_ERROR (Status)) {
> +  gBS->CloseEvent (Event) ;
>  }
>}
> 
> --
> 2.19.2.windows.1


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Re: [edk2-devel] [PATCH v2 3/3] UefiCpuPkg/CpuFeature: Introduce First to indicate 1st unit.

[Zeng, Star]

Some feedback added.

> -Original Message-
> From: Ray Ni [mailto:niru...@users.noreply.github.com]
> Sent: Tuesday, November 26, 2019 2:16 PM
> To: devel@edk2.groups.io
> Cc: Ni, Ray ; Dong, Eric ; Zeng, Star
> ; Kinney, Michael D 
> Subject: [PATCH v2 3/3] UefiCpuPkg/CpuFeature: Introduce First to indicate
> 1st unit.
> 
> From: Ray Ni 
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1584
> 
> The flow of CPU feature initialization logic is:
> 1. BSP calls GetConfigDataFunc() for each thread/AP;
> 2. Each thread/AP calls SupportFunc() to detect its own capability;
> 3. BSP calls InitializeFunc() for each thread/AP.
> 
> There is a design gap in step #3. For a package scope feature that only
> requires one thread of each package does the initialization operation,
> what InitializeFunc() currently does is to do the initialization
> operation only CPU physical location Core# is 0.
> But in certain platform, Core#0 might be disabled in hardware level
> which results the certain package scope feature isn't initialized at
> all.

Need some patches to update individual InitializeFunc() for features.
These patches can be a separated patch series.

> 
> The patch adds a new field Fist to indicate the CPU's location in

"Firt" should be "First".

> its parent scope.
> First.Package is set for all APs/threads under first package;
> First.Core is set for all APs/threads under first core of each
> package;
> First.Thread is set for the AP/thread of each core.
> 
> Signed-off-by: Ray Ni 
> Cc: Eric Dong 
> Cc: Star Zeng 
> Cc: Michael D Kinney 
> ---
>  .../Include/Library/RegisterCpuFeaturesLib.h  | 36 +
>  .../CpuFeaturesInitialize.c   | 74 +++
>  2 files changed, 110 insertions(+)
> 
> diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
> b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
> index d075606cdb..7114c8ce89 100644
> --- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
> +++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
> @@ -78,6 +78,37 @@
>  #define CPU_FEATURE_END MAX_UINT32
>  /// @}
> 
> +///
> +/// The bit field to indicate whether the processor is the first in its 
> parent
> scope.
> +///
> +typedef struct {
> +  //
> +  // Set to 1 when current processor is the first thread in the core it 
> resides
> in.
> +  //
> +  UINT32 Thread   : 1;
> +  //
> +  // Set to 1 when current processor is a thread of the first core in the
> module it resides in.
> +  //
> +  UINT32 Core : 1;
> +  //
> +  // Set to 1 when current processor is a thread of the first module in the 
> tile
> it resides in.
> +  //
> +  UINT32 Module   : 1;
> +  //
> +  // Set to 1 when current processor is a thread of the first tile in the 
> die it
> resides in.
> +  //
> +  UINT32 Tile : 1;
> +  //
> +  // Set to 1 when current processor is a thread of the first die in the 
> package
> it resides in.
> +  //
> +  UINT32 Die  : 1;
> +  //
> +  // Set to 1 when current processor is a thread of the first package in the
> system.
> +  //
> +  UINT32 Package  : 1;
> +  UINT32 Reserved : 26;
> +} REGISTER_CPU_FEATURE_FIRST_PROCESSOR;
> +
>  ///
>  /// CPU Information passed into the SupportFunc and InitializeFunc of the
>  /// RegisterCpuFeature() library function.  This structure contains
> information
> @@ -88,6 +119,11 @@ typedef struct {
>/// The package that the CPU resides
>///
>EFI_PROCESSOR_INFORMATIONProcessorInfo;
> +
> +  ///
> +  /// The bit flag indicating whether the CPU is the first
> Thread/Core/Module/Tile/Die/Package in its parent scope.
> +  ///
> +  REGISTER_CPU_FEATURE_FIRST_PROCESSOR First;
>///
>/// The Display Family of the CPU computed from CPUID leaf
> CPUID_VERSION_INFO
>///
> diff --git
> a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> index 0a4fcff033..23076fd453 100644
> --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
> @@ -105,6 +105,9 @@ CpuInitDataInitialize (
>EFI_CPU_PHYSICAL_LOCATION*Location;
>BOOLEAN  *CoresVisited;
>UINTNIndex;
> +  UINT32   PackageIndex;
> +  UINT32   CoreIndex;
> +  UINT32   First;
>ACPI_CPU_DATA*AcpiCpuData;
>CPU_STATUS_INFORMATION 

Re: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg/RegisterCpuFeaturesLib: Rename [Before|After]FeatureBitMask

[Zeng, Star]

Minor comment added.

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Ray Ni
> Sent: Tuesday, November 26, 2019 2:16 PM
> To: devel@edk2.groups.io
> Cc: Ni, Ray ; Dong, Eric 
> Subject: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg/RegisterCpuFeaturesLib:
> Rename [Before|After]FeatureBitMask
> 
> From: Ray Ni 
> 
> The patch doesn't have any functionality impact.
> 
> Signed-off-by: Ray Ni 
> Cc: Eric Dong 
> ---
>  .../RegisterCpuFeatures.h |  4 +-
>  .../RegisterCpuFeaturesLib.c  | 68 +++
>  2 files changed, 40 insertions(+), 32 deletions(-)
> 
> diff --git

[Trimmed]

> 
>FeatureMask = NULL;
> -  BeforeFeatureBitMask= NULL;
> -  AfterFeatureBitMask = NULL;
> +  ThreadBeforeFeatureBitMask  = NULL;
> +  ThreadAfterFeatureBitMask   = NULL;
>CoreBeforeFeatureBitMask= NULL;
>CoreAfterFeatureBitMask = NULL;
>PackageBeforeFeatureBitMask = NULL;
> @@ -850,10 +850,18 @@ RegisterCpuFeature (
>VA_START (Marker, InitializeFunc);
>Feature = VA_ARG (Marker, UINT32);
>while (Feature != CPU_FEATURE_END) {
> -ASSERT ((Feature & (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER))
> -!= (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER));
> +//
> +// It's invalid to require a feature is before AND after all other 
> features.
> +//
>  ASSERT ((Feature & (CPU_FEATURE_BEFORE_ALL |
> CPU_FEATURE_AFTER_ALL))
>  != (CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL));
> +
> +//
> +// It's invalid to require feature A is before AND after before feature 
> B,

"after before" should be just "after", right?

With it corrected, Reviewed-by: Star Zeng 

Thanks,
Star

> +// either in thread level, core level or package level.
> +//
> +ASSERT ((Feature & (CPU_FEATURE_THREAD_BEFORE |
> CPU_FEATURE_THREAD_AFTER))
> +!= (CPU_FEATURE_THREAD_BEFORE |
> CPU_FEATURE_THREAD_AFTER));
>  ASSERT ((Feature & (CPU_FEATURE_CORE_BEFORE |
> CPU_FEATURE_CORE_AFTER))
>  != (CPU_FEATURE_CORE_BEFORE | CPU_FEATURE_CORE_AFTER));
>  ASSERT ((Feature & (CPU_FEATURE_PACKAGE_BEFORE |
> CPU_FEATURE_PACKAGE_AFTER))
> @@ -865,9 +873,9 @@ RegisterCpuFeature (
>ASSERT (FeatureMask == NULL);
>SetCpuFeaturesBitMask (, Feature, CpuFeaturesData-
> >BitMaskSize);
>  } else if ((Feature & CPU_FEATURE_THREAD_BEFORE) != 0) {
> -  SetCpuFeaturesBitMask (, Feature &
> ~CPU_FEATURE_THREAD_BEFORE, CpuFeaturesData->BitMaskSize);
> +  SetCpuFeaturesBitMask (, Feature &
> ~CPU_FEATURE_THREAD_BEFORE, CpuFeaturesData->BitMaskSize);
>  } else if ((Feature & CPU_FEATURE_THREAD_AFTER) != 0) {
> -  SetCpuFeaturesBitMask (, Feature &
> ~CPU_FEATURE_THREAD_AFTER, CpuFeaturesData->BitMaskSize);
> +  SetCpuFeaturesBitMask (, Feature &
> ~CPU_FEATURE_THREAD_AFTER, CpuFeaturesData->BitMaskSize);
>  } else if ((Feature & CPU_FEATURE_CORE_BEFORE) != 0) {
>SetCpuFeaturesBitMask (, Feature &
> ~CPU_FEATURE_CORE_BEFORE, CpuFeaturesData->BitMaskSize);
>  } else if ((Feature & CPU_FEATURE_CORE_AFTER) != 0) {
> @@ -885,8 +893,8 @@ RegisterCpuFeature (
>ASSERT (CpuFeature != NULL);
>CpuFeature->Signature   = CPU_FEATURE_ENTRY_SIGNATURE;
>CpuFeature->FeatureMask = FeatureMask;
> -  CpuFeature->BeforeFeatureBitMask= BeforeFeatureBitMask;
> -  CpuFeature->AfterFeatureBitMask = AfterFeatureBitMask;
> +  CpuFeature->ThreadBeforeFeatureBitMask  =
> ThreadBeforeFeatureBitMask;
> +  CpuFeature->ThreadAfterFeatureBitMask   = ThreadAfterFeatureBitMask;
>CpuFeature->CoreBeforeFeatureBitMask= CoreBeforeFeatureBitMask;
>CpuFeature->CoreAfterFeatureBitMask = CoreAfterFeatureBitMask;
>CpuFeature->PackageBeforeFeatureBitMask =
> PackageBeforeFeatureBitMask;
> --
> 2.21.0.windows.1
> 
> 
> 


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Re: [edk2-devel] [PATCH v2 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Delete CPU_FEATURE_[BEFORE|AFTER]

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Ray Ni [mailto:niru...@users.noreply.github.com] 
Sent: Tuesday, November 26, 2019 2:16 PM
To: devel@edk2.groups.io
Cc: Ni, Ray ; Dong, Eric ; Zeng, Star 

Subject: [PATCH v2 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Delete 
CPU_FEATURE_[BEFORE|AFTER]

From: Ray Ni 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1366

Commit b3c71b472dff2c02f0cc38d7a1959cfb2ba8420d supported MSR setting in 
different scopes. It added below macro:
 CPU_FEATURE_THREAD_BEFORE
 CPU_FEATURE_THREAD_AFTER
 CPU_FEATURE_CORE_BEFORE
 CPU_FEATURE_CORE_AFTER
 CPU_FEATURE_PACKAGE_BEFORE
 CPU_FEATURE_PACKAGE_AFTER

And it re-interpreted CPU_FEATURE_BEFORE as CPU_FEATURE_THREAD_BEFORE and 
CPU_FEATURE_AFTER as CPU_FEATURE_THREAD_AFTER.

This patch retires CPU_FEATURE_BEFORE and CPU_FEATURE_AFTER completely.

Signed-off-by: Ray Ni 
Cc: Eric Dong 
Cc: Star Zeng 
---
 UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h | 13 ++---
 .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c |  6 +++---
 .../RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 10 +-
 3 files changed, 10 insertions(+), 19 deletions(-)

diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h 
b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
index f370373d63..d075606cdb 100644
--- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
+++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h
@@ -69,17 +69,8 @@
 
 #define CPU_FEATURE_BEFORE_ALL  BIT23
 #define CPU_FEATURE_AFTER_ALL   BIT24
-//
-// CPU_FEATURE_BEFORE and CPU_FEATURE_AFTER only mean Thread scope -// before 
and Thread scope after.
-// It will be replace with CPU_FEATURE_THREAD_BEFORE and -// 
CPU_FEATURE_THREAD_AFTER, and should not be used anymore.
-//
-#define CPU_FEATURE_BEFORE  BIT25
-#define CPU_FEATURE_AFTER   BIT26
-
-#define CPU_FEATURE_THREAD_BEFORE   CPU_FEATURE_BEFORE
-#define CPU_FEATURE_THREAD_AFTERCPU_FEATURE_AFTER
+#define CPU_FEATURE_THREAD_BEFORE   BIT25
+#define CPU_FEATURE_THREAD_AFTERBIT26
 #define CPU_FEATURE_CORE_BEFORE BIT27
 #define CPU_FEATURE_CORE_AFTER  BIT28
 #define CPU_FEATURE_PACKAGE_BEFORE  BIT29
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c 
b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
index 3ebd9392a9..d1fe14f519 100644
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
@@ -95,7 +95,7 @@ CpuCommonFeaturesLibConstructor (
SmxSupport,
SmxInitialize,
CPU_FEATURE_SMX,
-   CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
+   CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | 
+ CPU_FEATURE_THREAD_BEFORE,
CPU_FEATURE_END
);
 ASSERT_EFI_ERROR (Status);
@@ -107,7 +107,7 @@ CpuCommonFeaturesLibConstructor (
VmxSupport,
VmxInitialize,
CPU_FEATURE_VMX,
-   CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
+   CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | 
+ CPU_FEATURE_THREAD_BEFORE,
CPU_FEATURE_END
);
 ASSERT_EFI_ERROR (Status);
@@ -207,7 +207,7 @@ CpuCommonFeaturesLibConstructor (
LmceSupport,
LmceInitialize,
CPU_FEATURE_LMCE,
-   CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
+   CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | 
+ CPU_FEATURE_THREAD_BEFORE,
CPU_FEATURE_END
);
 ASSERT_EFI_ERROR (Status);
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c 
b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
index 58910b8891..1f953832b9 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
@@ -858,16 +858,16 @@ RegisterCpuFeature (
 != (CPU_FEATURE_CORE_BEFORE | CPU_FEATURE_CORE_AFTER));
 ASSERT ((Feature & (CPU_FEATURE_PACKAGE_BEFORE | 
CPU_FEATURE_PACKAGE_AFTER))
 != (CPU_FEATURE_PACKAGE_BEFORE | 
CPU_FEATURE_PACKAGE_AFTER));
-if (Feature < CPU_FEATURE_BEFORE) {
+if (Feature < CPU_FEATURE_THREAD_BEFORE) {
   BeforeAll = ((Feature & CPU_FEATURE_BEFORE_ALL) != 0) ? TRUE : FALSE;
   AfterAll  = ((Feature & CPU_FEATURE_AFTER_ALL) != 0) ? TRUE : FALSE;
   Feature  &= ~(CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL);
   ASSERT (FeatureMask == NULL);
   SetCpuFeaturesBitMask (, Feature, 
CpuFeaturesData->BitMaskSize);
-} else if ((Feature &

Re: [edk2-devel] [PATCH v2 087/105] .mailmap: Add an entry for Star Zeng

[Zeng, Star]

Thank you. Reviewed-by: Star Zeng 

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Philippe
> Mathieu-Daudé
> Sent: Friday, December 6, 2019 7:26 PM
> To: devel@edk2.groups.io
> Cc: Philippe Mathieu-Daude ; Zeng, Star
> 
> Subject: [edk2-devel] [PATCH v2 087/105] .mailmap: Add an entry for Star
> Zeng
> 
> We use .mailmap to display contributors email addresses in an uniform
> format.
> 
> Add an entry for Star Zeng to have his name and email address displayed
> properly in the git history.
> 
> Cc: Star Zeng 
> Signed-off-by: Philippe Mathieu-Daude 
> ---
> [Due to MTA restricting the recipient list to 100, I can not Cc all the  named
> developers in the cover. Therefore I'm adapting the explaination  from the
> cover in each patch]
> 
> This patch won't get merged if Star Zeng doesn't give his approval, by
> replying to this patch with:
>   Reviewed-by: Star Zeng 
> 
> If you think this patch is inappropriate, you don't need to justify, reply 
> with:
>   NAcked-by: Star Zeng  or simply:
>   NACK
> 
> If your Firstname Lastname order is incorrect, tell me and I will fix it.
> 
> You can also ignore this mail, but I might resend it and keep bothering you.
> 
> Regards,
> 
> Phil.
> ---
>  .mailmap | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/.mailmap b/.mailmap
> index f64b3d0848f7..a678caf2ca24 100644
> --- a/.mailmap
> +++ b/.mailmap
> @@ -167,3 +167,6 @@ Siyuan Fu 
> 
>  Siyuan FuSongpeng Li
>   Sriram Subramanian 
> +Star Zeng 
> +Star Zeng 
> +
> +Star Zeng  
> --
> 2.21.0
> 
> 
> 


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Re: [edk2-devel] [PATCH 10/79] IntelFsp2WrapperPkg: Fix various typos

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Philippe Mathieu-Daude [mailto:phi...@redhat.com] 
Sent: Wednesday, December 4, 2019 12:15 AM
To: devel@edk2.groups.io
Cc: Antoine Coeur ; Chiu, Chasel ; 
Desimone, Nathaniel L ; Zeng, Star 
; Philippe Mathieu-Daude 
Subject: [PATCH 10/79] IntelFsp2WrapperPkg: Fix various typos

From: Antoine Coeur 

Fix various typos in comments and documentation.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Reviewed-by: Philippe Mathieu-Daude 
Signed-off-by: Philippe Mathieu-Daude 
---
 IntelFsp2WrapperPkg/Include/Library/FspWrapperApiLib.h 
  | 2 +-
 IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
  | 4 ++--
 IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c  
  | 2 +-
 
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
| 4 ++--
 
IntelFsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c
 | 4 ++--
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.nasm  
  | 6 +++---
 
IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.nasm
 | 2 +-
 IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/Stack.nasm  
  | 2 +-
 8 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperApiLib.h 
b/IntelFsp2WrapperPkg/Include/Library/FspWrapperApiLib.h
index e39054c30d3b..11a3faaad87a 100644
--- a/IntelFsp2WrapperPkg/Include/Library/FspWrapperApiLib.h
+++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperApiLib.h
@@ -40,7 +40,7 @@ CallFspNotifyPhase (
 /**
   Call FSP API - FspMemoryInit.
 
-  @param[in]  FspmUpdDataPtr  Pointer to the FSPM_UPD data sructure.
+  @param[in]  FspmUpdDataPtr  Pointer to the FSPM_UPD data structure.
   @param[out] HobListPtr  Pointer to receive the address of the 
HOB list.
 
   @return EFI status returned by FspMemoryInit API.
diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h 
b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
index b90f0eb78302..2aa14c92fd63 100644
--- a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
+++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h
@@ -12,7 +12,7 @@
 /**
   This function overrides the default configurations in the FSP-M UPD data 
region.
 
-  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data strcture.
+  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data 
structure.
 
 **/
 VOID
@@ -24,7 +24,7 @@ UpdateFspmUpdData (
 /**
   This function overrides the default configurations in the FSP-S UPD data 
region.
 
-  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data strcture.
+  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data 
structure.
 
 **/
 VOID
diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c 
b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index 0f8cd69a0e6e..b20f0805a021 100644
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -352,7 +352,7 @@ FspsWrapperInitApiMode (
   EFI_BOOT_MODEBootMode;
 
   //
-  // Register MemoryDiscovered Nofity to run FspSiliconInit
+  // Register MemoryDiscovered Notify to run FspSiliconInit
   //
   Status = PeiServicesNotifyPpi ();
   ASSERT_EFI_ERROR (Status);
diff --git 
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
 
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
index def04b176659..dddf80b76c26 100644
--- 
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
+++ 
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/FspWrapperPlatformLibSample.c
@@ -14,7 +14,7 @@
 
   @note At this point, memory is NOT ready, PeiServices are available to use.
 
-  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data strcture.
+  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data 
structure.
 
 **/
 VOID
@@ -28,7 +28,7 @@ UpdateFspmUpdData (
 /**
   This function overrides the default configurations in the FSP-S UPD data 
region.
 
-  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data strcture.
+  @param[in,out] FspUpdRgnPtr   A pointer to the UPD data region data 
structure.
 
 **/
 VOID
diff --git 
a/IntelFsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c
 
b/IntelFsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c
index 54cebe127c8f..48f4b0295a30 100644
--- 
a/IntelFsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample/FspWrapperHobProcessLibSample.c
+++ 
b/IntelFsp2WrapperPkg/Library/PeiFspWrapperHobProcessLibSample