Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-08-05 Thread De Leon Vasquez, Lorena R 
Hi Liming,
I’ve update the name
Thanks,
Lorena

From: Gao, Liming 
Sent: Friday, July 31, 2020 2:30 AM
To: De Leon Vasquez, Lorena R ; 
devel@edk2.groups.io; Lohr, Paul A ; Yao, Jiewen 

Cc: Kinney, Michael D 
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Lorena:
  Thanks for your update. Can you correct name style as Star Zeng 
mailto:star.z...@intel.com>> for below message?

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

Thanks
Liming
From: De Leon Vasquez, Lorena R 
mailto:lorena.r.de.leon.vasq...@intel.com>>
Sent: 2020年7月29日 23:23
To: Gao, Liming mailto:liming@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

I’ve attached patch with modifications suggested

From: Gao, Liming mailto:liming@intel.com>>
Sent: Thursday, July 9, 2020 7:45 AM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Lorena:
  I have one minor comment on this patch. The error return status should be 
EFI_UNSUPPORTED.

+  return error;
==>
return EFI_UNSUPPORTED;

Thanks
Liming
From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, July 7, 2020 1:24 AM
To: Gao, Liming mailto:liming@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen....@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hi Liming,
I’ve attached the patch

Thanks,
Lorena

From: Gao, Liming mailto:liming@intel.com>>
Sent: Thursday, July 2, 2020 8:54 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Paul:
  This patch is missing to be merged.

Lorena:
  I can’t extract the patch from the mail. Can you send the patch to me? I can 
help merge it.

Thanks
Liming
From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Lohr, Paul A
Sent: Thursday, July 2, 2020 9:56 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hello,

It seems this did not get checked in.  Is there something wrong with the patch 
itself?  Or was this simply submitted incorrectly?  I don’t see a Bugzilla 
associated with it is why I ask.

Paul A. Lohr - Server Firmware Enabling
512.239.9073 (cell)
512.794.5044 (work)

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Yao, Jiewen
Sent: Monday, March 2, 2020 5:46 PM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Reviewed-by: jiewen@intel.com<mailto:jiewen@intel.com>

From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Yao, Jiewen mailto:jiewen@intel.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c

Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-07-31 Thread Liming Gao 
Lorena:
  Thanks for your update. Can you correct name style as Star Zeng 
 for below message?

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

Thanks
Liming
From: De Leon Vasquez, Lorena R 
Sent: 2020年7月29日 23:23
To: Gao, Liming ; devel@edk2.groups.io; Lohr, Paul A 
; Yao, Jiewen 
Cc: Kinney, Michael D 
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

I’ve attached patch with modifications suggested

From: Gao, Liming mailto:liming@intel.com>>
Sent: Thursday, July 9, 2020 7:45 AM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Lorena:
  I have one minor comment on this patch. The error return status should be 
EFI_UNSUPPORTED.

+  return error;
==>
return EFI_UNSUPPORTED;

Thanks
Liming
From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, July 7, 2020 1:24 AM
To: Gao, Liming mailto:liming@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hi Liming,
I’ve attached the patch

Thanks,
Lorena

From: Gao, Liming mailto:liming@intel.com>>
Sent: Thursday, July 2, 2020 8:54 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Paul:
  This patch is missing to be merged.

Lorena:
  I can’t extract the patch from the mail. Can you send the patch to me? I can 
help merge it.

Thanks
Liming
From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Lohr, Paul A
Sent: Thursday, July 2, 2020 9:56 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hello,

It seems this did not get checked in.  Is there something wrong with the patch 
itself?  Or was this simply submitted incorrectly?  I don’t see a Bugzilla 
associated with it is why I ask.

Paul A. Lohr - Server Firmware Enabling
512.239.9073 (cell)
512.794.5044 (work)

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Yao, Jiewen
Sent: Monday, March 2, 2020 5:46 PM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Reviewed-by: jiewen@intel.com<mailto:jiewen@intel.com>

From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Yao, Jiewen mailto:jiewen@intel.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (

 DEBUG ((DEBU

Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-07-29 Thread De Leon Vasquez, Lorena R 
I've attached patch with modifications suggested

From: Gao, Liming 
Sent: Thursday, July 9, 2020 7:45 AM
To: De Leon Vazquez, Lorena R ; 
devel@edk2.groups.io; Lohr, Paul A ; Yao, Jiewen 

Cc: Kinney, Michael D 
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Lorena:
  I have one minor comment on this patch. The error return status should be 
EFI_UNSUPPORTED.

+  return error;
==>
return EFI_UNSUPPORTED;

Thanks
Liming
From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, July 7, 2020 1:24 AM
To: Gao, Liming mailto:liming@intel.com>>; 
devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hi Liming,
I've attached the patch

Thanks,
Lorena

From: Gao, Liming mailto:liming@intel.com>>
Sent: Thursday, July 2, 2020 8:54 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Paul:
  This patch is missing to be merged.

Lorena:
  I can't extract the patch from the mail. Can you send the patch to me? I can 
help merge it.

Thanks
Liming
From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Lohr, Paul A
Sent: Thursday, July 2, 2020 9:56 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hello,

It seems this did not get checked in.  Is there something wrong with the patch 
itself?  Or was this simply submitted incorrectly?  I don't see a Bugzilla 
associated with it is why I ask.

Paul A. Lohr - Server Firmware Enabling
512.239.9073 (cell)
512.794.5044 (work)

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Yao, Jiewen
Sent: Monday, March 2, 2020 5:46 PM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Reviewed-by: jiewen@intel.com<mailto:jiewen@intel.com>

From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Yao, Jiewen mailto:jiewen@intel.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (

 DEBUG ((DEBUG_INFO,"Source: S%04x B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePag

Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-07-09 Thread Liming Gao 
Lorena:
  I have one minor comment on this patch. The error return status should be 
EFI_UNSUPPORTED.

+  return error;
==>
return EFI_UNSUPPORTED;

Thanks
Liming
From: De Leon Vazquez, Lorena R 
Sent: Tuesday, July 7, 2020 1:24 AM
To: Gao, Liming ; devel@edk2.groups.io; Lohr, Paul A 
; Yao, Jiewen 
Cc: Kinney, Michael D 
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hi Liming,
I've attached the patch

Thanks,
Lorena

From: Gao, Liming mailto:liming@intel.com>>
Sent: Thursday, July 2, 2020 8:54 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Lohr, Paul A 
mailto:paul.a.l...@intel.com>>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Paul:
  This patch is missing to be merged.

Lorena:
  I can't extract the patch from the mail. Can you send the patch to me? I can 
help merge it.

Thanks
Liming
From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Lohr, Paul A
Sent: Thursday, July 2, 2020 9:56 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hello,

It seems this did not get checked in.  Is there something wrong with the patch 
itself?  Or was this simply submitted incorrectly?  I don't see a Bugzilla 
associated with it is why I ask.

Paul A. Lohr - Server Firmware Enabling
512.239.9073 (cell)
512.794.5044 (work)

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Yao, Jiewen
Sent: Monday, March 2, 2020 5:46 PM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Reviewed-by: jiewen@intel.com<mailto:jiewen@intel.com>

From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Yao, Jiewen mailto:jiewen@intel.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (

 DEBUG ((DEBUG_INFO,"Source: S%04x B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
index 0da1611..6bd31b7 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
@@ -78,14 +78,11 @@ CreateExtContextEntry (

 DEBUG ((DEBUG_INFO,"DOMAIN: S%04x, B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, S

Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-07-06 Thread De Leon Vazquez, Lorena R 
Hi Liming,
I've attached the patch

Thanks,
Lorena

From: Gao, Liming 
Sent: Thursday, July 2, 2020 8:54 PM
To: devel@edk2.groups.io; Lohr, Paul A ; Yao, Jiewen 
; De Leon Vazquez, Lorena R 

Cc: Kinney, Michael D 
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Paul:
  This patch is missing to be merged.

Lorena:
  I can't extract the patch from the mail. Can you send the patch to me? I can 
help merge it.

Thanks
Liming
From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Lohr, Paul A
Sent: Thursday, July 2, 2020 9:56 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Yao, Jiewen 
mailto:jiewen@intel.com>>; De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hello,

It seems this did not get checked in.  Is there something wrong with the patch 
itself?  Or was this simply submitted incorrectly?  I don't see a Bugzilla 
associated with it is why I ask.

Paul A. Lohr - Server Firmware Enabling
512.239.9073 (cell)
512.794.5044 (work)

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Yao, Jiewen
Sent: Monday, March 2, 2020 5:46 PM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Reviewed-by: jiewen@intel.com<mailto:jiewen@intel.com>

From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Yao, Jiewen mailto:jiewen@intel.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (

 DEBUG ((DEBUG_INFO,"Source: S%04x B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
index 0da1611..6bd31b7 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
@@ -78,14 +78,11 @@ CreateExtContextEntry (

 DEBUG ((DEBUG_INFO,"DOMAIN: S%04x, B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ExtContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ExtContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].ExtRootEntryTable, 
EFI_PAGES_TO_

Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-07-02 Thread Liming Gao 
Paul:
  This patch is missing to be merged.

Lorena:
  I can't extract the patch from the mail. Can you send the patch to me? I can 
help merge it.

Thanks
Liming
From: devel@edk2.groups.io  On Behalf Of Lohr, Paul A
Sent: Thursday, July 2, 2020 9:56 PM
To: devel@edk2.groups.io; Yao, Jiewen ; De Leon Vazquez, 
Lorena R 
Cc: Kinney, Michael D 
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Hello,

It seems this did not get checked in.  Is there something wrong with the patch 
itself?  Or was this simply submitted incorrectly?  I don't see a Bugzilla 
associated with it is why I ask.

Paul A. Lohr - Server Firmware Enabling
512.239.9073 (cell)
512.794.5044 (work)

From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> 
mailto:devel@edk2.groups.io>> On Behalf Of Yao, Jiewen
Sent: Monday, March 2, 2020 5:46 PM
To: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>;
 devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Reviewed-by: jiewen@intel.com<mailto:jiewen@intel.com>

From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Yao, Jiewen mailto:jiewen@intel.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (

 DEBUG ((DEBUG_INFO,"Source: S%04x B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
index 0da1611..6bd31b7 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
@@ -78,14 +78,11 @@ CreateExtContextEntry (

 DEBUG ((DEBUG_INFO,"DOMAIN: S%04x, B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ExtContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ExtContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].ExtRootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
--
2.21.0.windows.1



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Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-07-02 Thread Lohr, Paul A 
Hello,

It seems this did not get checked in.  Is there something wrong with the patch 
itself?  Or was this simply submitted incorrectly?  I don't see a Bugzilla 
associated with it is why I ask.

Paul A. Lohr - Server Firmware Enabling
512.239.9073 (cell)
512.794.5044 (work)

From: devel@edk2.groups.io  On Behalf Of Yao, Jiewen
Sent: Monday, March 2, 2020 5:46 PM
To: De Leon Vazquez, Lorena R ; 
devel@edk2.groups.io
Cc: Kinney, Michael D 
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU 
generic bug fix

Reviewed-by: jiewen@intel.com<mailto:jiewen@intel.com>

From: De Leon Vazquez, Lorena R 
mailto:lorena.r.de.leon.vazq...@intel.com>>
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
Cc: Yao, Jiewen mailto:jiewen@intel.com>>; Kinney, 
Michael D mailto:michael.d.kin...@intel.com>>
Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com<mailto:star.z...@intel.com>
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com<mailto:lorena.r.de.leon.vazq...@intel.com>

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (

 DEBUG ((DEBUG_INFO,"Source: S%04x B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
index 0da1611..6bd31b7 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
@@ -78,14 +78,11 @@ CreateExtContextEntry (

 DEBUG ((DEBUG_INFO,"DOMAIN: S%04x, B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ExtContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ExtContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].ExtRootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
--
2.21.0.windows.1



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[edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-03-03 Thread De Leon Vazquez, Lorena R 
Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (
 DEBUG ((DEBUG_INFO,"Source: S%04x B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));
-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }
   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
index 0da1611..6bd31b7 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
@@ -78,14 +78,11 @@ CreateExtContextEntry (
 DEBUG ((DEBUG_INFO,"DOMAIN: S%04x, B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));
-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ExtContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ExtContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }
   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].ExtRootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
--
2.21.0.windows.1


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Re: [edk2-devel] [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

2020-03-02 Thread Yao, Jiewen 
Reviewed-by: jiewen@intel.com

From: De Leon Vazquez, Lorena R 
Sent: Tuesday, March 3, 2020 7:04 AM
To: devel@edk2.groups.io
Cc: Yao, Jiewen ; Kinney, Michael D 

Subject: [edk2-platforms] [PATCH] IntelSiliconPkg: IOMMU generic bug fix

Looks like Addresswidth is BIT wise values. Right now these values are not used 
any

Suggested-by: Star Zeng star.z...@intel.com
Signed-off-by: 
lorena.r.de.leon.vazq...@intel.com

--
.../Feature/VTd/IntelVTdDxe/TranslationTable.c| 11 ---
.../Feature/VTd/IntelVTdDxe/TranslationTableEx.c  | 11 ---
2 files changed, 8 insertions(+), 14 deletions(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index cc970c0..61fbb4a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -128,14 +128,11 @@ CreateContextEntry (

 DEBUG ((DEBUG_INFO,"Source: S%04x B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c 
b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
index 0da1611..6bd31b7 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
@@ -78,14 +78,11 @@ CreateExtContextEntry (

 DEBUG ((DEBUG_INFO,"DOMAIN: S%04x, B%02x D%02x F%02x\n", 
mVtdUnitInformation[VtdIndex].Segment, SourceId.Bits.Bus, SourceId.Bits.Device, 
SourceId.Bits.Function));

-switch (mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW) {
-case BIT1:
-  ExtContextEntry->Bits.AddressWidth = 0x1;
-  break;
-case BIT2:
-  ExtContextEntry->Bits.AddressWidth = 0x2;
-  break;
+if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
+  DEBUG((DEBUG_ERROR, " 4-level page-table is not supported on VTD %d 
\n", VtdIndex));
+  return error;
 }
+ContextEntry->Bits.AddressWidth = 0x2;
   }

   FlushPageTableMemory (VtdIndex, 
(UINTN)mVtdUnitInformation[VtdIndex].ExtRootEntryTable, 
EFI_PAGES_TO_SIZE(EntryTablePages));
--
2.21.0.windows.1


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