Re: [edk2-devel] [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build support
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Desimone, Nathaniel L
> Sent: Thursday, May 23, 2019 3:12 AM
> To: Agyeman, Prince ; devel@edk2.groups.io
> Cc: Chiu, Chasel ; Kubacki, Michael A
> ; Kinney, Michael D
> ; Gao, Liming ; Sinha,
> Ankit
> Subject: RE: [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5
> build support
>
> Reviewed-by: Nate DeSimone
>
> -Original Message-
> From: Agyeman, Prince
> Sent: Monday, May 20, 2019 8:08 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Agyeman, Prince
> ; Kubacki, Michael A
> ; Kinney, Michael D
> ; Desimone, Nathaniel L
> ; Gao, Liming ; Sinha,
> Ankit
> Subject: [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build
> support
>
> From: Prince Agyeman
>
> Fixes:
> * Replacing .asm and .S with nasm in SecFspWrapperPlatformSecLib for
> cross-platform build support
> * Modified RuleInclude.fdf
> * Modified python files to be OS independent
>
> Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0, nasm
> version
> 2.11.08
>
> Cc: Michael Kubacki
> Cc: Michael D Kinney
> Cc: Nate DeSimone
> Cc: Liming Gao
> Cc: Ankit Sinha
>
> Signed-off-by: Prince Agyeman
> ---
> .../Ia32/PeiCoreEntry.S| 117 ---
> .../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 46 +--
> .../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 342
> -
> .../Ia32/{SecEntry.asm => SecEntry.nasm} | 132
> .../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 67
> .../Ia32/{Stack.asm => Stack.nasm} | 39 ++-
> .../SecFspWrapperPlatformSecLib.inf| 12 +-
> .../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 6 +-
> .../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
> .../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 8 +-
> .../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 15 +-
> Platform/Intel/build_bios.py | 28 +-
> 12 files changed, 143 insertions(+), 671 deletions(-) delete mode 100644
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformS
> ecLib/Ia32/PeiCoreEntry.S
> rename
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformS
> ecLib/Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} (66%) delete mode
> 100644
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformS
> ecLib/Ia32/SecEntry.S
> rename
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformS
> ecLib/Ia32/{SecEntry.asm => SecEntry.nasm} (72%) delete mode 100644
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformS
> ecLib/Ia32/Stack.S
> rename
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformS
> ecLib/Ia32/{Stack.asm => Stack.nasm} (59%)
>
> diff --git
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/PeiCoreEntry.S
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/PeiCoreEntry.S
> deleted file mode 100644
> index 8c8356f..000
> ---
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/PeiCoreEntry.S
> +++ /dev/null
> @@ -1,117 +0,0 @@
> -## @file
> -# Find and call SecStartup
> -#
> -# Copyright (c) 2017, Intel Corporation. All rights reserved. -#
> SPDX-License-Identifier: BSD-2-Clause-Patent -# -##
> -
> -ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
> -ASM_PFX(CallPeiCoreEntryPoint):
> - #
> - # Obtain the hob list pointer
> - #
> - movl0x4(%esp), %eax
> - #
> - # Obtain the stack information
> - # ECX: start of range
> - # EDX: end of range
> - #
> - movl0x8(%esp), %ecx
> - movl0xC(%esp), %edx
> -
> - #
> - # Platform init
> - #
> - pushal
> - pushl %edx
> - pushl %ecx
> - pushl %eax
> - call ASM_PFX(PlatformInit)
> - popl %eax
> - popl %eax
> - popl %eax
> - popal
> -
> - #
> - # Set stack top pointer
> - #
> - movl%edx, %esp
> -
> - #
> - # Push the hob list pointer
> - #
> - pushl %eax
> -
> - #
> - # Save the value
> - # ECX: start of range
> - # EDX: end of range
> - #
> - movl%esp, %ebp
> - pushl %ecx
> - pushl %edx
> -
> - #
> - # Push processor count to stack first, then BIST status (AP then BSP)
> - #
> - movl$1, %eax
> - cpuid
> - shr $16, %ebx
> - andl$0x00FF, %ebx
> - cmp $1, %bl
> - jae PushProcessorCount
> -
> - #
> - # Some processors report 0 logical processors. Effectively 0 = 1.
> - # So we fix up the processor count
> - #
> - inc %ebx
> -
> -PushProcessorCount:
> - pushl %ebx
> -
> - #
> - # We need to implement a long-term solution for BIST capture. For now, we
> just copy BSP BIST
> - # for all processor threads
> - #
> - xorl%ecx, %ecx
> - movb%bl, %cl
> -PushBist:
> - movd%mm0, %eax
> - pushl %eax
> - loopPushBist
> -
> - # Save Time-Stamp Counter
> - movd %mm5, %eax
> - pushl %eax
>
Re: [edk2-devel] [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build support
Reviewed-by: Nate DeSimone
-Original Message-
From: Agyeman, Prince
Sent: Monday, May 20, 2019 8:08 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Agyeman, Prince
; Kubacki, Michael A ;
Kinney, Michael D ; Desimone, Nathaniel L
; Gao, Liming ; Sinha,
Ankit
Subject: [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build
support
From: Prince Agyeman
Fixes:
* Replacing .asm and .S with nasm in SecFspWrapperPlatformSecLib for
cross-platform build support
* Modified RuleInclude.fdf
* Modified python files to be OS independent
Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0, nasm version
2.11.08
Cc: Michael Kubacki
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Ankit Sinha
Signed-off-by: Prince Agyeman
---
.../Ia32/PeiCoreEntry.S| 117 ---
.../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 46 +--
.../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 342 -
.../Ia32/{SecEntry.asm => SecEntry.nasm} | 132
.../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 67
.../Ia32/{Stack.asm => Stack.nasm} | 39 ++-
.../SecFspWrapperPlatformSecLib.inf| 12 +-
.../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 6 +-
.../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
.../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 8 +-
.../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 15 +-
Platform/Intel/build_bios.py | 28 +-
12 files changed, 143 insertions(+), 671 deletions(-) delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{PeiCoreEntry.asm
=> PeiCoreEntry.nasm} (66%) delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/SecEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{SecEntry.asm
=> SecEntry.nasm} (72%) delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/Stack.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{Stack.asm
=> Stack.nasm} (59%)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
deleted file mode 100644
index 8c8356f..000
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
+++ /dev/null
@@ -1,117 +0,0 @@
-## @file
-# Find and call SecStartup
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved. -#
SPDX-License-Identifier: BSD-2-Clause-Patent -# -##
-
-ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
-ASM_PFX(CallPeiCoreEntryPoint):
- #
- # Obtain the hob list pointer
- #
- movl0x4(%esp), %eax
- #
- # Obtain the stack information
- # ECX: start of range
- # EDX: end of range
- #
- movl0x8(%esp), %ecx
- movl0xC(%esp), %edx
-
- #
- # Platform init
- #
- pushal
- pushl %edx
- pushl %ecx
- pushl %eax
- call ASM_PFX(PlatformInit)
- popl %eax
- popl %eax
- popl %eax
- popal
-
- #
- # Set stack top pointer
- #
- movl%edx, %esp
-
- #
- # Push the hob list pointer
- #
- pushl %eax
-
- #
- # Save the value
- # ECX: start of range
- # EDX: end of range
- #
- movl%esp, %ebp
- pushl %ecx
- pushl %edx
-
- #
- # Push processor count to stack first, then BIST status (AP then BSP)
- #
- movl$1, %eax
- cpuid
- shr $16, %ebx
- andl$0x00FF, %ebx
- cmp $1, %bl
- jae PushProcessorCount
-
- #
- # Some processors report 0 logical processors. Effectively 0 = 1.
- # So we fix up the processor count
- #
- inc %ebx
-
-PushProcessorCount:
- pushl %ebx
-
- #
- # We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
- # for all processor threads
- #
- xorl%ecx, %ecx
- movb%bl, %cl
-PushBist:
- movd%mm0, %eax
- pushl %eax
- loopPushBist
-
- # Save Time-Stamp Counter
- movd %mm5, %eax
- pushl %eax
-
- movd %mm6, %eax
- pushl %eax
-
- #
- # Pass entry point of the PEI core
- #
- movl$0xFFE0, %edi
- pushl %ds:(%edi)
-
- #
- # Pass BFV into the PEI Core
- #
- movl$0xFFFC, %edi
- pushl %ds:(%edi)
-
- #
- # Pass stack size into the PEI Core
- #
- movl-4(%ebp), %ecx
- movl-8(%ebp), %edx
- pushl %ecx # RamBase
-
- subl%ecx, %edx
- pushl %edx # RamSize
-
- #
- # Pass Control into the PEI Core
- #
- call ASM_PFX(SecStartup)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.asm
Re: [edk2-devel] [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build support
Reviewed-by: Michael Kubacki
> -Original Message-
> From: Agyeman, Prince
> Sent: Monday, May 20, 2019 8:08 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Agyeman, Prince
> ; Kubacki, Michael A
> ; Kinney, Michael D
> ; Desimone, Nathaniel L
> ; Gao, Liming ;
> Sinha, Ankit
> Subject: [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build
> support
>
> From: Prince Agyeman
>
> Fixes:
> * Replacing .asm and .S with nasm in SecFspWrapperPlatformSecLib for
> cross-platform build support
> * Modified RuleInclude.fdf
> * Modified python files to be OS independent
>
> Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0, nasm
> version 2.11.08
>
> Cc: Michael Kubacki
> Cc: Michael D Kinney
> Cc: Nate DeSimone
> Cc: Liming Gao
> Cc: Ankit Sinha
>
> Signed-off-by: Prince Agyeman
> ---
> .../Ia32/PeiCoreEntry.S| 117 ---
> .../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 46 +--
> .../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 342
> -
> .../Ia32/{SecEntry.asm => SecEntry.nasm} | 132
> .../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 67
> .../Ia32/{Stack.asm => Stack.nasm} | 39 ++-
> .../SecFspWrapperPlatformSecLib.inf| 12 +-
> .../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 6 +-
> .../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
> .../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 8 +-
> .../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 15 +-
> Platform/Intel/build_bios.py | 28 +-
> 12 files changed, 143 insertions(+), 671 deletions(-) delete mode 100644
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/PeiCoreEntry.S
> rename
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} (66%) delete mode
> 100644
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/SecEntry.S
> rename
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/{SecEntry.asm => SecEntry.nasm} (72%) delete mode 100644
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/Stack.S
> rename
> Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor
> mSecLib/Ia32/{Stack.asm => Stack.nasm} (59%)
>
> diff --git
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfo
> rmSecLib/Ia32/PeiCoreEntry.S
> b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfo
> rmSecLib/Ia32/PeiCoreEntry.S
> deleted file mode 100644
> index 8c8356f..000
> ---
> a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfo
> rmSecLib/Ia32/PeiCoreEntry.S
> +++ /dev/null
> @@ -1,117 +0,0 @@
> -## @file
> -# Find and call SecStartup
> -#
> -# Copyright (c) 2017, Intel Corporation. All rights reserved. -# SPDX-
> License-Identifier: BSD-2-Clause-Patent -# -##
> -
> -ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
> -ASM_PFX(CallPeiCoreEntryPoint):
> - #
> - # Obtain the hob list pointer
> - #
> - movl0x4(%esp), %eax
> - #
> - # Obtain the stack information
> - # ECX: start of range
> - # EDX: end of range
> - #
> - movl0x8(%esp), %ecx
> - movl0xC(%esp), %edx
> -
> - #
> - # Platform init
> - #
> - pushal
> - pushl %edx
> - pushl %ecx
> - pushl %eax
> - call ASM_PFX(PlatformInit)
> - popl %eax
> - popl %eax
> - popl %eax
> - popal
> -
> - #
> - # Set stack top pointer
> - #
> - movl%edx, %esp
> -
> - #
> - # Push the hob list pointer
> - #
> - pushl %eax
> -
> - #
> - # Save the value
> - # ECX: start of range
> - # EDX: end of range
> - #
> - movl%esp, %ebp
> - pushl %ecx
> - pushl %edx
> -
> - #
> - # Push processor count to stack first, then BIST status (AP then BSP)
> - #
> - movl$1, %eax
> - cpuid
> - shr $16, %ebx
> - andl$0x00FF, %ebx
> - cmp $1, %bl
> - jae PushProcessorCount
> -
> - #
> - # Some processors report 0 logical processors. Effectively 0 = 1.
> - # So we fix up the processor count
> - #
> - inc %ebx
> -
> -PushProcessorCount:
> - pushl %ebx
> -
> - #
> - # We need to implement a long-term solution for BIST capture. For now,
> we just copy BSP BIST
> - # for all processor threads
> - #
> - xorl%ecx, %ecx
> - movb%bl, %cl
> -PushBist:
> - movd%mm0, %eax
> - pushl %eax
> - loopPushBist
> -
> - # Save Time-Stamp Counter
> - movd %mm5, %eax
> - pushl %eax
> -
> - movd %mm6, %eax
> - pushl %eax
> -
> - #
> - # Pass entry point of the PEI core
> - #
> - movl$0xFFE0, %edi
> - pushl %ds:(%edi)
> -
> - #
> - # Pass BFV into the PEI Core
> - #
> - movl$0xFFFC, %edi
> - pushl %ds:(%edi)
> -
> - #
> - # Pass stack size into the PEI Core
> - #
> - movl-4(%ebp), %ecx
> - movl
[edk2-devel] [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build support
From: Prince Agyeman
Fixes:
* Replacing .asm and .S with nasm in SecFspWrapperPlatformSecLib
for cross-platform build support
* Modified RuleInclude.fdf
* Modified python files to be OS independent
Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0,
nasm version 2.11.08
Cc: Michael Kubacki
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Ankit Sinha
Signed-off-by: Prince Agyeman
---
.../Ia32/PeiCoreEntry.S| 117 ---
.../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 46 +--
.../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 342 -
.../Ia32/{SecEntry.asm => SecEntry.nasm} | 132
.../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 67
.../Ia32/{Stack.asm => Stack.nasm} | 39 ++-
.../SecFspWrapperPlatformSecLib.inf| 12 +-
.../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 6 +-
.../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
.../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 8 +-
.../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 15 +-
Platform/Intel/build_bios.py | 28 +-
12 files changed, 143 insertions(+), 671 deletions(-)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{PeiCoreEntry.asm
=> PeiCoreEntry.nasm} (66%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/SecEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{SecEntry.asm
=> SecEntry.nasm} (72%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/Stack.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{Stack.asm
=> Stack.nasm} (59%)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
deleted file mode 100644
index 8c8356f..000
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
+++ /dev/null
@@ -1,117 +0,0 @@
-## @file
-# Find and call SecStartup
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
-ASM_PFX(CallPeiCoreEntryPoint):
- #
- # Obtain the hob list pointer
- #
- movl0x4(%esp), %eax
- #
- # Obtain the stack information
- # ECX: start of range
- # EDX: end of range
- #
- movl0x8(%esp), %ecx
- movl0xC(%esp), %edx
-
- #
- # Platform init
- #
- pushal
- pushl %edx
- pushl %ecx
- pushl %eax
- call ASM_PFX(PlatformInit)
- popl %eax
- popl %eax
- popl %eax
- popal
-
- #
- # Set stack top pointer
- #
- movl%edx, %esp
-
- #
- # Push the hob list pointer
- #
- pushl %eax
-
- #
- # Save the value
- # ECX: start of range
- # EDX: end of range
- #
- movl%esp, %ebp
- pushl %ecx
- pushl %edx
-
- #
- # Push processor count to stack first, then BIST status (AP then BSP)
- #
- movl$1, %eax
- cpuid
- shr $16, %ebx
- andl$0x00FF, %ebx
- cmp $1, %bl
- jae PushProcessorCount
-
- #
- # Some processors report 0 logical processors. Effectively 0 = 1.
- # So we fix up the processor count
- #
- inc %ebx
-
-PushProcessorCount:
- pushl %ebx
-
- #
- # We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
- # for all processor threads
- #
- xorl%ecx, %ecx
- movb%bl, %cl
-PushBist:
- movd%mm0, %eax
- pushl %eax
- loopPushBist
-
- # Save Time-Stamp Counter
- movd %mm5, %eax
- pushl %eax
-
- movd %mm6, %eax
- pushl %eax
-
- #
- # Pass entry point of the PEI core
- #
- movl$0xFFE0, %edi
- pushl %ds:(%edi)
-
- #
- # Pass BFV into the PEI Core
- #
- movl$0xFFFC, %edi
- pushl %ds:(%edi)
-
- #
- # Pass stack size into the PEI Core
- #
- movl-4(%ebp), %ecx
- movl-8(%ebp), %edx
- pushl %ecx # RamBase
-
- subl%ecx, %edx
- pushl %edx # RamSize
-
- #
- # Pass Control into the PEI Core
- #
- call ASM_PFX(SecStartup)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.asm
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.nasm
similarity index 66%
rename from
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.asm
rename to
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.nasm
index c854067..5c5b788 100644
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