[GSOC - Tracing] Status Update
Hi! I have updated the weekly status of my work on the GSoC tracking page. Here is a summary of it: Progress so far: - Still working on adding rtrace shell capability to convert RTEMS traces into CTF. There has been progress which I will push to ( https://github.com/VidushiVashishth/rtems) by end of today. - I have gone through libdebugger's abstraction of transport interfaces in preparation of the second phase. I need to deliver a transport mechanism to transfer buffers to the host in this phase. Next up: - Submit mergeable code for CTF integration - Write a blog on the possible transport mechanisms to be explored ( https://vidushivashishth.github.io/seventhpost/) - Setup qemu for ARM as working environment to try qemu fat files and file transfer as a method of transport. Thanks! ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [GSoC - x86_64 port] Status update - June 21
On Thu, Jun 21, 2018 at 5:42 PM, Amaan Cheval wrote: > Hi! > > In lieu of our weekly meeting, here's a quick status update. The past > week, I worked on: > - Making FreeBSD's bootloader load a custom ELF kernel, and then RTEMS > static binaries > - Fixing cpu.h up to reflect the x86_64 feature set > - Fixing the linker script up for my stub to allow for sysinit > functions to be included and called > - WIP: Context initialization and switching code > > Next up (estimating 2 weeks until complete): > - Finish all of the RTEMS initialization required to get to bsp_start > successfully (for eg. it seems like sysinit calls filesystem > initialization routines, which I'm stubbing out for now, but will need > to implement to avoid having the testsuite end up throwing > "rtems_fatal_error_occurred". Quick update to my update - we're already reaching bsp_start since it's called through the sysinit functions. What I meant was getting to the user's Init task - i.e. going through stubs of the entire initialization chain as much as is possible, and hitting the user-defined Init task. Once that's done, I'll be filling in the stub with working / minimal code enough to get the console working and hello.exe passing. > - Port FreeBSD's console code to get to hello world with our stub > > I'm aiming to get to a hacky working hello.exe as soon as possible, > and then we can work on making all the initialization routines, the > linker script. etc. be clean and perfectly correct instead of merely > functional in the emulator. > > Cheers ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[GSoC - x86_64 port] Status update - June 21
Hi! In lieu of our weekly meeting, here's a quick status update. The past week, I worked on: - Making FreeBSD's bootloader load a custom ELF kernel, and then RTEMS static binaries - Fixing cpu.h up to reflect the x86_64 feature set - Fixing the linker script up for my stub to allow for sysinit functions to be included and called - WIP: Context initialization and switching code Next up (estimating 2 weeks until complete): - Finish all of the RTEMS initialization required to get to bsp_start successfully (for eg. it seems like sysinit calls filesystem initialization routines, which I'm stubbing out for now, but will need to implement to avoid having the testsuite end up throwing "rtems_fatal_error_occurred". - Port FreeBSD's console code to get to hello world with our stub I'm aiming to get to a hacky working hello.exe as soon as possible, and then we can work on making all the initialization routines, the linker script. etc. be clean and perfectly correct instead of merely functional in the emulator. Cheers ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH] 5: Use GCC 8 snapshot for RISC-V
This picks up the new multilib set for RISC-V.
Update #3452.
---
rtems/config/5/rtems-riscv32.bset | 2 +-
rtems/config/5/rtems-riscv64.bset | 2 +-
...0c82e0726ed44de4a9b0a29ed6b276-newlib-3.0.0.cfg | 26 ++
3 files changed, 28 insertions(+), 2 deletions(-)
create mode 100644
rtems/config/tools/rtems-gcc-2e2052934b0c82e0726ed44de4a9b0a29ed6b276-newlib-3.0.0.cfg
diff --git a/rtems/config/5/rtems-riscv32.bset
b/rtems/config/5/rtems-riscv32.bset
index b01bd3f..07853b5 100644
--- a/rtems/config/5/rtems-riscv32.bset
+++ b/rtems/config/5/rtems-riscv32.bset
@@ -11,7 +11,7 @@
devel/expat-2.1.0-1
tools/rtems-binutils-160d1b3d74593bf42155da24569f54a6e7140f65
-tools/rtems-gcc-7.3.0-newlib-3.0.0
+tools/rtems-gcc-2e2052934b0c82e0726ed44de4a9b0a29ed6b276-newlib-3.0.0
tools/rtems-gdb-160d1b3d74593bf42155da24569f54a6e7140f65
tools/rtems-tools-5-1
tools/rtems-kernel-5
diff --git a/rtems/config/5/rtems-riscv64.bset
b/rtems/config/5/rtems-riscv64.bset
index 2febfac..0b4e676 100644
--- a/rtems/config/5/rtems-riscv64.bset
+++ b/rtems/config/5/rtems-riscv64.bset
@@ -11,7 +11,7 @@
devel/expat-2.1.0-1
tools/rtems-binutils-160d1b3d74593bf42155da24569f54a6e7140f65
-tools/rtems-gcc-7.3.0-newlib-3.0.0
+tools/rtems-gcc-2e2052934b0c82e0726ed44de4a9b0a29ed6b276-newlib-3.0.0
tools/rtems-gdb-160d1b3d74593bf42155da24569f54a6e7140f65
tools/rtems-tools-5-1
tools/rtems-kernel-5
diff --git
a/rtems/config/tools/rtems-gcc-2e2052934b0c82e0726ed44de4a9b0a29ed6b276-newlib-3.0.0.cfg
b/rtems/config/tools/rtems-gcc-2e2052934b0c82e0726ed44de4a9b0a29ed6b276-newlib-3.0.0.cfg
new file mode 100644
index 000..9eb94b4
--- /dev/null
+++
b/rtems/config/tools/rtems-gcc-2e2052934b0c82e0726ed44de4a9b0a29ed6b276-newlib-3.0.0.cfg
@@ -0,0 +1,26 @@
+%include %{_configdir}/checks.cfg
+%include %{_configdir}/base.cfg
+
+%define gcc_version 2e2052934b0c82e0726ed44de4a9b0a29ed6b276
+%define gcc_external 1
+%define gcc_expand_name gnu-mirror-gcc-%{gcc_version}
+%source set gcc --rsb-file=%{gcc_expand_name}.tar.gz
https://codeload.github.com/RTEMS/gnu-mirror-gcc/tar.gz/%{gcc_version}
+%hash sha512 %{gcc_expand_name}.tar.gz
de1e26769a81332e914946f536b0fafaf66b0a99cd017315f6531946a7dd1959e5332a793b65cbd0bb73cc086efd8df2e3abaf74d272197c7635d91e1ef94b71
+
+%define newlib_version 3.0.0
+%hash sha512 newlib-3.0.0.tar.gz
d4730ce9a4fc4e62052e89d20d4a3855a103b3d1a2818e94c7a68626db285aa8db8e56a684103731916bfba3e581db88e3a93264034ea0f2880ee8976283c04f
+
+%define mpfr_version 3.1.4
+%hash sha512 mpfr-3.1.4.tar.bz2
51066066ff2c12ed2198605ecf68846b0c96b548adafa5b80e0c786d0df488411a5e8973358fce7192dc977ad4e68414cf14500e3c39746de62465eb145bb819
+
+%define mpc_version 1.0.3
+%hash sha512 mpc-1.0.3.tar.gz
0028b76df130720c1fad7de937a0d041224806ce5ef76589f19c7b49d956071a683e2f20d154c192a231e69756b19e48208f2889b0c13950ceb7b3cfaf059a43
+
+%define gmp_version 6.1.0
+%hash sha512 gmp-6.1.0.tar.bz2
3c82aeab9c1596d4da8afac2eec38e429e84f3211e1a572cf8fd2b546493c44c039b922a1133eaaa48bd7f3e11dbe795a384e21ed95cbe3ecc58d7ac02246117
+
+%define with_threads 1
+%define with_plugin 0
+%define with_iconv 1
+
+%include %{_configdir}/gcc-7.2-1.cfg
--
2.13.7
___
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http://lists.rtems.org/mailman/listinfo/devel
Re: [GSoC - Tracing] Status
Hello Vidushi, On 12/06/18 14:22, Vidushi Vashishth wrote: >in case you receive comments for your patches the highest priority should be to fix the problems with the patches and send the next revision of the patch to the list, e.g. fixing trivial things like the line ?>length should be done in a couple of minutes. If you think a comment is invalid or makes no sense, then please say this also. The patch review process should be as fast as possible. I wasn't finished with the documentation and I intended to incorporate the line length change in the next patch. I got caught up with the babeltrace conversion hence did not work on the documentation patches. I am sorry you feel unhappy about the visibility of my work. I will follow your instructions more carefully. I will upload example codes to my github repository and notify you. >I need to know which tools I have to installon top of the standard RTEMS tools on a normal Linux machine. Babeltrace is the only tool you need to install for now. The instructions to install it are mentioned in : http://diamon.org/babeltrace/ I will add these details to the github repository too. I will make the necessary changes in the user manual as well. Chris committed your user manual changes on Monday. There was no status report this Monday from you. The last blog post is from June 6 (https://vidushivashishth.github.io/). There is no github repository with your work. I don't know what you are currently doing? -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH v2 2/3] bsps: Support .rtemsstack.* linker input sections
Use a dedicated memory region or place it between the BSS and workspace. Update #3459. --- bsps/arm/shared/start/linkcmds.base | 3 +++ bsps/bfin/TLL6527M/start/linkcmds | 8 ++-- bsps/bfin/bf537Stamp/start/linkcmds | 8 ++-- bsps/bfin/eZKit533/start/linkcmds | 8 ++-- bsps/epiphany/epiphany_sim/start/linkcmds | 6 +- bsps/i386/pc386/start/linkcmds| 5 +++-- bsps/lm32/lm32_evr/start/linkcmds | 6 -- bsps/lm32/milkymist/start/linkcmds| 7 --- bsps/m32c/m32cbsp/start/linkcmds | 5 + bsps/m68k/av5282/start/linkcmds | 4 bsps/m68k/av5282/start/linkcmdsflash | 3 +++ bsps/m68k/av5282/start/linkcmdsram| 4 bsps/m68k/csb360/start/linkcmds | 9 + bsps/m68k/gen68340/start/linkcmds | 3 +++ bsps/m68k/gen68360/start/linkcmds | 3 +++ bsps/m68k/gen68360/start/linkcmds.bootp | 3 +++ bsps/m68k/gen68360/start/linkcmds.prom| 3 +++ bsps/m68k/mcf5206elite/start/linkcmds | 5 +++-- bsps/m68k/mcf5206elite/start/linkcmds.flash | 5 +++-- bsps/m68k/mcf52235/start/linkcmds | 4 bsps/m68k/mcf5225x/start/linkcmds | 4 bsps/m68k/mcf5235/start/linkcmds | 3 +++ bsps/m68k/mcf5235/start/linkcmdsflash | 3 +++ bsps/m68k/mcf5235/start/linkcmdsram | 4 bsps/m68k/mcf5329/start/linkcmds | 4 bsps/m68k/mcf5329/start/linkcmdsflash | 4 bsps/m68k/mrm332/start/linkcmds | 4 +++- bsps/m68k/shared/start/linkcmds.base | 4 bsps/m68k/uC5282/start/linkcmds | 4 bsps/mips/csb350/start/linkcmds | 9 + bsps/mips/hurricane/start/linkcmds| 5 - bsps/mips/jmr3904/start/linkcmds | 7 ++- bsps/mips/malta/start/linkcmds| 7 ++- bsps/mips/rbtx4925/start/linkcmds | 5 - bsps/mips/rbtx4938/start/linkcmds | 5 - bsps/moxie/moxiesim/start/linkcmds| 3 +++ bsps/nios2/nios2_iss/start/linkcmds | 4 bsps/or1k/shared/start/linkcmds.base | 6 +- bsps/powerpc/gen5200/start/linkcmds.gen5200_base | 6 +- bsps/powerpc/gen83xx/start/linkcmds.mpc83xx | 2 +- bsps/powerpc/haleakala/start/linkcmds | 7 +-- bsps/powerpc/include/bsp/linker-symbols.h | 6 +++--- bsps/powerpc/mpc55xxevb/start/linkcmds.gwlcfm | 2 +- bsps/powerpc/mpc55xxevb/start/linkcmds.mpc5566evb | 2 +- bsps/powerpc/mpc55xxevb/start/linkcmds.mpc5643l_evb | 2 +- bsps/powerpc/mpc55xxevb/start/linkcmds.mpc5668g | 2 +- bsps/powerpc/mpc55xxevb/start/linkcmds.mpc5674f_ecu508| 2 +- bsps/powerpc/mpc55xxevb/start/linkcmds.mpc5674f_rsm6_base | 2 +- bsps/powerpc/mpc55xxevb/start/linkcmds.mpc5674fevb| 2 +- bsps/powerpc/mpc55xxevb/start/linkcmds.phycore_mpc5554| 2 +- bsps/powerpc/mpc8260ads/start/linkcmds| 4 bsps/powerpc/psim/start/linkcmds | 2 +- bsps/powerpc/qemuppc/start/linkcmds | 2 +- bsps/powerpc/qoriq/start/linkcmds.qoriq_core_0| 2 +- bsps/powerpc/qoriq/start/linkcmds.qoriq_core_1| 2 +- bsps/powerpc/qoriq/start/linkcmds.qoriq_e500 | 2 +- bsps/powerpc/qoriq/start/linkcmds.qoriq_e6500_32 | 2 +- bsps/powerpc/qoriq/start/mmu-config.c | 2 +- bsps/powerpc/shared/start/linkcmds.base | 11 ++- bsps/powerpc/shared/start/linkcmds.share | 4 bsps/powerpc/ss555/start/linkcmds | 4 bsps/powerpc/t32mppc/start/linkcmds.t32mppc | 2 +- bsps/powerpc/tqm8xx/start/linkcmds| 2 +- bsps/powerpc/virtex/start/linkcmds.in | 2 +- bsps/powerpc/virtex4/start/linkcmds | 7 +-- bsps/powerpc/virtex5/start/linkcmds | 7 +-- bsps/riscv/riscv_generic/start/linkcmds | 6 +- bsps/sh/gensh1/start/linkcmds | 4 bsps/sh/gensh2/start/linkcmds | 4 bsps/sh/gensh2/start/linkcmds.ram | 5 - bsps/sh/gensh2/start/linkcmds.rom
[PATCH v2 1/3] score: Add CPU_INTERRUPT_STACK_ALIGNMENT
Add CPU port define for the interrupt stack alignment. The alignment
should take the stack ABI and the cache line size into account.
Update #3459.
---
cpukit/score/cpu/arm/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/bfin/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/epiphany/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/i386/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/lm32/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/m32c/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/m68k/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/mips/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/moxie/include/rtems/score/cpu.h| 2 ++
cpukit/score/cpu/nios2/include/rtems/score/cpu.h| 2 ++
cpukit/score/cpu/no_cpu/include/rtems/score/cpu.h | 8
cpukit/score/cpu/or1k/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/riscv/include/rtems/score/cpu.h| 5 +
cpukit/score/cpu/sh/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/sparc/include/rtems/score/cpu.h| 2 ++
cpukit/score/cpu/sparc64/include/rtems/score/cpu.h | 2 ++
cpukit/score/cpu/v850/include/rtems/score/cpu.h | 2 ++
18 files changed, 45 insertions(+)
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
index f5827b4fc6..3f06c036f0 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
@@ -165,6 +165,8 @@
/* AAPCS, section 5.2.1.2, Stack constraints at a public interface */
#define CPU_STACK_ALIGNMENT 8
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
/*
* Bitfield handler macros.
*
diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h
b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h
index a361e023ed..d3e4e4b057 100644
--- a/cpukit/score/cpu/bfin/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/bfin/include/rtems/score/cpu.h
@@ -563,6 +563,8 @@ typedef struct {
*/
#define CPU_STACK_ALIGNMENT8
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
#ifndef ASM
/*
diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h
b/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h
index 84565d15d2..65f28ac435 100644
--- a/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/epiphany/include/rtems/score/cpu.h
@@ -465,6 +465,8 @@ typedef Context_Control CPU_Interrupt_frame;
#define CPU_STACK_ALIGNMENT8
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
/* ISR handler macros */
/*
diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpu.h
b/cpukit/score/cpu/i386/include/rtems/score/cpu.h
index 0986663be1..226d20b85f 100644
--- a/cpukit/score/cpu/i386/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/include/rtems/score/cpu.h
@@ -384,6 +384,8 @@ extern Context_Control_fp _CPU_Null_fp_context;
#define CPU_STACK_ALIGNMENT 16
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
/* macros */
#ifndef ASM
diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
index fe8107c51b..77f3389f39 100644
--- a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
@@ -581,6 +581,8 @@ extern Context_Control_fp _CPU_Null_fp_context;
*/
#define CPU_STACK_ALIGNMENTCPU_ALIGNMENT
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
/*
* ISR handler macros
*/
diff --git a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
index c5486e80d6..3f23c21d88 100644
--- a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
@@ -556,6 +556,8 @@ typedef struct {
*/
#define CPU_STACK_ALIGNMENT0
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
/*
* ISR handler macros
*/
diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h
b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h
index 459ef8a9cd..bd1f29abe4 100644
--- a/cpukit/score/cpu/m68k/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m68k/include/rtems/score/cpu.h
@@ -355,6 +355,8 @@ extern void* _VBR;
#define CPU_STACK_ALIGNMENT0
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
#ifndef ASM
/* macros */
diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpu.h
b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
index 46d1eb28e8..c20e5f4f01 100644
--- a/cpukit/score/cpu/mips/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
@@ -631,6 +631,8 @@ extern Context_Control_fp _CPU_Null_fp_context;
#define CPU_STACK_ALIGNMENTCPU_ALIGNMENT
+#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES
+
void mips_vector_exceptions( CPU_Interrupt_frame *frame );
/*
diff --git
