Re: Question about Raspberry Pi bspstarthooks.c - potential patch

[Sebastian Huber]

On 02/07/2021 21:07, Alan Cudmore wrote:

I tried to implement the deprecated cp15 ARMv6 data sync and
instruction sync barriers in the code below. I'm not sure if I got it
right.
The samples run on the single core models, but they also run without
the sync instructions (the commented out code).

For the conditional code, I chose the __ARM_ARCH_6KZ__ define, since
it is set by the arch switch the Pi 1 BSP uses. Not all ARMv6 models
have the CP15 VBAR, so in the unlikely event we added an even older
ARMv6 it would break. I can change it to __ARM_ARCH == 6 if that is
preferred.

At this point, my questions are:
1. Is the define OK?


Yes, the define is good.


2. Include the sync barriers for ARMv6 or not?
3. If we keep the sync barriers, are they good enough, or do they need
more work?


I would keep the barriers. It seems the opcodes are the right ones:

/* CP15DSB, Data Synchronization Barrier System instruction */

static inline void _AArch32_Write_cp15dsb( uint32_t value )
{
  __asm__ volatile (
"mcr p15, 0, %0, c7, c10, 4" : : "r" ( value ) : "memory"
  );
}

/* CP15ISB, Instruction Synchronization Barrier System instruction */

static inline void _AArch32_Write_cp15isb( uint32_t value )
{
  __asm__ volatile (
"mcr p15, 0, %0, c7, c5, 4" : : "r" ( value ) : "memory"
  );
}



Thanks,
Alan

Patch:

diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S
index 698495d32e..bb8ad24e96 100644
--- a/bsps/arm/shared/start/start.S
+++ b/bsps/arm/shared/start/start.S
@@ -482,16 +482,26 @@ bsp_start_hook_0_done:

  .Lvector_table_copy_done:

-#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
 /*
  * This code path is only executed by the primary processor.  Set the
  * VBAR to the normal vector table.  For secondary processors, this is
  * done by bsp_start_hook_0().
  */
+#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
 ldr r0, =bsp_vector_table_begin
 dsb
 mcr p15, 0, r0, c12, c0, 0
 isb
+#elif defined __ARM_ARCH_6KZ__
+/*
+** ldr r0, =bsp_vector_table_begin
+** mcr p15, 0, r0, c12, c0, 0
+*/
+mov r1, #0
+ldr r0, =bsp_vector_table_begin
+mcr p15, 0, r1, c7, c10, 4  /* DataSync */
+mcr p15, 0, r0, c12, c0, 0  /* Load VBAR */
+mcr p15, 0, r1, c7, c5, 4   /* Flush Prefetch */
  #endif

 SWITCH_FROM_ARM_TO_THUMBr3

On Thu, Jul 1, 2021 at 10:02 AM Sebastian Huber
 wrote:


On 01/07/2021 15:43, Alan Cudmore wrote:

The define works, but Armv6 does not implement dsb and isb.


Ok, I think there are some (now deprecated) CP15 registers for dsb and isb.


I created a separate #if block for Armv6 without the dsb and isb
instructions and it seems to work on the Raspberry Pi Zero.
Do you think the equivalent synchronization operations are necessary
here? If so, I can research and test them. I found some references on
Raspberry Pi forums that I can follow (also had links to the ARM
manuals)

Also, for the #if blocks, would you prefer this style:
#if (7A or 8)
..
#else if (6)
..
#endif


Yes, this would be good.

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Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

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Registernummer: HRB 157899
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Re: [PATCH] Fix compiler warnings for schedulerstrongapa.c

[Sebastian Huber]

On 03/07/2021 09:06, Richi Dubey wrote:

---
  cpukit/score/src/schedulerstrongapa.c | 21 -
  1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/cpukit/score/src/schedulerstrongapa.c 
b/cpukit/score/src/schedulerstrongapa.c
index 845d19d1a8..b34ffe4b6d 100644
--- a/cpukit/score/src/schedulerstrongapa.c
+++ b/cpukit/score/src/schedulerstrongapa.c
@@ -187,7 +187,7 @@ static inline Scheduler_Node * 
_Scheduler_strong_APA_Find_highest_ready(
uint32_t  rear
  )
  {
-  Scheduler_Node  *highest_ready;
+  Scheduler_Node  *highest_ready = NULL;
Scheduler_strong_APA_CPU*CPU;
const Chain_Node*tail;
Chain_Node  *next;
@@ -259,6 +259,10 @@ static inline Scheduler_Node * 
_Scheduler_strong_APA_Find_highest_ready(
  }
}
  
+  /*

+   * By definition, the system would always have a ready node,
+   * hence highest_ready would not be NULL.
+   */
return highest_ready;


Could you please add an _Assert( highest_ready != NULL ) statement here 
and also to the following parts.


--
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Re: CPU Context Switch Confusion

[Richi Dubey]

Hi,

You can try setting up breakpoints at various scheduler decision points,
and the function that is called by the executing thread just before it
performs context switch. Did you try that?

On Thu, Jul 1, 2021 at 4:36 AM  wrote:

> Hello,
>
>
>
> I am working on re-implementing support for the uC5282 board in Qemu for
> use with RTEMS. I think I am getting close, but am running into some
> debugging issues in regards to context switching. I am using the RTEMS
> ‘hello’ application for uC5282 to work on and debug my modifications.
> Currently, at some point during execution, the context of RTEMS goes to the
> idle thread instead of the init thread. I am struggling somewhat with
> finding a way to debug this context switch, and would really appreciate any
> advice or help if anyone may have some to give! I can also explain more
> thoroughly what is happening, along with providing debugging info, if
> anyone would like to help or has any ideas!
>
>
>
> Thanks so much,
>
>
>
> *Harrison Gerber*
>
> gerberh...@gmail.com
>
> 720-288-7308
>
>
>
>
> 
>  Virus-free.
> www.avast.com
> 
> <#m_8693570744630818080_DAB4FAD8-2DD7-40BB-A1B8-4E2AA1F9FDF2>
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RTEMS on uC5282

[Vijay Kumar Banerjee]

Hi,

I have a uC5282 board running uClinux and I was wondering if someone
has instructions for converting the RTEMS exe files into boot files
that can be booted from the ram buffer (using `goram` from
uCbootloader.

The RTEMS documentation is empty:
https://docs.rtems.org/branches/master/user/bsps/bsps-m68k.html#uc5282

I will populate this section in the documentation once I figure out
how to run and debug RTEMS executables on it. Any help is much
appreciated.



Best regards,
Vijay
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WAF build system: configure to prepend .o to all links?

[Peter Dufault]

I want to build the i.MX RT BSP with a custom DTS file.  It's easy to build an 
application using ones own "dts.o" file, but I want to build all the BSP tests 
with my dts.o.  For now I just change the one in the tree but I don't want to 
do that.  I don't want a BSP variant, either, since it's a custom board that 
shouldn't have changes in the tree.

I want to get my "dts.o" in the link commands before the "-lrtemsbsp".  I 
looked through what is in "config.ini" and don't see what I need.  I can't 
over-ride LDFLAGS since that is appended in the command line after the 
libraries were already added.  So I want to add a .o to the sources or a flag 
that goes in after the "-o" for the program output.

Is there a way to do that?  I even tried setting LINK_CC but though "waf 
configure" warned be it was set it didn't use it.





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