Re: [PATCH] cpukit/fdt: Free index before container

[Chris Johns]

OK to push.

Should 5 be updated? Consider OK for 5 as well.

Thanks
Chris

On 29/9/2022 7:12 am, Kinsey Moore wrote:
> Ensure that the index is released before the structure containing it is
> freed and NULLed.
> 
> Updates #4460
> ---
>  cpukit/libmisc/rtems-fdt/rtems-fdt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/cpukit/libmisc/rtems-fdt/rtems-fdt.c 
> b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
> index 1d3b82ae29..bea01dbf78 100644
> --- a/cpukit/libmisc/rtems-fdt/rtems-fdt.c
> +++ b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
> @@ -700,14 +700,14 @@ rtems_fdt_unload (rtems_fdt_handle* handle)
>  
>rtems_chain_extract_unprotected (>blob->node);
>  
> +  rtems_fdt_release_index(>blob->index);
> +
>free (handle->blob);
>  
>handle->blob = NULL;
>  
>rtems_fdt_unlock (fdt);
>  
> -  rtems_fdt_release_index(>blob->index);
> -
>return 0;
>  }
>  
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Re: [PATCH] spec/pkgconfig: Allow builds to override headers

[Chris Johns]

On 29/9/2022 7:13 am, Kinsey Moore wrote:
> This allows any builds targeting an installed RTEMS BSP to override
> headers in the installed BSP reliably, including headers previously
> installed by that or other builds. This includes applications, network
> stacks, libraries, and any other builds.

I am a little confused by these comments. This change effects the generated .pc
file for a BSP so it is only used once it is installed. An install should update
the headers at the same time the .pc is installed and made available so what is
old or previous? What are the "builds targeting" you refer too?

I think defining the include search of RTEMS BSP and any vertical stack packages
headers installed under the same prefix as system headers seems like the right
thing to do. However this change will silence warnings from RTEMS (and installed
packages). Is that want we want?

Chris

> ---
>  spec/build/bsps/pkgconfig.yml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/spec/build/bsps/pkgconfig.yml b/spec/build/bsps/pkgconfig.yml
> index a9462fcc95..8a3c3677a4 100644
> --- a/spec/build/bsps/pkgconfig.yml
> +++ b/spec/build/bsps/pkgconfig.yml
> @@ -22,7 +22,7 @@ content: |
>Name: ${ARCH}-rtems${__RTEMS_MAJOR__}-${BSP_NAME}
>Version: ${RTEMS_VERSION}
>Description: RTEMS BSP ${ARCH}/${BSP_NAME}
> -  Cflags: $${ABI_FLAGS} -I$${includedir}
> +  Cflags: $${ABI_FLAGS} -isystem$${includedir}
>Ldflags: -B$${libdir} ${PKGCONFIG_LDFLAGS}
>Libs: -B$${libdir} ${PKGCONFIG_LDFLAGS}
>  copyrights:
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Re: [PATCH] cpukit/fdt: Check correct allocation

[Chris Johns]

OK and thanks.

Should this be fixed on 5 as well? If you think so consider it OK as well.

Thanks
Chris

On 29/9/2022 7:12 am, Kinsey Moore wrote:
> The second allocation check was mistakenly rechecking the first
> allocation. It now checks the correct allocation and ensures that names
> is not NULL.
> 
> Updates #4462
> ---
>  cpukit/libmisc/rtems-fdt/rtems-fdt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/cpukit/libmisc/rtems-fdt/rtems-fdt.c 
> b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
> index 7dd2bc1047..1d3b82ae29 100644
> --- a/cpukit/libmisc/rtems-fdt/rtems-fdt.c
> +++ b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
> @@ -182,7 +182,7 @@ rtems_fdt_init_index (rtems_fdt_handle* fdt, 
> rtems_fdt_blob* blob)
>}
>  
>names = calloc(1, total_name_memory);
> -  if (!entries)
> +  if (!names)
>{
>  free(entries);
>  return -RTEMS_FDT_ERR_NO_MEMORY;
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Re: [rtems-source-builder commit] sb/setbuilder: Correctly create build set tar files

[Chris Johns]

On 28/9/2022 11:42 pm, Christian MAUDERER wrote:
> Hello,
> 
> with this patch, I don't get a tar for devel/qemu and for the 
> 6/rtems-microblaze
> anymore. All other 6/rtems-* toolchains work without problems. I haven't 
> tested
> a lot of the other packages.
> 
> The bset for microblaze is a bit different from the other ones. But I'm not 
> yet
> sure what the relevant difference is.
> 
> @Chris: With your change: What is necessary that a bset can generate a tar 
> archive?

It could be a bug if the tools builds work, ie 6/rtems-*. Please raise a ticket?

I changed the --bset-tar-file option to create a single tarfile of the final
staged output of a build. There were a few commits to get this right so I assume
you are testing on the latest?

Incremental tarfiles based on separate buildsets in a buildset may have worked
in some cases however there were some basic issues in how it was implemented.
When you add deployment requirements on top it did not match up well and it was
confusing. The best solution was to rebase the tarfile against the final staged
output as that is known to be correct in all cases.

I have created a https://git.rtems.org/chrisj/rtems-deployment.git repo and in
it a config test directory
(https://git.rtems.org/chrisj/rtems-deployment.git/tree/config/test). I will
look at adding a test to make sure we catch any issues.

Thanks
Chris
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Re: [PATCH 0/1] GCC errors when building C++ Applications with libbsd

[Sebastian Huber]

On 26.09.22 19:00, kho237...@gmx.de wrote:

From: "Markus B. Moessner"

Dear all, I am using the latest RTEMS 6 tools and sources. When building a C++ 
application including libbsd I receive an error from GCC.
GCC complains about the macro BITSET_DEFINE within freebsd/sys/sys/_domainset.h. I think this relates to a patch "sys/bitset.h: reduce 
visibility of BIT_* macros" within the freebsd sourcehttps://github.com/freebsd/freebsd-src/commit/5e04571cf3cf4024be926976a6abf19626df30be.

I ve simply changed BITSET_DEFINE to __BITSET_DEFINE as shown in the patch. 
This makes compilation work on my side, but there are a few other occurences of
BITSET_DEFINE within rtems and libbsd.

As Sebastian pointed out, it is fixed like this in the FreeBSD upstream.


I checked in a back port of the upstream fix.

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Re: [rtems-source-builder commit] sb/setbuilder: Correctly create build set tar files

[Christian MAUDERER]

Hello,

with this patch, I don't get a tar for devel/qemu and for the 
6/rtems-microblaze anymore. All other 6/rtems-* toolchains work without 
problems. I haven't tested a lot of the other packages.


The bset for microblaze is a bit different from the other ones. But I'm 
not yet sure what the relevant difference is.


@Chris: With your change: What is necessary that a bset can generate a 
tar archive?


Best regards

Christian

Am 19.09.22 um 23:24 schrieb Chris Johns:

Module:rtems-source-builder
Branch:5
Commit:828feec622c3ebfdf96a50f5789fcace93717f82
Changeset: 
http://git.rtems.org/rtems-source-builder/commit/?id=828feec622c3ebfdf96a50f5789fcace93717f82

Author:Chris Johns 
Date:  Thu Sep  1 16:20:44 2022 +1000

sb/setbuilder: Correctly create build set tar files

- Make a single tarfile for all buildsets built

- Use the staging tree as the tarfile source

- Use python's tarfile module

- Create a config.file object without loading a .cfg file

Updates #4716

---

  source-builder/sb/config.py |  5 ++--
  source-builder/sb/setbuilder.py | 58 +
  2 files changed, 39 insertions(+), 24 deletions(-)

diff --git a/source-builder/sb/config.py b/source-builder/sb/config.py
index 9250896..24590eb 100644
--- a/source-builder/sb/config.py
+++ b/source-builder/sb/config.py
@@ -258,7 +258,7 @@ class file:
  re.compile('%select'),
  re.compile('%disable') ]
  
-def __init__(self, name, opts, macros = None):

+def __init__(self, name, opts, macros = None, load = True):
  log.trace('config: %s: initialising' % (name))
  self.opts = opts
  self.init_name = name
@@ -267,7 +267,8 @@ class file:
  self.sf = re.compile(r'%\([^\)]+\)')
  self.set_macros(macros)
  self._reset(name)
-self.load(name)
+if load:
+self.load(name)
  
  def __str__(self):
  
diff --git a/source-builder/sb/setbuilder.py b/source-builder/sb/setbuilder.py

index 55bd86f..36fca46 100644
--- a/source-builder/sb/setbuilder.py
+++ b/source-builder/sb/setbuilder.py
@@ -30,11 +30,14 @@ import glob
  import operator
  import os
  import sys
+import tarfile
+
  import textwrap
  
  try:

  import build
  import check
+import config
  import error
  import log
  import mailer
@@ -259,21 +262,31 @@ class buildset:
  self.root_copy(_build.config.expand('%{buildroot}'),
 _build.config.expand('%{_tmproot}'))
  
-def bset_tar(self, _build):

-tardir = _build.config.expand('%{_tardir}')
-if (self.opts.get_arg('--bset-tar-file') or 
self.opts.canadian_cross()) \
-   and not _build.macros.get('%{_disable_packaging}'):
+def bset_tar(self, stagingroot):
+if self.opts.get_arg('--bset-tar-file') or self.opts.canadian_cross():
+# Use a config to expand the macros because it supports all
+# expansions, ie %{_cwd}
+cfg = config.file(self.bset, self.opts, self.macros, load=False)
+prefix = cfg.expand('%{_prefix}')
+tardir = cfg.expand('%{_tardir}')
  path.mkdir(tardir)
-tar = path.join(tardir,
-_build.config.expand('%s.tar.bz2' % \
- 
(_build.main_package().name(
-log.notice('tarball: %s' % (os.path.relpath(path.host(tar
+tarname = path.join(tardir,
+path.basename('%s.tar.bz2' % (self.bset)))
+log.notice('tarfile: %s' % (os.path.relpath(path.host(tarname
  if not self.opts.dry_run():
-tmproot = _build.config.expand('%{_tmproot}')
-cmd = _build.config.expand('"cd ' + tmproot + \
-   ' && %{__tar} -cf - . | %{__bzip2} 
> ' + \
-   tar + '"')
-_build.run(cmd, shell_opts = '-c', cwd = tmproot)
+tar = None
+try:
+tar = tarfile.open(tarname, 'w:bz2')
+for filedir in sorted(path.listdir(stagingroot)):
+src = path.join(stagingroot, filedir)
+dst = path.join(prefix, filedir)
+log.trace('tar: %s -> %s' % (src, dst))
+tar.add(src, dst)
+except OSError as oe:
+raise error.general('tarfile: %s: %s' % (self.bset, oe))
+finally:
+if tar is not None:
+tar.close()
  
  def parse(self, bset):
  
@@ -500,8 +513,6 @@ class buildset:

  copy.copy(self.macros),
  format = 'xml',
  mail = mail)
-if s == len(configs) - 1 

[PATCH] spec/pkgconfig: Allow builds to override headers

[Kinsey Moore]

This allows any builds targeting an installed RTEMS BSP to override
headers in the installed BSP reliably, including headers previously
installed by that or other builds. This includes applications, network
stacks, libraries, and any other builds.
---
 spec/build/bsps/pkgconfig.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/spec/build/bsps/pkgconfig.yml b/spec/build/bsps/pkgconfig.yml
index a9462fcc95..8a3c3677a4 100644
--- a/spec/build/bsps/pkgconfig.yml
+++ b/spec/build/bsps/pkgconfig.yml
@@ -22,7 +22,7 @@ content: |
   Name: ${ARCH}-rtems${__RTEMS_MAJOR__}-${BSP_NAME}
   Version: ${RTEMS_VERSION}
   Description: RTEMS BSP ${ARCH}/${BSP_NAME}
-  Cflags: $${ABI_FLAGS} -I$${includedir}
+  Cflags: $${ABI_FLAGS} -isystem$${includedir}
   Ldflags: -B$${libdir} ${PKGCONFIG_LDFLAGS}
   Libs: -B$${libdir} ${PKGCONFIG_LDFLAGS}
 copyrights:
-- 
2.30.2

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[PATCH] cpukit/fdt: Free index before container

[Kinsey Moore]

Ensure that the index is released before the structure containing it is
freed and NULLed.

Updates #4460
---
 cpukit/libmisc/rtems-fdt/rtems-fdt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/cpukit/libmisc/rtems-fdt/rtems-fdt.c 
b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
index 1d3b82ae29..bea01dbf78 100644
--- a/cpukit/libmisc/rtems-fdt/rtems-fdt.c
+++ b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
@@ -700,14 +700,14 @@ rtems_fdt_unload (rtems_fdt_handle* handle)
 
   rtems_chain_extract_unprotected (>blob->node);
 
+  rtems_fdt_release_index(>blob->index);
+
   free (handle->blob);
 
   handle->blob = NULL;
 
   rtems_fdt_unlock (fdt);
 
-  rtems_fdt_release_index(>blob->index);
-
   return 0;
 }
 
-- 
2.30.2

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[PATCH] cpukit/fdt: Check correct allocation

[Kinsey Moore]

The second allocation check was mistakenly rechecking the first
allocation. It now checks the correct allocation and ensures that names
is not NULL.

Updates #4462
---
 cpukit/libmisc/rtems-fdt/rtems-fdt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cpukit/libmisc/rtems-fdt/rtems-fdt.c 
b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
index 7dd2bc1047..1d3b82ae29 100644
--- a/cpukit/libmisc/rtems-fdt/rtems-fdt.c
+++ b/cpukit/libmisc/rtems-fdt/rtems-fdt.c
@@ -182,7 +182,7 @@ rtems_fdt_init_index (rtems_fdt_handle* fdt, 
rtems_fdt_blob* blob)
   }
 
   names = calloc(1, total_name_memory);
-  if (!entries)
+  if (!names)
   {
 free(entries);
 return -RTEMS_FDT_ERR_NO_MEMORY;
-- 
2.30.2

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[PATCH rtems-libbsd 4/4] rtemsbsd/arasan_sdhci: Improve board/eMMC compat

[Kinsey Moore]

This improves the compatibility of this driver across board and memory
variants by avoiding use of the HISPD mode.
---
 rtemsbsd/sys/dev/sdhci/arasan_sdhci.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c 
b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
index bac6b148..0e87d903 100644
--- a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
+++ b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
@@ -279,6 +279,13 @@ arasan_sdhci_attach(device_t dev)
goto fail;
}
 
+   /*
+* There are some combinations of board routing and eMMC memory that are
+* not compatible with the HISPD mode. This disables HISPD mode for
+* compatibility.
+*/
+   sc->slot.quirks |= SDHCI_QUIRK_DONT_SET_HISPD_BIT;
+
/*
 * DMA is not really broken, it just isn't implemented yet.
 */
-- 
2.30.2

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[PATCH rtems-libbsd 2/4] rtemsbsd/arasan_sdhci: Update description

[Kinsey Moore]

This driver works on both the Zynq 7000 chips as well as the Zynq
Ultrascale+ MPSoC chips and targets the Arasan SDHCI IP that exists in
both.
---
 rtemsbsd/sys/dev/sdhci/arasan_sdhci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c 
b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
index 9dcab3b1..43231113 100644
--- a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
+++ b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
@@ -304,7 +304,7 @@ fail:
 static int
 arasan_sdhci_probe(device_t dev)
 {
-   device_set_desc(dev, "Zynq-7000 SDHCI");
+   device_set_desc(dev, "Arasan SDIO");
 
return (0);
 }
-- 
2.30.2

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[PATCH rtems-libbsd 3/4] rtemsbsd/arasan_sdhci: Remove redundant clock cap

[Kinsey Moore]

The BSD SD subsystem enforces a 50MHz clock cap for devices which don't
report their own maximum clock speed. This setting is unnecessary for
the Zynq 7000 version of this IP and restricts the Zynq Ultrascale+
MPSoC version of this IP without need since it reports its maximum speed
as 200MHz.
---
 rtemsbsd/sys/dev/sdhci/arasan_sdhci.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c 
b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
index 43231113..bac6b148 100644
--- a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
+++ b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
@@ -284,8 +284,6 @@ arasan_sdhci_attach(device_t dev)
 */
sc->slot.quirks |= SDHCI_QUIRK_BROKEN_DMA;
 
-   sc->slot.max_clk = 5000;
-
sdhci_init_slot(dev, >slot, 0);
sc->slot_init_done = true;
 
-- 
2.30.2

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[PATCH rtems-libbsd 1/4] rtemsbsd/arasan_sdhci: Stop masking capabilities

[Kinsey Moore]

The initial version of this driver was masking the capabilities register
to hide 8 bit bus capability. This is not necessary since these devices
report that capability correctly and the masking affects performance
negatively on ZynqMP boards where the 8 bit bus is supported. This also
removes two quirks that were made necessary by the capabilities masking.
---
 rtemsbsd/sys/dev/sdhci/arasan_sdhci.c | 13 +
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c 
b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
index 6332260a..9dcab3b1 100644
--- a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
+++ b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c
@@ -123,16 +123,8 @@ static uint32_t
 arasan_sdhci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
 {
struct arasan_sdhci_softc *sc = device_get_softc(dev);
-   uint32_t val32, wrk32;
 
-   val32 = RD4(sc, off);
-
-   if (off == SDHCI_CAPABILITIES) {
-   val32 &= ~SDHCI_CAN_DO_8BITBUS;
-   return (val32);
-   }
-
-   return val32;
+   return (RD4(sc, off));
 }
 
 static void
@@ -287,9 +279,6 @@ arasan_sdhci_attach(device_t dev)
goto fail;
}
 
-   sc->slot.quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
-   sc->slot.quirks |= SDHCI_QUIRK_BROKEN_AUTO_STOP;
-
/*
 * DMA is not really broken, it just isn't implemented yet.
 */
-- 
2.30.2

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[PATCH rtems-docs] user/bsps: Update riscv for PolarFire SoC

[Padmarao Begari]

Update the riscv documentation for the Microchip PolarFire SoC
BSP variant including information about SMP test procedure
for the Microchip PolarFire Icicle Kit.
---
 user/bsps/bsps-riscv.rst | 114 ++-
 1 file changed, 113 insertions(+), 1 deletion(-)

diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst
index 5faa87b..be65a68 100644
--- a/user/bsps/bsps-riscv.rst
+++ b/user/bsps/bsps-riscv.rst
@@ -8,7 +8,7 @@ riscv (RISC-V)
 riscv
 =
 
-This BSP offers 13 variants:
+This BSP offers 15 variants:
 
 * rv32i
 
@@ -38,6 +38,8 @@ This BSP offers 13 variants:
 
 * frdme310arty
 
+* mpfs64imafdc
+
 Each variant corresponds to a GCC multilib.  A particular variant reflects an
 ISA with ABI and code model choice.
 
@@ -47,6 +49,9 @@ be started im machine mode.
 
 The reference platform for this BSP is the Qemu `virt` machine.
 
+The reference platform for the mpfs64imafdc BSP variant is the Microchip
+PolarFire SoC Icicle Kit.
+
 Build Configuration Options
 ---
 
@@ -94,6 +99,13 @@ configuration INI file. The ``waf`` defaults can be used to 
inspect the values.
  Enables support sifive Freedom E310 Arty board if defined to a non-zero
  value,otherwise it is disabled (disabled by default)
 
+``RISCV_ENABLE_MPFS_SUPPORT``
+ Enables support Microchip PolarFire SoC if defined to a non-zero
+ value, otherwise it is disabled (disabled by default).
+
+``RISCV_BOOT_HARTID``
+ The boot hartid (processor number) of risc-v cpu by default 0.
+
 Interrupt Controller
 
 
@@ -124,6 +136,106 @@ They are initialized according to the device tree.  The 
console driver does not
 configure the pins or peripheral clocks.  The console device is selected
 according to the device tree "/chosen/stdout-path" property value.
 
+Microchip PolarFire SoC
+---
+
+The PolarFire SoC is the 4x 64-bit RISC-V U54 cores and a 64-bit RISC-V
+E51 monitor core SoC from the Microchip.
+
+The ``mpfs64imafdc`` BSP variant supports the U54 cores not the E51 because
+the E51 monitor core is reserved for first stage bootloader
+(Hart Software Services) and default ``RISCV_BOOT_HARTID`` is 1.
+
+**SMP test procedure for the Microchip PolarFire Icicle Kit:**
+
+The "config.ini" file.
+
+.. code-block:: none
+
+[riscv/mpfs64imafdc]
+BUILD_TESTS = True
+RTEMS_POSIX_API=True
+RTEMS_SMP = True
+BSP_START_COPY_FDT_FROM_U_BOOT=False
+BSP_VERBOSE_FATAL_EXTENSION = False
+
+Build RTEMS.
+
+.. code-block:: shell
+
+$ ./waf configure --prefix=$HOME/rtems-start/rtems/6
+$ ./waf
+
+Convert .exe to .elf file.
+
+.. code-block:: shell
+
+$ riscv-rtems6-objcopy 
build/riscv/mpfs64imafdc/testsuites/smptests/smp01.exe 
build/riscv/mpfs64imafdc/testsuites/smptests/smp01.elf
+
+Generate a payload for the `smp01.elf` using the `hss-payload-generator 
`_.
+
+* Copy `smp01.elf` file to the HSS/tools/hss-payload-generator/test directory.
+
+* Go to hss-payload-generator source directory.
+
+.. code-block:: shell
+
+$ cd hart-software-services/tools/hss-payload-generator
+
+* Edit test/uboot.yaml file for the hart entry points and correct name of the
+  binary file.
+
+.. code-block:: none
+
+set-name: 'PolarFire-SoC-HSS::RTEMS'
+hart-entry-points: {u54_1: '0x10', u54_2: '0x10', u54_3: 
'0x10', u54_4: '0x10'}
+payloads:
+ test/smp01.elf: {exec-addr: '0x10', owner-hart: u54_1, 
secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: 
prv_m, skip-opensbi: true}
+
+* Generate payload
+
+.. code-block:: shell
+
+$ ./hss-payload-generator -c test/uboot.yaml payload.bin
+
+Once the payload binary is generated, it should be copied to the eMMC/SD.
+
+`FPGA design with HSS programming file 
`_.
+
+Program the eMMC/SD with the payload binary.
+
+* Power Cycle the Microchip PolarFire Icicle Kit and stop at the HSS.
+
+* type "mmc" and then "usbdmsc" on the HSS terminal(UART0).
+
+* Load the payload.bin from the Host PC.
+
+.. code-block:: shell
+
+$ sudo dd if=payload.bin of=/dev/sdb bs=512
+
+Reset the Microchip PolarFire SoC Icicle Kit.
+
+Serial terminal UART1 displays the SMP example messages
+
+.. code-block:: none
+
+*** BEGIN OF TEST SMP 1 ***
+*** TEST VERSION: 6.0.0.ef33f861e16de9bf4190a36e4d18062c7300986c
+*** TEST STATE: EXPECTED_PASS
+*** TEST BUILD: RTEMS_POSIX_API RTEMS_SMP
+*** TEST TOOLS: 12.1.1 20220622 (RTEMS 6, RSB 3cb78b0b815ba05d17f5c6
+   5865d246a8333aa087, Newlib ea99f21)
+
+CPU 3 start task TA0
+CPU 2 running Task TA0
+CPU 3 start task TA1
+CPU 1 running Task TA1
+CPU 3 start task TA2
+CPU 0 running Task