Re: [rtems-docs PATCH] sphinx/style: Fix building with the latest sphinx
It is working for me on Rocky 9 with Sphinx 7.2.6 and a Texlive from this summer. The missing step was removing the older Sphinx version. Then I had to also install PlantUML npm. --joel On Tue, Dec 19, 2023 at 3:45 PM Chris Johns wrote: > On 20/12/2023 8:12 am, Joel Sherrill wrote: > > I tried the patch on Rocky 9 with Python 3.9.14 and sphinx-build 5.3.0 > from a > > pip local install. > > > > (rtemsdocs) [joel@localhost rtems-docs]$ ./waf distclean > > Waf: The wscript in '/home/joel/rtems-work/rtems-docs' is unreadable > > Traceback (most recent call last): > > File > > > "/home/joel/rtems-work/rtems-docs/.waf3-2.0.25-767522112be77f8585812fcfaa08e805/waflib/Scripting.py", > line 102, in waf_entry_point > > set_main_module(wscript) > > File > > > "/home/joel/rtems-work/rtems-docs/.waf3-2.0.25-767522112be77f8585812fcfaa08e805/waflib/Scripting.py", > line 142, in set_main_module > > Context.g_module=Context.load_module(file_path) > > File > > > "/home/joel/rtems-work/rtems-docs/.waf3-2.0.25-767522112be77f8585812fcfaa08e805/waflib/Context.py", > line 362, in load_module > > exec(compile(code,path,'exec'),module.__dict__) > > File "/home/joel/rtems-work/rtems-docs/wscript", line 17, in > > from common import waf as docs_waf > > File "/home/joel/rtems-work/rtems-docs/common/waf.py", line 17, in > > > import conf > > File "/home/joel/rtems-work/rtems-docs/common/conf.py", line 87, in > > > import sphinx_rtd_theme_rtems > > File > > > "/home/joel/rtems-work/rtems-docs/common/sphinx_rtd_theme_rtems/__init__.py", > > line 9, in > > import sphinx > > ModuleNotFoundError: No module named 'sphinx' > > > > Any ideas what I might be missing? > > This looks like a local set up issue. > > My testing was with python 3.11, venv and pip in the virtual env. > > > FWIW the patch didn't apply on my CentOS 7 VM with an even older Sphinx. > > The patch is from git to the mailing list. It is now pushed to master so > please > try there. > > Chris > ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 24/47] bsp/tms570: Remove double pin configuration
Hello Pavel,
On 21.12.23 16:13, Pavel Pisa wrote:
Hello Sebastian,
On Thursday 21 of December 2023 15:37:57 Sebastian Huber wrote:
From: Tyler Miller
---
bsps/arm/tms570/start/pinmux.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/bsps/arm/tms570/start/pinmux.c
b/bsps/arm/tms570/start/pinmux.c index d9c52cd00d..9277a36431 100644
--- a/bsps/arm/tms570/start/pinmux.c
+++ b/bsps/arm/tms570/start/pinmux.c
@@ -182,16 +182,6 @@ tms570_bsp_pinmmr_config(const uint32_t
*pinmmr_values, int reg_start, int reg_c pval = pinmmr_values;
cnt = reg_count;
- do {
-*pinmmrx = *pinmmrx & *pval;
-pinmmrx++;
-pval++;
- } while( --cnt );
-
- pinmmrx = (_IOMM.PINMUX.PINMMR0) + reg_start;
- pval = pinmmr_values;
- cnt = reg_count;
-
do {
*pinmmrx = *pval;
pinmmrx++;
there has been reason for this sequence.
If you use bootloader or if you want to start
RTEMS in SDRAM loaded by another RTEMS or system
in Flash then direct switching from one config
to another can lead to pin configuration collision.
So the logic has been meant such way, that
all configurations which should not be valid
after pin reconfiguration are disabled the first,
(i.e.) pins and internal signals are tristated
and in the second round the final values
are set.
It can have reason even if some peripheral is activated
at runtime according to application config.
May be, that double run is really abundant but I would
suggest to do the analysis again. I need to find some
time to refresh TMS570 knowledge because it is eight
years already when we build base TMS570L3137 support
with Premek...
But I am sure that this was the idea behind update
in two phases.
thanks for the hint. I will have at look how the pin initialization is
done and maybe add a comment to this function.
Best wishes and Merry Christmas,
Sebastian
--
embedded brains GmbH & Co. KG
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax: +49-89-18 94 741 - 08
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Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
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Re: [PATCH 24/47] bsp/tms570: Remove double pin configuration
Hello Sebastian,
On Thursday 21 of December 2023 15:37:57 Sebastian Huber wrote:
> From: Tyler Miller
>
> ---
> bsps/arm/tms570/start/pinmux.c | 10 --
> 1 file changed, 10 deletions(-)
>
> diff --git a/bsps/arm/tms570/start/pinmux.c
> b/bsps/arm/tms570/start/pinmux.c index d9c52cd00d..9277a36431 100644
> --- a/bsps/arm/tms570/start/pinmux.c
> +++ b/bsps/arm/tms570/start/pinmux.c
> @@ -182,16 +182,6 @@ tms570_bsp_pinmmr_config(const uint32_t
> *pinmmr_values, int reg_start, int reg_c pval = pinmmr_values;
>cnt = reg_count;
>
> - do {
> -*pinmmrx = *pinmmrx & *pval;
> -pinmmrx++;
> -pval++;
> - } while( --cnt );
> -
> - pinmmrx = (_IOMM.PINMUX.PINMMR0) + reg_start;
> - pval = pinmmr_values;
> - cnt = reg_count;
> -
>do {
> *pinmmrx = *pval;
> pinmmrx++;
there has been reason for this sequence.
If you use bootloader or if you want to start
RTEMS in SDRAM loaded by another RTEMS or system
in Flash then direct switching from one config
to another can lead to pin configuration collision.
So the logic has been meant such way, that
all configurations which should not be valid
after pin reconfiguration are disabled the first,
(i.e.) pins and internal signals are tristated
and in the second round the final values
are set.
It can have reason even if some peripheral is activated
at runtime according to application config.
May be, that double run is really abundant but I would
suggest to do the analysis again. I need to find some
time to refresh TMS570 knowledge because it is eight
years already when we build base TMS570L3137 support
with Premek...
But I am sure that this was the idea behind update
in two phases.
Best wishes,
Pavel Pisa
phone: +420 603531357
e-mail: p...@cmp.felk.cvut.cz
Department of Control Engineering FEE CVUT
Karlovo namesti 13, 121 35, Prague 2
university: http://control.fel.cvut.cz/
personal: http://cmp.felk.cvut.cz/~pisa
social: https://social.kernel.org/ppisa
projects: https://www.openhub.net/accounts/ppisa
CAN related:http://canbus.pages.fel.cvut.cz/
RISC-V education: https://comparch.edu.cvut.cz/
Open Technologies Research Education and Exchange Services
https://gitlab.fel.cvut.cz/otrees/org/-/wikis/home
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[PATCH 26/47] bsp/tms570: Add TMS570LC4357 power support
From: Tyler Miller --- bsps/arm/tms570/include/bsp/tms570.h | 9 - bsps/arm/tms570/start/init_system.c | 21 + 2 files changed, 25 insertions(+), 5 deletions(-) diff --git a/bsps/arm/tms570/include/bsp/tms570.h b/bsps/arm/tms570/include/bsp/tms570.h index c057664b9a..b5b8a176c1 100644 --- a/bsps/arm/tms570/include/bsp/tms570.h +++ b/bsps/arm/tms570/include/bsp/tms570.h @@ -13,6 +13,7 @@ /* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */ /* + * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc * Copyright (c) 2014-2015, Premysl Houdek * * Czech Technical University in Prague @@ -164,5 +165,11 @@ #define TMS570_STC (*(volatile tms570_stc_t*)0xE600) #define TMS570_SYS1 (*(volatile tms570_sys1_t*)0xFF00) #define TMS570_SYS2 (*(volatile tms570_sys2_t*)0xE100) -#define TMS570_PCR (*(volatile tms570_pcr_t*)0xE000) +#if TMS570_VARIANT == 4357 +#define TMS570_PCR1 (*(volatile tms570_pcr_t*)0x1000) +#define TMS570_PCR2 (*(volatile tms570_pcr_t*)0xFCFF1000) +#define TMS570_PCR3 (*(volatile tms570_pcr_t*)0xFFF78000) +#else +#define TMS570_PCR1 (*(volatile tms570_pcr_t*)0xE000) +#endif #endif /* LIBBSP_ARM_TMS570 */ diff --git a/bsps/arm/tms570/start/init_system.c b/bsps/arm/tms570/start/init_system.c index 07727ce9dd..a384959d4a 100644 --- a/bsps/arm/tms570/start/init_system.c +++ b/bsps/arm/tms570/start/init_system.c @@ -9,6 +9,7 @@ */ /* + * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc * Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com * * @@ -187,10 +188,22 @@ void tms570_periph_init( void ) /** - Release peripherals from reset and enable clocks to all peripherals */ /** - Power-up all peripherals */ - TMS570_PCR.PSPWRDWNCLR0 = 0xU; - TMS570_PCR.PSPWRDWNCLR1 = 0xU; - TMS570_PCR.PSPWRDWNCLR2 = 0xU; - TMS570_PCR.PSPWRDWNCLR3 = 0xU; + TMS570_PCR1.PSPWRDWNCLR0 = 0xU; + TMS570_PCR1.PSPWRDWNCLR1 = 0xU; + TMS570_PCR1.PSPWRDWNCLR2 = 0xU; + TMS570_PCR1.PSPWRDWNCLR3 = 0xU; + +#if TMS570_VARIANT == 4357 + TMS570_PCR2.PSPWRDWNCLR0 = 0xU; + TMS570_PCR2.PSPWRDWNCLR1 = 0xU; + TMS570_PCR2.PSPWRDWNCLR2 = 0xU; + TMS570_PCR2.PSPWRDWNCLR3 = 0xU; + + TMS570_PCR3.PSPWRDWNCLR0 = 0xU; + TMS570_PCR3.PSPWRDWNCLR1 = 0xU; + TMS570_PCR3.PSPWRDWNCLR2 = 0xU; + TMS570_PCR3.PSPWRDWNCLR3 = 0xU; +#endif /** - Enable Peripherals */ TMS570_SYS1.CLKCNTL |= TMS570_SYS1_CLKCNTL_PENA; -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 41/47] bsp/tms570: Optimize tms570_debug_console_out()
Reduce number of interrupt disable/enable actions.
---
bsps/arm/tms570/console/printk-support.c | 41
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/bsps/arm/tms570/console/printk-support.c
b/bsps/arm/tms570/console/printk-support.c
index 6e44ad0969..17c3a1f630 100644
--- a/bsps/arm/tms570/console/printk-support.c
+++ b/bsps/arm/tms570/console/printk-support.c
@@ -10,6 +10,7 @@
*/
/*
+ * Copyright (C) 2023 embedded brains GmbH & Co. KG
* Copyright (C) 2014 Premysl Houdek
*
* Google Summer of Code 2014 at
@@ -55,33 +56,33 @@
*
* @retval Void
*/
-static void tms570_debug_console_putc(char ch)
+static void tms570_debug_console_out(char ch)
{
tms570_sci_context *ctx = TMS570_CONSOLE;
volatile tms570_sci_t *regs = ctx->regs;
- rtems_interrupt_level level;
- rtems_interrupt_disable(level);
- while ( ( regs->FLR & TMS570_SCI_FLR_TXRDY ) == 0) {
-rtems_interrupt_flash(level);
+ while ( true ) {
+rtems_interrupt_level level;
+
+while ( ( regs->FLR & TMS570_SCI_FLR_TXRDY ) == 0) {
+ /* Wait */
+}
+
+rtems_interrupt_disable( level );
+
+if ( ( regs->FLR & TMS570_SCI_FLR_TXRDY ) != 0) {
+ regs->TD = ch;
+ rtems_interrupt_enable( level );
+
+ break;
+}
+
+rtems_interrupt_enable( level );
}
- regs->TD = ch;
+
while ( ( regs->FLR & TMS570_SCI_FLR_TX_EMPTY ) == 0) {
-rtems_interrupt_flash(level);
+/* Wait */
}
- rtems_interrupt_enable(level);
-}
-
-/**
- * @brief debug console output
- *
- * debug functions always use serial dev 0 peripheral
- *
- * @retval Void
- */
-static void tms570_debug_console_out(char c)
-{
- tms570_debug_console_putc(c);
}
static void tms570_debug_console_init(void)
--
2.35.3
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[PATCH 47/47] bsp/tms570: Update README
From: Tyler Miller
---
bsps/arm/tms570/README | 134 +++--
1 file changed, 63 insertions(+), 71 deletions(-)
diff --git a/bsps/arm/tms570/README b/bsps/arm/tms570/README
index 200f8077cf..0146bcc8e9 100644
--- a/bsps/arm/tms570/README
+++ b/bsps/arm/tms570/README
@@ -1,7 +1,13 @@
-Development Board: TMS570LS31x Hercules Development Kit from TI
+TI Hercules TMS570 series development boards:
+
+TMS570LS31:
http://www.ti.com/tool/tmds570ls31hdk
+TMS570LC43:
+
+https://www.ti.com/tool/TMDX570LC43HDK
+
Overview
@@ -12,78 +18,68 @@ Drivers:
o Ethernet - external lwIP fork repository
BSP variants:
- tms570ls3137_hdk_intram - place code and data into internal SRAM
- tms570ls3137_hdk_sdram - place code into external SDRAM and data to SRAM
- tms570ls3137_hdk - variant for stand-alone RTEMS application stored
- and running directly from flash. This variant
- requires initialization of hardware to be integrated
- into RTEMS. RTEMS has to be configured with
- TMS570_USE_HWINIT_STARTUP=1
- and initialization code has to be included in the sources.
-
-Tool-chain used for development
+
+ TMS570LS3137:
+
+tms570ls3137_hdk_intram - place code and data into internal SRAM
+tms570ls3137_hdk_sdram - place code and data into external SDRAM
+tms570ls3137_hdk - variant for stand-alone RTEMS application stored
+and running directly from flash..
+
+ TMS570LC4357:
+
+tms570ls4357_hdk_sdram - place code and data into external SDRAM
+tms570lc4357_hdk - variant for stand-alone RTEMS application stored
+and running directly from flash.
+
+Toolchain used for development
---
- arm-rtems4.12-gcc (GCC) 6.1.1 20160526 + Newlib 2.4.0.20160527 + Binutils
2.26.20160125
-
- CFLAGS="-O2 -pipe" LDFLAGS=-s \
- ../../../src/gcc-6.1/configure --target=arm-rtems4.12 --prefix=/usr \
- --enable-languages=c,c++ \
- --disable-libstdcxx-pch \
- --with-gnu-ld \
- --with-gnu-as \
- --enable-threads \
- --enable-target-optspace \
- --with-system-zlib \
- --verbose \
- --disable-nls --without-included-gettext \
- --disable-win32-registry \
- --with-newlib \
- --enable-plugin \
- --enable-newlib-io-c99-formats \
- --enable-version-specific-runtime-libs \
- --enable-newlib-iconv \
- --disable-lto \
- --disable-lto \
- --enable-libgomp \
- --enable-newlib-iconv \
- --enable-newlib-iconv-encodings="iso_8859_1,utf_8" \
+Example of RTEMS build configuration (config.ini) used for testing of
self-contained applications
+running directly from flash:
+
+[arm/tms570lc4357_hdk]
All patches required for Cortex-R and big-endian ARM support are already
-integrated in GCC the mainline.
+integrated into the GCC and RTEMS mainline.
+
+MCU-specific flags used during compilation are located in
+`externs/rtems/spec/build/bsps/arm/tms570/abi.yml`
+
+When linking an application to an RTEMs build, ensure the following flags are
set
+(arm-rtems6-gcc/g++):
-RTEMS build configuration used for testing of self contained
-applications to run directly from Flash
+-mbe32
+-qrtems
+-T{RTEMS_BSP_VARIANT_LINKERSCRIPT}
- ../../../src/rtems/configure --target=arm-rtems4.12 --prefix=/opt/rtems4.12
\
---enable-rtems-inlines --disable-multiprocessing --enable-cxx \
---enable-rdbg --enable-maintainer-mode --enable-tests=samples \
---disable-networking --enable-posix --enable-itron --disable-ada \
---disable-expada --disable-multilib --disable-docs \
---enable-rtemsbsp="tms570ls3137_hdk" \
---enable-rtems-debug \
-TMS570_USE_HWINIT_STARTUP=1
+RTEMS_BSP_VARIANT_LINKERSCRIPT can be found with the static libraries built
for rtems. There
+is one for each BSP variant type. For example `linkcmds.tms570lc4357_hdk`
Execution
-
-Application build by above process can be directly programmed
+Application built by the above process can be directly programmed
into Flash and run.
-For test and debug purposes, TI's HalCoGen generated application
-is used to set up the board and then the RTEMS application
-image is loaded using OpenOCD to internal EEC SRAM or external SDRAM.
-This prevents wear of Flash which has limited guaranteed
-erase cycles count.
-
-The following features are implemented in the BSP only partially:
+The following features are implemented in the `_hdk` BSP variants:
+ Initial CPU and peripheral initialization
+ Cores Self-test
+For test and debug purposes, TI's HalCoGen generated application
+can be used to set up the board and then a RTEMS application
+can be loaded using OpenOCD
[PATCH 46/47] bsp/tms570: Board-specific tms570_emif_sdram_init()
From: Tyler Miller
---
bsps/arm/tms570/include/bsp/tms570_hwinit.h | 6 +-
bsps/arm/tms570/start/hwinit-lc4357-hdk.c | 58 +
bsps/arm/tms570/start/hwinit-ls3137-hdk.c | 52 +++
bsps/arm/tms570/start/init_emif_sdram.c | 96 -
spec/build/bsps/arm/tms570/objhwinit.yml| 1 -
5 files changed, 115 insertions(+), 98 deletions(-)
delete mode 100644 bsps/arm/tms570/start/init_emif_sdram.c
diff --git a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
index f88463bb43..2af2f3d48a 100644
--- a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
+++ b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
@@ -69,7 +69,6 @@ void _coreEnableRamEcc_( void );
void _coreDisableRamEcc_( void );
void _mpuInit_( void );
-void tms570_emif_sdram_init( void );
void tms570_memory_init( uint32_t ram );
void tms570_trim_lpo_init( void );
void tms570_flash_init( void );
@@ -83,6 +82,11 @@ void tms570_esm_init( void );
* peripherals that are specific to a particular board.
*/
+/**
+ * @brief Initialize the External Memory InterFace (EMIF) peripheral.
+ */
+void tms570_emif_sdram_init(void);
+
/**
* @brief Initialize PLLs source divider/multipliers.
*/
diff --git a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
index 0c5a471748..1a5386d81b 100644
--- a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
+++ b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
@@ -129,6 +129,64 @@ void tms570_pinmux_init( void )
tms570_pin_config_complete();
}
+void tms570_emif_sdram_init( void )
+{
+uint32_t dummy;
+
+/* Do not run attempt to initialize SDRAM when code is running from it */
+if ( tms570_running_from_sdram() )
+return;
+
+// Following the initialization procedure as described in EMIF-errata #5
for the tms570lc43
+// at EMIF clock rates >= 40Mhz
+// Note step one of this procedure is running this EMIF initialization
sequence before PLL
+// and clocks are mapped/enabled
+// For additional details on startup procedure see tms570lc43 TRM
s21.2.5.5.B
+
+// Set SDRAM timings. These are dependent on the EMIF CLK rate, which =
VCLK3
+// Set these based on the final EMIF clock rate once PLL & VCLK is enabled
+TMS570_EMIF.SDTIMR = (uint32_t)1U << 27U|
+(uint32_t)0U << 24U|
+(uint32_t)0U << 20U|
+(uint32_t)0U << 19U|
+(uint32_t)1U << 16U|
+(uint32_t)1U << 12U|
+(uint32_t)1U << 8U|
+(uint32_t)0U << 4U;
+
+/* Minimum number of ECLKOUT cycles from Self-Refresh exit to any command
*/
+// Also set this based on the final EMIF clk
+TMS570_EMIF.SDSRETR = 2;
+// Program the RR Field of SDRCR to provide 200us of initialization time
+// Per Errata#5, for EMIF startup, set this based on the non-VLCK3 clk
rate.
+// The Errata is this register must be calculated as `SDRCR = 200us *
EMIF_CLK`
+// (typically this would be `SDRCR = (200us * EMIF_CLK) / 8` )
+// Since the PLL's arent enabled yet, EMIF_CLK would be EXT_OSCIN / 2
+TMS570_EMIF.SDRCR = 1600;
+
+TMS570_EMIF.SDCR = ((uint32_t)0U << 31U)|
+((uint32_t)1U << 14U)|
+((uint32_t)2U << 9U)|
+((uint32_t)1U << 8U)|
+((uint32_t)2U << 4U)|
+((uint32_t)0); // pagesize = 256
+
+// Read of SDRAM memory location causes processor to wait until SDRAM
Initialization completes
+dummy = *(volatile uint32_t*)TMS570_MEMORY_SDRAM_ORIGIN;
+(void) dummy;
+
+// Program the RR field to the default Refresh Interval of the SDRAM
+// Program this to the correct interval for the VCLK3/EMIF_CLK rate
+// Do this in the typical way per TRM: SDRCR = ((200us * EMIF_CLK) / 8) + 1
+TMS570_EMIF.SDRCR = 1251;
+
+/* Place the EMIF in Self Refresh Mode For Clock Change */
+/* Must only write to the upper byte of the SDCR to avoid*/
+/* a second initialization sequence */
+/* The byte address depends on endian (0x3U in LE, 0x00 in BE32) */
+*((volatile unsigned char *)(_EMIF.SDCR) + 0x0U) = 0x80;
+}
+
/**
* @brief Setup all system PLLs (HCG:setupPLL)
*
diff --git a/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
b/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
index 610d20ecc3..1f2bbd96f2 100644
--- a/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
+++ b/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
@@ -240,6 +240,58 @@ void tms570_pinmux_init( void )
RTEMS_ARRAY_SIZE( tms570_pinmmr_init_data ) );
}
+void tms570_emif_sdram_init(void)
+{
+ uint32_t dummy;
+ uint32_t sdtimr = 0;
+ uint32_t sdcr = 0;
+
+ /* Do not run attempt to initialize SDRAM when code is running from it */
+ if ( tms570_running_from_sdram() )
+return;
+
+ sdtimr = TMS570_EMIF_SDTIMR_T_RFC_SET( sdtimr, 6 - 1 );
+ sdtimr = TMS570_EMIF_SDTIMR_T_RP_SET( sdtimr, 2 - 1 );
+ sdtimr =
[PATCH 39/47] bsp/tms570: Use bsp_start_copy_sections_compact()
There is no need to relocate the text and read-only data.
---
bsps/arm/tms570/start/bspstarthooks.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/bsps/arm/tms570/start/bspstarthooks.c
b/bsps/arm/tms570/start/bspstarthooks.c
index 71ebf9f32d..81ad42f449 100644
--- a/bsps/arm/tms570/start/bspstarthooks.c
+++ b/bsps/arm/tms570/start/bspstarthooks.c
@@ -43,6 +43,6 @@
BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
{
- bsp_start_copy_sections();
+ bsp_start_copy_sections_compact();
bsp_start_clear_bss();
}
--
2.35.3
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[PATCH 36/47] bsp/tms570: The TMS570LC4357 has no TCRAM modules
---
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 2 ++
bsps/arm/tms570/start/tms570_tcram_tests.c | 4
2 files changed, 6 insertions(+)
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index c42200d80a..a0d80da2a9 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -229,6 +229,7 @@ static RTEMS_USED void tms570_start_hook_0( void )
if ( !tms570_running_from_tcram() ) {
+#if TMS570_VARIANT == 3137
/* Test the CPU ECC mechanism for RAM accesses.
* The checkBxRAMECC functions cause deliberate single-bit and double-bit
errors in TCRAM accesses
* by corrupting 1 or 2 bits in the ECC. Reading from the TCRAM location
with a 2-bit error
@@ -237,6 +238,7 @@ static RTEMS_USED void tms570_start_hook_0( void )
* following the one that caused the abort.
*/
tms570_check_tcram_ecc();
+#endif
/* Wait for PBIST for CPU RAM to be completed */
/*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */
diff --git a/bsps/arm/tms570/start/tms570_tcram_tests.c
b/bsps/arm/tms570/start/tms570_tcram_tests.c
index 2103bc61ff..edfd441874 100644
--- a/bsps/arm/tms570/start/tms570_tcram_tests.c
+++ b/bsps/arm/tms570/start/tms570_tcram_tests.c
@@ -57,6 +57,8 @@
#include
#include
+#if TMS570_VARIANT == 3137
+
#define tcramA1bitError (*(volatile uint32_t *)(0x0840U))
#define tcramA2bitError (*(volatile uint32_t *)(0x08400010U))
@@ -181,3 +183,5 @@ void tms570_check_tcram_ecc( void )
tcramA2bit = tcramA2_bk;
tcramB2bit = tcramB2_bk;
}
+
+#endif /* TMS570_VARIANT */
--
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[PATCH 29/47] bsp/tms570: Add errata SSWF021#45 handling
---
.../include/bsp/ti_herc/errata_SSWF021_45.h | 56 +++
bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h | 6 +
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 9 +
bsps/arm/tms570/start/errata_SSWF021_45.c | 366 ++
spec/build/bsps/arm/tms570/objhwinit.yml | 6 +-
5 files changed, 442 insertions(+), 1 deletion(-)
create mode 100755 bsps/arm/tms570/include/bsp/ti_herc/errata_SSWF021_45.h
create mode 100755 bsps/arm/tms570/start/errata_SSWF021_45.c
diff --git a/bsps/arm/tms570/include/bsp/ti_herc/errata_SSWF021_45.h
b/bsps/arm/tms570/include/bsp/ti_herc/errata_SSWF021_45.h
new file mode 100755
index 00..e1821f8e6e
--- /dev/null
+++ b/bsps/arm/tms570/include/bsp/ti_herc/errata_SSWF021_45.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMTMS570
+ *
+ * @brief This header file provides errata SSWF021#45 interfaces.
+ *
+ * Pulled in from Halcogen v4.7.1. This is a rare but high-severity errata
+ * that should always be checked for at system start.
+ */
+
+/*
+* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
+*
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+*Redistributions of source code must retain the above copyright
+*notice, this list of conditions and the following disclaimer.
+*
+*Redistributions in binary form must reproduce the above copyright
+*notice, this list of conditions and the following disclaimer in the
+*documentation and/or other materials provided with the
+*distribution.
+*
+*Neither the name of Texas Instruments Incorporated nor the names of
+*its contributors may be used to endorse or promote products derived
+*from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*/
+#ifndef INCLUDE_ERRATA_SSWF021_45_H_
+#define INCLUDE_ERRATA_SSWF021_45_H_
+#include
+
+uint32_t _errata_SSWF021_45_both_plls(uint32_t count);
+uint32_t _errata_SSWF021_45_pll1(uint32_t count);
+uint32_t _errata_SSWF021_45_pll2(uint32_t count);
+
+
+#endif /* INCLUDE_HL_ERRATA_SSWF021_45_H_ */
diff --git a/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h
b/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h
index f5d35719fa..12edca3eb1 100644
--- a/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h
+++ b/bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h
@@ -51,6 +51,12 @@
#include
+enum tms570_dcc1_cnt0_clksrc {
+DCC1_CNT0_HF_LPO= 0x5U,/**< Alias for DCC1 CNT 0 CLOCK SOURCE 0*/
+DCC1_CNT0_TCK = 0xAU,/**< Alias for DCC1 CNT 0 CLOCK SOURCE 1*/
+DCC1_CNT0_OSCIN = 0xFU,/**< Alias for DCC1 CNT 0 CLOCK SOURCE 2*/
+};
+
typedef struct{
uint32_t GCTRL; /*DCC Global Control Register*/
uint32_t REV; /*DCC Revision Id Register*/
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index 561e6a18e6..8ac53a3d44 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -46,6 +46,7 @@
#include
#include
#include
+#include
#define PBIST_March13N_SP0x0008U /**< March13 N Algo for 1 Port
mem */
@@ -65,6 +66,14 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
}
#endif
+#if TMS570_VARIANT == 4357
+ uint32_t pll_result;
+
+ do {
+pll_result = _errata_SSWF021_45_both_plls(10);
+ } while (pll_result != 0 && pll_result != 4);
+#endif
+
/* Enable CPU Event Export */
/* This allows the CPU to signal any single-bit or double-bit errors detected
* by its ECC logic for accesses to program flash or data RAM.
diff --git a/bsps/arm/tms570/start/errata_SSWF021_45.c
b/bsps/arm/tms570/start/errata_SSWF021_45.c
new file mode 100755
index 00..1591e64798
--- /dev/null
+++ b/bsps/arm/tms570/start/errata_SSWF021_45.c
@@ -0,0 +1,366 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMTMS570
+ *
+ * @brief This source file contains errata SSWF021#45 workaround
+ * implementation.
+ */
+
+/*
+ *
[PATCH 37/47] bsp/tms570: Add header guards
--- bsps/arm/tms570/include/bsp/tms570-pins.h | 5 + 1 file changed, 5 insertions(+) diff --git a/bsps/arm/tms570/include/bsp/tms570-pins.h b/bsps/arm/tms570/include/bsp/tms570-pins.h index 64c6fb4002..606b7e243e 100644 --- a/bsps/arm/tms570/include/bsp/tms570-pins.h +++ b/bsps/arm/tms570/include/bsp/tms570-pins.h @@ -40,6 +40,9 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef LIBBSP_ARM_TMS570_PINS_H +#define LIBBSP_ARM_TMS570_PINS_H + #include #if TMS570_VARIANT == 4357 @@ -47,3 +50,5 @@ #else #include #endif + +#endif /* LIBBSP_ARM_TMS570_PINS_H */ -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 33/47] bsp/tms570: Honor DBGRST for TMS570LC4357
From: Tyler Miller
---
bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h | 10 ++
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 12
2 files changed, 22 insertions(+)
diff --git a/bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h
b/bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h
index 2407aeac8c..d5583a1cca 100644
--- a/bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h
+++ b/bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h
@@ -629,6 +629,16 @@ typedef struct{
/* field: WDRST - Watchdog reset flag. */
#define TMS570_SYS1_SYSESR_WDRST BSP_BIT32(13)
+#if TMS570_VARIANT == 4357
+
+/* field: DBGRST - Debug reset flag. */
+#define TMS570_SYS1_SYSESR_DBGRST BSP_BIT32(11)
+
+/* field: ICSTRST - Interconnect reset flag. */
+#define TMS570_SYS1_SYSESR_ICSTRST BSP_BIT32(7)
+
+#endif
+
/* field: CPURST - CPU reset flag. This bit is set when the CPU is reset. */
#define TMS570_SYS1_SYSESR_CPURST BSP_BIT32(5)
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index f17c3bf555..4b3fe2fbbf 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -101,8 +101,20 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
/*SAFETYMCUSW 5 C MR:NA "for(;;) can be removed by adding "# if
0" and "# endif" in the user codes above and below" */
/*SAFETYMCUSW 26 S MR:NA "for(;;) can be removed by adding "#
if 0" and "# endif" in the user codes above and below" */
/*SAFETYMCUSW 28 D MR:NA "for(;;) can be removed by adding "#
if 0" and "# endif" in the user codes above and below" */
+#if TMS570_VARIANT == 4357
+/*
+ * During code-loading/debug-resets SR[2][4] may get set (indicates double
+ * ECC error in internal RAM) ignore for now as its resolved with ESM
+ * init/reset below.
+ */
+if ((TMS570_SYS1.SYSESR & TMS570_SYS1_SYSESR_DBGRST) == 0) {
+ for (;; ) {
+ } /* Wait */
+}
+#else
for (;; ) {
} /* Wait */
+#endif
}
/* Initialize System - Clock, Flash settings with Efuse self check */
--
2.35.3
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[PATCH 34/47] bsp/tms570: Use asm code for tms570_memory_init()
Make sure that we do not use the stack for this function.
---
bsps/arm/tms570/start/tms570_selftest.c | 35 +++--
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/bsps/arm/tms570/start/tms570_selftest.c
b/bsps/arm/tms570/start/tms570_selftest.c
index 20d0f0d352..99b8718a4a 100644
--- a/bsps/arm/tms570/start/tms570_selftest.c
+++ b/bsps/arm/tms570/start/tms570_selftest.c
@@ -9,6 +9,7 @@
*/
/*
+ * Copyright (C) 2023 embedded brains GmbH & Co. KG
* Copyright (C) 2022 Airbus U.S. Space & Defense, Inc
* Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com
*
@@ -534,21 +535,27 @@ void tms570_pbist_fail( void )
/* SourceId : SELFTEST_SourceId_002 */
/* DesignId : SELFTEST_DesignId_004 */
/* Requirements : HL_SR396 */
-void tms570_memory_init( uint32_t ram )
+__attribute__((__naked__)) void tms570_memory_init( uint32_t ram )
{
- /* Enable Memory Hardware Initialization */
- TMS570_SYS1.MINITGCR = 0xAU;
-
- /* Enable Memory Hardware Initialization for selected RAM's */
- TMS570_SYS1.MSIENA = ram;
-
- /* Wait until Memory Hardware Initialization complete */
- /*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */
- while ( ( TMS570_SYS1.MSTCGSTAT & 0x0100U ) != 0x0100U ) {
- } /* Wait */
-
- /* Disable Memory Hardware Initialization */
- TMS570_SYS1.MINITGCR = 0x5U;
+ __asm__ volatile (
+/* Load memory controller base address */
+"ldr r1, =#0xff00\n"
+/* Enable Memory Hardware Initialization (MINITGCR) */
+"movs r2, #0xa\n"
+"str r2, [r1, #0x5c]\n"
+/* Enable Memory Hardware Initialization for selected RAM's (MSIENA) */
+"str r0, [r1, #0x60]\n"
+/* Wait until Memory Hardware Initialization completes (MSTCGSTAT) */
+/*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */
+"1: ldr r2, [r1, #0x68]\n"
+"tst r2, #0x100\n"
+"beq 1b\n"
+/* Disable Memory Hardware Initialization (MINITGCR) */
+"movs r2, #0x5\n"
+"str r2, [r1, #0x5c]\n"
+/* Return */
+"bx lr\n"
+ );
}
volatile uint32_t *const
--
2.35.3
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[PATCH 31/47] bsp/tms570: Add HCLKCNTL register
From: Tyler Miller
---
bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h
b/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h
index 8bc72c6083..47808d8483 100644
--- a/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h
+++ b/bsps/arm/tms570/include/bsp/ti_herc/reg_sys2.h
@@ -60,9 +60,11 @@ typedef struct{
uint8_t reserved3 [20];
uint32_t CLK2CNTRL; /*Clock 2 Control Register*/
uint32_t VCLKACON1; /*Peripheral Asynchronous Clock Configuration 1
Register*/
- uint8_t reserved4 [44];
+ uint8_t reserved4 [16];
+ uint32_t HCLKCNTL; /* 0x0054 */
+ uint8_t reserved5 [24];
uint32_t CLKSLIP; /*Clock Slip Register*/
- uint8_t reserved5 [120];
+ uint8_t reserved6 [120];
uint32_t EFC_CTLREG;/*EFUSE Controller Control Register*/
uint32_t DIEDL_REG0;/*Die Identification Register*/
uint32_t DIEDH_REG1;/*Die Identification Register*/
--
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[PATCH 45/47] bsp/tms570: Board-specific tms570_pinmux_init()
From: Tyler Miller --- bsps/arm/tms570/include/bsp/tms570_hwinit.h | 7 +- .../tms570/include/bsp/tms570lc4357-pins.h| 76 +++-- bsps/arm/tms570/start/hwinit-lc4357-hdk.c | 60 bsps/arm/tms570/start/hwinit-ls3137-hdk.c | 184 bsps/arm/tms570/start/init_pinmux.c | 283 -- spec/build/bsps/arm/tms570/objhwinit.yml | 1 - 6 files changed, 300 insertions(+), 311 deletions(-) delete mode 100644 bsps/arm/tms570/start/init_pinmux.c diff --git a/bsps/arm/tms570/include/bsp/tms570_hwinit.h b/bsps/arm/tms570/include/bsp/tms570_hwinit.h index eca4a5e7cc..f88463bb43 100644 --- a/bsps/arm/tms570/include/bsp/tms570_hwinit.h +++ b/bsps/arm/tms570/include/bsp/tms570_hwinit.h @@ -71,7 +71,6 @@ void _mpuInit_( void ); void tms570_emif_sdram_init( void ); void tms570_memory_init( uint32_t ram ); -void tms570_pinmux_init( void ); void tms570_trim_lpo_init( void ); void tms570_flash_init( void ); void tms570_periph_init( void ); @@ -96,4 +95,10 @@ void tms570_pll_init(void); */ void tms570_map_clock_init(void); +/** + * @brief Initialize the tms570 PINMUX peripheral. This maps signals to pin + * terminals. + */ +void tms570_pinmux_init(void); + #endif /* LIBBSP_ARM_TMS570_HWINIT_H */ diff --git a/bsps/arm/tms570/include/bsp/tms570lc4357-pins.h b/bsps/arm/tms570/include/bsp/tms570lc4357-pins.h index 8807f41e82..a78c9222f2 100644 --- a/bsps/arm/tms570/include/bsp/tms570lc4357-pins.h +++ b/bsps/arm/tms570/include/bsp/tms570lc4357-pins.h @@ -928,6 +928,11 @@ TMS570_PIN_AND_FNC(TMS570_BALL_B11, 5), \ TMS570_PIN_AND_FNC(TMS570_PIN_MMR_ALT_eQEP2S, 1)) +/// (TM) TODO: is this correct? LS3137ZWT uses TMS570_PIN_AND_FNC(TMS570_BALL_WITH_MMR(29, 3), 0) +/// Per the schematic, this pin (called MII_RX_DV / RX_DV) attaches to pad B11 and can select +/// between MII and RMII mode for the PHY. A pin like this is required for the lwip tms570 rtems port +#define TMS570_MMR_SELECT_GMII_SEL TMS570_BALL_B11_MII_RX_DV + #define TMS570_BALL_D8 TMS570_BALL_WITH_MMR(34, 3) #define TMS570_BALL_D8_HET2_01 TMS570_PIN_WITH_IN_ALT( \ TMS570_PIN_AND_FNC(TMS570_BALL_D8, 0), \ @@ -998,8 +1003,7 @@ /* Default pinmux select */ -#define TMS570_PINMMR_DEFAULT_INIT_LIST(per_pin_action, common_arg) \ - per_pin_action(common_arg, TMS570_BALL_N19_AD1EVT) \ +#define TMS570LC4357_PINMMR_DEFAULT_INIT_LIST(per_pin_action, common_arg) \ per_pin_action(common_arg, TMS570_BALL_D4_EMIF_ADDR_00) \ per_pin_action(common_arg, TMS570_BALL_D5_EMIF_ADDR_01) \ per_pin_action(common_arg, TMS570_BALL_C4_EMIF_ADDR_06) \ @@ -1027,30 +1031,30 @@ per_pin_action(common_arg, TMS570_BALL_R3_EMIF_nRAS) \ per_pin_action(common_arg, TMS570_BALL_P3_EMIF_nWAIT) \ per_pin_action(common_arg, TMS570_BALL_D17_EMIF_nWE) \ - per_pin_action(common_arg, TMS570_BALL_E9_ETMDATA_08) \ - per_pin_action(common_arg, TMS570_BALL_E8_ETMDATA_09) \ - per_pin_action(common_arg, TMS570_BALL_E7_ETMDATA_10) \ - per_pin_action(common_arg, TMS570_BALL_E6_ETMDATA_11) \ - per_pin_action(common_arg, TMS570_BALL_E13_ETMDATA_12) \ - per_pin_action(common_arg, TMS570_BALL_E12_ETMDATA_13) \ - per_pin_action(common_arg, TMS570_BALL_E11_ETMDATA_14) \ - per_pin_action(common_arg, TMS570_BALL_E10_ETMDATA_15) \ - per_pin_action(common_arg, TMS570_BALL_K15_ETMDATA_16) \ - per_pin_action(common_arg, TMS570_BALL_L15_ETMDATA_17) \ - per_pin_action(common_arg, TMS570_BALL_M15_ETMDATA_18) \ - per_pin_action(common_arg, TMS570_BALL_N15_ETMDATA_19) \ - per_pin_action(common_arg, TMS570_BALL_E5_ETMDATA_20) \ - per_pin_action(common_arg, TMS570_BALL_F5_ETMDATA_21) \ - per_pin_action(common_arg, TMS570_BALL_G5_ETMDATA_22) \ - per_pin_action(common_arg, TMS570_BALL_K5_ETMDATA_23) \ - per_pin_action(common_arg, TMS570_BALL_L5_ETMDATA_24) \ - per_pin_action(common_arg, TMS570_BALL_M5_ETMDATA_25) \ - per_pin_action(common_arg, TMS570_BALL_N5_ETMDATA_26) \ - per_pin_action(common_arg, TMS570_BALL_P5_ETMDATA_27) \ - per_pin_action(common_arg, TMS570_BALL_R5_ETMDATA_28) \ - per_pin_action(common_arg, TMS570_BALL_R6_ETMDATA_29) \ - per_pin_action(common_arg, TMS570_BALL_R7_ETMDATA_30) \ - per_pin_action(common_arg, TMS570_BALL_R8_ETMDATA_31) \ + per_pin_action(common_arg, TMS570_BALL_E9_EMIF_ADDR_05) \ + per_pin_action(common_arg, TMS570_BALL_E8_EMIF_ADDR_04) \ + per_pin_action(common_arg, TMS570_BALL_E7_EMIF_ADDR_03) \ + per_pin_action(common_arg, TMS570_BALL_E6_EMIF_ADDR_02) \ + per_pin_action(common_arg, TMS570_BALL_E13_EMIF_BA_0) \ + per_pin_action(common_arg, TMS570_BALL_E12_EMIF_nOE) \ + per_pin_action(common_arg, TMS570_BALL_E11_EMIF_nDQM_1) \ + per_pin_action(common_arg, TMS570_BALL_E10_EMIF_nDQM_0) \ + per_pin_action(common_arg, TMS570_BALL_K15_EMIF_DATA_00) \ + per_pin_action(common_arg, TMS570_BALL_L15_EMIF_DATA_01) \ + per_pin_action(common_arg, TMS570_BALL_M15_EMIF_DATA_02) \ + per_pin_action(common_arg,
[PATCH 44/47] bsp/tms570: Board-specific tms570_map_clock_init()
From: Tyler Miller
---
bsps/arm/tms570/include/bsp/tms570_hwinit.h | 8 +-
bsps/arm/tms570/start/hwinit-lc4357-hdk.c | 72 +
bsps/arm/tms570/start/hwinit-ls3137-hdk.c | 108
bsps/arm/tms570/start/init_system.c | 108
4 files changed, 187 insertions(+), 109 deletions(-)
diff --git a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
index 2a178ceb05..eca4a5e7cc 100644
--- a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
+++ b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
@@ -75,7 +75,6 @@ void tms570_pinmux_init( void );
void tms570_trim_lpo_init( void );
void tms570_flash_init( void );
void tms570_periph_init( void );
-void tms570_map_clock_init( void );
void tms570_system_hw_init( void );
void tms570_esm_init( void );
@@ -90,4 +89,11 @@ void tms570_esm_init( void );
*/
void tms570_pll_init(void);
+/**
+ * @brief Initialize the tms570 Global Clock Manager (GCM) registers which
+ * sub-divide the input clock source (generally PLL) into the various
+ * peripheral clocks (VCLK1-3, etc).
+ */
+void tms570_map_clock_init(void);
+
#endif /* LIBBSP_ARM_TMS570_HWINIT_H */
diff --git a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
index 6a8a2f1a86..a57536be30 100644
--- a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
+++ b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
@@ -137,3 +137,75 @@ void tms570_pll_init( void )
// Enable all clock sources except the following
TMS570_SYS1.CSDIS = (TMS570_CLKDIS_SRC_EXT_CLK2 |
TMS570_CLKDIS_SRC_EXT_CLK1 | TMS570_CLKDIS_SRC_RESERVED);
}
+
+void tms570_map_clock_init(void)
+{
+// based on HalCoGen mapClocks method
+uint32_t sys_csvstat, sys_csdis;
+
+TMS570_SYS2.HCLKCNTL = 1U;
+
+/** @b Initialize @b Clock @b Tree: */
+/** - Disable / Enable clock domain */
+TMS570_SYS1.CDDIS = ( 0U << 4U ) | /* AVCLK 1 ON */
+( 1U << 5U ) | /* AVCLK 2 OFF */
+( 0U << 8U ) | /* VCLK3 ON */
+( 0U << 9U ) | /* VCLK4 ON */
+( 0U << 10U ) | /* AVCLK 3 ON */
+( 0U << 11U ); /* AVCLK 4 ON */
+
+/* Work Around for Errata SYS#46:
+* Despite this being a LS3137 errata, hardware testing on the LC4357
indicates this wait is still necessary
+*/
+sys_csvstat = TMS570_SYS1.CSVSTAT;
+sys_csdis = TMS570_SYS1.CSDIS;
+
+while ( ( sys_csvstat & ( ( sys_csdis ^ 0xFFU ) & 0xFFU ) ) !=
+( ( sys_csdis ^ 0xFFU ) & 0xFFU ) ) {
+sys_csvstat = TMS570_SYS1.CSVSTAT;
+sys_csdis = TMS570_SYS1.CSDIS;
+}
+
+TMS570_SYS1.GHVSRC = TMS570_SYS1_GHVSRC_GHVWAKE(TMS570_SYS_CLK_SRC_PLL1)
+| TMS570_SYS1_GHVSRC_HVLPM(TMS570_SYS_CLK_SRC_PLL1)
+| TMS570_SYS1_GHVSRC_GHVSRC(TMS570_SYS_CLK_SRC_PLL1);
+
+/** - Setup RTICLK1 and RTICLK2 clocks */
+TMS570_SYS1.RCLKSRC = ((uint32_t)1U << 24U)/* RTI2 divider (Not
applicable for lock-step device) */
+| ((uint32_t)TMS570_SYS_CLK_SRC_VCLK << 16U) /* RTI2
clock source (Not applicable for lock-step device) Field not in TRM? */
+| ((uint32_t)1U << 8U) /* RTI1 divider */
+| ((uint32_t)TMS570_SYS_CLK_SRC_VCLK << 0U); /* RTI1
clock source */
+
+/** - Setup asynchronous peripheral clock sources for AVCLK1 and AVCLK2 */
+TMS570_SYS1.VCLKASRC =
TMS570_SYS1_VCLKASRC_VCLKA2S(TMS570_SYS_CLK_SRC_VCLK)
+|
TMS570_SYS1_VCLKASRC_VCLKA1S(TMS570_SYS_CLK_SRC_VCLK);
+
+/** - Setup synchronous peripheral clock dividers for VCLK1, VCLK2, VCLK3
*/
+
+// VCLK2 = PLL1 / HCLK_DIV / 2 = 75MHz
+TMS570_SYS1.CLKCNTL = (TMS570_SYS1.CLKCNTL &
~TMS570_SYS1_CLKCNTL_VCLK2R(0xF))
+| TMS570_SYS1_CLKCNTL_VCLK2R(0x1);
+// VLCK1 = PLL1 / HCLK_DIV / 2 = 75MHz
+TMS570_SYS1.CLKCNTL = (TMS570_SYS1.CLKCNTL &
~TMS570_SYS1_CLKCNTL_VCLKR(0xF))
+| TMS570_SYS1_CLKCNTL_VCLKR(0x1);
+
+// VCLK3 = PLL1 / HCLK_DIV / 3 = 50MHz
+TMS570_SYS2.CLK2CNTRL = (TMS570_SYS2.CLK2CNTRL &
~TMS570_SYS2_CLK2CNTRL_VCLK3R(0xF))
+| TMS570_SYS2_CLK2CNTRL_VCLK3R(0x2);
+
+TMS570_SYS2.VCLKACON1 = TMS570_SYS2_VCLKACON1_VCLKA4R(1U - 1U)
+| (TMS570_SYS2_VCLKACON1_VCLKA4_DIV_CDDIS * 0)
+|
TMS570_SYS2_VCLKACON1_VCLKA4S(TMS570_SYS_CLK_SRC_VCLK)
+| TMS570_SYS2_VCLKACON1_VCLKA3R(1U - 1U)
+| (TMS570_SYS2_VCLKACON1_VCLKA3_DIV_CDDIS * 0)
+|
TMS570_SYS2_VCLKACON1_VCLKA3S(TMS570_SYS_CLK_SRC_VCLK);
+
+/* Now the PLLs are locked and the PLL outputs can be sped up */
+/* The R-divider was programmed to be 0xF. Now this divider is changed to
programmed value */
+
[PATCH 18/47] bsp/tms570: Add linkcmds.memory
Remove obsolete tms570ls3137_hdk_with_loader BSP variant. With the new
memory origin/size build options this variant is no longer required.
---
bsps/arm/tms570/README| 3 --
...ms570ls3137_hdk_with_loader-testsuite.tcfg | 9 -
bsps/arm/tms570/include/bsp/tms570_hwinit.h | 18 +++---
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 16 -
bsps/arm/tms570/start/init_emif_sdram.c | 5 ++-
.../tms570/start/linkcmds.tms570ls3137_hdk| 7 +---
.../start/linkcmds.tms570ls3137_hdk_intram| 7 +---
.../start/linkcmds.tms570ls3137_hdk_sdram | 7 +---
.../linkcmds.tms570ls3137_hdk_with_loader | 36 ---
.../arm/tms570/bspls3137hdkwithloader.yml | 21 ---
spec/build/bsps/arm/tms570/grp.yml| 14
spec/build/bsps/arm/tms570/linkcmdsmemory.yml | 27 ++
spec/build/bsps/arm/tms570/obj.yml| 1 -
.../bsps/arm/tms570/optmemflashorigin.yml | 18 ++
.../build/bsps/arm/tms570/optmemflashsize.yml | 20 +++
.../bsps/arm/tms570/optmemsdramorigin.yml | 18 ++
.../build/bsps/arm/tms570/optmemsdramsize.yml | 18 ++
.../bsps/arm/tms570/optmemsramorigin.yml | 18 ++
spec/build/bsps/arm/tms570/optmemsramsize.yml | 20 +++
19 files changed, 172 insertions(+), 111 deletions(-)
delete mode 100644
bsps/arm/tms570/config/tms570ls3137_hdk_with_loader-testsuite.tcfg
delete mode 100644 bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_with_loader
delete mode 100644 spec/build/bsps/arm/tms570/bspls3137hdkwithloader.yml
create mode 100644 spec/build/bsps/arm/tms570/linkcmdsmemory.yml
create mode 100644 spec/build/bsps/arm/tms570/optmemflashorigin.yml
create mode 100644 spec/build/bsps/arm/tms570/optmemflashsize.yml
create mode 100644 spec/build/bsps/arm/tms570/optmemsdramorigin.yml
create mode 100644 spec/build/bsps/arm/tms570/optmemsdramsize.yml
create mode 100644 spec/build/bsps/arm/tms570/optmemsramorigin.yml
create mode 100644 spec/build/bsps/arm/tms570/optmemsramsize.yml
diff --git a/bsps/arm/tms570/README b/bsps/arm/tms570/README
index 2a0bd4c8e4..200f8077cf 100644
--- a/bsps/arm/tms570/README
+++ b/bsps/arm/tms570/README
@@ -14,9 +14,6 @@ Drivers:
BSP variants:
tms570ls3137_hdk_intram - place code and data into internal SRAM
tms570ls3137_hdk_sdram - place code into external SDRAM and data to SRAM
- tms570ls3137_hdk_with_loader - reserve 256kB at Flash start for loader
- and place RTEMS application from address
- 0x0004
tms570ls3137_hdk - variant for stand-alone RTEMS application stored
and running directly from flash. This variant
requires initialization of hardware to be integrated
diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader-testsuite.tcfg
b/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader-testsuite.tcfg
deleted file mode 100644
index cd8b657bc5..00
--- a/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader-testsuite.tcfg
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# tms570ls3137_hdk_with_loader RTEMS Test Database.
-#
-# Format is one line per test that is _NOT_ built.
-#
-
-include: testdata/small-memory-testsuite.tcfg
-
-exclude: linpack
diff --git a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
index a14e99dfeb..f23584f9b1 100644
--- a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
+++ b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
@@ -43,11 +43,21 @@
#ifndef LIBBSP_ARM_TMS570_HWINIT_H
#define LIBBSP_ARM_TMS570_HWINIT_H
-#define TMS570_TCRAM_START_PTR ( (void *) ( 0x0800U ) )
-#define TMS570_TCRAM_WINDOW_END_PTR ( (void *) ( 0x0808U ) )
+#include
+#include
+#include
-#define TMS570_SDRAM_START_PTR ( (void *) ( 0x8000U ) )
-#define TMS570_SDRAM_WINDOW_END_PTR ( (void *) ( 0xA000U ) )
+static inline bool tms570_running_from_tcram( void )
+{
+ uintptr_t fncptr = (uintptr_t)bsp_start_hook_0;
+ return (fncptr - TMS570_MEMORY_SRAM_ORIGIN) < TMS570_MEMORY_SRAM_SIZE;
+}
+
+static inline bool tms570_running_from_sdram( void )
+{
+ uintptr_t fncptr = (uintptr_t)bsp_start_hook_0;
+ return (fncptr - TMS570_MEMORY_SDRAM_ORIGIN) < TMS570_MEMORY_SDRAM_SIZE;
+}
/* Ti TMS570 core setup implemented in assembly */
void _esmCcmErrorsClear_( void );
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index 0ce03c3a15..593c7a9ec3 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -47,22 +47,6 @@
#include
#include
-static inline
-int tms570_running_from_tcram( void )
-{
- void *fncptr = (void*)bsp_start_hook_0;
- return ( fncptr >= (void*)TMS570_TCRAM_START_PTR ) &&
- ( fncptr < (void*)TMS570_TCRAM_WINDOW_END_PTR );
-}
-
-static inline
-int tms570_running_from_sdram( void )
-{
- void *fncptr =
[PATCH 43/47] bsp/tms570: Board-specific tms570_pll_init()
From: Tyler Miller
---
bsps/arm/tms570/include/bsp/tms570_hwinit.h | 14 +-
bsps/arm/tms570/start/hwinit-lc4357-hdk.c | 139 ++
bsps/arm/tms570/start/hwinit-ls3137-hdk.c | 102 +
bsps/arm/tms570/start/init_system.c | 56 ---
spec/build/bsps/arm/tms570/objhwinit.yml | 9 +-
.../bsps/arm/tms570/objhwinitlc4357hdk.yml| 14 ++
.../bsps/arm/tms570/objhwinitls3137hdk.yml| 14 ++
7 files changed, 287 insertions(+), 61 deletions(-)
create mode 100644 bsps/arm/tms570/start/hwinit-lc4357-hdk.c
create mode 100644 bsps/arm/tms570/start/hwinit-ls3137-hdk.c
create mode 100644 spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml
create mode 100644 spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml
diff --git a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
index f23584f9b1..2a178ceb05 100644
--- a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
+++ b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
@@ -10,6 +10,7 @@
*/
/*
+ * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc
* Copyright (C) 2014 Premysl Houdek
*
* Google Summer of Code 2014 at
@@ -70,9 +71,7 @@ void _mpuInit_( void );
void tms570_emif_sdram_init( void );
void tms570_memory_init( uint32_t ram );
-void tms570_system_hw_init( void );
void tms570_pinmux_init( void );
-void tms570_pll_init( void );
void tms570_trim_lpo_init( void );
void tms570_flash_init( void );
void tms570_periph_init( void );
@@ -80,4 +79,15 @@ void tms570_map_clock_init( void );
void tms570_system_hw_init( void );
void tms570_esm_init( void );
+/*
+ * The following functions that must be implemented on a per-board basis for
+ * any BSP variant with hardware initialization. These configure MCU
+ * peripherals that are specific to a particular board.
+ */
+
+/**
+ * @brief Initialize PLLs source divider/multipliers.
+ */
+void tms570_pll_init(void);
+
#endif /* LIBBSP_ARM_TMS570_HWINIT_H */
diff --git a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
new file mode 100644
index 00..6a8a2f1a86
--- /dev/null
+++ b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
@@ -0,0 +1,139 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMTMS570
+ *
+ * @brief This source file contains parts of the system initialization.
+ */
+
+/*
+ * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc
+ * Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ *
+ *Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the
+ *distribution.
+ *
+ *Neither the name of Texas Instruments Incorporated nor the names of
+ *its contributors may be used to endorse or promote products derived
+ *from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include
+#include
+
+typedef enum Tms570ClockDisableSources {
+TMS570_CLKDIS_SRC_OSC = 0x01, ///< External high-speed oscillator as
clock source
+TMS570_CLKDIS_SRC_PLL1 = 0x02,
+TMS570_CLKDIS_SRC_RESERVED = 0x04, ///< reserved. not tied to actual clock
source
+TMS570_CLKDIS_SRC_EXT_CLK1 = 0x08,
+TMS570_CLKDIS_SRC_LOW_FREQ_LPO = 0x10,
+TMS570_CLKDIS_SRC_HIGH_FREQ_LPO = 0x20,
+TMS570_CLKDIS_SRC_PLL2 = 0x40,
+TMS570_CLKDIS_SRC_EXT_CLK2 = 0x80,
+} Tms570ClockDisableSources;
+
+// Source selection for G, H, and V clocks SYS1.GHVSRC reg
+typedef enum Tms570GhvClockSources {
+ TMS570_SYS_CLK_SRC_OSC = 0U, /**< Alias for oscillator clock Source
*/
+ TMS570_SYS_CLK_SRC_PLL1 = 1U, /**< Alias for Pll1 clock Source
*/
+ TMS570_SYS_CLK_SRC_EXTERNAL1 = 3U,/**< Alias for external
[PATCH 42/47] bsp/tms570: Initialize MPU
From: Tyler Miller
---
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 3 +
bsps/arm/tms570/start/tms570_sys_core.S | 202 +++
2 files changed, 205 insertions(+)
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index 67c3768a36..6407cc4a45 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -337,6 +337,9 @@ static RTEMS_USED void tms570_start_hook_0( void )
tms570_emif_sdram_init();
+ /* Configures and enables the ARM-core Memory Protection Unit (MPU) */
+ _mpuInit_();
+
#if 1
/*
* Do not depend on link register to be restored to
diff --git a/bsps/arm/tms570/start/tms570_sys_core.S
b/bsps/arm/tms570/start/tms570_sys_core.S
index c3004e019f..83dee26ec8 100644
--- a/bsps/arm/tms570/start/tms570_sys_core.S
+++ b/bsps/arm/tms570/start/tms570_sys_core.S
@@ -582,4 +582,206 @@ _errata_CORTEXR4_66_:
mcr p15, #0, r0, c1, c0, #1 @ Write Auxiliary Control register
pop {r0}
bx lr
+
/*---*/
+@ Initialize Mpu: pulled from LC4357 R5f Halcogen generation
+
+.weak _mpuInit_
+.type _mpuInit_, %function
+
+_mpuInit_:
+@ Disable mpu
+mrc p15, #0, r0, c1, c0, #0
+bic r0, r0, #1
+dsb
+mcr p15, #0, r0, c1, c0, #0
+isb
+@ Disable background region
+mrc p15, #0, r0, c1, c0, #0
+bic r0, r0, #0x2
+mcr p15, #0, r0, c1, c0, #0
+@ Setup region 1
+mov r0, #0
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r1Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x0008
+orr r0, r0,#0x1000
+mcr p15, #0,r0, c6, c1, #4
+movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (1 << 12) + (1 << 11)
+ (1 << 10) + (1 << 9) + (1 << 8) + (0x1F << 1) + (1))
+mcr p15, #0,r0, c6, c1, #2
+@ Setup region 2
+mov r0, #1
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r2Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x0002
+orr r0, r0,#0x0600
+mcr p15, #0,r0, c6, c1, #4
+movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11)
+ (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (1))
+mcr p15, #0,r0, c6, c1, #2
+@ Setup region 3 - Internal RAM
+mov r0, #2
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r3Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x000B
+orr r0, r0,#0x0300
+mcr p15, #0,r0, c6, c1, #4
+movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11)
+ (0 << 10) + (0 << 9) + (0 << 8) + (0x12 << 1) + (1))
+mcr p15, #0,r0, c6, c1, #2
+@ Setup region 4
+mov r0, #3
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r4Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x0010
+orr r0, r0,#0x1300
+mcr p15, #0,r0, c6, c1, #4
+movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11)
+ (1 << 10) + (1 << 9) + (1 << 8) + (0x1A << 1) + (1))
+mcr p15, #0,r0, c6, c1, #2
+@ Setup region 5
+mov r0, #4
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r5Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x
+orr r0, r0,#0x0300
+mcr p15, #0,r0, c6, c1, #4
+movw r0, #((1 << 15) + (1 << 14) + (0 << 13) + (0 << 12) + (0 << 11)
+ (0 << 10) + (0 << 9) + (0 << 8) + (0x1B << 1) + (1))
+mcr p15, #0,r0, c6, c1, #2
+@ Setup region 6 - EMIF CS0 == External SDRAM
+mov r0, #5
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r6Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x0002
+orr r0, r0,#0x0300
+mcr p15, #0,r0, c6, c1, #4
+movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11)
+ (0 << 10) + (0 << 9) + (0 << 8) + (0x1A << 1) + (1))
+mcr p15, #0,r0, c6, c1, #2
+@ Setup region 7
+mov r0, #6
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r7Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x0008
+orr r0, r0,#0x1200
+mcr p15, #0,r0, c6, c1, #4
+movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11)
+ (0 << 10) + (0 << 9) + (0 << 8) + (0x16 << 1) + (1))
+mcr p15, #0,r0, c6, c1, #2
+@ Setup region 8
+mov r0, #7
+mcr p15, #0,r0, c6, c2, #0
+ldr r0, r8Base
+mcr p15, #0,r0, c6, c1, #0
+mov r0, #0x0010
+orr r0, r0,#0x1200
+
[PATCH 40/47] bsp/tms570: Initialize and enable caches on demand
---
bsps/arm/tms570/start/bspstarthooks.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/bsps/arm/tms570/start/bspstarthooks.c
b/bsps/arm/tms570/start/bspstarthooks.c
index 81ad42f449..8dc7fdfdf8 100644
--- a/bsps/arm/tms570/start/bspstarthooks.c
+++ b/bsps/arm/tms570/start/bspstarthooks.c
@@ -40,9 +40,34 @@
*/
#include
+#include
BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
{
+ uint32_t ctrl;
+ size_t size;
+
+ ctrl = arm_cp15_get_control();
+
+ if ( ( ctrl & ARM_CP15_CTRL_I ) == 0 ) {
+rtems_cache_invalidate_entire_instruction();
+ctrl |= ARM_CP15_CTRL_I;
+arm_cp15_set_control(ctrl);
+ }
+
+ if ( ( ctrl & ARM_CP15_CTRL_C ) == 0 ) {
+rtems_cache_invalidate_entire_data();
+ctrl |= ARM_CP15_CTRL_C;
+arm_cp15_set_control(ctrl);
+ }
+
bsp_start_copy_sections_compact();
bsp_start_clear_bss();
+
+ size =(size_t) bsp_section_fast_text_size;
+ RTEMS_OBFUSCATE_VARIABLE( size );
+
+ if ( size != 0 ) {
+rtems_cache_flush_multiple_data_lines( bsp_section_fast_text_begin, size );
+ }
}
--
2.35.3
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[PATCH 22/47] bsp/tms570: Enable hardware init for some variants
--- spec/build/bsps/arm/tms570/optlowinit.yml | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/spec/build/bsps/arm/tms570/optlowinit.yml b/spec/build/bsps/arm/tms570/optlowinit.yml index e9aa3557b3..32b84aa08c 100644 --- a/spec/build/bsps/arm/tms570/optlowinit.yml +++ b/spec/build/bsps/arm/tms570/optlowinit.yml @@ -7,10 +7,15 @@ build-type: option copyrights: - Copyright (C) 2020 embedded brains GmbH & Co. KG default: +- enabled-by: + - arm/tms570ls3137_hdk + - arm/tms570lc4357_hdk + value: true - enabled-by: true value: false description: | - Include BSP startup code for TMS570LS3137 which allows to start RTEMS application directly after reset + Include BSP startup code for TMS570LS3137 or TMS57LC4357 which allows to + start RTEMS application directly after reset. enabled-by: true links: [] name: TMS570_USE_HWINIT_STARTUP -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 20/47] bsp/tms570: Fix PBIST clock enable
Bit 1 of the PACT is reserved (writes have no effect). --- bsps/arm/tms570/start/tms570_selftest.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bsps/arm/tms570/start/tms570_selftest.c b/bsps/arm/tms570/start/tms570_selftest.c index 5a30a54c9f..f8a64abb7b 100644 --- a/bsps/arm/tms570/start/tms570_selftest.c +++ b/bsps/arm/tms570/start/tms570_selftest.c @@ -264,7 +264,7 @@ void tms570_pbist_self_check( void ) } /* Enable PBIST clocks and ROM clock */ - TMS570_PBIST.PACT = 0x3U; + TMS570_PBIST.PACT = 0x1U; /* CPU control of PBIST */ TMS570_PBIST.DLR = 0x10U; @@ -353,7 +353,7 @@ void tms570_pbist_run( } /* Enable PBIST clocks and ROM clock */ - TMS570_PBIST.PACT = 0x3U; + TMS570_PBIST.PACT = 0x1U; /* Select all algorithms to be tested */ TMS570_PBIST.ALGO = algomask; -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 38/47] bsp/tms570: Use shared bsp_start_hook_1()
---
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 24 +++-
bsps/arm/tms570/start/bspstarthooks.c| 2 +-
spec/build/bsps/arm/tms570/objhwinit.yml | 1 +
3 files changed, 5 insertions(+), 22 deletions(-)
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index a0d80da2a9..67c3768a36 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -5,7 +5,7 @@
*
* @ingroup RTEMSBSPsARMTMS570
*
- * @brief This source file contains the start hooks implementation.
+ * @brief This source file contains the bsp_start_hook_0() implementation.
*/
/*
@@ -335,6 +335,8 @@ static RTEMS_USED void tms570_start_hook_0( void )
/* Configure system response to error conditions signaled to the ESM group1
*/
tms570_esm_init();
+ tms570_emif_sdram_init();
+
#if 1
/*
* Do not depend on link register to be restored to
@@ -345,26 +347,6 @@ static RTEMS_USED void tms570_start_hook_0( void )
#endif
}
-BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
-{
- /* At this point we can use objects outside the .start section */
-#if 0
- /* Do not run attempt to initialize MPU when code is running from SDRAM */
- if ( !tms570_running_from_sdram() ) {
-/*
- * MPU background areas setting has to be overlaid
- * if execution of code is required from external memory/SDRAM.
- * This region is non executable by default.
- */
-_mpuInit_();
- }
-#endif
- tms570_emif_sdram_init();
-
- bsp_start_copy_sections();
- bsp_start_clear_bss();
-}
-
/*
* Chip specific list of peripherals which should be tested
* for functional RAM parity reporting
diff --git a/bsps/arm/tms570/start/bspstarthooks.c
b/bsps/arm/tms570/start/bspstarthooks.c
index 3e4011ce1c..71ebf9f32d 100644
--- a/bsps/arm/tms570/start/bspstarthooks.c
+++ b/bsps/arm/tms570/start/bspstarthooks.c
@@ -5,7 +5,7 @@
*
* @ingroup RTEMSBSPsARMTMS570
*
- * @brief This source file contains the start hooks implementation.
+ * @brief This source file contains the bsp_start_hook_1(0 implementation.
*/
/*
diff --git a/spec/build/bsps/arm/tms570/objhwinit.yml
b/spec/build/bsps/arm/tms570/objhwinit.yml
index 436b3e3b53..8cd5d0d393 100644
--- a/spec/build/bsps/arm/tms570/objhwinit.yml
+++ b/spec/build/bsps/arm/tms570/objhwinit.yml
@@ -14,6 +14,7 @@ install:
- bsps/arm/tms570/include/bsp/ti_herc/errata_SSWF021_45.h
links: []
source:
+- bsps/arm/tms570/start/bspstarthooks.c
- bsps/arm/tms570/start/bspstarthooks-hwinit.c
- bsps/arm/tms570/start/errata_SSWF021_45.c
- bsps/arm/tms570/start/fail_notification.c
--
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[PATCH 16/47] bsp/tms570: Avoid vector overlay memory region
Reserve the space in a section. This makes it possible to use a common
memory region definition.
---
.../arm/tms570/start/linkcmds.tms570ls3137_hdk_intram | 11 ---
bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram | 11 ---
.../start/linkcmds.tms570ls3137_hdk_with_loader | 11 ---
3 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_intram
b/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_intram
index c5f2d1cfaf..cf7dbb6521 100644
--- a/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_intram
+++ b/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_intram
@@ -1,8 +1,7 @@
MEMORY {
ROM_INT (RX) : ORIGIN = 0x, LENGTH = 3M
- RAM_INT_VEC :ORIGIN = 0x0800, LENGTH = 256
- RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k - 256
+ RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k
RAM_EXT (AIW) : ORIGIN = 0x8000, LENGTH = 8M
}
@@ -25,6 +24,12 @@ REGION_ALIAS ("REGION_NOCACHE", RAM_INT);
REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
bsp_vector_table_in_start_section = 1;
-bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC);
+
+SECTIONS {
+ .int_vec_overlay : ALIGN_WITH_INPUT {
+bsp_int_vec_overlay_start = .;
+. += 256;
+ } > RAM_INT AT > RAM_INT
+}
INCLUDE linkcmds.armv4
diff --git a/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram
b/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram
index fa8365bad1..d5cbd45a87 100644
--- a/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram
+++ b/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram
@@ -1,8 +1,7 @@
MEMORY {
ROM_INT (RX) : ORIGIN = 0x, LENGTH = 3M
- RAM_INT_VEC :ORIGIN = 0x0800, LENGTH = 256
- RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k - 256
+ RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k
RAM_EXT (AIWX) : ORIGIN = 0x8000, LENGTH = 8M
}
@@ -25,6 +24,12 @@ REGION_ALIAS ("REGION_NOCACHE", RAM_EXT);
REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_EXT);
bsp_vector_table_in_start_section = 1;
-bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC);
+
+SECTIONS {
+ .int_vec_overlay : ALIGN_WITH_INPUT {
+bsp_int_vec_overlay_start = .;
+. += 256;
+ } > RAM_INT AT > RAM_INT
+}
INCLUDE linkcmds.armv4
diff --git a/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_with_loader
b/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_with_loader
index 86b602b1f1..6e633975fb 100644
--- a/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_with_loader
+++ b/bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_with_loader
@@ -2,8 +2,7 @@
MEMORY {
ROM_BOOT(RX) : ORIGIN = 0x, LENGTH = 256k
ROM_INT (RX) : ORIGIN = 0x0004, LENGTH = 3M-256k
- RAM_INT_VEC :ORIGIN = 0x0800, LENGTH = 256
- RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k - 256
+ RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k
RAM_EXT (AIWX) : ORIGIN = 0x8000, LENGTH = 8M
}
@@ -26,6 +25,12 @@ REGION_ALIAS ("REGION_NOCACHE", RAM_INT);
REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
bsp_vector_table_in_start_section = 1;
-bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC);
+
+SECTIONS {
+ .int_vec_overlay : ALIGN_WITH_INPUT {
+bsp_int_vec_overlay_start = .;
+. += 256;
+ } > RAM_INT AT > RAM_INT
+}
INCLUDE linkcmds.armv4
--
2.35.3
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[PATCH 15/47] bsp/tms570: Remove obsolete build option
--- spec/build/bsps/arm/tms570/grp.yml | 2 -- spec/build/bsps/arm/tms570/opttms570ls3137.yml | 16 2 files changed, 18 deletions(-) delete mode 100644 spec/build/bsps/arm/tms570/opttms570ls3137.yml diff --git a/spec/build/bsps/arm/tms570/grp.yml b/spec/build/bsps/arm/tms570/grp.yml index 64d627357c..a31553c4e1 100644 --- a/spec/build/bsps/arm/tms570/grp.yml +++ b/spec/build/bsps/arm/tms570/grp.yml @@ -40,8 +40,6 @@ links: uid: optreginit - role: build-dependency uid: optscibaud -- role: build-dependency - uid: opttms570ls3137 - role: build-dependency uid: optlinkflags - role: build-dependency diff --git a/spec/build/bsps/arm/tms570/opttms570ls3137.yml b/spec/build/bsps/arm/tms570/opttms570ls3137.yml deleted file mode 100644 index e2a3de8994..00 --- a/spec/build/bsps/arm/tms570/opttms570ls3137.yml +++ /dev/null @@ -1,16 +0,0 @@ -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -actions: -- get-boolean: null -- define-condition: null -build-type: option -copyrights: -- Copyright (C) 2020 embedded brains GmbH & Co. KG -default: -- enabled-by: true - value: false -description: | - target used for identify TMS570LS3137 board -enabled-by: true -links: [] -name: ARM_TMS570LS3137 -type: build -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 35/47] bsp/tms570: Initialize SRAM on demand
---
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 37 ++--
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index 4b3fe2fbbf..c42200d80a 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -9,6 +9,7 @@
*/
/*
+ * Copyright (C) 2023 embedded brains GmbH & Co. KG
* Copyright (C) 2016 Pavel Pisa
*
* Czech Technical University in Prague
@@ -50,7 +51,32 @@
#define PBIST_March13N_SP0x0008U /**< March13 N Algo for 1 Port
mem */
-BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
+/* Use assembly code to avoid using the stack */
+__attribute__((__naked__)) void bsp_start_hook_0( void )
+{
+ __asm__ volatile (
+/* Check if we run in SRAM */
+"ldr r0, =#" RTEMS_XSTRING( TMS570_MEMORY_SRAM_ORIGIN ) "\n"
+"ldr r1, =#" RTEMS_XSTRING( TMS570_MEMORY_SRAM_SIZE ) "\n"
+"sub r0, lr, r0\n"
+"cmp r1, r0\n"
+"blt 1f\n"
+
+/*
+ * Initialize the SRAM if we are not running in SRAM. While we are called,
+ * non-volatile register r7 is not used by start.S.
+ */
+"movs r0, #0x1\n"
+"mov r7, lr\n"
+"bl tms570_memory_init\n"
+"mov lr, r7\n"
+
+/* Jump to the high level start hook */
+"1: b tms570_start_hook_0\n"
+ );
+}
+
+static RTEMS_USED void tms570_start_hook_0( void )
{
#if TMS570_VARIANT == 3137
/*
@@ -170,15 +196,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
tms570_pbist_run_and_check( 0x08300020U, /* ESRAM Single Port PBIST */
(uint32_t) PBIST_March13N_SP );
-/*
- * Initialize CPU RAM.
- * This function uses the system module's hardware for auto-initialization
of memories and their
- * associated protection schemes. The CPU RAM is initialized by setting
bit 0 of the MSIENA register.
- * Hence the value 0x1 passed to the function.
- * This function will initialize the entire CPU RAM and the corresponding
ECC locations.
- */
-tms570_memory_init( 0x1U );
-
/*
* Enable ECC checking for TCRAM accesses.
* This function enables the CPU's ECC logic for accesses to B0TCM and
B1TCM.
--
2.35.3
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[PATCH 13/47] bsp/tms570: Avoid spurious interrupts
---
bsps/arm/tms570/irq/irq.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/bsps/arm/tms570/irq/irq.c b/bsps/arm/tms570/irq/irq.c
index 684e3d47fb..9a80e0e3d2 100644
--- a/bsps/arm/tms570/irq/irq.c
+++ b/bsps/arm/tms570/irq/irq.c
@@ -166,9 +166,17 @@ rtems_status_code tms570_irq_get_priority(
*/
void bsp_interrupt_dispatch(void)
{
- rtems_vector_number vector = TMS570_VIM.IRQINDEX-1;
+ while (true) {
+uint32_t irqindex;
- bsp_interrupt_handler_dispatch(vector);
+irqindex = TMS570_VIM.IRQINDEX;
+
+if (irqindex == 0) {
+ return;
+}
+
+bsp_interrupt_handler_dispatch(irqindex - 1);
+ }
}
static bool can_disable(rtems_vector_number vector)
--
2.35.3
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[PATCH 32/47] bsp/tms570: Remove reset source handling
Do not clear SYSESR and let the application handle the reset source.
---
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 47
1 file changed, 47 deletions(-)
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index 8ac53a3d44..f17c3bf555 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -88,53 +88,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
_errata_CORTEXR4_57_();
#endif
- /* check for power-on reset condition */
- /*SAFETYMCUSW 139 S MR:13.7 "Hardware status bit read check" */
- if ( ( TMS570_SYS1.SYSESR & TMS570_SYS1_SYSESR_PORST ) != 0U ) {
-/* clear all reset status flags */
-TMS570_SYS1.SYSESR = 0xU;
-
-/* continue with normal start-up sequence */
- }
- /*SAFETYMCUSW 139 S MR:13.7 "Hardware status bit read check" */
- else if ( ( TMS570_SYS1.SYSESR & TMS570_SYS1_SYSESR_OSCRST ) != 0U ) {
-/* Reset caused due to oscillator failure.
- Add user code here to handle oscillator failure */
- }
- /*SAFETYMCUSW 139 S MR:13.7 "Hardware status bit read check" */
- else if ( ( TMS570_SYS1.SYSESR & TMS570_SYS1_SYSESR_WDRST ) != 0U ) {
-/* Reset caused due
- * 1) windowed watchdog violation - Add user code here to handle watchdog
violation.
- * 2) ICEPICK Reset - After loading code via CCS / System Reset through
CCS
- */
-/* Check the WatchDog Status register */
-if ( TMS570_RTI.WDSTATUS != 0U ) {
- /* Add user code here to handle watchdog violation. */
- /* Clear the Watchdog reset flag in Exception Status register */
- TMS570_SYS1.SYSESR = TMS570_SYS1_SYSESR_WDRST;
-} else {
- /* Clear the ICEPICK reset flag in Exception Status register */
- TMS570_SYS1.SYSESR = TMS570_SYS1_SYSESR_WDRST;
-}
- }
- /*SAFETYMCUSW 139 S MR:13.7 "Hardware status bit read check" */
- else if ( ( TMS570_SYS1.SYSESR & TMS570_SYS1_SYSESR_CPURST ) != 0U ) {
-/* Reset caused due to CPU reset.
- CPU reset can be caused by CPU self-test completion, or
- by toggling the "CPU RESET" bit of the CPU Reset Control Register. */
-
-/* clear all reset status flags */
-TMS570_SYS1.SYSESR = TMS570_SYS1_SYSESR_CPURST;
- }
- /*SAFETYMCUSW 139 S MR:13.7 "Hardware status bit read check" */
- else if ( ( TMS570_SYS1.SYSESR & TMS570_SYS1_SYSESR_SWRST ) != 0U ) {
-/* Reset caused due to software reset.
- Add user code to handle software reset. */
- } else {
-/* Reset caused by nRST being driven low externally.
- Add user code to handle external reset. */
- }
-
/*
* Check if there were ESM group3 errors during power-up.
* These could occur during eFuse auto-load or during reads from flash OTP
--
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[PATCH 11/47] bsp/tms570: Implement set/get interrupt priority
---
bsps/arm/tms570/include/bsp/irq.h | 61 +-
bsps/arm/tms570/irq/irq.c | 132 ++
2 files changed, 140 insertions(+), 53 deletions(-)
diff --git a/bsps/arm/tms570/include/bsp/irq.h
b/bsps/arm/tms570/include/bsp/irq.h
index 3c7170eb2a..d0eb130a92 100644
--- a/bsps/arm/tms570/include/bsp/irq.h
+++ b/bsps/arm/tms570/include/bsp/irq.h
@@ -140,33 +140,56 @@
#ifndef ASM
/**
- * @brief Set priority of the interrupt vector.
- *
- * This function is here because of compability. It should set
- * priority of the interrupt vector.
- * @warning It does not set any priority at HW layer. It is nearly imposible to
- * @warning set priority of the interrupt on TMS570 in a nice way.
- * @param[in] vector vector of isr
- * @param[in] priority new priority assigned to the vector
- * @return Void
+ * @brief Sets the priority of the interrupt vector.
+ *
+ * The priority is defined by the VIM interrupt channel. Firstly, the VIM
+ * Interrupt Control (CHANCTRL) registers are searched to get the current
+ * channel associated with the interrupt vector. The interrupt vector of the
+ * channel associated with the priority is assigned to this channel. The
+ * specified interrupt vector is assigned to the channel associated with the
+ * priority. So, this function swaps the channels of two interrupt vectors.
+ *
+ * @param vector is the number of the interrupt vector to set the priority.
+ *
+ * @param priority is the priority to set.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_ID There was no interrupt vector associated with the
+ * number specified by ``vector``.
+ *
+ * @retval ::RTEMS_INVALID_PRIORITY The interrupt priority specified in
+ * ``priority`` was invalid.
*/
-void tms570_irq_set_priority(
+rtems_status_code tms570_irq_set_priority(
rtems_vector_number vector,
- unsignedpriority
+ uint32_tpriority
);
/**
- * @brief Gets priority of the interrupt vector.
+ * @brief Gets the priority of the interrupt vector.
*
- * This function is here because of compability. It returns priority
- * of the isr vector last set by tms570_irq_set_priority function.
+ * The priority is defined by the VIM interrupt channel. The VIM Interrupt
+ * Control (CHANCTRL) registers are searched to get the channel associated with
+ * the interrupt vector.
*
- * @warning It does not return any real priority of the HW layer.
- * @param[in] vector vector of isr
- * @retval 0 vector is invalid.
- * @retval priority priority of the interrupt
+ * @param vector is the number of the interrupt vector to set the priority.
+ *
+ * @param priority is the priority to set.
+ *
+ * @retval ::RTEMS_SUCCESSFUL The requested operation was successful.
+ *
+ * @retval ::RTEMS_INVALID_ADDRESS The ``priority`` parameter was NULL.
+ *
+ * @retval ::RTEMS_INVALID_ID There was no interrupt vector associated with the
+ * number specified by ``vector``.
+ *
+ * @retval ::RTEMS_NOT_DEFINED The interrupt has no associated priority.
*/
-unsigned tms570_irq_get_priority( rtems_vector_number vector );
+rtems_status_code tms570_irq_get_priority(
+ rtems_vector_number vector,
+ uint32_t*priority
+);
#endif /* ASM */
diff --git a/bsps/arm/tms570/irq/irq.c b/bsps/arm/tms570/irq/irq.c
index bdc7fb8f0a..c5bdea577b 100644
--- a/bsps/arm/tms570/irq/irq.c
+++ b/bsps/arm/tms570/irq/irq.c
@@ -46,48 +46,112 @@
#include
#include
-unsigned int priorityTable[BSP_INTERRUPT_VECTOR_COUNT];
+#define VIM_CHANCTRL_COUNT 24
+#define VIM_CHANMAP_MASK UINT32_C(0x7f)
+#define VIM_CHANMAP_SHIFT(i) (24 - (8 * (i)))
-/**
- * @brief Set priority of the interrupt vector.
- *
- * This function is here because of compability. It should set
- * priority of the interrupt vector.
- * @warning It does not set any priority at HW layer. It is nearly imposible to
- * @warning set priority of the interrupt on TMS570 in a nice way.
- * @param[in] vector vector of isr
- * @param[in] priority new priority assigned to the vector
- * @return Void
- */
-void tms570_irq_set_priority(
+static void vim_set_channel_request(uint32_t channel, uint32_t request)
+{
+ uint32_t chanctrl;
+ int shift;
+
+ chanctrl = TMS570_VIM.CHANCTRL[channel / 4];
+ shift = VIM_CHANMAP_SHIFT(channel % 4);
+ chanctrl &= ~(VIM_CHANMAP_MASK << shift);
+ chanctrl |= request << shift;
+ TMS570_VIM.CHANCTRL[channel / 4] = chanctrl;
+}
+
+rtems_status_code tms570_irq_set_priority(
rtems_vector_number vector,
- unsigned priority
+ uint32_tpriority
)
{
- if ( bsp_interrupt_is_valid_vector(vector) ) {
-priorityTable[vector] = priority;
+ rtems_interrupt_level level;
+ uint32_t current_channel;
+ uint32_t chanctrl;
+ size_t i;
+ size_t j;
+
+ if (!bsp_interrupt_is_valid_vector(vector)) {
+ return RTEMS_INVALID_ID;
+ }
+
+ if (priority < 2) {
+return RTEMS_INVALID_PRIORITY;
+ }
+
+ if (priority >=
[PATCH 30/47] bsp/tms570: TMS570LC4x Errata DEVICE#60
From: Tyler Miller
---
bsps/arm/tms570/start/init_esm.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/bsps/arm/tms570/start/init_esm.c b/bsps/arm/tms570/start/init_esm.c
index 794bf156cb..35fd1c8eab 100644
--- a/bsps/arm/tms570/start/init_esm.c
+++ b/bsps/arm/tms570/start/init_esm.c
@@ -9,6 +9,7 @@
*/
/*
+ * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc
* Copyright (C) 2016 Pavel Pisa
*
* Czech Technical University in Prague
@@ -68,8 +69,12 @@ void tms570_esm_init( void )
/** - Reset error pin */
if (TMS570_ESM.EPSR == 0U) {
-TMS570_ESM.EKR = 0x0005U;
- } else {
+/*
+ * Per TMS570LC4x Errata DEVICE#60, the error pin cannot be cleared with a
+ * normal EKR write upon system reset. Put in diagnostic followed by
+ * normal mode instead. This sequence works also on other chip variants.
+ */
+TMS570_ESM.EKR = 0x000AU;
TMS570_ESM.EKR = 0xU;
}
--
2.35.3
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[PATCH 12/47] bsp/tms570: Implement interrupt is enabled/pending
---
bsps/arm/tms570/irq/irq.c | 46 ++-
1 file changed, 40 insertions(+), 6 deletions(-)
diff --git a/bsps/arm/tms570/irq/irq.c b/bsps/arm/tms570/irq/irq.c
index c5bdea577b..684e3d47fb 100644
--- a/bsps/arm/tms570/irq/irq.c
+++ b/bsps/arm/tms570/irq/irq.c
@@ -49,6 +49,8 @@
#define VIM_CHANCTRL_COUNT 24
#define VIM_CHANMAP_MASK UINT32_C(0x7f)
#define VIM_CHANMAP_SHIFT(i) (24 - (8 * (i)))
+#define VIM_REQ_REG(vector) ((vector) >> 5)
+#define VIM_REQ_BIT(vector) (UINT32_C(1) << ((vector) & 0x1f))
static void vim_set_channel_request(uint32_t channel, uint32_t request)
{
@@ -169,6 +171,12 @@ void bsp_interrupt_dispatch(void)
bsp_interrupt_handler_dispatch(vector);
}
+static bool can_disable(rtems_vector_number vector)
+{
+ /* INT_REQ0 and INT_REQ1 are always enabled as FIQ/NMI */
+ return vector >= 2;
+}
+
/**
* @brief enables interrupt vector in the HW
*
@@ -183,6 +191,20 @@ rtems_status_code bsp_interrupt_get_attributes(
rtems_interrupt_attributes *attributes
)
{
+ bool can_disable_vector;
+
+ bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
+ bsp_interrupt_assert(attributes != NULL);
+
+ can_disable_vector = can_disable(vector);
+ attributes->is_maskable = can_disable_vector;
+ attributes->can_enable = true;
+ attributes->maybe_enable = true;
+ attributes->can_disable = can_disable_vector;
+ attributes->maybe_disable = can_disable_vector;
+ attributes->can_get_affinity = true;
+ attributes->can_set_affinity = true;
+
return RTEMS_SUCCESSFUL;
}
@@ -191,10 +213,14 @@ rtems_status_code bsp_interrupt_is_pending(
bool *pending
)
{
+ uint32_t intreq;
+
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(pending != NULL);
- *pending = false;
- return RTEMS_UNSATISFIED;
+
+ intreq = TMS570_VIM.INTREQ[VIM_REQ_REG(vector)];
+ *pending = (intreq & VIM_REQ_BIT(vector)) != 0;
+ return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
@@ -214,10 +240,14 @@ rtems_status_code bsp_interrupt_vector_is_enabled(
bool *enabled
)
{
+ uint32_t reqen;
+
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
bsp_interrupt_assert(enabled != NULL);
- *enabled = false;
- return RTEMS_UNSATISFIED;
+
+ reqen = TMS570_VIM.REQENASET[VIM_REQ_REG(vector)];
+ *enabled = (reqen & VIM_REQ_BIT(vector)) != 0;
+ return RTEMS_SUCCESSFUL;
}
rtems_status_code bsp_interrupt_vector_enable(
@@ -225,7 +255,7 @@ rtems_status_code bsp_interrupt_vector_enable(
)
{
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
- TMS570_VIM.REQENASET[vector >> 5] = 1 << (vector & 0x1f);
+ TMS570_VIM.REQENASET[VIM_REQ_REG(vector)] = VIM_REQ_BIT(vector);
return RTEMS_SUCCESSFUL;
}
@@ -242,8 +272,12 @@ rtems_status_code bsp_interrupt_vector_disable(
rtems_vector_number vector
)
{
+ if (!can_disable(vector)) {
+return RTEMS_UNSATISFIED;
+ }
+
bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
- TMS570_VIM.REQENACLR[vector >> 5] = 1 << (vector & 0x1f);
+ TMS570_VIM.REQENACLR[VIM_REQ_REG(vector)] = VIM_REQ_BIT(vector);
return RTEMS_SUCCESSFUL;
}
--
2.35.3
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[PATCH 27/47] bsp/tms570: Simplify expression
--- bsps/arm/tms570/start/bspstarthooks-hwinit.c | 23 ++-- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c b/bsps/arm/tms570/start/bspstarthooks-hwinit.c index 31ff4aa359..41f585cad0 100644 --- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c +++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c @@ -289,17 +289,18 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void ) /* NOTE : Please Refer DEVICE DATASHEET for the list of Supported Memories and their channel numbers. Memory Initialization is perfomed only on the user selected memories in HALCoGen's GUI SAFETY INIT tab. */ - tms570_memory_init( (uint32_t) ( (uint32_t) 1U << 1U ) | /* DMA RAM */ -(uint32_t) ( (uint32_t) 1U << 2U ) |/* VIM RAM */ -(uint32_t) ( (uint32_t) 1U << 5U ) |/* CAN1 RAM */ -(uint32_t) ( (uint32_t) 1U << 6U ) |/* CAN2 RAM */ -(uint32_t) ( (uint32_t) 1U << 10U ) | /* CAN3 RAM */ -(uint32_t) ( (uint32_t) 1U << 8U ) |/* ADC1 RAM */ -(uint32_t) ( (uint32_t) 1U << 14U ) | /* ADC2 RAM */ -(uint32_t) ( (uint32_t) 1U << 3U ) |/* HET1 RAM */ -(uint32_t) ( (uint32_t) 1U << 4U ) |/* HTU1 RAM */ -(uint32_t) ( (uint32_t) 1U << 15U ) | /* HET2 RAM */ -(uint32_t) ( (uint32_t) 1U << 16U ) /* HTU2 RAM */ + tms570_memory_init( +( UINT32_C(1) << 1 ) |/* DMA RAM */ +( UINT32_C(1) << 2 ) |/* VIM RAM */ +( UINT32_C(1) << 5 ) |/* CAN1 RAM */ +( UINT32_C(1) << 6 ) |/* CAN2 RAM */ +( UINT32_C(1) << 10 ) | /* CAN3 RAM */ +( UINT32_C(1) << 8 ) |/* ADC1 RAM */ +( UINT32_C(1) << 14 ) | /* ADC2 RAM */ +( UINT32_C(1) << 3 ) |/* HET1 RAM */ +( UINT32_C(1) << 4 ) |/* HTU1 RAM */ +( UINT32_C(1) << 15 ) | /* HET2 RAM */ +( UINT32_C(1) << 16 ) /* HTU2 RAM */ ); /* Disable parity */ -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 25/47] bsp/tms570: Add TMS570LC4357 pin config support
From: Tyler Miller
---
.../arm/tms570/include/bsp/ti_herc/reg_iomm.h | 44 ---
bsps/arm/tms570/include/bsp/tms570.h | 3 +-
bsps/arm/tms570/start/pinmux.c| 4 +-
3 files changed, 12 insertions(+), 39 deletions(-)
diff --git a/bsps/arm/tms570/include/bsp/ti_herc/reg_iomm.h
b/bsps/arm/tms570/include/bsp/ti_herc/reg_iomm.h
index df56aa5f51..414110ff60 100644
--- a/bsps/arm/tms570/include/bsp/ti_herc/reg_iomm.h
+++ b/bsps/arm/tms570/include/bsp/ti_herc/reg_iomm.h
@@ -50,40 +50,7 @@
#define LIBBSP_ARM_TMS570_IOMM
#include
-
-typedef struct{
- uint32_t PINMMR0; /*Pin Multiplexing Control Register 0*/
- uint32_t PINMMR1; /*Pin Multiplexing Control Register 1*/
- uint32_t PINMMR2; /*Pin Multiplexing Control Register 2*/
- uint32_t PINMMR3; /*Pin Multiplexing Control Register 3*/
- uint32_t PINMMR4; /*Pin Multiplexing Control Register 4*/
- uint32_t PINMMR5; /*Pin Multiplexing Control Register 5*/
- uint32_t PINMMR6; /*Pin Multiplexing Control Register 6*/
- uint32_t PINMMR7; /*Pin Multiplexing Control Register 7*/
- uint32_t PINMMR8; /*Pin Multiplexing Control Register 8*/
- uint32_t PINMMR9; /*Pin Multiplexing Control Register 9*/
- uint32_t PINMMR10; /*Pin Multiplexing Control Register 10*/
- uint32_t PINMMR11; /*Pin Multiplexing Control Register 11*/
- uint32_t PINMMR12; /*Pin Multiplexing Control Register 12*/
- uint32_t PINMMR13; /*Pin Multiplexing Control Register 13*/
- uint32_t PINMMR14; /*Pin Multiplexing Control Register 14*/
- uint32_t PINMMR15; /*Pin Multiplexing Control Register 15*/
- uint32_t PINMMR16; /*Pin Multiplexing Control Register 16*/
- uint32_t PINMMR17; /*Pin Multiplexing Control Register 17*/
- uint32_t PINMMR18; /*Pin Multiplexing Control Register 18*/
- uint32_t PINMMR19; /*Pin Multiplexing Control Register 19*/
- uint32_t PINMMR20; /*Pin Multiplexing Control Register 20*/
- uint32_t PINMMR21; /*Pin Multiplexing Control Register 21*/
- uint32_t PINMMR22; /*Pin Multiplexing Control Register 22*/
- uint32_t PINMMR23; /*Pin Multiplexing Control Register 23*/
- uint32_t PINMMR24; /*Pin Multiplexing Control Register 24*/
- uint32_t PINMMR25; /*Pin Multiplexing Control Register 25*/
- uint32_t PINMMR26; /*Pin Multiplexing Control Register 26*/
- uint32_t PINMMR27; /*Pin Multiplexing Control Register 27*/
- uint32_t PINMMR28; /*Pin Multiplexing Control Register 28*/
- uint32_t PINMMR29; /*Pin Multiplexing Control Register 29*/
- uint32_t PINMMR30; /*Pin Multiplexing Control Register 30*/
-} tms570_pinmux_t;
+#include
typedef struct{
uint32_t REVISION_REG; /*Revision Register*/
@@ -102,7 +69,14 @@ typedef struct{
uint32_t FAULT_STATUS_REG; /*Fault Status Register*/
uint32_t FAULT_CLEAR_REG; /*Fault Clear Register*/
uint8_t reserved5 [16];
- tms570_pinmux_t PINMUX; /*Pin Multiplexing Control Registers*/
+#if TMS570_VARIANT == 4357
+ uint32_t PINMMR[180]; /* 0x110 - 1A4 : Output Pin Multiplexing Control
+ Registers (38 registers); 0x250 - 0x29C : Input Pin
+ Multiplexing Control Registers (20); 0X390 - 3DC :
+ Special Functionality Control Registers (20) */
+#else
+ uint32_t PINMMR[30]; /*Pin Multiplexing Control Register 0-30*/
+#endif
} tms570_iomm_t;
diff --git a/bsps/arm/tms570/include/bsp/tms570.h
b/bsps/arm/tms570/include/bsp/tms570.h
index 6518653553..c057664b9a 100644
--- a/bsps/arm/tms570/include/bsp/tms570.h
+++ b/bsps/arm/tms570/include/bsp/tms570.h
@@ -131,11 +131,10 @@
#endif
#if TMS570_VARIANT == 4357
#define TMS570_IOMM (*(volatile tms570_iomm_t*)0x1C00)
-#define TMS570_PINMUX (*(volatile tms570_pinmux_t*)0x1D10)
#else
#define TMS570_IOMM (*(volatile tms570_iomm_t*)0xEA00)
-#define TMS570_PINMUX (*(volatile tms570_pinmux_t*)0xEB10)
#endif
+#define TMS570_PINMUX ((volatile uint32_t*)TMS570_IOMM.PINMMR)
#define TMS570_LIN (*(volatile tms570_lin_t*)0xFFF7E400)
#if TMS570_VARIANT == 4357
#define TMS570_LIN2 (*(volatile tms570_lin_t*)0xFFF7E600)
diff --git a/bsps/arm/tms570/start/pinmux.c b/bsps/arm/tms570/start/pinmux.c
index 9277a36431..16eb41a129 100644
--- a/bsps/arm/tms570/start/pinmux.c
+++ b/bsps/arm/tms570/start/pinmux.c
@@ -54,7 +54,7 @@ tms570_bsp_pin_to_pinmmrx(volatile uint32_t **pinmmrx,
uint32_t *pin_shift,
uint32_t config)
{
uint32_t pin_num = (config & TMS570_PIN_NUM_MASK) >> TMS570_PIN_NUM_SHIFT;
- *pinmmrx = _IOMM.PINMUX.PINMMR0 + (pin_num >> 2);
+ *pinmmrx = TMS570_PINMUX + (pin_num >> 2);
*pin_shift = (pin_num & 0x3)*8;
}
@@ -178,7 +178,7 @@ tms570_bsp_pinmmr_config(const uint32_t *pinmmr_values, int
reg_start, int reg_c
[PATCH 23/47] bsp/tms570: Add tms570_pbist_run_and_check()
From: Tyler Miller
---
bsps/arm/tms570/include/bsp/tms570_selftest.h | 2 +
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 57 +--
bsps/arm/tms570/start/tms570_selftest.c | 28 +
3 files changed, 33 insertions(+), 54 deletions(-)
diff --git a/bsps/arm/tms570/include/bsp/tms570_selftest.h
b/bsps/arm/tms570/include/bsp/tms570_selftest.h
index c46e3247a8..fdad4de64c 100644
--- a/bsps/arm/tms570/include/bsp/tms570_selftest.h
+++ b/bsps/arm/tms570/include/bsp/tms570_selftest.h
@@ -198,6 +198,8 @@ void tms570_pbist_fail( void );
void tms570_pbist_stop( void );
+void tms570_pbist_run_and_check( uint32_t raminfoL, uint32_t algomask );
+
void tms570_enable_parity( void );
void tms570_disable_parity( void );
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index 593c7a9ec3..31ff4aa359 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -155,47 +155,13 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
tms570_pbist_self_check();
/* Run PBIST on STC ROM */
- tms570_pbist_run( (uint32_t) STC_ROM_PBIST_RAM_GROUP,
+ tms570_pbist_run_and_check( (uint32_t) STC_ROM_PBIST_RAM_GROUP,
( (uint32_t) PBIST_TripleReadSlow | (uint32_t) PBIST_TripleReadFast ) );
- /* Wait for PBIST for STC ROM to be completed */
- /*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */
- while ( tms570_pbist_is_test_completed() != TRUE ) {
- } /* Wait */
-
- /* Check if PBIST on STC ROM passed the self-test */
- if ( tms570_pbist_is_test_passed() != TRUE ) {
-/* PBIST and STC ROM failed the self-test.
- * Need custom handler to check the memory failure
- * and to take the appropriate next step.
- */
-tms570_pbist_fail();
- }
-
- /* Disable PBIST clocks and disable memory self-test mode */
- tms570_pbist_stop();
-
/* Run PBIST on PBIST ROM */
- tms570_pbist_run( (uint32_t) PBIST_ROM_PBIST_RAM_GROUP,
+ tms570_pbist_run_and_check( (uint32_t) PBIST_ROM_PBIST_RAM_GROUP,
( (uint32_t) PBIST_TripleReadSlow | (uint32_t) PBIST_TripleReadFast ) );
- /* Wait for PBIST for PBIST ROM to be completed */
- /*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */
- while ( tms570_pbist_is_test_completed() != TRUE ) {
- } /* Wait */
-
- /* Check if PBIST ROM passed the self-test */
- if ( tms570_pbist_is_test_passed() != TRUE ) {
-/* PBIST and STC ROM failed the self-test.
- * Need custom handler to check the memory failure
- * and to take the appropriate next step.
- */
-tms570_pbist_fail();
- }
-
- /* Disable PBIST clocks and disable memory self-test mode */
- tms570_pbist_stop();
-
if ( !tms570_running_from_tcram() ) {
/*
* The next sequence tests TCRAM, main TMS570 system operation RAM area.
@@ -223,26 +189,9 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
* The CPU RAM is a single-port memory. The actual "RAM Group" for all
on-chip SRAMs is defined in the
* device datasheet.
*/
-tms570_pbist_run( 0x08300020U, /* ESRAM Single Port PBIST */
+tms570_pbist_run_and_check( 0x08300020U, /* ESRAM Single Port PBIST */
(uint32_t) PBIST_March13N_SP );
-/* Wait for PBIST for CPU RAM to be completed */
-/*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */
-while ( tms570_pbist_is_test_completed() != TRUE ) {
-} /* Wait */
-
-/* Check if CPU RAM passed the self-test */
-if ( tms570_pbist_is_test_passed() != TRUE ) {
- /* CPU RAM failed the self-test.
- * Need custom handler to check the memory failure
- * and to take the appropriate next step.
- */
- tms570_pbist_fail();
-}
-
-/* Disable PBIST clocks and disable memory self-test mode */
-tms570_pbist_stop();
-
/*
* Initialize CPU RAM.
* This function uses the system module's hardware for auto-initialization
of memories and their
diff --git a/bsps/arm/tms570/start/tms570_selftest.c
b/bsps/arm/tms570/start/tms570_selftest.c
index 7fad351aee..20d0f0d352 100644
--- a/bsps/arm/tms570/start/tms570_selftest.c
+++ b/bsps/arm/tms570/start/tms570_selftest.c
@@ -9,6 +9,7 @@
*/
/*
+ * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc
* Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com
*
*
@@ -439,6 +440,33 @@ bool tms570_pbist_is_test_passed( void )
return status;
}
+/**
+ * Helper method that will run a pbist test and blocks until it finishes
+ * Reduces code duplication in start system start hooks
+ */
+void tms570_pbist_run_and_check(uint32_t raminfoL, uint32_t algomask)
+{
+ /* Run PBIST on region */
+ tms570_pbist_run(raminfoL, algomask);
+
+ /* Wait for PBIST for region to be completed */
+ /*SAFETYMCUSW 28 D MR:NA "Hardware status
[PATCH 28/47] bsp/tms570: Conditionalize TMS570LS3137 errata
---
bsps/arm/tms570/start/bspstarthooks-hwinit.c | 4
1 file changed, 4 insertions(+)
diff --git a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
index 41f585cad0..561e6a18e6 100644
--- a/bsps/arm/tms570/start/bspstarthooks-hwinit.c
+++ b/bsps/arm/tms570/start/bspstarthooks-hwinit.c
@@ -51,6 +51,7 @@
BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
{
+#if TMS570_VARIANT == 3137
/*
* Work Around for Errata DEVICE#140: ( Only on Rev A silicon)
*
@@ -62,6 +63,7 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
if ( TMS570_SYS1.DEVID == 0x802AAD05U ) {
_esmCcmErrorsClear_();
}
+#endif
/* Enable CPU Event Export */
/* This allows the CPU to signal any single-bit or double-bit errors detected
@@ -69,11 +71,13 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
*/
_coreEnableEventBusExport_();
+#if TMS570_VARIANT == 3137
/* Workaround for Errata CORTEXR4 66 */
_errata_CORTEXR4_66_();
/* Workaround for Errata CORTEXR4 57 */
_errata_CORTEXR4_57_();
+#endif
/* check for power-on reset condition */
/*SAFETYMCUSW 139 S MR:13.7 "Hardware status bit read check" */
--
2.35.3
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[PATCH 24/47] bsp/tms570: Remove double pin configuration
From: Tyler Miller
---
bsps/arm/tms570/start/pinmux.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/bsps/arm/tms570/start/pinmux.c b/bsps/arm/tms570/start/pinmux.c
index d9c52cd00d..9277a36431 100644
--- a/bsps/arm/tms570/start/pinmux.c
+++ b/bsps/arm/tms570/start/pinmux.c
@@ -182,16 +182,6 @@ tms570_bsp_pinmmr_config(const uint32_t *pinmmr_values,
int reg_start, int reg_c
pval = pinmmr_values;
cnt = reg_count;
- do {
-*pinmmrx = *pinmmrx & *pval;
-pinmmrx++;
-pval++;
- } while( --cnt );
-
- pinmmrx = (_IOMM.PINMUX.PINMMR0) + reg_start;
- pval = pinmmr_values;
- cnt = reg_count;
-
do {
*pinmmrx = *pval;
pinmmrx++;
--
2.35.3
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[PATCH 21/47] bsp/tms570: Add TMS570LC4357 PBIST support
From: Tyler Miller
---
bsps/arm/tms570/start/tms570_selftest.c | 51 -
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/bsps/arm/tms570/start/tms570_selftest.c
b/bsps/arm/tms570/start/tms570_selftest.c
index f8a64abb7b..7fad351aee 100644
--- a/bsps/arm/tms570/start/tms570_selftest.c
+++ b/bsps/arm/tms570/start/tms570_selftest.c
@@ -49,6 +49,32 @@
#include
#include
+/*
+ * According to the TMS570LS3137 (HCLK max 180MHz, VCLK max 100MHz) and
+ * TMS570LC4357 (GCLK1 max 300MHz, VCLK max 110MHz, HCLK max 150MHz)
+ * datasheets, the PBIST ROM clock frequency is limited to 90MHz.
+ *
+ * For LS3137 PBIST ROM clock frequency = HCLK / (1 << MSTGCR[9:8])
+ *
+ * For LC4357 PBIST ROM clock frequency = GCLK1 / (1 << MSTGCR[9:8])
+ */
+#if TMS570_VARIANT == 4357
+#define MSTGCR_ENABLE_MEMORY_SELF_TEST 0x020a
+#define MSTGCR_DISABLE_MEMORY_SELF_TEST 0x0205
+#define PBIST_RESET_DELAY (64 * 4)
+#else
+#define MSTGCR_ENABLE_MEMORY_SELF_TEST 0x010a
+#define MSTGCR_DISABLE_MEMORY_SELF_TEST 0x0105
+#define PBIST_RESET_DELAY (32 * 2)
+#endif
+
+static void tms570_pbist_reset_delay( void )
+{
+ for ( int i = 0; i < PBIST_RESET_DELAY; ++i ) {
+__asm__ volatile ( "" );
+ }
+}
+
/**
* @brief Checks to see if the EFUSE Stuck at zero test is completed
successfully (HCG:efcStuckZeroTest).
/
@@ -232,7 +258,6 @@ uint32_t tms570_efc_check( void )
/* Requirements : HL_SR399 */
void tms570_pbist_self_check( void )
{
- volatile uint32_t i = 0U;
uint32_t PBIST_wait_done_loop = 0U;
/* Run a diagnostic check on the memory self-test controller */
@@ -241,15 +266,14 @@ void tms570_pbist_self_check( void )
/* Disable PBIST clocks and ROM clock */
TMS570_PBIST.PACT = 0x0U;
- /* PBIST ROM clock frequency = HCLK frequency /2 */
/* Disable memory self controller */
- TMS570_SYS1.MSTGCR = 0x0105U;
+ TMS570_SYS1.MSTGCR = MSTGCR_DISABLE_MEMORY_SELF_TEST;
/* Disable Memory Initialization controller */
TMS570_SYS1.MINITGCR = 0x5U;
/* Enable memory self controller */
- TMS570_SYS1.MSTGCR = 0x010AU;
+ TMS570_SYS1.MSTGCR = MSTGCR_ENABLE_MEMORY_SELF_TEST;
/* Clear PBIST Done */
TMS570_SYS1.MSTCGSTAT = 0x1U;
@@ -257,11 +281,7 @@ void tms570_pbist_self_check( void )
/* Enable PBIST controller */
TMS570_SYS1.MSIENA = 0x1U;
- /* wait for 32 VBUS clock cycles at least, based on HCLK to VCLK ratio */
- /*SAFETYMCUSW 134 S MR:12.2 "Wait for few clock cycles (Value of
i not used)" */
- /*SAFETYMCUSW 134 S MR:12.2 "Wait for few clock cycles (Value of
i not used)" */
- for ( i = 0U; i < ( 32U + ( 32U * 1U ) ); i++ ) { /* Wait */
- }
+ tms570_pbist_reset_delay();
/* Enable PBIST clocks and ROM clock */
TMS570_PBIST.PACT = 0x1U;
@@ -331,11 +351,8 @@ void tms570_pbist_run(
uint32_t algomask
)
{
- volatile uint32_t i = 0U;
-
- /* PBIST ROM clock frequency = HCLK frequency /2 */
/* Disable memory self controller */
- TMS570_SYS1.MSTGCR = 0x0105U;
+ TMS570_SYS1.MSTGCR = MSTGCR_DISABLE_MEMORY_SELF_TEST;
/* Disable Memory Initialization controller */
TMS570_SYS1.MINITGCR = 0x5U;
@@ -344,13 +361,9 @@ void tms570_pbist_run(
TMS570_SYS1.MSIENA = 0x1U;
/* Enable memory self controller */
- TMS570_SYS1.MSTGCR = 0x010AU;
+ TMS570_SYS1.MSTGCR = MSTGCR_ENABLE_MEMORY_SELF_TEST;
- /* wait for 32 VBUS clock cycles at least, based on HCLK to VCLK ratio */
- /*SAFETYMCUSW 134 S MR:12.2 "Wait for few clock cycles (Value of
i not used)" */
- /*SAFETYMCUSW 134 S MR:12.2 "Wait for few clock cycles (Value of
i not used)" */
- for ( i = 0U; i < ( 32U + ( 32U * 1U ) ); i++ ) { /* Wait */
- }
+ tms570_pbist_reset_delay();
/* Enable PBIST clocks and ROM clock */
TMS570_PBIST.PACT = 0x1U;
--
2.35.3
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[PATCH 17/47] bsp/tms570: Add variant enable to build
---
spec/build/bsps/arm/tms570/optvariant.yml | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/spec/build/bsps/arm/tms570/optvariant.yml
b/spec/build/bsps/arm/tms570/optvariant.yml
index 2925b4bf04..fb33e8ade4 100644
--- a/spec/build/bsps/arm/tms570/optvariant.yml
+++ b/spec/build/bsps/arm/tms570/optvariant.yml
@@ -5,9 +5,13 @@ actions:
- 3137
- 4357
- define: null
+- env-assign: null
+- set-value: TMS570_VARIANT_${TMS570_VARIANT}
+- substitute: null
+- env-append: ENABLE
build-type: option
copyrights:
-- Copyright (C) 2023 embedded brains GmbH (http://www.embedded-brains.de)
+- Copyright (C) 2023 embedded brains GmbH & Co. KG
default:
- enabled-by: true
value: 3137
--
2.35.3
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[PATCH 05/47] bsp/tms570: Relicense to BSD-2-Clause
Change license to BSD-2-Clause according to file history and contributor agreements. Add Doxygen file comments. Update #3053. Update #3707. --- bsps/arm/tms570/clock/clock.c | 30 + bsps/arm/tms570/console/printk-support.c | 31 ++ bsps/arm/tms570/console/tms570-sci.c | 33 +++ bsps/arm/tms570/cpucounter/cpucounterread.c | 38 - bsps/arm/tms570/include/bsp.h | 29 ++--- bsps/arm/tms570/include/bsp/irq.h | 30 + bsps/arm/tms570/include/bsp/system-clocks.h | 30 + bsps/arm/tms570/include/bsp/ti_herc/reg_adc.h | 10 + .../tms570/include/bsp/ti_herc/reg_ccmsr.h| 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_crc.h | 10 + .../arm/tms570/include/bsp/ti_herc/reg_dcan.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_dma.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_dmm.h | 10 + .../tms570/include/bsp/ti_herc/reg_efuse.h| 10 + .../tms570/include/bsp/ti_herc/reg_emacc.h| 10 + .../tms570/include/bsp/ti_herc/reg_emacm.h| 10 + .../arm/tms570/include/bsp/ti_herc/reg_emif.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_esm.h | 10 + .../tms570/include/bsp/ti_herc/reg_flash.h| 10 + .../tms570/include/bsp/ti_herc/reg_flex_ray.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_gio.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_htu.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_i2c.h | 10 + .../arm/tms570/include/bsp/ti_herc/reg_iomm.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_lin.h | 10 + .../arm/tms570/include/bsp/ti_herc/reg_mdio.h | 10 + .../tms570/include/bsp/ti_herc/reg_n2het.h| 10 + .../tms570/include/bsp/ti_herc/reg_pbist.h| 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pcr.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pll.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pmm.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pom.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_rti.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_rtp.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_sci.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_spi.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_stc.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h | 10 + .../arm/tms570/include/bsp/ti_herc/reg_sys2.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_tcr.h | 10 + .../tms570/include/bsp/ti_herc/reg_tcram.h| 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_vim.h | 10 + bsps/arm/tms570/include/bsp/tms570-pinmux.h | 30 ++--- bsps/arm/tms570/include/bsp/tms570-pins.h | 37 +++- bsps/arm/tms570/include/bsp/tms570-pom.h | 32 +++--- .../tms570/include/bsp/tms570-sci-driver.h| 30 + bsps/arm/tms570/include/bsp/tms570.h | 10 + bsps/arm/tms570/include/bsp/tms570_hwinit.h | 42 +++ bsps/arm/tms570/include/bsp/tms570_selftest.h | 15 --- .../include/bsp/tms570_selftest_parity.h | 30 ++--- .../tms570/include/bsp/tms570lc4357-pins.h| 29 ++--- .../tms570/include/bsp/tms570ls3137zwt-pins.h | 29 ++--- bsps/arm/tms570/irq/irq.c | 30 ++--- bsps/arm/tms570/start/bspreset.c | 37 bsps/arm/tms570/start/bspstart.c | 32 ++ bsps/arm/tms570/start/bspstarthooks-hwinit.c | 40 ++ bsps/arm/tms570/start/bspstarthooks.c | 34 ++- bsps/arm/tms570/start/fail_notification.c | 42 +++ bsps/arm/tms570/start/init_emif_sdram.c | 35 +++- bsps/arm/tms570/start/init_esm.c | 34 ++- bsps/arm/tms570/start/init_pinmux.c | 30 ++--- bsps/arm/tms570/start/init_system.c | 9 +++- bsps/arm/tms570/start/pinmux.c| 30 ++--- bsps/arm/tms570/start/tms570-pom.c| 32 +++--- bsps/arm/tms570/start/tms570_selftest.c | 5 ++- .../tms570/start/tms570_selftest_par_can.c| 35 .../tms570/start/tms570_selftest_par_mibspi.c | 35 .../tms570/start/tms570_selftest_par_std.c| 35 .../arm/tms570/start/tms570_selftest_parity.c | 31 +++--- bsps/arm/tms570/start/tms570_sys_core.S | 10 + bsps/arm/tms570/start/tms570_tcram_tests.c| 14 +++ 72 files changed, 1232 insertions(+), 183 deletions(-) diff --git a/bsps/arm/tms570/clock/clock.c b/bsps/arm/tms570/clock/clock.c index 64daa213ac..5e5965a680 100644 --- a/bsps/arm/tms570/clock/clock.c +++ b/bsps/arm/tms570/clock/clock.c @@ -1,13 +1,15 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * * @ingroup RTEMSBSPsARMTMS570 * - * @brief clock
[PATCH 19/47] bsp/tms570: Add TMS570LC4357 BSP variants
---
.../tms570/start/linkcmds.tms570lc4357_hdk| 24 +++
.../start/linkcmds.tms570lc4357_hdk_sdram | 30 +++
spec/build/bsps/arm/tms570/bsplc4357hdk.yml | 21 +
.../bsps/arm/tms570/bsplc4357hdksdram.yml | 19
spec/build/bsps/arm/tms570/obj.yml| 2 ++
spec/build/bsps/arm/tms570/optvariant.yml | 4 +++
6 files changed, 100 insertions(+)
create mode 100644 bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk
create mode 100644 bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk_sdram
create mode 100644 spec/build/bsps/arm/tms570/bsplc4357hdk.yml
create mode 100644 spec/build/bsps/arm/tms570/bsplc4357hdksdram.yml
diff --git a/bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk
b/bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk
new file mode 100644
index 00..70f60662a6
--- /dev/null
+++ b/bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk
@@ -0,0 +1,24 @@
+INCLUDE linkcmds.memory
+
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_INT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_INT);
+REGION_ALIAS ("REGION_WORK", RAM_INT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+REGION_ALIAS ("REGION_NOCACHE", RAM_INT);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
+
+bsp_vector_table_in_start_section = 1;
+bsp_int_vec_overlay_start = ORIGIN(ROM_INT) + 64;
+
+INCLUDE linkcmds.armv4
diff --git a/bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk_sdram
b/bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk_sdram
new file mode 100644
index 00..b6a76ff407
--- /dev/null
+++ b/bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk_sdram
@@ -0,0 +1,30 @@
+INCLUDE linkcmds.memory
+
+REGION_ALIAS ("REGION_START", RAM_EXT);
+REGION_ALIAS ("REGION_VECTOR", RAM_EXT);
+REGION_ALIAS ("REGION_TEXT", RAM_EXT);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_EXT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_EXT);
+REGION_ALIAS ("REGION_NOCACHE", RAM_EXT);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_EXT);
+
+bsp_vector_table_in_start_section = 1;
+
+SECTIONS {
+ .int_vec_overlay : ALIGN_WITH_INPUT {
+bsp_int_vec_overlay_start = .;
+. += 256;
+ } > RAM_INT AT > RAM_INT
+}
+
+INCLUDE linkcmds.armv4
diff --git a/spec/build/bsps/arm/tms570/bsplc4357hdk.yml
b/spec/build/bsps/arm/tms570/bsplc4357hdk.yml
new file mode 100644
index 00..54710fccb0
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/bsplc4357hdk.yml
@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: tms570lc4357_hdk
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2023 embedded brains GmbH & Co. KG
+cppflags: []
+enabled-by: true
+family: tms570
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: ../../tstsmallmem
+- role: build-dependency
+ uid: grp
+source: []
+type: build
diff --git a/spec/build/bsps/arm/tms570/bsplc4357hdksdram.yml
b/spec/build/bsps/arm/tms570/bsplc4357hdksdram.yml
new file mode 100644
index 00..376b1635f6
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/bsplc4357hdksdram.yml
@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: tms570lc4357_hdk_sdram
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2023 embedded brains GmbH & Co. KG
+cppflags: []
+enabled-by: true
+family: tms570
+includes: []
+install: []
+links:
+- role: build-dependency
+ uid: ../../opto2
+- role: build-dependency
+ uid: grp
+source: []
+type: build
diff --git a/spec/build/bsps/arm/tms570/obj.yml
b/spec/build/bsps/arm/tms570/obj.yml
index d6a4255a52..d9f0043397 100644
--- a/spec/build/bsps/arm/tms570/obj.yml
+++ b/spec/build/bsps/arm/tms570/obj.yml
@@ -65,6 +65,8 @@ install:
- bsps/arm/tms570/include/bsp/ti_herc/reg_vim.h
- destination: ${BSP_LIBDIR}
source:
+ - bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk
+ - bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk_sdram
- bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk
- bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_intram
- bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram
diff --git
[PATCH 10/47] bsp/tms570: Avoid errno for debug console
--- bsps/arm/tms570/console/printk-support.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsps/arm/tms570/console/printk-support.c b/bsps/arm/tms570/console/printk-support.c index 200aa13ec3..6e44ad0969 100644 --- a/bsps/arm/tms570/console/printk-support.c +++ b/bsps/arm/tms570/console/printk-support.c @@ -91,7 +91,7 @@ static void tms570_debug_console_init(void) tms570_sci_initialize(ctx); memset(, 0, sizeof(term)); - cfsetospeed(, B115200); + term.c_ospeed = B115200; tms570_sci_set_attributes(>base, ); BSP_output_char = tms570_debug_console_out; } -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 14/47] bsp/tms570: Add TM27 support
---
bsps/arm/tms570/include/tm27.h | 129 -
1 file changed, 128 insertions(+), 1 deletion(-)
diff --git a/bsps/arm/tms570/include/tm27.h b/bsps/arm/tms570/include/tm27.h
index 0dfa7bf628..a8ca08a0dd 100644
--- a/bsps/arm/tms570/include/tm27.h
+++ b/bsps/arm/tms570/include/tm27.h
@@ -1 +1,128 @@
-#include
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMTMS570
+ *
+ * @brief This header file provides a TM27 support implementation.
+ */
+
+/*
+ * Copyright (c) 2023 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+#include
+
+#include
+#include
+#include
+
+#define MUST_WAIT_FOR_INTERRUPT 1
+
+#define TM27_INTERRUPT_VECTOR_DEFAULT TMS570_IRQ_TIMER_3
+
+#define TM27_INTERRUPT_VECTOR_ALTERNATIVE TMS570_IRQ_TIMER_1
+
+static inline void Install_tm27_vector( rtems_interrupt_handler handler )
+{
+ static rtems_interrupt_entry entry_2;
+ static rtems_interrupt_entry entry_3;
+
+ TMS570_RTI.CNT[1].CPUCx = 1;
+ TMS570_RTI.CNT[1].UCx = 0;
+ TMS570_RTI.CNT[1].FRCx = 0;
+ TMS570_RTI.CMP[1].COMPx = 1;
+ TMS570_RTI.CMP[1].UDCPx = 1;
+ TMS570_RTI.CMP[2].COMPx = 1;
+ TMS570_RTI.CMP[2].UDCPx = 1;
+ TMS570_RTI.CMP[3].COMPx = 1;
+ TMS570_RTI.CMP[3].UDCPx = 1;
+ TMS570_RTI.COMPCTRL |= TMS570_RTI_COMPCTRL_COMPSEL1 |
+TMS570_RTI_COMPCTRL_COMPSEL2 |
+TMS570_RTI_COMPCTRL_COMPSEL3;
+ TMS570_RTI.GCTRL |= TMS570_RTI_GCTRL_CNT1EN;
+
+ rtems_interrupt_entry_initialize(
+_2,
+handler,
+NULL,
+"tm27"
+ );
+ (void) rtems_interrupt_entry_install(
+TMS570_IRQ_TIMER_2,
+RTEMS_INTERRUPT_SHARED,
+_2
+ );
+
+ rtems_interrupt_entry_initialize(
+_3,
+handler,
+NULL,
+"tm27"
+ );
+ (void) rtems_interrupt_entry_install(
+TMS570_IRQ_TIMER_3,
+RTEMS_INTERRUPT_SHARED,
+_3
+ );
+}
+
+static inline void Cause_tm27_intr(void)
+{
+ TMS570_RTI.SETINTENA = TMS570_RTI_SETINTENA_SETINT3;
+}
+
+static inline void Clear_tm27_intr(void)
+{
+ TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEARINT2 |
+TMS570_RTI_CLEARINTENA_CLEARINT3;
+}
+
+static inline void Lower_tm27_intr(void)
+{
+ TMS570_RTI.SETINTENA = TMS570_RTI_SETINTENA_SETINT2;
+ (void) _ARMV4_Status_irq_enable();
+}
+
+static inline rtems_status_code _TM27_Raise_alternative(void)
+{
+ TMS570_RTI.SETINTENA = TMS570_RTI_SETINTENA_SETINT1;
+ return RTEMS_SUCCESSFUL;
+}
+
+static inline rtems_status_code _TM27_Clear_alternative(void)
+{
+ TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEARINT1;
+ return RTEMS_SUCCESSFUL;
+}
+
+#endif /* __tm27_h */
--
2.35.3
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[PATCH 08/47] bsp/tms570: Rename tms570_initialize_and_clear()
Rename tms570_initialize_and_clear() in
tms570_pom_initialize_and_clear().
---
bsps/arm/tms570/include/bsp/tms570-pom.h | 2 +-
bsps/arm/tms570/start/bspstart.c | 2 +-
bsps/arm/tms570/start/tms570-pom.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/bsps/arm/tms570/include/bsp/tms570-pom.h
b/bsps/arm/tms570/include/bsp/tms570-pom.h
index 5abd8e77e8..aaf95ae8d0 100644
--- a/bsps/arm/tms570/include/bsp/tms570-pom.h
+++ b/bsps/arm/tms570/include/bsp/tms570-pom.h
@@ -70,7 +70,7 @@ extern "C" {
#define TMS570_POM_REGADDRMASK((1<<23)-1)
-void tms570_initialize_and_clear(void);
+void tms570_pom_initialize_and_clear(void);
void tms570_pom_remap(void);
/** @} */
diff --git a/bsps/arm/tms570/start/bspstart.c b/bsps/arm/tms570/start/bspstart.c
index ee6de51eed..60ce5345a9 100644
--- a/bsps/arm/tms570/start/bspstart.c
+++ b/bsps/arm/tms570/start/bspstart.c
@@ -49,7 +49,7 @@ void bsp_start( void )
void *need_remap_ptr;
unsigned int need_remap_int;
- tms570_initialize_and_clear();
+ tms570_pom_initialize_and_clear();
/*
* If RTEMS image does not start at address 0x
diff --git a/bsps/arm/tms570/start/tms570-pom.c
b/bsps/arm/tms570/start/tms570-pom.c
index 70c3e99ca7..f1a6d2d4af 100644
--- a/bsps/arm/tms570/start/tms570-pom.c
+++ b/bsps/arm/tms570/start/tms570-pom.c
@@ -86,7 +86,7 @@ uint32_t pom_global_overlay_target_address_start =
*
* @retval Void
*/
-void tms570_initialize_and_clear(void)
+void tms570_pom_initialize_and_clear(void)
{
int i;
--
2.35.3
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[PATCH 07/47] bsp/tms570: Add bsp_restart()
---
bsps/arm/tms570/include/bsp.h | 2 ++
bsps/arm/tms570/start/bsprestart.c | 42 ++
spec/build/bsps/arm/tms570/obj.yml | 1 +
3 files changed, 45 insertions(+)
create mode 100644 bsps/arm/tms570/start/bsprestart.c
diff --git a/bsps/arm/tms570/include/bsp.h b/bsps/arm/tms570/include/bsp.h
index adb0a2769a..9d26309e07 100644
--- a/bsps/arm/tms570/include/bsp.h
+++ b/bsps/arm/tms570/include/bsp.h
@@ -69,6 +69,8 @@
#define BSP_PLL_OUT_CLOCK 16000
#endif
+RTEMS_NO_RETURN void bsp_restart(const void *addr);
+
#endif /* ASM */
/* @} */
diff --git a/bsps/arm/tms570/start/bsprestart.c
b/bsps/arm/tms570/start/bsprestart.c
new file mode 100644
index 00..c989d8fc77
--- /dev/null
+++ b/bsps/arm/tms570/start/bsprestart.c
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (c) 2017 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+
+void bsp_restart( const void *addr )
+{
+ rtems_interrupt_level level;
+ void(*start)(void) = (void(*)(void))(addr);
+
+ rtems_interrupt_disable(level);
+ (void)level;
+ rtems_cache_disable_instruction();
+ rtems_cache_disable_data();
+
+ start();
+ RTEMS_UNREACHABLE();
+}
diff --git a/spec/build/bsps/arm/tms570/obj.yml
b/spec/build/bsps/arm/tms570/obj.yml
index 35a2b9ce6a..46e4eea116 100644
--- a/spec/build/bsps/arm/tms570/obj.yml
+++ b/spec/build/bsps/arm/tms570/obj.yml
@@ -80,6 +80,7 @@ source:
- bsps/arm/tms570/cpucounter/cpucounterread.c
- bsps/arm/tms570/irq/irq.c
- bsps/arm/tms570/start/bspreset.c
+- bsps/arm/tms570/start/bsprestart.c
- bsps/arm/tms570/start/bspstart.c
- bsps/arm/tms570/start/pinmux.c
- bsps/arm/tms570/start/tms570-pom.c
--
2.35.3
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[PATCH 09/47] bsp/tms570: Fix bsp_reset()
---
bsps/arm/tms570/start/bspreset.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/bsps/arm/tms570/start/bspreset.c b/bsps/arm/tms570/start/bspreset.c
index 624eeed8ff..67cf96c67c 100644
--- a/bsps/arm/tms570/start/bspreset.c
+++ b/bsps/arm/tms570/start/bspreset.c
@@ -41,6 +41,7 @@
#include
#include
+#include
static void handle_esm_errors(uint32_t esm_irq_channel)
{
@@ -56,7 +57,14 @@ static void handle_esm_errors(uint32_t esm_irq_channel)
void bsp_reset(void)
{
- uint32_t esm_irq_channel = TMS570_ESM.IOFFHR - 1;
+ rtems_interrupt_level level;
+ uint32_t esm_irq_channel;
+
+ rtems_interrupt_disable(level);
+ (void) level;
+
+ tms570_pom_initialize_and_clear();
+ esm_irq_channel = TMS570_ESM.IOFFHR - 1;
if (esm_irq_channel) {
handle_esm_errors(esm_irq_channel);
--
2.35.3
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[PATCH 06/47] bsp/tms570: Use new pin define
--- bsps/arm/tms570/start/init_pinmux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsps/arm/tms570/start/init_pinmux.c b/bsps/arm/tms570/start/init_pinmux.c index e7d4b84d97..5f6192bab7 100644 --- a/bsps/arm/tms570/start/init_pinmux.c +++ b/bsps/arm/tms570/start/init_pinmux.c @@ -199,7 +199,7 @@ per_pin_action( common_arg, \ TMS570_BALL_F2_GIOB_2 | TMS570_PIN_CLEAR_RQ_MASK ) \ per_pin_action( common_arg, \ - TMS570_MMR_SELECT_GMII_SEL | TMS570_PIN_CLEAR_RQ_MASK ) \ + TMS570_MMR_SELECT_MII_MODE | TMS570_PIN_CLEAR_RQ_MASK ) \ per_pin_action( common_arg, TMS570_MMR_SELECT_ADC_TRG1 ) \ -- 2.35.3 ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 00/47] Add TMS570LC4357 support
Sebastian Huber (33): bsps/arm: Use shared empty bsp_start_hook_0() bsp/tms570: Remove empty bsp/tms570: Remove empty bsp/tms570: Remove empty bsp/tms570: Relicense to BSD-2-Clause bsp/tms570: Use new pin define bsp/tms570: Add bsp_restart() bsp/tms570: Rename tms570_initialize_and_clear() bsp/tms570: Fix bsp_reset() bsp/tms570: Avoid errno for debug console bsp/tms570: Implement set/get interrupt priority bsp/tms570: Implement interrupt is enabled/pending bsp/tms570: Avoid spurious interrupts bsp/tms570: Add TM27 support bsp/tms570: Remove obsolete build option bsp/tms570: Avoid vector overlay memory region bsp/tms570: Add variant enable to build bsp/tms570: Add linkcmds.memory bsp/tms570: Add TMS570LC4357 BSP variants bsp/tms570: Fix PBIST clock enable bsp/tms570: Enable hardware init for some variants bsp/tms570: Simplify expression bsp/tms570: Conditionalize TMS570LS3137 errata bsp/tms570: Add errata SSWF021#45 handling bsp/tms570: Remove reset source handling bsp/tms570: Use asm code for tms570_memory_init() bsp/tms570: Initialize SRAM on demand bsp/tms570: The TMS570LC4357 has no TCRAM modules bsp/tms570: Add header guards bsp/tms570: Use shared bsp_start_hook_1() bsp/tms570: Use bsp_start_copy_sections_compact() bsp/tms570: Initialize and enable caches on demand bsp/tms570: Optimize tms570_debug_console_out() Tyler Miller (14): bsp/tms570: Add TMS570LC4357 PBIST support bsp/tms570: Add tms570_pbist_run_and_check() bsp/tms570: Remove double pin configuration bsp/tms570: Add TMS570LC4357 pin config support bsp/tms570: Add TMS570LC4357 power support bsp/tms570: TMS570LC4x Errata DEVICE#60 bsp/tms570: Add HCLKCNTL register bsp/tms570: Honor DBGRST for TMS570LC4357 bsp/tms570: Initialize MPU bsp/tms570: Board-specific tms570_pll_init() bsp/tms570: Board-specific tms570_map_clock_init() bsp/tms570: Board-specific tms570_pinmux_init() bsp/tms570: Board-specific tms570_emif_sdram_init() bsp/tms570: Update README bsps/arm/beagle/start/bspstarthooks.c | 4 - bsps/arm/lm3s69xx/start/bspstarthook.c| 5 - bsps/arm/shared/start/bspstarthook0-empty.c | 42 ++ bsps/arm/stm32f4/start/bspstarthook.c | 5 - bsps/arm/tms570/README| 137 +++--- bsps/arm/tms570/clock/clock.c | 32 +- ...ms570ls3137_hdk_with_loader-testsuite.tcfg | 9 - bsps/arm/tms570/console/printk-support.c | 75 +-- bsps/arm/tms570/console/tms570-sci.c | 34 +- bsps/arm/tms570/cpucounter/cpucounterread.c | 38 +- bsps/arm/tms570/include/bsp.h | 31 +- bsps/arm/tms570/include/bsp/irq.h | 91 +++- bsps/arm/tms570/include/bsp/system-clocks.h | 32 +- .../include/bsp/ti_herc/errata_SSWF021_45.h | 56 +++ bsps/arm/tms570/include/bsp/ti_herc/reg_adc.h | 10 + .../tms570/include/bsp/ti_herc/reg_ccmsr.h| 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_crc.h | 10 + .../arm/tms570/include/bsp/ti_herc/reg_dcan.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_dcc.h | 16 + bsps/arm/tms570/include/bsp/ti_herc/reg_dma.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_dmm.h | 10 + .../tms570/include/bsp/ti_herc/reg_efuse.h| 10 + .../tms570/include/bsp/ti_herc/reg_emacc.h| 10 + .../tms570/include/bsp/ti_herc/reg_emacm.h| 10 + .../arm/tms570/include/bsp/ti_herc/reg_emif.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_esm.h | 10 + .../tms570/include/bsp/ti_herc/reg_flash.h| 10 + .../tms570/include/bsp/ti_herc/reg_flex_ray.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_gio.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_htu.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_i2c.h | 10 + .../arm/tms570/include/bsp/ti_herc/reg_iomm.h | 54 +-- bsps/arm/tms570/include/bsp/ti_herc/reg_lin.h | 10 + .../arm/tms570/include/bsp/ti_herc/reg_mdio.h | 10 + .../tms570/include/bsp/ti_herc/reg_n2het.h| 10 + .../tms570/include/bsp/ti_herc/reg_pbist.h| 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pcr.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pll.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pmm.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_pom.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_rti.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_rtp.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_sci.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_spi.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_stc.h | 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_sys.h | 20 + .../arm/tms570/include/bsp/ti_herc/reg_sys2.h | 16 +- bsps/arm/tms570/include/bsp/ti_herc/reg_tcr.h | 10 + .../tms570/include/bsp/ti_herc/reg_tcram.h| 10 + bsps/arm/tms570/include/bsp/ti_herc/reg_vim.h | 10 + bsps/arm/tms570/include/bsp/tms570-pinmux.h | 30 +- bsps/arm/tms570/include/bsp/tms570-pins.h | 42 +- bsps/arm/tms570/include/bsp/tms570-pom.h | 34 +-
[PATCH 01/47] bsps/arm: Use shared empty bsp_start_hook_0()
---
bsps/arm/beagle/start/bspstarthooks.c | 4 --
bsps/arm/lm3s69xx/start/bspstarthook.c| 5 ---
bsps/arm/shared/start/bspstarthook0-empty.c | 42 +++
bsps/arm/stm32f4/start/bspstarthook.c | 5 ---
bsps/arm/tms570/start/bspstarthooks.c | 5 ---
bsps/arm/xen/start/bspstarthooks.c| 5 ---
bsps/arm/xilinx-zynqmp/start/bspstarthooks.c | 5 ---
spec/build/bsps/arm/beagle/obj.yml| 1 +
spec/build/bsps/arm/lm3s69xx/obj.yml | 1 +
spec/build/bsps/arm/stm32f4/obj.yml | 1 +
spec/build/bsps/arm/tms570/objnohwinit.yml| 1 +
spec/build/bsps/arm/xen/bspxen.yml| 1 +
.../arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 1 +
13 files changed, 48 insertions(+), 29 deletions(-)
create mode 100644 bsps/arm/shared/start/bspstarthook0-empty.c
diff --git a/bsps/arm/beagle/start/bspstarthooks.c
b/bsps/arm/beagle/start/bspstarthooks.c
index e3c380cfb1..69d5256f52 100644
--- a/bsps/arm/beagle/start/bspstarthooks.c
+++ b/bsps/arm/beagle/start/bspstarthooks.c
@@ -29,10 +29,6 @@
#include
#include
-BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
-{
-}
-
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
bsp_start_copy_sections();
diff --git a/bsps/arm/lm3s69xx/start/bspstarthook.c
b/bsps/arm/lm3s69xx/start/bspstarthook.c
index af6a4c4e1e..14cd554117 100644
--- a/bsps/arm/lm3s69xx/start/bspstarthook.c
+++ b/bsps/arm/lm3s69xx/start/bspstarthook.c
@@ -9,11 +9,6 @@
#include
#include
-void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
-{
- /* Do nothing */
-}
-
void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
{
bsp_start_copy_sections();
diff --git a/bsps/arm/shared/start/bspstarthook0-empty.c
b/bsps/arm/shared/start/bspstarthook0-empty.c
new file mode 100644
index 00..65e2efcf03
--- /dev/null
+++ b/bsps/arm/shared/start/bspstarthook0-empty.c
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMShared
+ *
+ * @brief This source file contains a bsp_start_hook_0() implentation which
+ * does nothing.
+ */
+
+/*
+ * Copyright (C) 2023 embedded brains GmbH & Co. KG
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+
+void BSP_START_TEXT_SECTION bsp_start_hook_0( void )
+{
+ /* Do nothing */
+}
diff --git a/bsps/arm/stm32f4/start/bspstarthook.c
b/bsps/arm/stm32f4/start/bspstarthook.c
index bbfaed615e..21a9189f26 100644
--- a/bsps/arm/stm32f4/start/bspstarthook.c
+++ b/bsps/arm/stm32f4/start/bspstarthook.c
@@ -9,11 +9,6 @@
#include
#include
-void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
-{
- /* Do nothing */
-}
-
void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
{
bsp_start_copy_sections();
diff --git a/bsps/arm/tms570/start/bspstarthooks.c
b/bsps/arm/tms570/start/bspstarthooks.c
index f6bf19c754..e7722ab698 100644
--- a/bsps/arm/tms570/start/bspstarthooks.c
+++ b/bsps/arm/tms570/start/bspstarthooks.c
@@ -27,11 +27,6 @@
#include
#include
-BSP_START_TEXT_SECTION void bsp_start_hook_0( void )
-{
- ;
-}
-
BSP_START_TEXT_SECTION void bsp_start_hook_1( void )
{
bsp_start_copy_sections();
diff --git a/bsps/arm/xen/start/bspstarthooks.c
b/bsps/arm/xen/start/bspstarthooks.c
index a9e1fbbfb1..6f0e4c3d0c 100644
--- a/bsps/arm/xen/start/bspstarthooks.c
+++ b/bsps/arm/xen/start/bspstarthooks.c
@@ -29,11 +29,6 @@
#include
#include
-BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
-{
- /* Do nothing */
-}
-
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
bsp_start_copy_sections();
diff --git a/bsps/arm/xilinx-zynqmp/start/bspstarthooks.c
b/bsps/arm/xilinx-zynqmp/start/bspstarthooks.c
index dc414ffb3a..fba23515f7 100644
---
[PATCH 03/47] bsp/tms570: Remove empty
---
bsps/arm/tms570/console/printk-support.c | 1 -
bsps/arm/tms570/console/tms570-sci.c | 1 -
.../tms570/include/bsp/tms570-sci-driver.h| 2 +-
bsps/arm/tms570/include/bsp/tms570-sci.h | 45 ---
bsps/powerpc/t32mppc/make.cmm | 19
bsps/powerpc/t32mppc/win.cmm | 36 +++
spec/build/bsps/arm/tms570/obj.yml| 1 -
7 files changed, 56 insertions(+), 49 deletions(-)
delete mode 100644 bsps/arm/tms570/include/bsp/tms570-sci.h
create mode 100644 bsps/powerpc/t32mppc/make.cmm
create mode 100644 bsps/powerpc/t32mppc/win.cmm
diff --git a/bsps/arm/tms570/console/printk-support.c
b/bsps/arm/tms570/console/printk-support.c
index 8269e959ac..bd6b7e1c89 100644
--- a/bsps/arm/tms570/console/printk-support.c
+++ b/bsps/arm/tms570/console/printk-support.c
@@ -27,7 +27,6 @@
#include
#include
#include
-#include
#include
#define TMS570_CONSOLE (_context_table[0])
diff --git a/bsps/arm/tms570/console/tms570-sci.c
b/bsps/arm/tms570/console/tms570-sci.c
index 768770a4c8..099218472a 100644
--- a/bsps/arm/tms570/console/tms570-sci.c
+++ b/bsps/arm/tms570/console/tms570-sci.c
@@ -26,7 +26,6 @@
#include
#include
#include
-#include
#include
#include
#include
diff --git a/bsps/arm/tms570/include/bsp/tms570-sci-driver.h
b/bsps/arm/tms570/include/bsp/tms570-sci-driver.h
index 5ebb29381d..1e935670ec 100644
--- a/bsps/arm/tms570/include/bsp/tms570-sci-driver.h
+++ b/bsps/arm/tms570/include/bsp/tms570-sci-driver.h
@@ -28,7 +28,7 @@
#include
#include
-#include
+#include
#ifdef __cplusplus
extern "C" {
diff --git a/bsps/arm/tms570/include/bsp/tms570-sci.h
b/bsps/arm/tms570/include/bsp/tms570-sci.h
deleted file mode 100644
index 1ac482a79f..00
--- a/bsps/arm/tms570/include/bsp/tms570-sci.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/**
- * @file
- *
- * @ingroup RTEMSBSPsARMTMS570
- *
- * @brief Serial Communication Interface (SCI) header file.
- */
-
-/*
- * Copyright (c) 2014 Premysl Houdek
- *
- * Google Summer of Code 2014 at
- * Czech Technical University in Prague
- * Zikova 1903/4
- * 166 36 Praha 6
- * Czech Republic
- *
- * Based on LPC24xx and LPC1768 BSP
- * by embedded brains GmbH & Co. KG and others
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_TMS570_SCI_H
-#define LIBBSP_ARM_TMS570_SCI_H
-
-#include
-
-#include
-#include
-#include
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif
diff --git a/bsps/powerpc/t32mppc/make.cmm b/bsps/powerpc/t32mppc/make.cmm
new file mode 100644
index 00..a8e9e1e605
--- /dev/null
+++ b/bsps/powerpc/t32mppc/make.cmm
@@ -0,0 +1,19 @@
+; Set CPU
+system.cpu mpc8540
+system.up
+
+; Set PVR
+per.s spr:0x11f %long %be 0x8020
+
+; Load application
+Data.LOAD.Elf
/home/EB/sebastian_h/src/rtems/build/powerpc/t32mppc/testsuites/validation/ts-validation-intr.exe
+
+; Configure memory-based terminal
+term.reset
+term.method buffere v.address("messagebufferout") v.address("messagebufferin")
+term.gate
+
+; Initialize RTOS support
+task.config ~~/demo/powerpc/kernel/rtems/rtems.t32
+menu.reprogram ~~/demo/powerpc/kernel/rtems/rtems.men
+task.stack.pattern 0xa5
diff --git a/bsps/powerpc/t32mppc/win.cmm b/bsps/powerpc/t32mppc/win.cmm
new file mode 100644
index 00..b65d22ab67
--- /dev/null
+++ b/bsps/powerpc/t32mppc/win.cmm
@@ -0,0 +1,36 @@
+// T32 Thu Oct 12 15:59:29 2023
+
+B::
+
+TOOLBAR ON
+STATUSBAR ON
+FramePOS 0.0,72.0,,,Maximized
+WinPAGE.RESet
+
+WinPAGE.Create P000
+WinCLEAR
+
+WinPOS 0.0 0.0 77. 21. 0. 0. W001
+wl.Register
+
+WinPOS 0.0 24.533 133. 47. 14. 1. W002
+WinTABS 10. 10. 25.
+wl.List
+
+WinPOS 275.57 23.0 80. 24. 0. 0. W000
+wl.term.gate
+
+WinPOS 136.57 0.0 105. 25. 5. 0. W003
+wl.Frame
+
+WinPOS 136.43 30.4 106. 13. 24. 1. W004
+WinTABS 13. 0. 0. 0. 0. 0. 0. 0. 0. 54.
+wl.Break.List
+
+WinPOS 136.57 50.0 106. 23. 0. 1. W005
+WinTABS 41. 31.
+wl.sYmbol.Browse.sYmbol
+
+WinPAGE.select P000
+
+ENDDO
diff --git a/spec/build/bsps/arm/tms570/obj.yml
b/spec/build/bsps/arm/tms570/obj.yml
index d51612faf6..ec13a1b817 100644
--- a/spec/build/bsps/arm/tms570/obj.yml
+++ b/spec/build/bsps/arm/tms570/obj.yml
@@ -19,7 +19,6 @@ install:
- bsps/arm/tms570/include/bsp/tms570-pins.h
- bsps/arm/tms570/include/bsp/tms570-pom.h
- bsps/arm/tms570/include/bsp/tms570-sci-driver.h
- - bsps/arm/tms570/include/bsp/tms570-sci.h
- bsps/arm/tms570/include/bsp/tms570-vim.h
- bsps/arm/tms570/include/bsp/tms570.h
- bsps/arm/tms570/include/bsp/tms570_hwinit.h
--
2.35.3
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[PATCH 02/47] bsp/tms570: Remove empty
---
bsps/arm/tms570/clock/clock.c | 2 +-
bsps/arm/tms570/include/bsp/system-clocks.h | 2 +-
bsps/arm/tms570/include/bsp/tms570-rti.h| 46 -
spec/build/bsps/arm/tms570/obj.yml | 1 -
4 files changed, 2 insertions(+), 49 deletions(-)
delete mode 100644 bsps/arm/tms570/include/bsp/tms570-rti.h
diff --git a/bsps/arm/tms570/clock/clock.c b/bsps/arm/tms570/clock/clock.c
index aad56e2bd0..64daa213ac 100644
--- a/bsps/arm/tms570/clock/clock.c
+++ b/bsps/arm/tms570/clock/clock.c
@@ -28,7 +28,7 @@
#include
#include
#include
-#include
+#include
#include
static struct timecounter tms570_rti_tc;
diff --git a/bsps/arm/tms570/include/bsp/system-clocks.h
b/bsps/arm/tms570/include/bsp/system-clocks.h
index afd72482ee..e251ef7ea8 100644
--- a/bsps/arm/tms570/include/bsp/system-clocks.h
+++ b/bsps/arm/tms570/include/bsp/system-clocks.h
@@ -25,7 +25,7 @@
#ifndef LIBBSP_ARM_TMS570_SYSTEM_CLOCKS_H
#define LIBBSP_ARM_TMS570_SYSTEM_CLOCKS_H
-#include
+#include
#ifdef __cplusplus
extern "C" {
diff --git a/bsps/arm/tms570/include/bsp/tms570-rti.h
b/bsps/arm/tms570/include/bsp/tms570-rti.h
deleted file mode 100644
index c19fafa9e1..00
--- a/bsps/arm/tms570/include/bsp/tms570-rti.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/**
- * @file
- *
- * @ingroup RTEMSBSPsARMTMS570
- *
- * @brief Real Time Interrupt module (RTI) header file.
- */
-
-/*
- * Copyright (c) 2014 Premysl Houdek
- *
- * Google Summer of Code 2014 at
- * Czech Technical University in Prague
- * Zikova 1903/4
- * 166 36 Praha 6
- * Czech Republic
- *
- * Based on LPC24xx and LPC1768 BSP
- * by embedded brains GmbH & Co. KG and others
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_TMS570_RTI_H
-#define LIBBSP_ARM_TMS570_RTI_H
-
-#ifndef ASM
-
-#include
-#include
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* ASM */
-
-#endif /* LIBBSP_ARM_TMS570_IRQ_H */
diff --git a/spec/build/bsps/arm/tms570/obj.yml
b/spec/build/bsps/arm/tms570/obj.yml
index 95ecb37963..d51612faf6 100644
--- a/spec/build/bsps/arm/tms570/obj.yml
+++ b/spec/build/bsps/arm/tms570/obj.yml
@@ -18,7 +18,6 @@ install:
- bsps/arm/tms570/include/bsp/tms570-pinmux.h
- bsps/arm/tms570/include/bsp/tms570-pins.h
- bsps/arm/tms570/include/bsp/tms570-pom.h
- - bsps/arm/tms570/include/bsp/tms570-rti.h
- bsps/arm/tms570/include/bsp/tms570-sci-driver.h
- bsps/arm/tms570/include/bsp/tms570-sci.h
- bsps/arm/tms570/include/bsp/tms570-vim.h
--
2.35.3
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[PATCH 04/47] bsp/tms570: Remove empty
---
bsps/arm/tms570/include/bsp/tms570-vim.h | 48
bsps/arm/tms570/irq/irq.c| 2 +-
spec/build/bsps/arm/tms570/obj.yml | 1 -
3 files changed, 1 insertion(+), 50 deletions(-)
delete mode 100644 bsps/arm/tms570/include/bsp/tms570-vim.h
diff --git a/bsps/arm/tms570/include/bsp/tms570-vim.h
b/bsps/arm/tms570/include/bsp/tms570-vim.h
deleted file mode 100644
index 9f8b68f0a5..00
--- a/bsps/arm/tms570/include/bsp/tms570-vim.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/**
- * @file
- *
- * @ingroup RTEMSBSPsARMTMS570
- *
- * @brief Vectored Interrupt Module (VIM) header file.
- */
-
-/*
- * Copyright (c) 2014 Premysl Houdek
- *
- * Google Summer of Code 2014 at
- * Czech Technical University in Prague
- * Zikova 1903/4
- * 166 36 Praha 6
- * Czech Republic
- *
- * Based on LPC24xx and LPC1768 BSP
- * by embedded brains GmbH & Co. KG and others
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
- */
-
-#ifndef LIBBSP_ARM_TMS570_VIM_H
-#define LIBBSP_ARM_TMS570_VIM_H
-
-#ifndef ASM
-#include
-#include
-#include
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-
-
-#endif
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* LIBBSP_ARM_TMS570_IRQ_H */
diff --git a/bsps/arm/tms570/irq/irq.c b/bsps/arm/tms570/irq/irq.c
index 437c1ab27c..dee5a40a27 100644
--- a/bsps/arm/tms570/irq/irq.c
+++ b/bsps/arm/tms570/irq/irq.c
@@ -24,7 +24,7 @@
#include
#include
-#include
+#include
#include
#include
diff --git a/spec/build/bsps/arm/tms570/obj.yml
b/spec/build/bsps/arm/tms570/obj.yml
index ec13a1b817..35a2b9ce6a 100644
--- a/spec/build/bsps/arm/tms570/obj.yml
+++ b/spec/build/bsps/arm/tms570/obj.yml
@@ -19,7 +19,6 @@ install:
- bsps/arm/tms570/include/bsp/tms570-pins.h
- bsps/arm/tms570/include/bsp/tms570-pom.h
- bsps/arm/tms570/include/bsp/tms570-sci-driver.h
- - bsps/arm/tms570/include/bsp/tms570-vim.h
- bsps/arm/tms570/include/bsp/tms570.h
- bsps/arm/tms570/include/bsp/tms570_hwinit.h
- bsps/arm/tms570/include/bsp/tms570_selftest.h
--
2.35.3
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