Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-24 Thread Sebastian Huber 

On 19/07/17 22:35, Jiri Gaisler wrote:


The instruction that takes the trap is at 0x40004040, which is ld  [ %sp
+ 0x4c ], %f8. Remember that SPARC has deferred FPU trap model so it is
actually the previous FPU instruction FSMULD at 0x4000403c that
generated the trap. This instruction is not implemented in sis, and I am
not sure it is even implemented in some leon2/leon3 hardware. I will
check and report back ...

Jiri.


I use -mcpu=leon -mfix-at697f and according to the manual we have:

The AT697F floating-point unit is based on the MEIKO core and implements the 
SPARC floating-point instruction-set defined in the SPARC Architecture Manual 
version 8.

I am certain that AT697E did not implement FSMULD, whether AT697F does
it I do not know but I doubt it. On the other hand, most (all?) leon3
with an FPU does support FSMULD. Maybe somebody with an AT697F board
could run the MATHF test and report if it runs or traps. I will add
fsmuld support to sis, but we should really try to find out if it is
appropriate for leon2.


We did some tests on a real AT697F and it apparently supported the 
FSMULD instruction in hardware.


--
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Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-19 Thread Sebastian Huber 
Just for reference, the fsmuld instruction appears in the following 
multilibs:


/opt/rtems-4.12/sparc-rtems4.12/lib/leon3/gr712rc/libm.a
  18:   81 a2 0d 29 fsmuld  %f8, %f9, %f0
/opt/rtems-4.12/sparc-rtems4.12/lib/leon3/libm.a
  18:   81 a2 0d 29 fsmuld  %f8, %f9, %f0
/opt/rtems-4.12/sparc-rtems4.12/lib/leon/at697f/libm.a
  18:   81 a2 0d 29 fsmuld  %f8, %f9, %f0
/opt/rtems-4.12/sparc-rtems4.12/lib/leon/libm.a
  18:   81 a2 0d 29 fsmuld  %f8, %f9, %f0
/opt/rtems-4.12/sparc-rtems4.12/lib/v8/libm.a
  18:   81 a2 0d 29 fsmuld  %f8, %f9, %f0

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Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-19 Thread Sebastian Huber 

On 19/07/17 22:35, Jiri Gaisler wrote:



On 07/19/2017 07:36 PM, Sebastian Huber wrote:

- Jiri Gaisler  schrieb:

On 07/19/2017 04:04 PM, Sebastian Huber wrote:

Hello Jiri,

I fixed a couple of tests. One remaining failure on the leon2 is mathf:

*** BEGIN OF TEST MATHF ***
acosf  : 1.570796
acoshf : -nan
asinf  : 1.570796
asinhf : 0.881374
atanf  : 0.665774
atan2f : 0.785398
atanhf : inf
cbrtf  : 3.00
ceilf  : 4.00
copysignf  : -3.50
cosf   : -0.00
coshf  : 2.509179
erff   : 1.00
erfcf  : 0.00
expf   : 1.521962
exp2f  : 1.337928
expm1f : 0.000420
fabsf  : 1.123000
fdimf  : 0.00
floorf : 0.00
floorf : -1.00

Breakpoint 1, 0x40004044 in fmaf (x=x@entry=2.099, y=2.2005,
z=3.0099) at
/home/EB/sebastian_h/archive/gcc-git/newlib/libm/common/sf_fma.c:25
25return (float) (((double) x * (double) y) + (double) z);
(gdb) disas 0x40004044
Dump of assembler code for function fmaf:
0x40004024 <+0>: add  %sp, -80, %sp
0x40004028 <+4>: st  %o1, [ %sp + 0x4c ]
0x4000402c <+8>: ld  [ %sp + 0x4c ], %f8
0x40004030 <+12>:st  %o0, [ %sp + 0x4c ]
0x40004034 <+16>:ld  [ %sp + 0x4c ], %f9
0x40004038 <+20>:st  %o2, [ %sp + 0x4c ]
0x4000403c <+24>:fsmuld  %f8, %f9, %f0
0x40004040 <+28>:ld  [ %sp + 0x4c ], %f8
=> 0x40004044 <+32>:fstod  %f8, %f8
0x40004048 <+36>:add  %sp, 0x50, %sp
0x4000404c <+40>:faddd  %f0, %f8, %f0
0x40004050 <+44>:retl
0x40004054 <+48>:fdtos  %f0, %f0
End of assembler dump.
(gdb) p/x $fsr
$1 = 0xe660

Is fstod implemented on the SIS?

fstod is implemented.
  
The instruction that takes the trap is at 0x40004040, which is ld  [ %sp

+ 0x4c ], %f8. Remember that SPARC has deferred FPU trap model so it is
actually the previous FPU instruction FSMULD at 0x4000403c that
generated the trap. This instruction is not implemented in sis, and I am
not sure it is even implemented in some leon2/leon3 hardware. I will
check and report back ...

Jiri.


I use -mcpu=leon -mfix-at697f and according to the manual we have:

The AT697F floating-point unit is based on the MEIKO core and implements the 
SPARC floating-point instruction-set defined in the SPARC Architecture Manual 
version 8.

I am certain that AT697E did not implement FSMULD, whether AT697F does
it I do not know but I doubt it. On the other hand, most (all?) leon3
with an FPU does support FSMULD. Maybe somebody with an AT697F board
could run the MATHF test and report if it runs or traps. I will add
fsmuld support to sis, but we should really try to find out if it is
appropriate for leon2.

Jiri.


Yes, we probably have to test this on real hardware, since according to 
the SPARC v8 manual we have:


"Appendix G — SPARC ABI Software Considerations

FsMULd instruction

The floating-point
multiply single-to-double instruction (FsMULd) is new in Version 8 of 
the SPARC

architecture.  Some SPARC systems in the field emulate this instruction in
software.

Recommended use of FsMULd instruction in SPARC ABI programs:

* If FsMULd is used infrequently (on a dynamic basis):
  Use the FsMULd instruction in-line.
* If FsMULd is used heavily (on a dynamic basis), and reasonable perfor-
  mance across all systems is preferred over optimal performance on the 
fastest
  systems: Convert the operands to double precision in scratch 
registers, then

  calculate the result with the FMULd instruction.  For example,
fsmuld  %f20,%f21,%f8
  might be replaced by:
fstod   %f20,%f0
fstod   %f23,%f2
fmuld   %f0,%f2,%f8
  This provides reasonable performance on machines with hardware 
support for
  FsMULd, while not penalizing those without it with the overhead of 
trap- ping

  and emulating the instructions in supervisor software.

* If FsMULd is used heavily (on a dynamic basis), and optimal performance
  on systems which implement FsMULd in hardware is desired at the cost of
  performance degradation on most systems: Use the FsMULd instruction 
in-line."


--
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Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-19 Thread Jiri Gaisler 


On 07/19/2017 07:36 PM, Sebastian Huber wrote:
> - Jiri Gaisler  schrieb:
>>
>> On 07/19/2017 04:04 PM, Sebastian Huber wrote:
>>> Hello Jiri,
>>>
>>> I fixed a couple of tests. One remaining failure on the leon2 is mathf:
>>>
>>> *** BEGIN OF TEST MATHF ***
>>> acosf  : 1.570796
>>> acoshf : -nan
>>> asinf  : 1.570796
>>> asinhf : 0.881374
>>> atanf  : 0.665774
>>> atan2f : 0.785398
>>> atanhf : inf
>>> cbrtf  : 3.00
>>> ceilf  : 4.00
>>> copysignf  : -3.50
>>> cosf   : -0.00
>>> coshf  : 2.509179
>>> erff   : 1.00
>>> erfcf  : 0.00
>>> expf   : 1.521962
>>> exp2f  : 1.337928
>>> expm1f : 0.000420
>>> fabsf  : 1.123000
>>> fdimf  : 0.00
>>> floorf : 0.00
>>> floorf : -1.00
>>>
>>> Breakpoint 1, 0x40004044 in fmaf (x=x@entry=2.099, y=2.2005,
>>> z=3.0099) at
>>> /home/EB/sebastian_h/archive/gcc-git/newlib/libm/common/sf_fma.c:25
>>> 25return (float) (((double) x * (double) y) + (double) z);
>>> (gdb) disas 0x40004044
>>> Dump of assembler code for function fmaf:
>>>0x40004024 <+0>: add  %sp, -80, %sp
>>>0x40004028 <+4>: st  %o1, [ %sp + 0x4c ]
>>>0x4000402c <+8>: ld  [ %sp + 0x4c ], %f8
>>>0x40004030 <+12>:st  %o0, [ %sp + 0x4c ]
>>>0x40004034 <+16>:ld  [ %sp + 0x4c ], %f9
>>>0x40004038 <+20>:st  %o2, [ %sp + 0x4c ]
>>>0x4000403c <+24>:fsmuld  %f8, %f9, %f0
>>>0x40004040 <+28>:ld  [ %sp + 0x4c ], %f8
>>> => 0x40004044 <+32>:fstod  %f8, %f8
>>>0x40004048 <+36>:add  %sp, 0x50, %sp
>>>0x4000404c <+40>:faddd  %f0, %f8, %f0
>>>0x40004050 <+44>:retl
>>>0x40004054 <+48>:fdtos  %f0, %f0
>>> End of assembler dump.
>>> (gdb) p/x $fsr
>>> $1 = 0xe660
>>>
>>> Is fstod implemented on the SIS?
>> fstod is implemented.
>>  
>> The instruction that takes the trap is at 0x40004040, which is ld  [ %sp
>> + 0x4c ], %f8. Remember that SPARC has deferred FPU trap model so it is
>> actually the previous FPU instruction FSMULD at 0x4000403c that
>> generated the trap. This instruction is not implemented in sis, and I am
>> not sure it is even implemented in some leon2/leon3 hardware. I will
>> check and report back ...
>>
>> Jiri.
>>
> I use -mcpu=leon -mfix-at697f and according to the manual we have:
>
> The AT697F floating-point unit is based on the MEIKO core and implements the 
> SPARC floating-point instruction-set defined in the SPARC Architecture Manual 
> version 8.

I am certain that AT697E did not implement FSMULD, whether AT697F does
it I do not know but I doubt it. On the other hand, most (all?) leon3
with an FPU does support FSMULD. Maybe somebody with an AT697F board
could run the MATHF test and report if it runs or traps. I will add
fsmuld support to sis, but we should really try to find out if it is
appropriate for leon2.

Jiri.

>


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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-19 Thread Sebastian Huber 

- Jiri Gaisler  schrieb:
> 
> 
> On 07/19/2017 04:04 PM, Sebastian Huber wrote:
> > Hello Jiri,
> >
> > I fixed a couple of tests. One remaining failure on the leon2 is mathf:
> >
> > *** BEGIN OF TEST MATHF ***
> > acosf  : 1.570796
> > acoshf : -nan
> > asinf  : 1.570796
> > asinhf : 0.881374
> > atanf  : 0.665774
> > atan2f : 0.785398
> > atanhf : inf
> > cbrtf  : 3.00
> > ceilf  : 4.00
> > copysignf  : -3.50
> > cosf   : -0.00
> > coshf  : 2.509179
> > erff   : 1.00
> > erfcf  : 0.00
> > expf   : 1.521962
> > exp2f  : 1.337928
> > expm1f : 0.000420
> > fabsf  : 1.123000
> > fdimf  : 0.00
> > floorf : 0.00
> > floorf : -1.00
> >
> > Breakpoint 1, 0x40004044 in fmaf (x=x@entry=2.099, y=2.2005,
> > z=3.0099) at
> > /home/EB/sebastian_h/archive/gcc-git/newlib/libm/common/sf_fma.c:25
> > 25return (float) (((double) x * (double) y) + (double) z);
> > (gdb) disas 0x40004044
> > Dump of assembler code for function fmaf:
> >0x40004024 <+0>: add  %sp, -80, %sp
> >0x40004028 <+4>: st  %o1, [ %sp + 0x4c ]
> >0x4000402c <+8>: ld  [ %sp + 0x4c ], %f8
> >0x40004030 <+12>:st  %o0, [ %sp + 0x4c ]
> >0x40004034 <+16>:ld  [ %sp + 0x4c ], %f9
> >0x40004038 <+20>:st  %o2, [ %sp + 0x4c ]
> >0x4000403c <+24>:fsmuld  %f8, %f9, %f0
> >0x40004040 <+28>:ld  [ %sp + 0x4c ], %f8
> > => 0x40004044 <+32>:fstod  %f8, %f8
> >0x40004048 <+36>:add  %sp, 0x50, %sp
> >0x4000404c <+40>:faddd  %f0, %f8, %f0
> >0x40004050 <+44>:retl
> >0x40004054 <+48>:fdtos  %f0, %f0
> > End of assembler dump.
> > (gdb) p/x $fsr
> > $1 = 0xe660
> >
> > Is fstod implemented on the SIS?
> fstod is implemented.
>  
> The instruction that takes the trap is at 0x40004040, which is ld  [ %sp
> + 0x4c ], %f8. Remember that SPARC has deferred FPU trap model so it is
> actually the previous FPU instruction FSMULD at 0x4000403c that
> generated the trap. This instruction is not implemented in sis, and I am
> not sure it is even implemented in some leon2/leon3 hardware. I will
> check and report back ...
> 
> Jiri.
> 

I use -mcpu=leon -mfix-at697f and according to the manual we have:

The AT697F floating-point unit is based on the MEIKO core and implements the 
SPARC floating-point instruction-set defined in the SPARC Architecture Manual 
version 8.

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.huber at embedded-brains.de
PGP : Public key available on request.

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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-19 Thread Jiri Gaisler 


On 07/19/2017 04:04 PM, Sebastian Huber wrote:
> Hello Jiri,
>
> I fixed a couple of tests. One remaining failure on the leon2 is mathf:
>
> *** BEGIN OF TEST MATHF ***
> acosf  : 1.570796
> acoshf : -nan
> asinf  : 1.570796
> asinhf : 0.881374
> atanf  : 0.665774
> atan2f : 0.785398
> atanhf : inf
> cbrtf  : 3.00
> ceilf  : 4.00
> copysignf  : -3.50
> cosf   : -0.00
> coshf  : 2.509179
> erff   : 1.00
> erfcf  : 0.00
> expf   : 1.521962
> exp2f  : 1.337928
> expm1f : 0.000420
> fabsf  : 1.123000
> fdimf  : 0.00
> floorf : 0.00
> floorf : -1.00
>
> Breakpoint 1, 0x40004044 in fmaf (x=x@entry=2.099, y=2.2005,
> z=3.0099) at
> /home/EB/sebastian_h/archive/gcc-git/newlib/libm/common/sf_fma.c:25
> 25return (float) (((double) x * (double) y) + (double) z);
> (gdb) disas 0x40004044
> Dump of assembler code for function fmaf:
>0x40004024 <+0>: add  %sp, -80, %sp
>0x40004028 <+4>: st  %o1, [ %sp + 0x4c ]
>0x4000402c <+8>: ld  [ %sp + 0x4c ], %f8
>0x40004030 <+12>:st  %o0, [ %sp + 0x4c ]
>0x40004034 <+16>:ld  [ %sp + 0x4c ], %f9
>0x40004038 <+20>:st  %o2, [ %sp + 0x4c ]
>0x4000403c <+24>:fsmuld  %f8, %f9, %f0
>0x40004040 <+28>:ld  [ %sp + 0x4c ], %f8
> => 0x40004044 <+32>:fstod  %f8, %f8
>0x40004048 <+36>:add  %sp, 0x50, %sp
>0x4000404c <+40>:faddd  %f0, %f8, %f0
>0x40004050 <+44>:retl
>0x40004054 <+48>:fdtos  %f0, %f0
> End of assembler dump.
> (gdb) p/x $fsr
> $1 = 0xe660
>
> Is fstod implemented on the SIS?
fstod is implemented.
 
The instruction that takes the trap is at 0x40004040, which is ld  [ %sp
+ 0x4c ], %f8. Remember that SPARC has deferred FPU trap model so it is
actually the previous FPU instruction FSMULD at 0x4000403c that
generated the trap. This instruction is not implemented in sis, and I am
not sure it is even implemented in some leon2/leon3 hardware. I will
check and report back ...

Jiri.


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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-19 Thread Sebastian Huber 

Hello Jiri,

I fixed a couple of tests. One remaining failure on the leon2 is mathf:

*** BEGIN OF TEST MATHF ***
acosf  : 1.570796
acoshf : -nan
asinf  : 1.570796
asinhf : 0.881374
atanf  : 0.665774
atan2f : 0.785398
atanhf : inf
cbrtf  : 3.00
ceilf  : 4.00
copysignf  : -3.50
cosf   : -0.00
coshf  : 2.509179
erff   : 1.00
erfcf  : 0.00
expf   : 1.521962
exp2f  : 1.337928
expm1f : 0.000420
fabsf  : 1.123000
fdimf  : 0.00
floorf : 0.00
floorf : -1.00

Breakpoint 1, 0x40004044 in fmaf (x=x@entry=2.099, y=2.2005, 
z=3.0099) at 
/home/EB/sebastian_h/archive/gcc-git/newlib/libm/common/sf_fma.c:25

25return (float) (((double) x * (double) y) + (double) z);
(gdb) disas 0x40004044
Dump of assembler code for function fmaf:
   0x40004024 <+0>: add  %sp, -80, %sp
   0x40004028 <+4>: st  %o1, [ %sp + 0x4c ]
   0x4000402c <+8>: ld  [ %sp + 0x4c ], %f8
   0x40004030 <+12>:st  %o0, [ %sp + 0x4c ]
   0x40004034 <+16>:ld  [ %sp + 0x4c ], %f9
   0x40004038 <+20>:st  %o2, [ %sp + 0x4c ]
   0x4000403c <+24>:fsmuld  %f8, %f9, %f0
   0x40004040 <+28>:ld  [ %sp + 0x4c ], %f8
=> 0x40004044 <+32>:fstod  %f8, %f8
   0x40004048 <+36>:add  %sp, 0x50, %sp
   0x4000404c <+40>:faddd  %f0, %f8, %f0
   0x40004050 <+44>:retl
   0x40004054 <+48>:fdtos  %f0, %f0
End of assembler dump.
(gdb) p/x $fsr
$1 = 0xe660

Is fstod implemented on the SIS?

--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-18 Thread Sebastian Huber 

The following tests fail now on the GR712RC due to FP disable exceptions:

BLOCK 6
BLOCK 14
CONSTRUCTOR/DESTRUCTOR
CRYPT 1
DUMPBUF 1
FLASHDISK 1
FSBDPART 1
FSDOSFSFORMAT 1
FSDOSFSNAME 1
FSERROR DOSFS
FSERROR JFFS2
FSERROR MOUNTED IMFS
FSERROR RFS
FSERROR ROOT IMFS
FSPERMISSION JFFS2
FSPERMISSION MOUNTED IMFS
FSPERMISSION RFS
FSPERMISSION ROOT IMFS
FSRENAME MOUNTED IMFS
FTP 1
libdl (RTL) 1
libdl (RTL) 4
libdl (RTL) 5
MGHTTPD 1
MONITOR 2
MOUSE 1
NETWORKING 1
PSXFILE 1
PSXIMFS 1
PSXIMFS 2
PSXPASSWD 2
PSXPIPE 1
PSXSTAT
SMP 1
SMP 2
SMP 3
SMP 8
SMP 9
SMPAFFINITY 1
SMPSCHEDULER 1
SPERROR 1
SPERROR 2
SPERROR 3
SYSCALL 1
TAR 1
TERMIOS 3
TERMIOS 4
TERMIOS 5
TERMIOS 6
TERMIOS 7

--
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Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

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Re: [PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-17 Thread Sebastian Huber 

Hello Daniel,

I checked it in. Would you mind adding the BSP variants for the leon2 as 
well?


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Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
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[PATCH-v2] sparc: Rename NGMP to GR740 and add configs for UT699, UT700, and GR712RC

2017-07-14 Thread Daniel Cederman 
The UT699 requires -mcpu=leon as it does not support the CAS instruction
provided by -mcpu=leon3. It also requires -mfix-ut699 for errata fixes.

UT700 and GR712RC requires the -mfix-ut700 and -mfix-gr712rc flags that
have been recently added to GCC's master and 7-branch.

Remove -msoft-float from the leon3 config to make the more common case
of using the FPU the default.
---
 c/src/lib/libbsp/sparc/leon3/Makefile.am |  5 -
 c/src/lib/libbsp/sparc/leon3/make/custom/gr712rc.cfg | 18 ++
 .../sparc/leon3/make/custom/{ngmp.cfg => gr740.cfg}  |  0
 c/src/lib/libbsp/sparc/leon3/make/custom/leon3.cfg   |  2 +-
 c/src/lib/libbsp/sparc/leon3/make/custom/ut699.cfg   | 18 ++
 c/src/lib/libbsp/sparc/leon3/make/custom/ut700.cfg   | 18 ++
 c/src/lib/libbsp/sparc/leon3/preinstall.am   | 18 +++---
 .../lib/libbsp/sparc/leon3/startup/linkcmds.gr712rc  | 20 
 .../leon3/startup/{linkcmds.ngmp => linkcmds.gr740}  |  0
 c/src/lib/libbsp/sparc/leon3/startup/linkcmds.ut699  | 20 
 c/src/lib/libbsp/sparc/leon3/startup/linkcmds.ut700  | 20 
 11 files changed, 134 insertions(+), 5 deletions(-)
 create mode 100644 c/src/lib/libbsp/sparc/leon3/make/custom/gr712rc.cfg
 rename c/src/lib/libbsp/sparc/leon3/make/custom/{ngmp.cfg => gr740.cfg} (100%)
 create mode 100644 c/src/lib/libbsp/sparc/leon3/make/custom/ut699.cfg
 create mode 100644 c/src/lib/libbsp/sparc/leon3/make/custom/ut700.cfg
 create mode 100644 c/src/lib/libbsp/sparc/leon3/startup/linkcmds.gr712rc
 rename c/src/lib/libbsp/sparc/leon3/startup/{linkcmds.ngmp => linkcmds.gr740} 
(100%)
 create mode 100644 c/src/lib/libbsp/sparc/leon3/startup/linkcmds.ut699
 create mode 100644 c/src/lib/libbsp/sparc/leon3/startup/linkcmds.ut700

diff --git a/c/src/lib/libbsp/sparc/leon3/Makefile.am 
b/c/src/lib/libbsp/sparc/leon3/Makefile.am
index 52f6b56..cd591dd 100644
--- a/c/src/lib/libbsp/sparc/leon3/Makefile.am
+++ b/c/src/lib/libbsp/sparc/leon3/Makefile.am
@@ -26,7 +26,10 @@ project_lib_DATA = start.$(OBJEXT)
 dist_project_lib_DATA += ../shared/startup/linkcmds.base
 dist_project_lib_DATA += startup/linkcmds
 dist_project_lib_DATA += startup/linkcmds.leon3
-dist_project_lib_DATA += startup/linkcmds.ngmp
+dist_project_lib_DATA += startup/linkcmds.ut699
+dist_project_lib_DATA += startup/linkcmds.gr712rc
+dist_project_lib_DATA += startup/linkcmds.ut700
+dist_project_lib_DATA += startup/linkcmds.gr740
 
 noinst_LIBRARIES += libbsp.a
 libbsp_a_SOURCES =
diff --git a/c/src/lib/libbsp/sparc/leon3/make/custom/gr712rc.cfg 
b/c/src/lib/libbsp/sparc/leon3/make/custom/gr712rc.cfg
new file mode 100644
index 000..40c6d12
--- /dev/null
+++ b/c/src/lib/libbsp/sparc/leon3/make/custom/gr712rc.cfg
@@ -0,0 +1,18 @@
+#
+#  Config file for the GR712RC LEON3 SPARC processor.
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU=sparc
+RTEMS_CPU_MODEL=leon3
+
+#  This contains the compiler options necessary to select the CPU model
+#  and (hopefully) optimize for it.
+CPU_CFLAGS = -mcpu=leon3 -mfix-gr712rc
+
+# optimize flag: typically -O2
+CFLAGS_OPTIMIZE_V = -O2 -g
+CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
+
+LDFLAGS = -Wl,--gc-sections
diff --git a/c/src/lib/libbsp/sparc/leon3/make/custom/ngmp.cfg 
b/c/src/lib/libbsp/sparc/leon3/make/custom/gr740.cfg
similarity index 100%
rename from c/src/lib/libbsp/sparc/leon3/make/custom/ngmp.cfg
rename to c/src/lib/libbsp/sparc/leon3/make/custom/gr740.cfg
diff --git a/c/src/lib/libbsp/sparc/leon3/make/custom/leon3.cfg 
b/c/src/lib/libbsp/sparc/leon3/make/custom/leon3.cfg
index 34ad967..ef9a868 100644
--- a/c/src/lib/libbsp/sparc/leon3/make/custom/leon3.cfg
+++ b/c/src/lib/libbsp/sparc/leon3/make/custom/leon3.cfg
@@ -9,7 +9,7 @@ RTEMS_CPU_MODEL=leon3
 
 #  This contains the compiler options necessary to select the CPU model
 #  and (hopefully) optimize for it.
-CPU_CFLAGS = -mcpu=leon3 -msoft-float
+CPU_CFLAGS = -mcpu=leon3
 
 # optimize flag: typically -O2
 CFLAGS_OPTIMIZE_V = -O2 -g
diff --git a/c/src/lib/libbsp/sparc/leon3/make/custom/ut699.cfg 
b/c/src/lib/libbsp/sparc/leon3/make/custom/ut699.cfg
new file mode 100644
index 000..2150428
--- /dev/null
+++ b/c/src/lib/libbsp/sparc/leon3/make/custom/ut699.cfg
@@ -0,0 +1,18 @@
+#
+#  Config file for the UT699 LEON3 SPARC processor.
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU=sparc
+RTEMS_CPU_MODEL=leon3
+
+#  This contains the compiler options necessary to select the CPU model
+#  and (hopefully) optimize for it.
+CPU_CFLAGS = -mcpu=leon -mfix-ut699
+
+# optimize flag: typically -O2
+CFLAGS_OPTIMIZE_V = -O2 -g
+CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
+
+LDFLAGS = -Wl,--gc-sections
diff --git a/c/src/lib/libbsp/sparc/leon3/make/custom/ut700.cfg 
b/c/src/lib/libbsp/sparc/leon3/make/custom/ut700.cfg
new file mode 100644
index 000..9ee473e
--- /dev/null
+++ b/c/src/lib/libbsp/sparc/leon3/make/custom/ut700.cfg