[Bug 84662] Long pauses with Unreal demo Elemental on R9270X since : Always flush the HDP cache before submitting a CS to the GPU

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=84662

--- Comment #48 from Andy Furniss  ---
Created attachment 108866
  --> https://bugs.freedesktop.org/attachment.cgi?id=108866=edit
new issue long pause at end of demo

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[Bug 84662] Long pauses with Unreal demo Elemental on R9270X since : Always flush the HDP cache before submitting a CS to the GPU

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=84662

--- Comment #47 from Andy Furniss  ---
(In reply to Michel Dänzer from comment #46)
> (In reply to Andy Furniss from comment #44)
> > If I stop it after a while I can get the first bit cached (ie. I
> > can run it without vmstat 1 showing anything), but it's still stuttery in
> > the places where it would be loading from disk were it first run.
> 
> Sounds like it's loading new content in those places. Doesn't that cause
> stutter with other drivers?

Hard for me to test fglrx on my setup, but soon I should have more ram to play
with.

The recent changes to to agd5f 3.19-wip seem to have provoked a new issue -
haven't had time to find a commit yet.

Will attach a screen showing that near the end of the demo there is a new
really long pause (graph doesn't really show length, but it was around 10 sec)
that corresponds to a big move from vram to gtt.

Other demos eg. valley don't show any issues and run well.

IIRC there is already a bug somewhere about the rendering issue (common to most
unreal demos) that makes part of the logo black in the screen shot.

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[PATCH 00/72] staging imx-drm new features and fixes

[Alex Deucher]

On Mon, Nov 3, 2014 at 1:58 PM, Steve Longerbeam  
wrote:
> On 11/03/2014 09:48 AM, Greg KH wrote:
>> On Mon, Nov 03, 2014 at 06:17:28PM +0100, Daniel Vetter wrote:
>>> On Mon, Nov 03, 2014 at 08:14:23AM -0800, Greg KH wrote:
 On Mon, Nov 03, 2014 at 05:12:14PM +0100, Daniel Vetter wrote:
> On Fri, Oct 31, 2014 at 03:53:43PM -0700, Steve Longerbeam wrote:
>> Hi, this affects only Freescale imx IPU and imx-drm staging drivers,
>> except for two patches that affect drm core (patch 53 and 63, see below).
>>
>> New features for imx-drm staging driver:
>>
>> - Support for multi-display (HDMI and LVDS).
>> - Support for global alpha and color-key properties for overlay plane.
>> - Support for gamma correction.
>> - The imx-drm crtc devices moved to device tree.
>> - Support for defining custom display interface pixel mappings in the
>>   device tree.
>> - Implements encoder DPMS for LVDS.
>> - YUV planar pixel formats supported for DRM framebuffers.
>> - DDC support added for LVDS.
>> - Page flip handling moved to imx plane driver and implemented with
>>   IPU double-buffering.
>> - Support page-flip in the overlay plane (patch 53 affects drm core).
>> - Add support for parsing pixel clock edge select (patch 63 affects drm 
>> core).
>> - Add LVDS connection detect via drm_probe_ddc().
>> - Implement crtc mode_set_base using plane page-flip.
> Isn't the point of staging to get the driver out of it, instead of adding
> massive piles of features and continously keeping it there? Greg?
 Yes, please don't add new features to this codebase, fix it up so it
 gets out of staging first, I'm not going to take any of these (not the
 least reason being that I wasn't even cc:ed on them...)
>>> Yeah I think imx works a bit like a driver outside of staging with patches
>>> submitted to the subsystem and reviewed all there like normal. Except it's
>>> not ...
>> And I keep taking imx driver patches as well through my staging tree.
>>
>> Steve, what's the status of getting this driver out of staging?  What is
>> left to do, and who is doing the work?
>
> Hi Greg, you should also talk with the original authors (Sascha and
> Philipp at Pengutronix), but in my experience, this driver is still suffering
> from some chronic IPU issues with data starvation to the display interface.
> So from my experience, that is really the only thing that is holding it up.

I'm not familiar with the hw in question, but that sounds like more of
a driver optimization that needs to be done than something keeping the
driver in staging.

Alex

[Bug 85647] Random radeonsi crashes with mesa 10.3.x

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=85647

--- Comment #12 from Hannu  ---
Created attachment 108864
  --> https://bugs.freedesktop.org/attachment.cgi?id=108864=edit
Crash with mesa 10.2.8, Xorg.0.log

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[Bug 85647] Random radeonsi crashes with mesa 10.3.x

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=85647

--- Comment #11 from Hannu  ---
Now it crashed with mesa 10.2.8-1 for the first time so we can propably forget
the "regression between mesa 10.3.x and 10.2.x" part of this report. I will
attach Xorg.0.log but it has the same old error. Crash happened while watching
flash video full screen.

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[PATCH] drm: Remove compiler BUG_ON() test

[Peter Hurley]

modeset->num_connectors must be 0 to reach the BUG_ON() which tests
for non-zero modeset->num_connectors; remove BUG_ON().

Signed-off-by: Peter Hurley 
---
 drivers/gpu/drm/drm_fb_helper.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index d934346..7198257 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1573,7 +1573,6 @@ static void drm_setup_crtcs(struct drm_fb_helper 
*fb_helper)
modeset = _helper->crtc_info[i].mode_set;
if (modeset->num_connectors == 0) {
BUG_ON(modeset->fb);
-   BUG_ON(modeset->num_connectors);
if (modeset->mode)
drm_mode_destroy(dev, modeset->mode);
modeset->mode = NULL;
-- 
2.1.1

[PATCH] drm: Fix DRM_FORCE_ON_DIGITAL use

[Peter Hurley]

A connector may be forced on from the command line via video=
command line setting. The digital output of dual-mode connectors
can also be specifically selected and forced on; eg., 'video=DVI-I-2:D'.
However, in this case, the connector->status will be mistakenly set to
connector_status_disconnected, and the connector will not be mode set.

Fix the connector->status when connector->force is DRM_FORCE_ON_DIGITAL.

Signed-off-by: Peter Hurley 
---
 drivers/gpu/drm/drm_probe_helper.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_probe_helper.c 
b/drivers/gpu/drm/drm_probe_helper.c
index 6857e9a..7483a47 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -118,7 +118,8 @@ static int 
drm_helper_probe_single_connector_modes_merge_bits(struct drm_connect
mode->status = MODE_UNVERIFIED;

if (connector->force) {
-   if (connector->force == DRM_FORCE_ON)
+   if (connector->force == DRM_FORCE_ON ||
+   connector->force == DRM_FORCE_ON_DIGITAL)
connector->status = connector_status_connected;
else
connector->status = connector_status_disconnected;
-- 
2.1.1

[PATCH 06/17] drm/tegra: dc: Add missing call to drm_vblank_on()

[Daniel Vetter]

On Mon, Nov 03, 2014 at 01:45:56PM -0500, Sean Paul wrote:
> On Mon, Nov 3, 2014 at 4:27 AM, Thierry Reding  
> wrote:
> > From: Thierry Reding 
> >
> > When the CRTC is enabled, make sure the VBLANK machinery is enabled.
> > Failure to do so will cause drm_vblank_get() to not enable the VBLANK on
> > the CRTC and VBLANK-synchronized page-flips won't work.
> >
> > While at it, get rid of the legacy drm_vblank_pre_modeset() and
> > drm_vblank_post_modeset() calls that are replaced by drm_vblank_on()
> > and drm_vblank_off().
> >
> > Reported-by: Alexandre Courbot 
> > Signed-off-by: Thierry Reding 
> > ---
> >  drivers/gpu/drm/tegra/dc.c | 7 ++-
> >  1 file changed, 2 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> > index 4a015232e2e8..4da366a4d78a 100644
> > --- a/drivers/gpu/drm/tegra/dc.c
> > +++ b/drivers/gpu/drm/tegra/dc.c
> > @@ -739,7 +739,6 @@ static const struct drm_crtc_funcs tegra_crtc_funcs = {
> >
> >  static void tegra_crtc_disable(struct drm_crtc *crtc)
> >  {
> > -   struct tegra_dc *dc = to_tegra_dc(crtc);
> > struct drm_device *drm = crtc->dev;
> > struct drm_plane *plane;
> >
> > @@ -755,7 +754,7 @@ static void tegra_crtc_disable(struct drm_crtc *crtc)
> > }
> > }
> >
> > -   drm_vblank_off(drm, dc->pipe);
> > +   drm_crtc_vblank_off(crtc);
> >  }
> >
> >  static bool tegra_crtc_mode_fixup(struct drm_crtc *crtc,
> > @@ -844,8 +843,6 @@ static int tegra_crtc_mode_set(struct drm_crtc *crtc,
> > u32 value;
> > int err;
> >
> > -   drm_vblank_pre_modeset(crtc->dev, dc->pipe);
> > -
> 
> Should you replace this with a call to drm_crtc_vblank_off in
> prepare()? AFAICT, crtc_funcs->disable() isn't guaranteed to be called
> before modeset, and it's unclear to me whether the vblank counter will
> be reset in prepare.

->disable is only called when fully disabling the crtc and should be
implemented in terms of ->prepare and additional release any crtc related
resources acquire. Examples include unpinning the framebuffer or releasing
shared resources like dplls.

Shutting down the vblank logic should definitely happen in the prepare
logic, which should be shared with the dpms off logic.

/me has looked a few too many times too closely at the crtc helpers ;-)

Aside if you'll read the atomic helpers that should be a lot clearer - the
corresponding code even explains what exact callback is called under which
conditions. And it's all in one place thanks to the less insane calling
sequence compared to crtc helpers. Hint, hint, ...
Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[RFC PATCH] drm/exynos: Add DECON driver

[Inki Dae]

Hi,

Fortunately, I could get the user manual for Exynos7420. Below are my
comments.

Thanks,
Inki Dae

On 2014년 10월 23일 01:34, Ajay kumar wrote:
> On Wed, Oct 22, 2014 at 8:26 PM, Inki Dae  wrote:
>>
>> Thanks for contribution.
>>
>> It seems reasonable that you separate device drivers into FIMD and DECON
>> because many registers of them have many different offsets and fields.
>> However, there may be a good solution that we can combine common sets of
>> these drivers later.
> Yes, this is the main reason behind sending this as RFC patch.
> I want to know what's the best way to do this.
> FIMD, 5433 DECON and Exynos7 DECON - all are different.
> Also, in Exynos7 DECON-INT is same as DECON-EXT(Mixer).
> So, even I am not sure how the driver layouts should be!

Please, make sure Exynos SoC name, Exynos7410 or Exynos7420. In my
understanding, Exynos7 doesn't mean one real SoC.

> 
>> Below are my comments.
>>
>> Thanks,
>> Inki Dae
>>
>> On 2014년 10월 10일 21:48, Ajay Kumar wrote:
>>> This series is based on exynos-drm-next branch of Inki Dae's tree at:
>>> git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git
>>>
>>> DECON(Display and Enhancement Controller) is the new IP
>>> in exynos7 SOC for generating video signals using pixel data.
>>
>> DECON was used since Exynos5430. And is Exynos5433 different from
>> Exynos7? If so, could I get the Exynos7 user manual (TRM) for review?
> Yes, Exynos5433 DECON is very much different than Exynos7 DECON.

Do not use Exynos7 word and use Exynos7410 or Exynos7420 instead.

> I will see how manual can be arranged.
> 
>>>
>>> DECON driver can be used to drive 2 different interfaces on Exynos7:
>>> DECON-INT(video controller) and DECON-EXT(Mixer for HDMI)
>>>
>>> The existing FIMD driver code was used as a template to create
>>> DECON driver. Only DECON-INT is supported as of now, and
>>> DECON-EXT support will be added later.
>>>
>>> Signed-off-by: Akshu Agrawal 
>>> Signed-off-by: Ajay Kumar 
>>> ---
>>>  .../devicetree/bindings/video/exynos-decon.txt |   68 ++
>>>  drivers/gpu/drm/exynos/Kconfig |   11 +-
>>>  drivers/gpu/drm/exynos/Makefile|1 +
>>>  drivers/gpu/drm/exynos/exynos_drm_decon.c  | 1086
>> 
>>>  drivers/gpu/drm/exynos/exynos_drm_drv.c|   17 +-
>>>  drivers/gpu/drm/exynos/exynos_drm_drv.h|   11 +
>>>  include/video/samsung_decon.h  |  346 +++
>>>  7 files changed, 1537 insertions(+), 3 deletions(-)
>>>  create mode 100644
>> Documentation/devicetree/bindings/video/exynos-decon.txt
>>>  create mode 100644 drivers/gpu/drm/exynos/exynos_drm_decon.c
>>>  create mode 100644 include/video/samsung_decon.h
>>>
>>> diff --git a/Documentation/devicetree/bindings/video/exynos-decon.txt
>> b/Documentation/devicetree/bindings/video/exynos-decon.txt
>>> new file mode 100644
>>> index 000..e865650
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/video/exynos-decon.txt
>>> @@ -0,0 +1,68 @@
>>> +Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)
>>> +
>>> +DECON (Display and Enhancement Controller) is the Display Controller
>> for the
>>> +Exynos7 series of SoCs which transfers the image data from a video memory
>>> +buffer to an external LCD interface.
>>> +
>>> +Required properties:
>>> +- compatible: value should be "samsung,exynos7-decon";
>>
>> If exynos5433 was just renamed to exynos7 then, it should be one of the
>> following:
>> (a) "samsung,exynos5430-decon" for Display and enhancement controller
>> IP for Exynos5430
>> (b) "samsung,exynos7" for Display and enhancement controller IP for 
>> Exynos7
>>
>> Or,
>> (a) "samsung,exynos5430-decon" for Display and enhancement controller
>> IP for Exynos5430
>>
>> (b) "samsung,exynos5433-decon" for Display and enhancement controller
>> IP for Exynos5433
>> (c) "samsung,exynos7" for Display and enhancement controller IP for 
>> Exynos7
> Eventually, we will end up here.
> 
>>
>>> +
>>> +- reg: physical base address and length of the DECON registers set.
>>> +
>>> +- interrupt-parent: should be the phandle of the decon controller's
>>> + parent interrupt controller.
>>> +
>>> +- interrupts: should contain a list of all DECON IP block interrupts
>> in the
>>> +  order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
>>> +  format depends on the interrupt controller used.
>>> +
>>> +- interrupt-names: should contain the interrupt names: "fifo", "vsync",
>>> + "lcd_sys", in the same order as they were listed in the interrupts
>>> +property.
>>> +
>>> +- pinctrl-0: pin control group to be used for this controller.
>>> +
>>> +- pinctrl-names: must contain a "default" entry.
>>> +
>>> +- clocks: must include clock specifiers corresponding to entries in the
>>> + clock-names property.
>>> +
>>> +- clock-names: list of clock names sorted in the 

[PATCH 05/72] ARM: i.MX6: select pll3_usb_otg for ldb_di for rev 1.0 chip

[Steve Longerbeam]

On 11/03/2014 12:06 PM, Fabio Estevam wrote:
> On Mon, Nov 3, 2014 at 5:17 PM, Steve Longerbeam
>  wrote:
>
>> Internally we are using Freescale's workaround patch for this problem,
>> but it has a lot of issues, most of which is that it needs to be incorporated
>> into the clk API so that the workaround would be applied whenever the
>> LDB parent mux is changed.
> Could you please post a patch with this approach? It would be really
> nice to have this fixed in mainline.


Hmm, well I reviewed the Freescale patch again, and it won't be so
simple. The patch assumes the ldb_di_clk_sel mux is set to the reset
default mmdc_ch1_axi source, and that's a central premise of the whole
patch. When the workaround is folded into the clk set_parent ops, this
assumption can't be made any more.

I'm not sure I can capably generalize this patch to switch away from any
of the mux sources to any other, avoiding glitch generation, given that there
appears to be so many undocumented pieces in the CCM module. Is there
someone at Freescale who can take this on?

Steve

[PATCH 00/72] staging imx-drm new features and fixes

[Daniel Vetter]

On Mon, Nov 03, 2014 at 08:14:23AM -0800, Greg KH wrote:
> On Mon, Nov 03, 2014 at 05:12:14PM +0100, Daniel Vetter wrote:
> > On Fri, Oct 31, 2014 at 03:53:43PM -0700, Steve Longerbeam wrote:
> > > Hi, this affects only Freescale imx IPU and imx-drm staging drivers,
> > > except for two patches that affect drm core (patch 53 and 63, see below).
> > > 
> > > New features for imx-drm staging driver:
> > > 
> > > - Support for multi-display (HDMI and LVDS).
> > > - Support for global alpha and color-key properties for overlay plane.
> > > - Support for gamma correction.
> > > - The imx-drm crtc devices moved to device tree.
> > > - Support for defining custom display interface pixel mappings in the
> > >   device tree.
> > > - Implements encoder DPMS for LVDS.
> > > - YUV planar pixel formats supported for DRM framebuffers.
> > > - DDC support added for LVDS.
> > > - Page flip handling moved to imx plane driver and implemented with
> > >   IPU double-buffering.
> > > - Support page-flip in the overlay plane (patch 53 affects drm core).
> > > - Add support for parsing pixel clock edge select (patch 63 affects drm 
> > > core).
> > > - Add LVDS connection detect via drm_probe_ddc().
> > > - Implement crtc mode_set_base using plane page-flip.
> > 
> > Isn't the point of staging to get the driver out of it, instead of adding
> > massive piles of features and continously keeping it there? Greg?
> 
> Yes, please don't add new features to this codebase, fix it up so it
> gets out of staging first, I'm not going to take any of these (not the
> least reason being that I wasn't even cc:ed on them...)

Yeah I think imx works a bit like a driver outside of staging with patches
submitted to the subsystem and reviewed all there like normal. Except it's
not ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH 05/72] ARM: i.MX6: select pll3_usb_otg for ldb_di for rev 1.0 chip

[Fabio Estevam]

On Mon, Nov 3, 2014 at 5:17 PM, Steve Longerbeam
 wrote:

> Internally we are using Freescale's workaround patch for this problem,
> but it has a lot of issues, most of which is that it needs to be incorporated
> into the clk API so that the workaround would be applied whenever the
> LDB parent mux is changed.

Could you please post a patch with this approach? It would be really
nice to have this fixed in mainline.

[PATCH 00/72] staging imx-drm new features and fixes

[Fabio Estevam]

On Mon, Nov 3, 2014 at 4:59 PM, Steve Longerbeam
 wrote:

>> Steve, what's the status of getting this driver out of staging?  What is
>> left to do, and who is doing the work?
>
> Hi Greg, you should also talk with the original authors (Sascha and
> Philipp at Pengutronix), but in my experience, this driver is still suffering
> from some chronic IPU issues with data starvation to the display interface.
> So from my experience, that is really the only thing that is holding it up.

Adding Pengutronix and Russell on Cc.

Care to explain on the " data starvation to the display interface" issue?

[PATCH 07/72] gpu: ipu-v3: Add ipu_dp_set_chroma_key()

[Steve Longerbeam]

On 11/03/2014 04:31 AM, Philipp Zabel wrote:
> Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
>> Adds the function ipu_dp_set_chroma_key(), which sets up a color key
>> value for a DP foreground plane.
>>
>> ipu_dp_set_chroma_key() accepts a color key value in RGB24 format.
>> If the combiner unit colorspace is YUV, the key must be converted
>> to YUV444, using the same CSC coefficients as programmed in the DP.
>> So pull out the CSC coefficients from ipu_dp_csc_init() to make
>> them available to rgb24_to_yuv444() that converts to color key.
> What is the rationale to disallow specifying the color key in YUV?

The color key passed to ipu_dp_set_chroma_key() has to be in one
colorspace or the other, and the convention from elsewhere seems
to be RGB24. The caller can't know what the colorspace of the Combining
Unit in the DP is set to, so it can't be left to the caller to decide which
colorspace to provide. So the point is, a choice has to be made and the
best choice is an RGB24 color key, the DP can then convert to YUV444
if needed.


> Regardless of the new feature, I like the move to static const
> coefficient tables. Maybe split that into two patches?

Sure, I'll do that.

Steve

> Signed-off-by: Steve Longerbeam 
> ---
>  drivers/gpu/ipu-v3/ipu-dp.c |  121 
> ---
>  include/video/imx-ipu-v3.h  |1 +
>  2 files changed, 103 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
> index 98686ed..e4026f1 100644
> --- a/drivers/gpu/ipu-v3/ipu-dp.c
> +++ b/drivers/gpu/ipu-v3/ipu-dp.c
> @@ -84,6 +84,52 @@ static inline struct ipu_flow *to_flow(struct ipu_dp *dp)
>   return container_of(dp, struct ipu_flow, background);
>  }
>  
> +static const int rgb2yuv_coeff[5][3] = {
> + { 0x0099, 0x012d, 0x003a },
> + { 0x03a9, 0x0356, 0x0100 },
> + { 0x0100, 0x0329, 0x03d6 },
> + { 0x, 0x0200, 0x0200 }, /* B0, B1, B2 */
> + { 0x2,0x2,0x2 },/* S0, S1, S2 */
> +};
> +
> +static const int yuv2rgb_coeff[5][3] = {
> + { 0x0095, 0x, 0x00cc },
> + { 0x0095, 0x03ce, 0x0398 },
> + { 0x0095, 0x00ff, 0x },
> + { 0x3e42, 0x010a, 0x3dd6 }, /* B0,B1,B2 */
> + { 0x1,0x1,0x1 },/* S0,S1,S2 */
> +};
> +
> +/*
> + * This is used to convert an RGB24 color key to YUV444, using
> + * the same CSC coefficients as programmed in the DP.
> + */
> +static u32 rgb24_to_yuv444(u32 rgb24)
> +{
> + u32 red, green, blue;
> + int i, c[3];
> +
> + red   = (rgb24 >> 16) & 0xff;
> + green = (rgb24 >>  8) & 0xff;
> + blue  = (rgb24 >>  0) & 0xff;
> +
> + for (i = 0; i < 3; i++) {
> + c[i] = red * rgb2yuv_coeff[i][0];
> + c[i] += green * rgb2yuv_coeff[i][1];
> + c[i] += blue * rgb2yuv_coeff[i][2];
> + c[i] /= 16;
> + c[i] += rgb2yuv_coeff[3][i] * 4;
> + c[i] += 8;
> + c[i] /= 16;
> + if (c[i] < 0)
> + c[i] = 0;
> + if (c[i] > 255)
> + c[i] = 255;
> + }
> +
> + return (c[0] << 16) | (c[1] << 8) | c[2];
> +}
> +
>  int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
>   u8 alpha, bool bg_chan)
>  {
> @@ -120,6 +166,48 @@ int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool 
> enable,
>  }
>  EXPORT_SYMBOL_GPL(ipu_dp_set_global_alpha);
>  
> +/*
> + * The input color_key must always be RGB24. It will be converted to
> + * YUV444 if the pixel format to the Combining unit is YUV space.
> + */
> +int ipu_dp_set_chroma_key(struct ipu_dp *dp, bool enable, u32 color_key)
> +{
> + struct ipu_flow *flow = to_flow(dp);
> + struct ipu_dp_priv *priv = flow->priv;
> + enum ipu_color_space combiner_cs;
> + u32 reg;
> +
> + mutex_lock(>mutex);
> +
> + if (flow->foreground.in_cs == flow->background.in_cs)
> + combiner_cs = flow->foreground.in_cs;
> + else
> + combiner_cs = flow->out_cs;
> +
> + if (combiner_cs == IPUV3_COLORSPACE_YUV)
> + color_key = rgb24_to_yuv444(color_key);
> +
> + color_key &= 0x00ff;
> +
> + if (enable) {
> + reg = readl(flow->base + DP_GRAPH_WIND_CTRL) & ~0x00FFL;
> + writel(reg | color_key, flow->base + DP_GRAPH_WIND_CTRL);
> +
> + reg = readl(flow->base + DP_COM_CONF);
> + writel(reg | DP_COM_CONF_GWCKE, flow->base + DP_COM_CONF);
> + } else {
> + reg = readl(flow->base + DP_COM_CONF);
> + writel(reg & ~DP_COM_CONF_GWCKE, flow->base + DP_COM_CONF);
> + }
> +
> + ipu_srm_dp_sync_update(priv->ipu);
> +
> + mutex_unlock(>mutex);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(ipu_dp_set_chroma_key);
> +
>  int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
>  {
>   struct ipu_flow *flow = to_flow(dp);
> @@ -138,6 +226,7 @@ static void ipu_dp_csc_init(struct ipu_flow *flow,

[PATCH] drm: More specific locking for get* ioctls

[Daniel Vetter]

Motivated by the per-plane locking I've gone through all the get*
ioctls and reduced the locking to the bare minimum required.

Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_crtc.c | 43 +--
 1 file changed, 17 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index a05f9652dcc4..e54ce40333ae 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1741,7 +1741,9 @@ int drm_mode_getresources(struct drm_device *dev, void 
*data,
card_res->count_fbs = fb_count;
mutex_unlock(_priv->fbs_lock);

-   drm_modeset_lock_all(dev);
+   /* mode_config.mutex protects the connector list against e.g. DP MST
+* connector hot-adding. CRTC/Plane lists are invariant. */
+   mutex_lock(>mode_config.mutex);
if (!drm_is_primary_client(file_priv)) {

mode_group = NULL;
@@ -1861,7 +1863,7 @@ int drm_mode_getresources(struct drm_device *dev, void 
*data,
  card_res->count_connectors, card_res->count_encoders);

 out:
-   drm_modeset_unlock_all(dev);
+   mutex_unlock(>mode_config.mutex);
return ret;
 }

@@ -1888,14 +1890,11 @@ int drm_mode_getcrtc(struct drm_device *dev,
if (!drm_core_check_feature(dev, DRIVER_MODESET))
return -EINVAL;

-   drm_modeset_lock_all(dev);
-
crtc = drm_crtc_find(dev, crtc_resp->crtc_id);
-   if (!crtc) {
-   ret = -ENOENT;
-   goto out;
-   }
+   if (!crtc)
+   return -ENOENT;

+   drm_modeset_lock_crtc(crtc, crtc->primary);
crtc_resp->x = crtc->x;
crtc_resp->y = crtc->y;
crtc_resp->gamma_size = crtc->gamma_size;
@@ -1912,9 +1911,8 @@ int drm_mode_getcrtc(struct drm_device *dev,
} else {
crtc_resp->mode_valid = 0;
}
+   drm_modeset_unlock_crtc(crtc);

-out:
-   drm_modeset_unlock_all(dev);
return ret;
 }

@@ -2098,24 +2096,22 @@ int drm_mode_getencoder(struct drm_device *dev, void 
*data,
if (!drm_core_check_feature(dev, DRIVER_MODESET))
return -EINVAL;

-   drm_modeset_lock_all(dev);
encoder = drm_encoder_find(dev, enc_resp->encoder_id);
-   if (!encoder) {
-   ret = -ENOENT;
-   goto out;
-   }
+   if (!encoder)
+   return -ENOENT;

+   drm_modeset_lock(>mode_config.connection_mutex, NULL);
if (encoder->crtc)
enc_resp->crtc_id = encoder->crtc->base.id;
else
enc_resp->crtc_id = 0;
+   drm_modeset_unlock(>mode_config.connection_mutex);
+
enc_resp->encoder_type = encoder->encoder_type;
enc_resp->encoder_id = encoder->base.id;
enc_resp->possible_crtcs = encoder->possible_crtcs;
enc_resp->possible_clones = encoder->possible_clones;

-out:
-   drm_modeset_unlock_all(dev);
return ret;
 }

@@ -2145,7 +2141,6 @@ int drm_mode_getplane_res(struct drm_device *dev, void 
*data,
if (!drm_core_check_feature(dev, DRIVER_MODESET))
return -EINVAL;

-   drm_modeset_lock_all(dev);
config = >mode_config;

if (file_priv->universal_planes)
@@ -2180,7 +2175,6 @@ int drm_mode_getplane_res(struct drm_device *dev, void 
*data,
plane_resp->count_planes = num_planes;

 out:
-   drm_modeset_unlock_all(dev);
return ret;
 }

@@ -2208,13 +2202,11 @@ int drm_mode_getplane(struct drm_device *dev, void 
*data,
if (!drm_core_check_feature(dev, DRIVER_MODESET))
return -EINVAL;

-   drm_modeset_lock_all(dev);
plane = drm_plane_find(dev, plane_resp->plane_id);
-   if (!plane) {
-   ret = -ENOENT;
-   goto out;
-   }
+   if (!plane)
+   return -ENOENT;

+   drm_modeset_lock(>mutex, NULL);
if (plane->crtc)
plane_resp->crtc_id = plane->crtc->base.id;
else
@@ -2224,6 +2216,7 @@ int drm_mode_getplane(struct drm_device *dev, void *data,
plane_resp->fb_id = plane->fb->base.id;
else
plane_resp->fb_id = 0;
+   drm_modeset_unlock(>mutex);

plane_resp->plane_id = plane->base.id;
plane_resp->possible_crtcs = plane->possible_crtcs;
@@ -2245,8 +2238,6 @@ int drm_mode_getplane(struct drm_device *dev, void *data,
}
plane_resp->count_format_types = plane->format_count;

-out:
-   drm_modeset_unlock_all(dev);
return ret;
 }

-- 
2.1.1

[PATCH 00/72] staging imx-drm new features and fixes

[Daniel Vetter]

On Fri, Oct 31, 2014 at 03:53:43PM -0700, Steve Longerbeam wrote:
> Hi, this affects only Freescale imx IPU and imx-drm staging drivers,
> except for two patches that affect drm core (patch 53 and 63, see below).
> 
> New features for imx-drm staging driver:
> 
> - Support for multi-display (HDMI and LVDS).
> - Support for global alpha and color-key properties for overlay plane.
> - Support for gamma correction.
> - The imx-drm crtc devices moved to device tree.
> - Support for defining custom display interface pixel mappings in the
>   device tree.
> - Implements encoder DPMS for LVDS.
> - YUV planar pixel formats supported for DRM framebuffers.
> - DDC support added for LVDS.
> - Page flip handling moved to imx plane driver and implemented with
>   IPU double-buffering.
> - Support page-flip in the overlay plane (patch 53 affects drm core).
> - Add support for parsing pixel clock edge select (patch 63 affects drm core).
> - Add LVDS connection detect via drm_probe_ddc().
> - Implement crtc mode_set_base using plane page-flip.

Isn't the point of staging to get the driver out of it, instead of adding
massive piles of features and continously keeping it there? Greg?
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Modesetting lock changes breaks vmwgfx since 3.18-rc1

[Daniel Vetter]

On Mon, Nov 03, 2014 at 11:29:39AM +0100, Thomas Hellstrom wrote:
> Hi!
> 
> On 10/31/2014 06:33 PM, Daniel Vetter wrote:
> > On Thu, Oct 30, 2014 at 03:41:31PM +0100, Thomas Hellstrom wrote:
> >> Hi!
> >>
> >> Details in
> >>
> >> https://urldefense.proofpoint.com/v2/url?u=https-3A__bugzilla.redhat.com_show-5Fbug.cgi-3Fid-3D1155825=AAIBAg=Sqcl0Ez6M0X8aeM67LKIiDJAXVeAw-YihVMNtXt-uEs=vpukPkBtpoNQp2IUKuFviOmPNYWVKmen3Jeeu55zmEA=lsrU5TbpNlecpBoc0CpsmwopYh2VrihduvgGEIFPsXw=uzLKWffads4edz_fJN5-3K2IObzmVFUcH6kty4ObySs=
> >>  
> >>
> >> Can whoever broke the driver please make an effort to fix it up?
> >>
> >> Daniel, You've been named as a suspect. I'm not sure if that is true.
> > Yeah the recent locking frobbing didn't account for the FIXME comment in
> > vmwgfx. Might be good to address that long-term to get vmwgfx more in line
> > with everyone else again - I simply don't understand the interactions well
> > enough to make that call. There's two of those in total.
> >
> > Can we just remove them perhaps? The question is whether you can do the
> > cursor operation just with the per-crtc lock as protection, or whether
> > there's any shared resources and you need the full exclusion provided by
> > modeset_lock_all. If the crtc locking is good enough then we could rip
> > this out in both function and be done.
> >
> > Note that this FIXME has been in vmwgfx since almost two years now.
> >
> > If that's not possible then I have a major kludge of a hack in my atomic
> > helpers branch which will keep this alive for a bit longer. It ain't
> > pretty though.
> >
> > Cheers, Daniel
> 
> Hi.
> 
> Actually we haven't looked much at the new modesetting locking at all
> but been pretty happy with what others have put in the code, but it
> sounds like we need to actually deal with this now. I've basically never
> been really convinced that we'd see any modesetting locking contention
> with a single lock, but OTOH I guess with a single lock we'd eventually
> start to run into locking recursion problems.

The problem only happens on real hardware, where you need to read EDIDs in
the background and other probe fun. At glance that means we'll just have 2
locks, one fore probe stuff and one for everything else. Except for nasty
overlapping cases, which require the entire thing to be pretty
ridiculously flexible ;-)

But on virtual hardware where no kms op takes a long time fine-grained
locking is indeed complete overkill.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH v2 2/5] video: add RGB444_1X12 and RGB565_1X16 bus formats

[Mauro Carvalho Chehab]

Em Mon, 29 Sep 2014 16:02:40 +0200
Boris Brezillon  escreveu:

> Add RGB444 format using a 12 bits bus and RGB565 using a 16 bits bus.
> 
> These formats will later be used by atmel-hlcdc driver.
> 
> Signed-off-by: Boris BREZILLON 

Not sure if it is too late, but this patch were hidden somewere on my
queue... so:

Acked-by: Mauro Carvalho Chehab 

> ---
>  include/uapi/linux/v4l2-mediabus.h| 2 ++
>  include/uapi/linux/video-bus-format.h | 4 +++-
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/include/uapi/linux/v4l2-mediabus.h 
> b/include/uapi/linux/v4l2-mediabus.h
> index 7b0a06c..05336d6 100644
> --- a/include/uapi/linux/v4l2-mediabus.h
> +++ b/include/uapi/linux/v4l2-mediabus.h
> @@ -33,6 +33,8 @@ enum v4l2_mbus_pixelcode {
>   VIDEO_BUS_TO_V4L2_MBUS(RGB888_2X12_BE),
>   VIDEO_BUS_TO_V4L2_MBUS(RGB888_2X12_LE),
>   VIDEO_BUS_TO_V4L2_MBUS(ARGB_1X32),
> + VIDEO_BUS_TO_V4L2_MBUS(RGB444_1X12),
> + VIDEO_BUS_TO_V4L2_MBUS(RGB565_1X16),
>  
>   VIDEO_BUS_TO_V4L2_MBUS(Y8_1X8),
>   VIDEO_BUS_TO_V4L2_MBUS(UV8_1X8),
> diff --git a/include/uapi/linux/video-bus-format.h 
> b/include/uapi/linux/video-bus-format.h
> index 4abbd5d..f85f7ee 100644
> --- a/include/uapi/linux/video-bus-format.h
> +++ b/include/uapi/linux/video-bus-format.h
> @@ -34,7 +34,7 @@
>  enum video_bus_format {
>   VIDEO_BUS_FMT_FIXED = 0x0001,
>  
> - /* RGB - next is 0x100e */
> + /* RGB - next is 0x1010 */
>   VIDEO_BUS_FMT_RGB444_2X8_PADHI_BE = 0x1001,
>   VIDEO_BUS_FMT_RGB444_2X8_PADHI_LE = 0x1002,
>   VIDEO_BUS_FMT_RGB555_2X8_PADHI_BE = 0x1003,
> @@ -48,6 +48,8 @@ enum video_bus_format {
>   VIDEO_BUS_FMT_RGB888_2X12_BE = 0x100b,
>   VIDEO_BUS_FMT_RGB888_2X12_LE = 0x100c,
>   VIDEO_BUS_FMT_ARGB_1X32 = 0x100d,
> + VIDEO_BUS_FMT_RGB444_1X12 = 0x100e,
> + VIDEO_BUS_FMT_RGB565_1X16 = 0x100f,
>  
>   /* YUV (including grey) - next is 0x2024 */
>   VIDEO_BUS_FMT_Y8_1X8 = 0x2001,

[PATCH 15/17] drm/atomic-helpers: functions for state duplicate/destroy/reset

[Daniel Vetter]

On Mon, Nov 03, 2014 at 03:06:07PM +, Daniel Thompson wrote:
> > kfree is a nop when the argument is NULL, which is a crucial property of
> > this - memset would oops on driver load.
> 
> Oops. Missed that (I think I misread who as assuming there was always
> obj->state in the patch header).
> 
> Do you fancy making the comment "by freeing the state pointer and
> allocating a new..." into "by freeing the state pointer (which may be
> NULL) and allocating a new...".
> 
> If nothing else that means the documentation is richer than the code...

Yeah, sounds like a good idea. I'll also mention that this is for driver
load mostly (if the driver doesn't decide to throw away the state for some
reason over suspend/resume).
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH 15/17] drm/atomic-helpers: functions for state duplicate/destroy/reset

[Daniel Vetter]

On Mon, Nov 03, 2014 at 02:45:28PM +, Daniel Thompson wrote:
> > index 70bd67cf86e3..bd38df3cbe55 100644
> > --- a/drivers/gpu/drm/drm_atomic_helper.c
> > +++ b/drivers/gpu/drm/drm_atomic_helper.c
> > @@ -1429,7 +1429,7 @@ EXPORT_SYMBOL(drm_atomic_helper_set_config);
> >  /**
> >   * drm_atomic_helper_crtc_set_property - helper for crtc prorties
> >   * @crtc: DRM crtc
> > - * @prorty: DRM property
> > + * @property: DRM property
> 
> This looks like a bad fixup (should be in patch 11).

Indeed, will shuffle around.

> > +void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)
> > +{
> > +   kfree(crtc->state);
> > +   crtc->state = kzalloc(sizeof(*crtc->state), GFP_KERNEL);
> 
> This code looks semantically equivalent to a memset() although it may
> result in a change to the pointer value. Is this code trying to flush
> out uses-after-free?
> 
> I can't find this free/alloc pattern in delivered code anywhere else in
> the drm code base. Should this need to be replaced with memset() before
> merging (or at least commenting)?

kfree is a nop when the argument is NULL, which is a crucial property of
this - memset would oops on driver load.

Even neglecting this a memset imo doesn't blow up loudly enough if the
driver subclasses the state structs (by adding more of it's driver private
state at the end). Whereas underallocating tends to anger the slab
poisoning code badly.

Finally it's really not just a memset, but a free + realloc. See the plane
state, which also needs to drop a potential fb reference. Imo the explicit
kfree+realloc makes that more obvious.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH 06/17] drm: Global atomic state handling

[Matt Roper]

On Sun, Nov 02, 2014 at 02:19:19PM +0100, Daniel Vetter wrote:
...
> +/**
> + * drm_atomic_get_plane_state - get plane state
> + * @state: global atomic state object
> + * @plane: plane to get state object for
> + *
> + * This functions returns the plane state for the given plane, allocating it 
> if
> + * needed. It will also grab the relevant plane lock to make sure that the 
> state
> + * is consistent.
> + *
> + * Returns:
> + *
> + * Either the allocated state or the error code encoded into the pointer. 
> When
> + * the error is EDEADLK then the w/w mutex code has detected a deadlock and 
> the
> + * entire atomic sequence must be restarted. All other errors are fatal.
> + */
> +struct drm_plane_state *
> +drm_atomic_get_plane_state(struct drm_atomic_state *state,
> +   struct drm_plane *plane)
> +{
> + int ret, index;
> + struct drm_plane_state *plane_state;
> +
> + index = drm_plane_index(plane);
> +
> + if (state->plane_states[index])
> + return state->plane_states[index];
> +
> + /*
> +  * TODO: We currently don't have per-plane mutexes. So instead of trying
> +  * crazy tricks with deferring plane->crtc and hoping for the best just
> +  * grab all crtc locks. Once we have per-plane locks we must update this
> +  * to only take the plane mutex.
> +  */
> + ret = drm_modeset_lock_all_crtcs(state->dev, state->acquire_ctx);
> + if (ret)
> + return ERR_PTR(ret);
> +
> + plane_state = plane->funcs->atomic_duplicate_state(plane);
> + if (!plane_state)
> + return ERR_PTR(-ENOMEM);
> +
> + state->plane_states[index] = plane_state;
> + state->planes[index] = plane;
> + plane_state->state = state;
> +
> + DRM_DEBUG_KMS("Added [PLANE:%d] %p state to %p\n",
> +   plane->base.id, plane_state, state);
> +
> + if (plane_state->crtc) {
> + struct drm_crtc_state *crtc_state;
> +
> + crtc_state = drm_atomic_get_crtc_state(state,
> +plane_state->crtc);
> + if (IS_ERR(crtc_state))
> + return ERR_CAST(crtc_state);
> + }

It's not immediately clear to me why we need to get (create) the crtc
state here.  Is this just so that we know to do an
atomic_begin()/atomic_flush() on this crtc later or do we actually use
the state itself somewhere that I'm overlooking?


Matt

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795

[PULL] drm-intel-next

[Daniel Vetter]

Hi Dave,

drm-intel-next-2014-10-24:
- suspend/resume/freeze/thaw unification from Imre
- wa list improvements from Mika
- display pll precomputation from Ander Conselvan prep work
- more kerneldoc for the interrupt code
- 180 rotation for cursors (Ville)
- ULT/ULX feature check macros cleaned up thanks to Damien
- piles and piles of fixes all over, bug team seems to work!

Aside: the tag log summary is a bit bogus - I've only merged Ander's prep
work with this, the actuall dpll precomputation patches will be in the
next round. So please copypaste the above fixed shortlog into the merge
commit.

Cheers, Daniel


The following changes since commit cacc6c837b799b058d59d2af02c11140640cc1d2:

  Revert "drm/i915: Enable full PPGTT on gen7" (2014-10-24 16:30:14 +0200)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-10-24

for you to fetch changes up to 3eebaec630c2413a5e67bb7f49f0c6a53069a399:

  drm/i915: Update DRIVER_DATE to 20141024 (2014-10-24 16:45:21 +0200)


- suspend/resume/freeze/thaw unification from Imre
- wa list improvements from Mika
- display pll precomputation from Ander Conselvan, this removed the last
  ->mode_set callbacks, a big step towards implementing atomic modesets
- more kerneldoc for the interrupt code
- 180 rotation for cursors (Ville)
- ULT/ULX feature check macros cleaned up thanks to Damien
- piles and piles of fixes all over, bug team seems to work!


Ander Conselvan de Oliveira (4):
  drm/i915: Replace some loop through encoders with intel_pipe_has_type()
  drm/i915: Make *_find_best_dpll() take an intel_crtc insted of drm_crtc
  drm/i915: Make *_crtc_mode_set() take an intel_crtc insted of drm_crtc
  drm/i915: Make intel_pipe_has_type() and some callers take intel_crtc

Arun Siluvery (1):
  drm/i915: Emit even number of dwords when emitting LRIs

Chris Wilson (3):
  drm/i915: Report the current number of bytes freed during oom
  drm/i915: Suppress no action noise from oom shrinker
  drm/i915: Convert a couple more INTEL_INFO-esque macros to be pointer 
agnostic

Damien Lespiau (6):
  drm/i915: Use IS_HSW_ULT() in a HSW specific code path
  drm/i915: Use IS_HSW_ULT() in HAS_IPS()
  drm/i915: Spell out IS_HSW/BDW_ULT() in intel_crt_present()
  drm/i915: Use IS_HSW_ULT() in HSW CDCLK clock read-out
  drm/i915/skl: Don't check for ULT/ULX when detecting the PCH
  drm/i915: Remove IS_ULT()

Daniel Vetter (9):
  drm/i915: Extract intel_fifo_underrun.c
  drm/i915: Use dev_priv in public intel_fifo_underrun.c functions
  drm/i915: Add wrappers to handle fifo underrun interrupts
  drm/i915: Filter gmch fifo underruns in the shared handler
  drm/i915: kerneldoc for intel_fifo_underrun.c
  drm/i915: Document that mmap forwarding is discouraged
  drm/i915: Fold in intel_mst_port_dp_detect
  drm/i915: Correctly reject invalid flags for wait_ioctl
  drm/i915: Update DRIVER_DATE to 20141024

Gustavo Padovan (4):
  drm/i915: Merge of visible and !visible paths for primary planes
  drm/i915: remove leftover from pre-universal planes days
  drm/i915: move check of intel_crtc_cursor_set_obj() out
  drm/i915: Fix not checking cursor and object sizes

Imre Deak (16):
  drm/i915: remove dead code from legacy suspend handler
  drm/i915: vlv: fix gunit HW state corruption during S4 suspend
  drm/i915: factor out i915_drm_suspend_late
  drm/i915: unify legacy S3 suspend and S4 freeze handlers
  drm/i915: propagate error from legacy resume handler
  drm/i915: vlv: fix switcheroo/legacy suspend/resume
  drm/i915: fix S4 suspend while switcheroo state is off
  drm/i915: remove unused restore_gtt_mappings optimization during suspend
  drm/i915: check for GT faults in all resume handlers and driver load time
  drm/i915: enable output polling during S4 thaw
  drm/i915: disable/re-enable PCI device around S4 freeze/thaw
  drm/i915: unify S3 and S4 suspend/resume handlers
  drm/i915: sanitize suspend/resume helper function names
  drm/i915: add poweroff_late handler
  drm/i915: unify switcheroo and legacy suspend/resume handlers
  drm/i915: add comments on what stage a given PM handler is called

Jani Nikula (2):
  drm/i915: remove redundant #ifdef CONFIG_COMPAT
  drm/i915: spt does not have pch backlight override bit

Jesse Barnes (1):
  drm/i915: preserve swizzle settings if necessary v4

Michel Thierry (1):
  drm/i915: add runtime PM get/put call in i915_execlists

Mika Kuoppala (2):
  drm/i915: Build workaround list in ring initialization
  drm/i915: Check workaround status on dfs read time

Paulo Zanoni (3):
  drm/i915: call drm_vblank_cleanup() earlier at unload
  drm/i915: disable IPS while getting the pipe CRCs.

[Bug 73528] Deferred lighting in Second Life causes system hiccups and screen flickering

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=73528

--- Comment #15 from MirceaKitsune  ---
Today with its release, I upgraded to openSUSE 13.2, which has MESA 10.3.0.
Despite being an official package, unlike my previous tests on repository
versions of MESA, the issue is still there. Enabling Advanced Lighting in the
SL viewer will freeze and crash the entire system immediately.

I still have a trace from a while ago, which can be used to re-produce the
issue without running SL yourself. As an xz archive, it seems to be reduced to
54 MB... but if I cannot post it here ask me for another place to upload it.
Anyway, I really hope someone looks into this :(

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[PATCH v2 1/5] video: move mediabus format definition to a more standard place

[Hans Verkuil]

Hi Boris, Laurent,

My apologies, I missed this patch when it was posted.

First of all, please convert all existing kernel drivers that use V4L2_MBUS_FMT
to the new macro. It's easy to automate, and I see no reason why we shouldn't
do this.

If you don't do that now, then we'll be stuck with two naming conventions
in the kernel for a long time.

Actually, to be explicit, I will NACK this if this conversion isn't done
as part of the patch series.

Also add something like:

#ifdef __KERNEL__
#error Use video-bus-format.h instead of v4l2-mediabus.h
#else
#warning Use video-bus-format.h instead of v4l2-mediabus.h
#endif

to the old header to prevent future drivers from using it. I'm not sure
about the warning when included by userspace applications. I personally
think it makes sense. While everyone claims now to keep the two headers
in sync, I think that in practice this will not work. Freezing the old
header and only adding new values to the new header is better.

Secondly, is there any reason why this shouldn't be named media-bus-format.h
instead? Besides regular video these busses can also carry VBI data or even
audio. I prefer the more generic term 'media'. Besides, it's already called a
mediabus format, just with a V4L2 prefix, so why not keep that name? Less
confusing for existing users of this header.

Thirdly, as others mentioned, the updated documentation must be part of the
patch series. I'll NACK it if it isn't. One reason why V4L2 has really good
API documentation is the strict requirement that patches that touch on the
userspace API must also update documentation.

It happened too often that developers swear up and down that they will update
the documentation later, and then they don't.

So, based on the above points:

Nacked-by: Hans Verkuil 

But it really shouldn't be hard to fix it because I do like the idea behind
it very much.

Apologies once again for the late reply and thanks to Laurent for asking me
to review this.

Regards,

Hans

On 09/29/2014 04:02 PM, Boris Brezillon wrote:
> Rename mediabus formats and move the enum into a separate header file so
> that it can be used by DRM/KMS subsystem without any reference to the V4L2
> subsystem.
> 
> Old V4L2_MBUS_FMT_ definitions are now macros that points to VIDEO_BUS_FMT_
> definitions.
> 
> Signed-off-by: Boris BREZILLON 
> Acked-by: Guennadi Liakhovetski 
> ---
>  include/uapi/linux/Kbuild |   1 +
>  include/uapi/linux/v4l2-mediabus.h| 183 
> +++---
>  include/uapi/linux/video-bus-format.h | 127 +++
>  3 files changed, 207 insertions(+), 104 deletions(-)
>  create mode 100644 include/uapi/linux/video-bus-format.h
> 
> diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild
> index be88166..8712730 100644
> --- a/include/uapi/linux/Kbuild
> +++ b/include/uapi/linux/Kbuild
> @@ -410,6 +410,7 @@ header-y += veth.h
>  header-y += vfio.h
>  header-y += vhost.h
>  header-y += videodev2.h
> +header-y += video-bus-format.h
>  header-y += virtio_9p.h
>  header-y += virtio_balloon.h
>  header-y += virtio_blk.h
> diff --git a/include/uapi/linux/v4l2-mediabus.h 
> b/include/uapi/linux/v4l2-mediabus.h
> index 1445e85..7b0a06c 100644
> --- a/include/uapi/linux/v4l2-mediabus.h
> +++ b/include/uapi/linux/v4l2-mediabus.h
> @@ -13,118 +13,93 @@
>  
>  #include 
>  #include 
> +#include 
>  
> -/*
> - * These pixel codes uniquely identify data formats on the media bus. Mostly
> - * they correspond to similarly named V4L2_PIX_FMT_* formats, format 0 is
> - * reserved, V4L2_MBUS_FMT_FIXED shall be used by host-client pairs, where 
> the
> - * data format is fixed. Additionally, "2X8" means that one pixel is 
> transferred
> - * in two 8-bit samples, "BE" or "LE" specify in which order those samples 
> are
> - * transferred over the bus: "LE" means that the least significant bits are
> - * transferred first, "BE" means that the most significant bits are 
> transferred
> - * first, and "PADHI" and "PADLO" define which bits - low or high, in the
> - * incomplete high byte, are filled with padding bits.
> - *
> - * The pixel codes are grouped by type, bus_width, bits per component, 
> samples
> - * per pixel and order of subsamples. Numerical values are sorted using 
> generic
> - * numerical sort order (8 thus comes before 10).
> - *
> - * As their value can't change when a new pixel code is inserted in the
> - * enumeration, the pixel codes are explicitly given a numerical value. The 
> next
> - * free values for each category are listed below, update them when inserting
> - * new pixel codes.
> - */
> -enum v4l2_mbus_pixelcode {
> - V4L2_MBUS_FMT_FIXED = 0x0001,
> +#define VIDEO_BUS_TO_V4L2_MBUS(x)V4L2_MBUS_FMT_ ## x = VIDEO_BUS_FMT_ ## 
> x
>  
> - /* RGB - next is 0x100e */
> - V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE = 0x1001,
> - V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE = 0x1002,
> - V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE = 0x1003,
> - 

[PATCH 15/17] drm/atomic-helpers: functions for state duplicate/destroy/reset

[Daniel Thompson]

On 03/11/14 14:53, Daniel Vetter wrote:
> On Mon, Nov 03, 2014 at 02:45:28PM +, Daniel Thompson wrote:
>>> index 70bd67cf86e3..bd38df3cbe55 100644
>>> --- a/drivers/gpu/drm/drm_atomic_helper.c
>>> +++ b/drivers/gpu/drm/drm_atomic_helper.c
>>> @@ -1429,7 +1429,7 @@ EXPORT_SYMBOL(drm_atomic_helper_set_config);
>>>  /**
>>>   * drm_atomic_helper_crtc_set_property - helper for crtc prorties
>>>   * @crtc: DRM crtc
>>> - * @prorty: DRM property
>>> + * @property: DRM property
>>
>> This looks like a bad fixup (should be in patch 11).
> 
> Indeed, will shuffle around.
> 
>>> +void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)
>>> +{
>>> +   kfree(crtc->state);
>>> +   crtc->state = kzalloc(sizeof(*crtc->state), GFP_KERNEL);
>>
>> This code looks semantically equivalent to a memset() although it may
>> result in a change to the pointer value. Is this code trying to flush
>> out uses-after-free?
>>
>> I can't find this free/alloc pattern in delivered code anywhere else in
>> the drm code base. Should this need to be replaced with memset() before
>> merging (or at least commenting)?
> 
> kfree is a nop when the argument is NULL, which is a crucial property of
> this - memset would oops on driver load.

Oops. Missed that (I think I misread who as assuming there was always
obj->state in the patch header).

Do you fancy making the comment "by freeing the state pointer and
allocating a new..." into "by freeing the state pointer (which may be
NULL) and allocating a new...".

If nothing else that means the documentation is richer than the code...

> Even neglecting this a memset imo doesn't blow up loudly enough if the
> driver subclasses the state structs (by adding more of it's driver private
> state at the end). Whereas underallocating tends to anger the slab
> poisoning code badly.
> 
> Finally it's really not just a memset, but a free + realloc. See the plane
> state, which also needs to drop a potential fb reference. Imo the explicit
> kfree+realloc makes that more obvious.

[Bug 85771] unable to handle kernel NULL pointer dereference in dce6_bandwidth_update

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=85771

--- Comment #3 from Alex Deucher  ---
Created attachment 108842
  --> https://bugs.freedesktop.org/attachment.cgi?id=108842=edit
possible fix

Does this patch help?

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[Bug 83611] Kernel NULL pointer dereference when using tlp on a laptop with AMD video card.

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=83611

Alex Deucher  changed:

   What|Removed |Added

 CC||alexdeucher at gmail.com

--- Comment #5 from Alex Deucher  ---
Created attachment 156391
  --> https://bugzilla.kernel.org/attachment.cgi?id=156391=edit
possible fix

Does this patch help?

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[PATCH 06/72] gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()

[Steve Longerbeam]

On 11/03/2014 04:30 AM, Philipp Zabel wrote:
> Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
>> Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets.
>>
>> Signed-off-by: Steve Longerbeam 
>> ---
>>  drivers/gpu/ipu-v3/ipu-cpmem.c |7 +++
>>  include/video/imx-ipu-v3.h |1 +
>>  2 files changed, 8 insertions(+)
>>
>> diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
>> index 3bf05bc..2c93e9c 100644
>> --- a/drivers/gpu/ipu-v3/ipu-cpmem.c
>> +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
>> @@ -253,6 +253,13 @@ void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int 
>> bufnum, dma_addr_t buf)
>>  }
>>  EXPORT_SYMBOL_GPL(ipu_cpmem_set_buffer);
>>  
>> +void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off)
>> +{
>> +ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_off / 8);
>> +ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_off / 8);
>> +}
>> +EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset);
>> +
>>  void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride)
>>  {
>>  ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1);
>> diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
>> index c74bf4a..03cda50 100644
>> --- a/include/video/imx-ipu-v3.h
>> +++ b/include/video/imx-ipu-v3.h
>> @@ -195,6 +195,7 @@ void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, 
>> int xres, int yres);
>>  void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride);
>>  void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
>>  void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t 
>> buf);
>> +void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 
>> v_off);
>>  void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
>>  void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
>>  void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);
> Looks good to me, just where this be used where
> ipu_cpmem_set_yuv_planar_full can not?

It is useful when the U/V offsets are not the "standard" values for
planar formats. For instance for implementing tiling to support
IC output frames larger that 1024x1024. We use this function
in our mem2mem driver to support tiling.

Steve

[PATCH 15/17] drm/atomic-helpers: functions for state duplicate/destroy/reset

[Daniel Thompson]

On 02/11/14 13:19, Daniel Vetter wrote:> The atomic users and helpers
assume that there is always a obj->state
> structure around. Which means drivers need to somehow create that at
> driver load time. Also it should obviously reset hardware state, so
> needs to be reset upon resume.
>
> Finally the destroy/duplicate_state functions are an awful lot of
> boilerplate if the driver doesn't need anything beyond the default
> state objects.
>
> So add helper functions for all of this.
>
> v2: Somehow the plane/connector versions got lost in the first
> version.
>
> v3: Add kerneldoc.
>
> v4: Make duplicate_state functions a bit more robust, which is useful
> for debugging state tracking issues when transitioning to atomic.
>
> v5: Clear temporary variables in the crtc state when duplicating it,
> like ->mode_changed or ->planes_changed. If we don't do this stale
> values for these might pollute the next atomic modeset.
>
> v6: Also clear crtc_state->event in case the driver didn't (yet) clear
> this out.
>
> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/drm_atomic_helper.c | 154
+++-
>  include/drm/drm_atomic_helper.h |  19 +
>  2 files changed, 170 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
> index 70bd67cf86e3..bd38df3cbe55 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -1429,7 +1429,7 @@ EXPORT_SYMBOL(drm_atomic_helper_set_config);
>  /**
>   * drm_atomic_helper_crtc_set_property - helper for crtc prorties
>   * @crtc: DRM crtc
> - * @prorty: DRM property
> + * @property: DRM property

This looks like a bad fixup (should be in patch 11).


>   * @val: value of property
>   *
>   * Provides a default plane disablle handler using the atomic driver
interface.
> @@ -1493,7 +1493,7 @@ EXPORT_SYMBOL(drm_atomic_helper_crtc_set_property);
>  /**
>   * drm_atomic_helper_plane_set_property - helper for plane prorties
>   * @plane: DRM plane
> - * @prorty: DRM property
> + * @property: DRM property

+1


>   * @val: value of property
>   *
>   * Provides a default plane disable handler using the atomic driver
interface.
> @@ -1557,7 +1557,7 @@ EXPORT_SYMBOL(drm_atomic_helper_plane_set_property);
>  /**
>   * drm_atomic_helper_connector_set_property - helper for connector
prorties
>   * @connector: DRM connector
> - * @prorty: DRM property
> + * @property: DRM property

+1


>   * @val: value of property
>   *
>   * Provides a default plane disablle handler using the atomic driver
interface.
> @@ -1707,3 +1707,151 @@ backoff:
>   goto retry;
>  }
>  EXPORT_SYMBOL(drm_atomic_helper_page_flip);
> +
> +/**
> + * drm_atomic_helper_crtc_reset - default ->reset hook for CRTCs
> + * @crtc: drm CRTC
> + *
> + * Resets the atomic state for @crtc by freeing the state pointer and
allocating
> + * a new empty state object.
> + */
> +void drm_atomic_helper_crtc_reset(struct drm_crtc *crtc)
> +{
> + kfree(crtc->state);
> + crtc->state = kzalloc(sizeof(*crtc->state), GFP_KERNEL);

This code looks semantically equivalent to a memset() although it may
result in a change to the pointer value. Is this code trying to flush
out uses-after-free?

I can't find this free/alloc pattern in delivered code anywhere else in
the drm code base. Should this need to be replaced with memset() before
merging (or at least commenting)?


> +}
> +EXPORT_SYMBOL(drm_atomic_helper_crtc_reset);
> +
> +/**
> + * drm_atomic_helper_crtc_duplicate_state - default state duplicate hook
> + * @crtc: drm CRTC
> + *
> + * Default CRTC state duplicate hook for drivers which don't have
their own
> + * subclassed CRTC state structure.
> + */
> +struct drm_crtc_state *
> +drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc)
> +{
> + struct drm_crtc_state *state;
> +
> + if (WARN_ON(!crtc->state))
> + return NULL;
> +
> + state = kmemdup(crtc->state, sizeof(*crtc->state), GFP_KERNEL);
> +
> + if (state) {
> + state->mode_changed = false;
> + state->planes_changed = false;
> + state->event = NULL;
> + }
> +
> + return state;
> +}
> +EXPORT_SYMBOL(drm_atomic_helper_crtc_duplicate_state);
> +
> +/**
> + * drm_atomic_helper_crtc_destroy_state - default state destroy hook
> + * @crtc: drm CRTC
> + * @state: CRTC state object to release
> + *
> + * Default CRTC state destroy hook for drivers which don't have their own
> + * subclassed CRTC state structure.
> + */
> +void drm_atomic_helper_crtc_destroy_state(struct drm_crtc *crtc,
> +   struct drm_crtc_state *state)
> +{
> + kfree(state);
> +}
> +EXPORT_SYMBOL(drm_atomic_helper_crtc_destroy_state);
> +
> +/**
> + * drm_atomic_helper_plane_reset - default ->reset hook for planes
> + * @plane: drm plane
> + *
> + * Resets the atomic state for @plane by freeing the state pointer and
> + * allocating a new empty state object.

[Bug 85801] [Mobility Radeon HD 4570] Enabling HDMI monitor fails with kernel versions 3.17/3.16

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=85801

--- Comment #1 from Alex Deucher  ---
Shoudl be fixed in:
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=83d04c39f9048807a8500e575ae3f1718a3f45bb

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[PATCH 00/72] staging imx-drm new features and fixes

[Steve Longerbeam]

On 11/03/2014 06:13 AM, Fabio Estevam wrote:
> On Mon, Nov 3, 2014 at 11:20 AM, Fabio Estevam  wrote:
>> On Mon, Nov 3, 2014 at 11:12 AM, Fabio Estevam  wrote:
>>> Hi Steve,
>>>
>>> On Fri, Oct 31, 2014 at 10:19 PM, Steve Longerbeam
>>>  wrote:
>>>
 Hi Fabio, Yes I forgot to mention that in the cover letter:

 git at github.com:slongerbeam/drm-next.git

 Branch is imx-drm-mentor.
>>> Just tried it here. There were some dtb file build issues and I just
>>> removed the dtb's that caused issues from the Makefile.
>>>
>>> Then I ran the kernel and dtb on a imx6q-sabresd, but no HDMI output
>>> could be seen.
>> Sorry, I was using the wrong kernel. HDMI is fine now.
>>
>> Will run some tests now. Thanks
> Some nice improvements that I could notice: now HDMI is detected
> correctly when used together with LVDS.
>
> Also, the LVDS picture does not go away when I remove the HDMI connector.
>
> However, the Linux penguins are appearing with incorrect colours on
> the LVDS panel of my imx6q-sabresd.

Hi Fabio, which panel? The Hannstar or the 1024x600 Okaya 7"
panel?

I have noticed wrong colors using the Okaya panel as well, and it
is fixed by switching to "jeida" 24-bit interface in the DT (along with
1024x600 res and slightly different timings).

I didn't change to jeida 24-bit for Hannstar in the DT because I am
assuming 18-bit and "spwg" ordering is correct for Hannstar, but
maybe I'm wrong. Try switching to jeida 24-bit to see if the colors
are fixed. If so maybe we need to switch to jeida 24-bit for Hannstar
as well.

For reference here are the ldb node settings/timings that work for
the Okaya panel:

 {
status = "okay";

lvds-channel at 0 {
fsl,data-mapping = "jeida";
fsl,data-width = <24>;
status = "okay";

display-timings {
native-mode = <>;
timing0: nit6x_1024x600 {
clock-frequency = <5120>;
hactive = <1024>;
vactive = <600>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <20>;
vfront-porch = <5>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};

Steve

[PATCH 00/72] staging imx-drm new features and fixes

[Steve Longerbeam]

On 11/03/2014 12:00 PM, Fabio Estevam wrote:
> On Mon, Nov 3, 2014 at 4:59 PM, Steve Longerbeam
>  wrote:
>
>>> Steve, what's the status of getting this driver out of staging?  What is
>>> left to do, and who is doing the work?
>> Hi Greg, you should also talk with the original authors (Sascha and
>> Philipp at Pengutronix), but in my experience, this driver is still suffering
>> from some chronic IPU issues with data starvation to the display interface.
>> So from my experience, that is really the only thing that is holding it up.
> Adding Pengutronix and Russell on Cc.
>
> Care to explain on the " data starvation to the display interface" issue?

Hi Fabio, I was referring to the DI synchronous display errors
(IPUx_INT_STAT_10, bits 19 and 20).

Steve

[Bug 85801] [Mobility Radeon HD 4570] Enabling HDMI monitor fails with kernel versions 3.17/3.16

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=85801

Bug ID: 85801
   Summary: [Mobility Radeon HD 4570] Enabling HDMI monitor fails
with kernel versions 3.17/3.16
   Product: DRI
   Version: unspecified
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: major
  Priority: medium
 Component: DRM/Radeon
  Assignee: dri-devel at lists.freedesktop.org
  Reporter: CE.Mohammad.AlSaleh at gmail.com

Created attachment 108839
  --> https://bugs.freedesktop.org/attachment.cgi?id=108839=edit
dmesg output with the relevant call trace

With kernel version 3.17.2, when I connect my HDMI monitor, it shows up
correctly in xrandr. But when I try to enable it, Xorg freezes and becomes a
zombie process, and the HDMI monitor stays blank. dmesg hints radeon kernel
code is at fault (attached).

Luckily, the system does not completely freeze. I can still connect to the
system through ssh. So I can provide more information if needed.

I remember having similar issues with 3.16 when I tried it. I'm currently using
3.15.5 which does not suffer from this bug.

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[PATCH V7 03/12] drm/bridge: Add helper functions for drm_bridge

[Ajay kumar]

On Mon, Nov 3, 2014 at 1:31 PM, Thierry Reding  
wrote:
> On Fri, Oct 31, 2014 at 04:51:43PM +0100, Daniel Vetter wrote:
>> On Wed, Oct 29, 2014 at 10:14:37AM +0100, Thierry Reding wrote:
>> > On Wed, Oct 29, 2014 at 09:57:02AM +0100, Daniel Vetter wrote:
>> > > That makes the entire thing a bit non-trivial, which is why I think it
>> > > would be better as some generic helper. Which then gets embedded or
>> > > instantiated for specific cases, like dt_panel or dt_bridge.
>> > > Or maybe even acpi_bridge, who knows ;-)
>> >
>> > I worry a little about type safety. How will this generic helper know
>> > what registry to look in for? Or conversely, if all these resources are
>> > added to a single registry how do you know that they're of the correct
>> > type? Failing to ensure this could cause situations where you're asking
>> > for a panel and get a bridge in return because you've wrongly wired it
>> > up in device tree for example.
>> >
>> > But perhaps if both the registry and the device parts are turned into
>> > helpers we could still have a single core implementation and then
>> > instantiate that for each type, something roughly like this:
>> >
>> > struct registry {
>> > struct list_head list;
>> > struct mutex lock;
>> > };
>> >
>> > struct registry_record {
>> > struct list_head list;
>> > struct module *owner;
>> > struct kref *ref;
>> >
>> > struct device *dev;
>> > };
>> >
>> > int registry_add(struct registry *registry, struct registry_record 
>> > *record)
>> > {
>> > ...
>> > try_module_get(record->owner);
>> > ...
>> > }
>> >
>> > struct registry_record *registry_find_by_of_node(struct registry 
>> > *registry,
>> >  struct device_node 
>> > *np)
>> > {
>> > ...
>> > kref_get(...);
>> > ...
>> > }
>> >
>> > That way it should be possible to embed these into other structures,
>> > like so:
>> >
>> > struct drm_panel {
>> > struct registry_record record;
>> > ...
>> > };
>> >
>> > static struct registry drm_panels;
>> >
>> > int drm_panel_add(struct drm_panel *panel)
>> > {
>> > return registry_add(_panels, >record);
>> > }
>> >
>> > struct drm_panel *of_drm_panel_find(struct device_node *np)
>> > {
>> > struct registry_record *record;
>> >
>> > record = registry_find_by_of_node(_panels, np);
>> >
>> > return container_of(record, struct drm_panel, record);
>> > }
>> >
>> > Is that what you had in mind?
>>
>> Yeah I've thought that we should instantiate using macros even, so that we
>> have per-type registries. So you'd smash the usual set of
>> DECLARE/DEFINE_AUX_DEV_REGISTRY into headers/source files, and they'd take
>> a (name, key, value) tripled. For the example here(of_drm_panel, struct
>> device_node *, struct drm_panel *) or similar. I might be hand-waving over
>> a few too many details though ;-)
>
> Okay, I'll take a stab at this and see if I can convert DRM panel to it.
It would be great if you can do this soon. I would anyhow need a reference
for converting bridge framework as per Daniel's requirement :)

Ajay

[PATCH 06/17] drm/tegra: dc: Add missing call to drm_vblank_on()

[Sean Paul]

On Mon, Nov 3, 2014 at 4:27 AM, Thierry Reding  
wrote:
> From: Thierry Reding 
>
> When the CRTC is enabled, make sure the VBLANK machinery is enabled.
> Failure to do so will cause drm_vblank_get() to not enable the VBLANK on
> the CRTC and VBLANK-synchronized page-flips won't work.
>
> While at it, get rid of the legacy drm_vblank_pre_modeset() and
> drm_vblank_post_modeset() calls that are replaced by drm_vblank_on()
> and drm_vblank_off().
>
> Reported-by: Alexandre Courbot 
> Signed-off-by: Thierry Reding 
> ---
>  drivers/gpu/drm/tegra/dc.c | 7 ++-
>  1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> index 4a015232e2e8..4da366a4d78a 100644
> --- a/drivers/gpu/drm/tegra/dc.c
> +++ b/drivers/gpu/drm/tegra/dc.c
> @@ -739,7 +739,6 @@ static const struct drm_crtc_funcs tegra_crtc_funcs = {
>
>  static void tegra_crtc_disable(struct drm_crtc *crtc)
>  {
> -   struct tegra_dc *dc = to_tegra_dc(crtc);
> struct drm_device *drm = crtc->dev;
> struct drm_plane *plane;
>
> @@ -755,7 +754,7 @@ static void tegra_crtc_disable(struct drm_crtc *crtc)
> }
> }
>
> -   drm_vblank_off(drm, dc->pipe);
> +   drm_crtc_vblank_off(crtc);
>  }
>
>  static bool tegra_crtc_mode_fixup(struct drm_crtc *crtc,
> @@ -844,8 +843,6 @@ static int tegra_crtc_mode_set(struct drm_crtc *crtc,
> u32 value;
> int err;
>
> -   drm_vblank_pre_modeset(crtc->dev, dc->pipe);
> -

Should you replace this with a call to drm_crtc_vblank_off in
prepare()? AFAICT, crtc_funcs->disable() isn't guaranteed to be called
before modeset, and it's unclear to me whether the vblank counter will
be reset in prepare.

Sean



> err = tegra_crtc_setup_clk(crtc, mode);
> if (err) {
> dev_err(dc->dev, "failed to setup clock for CRTC: %d\n", err);
> @@ -946,7 +943,7 @@ static void tegra_crtc_commit(struct drm_crtc *crtc)
> value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
> tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
>
> -   drm_vblank_post_modeset(crtc->dev, dc->pipe);
> +   drm_crtc_vblank_on(crtc);
>  }
>
>  static void tegra_crtc_load_lut(struct drm_crtc *crtc)
> --
> 2.1.2
>

[PATCH 03/72] ARM: dts: imx6qdl: Create imx-drm crtc nodes

[Philipp Zabel]

Hi Steve,

Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
> Create imx-drm crtc device nodes. Each crtc node requires the following
> parameters:
> 
> - parent ipu phandle.
> - di number.
> - port endpoints.
[...]

the crtcs do not belong in the device tree. Currently the crtcs are each
fixed to one of the DIs (the DIs are is what the two IPU output ports in
the device tree describe), but that could be changed, dynamically, with
each modeset.

regards
Philipp

[PATCH 07/72] gpu: ipu-v3: Add ipu_dp_set_chroma_key()

[Philipp Zabel]

Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
> Adds the function ipu_dp_set_chroma_key(), which sets up a color key
> value for a DP foreground plane.
> 
> ipu_dp_set_chroma_key() accepts a color key value in RGB24 format.
> If the combiner unit colorspace is YUV, the key must be converted
> to YUV444, using the same CSC coefficients as programmed in the DP.
> So pull out the CSC coefficients from ipu_dp_csc_init() to make
> them available to rgb24_to_yuv444() that converts to color key.

What is the rationale to disallow specifying the color key in YUV?
Regardless of the new feature, I like the move to static const
coefficient tables. Maybe split that into two patches?

regards
Philipp

> Signed-off-by: Steve Longerbeam 
> ---
>  drivers/gpu/ipu-v3/ipu-dp.c |  121 
> ---
>  include/video/imx-ipu-v3.h  |1 +
>  2 files changed, 103 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/ipu-v3/ipu-dp.c b/drivers/gpu/ipu-v3/ipu-dp.c
> index 98686ed..e4026f1 100644
> --- a/drivers/gpu/ipu-v3/ipu-dp.c
> +++ b/drivers/gpu/ipu-v3/ipu-dp.c
> @@ -84,6 +84,52 @@ static inline struct ipu_flow *to_flow(struct ipu_dp *dp)
>   return container_of(dp, struct ipu_flow, background);
>  }
>  
> +static const int rgb2yuv_coeff[5][3] = {
> + { 0x0099, 0x012d, 0x003a },
> + { 0x03a9, 0x0356, 0x0100 },
> + { 0x0100, 0x0329, 0x03d6 },
> + { 0x, 0x0200, 0x0200 }, /* B0, B1, B2 */
> + { 0x2,0x2,0x2 },/* S0, S1, S2 */
> +};
> +
> +static const int yuv2rgb_coeff[5][3] = {
> + { 0x0095, 0x, 0x00cc },
> + { 0x0095, 0x03ce, 0x0398 },
> + { 0x0095, 0x00ff, 0x },
> + { 0x3e42, 0x010a, 0x3dd6 }, /* B0,B1,B2 */
> + { 0x1,0x1,0x1 },/* S0,S1,S2 */
> +};
> +
> +/*
> + * This is used to convert an RGB24 color key to YUV444, using
> + * the same CSC coefficients as programmed in the DP.
> + */
> +static u32 rgb24_to_yuv444(u32 rgb24)
> +{
> + u32 red, green, blue;
> + int i, c[3];
> +
> + red   = (rgb24 >> 16) & 0xff;
> + green = (rgb24 >>  8) & 0xff;
> + blue  = (rgb24 >>  0) & 0xff;
> +
> + for (i = 0; i < 3; i++) {
> + c[i] = red * rgb2yuv_coeff[i][0];
> + c[i] += green * rgb2yuv_coeff[i][1];
> + c[i] += blue * rgb2yuv_coeff[i][2];
> + c[i] /= 16;
> + c[i] += rgb2yuv_coeff[3][i] * 4;
> + c[i] += 8;
> + c[i] /= 16;
> + if (c[i] < 0)
> + c[i] = 0;
> + if (c[i] > 255)
> + c[i] = 255;
> + }
> +
> + return (c[0] << 16) | (c[1] << 8) | c[2];
> +}
> +
>  int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable,
>   u8 alpha, bool bg_chan)
>  {
> @@ -120,6 +166,48 @@ int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool 
> enable,
>  }
>  EXPORT_SYMBOL_GPL(ipu_dp_set_global_alpha);
>  
> +/*
> + * The input color_key must always be RGB24. It will be converted to
> + * YUV444 if the pixel format to the Combining unit is YUV space.
> + */
> +int ipu_dp_set_chroma_key(struct ipu_dp *dp, bool enable, u32 color_key)
> +{
> + struct ipu_flow *flow = to_flow(dp);
> + struct ipu_dp_priv *priv = flow->priv;
> + enum ipu_color_space combiner_cs;
> + u32 reg;
> +
> + mutex_lock(>mutex);
> +
> + if (flow->foreground.in_cs == flow->background.in_cs)
> + combiner_cs = flow->foreground.in_cs;
> + else
> + combiner_cs = flow->out_cs;
> +
> + if (combiner_cs == IPUV3_COLORSPACE_YUV)
> + color_key = rgb24_to_yuv444(color_key);
> +
> + color_key &= 0x00ff;
> +
> + if (enable) {
> + reg = readl(flow->base + DP_GRAPH_WIND_CTRL) & ~0x00FFL;
> + writel(reg | color_key, flow->base + DP_GRAPH_WIND_CTRL);
> +
> + reg = readl(flow->base + DP_COM_CONF);
> + writel(reg | DP_COM_CONF_GWCKE, flow->base + DP_COM_CONF);
> + } else {
> + reg = readl(flow->base + DP_COM_CONF);
> + writel(reg & ~DP_COM_CONF_GWCKE, flow->base + DP_COM_CONF);
> + }
> +
> + ipu_srm_dp_sync_update(priv->ipu);
> +
> + mutex_unlock(>mutex);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(ipu_dp_set_chroma_key);
> +
>  int ipu_dp_set_window_pos(struct ipu_dp *dp, u16 x_pos, u16 y_pos)
>  {
>   struct ipu_flow *flow = to_flow(dp);
> @@ -138,6 +226,7 @@ static void ipu_dp_csc_init(struct ipu_flow *flow,
>   enum ipu_color_space out,
>   u32 place)
>  {
> + const int (*c)[3];
>   u32 reg;
>  
>   reg = readl(flow->base + DP_COM_CONF);
> @@ -148,25 +237,19 @@ static void ipu_dp_csc_init(struct ipu_flow *flow,
>   return;
>   }
>  
> - if (in == IPUV3_COLORSPACE_RGB && out == IPUV3_COLORSPACE_YUV) {
> - writel(0x099 | (0x12d << 16), flow->base + DP_CSC_A_0);
> - writel(0x03a | (0x3a9 << 16), flow->base + DP_CSC_A_1);
> - 

[PATCH 06/72] gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()

[Philipp Zabel]

Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
> Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets.
> 
> Signed-off-by: Steve Longerbeam 
> ---
>  drivers/gpu/ipu-v3/ipu-cpmem.c |7 +++
>  include/video/imx-ipu-v3.h |1 +
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
> index 3bf05bc..2c93e9c 100644
> --- a/drivers/gpu/ipu-v3/ipu-cpmem.c
> +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
> @@ -253,6 +253,13 @@ void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int 
> bufnum, dma_addr_t buf)
>  }
>  EXPORT_SYMBOL_GPL(ipu_cpmem_set_buffer);
>  
> +void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off)
> +{
> + ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_off / 8);
> + ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_off / 8);
> +}
> +EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset);
> +
>  void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride)
>  {
>   ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1);
> diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
> index c74bf4a..03cda50 100644
> --- a/include/video/imx-ipu-v3.h
> +++ b/include/video/imx-ipu-v3.h
> @@ -195,6 +195,7 @@ void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, 
> int xres, int yres);
>  void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride);
>  void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
>  void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t 
> buf);
> +void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off);
>  void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride);
>  void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id);
>  void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize);

Looks good to me, just where this be used where
ipu_cpmem_set_yuv_planar_full can not?

regards
Philipp

[PATCH 04/72] ARM: i.MX6: use pll2_pfd0_352m as clock root of ipu_di

[Philipp Zabel]

Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
> AS pll5_video_div has already been used as clock root for ldb_di,
> so use pll2_pfd0_352m as clock root of ipu_di for HDMI.
> 
> Signed-off-by: Jiada Wang 
> Signed-off-by: Steve Longerbeam 

What about devices that don't use LVDS? It would be nice to let them use
PLL5 for HDMI.

> ---
>  arch/arm/mach-imx/clk-imx6q.c |8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> index 4e79da7..86b58fc 100644
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -483,10 +483,10 @@ static void __init imx6q_clocks_init(struct device_node 
> *ccm_node)
>   clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], 
> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>   }
>  
> - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
> - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
> - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
> - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
> + clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
> + clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
> + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
> + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
>   clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], 
> clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
>   clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], 
> clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
>   clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], 
> clk[IMX6QDL_CLK_IPU2_DI0_PRE]);

regards
Philipp

[PATCH 05/72] ARM: i.MX6: select pll3_usb_otg for ldb_di for rev 1.0 chip

[Philipp Zabel]

Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
> Select pll3_usb_otg for ldb_di clock for rev 1.0 chips.
> 
> Signed-off-by: Jiada Wang 
> Signed-off-by: Steve Longerbeam 
> ---
>  arch/arm/mach-imx/clk-imx6q.c |3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> index 86b58fc..68064a6 100644
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -481,6 +481,9 @@ static void __init imx6q_clocks_init(struct device_node 
> *ccm_node)
>   cpu_is_imx6dl()) {
>   clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], 
> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>   clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], 
> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
> + } else {
> + clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], 
> clk[IMX6QDL_CLK_PLL3_USB_OTG]);
> + clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], 
> clk[IMX6QDL_CLK_PLL3_USB_OTG]);
>   }
>  
>   clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], 
> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);

Does the issue with the LDB DI mux glitch locking up the LDB DI divider
also affect rev 1.0 silicon?
(http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/268864.html)

We probably shouldn't touch LDB_DIx_SEL here for the other revisions
either. In any case, this would be a patch for the linux-arm-kernel
mailing list.

regards
Philipp

[PATCH v2 04/17] drm/tegra: dsi: Add ganged mode support

[Sean Paul]

On Mon, Nov 3, 2014 at 4:27 AM, Thierry Reding  
wrote:
> From: Thierry Reding 
>
> Implement ganged mode support for the Tegra DSI driver. The DSI host
> controller to gang up with is specified via a phandle in the device tree
> and the resolved DSI host controller used for the programming of the
> ganged-mode registers.
>

There's a lot in here that is not specifically ganging-support, such
as adding the transfer callback and command mode, as well as pulling
out functionality into helper functions. It might make things a little
clearer to split this up into a few patches. I'll leave that up to
you.

At any rate, aside from the tiny nit I picked below (which you can
feel free to ignore),

Reviewed-by: Sean Paul 



> Signed-off-by: Thierry Reding 
> ---
> Changes in v2:
> - keep track of the number of bytes transferred to/from peripheral
> - use newly introduced mipi_dsi_create_packet()
> - extract FIFO write into separate function
>
>  .../bindings/gpu/nvidia,tegra20-host1x.txt |   2 +
>  drivers/gpu/drm/tegra/dsi.c| 792 
> ++---
>  drivers/gpu/drm/tegra/dsi.h|  14 +-
>  3 files changed, 691 insertions(+), 117 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt 
> b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
> index b48f4ef31d93..4c32ef0b7db8 100644
> --- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
> +++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
> @@ -191,6 +191,8 @@ of the following host1x client modules:
>- nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
>- nvidia,edid: supplies a binary EDID blob
>- nvidia,panel: phandle of a display panel
> +  - nvidia,ganged-mode: contains a phandle to a second DSI controller to gang
> +up with in order to support up to 8 data lanes
>
>  - sor: serial output resource
>
> diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
> index 584b771d8b2f..8940360ccc9c 100644
> --- a/drivers/gpu/drm/tegra/dsi.c
> +++ b/drivers/gpu/drm/tegra/dsi.c
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>
> @@ -54,6 +55,10 @@ struct tegra_dsi {
>
> unsigned int video_fifo_depth;
> unsigned int host_fifo_depth;
> +
> +   /* for ganged-mode support */
> +   struct tegra_dsi *master;
> +   struct tegra_dsi *slave;
>  };
>
>  static inline struct tegra_dsi *
> @@ -318,6 +323,21 @@ static const u32 
> pkt_seq_video_non_burst_sync_events[NUM_PKT_SEQ] = {
> [11] = PKT_ID0(MIPI_DSI_BLANKING_PACKET) | PKT_LEN0(4),
>  };
>
> +static const u32 pkt_seq_command_mode[NUM_PKT_SEQ] = {
> +   [ 0] = 0,
> +   [ 1] = 0,
> +   [ 2] = 0,
> +   [ 3] = 0,
> +   [ 4] = 0,
> +   [ 5] = 0,
> +   [ 6] = PKT_ID0(MIPI_DSI_DCS_LONG_WRITE) | PKT_LEN0(3) | PKT_LP,
> +   [ 7] = 0,
> +   [ 8] = 0,
> +   [ 9] = 0,
> +   [10] = PKT_ID0(MIPI_DSI_DCS_LONG_WRITE) | PKT_LEN0(5) | PKT_LP,
> +   [11] = 0,
> +};
> +
>  static int tegra_dsi_set_phy_timing(struct tegra_dsi *dsi)
>  {
> struct mipi_dphy_timing timing;
> @@ -329,7 +349,7 @@ static int tegra_dsi_set_phy_timing(struct tegra_dsi *dsi)
> if (rate < 0)
> return rate;
>
> -   period = DIV_ROUND_CLOSEST(10UL, rate * 2);
> +   period = DIV_ROUND_CLOSEST(NSEC_PER_SEC, rate * 2);
>
> err = mipi_dphy_timing_get_default(, period);
> if (err < 0)
> @@ -426,26 +446,59 @@ static int tegra_dsi_get_format(enum 
> mipi_dsi_pixel_format format,
> return 0;
>  }
>
> -static int tegra_output_dsi_enable(struct tegra_output *output)
> +static void tegra_dsi_ganged_enable(struct tegra_dsi *dsi, unsigned int 
> start,
> +   unsigned int size)
> +{
> +   u32 value;
> +
> +   tegra_dsi_writel(dsi, start, DSI_GANGED_MODE_START);
> +   tegra_dsi_writel(dsi, size << 16 | size, DSI_GANGED_MODE_SIZE);

You might want to add "size = size & 0x;" before performing this write.

> +
> +   value = DSI_GANGED_MODE_CONTROL_ENABLE;
> +   tegra_dsi_writel(dsi, value, DSI_GANGED_MODE_CONTROL);
> +}
> +
> +static void tegra_dsi_enable(struct tegra_dsi *dsi)
> +{
> +   u32 value;
> +
> +   value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);
> +   value |= DSI_POWER_CONTROL_ENABLE;
> +   tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);
> +
> +   if (dsi->slave)
> +   tegra_dsi_enable(dsi->slave);
> +}
> +
> +static unsigned int tegra_dsi_get_lanes(struct tegra_dsi *dsi)
> +{
> +   if (dsi->master)
> +   return dsi->master->lanes + dsi->lanes;
> +
> +   if (dsi->slave)
> +   return dsi->lanes + dsi->slave->lanes;
> +
> +   return dsi->lanes;
> +}
> +
> +static int tegra_dsi_configure(struct tegra_dsi *dsi, unsigned int pipe,
> +  const 

[PATCH v4 16/16] drm/panel: Add Sharp LQ101R1SX01 support

[Sean Paul]

On Mon, Nov 3, 2014 at 4:13 AM, Thierry Reding  
wrote:
> From: Thierry Reding 
>
> This panel requires dual-channel mode. The device accepts command-mode
> data on 8 lanes and will therefore need a dual-channel DSI controller.
> The two interfaces that make up this device need to be instantiated in
> the controllers that gang up to provide the dual-channel DSI host.
>
> Signed-off-by: Thierry Reding 


Aside from the ENODATA nit I picked in patch 13, feel free to add my
R-b to all of the patches in this set.

Reviewed-by: Sean Paul 



> ---
> Changes in v4:
> - use low power mode since highspeed message transfers don't work
> - clarify required and optional properties for both DSI links
> - power off panel when .prepare() fails
> - properly drop reference to DSI-LINK2
> - don't allocate memory for DSI-LINK2
> - propagate errors on failure
>
>  .../bindings/panel/sharp,lq101r1sx01.txt   |  49 +++
>  drivers/gpu/drm/panel/Kconfig  |  13 +
>  drivers/gpu/drm/panel/Makefile |   1 +
>  drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c| 464 
> +
>  4 files changed, 527 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt
>  create mode 100644 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
>
> diff --git a/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt 
> b/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt
> new file mode 100644
> index ..f522bb8e47e1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt
> @@ -0,0 +1,49 @@
> +Sharp Microelectronics 10.1" WQXGA TFT LCD panel
> +
> +This panel requires a dual-channel DSI host to operate. It supports two 
> modes:
> +- left-right: each channel drives the left or right half of the screen
> +- even-odd: each channel drives the even or odd lines of the screen
> +
> +Each of the DSI channels controls a separate DSI peripheral. The peripheral
> +driven by the first link (DSI-LINK1), left or even, is considered the primary
> +peripheral and controls the device. The 'link2' property contains a phandle
> +to the peripheral driven by the second link (DSI-LINK2, right or odd).
> +
> +Note that in video mode the DSI-LINK1 interface always provides the left/even
> +pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
> +is possible to program either link to drive the left/even or right/odd pixels
> +but for the sake of consistency this binding assumes that the same assignment
> +is chosen as for video mode.
> +
> +Required properties:
> +- compatible: should be "sharp,lq101r1sx01"
> +- reg: DSI virtual channel of the peripheral
> +
> +Required properties (for DSI-LINK1 only):
> +- link2: phandle to the DSI peripheral on the secondary link. Note that the
> +  presence of this property marks the containing node as DSI-LINK1.
> +- power-supply: phandle of the regulator that provides the supply voltage
> +
> +Optional properties (for DSI-LINK1 only):
> +- backlight: phandle of the backlight device attached to the panel
> +
> +Example:
> +
> +   dsi at 5430 {
> +   panel: panel at 0 {
> +   compatible = "sharp,lq101r1sx01";
> +   reg = <0>;
> +
> +   link2 = <>;
> +
> +   power-supply = <...>;
> +   backlight = <...>;
> +   };
> +   };
> +
> +   dsi at 5440 {
> +   secondary: panel at 0 {
> +   compatible = "sharp,lq101r1sx01";
> +   reg = <0>;
> +   };
> +   };
> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
> index bee9f72b3a93..024e98ef8e4d 100644
> --- a/drivers/gpu/drm/panel/Kconfig
> +++ b/drivers/gpu/drm/panel/Kconfig
> @@ -27,4 +27,17 @@ config DRM_PANEL_S6E8AA0
> select DRM_MIPI_DSI
> select VIDEOMODE_HELPERS
>
> +config DRM_PANEL_SHARP_LQ101R1SX01
> +   tristate "Sharp LQ101R1SX01 panel"
> +   depends on OF
> +   depends on DRM_MIPI_DSI
> +   help
> + Say Y here if you want to enable support for Sharp LQ101R1SX01
> + TFT-LCD modules. The panel has a 2560x1600 resolution and uses
> + 24 bit RGB per pixel. It provides a dual MIPI DSI interface to
> + the host and has a built-in LED backlight.
> +
> + To compile this driver as a module, choose M here: the module
> + will be called panel-sharp-lq101r1sx01.
> +
>  endmenu
> diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
> index 8b929212fad7..4b2a0430804b 100644
> --- a/drivers/gpu/drm/panel/Makefile
> +++ b/drivers/gpu/drm/panel/Makefile
> @@ -1,3 +1,4 @@
>  obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
>  obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o
>  obj-$(CONFIG_DRM_PANEL_S6E8AA0) += panel-s6e8aa0.o
> +obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += 

[PATCH 03/17] drm/tegra: dsi: Make FIFO depths host parameters

[Sean Paul]

On Mon, Nov 3, 2014 at 4:27 AM, Thierry Reding  
wrote:
> From: Thierry Reding 
>
> Rather than hardcoding them as macros, make the host and video FIFO
> depths parameters so that they can be more easily adjusted if a new
> generation of the Tegra SoC changes them.
>
> Signed-off-by: Thierry Reding 
> ---
>  drivers/gpu/drm/tegra/dsi.c | 10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
> index f7874458926a..584b771d8b2f 100644
> --- a/drivers/gpu/drm/tegra/dsi.c
> +++ b/drivers/gpu/drm/tegra/dsi.c
> @@ -26,9 +26,6 @@
>  #include "dsi.h"
>  #include "mipi-phy.h"
>
> -#define DSI_VIDEO_FIFO_DEPTH (1920 / 4)
> -#define DSI_HOST_FIFO_DEPTH 64
> -
>  struct tegra_dsi {
> struct host1x_client client;
> struct tegra_output output;
> @@ -54,6 +51,9 @@ struct tegra_dsi {
>
> struct regulator *vdd;
> bool enabled;
> +
> +   unsigned int video_fifo_depth;
> +   unsigned int host_fifo_depth;
>  };
>
>  static inline struct tegra_dsi *
> @@ -467,7 +467,7 @@ static int tegra_output_dsi_enable(struct tegra_output 
> *output)
> DSI_CONTROL_SOURCE(dc->pipe);
> tegra_dsi_writel(dsi, value, DSI_CONTROL);
>
> -   tegra_dsi_writel(dsi, DSI_VIDEO_FIFO_DEPTH, DSI_MAX_THRESHOLD);
> +   tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD);
>
> value = DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS |
> DSI_HOST_CONTROL_ECC;
> @@ -843,6 +843,8 @@ static int tegra_dsi_probe(struct platform_device *pdev)
> return -ENOMEM;
>
> dsi->output.dev = dsi->dev = >dev;
> +   dsi->video_fifo_depth = 1920;

This is not functionally equivalent to what was previously being set
(1920/4). Perhaps calling that out in the commit message might be
appropriate?

Sean

> +   dsi->host_fifo_depth = 64;
>
> err = tegra_output_probe(>output);
> if (err < 0)
> --
> 2.1.2
>

[PATCH 02/17] drm/tegra: Do not enable output on .mode_set()

[Sean Paul]

On Mon, Nov 3, 2014 at 4:27 AM, Thierry Reding  
wrote:
> From: Thierry Reding 
>
> The output is already enabled in .dpms(), doing it in .mode_set() too
> can cause noticeable flicker.
>

I think this should be coupled with "drm/tegra: DPMS off/on in encoder
prepare/commit" that I sent earlier this week. Without it, the driver
can get into a state where connector status is on, but the output is
disabled.

Sean


> Signed-off-by: Thierry Reding 
> ---
>  drivers/gpu/drm/tegra/output.c | 6 --
>  1 file changed, 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/tegra/output.c b/drivers/gpu/drm/tegra/output.c
> index 0c67d7eebc94..6b393cfbb5e7 100644
> --- a/drivers/gpu/drm/tegra/output.c
> +++ b/drivers/gpu/drm/tegra/output.c
> @@ -167,12 +167,6 @@ static void tegra_encoder_mode_set(struct drm_encoder 
> *encoder,
>struct drm_display_mode *mode,
>struct drm_display_mode *adjusted)
>  {
> -   struct tegra_output *output = encoder_to_output(encoder);
> -   int err;
> -
> -   err = tegra_output_enable(output);
> -   if (err < 0)
> -   dev_err(encoder->dev->dev, "tegra_output_enable(): %d\n", 
> err);
>  }
>
>  static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
> --
> 2.1.2
>

[PATCH 01/17] drm/tegra: dc: Add powergate support

[Sean Paul]

On Mon, Nov 3, 2014 at 4:27 AM, Thierry Reding  
wrote:
> From: Thierry Reding 
>
> Both display controllers are in their own power partition. Currently the
> driver relies on the assumption that these partitions are on (which is
> the hardware default). However some bootloaders may disable them, so the
> driver must make sure to turn them back on to avoid hangs.
>

A bug in our firmware caused the host1x block to be in a bad state on
boot such that we had to pulse the reset control in kernel probe to
recover. I'm not sure how paranoid you want to be here, but something
to keep in mind.

Sean


> Signed-off-by: Thierry Reding 
> ---
>  drivers/gpu/drm/tegra/dc.c  | 45 
> ++---
>  drivers/gpu/drm/tegra/drm.h |  1 +
>  2 files changed, 43 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> index 6553fd238685..4a015232e2e8 100644
> --- a/drivers/gpu/drm/tegra/dc.c
> +++ b/drivers/gpu/drm/tegra/dc.c
> @@ -11,6 +11,8 @@
>  #include 
>  #include 
>
> +#include 
> +
>  #include "dc.h"
>  #include "drm.h"
>  #include "gem.h"
> @@ -20,6 +22,7 @@ struct tegra_dc_soc_info {
> bool supports_cursor;
> bool supports_block_linear;
> unsigned int pitch_align;
> +   bool has_powergate;
>  };
>
>  struct tegra_plane {
> @@ -1357,6 +1360,7 @@ static const struct tegra_dc_soc_info 
> tegra20_dc_soc_info = {
> .supports_cursor = false,
> .supports_block_linear = false,
> .pitch_align = 8,
> +   .has_powergate = false,
>  };
>
>  static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
> @@ -1364,6 +1368,7 @@ static const struct tegra_dc_soc_info 
> tegra30_dc_soc_info = {
> .supports_cursor = false,
> .supports_block_linear = false,
> .pitch_align = 8,
> +   .has_powergate = false,
>  };
>
>  static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
> @@ -1371,6 +1376,7 @@ static const struct tegra_dc_soc_info 
> tegra114_dc_soc_info = {
> .supports_cursor = false,
> .supports_block_linear = false,
> .pitch_align = 64,
> +   .has_powergate = true,
>  };
>
>  static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
> @@ -1378,6 +1384,7 @@ static const struct tegra_dc_soc_info 
> tegra124_dc_soc_info = {
> .supports_cursor = true,
> .supports_block_linear = true,
> .pitch_align = 64,
> +   .has_powergate = true,
>  };
>
>  static const struct of_device_id tegra_dc_of_match[] = {
> @@ -1385,6 +1392,9 @@ static const struct of_device_id tegra_dc_of_match[] = {
> .compatible = "nvidia,tegra124-dc",
> .data = _dc_soc_info,
> }, {
> +   .compatible = "nvidia,tegra114-dc",
> +   .data = _dc_soc_info,
> +   }, {
> .compatible = "nvidia,tegra30-dc",
> .data = _dc_soc_info,
> }, {
> @@ -1467,9 +1477,34 @@ static int tegra_dc_probe(struct platform_device *pdev)
> return PTR_ERR(dc->rst);
> }
>
> -   err = clk_prepare_enable(dc->clk);
> -   if (err < 0)
> -   return err;
> +   if (dc->soc->has_powergate) {
> +   if (dc->pipe == 0)
> +   dc->powergate = TEGRA_POWERGATE_DIS;
> +   else
> +   dc->powergate = TEGRA_POWERGATE_DISB;
> +
> +   err = tegra_powergate_sequence_power_up(dc->powergate, 
> dc->clk,
> +   dc->rst);
> +   if (err < 0) {
> +   dev_err(>dev, "failed to power partition: %d\n",
> +   err);
> +   return err;
> +   }
> +   } else {
> +   err = clk_prepare_enable(dc->clk);
> +   if (err < 0) {
> +   dev_err(>dev, "failed to enable clock: %d\n",
> +   err);
> +   return err;
> +   }
> +
> +   err = reset_control_deassert(dc->rst);
> +   if (err < 0) {
> +   dev_err(>dev, "failed to deassert reset: %d\n",
> +   err);
> +   return err;
> +   }
> +   }
>
> regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> dc->regs = devm_ioremap_resource(>dev, regs);
> @@ -1523,6 +1558,10 @@ static int tegra_dc_remove(struct platform_device 
> *pdev)
> }
>
> reset_control_assert(dc->rst);
> +
> +   if (dc->soc->has_powergate)
> +   tegra_powergate_power_off(dc->powergate);
> +
> clk_disable_unprepare(dc->clk);
>
> return 0;
> diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
> index e89c70fa82d5..b994c017971d 100644
> --- a/drivers/gpu/drm/tegra/drm.h
> +++ b/drivers/gpu/drm/tegra/drm.h
> @@ -101,6 +101,7 @@ struct tegra_dc {
>  

[PATCH 00/72] staging imx-drm new features and fixes

[Fabio Estevam]

On Mon, Nov 3, 2014 at 11:20 AM, Fabio Estevam  wrote:
> On Mon, Nov 3, 2014 at 11:12 AM, Fabio Estevam  wrote:
>> Hi Steve,
>>
>> On Fri, Oct 31, 2014 at 10:19 PM, Steve Longerbeam
>>  wrote:
>>
>>> Hi Fabio, Yes I forgot to mention that in the cover letter:
>>>
>>> git at github.com:slongerbeam/drm-next.git
>>>
>>> Branch is imx-drm-mentor.
>>
>> Just tried it here. There were some dtb file build issues and I just
>> removed the dtb's that caused issues from the Makefile.
>>
>> Then I ran the kernel and dtb on a imx6q-sabresd, but no HDMI output
>> could be seen.
>
> Sorry, I was using the wrong kernel. HDMI is fine now.
>
> Will run some tests now. Thanks

Some nice improvements that I could notice: now HDMI is detected
correctly when used together with LVDS.

Also, the LVDS picture does not go away when I remove the HDMI connector.

However, the Linux penguins are appearing with incorrect colours on
the LVDS panel of my imx6q-sabresd.

Thanks

[PATCH v4 13/16] drm/dsi: Implement DCS {get, set}_pixel_format commands

[Sean Paul]

On Mon, Nov 3, 2014 at 4:13 AM, Thierry Reding  
wrote:
> From: Thierry Reding 
>
> Provide small convenience wrappers to query or set the pixel format used
> by the interface.
>
> Signed-off-by: Thierry Reding 
> ---
>  drivers/gpu/drm/drm_mipi_dsi.c | 42 
> ++
>  include/drm/drm_mipi_dsi.h |  2 ++
>  2 files changed, 44 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
> index da34469b9b98..226822a44457 100644
> --- a/drivers/gpu/drm/drm_mipi_dsi.c
> +++ b/drivers/gpu/drm/drm_mipi_dsi.c
> @@ -553,6 +553,27 @@ int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device 
> *dsi, u8 *mode)
>  EXPORT_SYMBOL(mipi_dsi_dcs_get_power_mode);
>
>  /**
> + * mipi_dsi_dcs_get_pixel_format() - gets the pixel format for the RGB image
> + *data used by the interface
> + * @dsi: DSI peripheral device
> + * @format: return location for the pixel format
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> +int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format)
> +{
> +   ssize_t err;
> +
> +   err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_PIXEL_FORMAT, format,
> +   sizeof(*format));
> +   if (err < 0)
> +   return err;

This should probably return -ENODATA when err != sizeof(*format), like
the previous patch did.

It might be worth moving that logic into mipi_dsi_dcs_read, assuming
we're not interested in partial data.

Sean



> +
> +   return 0;
> +}
> +EXPORT_SYMBOL(mipi_dsi_dcs_get_pixel_format);
> +
> +/**
>   * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside 
> the
>   *display module except interface communication
>   * @dsi: DSI peripheral device
> @@ -670,6 +691,27 @@ int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
>  }
>  EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_on);
>
> +/**
> + * mipi_dsi_dcs_set_pixel_format() - sets the pixel format for the RGB image
> + *data used by the interface
> + * @dsi: DSI peripheral device
> + * @format: pixel format
> + *
> + * Return: 0 on success or a negative error code on failure.
> + */
> +int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format)
> +{
> +   ssize_t err;
> +
> +   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PIXEL_FORMAT, ,
> +sizeof(format));
> +   if (err < 0)
> +   return err;
> +
> +   return 0;
> +}
> +EXPORT_SYMBOL(mipi_dsi_dcs_set_pixel_format);
> +
>  static int mipi_dsi_drv_probe(struct device *dev)
>  {
> struct mipi_dsi_driver *drv = to_mipi_dsi_driver(dev->driver);
> diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
> index 4cbf8e658a3a..415d01f90086 100644
> --- a/include/drm/drm_mipi_dsi.h
> +++ b/include/drm/drm_mipi_dsi.h
> @@ -197,6 +197,7 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 
> cmd, void *data,
>  int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
>  int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
>  int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
> +int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
>  int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
>  int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
>  int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
> @@ -204,6 +205,7 @@ int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device 
> *dsi);
>  int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
>  int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
>  enum mipi_dsi_dcs_tear_mode mode);
> +int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);
>
>  /**
>   * struct mipi_dsi_driver - DSI driver
> --
> 2.1.2
>

[PATCH v2 1/5] video: move mediabus format definition to a more standard place

[Boris Brezillon]

Hi Laurent,

On Wed, 01 Oct 2014 00:00:50 +0300
Laurent Pinchart  wrote:

> Hi Boris,
> 
> On Tuesday 30 September 2014 11:44:23 Boris Brezillon wrote:
> > On Tue, 30 Sep 2014 10:39:53 +0200 Thierry Reding wrote:
> > > On Tue, Sep 30, 2014 at 09:37:57AM +0200, Boris Brezillon wrote:
> > >> On Mon, 29 Sep 2014 23:41:09 +0300 Laurent Pinchart wrote:
> > >
> > > [...]
> > > 
> > >>> Incidentally, patch 2/5 in this series is missing a documentation
> > >>> update ;-)
> > >>
> > >> Yep, regarding this patch, I wonder if it's really necessary to add
> > >> new formats to the v4l2_mbus_pixelcode enum.
> > >> If we want to move to this new common definition (across the video
> > >> related subsytems), we should deprecate the old enum
> > >> v4l2_mbus_pixelcode, and this start by not adding new formats, don't
> > >> you think ?
> > > 
> > > I agree in general, but I think it could prove problematic in practice.
> > > If somebody wants to use one of the new codes but is using the V4L2 enum
> > > they have a problem.
> > > 
> > > That said, given that there is now a unified enum people will hopefully
> > > start converting drivers to it instead.
> > 
> > I'm more worried about user-space lib/programs as this header is part
> > of the uapi...
> > 
> > But let's be optimistic here and keep porting new formats to
> > v4l2_mbus_pixelcode enum ;-).
> 
> I think we should try to keep the two in sync, until we can remove the 
> v4l2_mbus_pixelcode enum (I know, I'm being utopian here).
> 
> However, I really want all pixel codes to be properly documented, regardless 
> of whether we add them to v4l2_mbus_pixelcode or not.
> 
> > Anyway, I still don't know where to put the documentation. Dropping a
> > new video format doc without any context (I mean subdev-formats.xml is
> > included in media documentation, but there's no generic video doc yet)
> > is a bit weird...
> 
> Now that's a good question. We could start a generic video docbook 
> documentation. As I expect more infrastructure to be shared between V4L2 and 
> DRM (and, who knows, FBDEV...) over time, I think that would be a good move. 
> However docbook doesn't seem to be in the DRM developers' good books, so this 
> might be frown upon. We could also use a plain text, kerneldoc-like format 
> for 
> the common documentation, but the formats would then disappear from the V4L2 
> documentation, which isn't a very good idea. For that reason I would favour 
> docbook.
> 
> I've CC'ed Hans Verkuil who might want to share his opinion on the matter.
> 

I started to write a video-formats.xml file (actually I copied the
subdev-formats.xml file and renamed v4l2-mbus into video-bus :-)), but
these files cannot be used without the proper video_api.tmpl file, and
I don't feel like I'm the one that should start writing this
documentation (or at least I'd need some help).

Anyway, even if you think I should write this doc, can we get this
series mainlined first so that my HLCDC driver can make it into 3.19 ?

Best Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

-next plans/status

[Boris Brezillon]

Hi Dave,

On Mon, 3 Nov 2014 08:29:24 +1000
Dave Airlie  wrote:

> So since -rc5/6 cutoff last merge windows was so successful from my
> POV, I think I'll keep trucking with the idea.
> 
> Things I have on my radar for this window, outside normal driver pull 
> requests:
> 
> a) rockchip drm - this needs IOMMU driver merged first so I can even
> compile it, on hold but shouldn't be a problem if the iommu driver
> gets merged somewhere first.
> 
> b) atmel hlcdc - where are we on the precursor patches for this?

What do you mean by "precursor patches" ?

If by precursor patches you mean the dependencies of the DRM driver,
here is a quick status:

- The atmel-hlcdc [1] MFD driver has been taken by Lee Jones
- My series reworking the flip-work infrastructure [2] has been acked by
  Rob and is waiting for you (I guess I should rebase it on
  3.18-rcX or drm-next) ;-)
- My series sharing video bus format definitions between the V4L2 and
  DRM subsystems [3] is still being discussed. AFAICT, the only blocking
  point is that we need a documentation describing the available
  formats and we don't know which format to use (DocBook or txt) and
  where this documentation should be stored.

Regarding the driver itself, I still have to address Nicolas' (Ferre)
comments, and Thierry (Reding) was concerned by the proposed DT
binding (don't know if it's still the case).

Anyway, I really expect this driver to merged in 3.19 so let me know if
you see other blocking issues...

Best Regards,

Boris

[1]https://patchwork.ozlabs.org/patch/396808/
[2]http://thread.gmane.org/gmane.comp.video.dri.devel/110016
[3]https://lkml.org/lkml/2014/9/29/330



-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH] drm/radeon: use gart for DMA IB tests

[Alex Deucher]

Use gart rather than vram to avoid having to deal with
the HDP cache.

Port of adfed2b0587289013f8143c54913ddfd44ac1fd3
(drm/radeon: use gart memory for DMA ring tests)
to the IB tests.

Signed-off-by: Alex Deucher 
Cc: stable at vger.kernel.org
---
 drivers/gpu/drm/radeon/cik_sdma.c | 21 -
 drivers/gpu/drm/radeon/r600_dma.c | 20 ++--
 2 files changed, 22 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/radeon/cik_sdma.c 
b/drivers/gpu/drm/radeon/cik_sdma.c
index 4e8432d..d748963 100644
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -667,17 +667,20 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct 
radeon_ring *ring)
 {
struct radeon_ib ib;
unsigned i;
+   unsigned index;
int r;
-   void __iomem *ptr = (void *)rdev->vram_scratch.ptr;
u32 tmp = 0;
+   u64 gpu_addr;

-   if (!ptr) {
-   DRM_ERROR("invalid vram scratch pointer\n");
-   return -EINVAL;
-   }
+   if (ring->idx == R600_RING_TYPE_DMA_INDEX)
+   index = R600_WB_DMA_RING_TEST_OFFSET;
+   else
+   index = CAYMAN_WB_DMA1_RING_TEST_OFFSET;
+
+   gpu_addr = rdev->wb.gpu_addr + index;

tmp = 0xCAFEDEAD;
-   writel(tmp, ptr);
+   rdev->wb.wb[index/4] = cpu_to_le32(tmp);

r = radeon_ib_get(rdev, ring->idx, , NULL, 256);
if (r) {
@@ -686,8 +689,8 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct 
radeon_ring *ring)
}

ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, 
SDMA_WRITE_SUB_OPCODE_LINEAR, 0);
-   ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffc;
-   ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr);
+   ib.ptr[1] = lower_32_bits(gpu_addr);
+   ib.ptr[2] = upper_32_bits(gpu_addr);
ib.ptr[3] = 1;
ib.ptr[4] = 0xDEADBEEF;
ib.length_dw = 5;
@@ -704,7 +707,7 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct 
radeon_ring *ring)
return r;
}
for (i = 0; i < rdev->usec_timeout; i++) {
-   tmp = readl(ptr);
+   tmp = le32_to_cpu(rdev->wb.wb[index/4]);
if (tmp == 0xDEADBEEF)
break;
DRM_UDELAY(1);
diff --git a/drivers/gpu/drm/radeon/r600_dma.c 
b/drivers/gpu/drm/radeon/r600_dma.c
index aabc343..cf0df45 100644
--- a/drivers/gpu/drm/radeon/r600_dma.c
+++ b/drivers/gpu/drm/radeon/r600_dma.c
@@ -338,17 +338,17 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct 
radeon_ring *ring)
 {
struct radeon_ib ib;
unsigned i;
+   unsigned index;
int r;
-   void __iomem *ptr = (void *)rdev->vram_scratch.ptr;
u32 tmp = 0;
+   u64 gpu_addr;

-   if (!ptr) {
-   DRM_ERROR("invalid vram scratch pointer\n");
-   return -EINVAL;
-   }
+   if (ring->idx == R600_RING_TYPE_DMA_INDEX)
+   index = R600_WB_DMA_RING_TEST_OFFSET;
+   else
+   index = CAYMAN_WB_DMA1_RING_TEST_OFFSET;

-   tmp = 0xCAFEDEAD;
-   writel(tmp, ptr);
+   gpu_addr = rdev->wb.gpu_addr + index;

r = radeon_ib_get(rdev, ring->idx, , NULL, 256);
if (r) {
@@ -357,8 +357,8 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct 
radeon_ring *ring)
}

ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1);
-   ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffc;
-   ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xff;
+   ib.ptr[1] = lower_32_bits(gpu_addr);
+   ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff;
ib.ptr[3] = 0xDEADBEEF;
ib.length_dw = 4;

@@ -374,7 +374,7 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct 
radeon_ring *ring)
return r;
}
for (i = 0; i < rdev->usec_timeout; i++) {
-   tmp = readl(ptr);
+   tmp = le32_to_cpu(rdev->wb.wb[index/4]);
if (tmp == 0xDEADBEEF)
break;
DRM_UDELAY(1);
-- 
1.8.3.1

Modesetting lock changes breaks vmwgfx since 3.18-rc1

[Thomas Hellstrom]

Hi!

On 10/31/2014 06:33 PM, Daniel Vetter wrote:
> On Thu, Oct 30, 2014 at 03:41:31PM +0100, Thomas Hellstrom wrote:
>> Hi!
>>
>> Details in
>>
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__bugzilla.redhat.com_show-5Fbug.cgi-3Fid-3D1155825=AAIBAg=Sqcl0Ez6M0X8aeM67LKIiDJAXVeAw-YihVMNtXt-uEs=vpukPkBtpoNQp2IUKuFviOmPNYWVKmen3Jeeu55zmEA=lsrU5TbpNlecpBoc0CpsmwopYh2VrihduvgGEIFPsXw=uzLKWffads4edz_fJN5-3K2IObzmVFUcH6kty4ObySs=
>>  
>>
>> Can whoever broke the driver please make an effort to fix it up?
>>
>> Daniel, You've been named as a suspect. I'm not sure if that is true.
> Yeah the recent locking frobbing didn't account for the FIXME comment in
> vmwgfx. Might be good to address that long-term to get vmwgfx more in line
> with everyone else again - I simply don't understand the interactions well
> enough to make that call. There's two of those in total.
>
> Can we just remove them perhaps? The question is whether you can do the
> cursor operation just with the per-crtc lock as protection, or whether
> there's any shared resources and you need the full exclusion provided by
> modeset_lock_all. If the crtc locking is good enough then we could rip
> this out in both function and be done.
>
> Note that this FIXME has been in vmwgfx since almost two years now.
>
> If that's not possible then I have a major kludge of a hack in my atomic
> helpers branch which will keep this alive for a bit longer. It ain't
> pretty though.
>
> Cheers, Daniel

Hi.

Actually we haven't looked much at the new modesetting locking at all
but been pretty happy with what others have put in the code, but it
sounds like we need to actually deal with this now. I've basically never
been really convinced that we'd see any modesetting locking contention
with a single lock, but OTOH I guess with a single lock we'd eventually
start to run into locking recursion problems.

/Thomas

[PATCH 00/72] staging imx-drm new features and fixes

[Fabio Estevam]

On Mon, Nov 3, 2014 at 11:12 AM, Fabio Estevam  wrote:
> Hi Steve,
>
> On Fri, Oct 31, 2014 at 10:19 PM, Steve Longerbeam
>  wrote:
>
>> Hi Fabio, Yes I forgot to mention that in the cover letter:
>>
>> git at github.com:slongerbeam/drm-next.git
>>
>> Branch is imx-drm-mentor.
>
> Just tried it here. There were some dtb file build issues and I just
> removed the dtb's that caused issues from the Makefile.
>
> Then I ran the kernel and dtb on a imx6q-sabresd, but no HDMI output
> could be seen.

Sorry, I was using the wrong kernel. HDMI is fine now.

Will run some tests now. Thanks

[PATCH 05/72] ARM: i.MX6: select pll3_usb_otg for ldb_di for rev 1.0 chip

[Steve Longerbeam]

On 11/03/2014 04:30 AM, Philipp Zabel wrote:
> Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
>> Select pll3_usb_otg for ldb_di clock for rev 1.0 chips.
>>
>> Signed-off-by: Jiada Wang 
>> Signed-off-by: Steve Longerbeam 
>> ---
>>  arch/arm/mach-imx/clk-imx6q.c |3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
>> index 86b58fc..68064a6 100644
>> --- a/arch/arm/mach-imx/clk-imx6q.c
>> +++ b/arch/arm/mach-imx/clk-imx6q.c
>> @@ -481,6 +481,9 @@ static void __init imx6q_clocks_init(struct device_node 
>> *ccm_node)
>>  cpu_is_imx6dl()) {
>>  clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], 
>> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>>  clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], 
>> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>> +} else {
>> +clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], 
>> clk[IMX6QDL_CLK_PLL3_USB_OTG]);
>> +clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], 
>> clk[IMX6QDL_CLK_PLL3_USB_OTG]);
>>  }
>>  
>>  clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
> Does the issue with the LDB DI mux glitch locking up the LDB DI divider
> also affect rev 1.0 silicon?
> (http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/268864.html)

I can't say for sure, but I would guess that it does.

Internally we are using Freescale's workaround patch for this problem,
but it has a lot of issues, most of which is that it needs to be incorporated
into the clk API so that the workaround would be applied whenever the
LDB parent mux is changed.

Steve

[PATCH 00/72] staging imx-drm new features and fixes

[Zubair Lutfullah Kakakhel]

Steve Longerbeam  gmail.com> writes:

> 
> Hi, this affects only Freescale imx IPU and imx-drm staging drivers,
> except for two patches that affect drm core (patch 53 and 63, see below).
> 
> New features for imx-drm staging driver:
> 
> - Support for multi-display (HDMI and LVDS).
> - Support for global alpha and color-key properties for overlay plane.
> - Support for gamma correction.
> - The imx-drm crtc devices moved to device tree.
> - Support for defining custom display interface pixel mappings in the
>   device tree.
> - Implements encoder DPMS for LVDS.
> - YUV planar pixel formats supported for DRM framebuffers.
> - DDC support added for LVDS.
> - Page flip handling moved to imx plane driver and implemented with
>   IPU double-buffering.
> - Support page-flip in the overlay plane (patch 53 affects drm core).
> - Add support for parsing pixel clock edge select (patch 63 affects drm core).
> - Add LVDS connection detect via drm_probe_ddc().
> - Implement crtc mode_set_base using plane page-flip.
> 
> Fixed issues:
> 
> - HDMI and LVDS now use different PLL clock roots (part of multi-display
>   support).
> - Use counter added to IPU DC enable/disable (part of multi-display
>   support).
> - Fixed some HDMI timing issues.
> - Wider range of supported DI pixel clocks generated (all EDID modes
>   reported from HDMI displays now work).
> - Fix separate primary plane objects.
> - HDMI must select DI pre clock as DI clock parent during encoder prepare
>   (LVDS may have switched DI clock to LDB parent, part of multi-display
>   support).
> - Assign correct DMFC burst size.
> - Resolve some DI synchronous display error cases.
> 

Hi,

Great work on these patches. 
Please cc me on imx-hdmi related patches as well.

We are working on the JZ4780 (Ingenic Xburst/MIPS, not yet pushed 
upstream). It has the same/similar DWC HDMI block in silicon. 

I took the imx-hdmi driver from 3.14 and managed to use the driver with 
almost no modification except for replacing the imx_drm_xxx function calls 
for encoder/connector attach/register. Tested on the MIPS Creator CI20 
board.

Recently, I was looking at understanding the latest code and try to send an 
RFC mail on how to further reduce/break the imx-drm interaction with the 
hdmi driver. Compared to 3.14, the 3.18 driver has fewer imx_drm_xxx calls. 
Which is great.

We will probably have other SoCs in the future using this HDMI block as 
well.

So separating it completely from staging/imx-drm might make sense.
Possibly rename it to dwc_hdmi as well unless people have an objection at 
redundant code churn.

Just thought I'd pop in, highlight a different angle on the hdmi driver 
that will come up in the future, and request to be kept in the loop.

Cheers,
ZubairLK

[PATCH 00/72] staging imx-drm new features and fixes

[Fabio Estevam]

On Mon, Nov 3, 2014 at 11:12 AM, Fabio Estevam  wrote:
> Hi Steve,
>
> On Fri, Oct 31, 2014 at 10:19 PM, Steve Longerbeam
>  wrote:
>
>> Hi Fabio, Yes I forgot to mention that in the cover letter:
>>
>> git at github.com:slongerbeam/drm-next.git
>>
>> Branch is imx-drm-mentor.
>
> Just tried it here. There were some dtb file build issues and I just
> removed the dtb's that caused issues from the Makefile.
>
> Then I ran the kernel and dtb on a imx6q-sabresd, but no HDMI output
> could be seen.

[2.577748] imx-drm display-subsystem: missing 'ports' property
[2.585347] imx-ipuv3-crtc imx-ipuv3-crtc.0: missing port at 2 node in
/soc/ipu at 0240
[2.59] imx-ipuv3-crtc imx-ipuv3-crtc.1: missing port at 3 node in
/soc/ipu at 0240
[2.601312] imx-ipuv3-crtc imx-ipuv3-crtc.4: missing port at 2 node in
/soc/ipu at 0280
[2.609293] imx-ipuv3-crtc imx-ipuv3-crtc.5: missing port at 3 node in
/soc/ipu at 0280

[PATCH 00/72] staging imx-drm new features and fixes

[Fabio Estevam]

Hi Steve,

On Fri, Oct 31, 2014 at 10:19 PM, Steve Longerbeam
 wrote:

> Hi Fabio, Yes I forgot to mention that in the cover letter:
>
> git at github.com:slongerbeam/drm-next.git
>
> Branch is imx-drm-mentor.

Just tried it here. There were some dtb file build issues and I just
removed the dtb's that caused issues from the Makefile.

Then I ran the kernel and dtb on a imx6q-sabresd, but no HDMI output
could be seen.

[PATCH 16/17] drm/tegra: gem: dumb: pitch and size are outputs

[Thierry Reding]

On Mon, Nov 03, 2014 at 10:51:42AM +0100, Daniel Vetter wrote:
> On Mon, Nov 03, 2014 at 10:27:47AM +0100, Thierry Reding wrote:
> > From: Thierry Reding 
> > 
> > When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
> > IOCTL, only the width, height, bpp and flags parameters are inputs. The
> > caller is not guaranteed to zero out or set handle, pitch and size, so
> > the driver must not treat these values as possible inputs.
> > 
> > Fixes a bug where running the Weston compositor on Tegra DRM would cause
> > an attempt to allocate a 3 GiB framebuffer to be allocated.
> > 
> > Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb")
> > Cc: stable at vger.kernel.org
> > Signed-off-by: Thierry Reding 
> 
> Shouldn't we also clear these fields in the drm core ioctl code? This
> is indeed surprising (yay for lacking input validation!), doing this
> mistake in each driver won't scale ...

They are clearly documented as being outputs in the drm_mode_create_dumb
struct (include/uapi/drm/drm_mode.h), so this was really just me being
stupid a couple of year ago.

But yes, validating the input in the core sounds like a good idea to
avoid this in other drivers in the future.

Thierry
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[PATCH 04/72] ARM: i.MX6: use pll2_pfd0_352m as clock root of ipu_di

[Steve Longerbeam]

On 11/03/2014 04:30 AM, Philipp Zabel wrote:
> Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
>> AS pll5_video_div has already been used as clock root for ldb_di,
>> so use pll2_pfd0_352m as clock root of ipu_di for HDMI.
>>
>> Signed-off-by: Jiada Wang 
>> Signed-off-by: Steve Longerbeam 
> What about devices that don't use LVDS? It would be nice to let them use
> PLL5 for HDMI.

Yeah, I agree. Maybe the right approach is to move root PLL selection
into the device tree hdmi and lvds nodes.

Steve

>> ---
>>  arch/arm/mach-imx/clk-imx6q.c |8 
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
>> index 4e79da7..86b58fc 100644
>> --- a/arch/arm/mach-imx/clk-imx6q.c
>> +++ b/arch/arm/mach-imx/clk-imx6q.c
>> @@ -483,10 +483,10 @@ static void __init imx6q_clocks_init(struct 
>> device_node *ccm_node)
>>  clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], 
>> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>>  }
>>  
>> -clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>> -clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>> -clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>> -clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>> +clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
>> +clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
>> +clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
>> +clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], 
>> clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
>>  clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], 
>> clk[IMX6QDL_CLK_IPU1_DI0_PRE]);
>>  clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], 
>> clk[IMX6QDL_CLK_IPU1_DI1_PRE]);
>>  clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], 
>> clk[IMX6QDL_CLK_IPU2_DI0_PRE]);
> regards
> Philipp
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel


-- 
Steve Longerbeam | Senior Embedded Engineer, ESD Services
Mentor Embedded(tm) | 46871 Bayside Parkway, Fremont, CA 94538
P 510.354.5838 | M 408.410.2735

[PATCH 00/72] staging imx-drm new features and fixes

[Rob Clark]

On Mon, Nov 3, 2014 at 6:17 AM, Zubair Lutfullah Kakakhel
 wrote:
> Steve Longerbeam  gmail.com> writes:
>
>>
>> Hi, this affects only Freescale imx IPU and imx-drm staging drivers,
>> except for two patches that affect drm core (patch 53 and 63, see below).
>>
>> New features for imx-drm staging driver:
>>
>> - Support for multi-display (HDMI and LVDS).
>> - Support for global alpha and color-key properties for overlay plane.
>> - Support for gamma correction.
>> - The imx-drm crtc devices moved to device tree.
>> - Support for defining custom display interface pixel mappings in the
>>   device tree.
>> - Implements encoder DPMS for LVDS.
>> - YUV planar pixel formats supported for DRM framebuffers.
>> - DDC support added for LVDS.
>> - Page flip handling moved to imx plane driver and implemented with
>>   IPU double-buffering.
>> - Support page-flip in the overlay plane (patch 53 affects drm core).
>> - Add support for parsing pixel clock edge select (patch 63 affects drm 
>> core).
>> - Add LVDS connection detect via drm_probe_ddc().
>> - Implement crtc mode_set_base using plane page-flip.
>>
>> Fixed issues:
>>
>> - HDMI and LVDS now use different PLL clock roots (part of multi-display
>>   support).
>> - Use counter added to IPU DC enable/disable (part of multi-display
>>   support).
>> - Fixed some HDMI timing issues.
>> - Wider range of supported DI pixel clocks generated (all EDID modes
>>   reported from HDMI displays now work).
>> - Fix separate primary plane objects.
>> - HDMI must select DI pre clock as DI clock parent during encoder prepare
>>   (LVDS may have switched DI clock to LDB parent, part of multi-display
>>   support).
>> - Assign correct DMFC burst size.
>> - Resolve some DI synchronous display error cases.
>>
>
> Hi,
>
> Great work on these patches.
> Please cc me on imx-hdmi related patches as well.
>
> We are working on the JZ4780 (Ingenic Xburst/MIPS, not yet pushed
> upstream). It has the same/similar DWC HDMI block in silicon.
>
> I took the imx-hdmi driver from 3.14 and managed to use the driver with
> almost no modification except for replacing the imx_drm_xxx function calls
> for encoder/connector attach/register. Tested on the MIPS Creator CI20
> board.
>
> Recently, I was looking at understanding the latest code and try to send an
> RFC mail on how to further reduce/break the imx-drm interaction with the
> hdmi driver. Compared to 3.14, the 3.18 driver has fewer imx_drm_xxx calls.
> Which is great.
>
> We will probably have other SoCs in the future using this HDMI block as
> well.

fwiw, probably worth looking at drm_bridge or drm i2c encoder slave
stuff (for ex. tda998x) for how to split out shared hdmi blocks.  We
have a few drivers currently sharing the tda998x hdmi encoder chip.

BR,
-R


> So separating it completely from staging/imx-drm might make sense.
> Possibly rename it to dwc_hdmi as well unless people have an objection at
> redundant code churn.
>
> Just thought I'd pop in, highlight a different angle on the hdmi driver
> that will come up in the future, and request to be kept in the loop.
>
> Cheers,
> ZubairLK
>
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PATCH 00/72] staging imx-drm new features and fixes

[Steve Longerbeam]

On 11/03/2014 09:48 AM, Greg KH wrote:
> On Mon, Nov 03, 2014 at 06:17:28PM +0100, Daniel Vetter wrote:
>> On Mon, Nov 03, 2014 at 08:14:23AM -0800, Greg KH wrote:
>>> On Mon, Nov 03, 2014 at 05:12:14PM +0100, Daniel Vetter wrote:
 On Fri, Oct 31, 2014 at 03:53:43PM -0700, Steve Longerbeam wrote:
> Hi, this affects only Freescale imx IPU and imx-drm staging drivers,
> except for two patches that affect drm core (patch 53 and 63, see below).
>
> New features for imx-drm staging driver:
>
> - Support for multi-display (HDMI and LVDS).
> - Support for global alpha and color-key properties for overlay plane.
> - Support for gamma correction.
> - The imx-drm crtc devices moved to device tree.
> - Support for defining custom display interface pixel mappings in the
>   device tree.
> - Implements encoder DPMS for LVDS.
> - YUV planar pixel formats supported for DRM framebuffers.
> - DDC support added for LVDS.
> - Page flip handling moved to imx plane driver and implemented with
>   IPU double-buffering.
> - Support page-flip in the overlay plane (patch 53 affects drm core).
> - Add support for parsing pixel clock edge select (patch 63 affects drm 
> core).
> - Add LVDS connection detect via drm_probe_ddc().
> - Implement crtc mode_set_base using plane page-flip.
 Isn't the point of staging to get the driver out of it, instead of adding
 massive piles of features and continously keeping it there? Greg?
>>> Yes, please don't add new features to this codebase, fix it up so it
>>> gets out of staging first, I'm not going to take any of these (not the
>>> least reason being that I wasn't even cc:ed on them...)
>> Yeah I think imx works a bit like a driver outside of staging with patches
>> submitted to the subsystem and reviewed all there like normal. Except it's
>> not ...
> And I keep taking imx driver patches as well through my staging tree.
>
> Steve, what's the status of getting this driver out of staging?  What is
> left to do, and who is doing the work?

Hi Greg, you should also talk with the original authors (Sascha and
Philipp at Pengutronix), but in my experience, this driver is still suffering
from some chronic IPU issues with data starvation to the display interface.
So from my experience, that is really the only thing that is holding it up.

Steve

[PATCH 00/72] staging imx-drm new features and fixes

[Steve Longerbeam]

On 11/03/2014 09:48 AM, Greg KH wrote:
> On Mon, Nov 03, 2014 at 06:17:28PM +0100, Daniel Vetter wrote:
>> On Mon, Nov 03, 2014 at 08:14:23AM -0800, Greg KH wrote:
>>> On Mon, Nov 03, 2014 at 05:12:14PM +0100, Daniel Vetter wrote:
 On Fri, Oct 31, 2014 at 03:53:43PM -0700, Steve Longerbeam wrote:
> Hi, this affects only Freescale imx IPU and imx-drm staging drivers,
> except for two patches that affect drm core (patch 53 and 63, see below).
>
> New features for imx-drm staging driver:
>
> - Support for multi-display (HDMI and LVDS).
> - Support for global alpha and color-key properties for overlay plane.
> - Support for gamma correction.
> - The imx-drm crtc devices moved to device tree.
> - Support for defining custom display interface pixel mappings in the
>   device tree.
> - Implements encoder DPMS for LVDS.
> - YUV planar pixel formats supported for DRM framebuffers.
> - DDC support added for LVDS.
> - Page flip handling moved to imx plane driver and implemented with
>   IPU double-buffering.
> - Support page-flip in the overlay plane (patch 53 affects drm core).
> - Add support for parsing pixel clock edge select (patch 63 affects drm 
> core).
> - Add LVDS connection detect via drm_probe_ddc().
> - Implement crtc mode_set_base using plane page-flip.
 Isn't the point of staging to get the driver out of it, instead of adding
 massive piles of features and continously keeping it there? Greg?
>>> Yes, please don't add new features to this codebase, fix it up so it
>>> gets out of staging first, I'm not going to take any of these (not the
>>> least reason being that I wasn't even cc:ed on them...)
>> Yeah I think imx works a bit like a driver outside of staging with patches
>> submitted to the subsystem and reviewed all there like normal. Except it's
>> not ...
> And I keep taking imx driver patches as well through my staging tree.
>
> Steve, what's the status of getting this driver out of staging?  What is
> left to do, and who is doing the work?

Hi Greg, you should also talk with the original authors (Sascha and
Philipp at Pengutronix), but in my experience, this driver is still suffering
from some chronic IPU issues with data starvation to the display interface.
So from my experience, that is really the only thing that is holding it up.

Steve

[PATCH 17/17] drm/tegra: fb: Do not destroy framebuffer

[Daniel Vetter]

On Mon, Nov 03, 2014 at 10:27:48AM +0100, Thierry Reding wrote:
> From: Thierry Reding 
> 
> Drop a reference instead of directly calling the framebuffer .destroy()
> callback at fbdev free time. This is necessary to make sure the object
> isn't destroyed if anyone else still has a reference.
> 
> Signed-off-by: Thierry Reding 
> ---
>  drivers/gpu/drm/tegra/fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c
> index c5fa3c4b2ed5..17a29971a7ee 100644
> --- a/drivers/gpu/drm/tegra/fb.c
> +++ b/drivers/gpu/drm/tegra/fb.c
> @@ -355,7 +355,7 @@ static void tegra_fbdev_free(struct tegra_fbdev *fbdev)
>  
>   if (fbdev->fb) {
>   drm_framebuffer_unregister_private(>fb->base);
> - tegra_fb_destroy(>fb->base);
> + drm_framebuffer_unreference(>fb->base);

Yeah this is better since you have a free-standing fb pointer. I think
most kms drivers copied this stuff from i915, which just embedded the
framebuffer. And then calling unref obviously is a bad idea since the
kfree will blow up.

Reviewed-by: Daniel Vetter 
>   }
>  
>   drm_fb_helper_fini(>base);
> -- 
> 2.1.2
> 
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH 16/17] drm/tegra: gem: dumb: pitch and size are outputs

[Daniel Vetter]

On Mon, Nov 03, 2014 at 10:27:47AM +0100, Thierry Reding wrote:
> From: Thierry Reding 
> 
> When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
> IOCTL, only the width, height, bpp and flags parameters are inputs. The
> caller is not guaranteed to zero out or set handle, pitch and size, so
> the driver must not treat these values as possible inputs.
> 
> Fixes a bug where running the Weston compositor on Tegra DRM would cause
> an attempt to allocate a 3 GiB framebuffer to be allocated.
> 
> Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb")
> Cc: stable at vger.kernel.org
> Signed-off-by: Thierry Reding 

Shouldn't we also clear these fields in the drm core ioctl code? This
is indeed surprising (yay for lacking input validation!), doing this
mistake in each driver won't scale ...
-Daniel

> ---
>  drivers/gpu/drm/tegra/gem.c | 10 +++---
>  1 file changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c
> index 8b1095d05c58..8348783f7d64 100644
> --- a/drivers/gpu/drm/tegra/gem.c
> +++ b/drivers/gpu/drm/tegra/gem.c
> @@ -399,16 +399,12 @@ void tegra_bo_free_object(struct drm_gem_object *gem)
>  int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm,
>struct drm_mode_create_dumb *args)
>  {
> - int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
> + unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
>   struct tegra_drm *tegra = drm->dev_private;
>   struct tegra_bo *bo;
>  
> - min_pitch = round_up(min_pitch, tegra->pitch_align);
> - if (args->pitch < min_pitch)
> - args->pitch = min_pitch;
> -
> - if (args->size < args->pitch * args->height)
> - args->size = args->pitch * args->height;
> + args->pitch = round_up(min_pitch, tegra->pitch_align);
> + args->size = args->pitch * args->height;
>  
>   bo = tegra_bo_create_with_handle(file, drm, args->size, 0,
>>handle);
> -- 
> 2.1.2
> 
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH] drm: Per-plane locking

[Ville Syrjälä]

On Mon, Nov 03, 2014 at 12:07:02AM +0100, Daniel Vetter wrote:
> Turned out to be much simpler on top of my latest atomic stuff than
> what I've feared. Some details:
> 
> - Drop the modeset_lock_all snakeoil in drm_plane_init. Same
>   justification as for the equivalent change in drm_crtc_init done in
> 
>   commit d0fa1af40e784aaf7ebb7ba8a17b229bb3fa4c21
>   Author: Daniel Vetter 
>   Date:   Mon Sep 8 09:02:49 2014 +0200
> 
>   drm: Drop modeset locking from crtc init function
> 
>   Without these the drm_modeset_lock_init would fall over the exact
>   same way.
> 
> - Since the atomic core code wraps the locking switching it to
>   per-plane locks was a one-line change.
> 
> - For the legacy ioctls add a plane argument to the locking helper so
>   that we can grab the right plane lock (cursor or primary). Since the
>   universal cursor plane might not be there, or someone really crazy
>   might forgoe the primary plane even accept NULL.
> 
> - Add some locking WARN_ON to the atomic helpers for good paranoid
>   measure and to check that it all works out.
> 
> Tested on my exynos atomic hackfest with full lockdep checks and ww
> backoff injection.

Were you planning to convert setplane over to this?

> 
> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/drm_atomic.c|  2 +-
>  drivers/gpu/drm/drm_atomic_helper.c |  4 
>  drivers/gpu/drm/drm_crtc.c  |  9 
>  drivers/gpu/drm/drm_modeset_lock.c  | 43 
> -
>  include/drm/drm_crtc.h  |  9 ++--
>  include/drm/drm_modeset_lock.h  |  4 +++-
>  6 files changed, 47 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index af34321b675d..d8d294f2a4a6 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -244,7 +244,7 @@ drm_atomic_get_plane_state(struct drm_atomic_state *state,
>* grab all crtc locks. Once we have per-plane locks we must update this
>* to only take the plane mutex.
>*/
> - ret = drm_modeset_lock_all_crtcs(state->dev, state->acquire_ctx);
> + ret = drm_modeset_lock(>mutex, state->acquire_ctx);
>   if (ret)
>   return ERR_PTR(ret);
>  
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
> b/drivers/gpu/drm/drm_atomic_helper.c
> index a5de60faedff..48931c95f180 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -987,6 +987,8 @@ void drm_atomic_helper_commit_planes(struct drm_device 
> *dev,
>   if (!crtc)
>   continue;
>  
> + WARN_ON(!drm_modeset_is_locked(>mutex));
> +
>   funcs = crtc->helper_private;
>  
>   if (!funcs || !funcs->atomic_begin)
> @@ -1002,6 +1004,8 @@ void drm_atomic_helper_commit_planes(struct drm_device 
> *dev,
>   if (!plane)
>   continue;
>  
> + WARN_ON(!drm_modeset_is_locked(>mutex));
> +
>   funcs = plane->helper_private;
>  
>   if (!funcs || !funcs->atomic_update)
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index d01239db4042..a05f9652dcc4 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1150,12 +1150,12 @@ int drm_universal_plane_init(struct drm_device *dev, 
> struct drm_plane *plane,
>  {
>   int ret;
>  
> - drm_modeset_lock_all(dev);
> -
>   ret = drm_mode_object_get(dev, >base, DRM_MODE_OBJECT_PLANE);
>   if (ret)
>   goto out;
>  
> + drm_modeset_lock_init(>mutex);
> +
>   plane->base.properties = >properties;
>   plane->dev = dev;
>   plane->funcs = funcs;
> @@ -1183,7 +1183,6 @@ int drm_universal_plane_init(struct drm_device *dev, 
> struct drm_plane *plane,
>  plane->type);
>  
>   out:
> - drm_modeset_unlock_all(dev);
>  
>   return ret;
>  }
> @@ -2795,7 +2794,7 @@ static int drm_mode_cursor_common(struct drm_device 
> *dev,
>   if (crtc->cursor)
>   return drm_mode_cursor_universal(crtc, req, file_priv);
>  
> - drm_modeset_lock_crtc(crtc);
> + drm_modeset_lock_crtc(crtc, crtc->cursor);
>   if (req->flags & DRM_MODE_CURSOR_BO) {
>   if (!crtc->funcs->cursor_set && !crtc->funcs->cursor_set2) {
>   ret = -ENXIO;
> @@ -4571,7 +4570,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
>   if (!crtc)
>   return -ENOENT;
>  
> - drm_modeset_lock_crtc(crtc);
> + drm_modeset_lock_crtc(crtc, crtc->primary);
>   if (crtc->primary->fb == NULL) {
>   /* The framebuffer is currently unbound, presumably
>* due to a hotplug event, that userspace has not
> diff --git a/drivers/gpu/drm/drm_modeset_lock.c 
> b/drivers/gpu/drm/drm_modeset_lock.c
> index 474e4d12a2d8..51cc47d827d8 100644
> --- a/drivers/gpu/drm/drm_modeset_lock.c
> +++ 

[PATCH 17/17] drm/tegra: fb: Do not destroy framebuffer

[Thierry Reding]

From: Thierry Reding 

Drop a reference instead of directly calling the framebuffer .destroy()
callback at fbdev free time. This is necessary to make sure the object
isn't destroyed if anyone else still has a reference.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/fb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c
index c5fa3c4b2ed5..17a29971a7ee 100644
--- a/drivers/gpu/drm/tegra/fb.c
+++ b/drivers/gpu/drm/tegra/fb.c
@@ -355,7 +355,7 @@ static void tegra_fbdev_free(struct tegra_fbdev *fbdev)

if (fbdev->fb) {
drm_framebuffer_unregister_private(>fb->base);
-   tegra_fb_destroy(>fb->base);
+   drm_framebuffer_unreference(>fb->base);
}

drm_fb_helper_fini(>base);
-- 
2.1.2

[PATCH 16/17] drm/tegra: gem: dumb: pitch and size are outputs

[Thierry Reding]

From: Thierry Reding 

When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
IOCTL, only the width, height, bpp and flags parameters are inputs. The
caller is not guaranteed to zero out or set handle, pitch and size, so
the driver must not treat these values as possible inputs.

Fixes a bug where running the Weston compositor on Tegra DRM would cause
an attempt to allocate a 3 GiB framebuffer to be allocated.

Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb")
Cc: stable at vger.kernel.org
Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/gem.c | 10 +++---
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c
index 8b1095d05c58..8348783f7d64 100644
--- a/drivers/gpu/drm/tegra/gem.c
+++ b/drivers/gpu/drm/tegra/gem.c
@@ -399,16 +399,12 @@ void tegra_bo_free_object(struct drm_gem_object *gem)
 int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm,
 struct drm_mode_create_dumb *args)
 {
-   int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
+   unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
struct tegra_drm *tegra = drm->dev_private;
struct tegra_bo *bo;

-   min_pitch = round_up(min_pitch, tegra->pitch_align);
-   if (args->pitch < min_pitch)
-   args->pitch = min_pitch;
-
-   if (args->size < args->pitch * args->height)
-   args->size = args->pitch * args->height;
+   args->pitch = round_up(min_pitch, tegra->pitch_align);
+   args->size = args->pitch * args->height;

bo = tegra_bo_create_with_handle(file, drm, args->size, 0,
 >handle);
-- 
2.1.2

[PATCH 15/17] drm/tegra: Fix potential bug on driver unload

[Thierry Reding]

From: Thierry Reding 

The HDMI hotplug signal may toggle after the DRM driver has been
unloaded. Make sure not to call into DRM if that's the case.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/output.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tegra/output.c b/drivers/gpu/drm/tegra/output.c
index 6b393cfbb5e7..def74914dd72 100644
--- a/drivers/gpu/drm/tegra/output.c
+++ b/drivers/gpu/drm/tegra/output.c
@@ -181,7 +181,8 @@ static irqreturn_t hpd_irq(int irq, void *data)
 {
struct tegra_output *output = data;

-   drm_helper_hpd_irq_event(output->connector.dev);
+   if (output->connector.dev)
+   drm_helper_hpd_irq_event(output->connector.dev);

return IRQ_HANDLED;
 }
-- 
2.1.2

[PATCH 14/17] drm/tegra: dc: Universal plane support

[Thierry Reding]

From: Thierry Reding 

This allows the primary plane and cursor to be exposed as regular
DRM/KMS planes, which is a prerequisite for atomic modesetting and gives
userspace more flexibility over controlling them.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/dc.c | 488 ++---
 1 file changed, 331 insertions(+), 157 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 13f8cc0e5324..791cdd3c95c3 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -332,11 +332,255 @@ static int tegra_dc_setup_window(struct tegra_dc *dc, 
unsigned int index,
return 0;
 }

-static int tegra_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
- struct drm_framebuffer *fb, int crtc_x,
- int crtc_y, unsigned int crtc_w,
- unsigned int crtc_h, uint32_t src_x,
- uint32_t src_y, uint32_t src_w, uint32_t src_h)
+static int tegra_window_plane_disable(struct drm_plane *plane)
+{
+   struct tegra_dc *dc = to_tegra_dc(plane->crtc);
+   struct tegra_plane *p = to_tegra_plane(plane);
+   u32 value;
+
+   if (!plane->crtc)
+   return 0;
+
+   value = WINDOW_A_SELECT << p->index;
+   tegra_dc_writel(dc, value, DC_CMD_DISPLAY_WINDOW_HEADER);
+
+   value = tegra_dc_readl(dc, DC_WIN_WIN_OPTIONS);
+   value &= ~WIN_ENABLE;
+   tegra_dc_writel(dc, value, DC_WIN_WIN_OPTIONS);
+
+   tegra_dc_window_commit(dc, p->index);
+
+   return 0;
+}
+
+static void tegra_plane_destroy(struct drm_plane *plane)
+{
+   struct tegra_plane *p = to_tegra_plane(plane);
+
+   drm_plane_cleanup(plane);
+   kfree(p);
+}
+
+static const u32 tegra_primary_plane_formats[] = {
+   DRM_FORMAT_XBGR,
+   DRM_FORMAT_XRGB,
+   DRM_FORMAT_RGB565,
+};
+
+static int tegra_primary_plane_update(struct drm_plane *plane,
+ struct drm_crtc *crtc,
+ struct drm_framebuffer *fb, int crtc_x,
+ int crtc_y, unsigned int crtc_w,
+ unsigned int crtc_h, uint32_t src_x,
+ uint32_t src_y, uint32_t src_w,
+ uint32_t src_h)
+{
+   struct tegra_bo *bo = tegra_fb_get_plane(fb, 0);
+   struct tegra_plane *p = to_tegra_plane(plane);
+   struct tegra_dc *dc = to_tegra_dc(crtc);
+   struct tegra_dc_window window;
+   int err;
+
+   memset(, 0, sizeof(window));
+   window.src.x = src_x >> 16;
+   window.src.y = src_y >> 16;
+   window.src.w = src_w >> 16;
+   window.src.h = src_h >> 16;
+   window.dst.x = crtc_x;
+   window.dst.y = crtc_y;
+   window.dst.w = crtc_w;
+   window.dst.h = crtc_h;
+   window.format = tegra_dc_format(fb->pixel_format, );
+   window.bits_per_pixel = fb->bits_per_pixel;
+   window.bottom_up = tegra_fb_is_bottom_up(fb);
+
+   err = tegra_fb_get_tiling(fb, );
+   if (err < 0)
+   return err;
+
+   window.base[0] = bo->paddr + fb->offsets[0];
+   window.stride[0] = fb->pitches[0];
+
+   err = tegra_dc_setup_window(dc, p->index, );
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+
+static void tegra_primary_plane_destroy(struct drm_plane *plane)
+{
+   tegra_window_plane_disable(plane);
+   tegra_plane_destroy(plane);
+}
+
+static const struct drm_plane_funcs tegra_primary_plane_funcs = {
+   .update_plane = tegra_primary_plane_update,
+   .disable_plane = tegra_window_plane_disable,
+   .destroy = tegra_primary_plane_destroy,
+};
+
+static struct drm_plane *tegra_dc_primary_plane_create(struct drm_device *drm,
+  struct tegra_dc *dc)
+{
+   struct tegra_plane *plane;
+   unsigned int num_formats;
+   const u32 *formats;
+   int err;
+
+   plane = kzalloc(sizeof(*plane), GFP_KERNEL);
+   if (!plane)
+   return ERR_PTR(-ENOMEM);
+
+   num_formats = ARRAY_SIZE(tegra_primary_plane_formats);
+   formats = tegra_primary_plane_formats;
+
+   err = drm_universal_plane_init(drm, >base, 1 << dc->pipe,
+  _primary_plane_funcs, formats,
+  num_formats, DRM_PLANE_TYPE_PRIMARY);
+   if (err < 0) {
+   kfree(plane);
+   return ERR_PTR(err);
+   }
+
+   return >base;
+}
+
+static const u32 tegra_cursor_plane_formats[] = {
+   DRM_FORMAT_RGBA,
+};
+
+static int tegra_cursor_plane_update(struct drm_plane *plane,
+struct drm_crtc *crtc,
+struct drm_framebuffer *fb, int crtc_x,
+int crtc_y, 

[PATCH 13/17] drm/tegra: dc: Registers are 32 bits wide

[Thierry Reding]

From: Thierry Reding 

Using an unsigned long type will cause these variables to become 64-bit
on 64-bit SoCs. In practice this should always work, but there's no need
for carrying around the additional 32 bits.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/dc.c  |  2 +-
 drivers/gpu/drm/tegra/drm.h | 11 +--
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 3a6038a53fdb..13f8cc0e5324 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -1002,7 +1002,7 @@ static int tegra_dc_show_regs(struct seq_file *s, void 
*data)
struct tegra_dc *dc = node->info_ent->data;

 #define DUMP_REG(name) \
-   seq_printf(s, "%-40s %#05x %08lx\n", #name, name,   \
+   seq_printf(s, "%-40s %#05x %08x\n", #name, name,\
   tegra_dc_readl(dc, name))

DUMP_REG(DC_CMD_GENERAL_INCR_SYNCPT);
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index 2fdae404e719..601989bd3549 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -139,16 +139,15 @@ static inline struct tegra_dc *to_tegra_dc(struct 
drm_crtc *crtc)
return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
 }

-static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value,
-  unsigned long reg)
+static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value,
+  unsigned long offset)
 {
-   writel(value, dc->regs + (reg << 2));
+   writel(value, dc->regs + (offset << 2));
 }

-static inline unsigned long tegra_dc_readl(struct tegra_dc *dc,
-  unsigned long reg)
+static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset)
 {
-   return readl(dc->regs + (reg << 2));
+   return readl(dc->regs + (offset << 2));
 }

 struct tegra_dc_window {
-- 
2.1.2

[PATCH 12/17] drm/tegra: dc: Factor out DC, window and cursor commit

[Thierry Reding]

From: Thierry Reding 

The sequence to commit changes to the DC, window or cursor configuration
is repetitive and can be extracted into separate functions for ease of
use.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/dc.c | 52 +-
 1 file changed, 28 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index a1e7962ccbe2..3a6038a53fdb 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -36,6 +36,26 @@ static inline struct tegra_plane *to_tegra_plane(struct 
drm_plane *plane)
return container_of(plane, struct tegra_plane, base);
 }

+static void tegra_dc_window_commit(struct tegra_dc *dc, unsigned int index)
+{
+   u32 value = WIN_A_ACT_REQ << index;
+
+   tegra_dc_writel(dc, value << 8, DC_CMD_STATE_CONTROL);
+   tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
+}
+
+static void tegra_dc_cursor_commit(struct tegra_dc *dc)
+{
+   tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
+   tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
+}
+
+static void tegra_dc_commit(struct tegra_dc *dc)
+{
+   tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
+   tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+}
+
 static unsigned int tegra_dc_format(uint32_t format, uint32_t *swap)
 {
/* assume no swapping of fetched data */
@@ -307,8 +327,7 @@ static int tegra_dc_setup_window(struct tegra_dc *dc, 
unsigned int index,
break;
}

-   tegra_dc_writel(dc, WIN_A_UPDATE << index, DC_CMD_STATE_CONTROL);
-   tegra_dc_writel(dc, WIN_A_ACT_REQ << index, DC_CMD_STATE_CONTROL);
+   tegra_dc_window_commit(dc, index);

return 0;
 }
@@ -379,8 +398,7 @@ static int tegra_plane_disable(struct drm_plane *plane)
value &= ~WIN_ENABLE;
tegra_dc_writel(dc, value, DC_WIN_WIN_OPTIONS);

-   tegra_dc_writel(dc, WIN_A_UPDATE << p->index, DC_CMD_STATE_CONTROL);
-   tegra_dc_writel(dc, WIN_A_ACT_REQ << p->index, DC_CMD_STATE_CONTROL);
+   tegra_dc_window_commit(dc, p->index);

return 0;
 }
@@ -517,10 +535,8 @@ static int tegra_dc_set_base(struct tegra_dc *dc, int x, 
int y,
tegra_dc_writel(dc, h_offset, DC_WINBUF_ADDR_H_OFFSET);
tegra_dc_writel(dc, v_offset, DC_WINBUF_ADDR_V_OFFSET);

-   value = GENERAL_UPDATE | WIN_A_UPDATE;
-   tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
-
value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
+   tegra_dc_writel(dc, value << 8, DC_CMD_STATE_CONTROL);
tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);

return 0;
@@ -625,11 +641,8 @@ static int tegra_dc_cursor_set2(struct drm_crtc *crtc, 
struct drm_file *file,
tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS);
}

-   tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-   tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
-
-   tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-   tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+   tegra_dc_cursor_commit(dc);
+   tegra_dc_commit(dc);

return 0;
 }
@@ -645,12 +658,9 @@ static int tegra_dc_cursor_move(struct drm_crtc *crtc, int 
x, int y)
value = ((y & 0x3fff) << 16) | (x & 0x3fff);
tegra_dc_writel(dc, value, DC_DISP_CURSOR_POSITION);

-   tegra_dc_writel(dc, CURSOR_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-   tegra_dc_writel(dc, CURSOR_ACT_REQ, DC_CMD_STATE_CONTROL);
-
+   tegra_dc_cursor_commit(dc);
/* XXX: only required on generations earlier than Tegra124? */
-   tegra_dc_writel(dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
-   tegra_dc_writel(dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
+   tegra_dc_commit(dc);

return 0;
 }
@@ -936,15 +946,9 @@ static void tegra_crtc_prepare(struct drm_crtc *crtc)
 static void tegra_crtc_commit(struct drm_crtc *crtc)
 {
struct tegra_dc *dc = to_tegra_dc(crtc);
-   unsigned long value;
-
-   value = GENERAL_UPDATE | WIN_A_UPDATE;
-   tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);
-
-   value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
-   tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);

drm_crtc_vblank_on(crtc);
+   tegra_dc_commit(dc);
 }

 static void tegra_crtc_load_lut(struct drm_crtc *crtc)
-- 
2.1.2

[PATCH v5 11/17] drm/tegra: Add IOMMU support

[Thierry Reding]

From: Thierry Reding 

When an IOMMU device is available on the platform bus, allocate an IOMMU
domain and attach the display controllers to it. The display controllers
can then scan out non-contiguous buffers by mapping them through the
IOMMU.

Signed-off-by: Thierry Reding 
---
Changes in v5:
- fix PRIME export of physically non-contiguous buffers
- refactor and fix error cleanup paths
- fix checking for failed allocations
- fix build warnings on 64-bit

Changes in v4:
- error out if IOMMU attachment fails

Changes in v3:
- create write-combined mappings for mmap()
- keep non-IOMMU fallback path working
- no longer rely on iommu_attach()

Changes in v2:
- don't pass GFP_KERNEL to drm_gem_get_pages()

 drivers/gpu/drm/tegra/dc.c  |  17 +++
 drivers/gpu/drm/tegra/drm.c |  18 +++
 drivers/gpu/drm/tegra/drm.h |   5 +
 drivers/gpu/drm/tegra/fb.c  |  16 ++-
 drivers/gpu/drm/tegra/gem.c | 277 ++--
 drivers/gpu/drm/tegra/gem.h |   6 +
 6 files changed, 302 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 4da366a4d78a..a1e7962ccbe2 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -9,6 +9,7 @@

 #include 
 #include 
+#include 
 #include 

 #include 
@@ -1287,6 +1288,17 @@ static int tegra_dc_init(struct host1x_client *client)
struct tegra_drm *tegra = drm->dev_private;
int err;

+   if (tegra->domain) {
+   err = iommu_attach_device(tegra->domain, dc->dev);
+   if (err < 0) {
+   dev_err(dc->dev, "failed to attach to domain: %d\n",
+   err);
+   return err;
+   }
+
+   dc->domain = tegra->domain;
+   }
+
drm_crtc_init(drm, >base, _crtc_funcs);
drm_mode_crtc_set_gamma_size(>base, 256);
drm_crtc_helper_add(>base, _crtc_helper_funcs);
@@ -1344,6 +1356,11 @@ static int tegra_dc_exit(struct host1x_client *client)
return err;
}

+   if (dc->domain) {
+   iommu_detach_device(dc->domain, dc->dev);
+   dc->domain = NULL;
+   }
+
return 0;
 }

diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 59736bb810cd..ce5123c2c3c5 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -8,6 +8,7 @@
  */

 #include 
+#include 

 #include "drm.h"
 #include "gem.h"
@@ -33,6 +34,17 @@ static int tegra_drm_load(struct drm_device *drm, unsigned 
long flags)
if (!tegra)
return -ENOMEM;

+   if (iommu_present(_bus_type)) {
+   tegra->domain = iommu_domain_alloc(_bus_type);
+   if (IS_ERR(tegra->domain)) {
+   kfree(tegra);
+   return PTR_ERR(tegra->domain);
+   }
+
+   DRM_DEBUG("IOMMU context initialized\n");
+   drm_mm_init(>mm, 0, SZ_2G);
+   }
+
mutex_init(>clients_lock);
INIT_LIST_HEAD(>clients);
drm->dev_private = tegra;
@@ -71,6 +83,7 @@ static int tegra_drm_load(struct drm_device *drm, unsigned 
long flags)
 static int tegra_drm_unload(struct drm_device *drm)
 {
struct host1x_device *device = to_host1x_device(drm->dev);
+   struct tegra_drm *tegra = drm->dev_private;
int err;

drm_kms_helper_poll_fini(drm);
@@ -82,6 +95,11 @@ static int tegra_drm_unload(struct drm_device *drm)
if (err < 0)
return err;

+   if (tegra->domain) {
+   iommu_domain_free(tegra->domain);
+   drm_mm_takedown(>mm);
+   }
+
return 0;
 }

diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index b994c017971d..2fdae404e719 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -39,6 +39,9 @@ struct tegra_fbdev {
 struct tegra_drm {
struct drm_device *drm;

+   struct iommu_domain *domain;
+   struct drm_mm mm;
+
struct mutex clients_lock;
struct list_head clients;

@@ -121,6 +124,8 @@ struct tegra_dc {
struct drm_pending_vblank_event *event;

const struct tegra_dc_soc_info *soc;
+
+   struct iommu_domain *domain;
 };

 static inline struct tegra_dc *
diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c
index 3513d12d5aa1..c5fa3c4b2ed5 100644
--- a/drivers/gpu/drm/tegra/fb.c
+++ b/drivers/gpu/drm/tegra/fb.c
@@ -65,8 +65,12 @@ static void tegra_fb_destroy(struct drm_framebuffer 
*framebuffer)
for (i = 0; i < fb->num_planes; i++) {
struct tegra_bo *bo = fb->planes[i];

-   if (bo)
+   if (bo) {
+   if (bo->pages && bo->vaddr)
+   vunmap(bo->vaddr);
+
drm_gem_object_unreference_unlocked(>gem);
+   }
}

drm_framebuffer_cleanup(framebuffer);
@@ -254,6 +258,16 

[PATCH 10/17] drm/tegra: gem: Use dma_mmap_writecombine()

[Thierry Reding]

From: Thierry Reding 

Use the existing API rather than open-coding equivalent functionality
in the driver.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/gem.c | 16 
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c
index 5bc59c5109e0..b513df33f17a 100644
--- a/drivers/gpu/drm/tegra/gem.c
+++ b/drivers/gpu/drm/tegra/gem.c
@@ -310,6 +310,7 @@ const struct vm_operations_struct tegra_bo_vm_ops = {

 int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma)
 {
+   unsigned long vm_pgoff = vma->vm_pgoff;
struct drm_gem_object *gem;
struct tegra_bo *bo;
int ret;
@@ -321,12 +322,19 @@ int tegra_drm_mmap(struct file *file, struct 
vm_area_struct *vma)
gem = vma->vm_private_data;
bo = to_tegra_bo(gem);

-   ret = remap_pfn_range(vma, vma->vm_start, bo->paddr >> PAGE_SHIFT,
- vma->vm_end - vma->vm_start, vma->vm_page_prot);
-   if (ret)
+   vma->vm_flags &= ~VM_PFNMAP;
+   vma->vm_pgoff = 0;
+
+   ret = dma_mmap_writecombine(gem->dev->dev, vma, bo->vaddr, bo->paddr,
+   gem->size);
+   if (ret) {
drm_gem_vm_close(vma);
+   return ret;
+   }
+
+   vma->vm_pgoff = vm_pgoff;

-   return ret;
+   return 0;
 }

 static struct sg_table *
-- 
2.1.2

[PATCH 09/17] drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()

[Thierry Reding]

From: Thierry Reding 

The drm_gem_object_release() function already performs this cleanup, so
there is no reason to do it explicitly.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/gem.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c
index db82c15abc16..5bc59c5109e0 100644
--- a/drivers/gpu/drm/tegra/gem.c
+++ b/drivers/gpu/drm/tegra/gem.c
@@ -251,9 +251,7 @@ void tegra_bo_free_object(struct drm_gem_object *gem)
tegra_bo_destroy(gem->dev, bo);
}

-   drm_gem_free_mmap_offset(gem);
drm_gem_object_release(gem);
-
kfree(bo);
 }

-- 
2.1.2

[PATCH 08/17] drm/tegra: gem: Cleanup tegra_bo_create_with_handle()

[Thierry Reding]

From: Thierry Reding 

There is only a single location where the function needs to do cleanup.
Skip the error unwinding path and call the cleanup function directly
instead.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/gem.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c
index 75f95e47bff1..db82c15abc16 100644
--- a/drivers/gpu/drm/tegra/gem.c
+++ b/drivers/gpu/drm/tegra/gem.c
@@ -170,23 +170,21 @@ struct tegra_bo *tegra_bo_create_with_handle(struct 
drm_file *file,
 unsigned int *handle)
 {
struct tegra_bo *bo;
-   int ret;
+   int err;

bo = tegra_bo_create(drm, size, flags);
if (IS_ERR(bo))
return bo;

-   ret = drm_gem_handle_create(file, >gem, handle);
-   if (ret)
-   goto err;
+   err = drm_gem_handle_create(file, >gem, handle);
+   if (err) {
+   tegra_bo_free_object(>gem);
+   return ERR_PTR(err);
+   }

drm_gem_object_unreference_unlocked(>gem);

return bo;
-
-err:
-   tegra_bo_free_object(>gem);
-   return ERR_PTR(ret);
 }

 static struct tegra_bo *tegra_bo_import(struct drm_device *drm,
-- 
2.1.2

[PATCH 07/17] drm/tegra: gem: Extract tegra_bo_alloc_object()

[Thierry Reding]

From: Thierry Reding 

This function implements the common buffer object allocation used for
both allocation and import paths.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/gem.c | 73 +++--
 1 file changed, 38 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c
index ce023fa3e8ae..75f95e47bff1 100644
--- a/drivers/gpu/drm/tegra/gem.c
+++ b/drivers/gpu/drm/tegra/gem.c
@@ -91,6 +91,36 @@ static const struct host1x_bo_ops tegra_bo_ops = {
.kunmap = tegra_bo_kunmap,
 };

+static struct tegra_bo *tegra_bo_alloc_object(struct drm_device *drm,
+ size_t size)
+{
+   struct tegra_bo *bo;
+   int err;
+
+   bo = kzalloc(sizeof(*bo), GFP_KERNEL);
+   if (!bo)
+   return ERR_PTR(-ENOMEM);
+
+   host1x_bo_init(>base, _bo_ops);
+   size = round_up(size, PAGE_SIZE);
+
+   err = drm_gem_object_init(drm, >gem, size);
+   if (err < 0)
+   goto free;
+
+   err = drm_gem_create_mmap_offset(>gem);
+   if (err < 0)
+   goto release;
+
+   return bo;
+
+release:
+   drm_gem_object_release(>gem);
+free:
+   kfree(bo);
+   return ERR_PTR(err);
+}
+
 static void tegra_bo_destroy(struct drm_device *drm, struct tegra_bo *bo)
 {
dma_free_writecombine(drm->dev, bo->gem.size, bo->vaddr, bo->paddr);
@@ -102,12 +132,9 @@ struct tegra_bo *tegra_bo_create(struct drm_device *drm, 
unsigned int size,
struct tegra_bo *bo;
int err;

-   bo = kzalloc(sizeof(*bo), GFP_KERNEL);
-   if (!bo)
-   return ERR_PTR(-ENOMEM);
-
-   host1x_bo_init(>base, _bo_ops);
-   size = round_up(size, PAGE_SIZE);
+   bo = tegra_bo_alloc_object(drm, size);
+   if (IS_ERR(bo))
+   return bo;

bo->vaddr = dma_alloc_writecombine(drm->dev, size, >paddr,
   GFP_KERNEL | __GFP_NOWARN);
@@ -118,14 +145,6 @@ struct tegra_bo *tegra_bo_create(struct drm_device *drm, 
unsigned int size,
goto err_dma;
}

-   err = drm_gem_object_init(drm, >gem, size);
-   if (err)
-   goto err_init;
-
-   err = drm_gem_create_mmap_offset(>gem);
-   if (err)
-   goto err_mmap;
-
if (flags & DRM_TEGRA_GEM_CREATE_TILED)
bo->tiling.mode = TEGRA_BO_TILING_MODE_TILED;

@@ -175,28 +194,16 @@ static struct tegra_bo *tegra_bo_import(struct drm_device 
*drm,
 {
struct dma_buf_attachment *attach;
struct tegra_bo *bo;
-   ssize_t size;
int err;

-   bo = kzalloc(sizeof(*bo), GFP_KERNEL);
-   if (!bo)
-   return ERR_PTR(-ENOMEM);
-
-   host1x_bo_init(>base, _bo_ops);
-   size = round_up(buf->size, PAGE_SIZE);
-
-   err = drm_gem_object_init(drm, >gem, size);
-   if (err < 0)
-   goto free;
-
-   err = drm_gem_create_mmap_offset(>gem);
-   if (err < 0)
-   goto release;
+   bo = tegra_bo_alloc_object(drm, buf->size);
+   if (IS_ERR(bo))
+   return bo;

attach = dma_buf_attach(buf, drm->dev);
if (IS_ERR(attach)) {
err = PTR_ERR(attach);
-   goto free_mmap;
+   goto free;
}

get_dma_buf(buf);
@@ -228,13 +235,9 @@ detach:

dma_buf_detach(buf, attach);
dma_buf_put(buf);
-free_mmap:
-   drm_gem_free_mmap_offset(>gem);
-release:
-   drm_gem_object_release(>gem);
 free:
+   drm_gem_object_release(>gem);
kfree(bo);
-
return ERR_PTR(err);
 }

-- 
2.1.2

[PATCH 06/17] drm/tegra: dc: Add missing call to drm_vblank_on()

[Thierry Reding]

From: Thierry Reding 

When the CRTC is enabled, make sure the VBLANK machinery is enabled.
Failure to do so will cause drm_vblank_get() to not enable the VBLANK on
the CRTC and VBLANK-synchronized page-flips won't work.

While at it, get rid of the legacy drm_vblank_pre_modeset() and
drm_vblank_post_modeset() calls that are replaced by drm_vblank_on()
and drm_vblank_off().

Reported-by: Alexandre Courbot 
Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/dc.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 4a015232e2e8..4da366a4d78a 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -739,7 +739,6 @@ static const struct drm_crtc_funcs tegra_crtc_funcs = {

 static void tegra_crtc_disable(struct drm_crtc *crtc)
 {
-   struct tegra_dc *dc = to_tegra_dc(crtc);
struct drm_device *drm = crtc->dev;
struct drm_plane *plane;

@@ -755,7 +754,7 @@ static void tegra_crtc_disable(struct drm_crtc *crtc)
}
}

-   drm_vblank_off(drm, dc->pipe);
+   drm_crtc_vblank_off(crtc);
 }

 static bool tegra_crtc_mode_fixup(struct drm_crtc *crtc,
@@ -844,8 +843,6 @@ static int tegra_crtc_mode_set(struct drm_crtc *crtc,
u32 value;
int err;

-   drm_vblank_pre_modeset(crtc->dev, dc->pipe);
-
err = tegra_crtc_setup_clk(crtc, mode);
if (err) {
dev_err(dc->dev, "failed to setup clock for CRTC: %d\n", err);
@@ -946,7 +943,7 @@ static void tegra_crtc_commit(struct drm_crtc *crtc)
value = GENERAL_ACT_REQ | WIN_A_ACT_REQ;
tegra_dc_writel(dc, value, DC_CMD_STATE_CONTROL);

-   drm_vblank_post_modeset(crtc->dev, dc->pipe);
+   drm_crtc_vblank_on(crtc);
 }

 static void tegra_crtc_load_lut(struct drm_crtc *crtc)
-- 
2.1.2

[PATCH 05/17] drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier

[Thierry Reding]

From: Sean Paul 

Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized
when the clocks are set up as opposed to when the output is enabled.
This makes sure that the PHY timings are properly set up when the panel
is prepared and that DCS commands sent at that time use the appropriate
timings.

Signed-off-by: Sean Paul 
Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/dsi.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 8940360ccc9c..33f67fd601c6 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -389,6 +389,9 @@ static int tegra_dsi_set_phy_timing(struct tegra_dsi *dsi)
DSI_TIMING_FIELD(timing.tago, period, 1);
tegra_dsi_writel(dsi, value, DSI_BTA_TIMING);

+   if (dsi->slave)
+   return tegra_dsi_set_phy_timing(dsi->slave);
+
return 0;
 }

@@ -536,10 +539,6 @@ static int tegra_dsi_configure(struct tegra_dsi *dsi, 
unsigned int pipe,
value &= ~DSI_CONTROL_HOST_ENABLE;
tegra_dsi_writel(dsi, value, DSI_CONTROL);

-   err = tegra_dsi_set_phy_timing(dsi);
-   if (err < 0)
-   return err;
-
for (i = 0; i < NUM_PKT_SEQ; i++)
tegra_dsi_writel(dsi, pkt_seq[i], DSI_PKT_SEQ_0_LO + i);

@@ -860,6 +859,10 @@ static int tegra_output_dsi_setup_clock(struct 
tegra_output *output,
 */
tegra_dsi_set_timeout(dsi, bclk, vrefresh);

+   err = tegra_dsi_set_phy_timing(dsi);
+   if (err < 0)
+   return err;
+
return 0;
 }

-- 
2.1.2

[PATCH v2 04/17] drm/tegra: dsi: Add ganged mode support

[Thierry Reding]

From: Thierry Reding 

Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.

Signed-off-by: Thierry Reding 
---
Changes in v2:
- keep track of the number of bytes transferred to/from peripheral
- use newly introduced mipi_dsi_create_packet()
- extract FIFO write into separate function

 .../bindings/gpu/nvidia,tegra20-host1x.txt |   2 +
 drivers/gpu/drm/tegra/dsi.c| 792 ++---
 drivers/gpu/drm/tegra/dsi.h|  14 +-
 3 files changed, 691 insertions(+), 117 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt 
b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index b48f4ef31d93..4c32ef0b7db8 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -191,6 +191,8 @@ of the following host1x client modules:
   - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
   - nvidia,edid: supplies a binary EDID blob
   - nvidia,panel: phandle of a display panel
+  - nvidia,ganged-mode: contains a phandle to a second DSI controller to gang
+up with in order to support up to 8 data lanes

 - sor: serial output resource

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index 584b771d8b2f..8940360ccc9c 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 

@@ -54,6 +55,10 @@ struct tegra_dsi {

unsigned int video_fifo_depth;
unsigned int host_fifo_depth;
+
+   /* for ganged-mode support */
+   struct tegra_dsi *master;
+   struct tegra_dsi *slave;
 };

 static inline struct tegra_dsi *
@@ -318,6 +323,21 @@ static const u32 
pkt_seq_video_non_burst_sync_events[NUM_PKT_SEQ] = {
[11] = PKT_ID0(MIPI_DSI_BLANKING_PACKET) | PKT_LEN0(4),
 };

+static const u32 pkt_seq_command_mode[NUM_PKT_SEQ] = {
+   [ 0] = 0,
+   [ 1] = 0,
+   [ 2] = 0,
+   [ 3] = 0,
+   [ 4] = 0,
+   [ 5] = 0,
+   [ 6] = PKT_ID0(MIPI_DSI_DCS_LONG_WRITE) | PKT_LEN0(3) | PKT_LP,
+   [ 7] = 0,
+   [ 8] = 0,
+   [ 9] = 0,
+   [10] = PKT_ID0(MIPI_DSI_DCS_LONG_WRITE) | PKT_LEN0(5) | PKT_LP,
+   [11] = 0,
+};
+
 static int tegra_dsi_set_phy_timing(struct tegra_dsi *dsi)
 {
struct mipi_dphy_timing timing;
@@ -329,7 +349,7 @@ static int tegra_dsi_set_phy_timing(struct tegra_dsi *dsi)
if (rate < 0)
return rate;

-   period = DIV_ROUND_CLOSEST(10UL, rate * 2);
+   period = DIV_ROUND_CLOSEST(NSEC_PER_SEC, rate * 2);

err = mipi_dphy_timing_get_default(, period);
if (err < 0)
@@ -426,26 +446,59 @@ static int tegra_dsi_get_format(enum 
mipi_dsi_pixel_format format,
return 0;
 }

-static int tegra_output_dsi_enable(struct tegra_output *output)
+static void tegra_dsi_ganged_enable(struct tegra_dsi *dsi, unsigned int start,
+   unsigned int size)
+{
+   u32 value;
+
+   tegra_dsi_writel(dsi, start, DSI_GANGED_MODE_START);
+   tegra_dsi_writel(dsi, size << 16 | size, DSI_GANGED_MODE_SIZE);
+
+   value = DSI_GANGED_MODE_CONTROL_ENABLE;
+   tegra_dsi_writel(dsi, value, DSI_GANGED_MODE_CONTROL);
+}
+
+static void tegra_dsi_enable(struct tegra_dsi *dsi)
+{
+   u32 value;
+
+   value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);
+   value |= DSI_POWER_CONTROL_ENABLE;
+   tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);
+
+   if (dsi->slave)
+   tegra_dsi_enable(dsi->slave);
+}
+
+static unsigned int tegra_dsi_get_lanes(struct tegra_dsi *dsi)
+{
+   if (dsi->master)
+   return dsi->master->lanes + dsi->lanes;
+
+   if (dsi->slave)
+   return dsi->lanes + dsi->slave->lanes;
+
+   return dsi->lanes;
+}
+
+static int tegra_dsi_configure(struct tegra_dsi *dsi, unsigned int pipe,
+  const struct drm_display_mode *mode)
 {
-   struct tegra_dc *dc = to_tegra_dc(output->encoder.crtc);
-   struct drm_display_mode *mode = >base.mode;
unsigned int hact, hsw, hbp, hfp, i, mul, div;
-   struct tegra_dsi *dsi = to_dsi(output);
enum tegra_dsi_format format;
-   unsigned long value;
const u32 *pkt_seq;
+   u32 value;
int err;

-   if (dsi->enabled)
-   return 0;
-
if (dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
DRM_DEBUG_KMS("Non-burst video mode with sync pulses\n");
pkt_seq = pkt_seq_video_non_burst_sync_pulses;
-   } else {
+   } else if (dsi->flags & MIPI_DSI_MODE_VIDEO) {
DRM_DEBUG_KMS("Non-burst video mode with sync 

[PATCH 03/17] drm/tegra: dsi: Make FIFO depths host parameters

[Thierry Reding]

From: Thierry Reding 

Rather than hardcoding them as macros, make the host and video FIFO
depths parameters so that they can be more easily adjusted if a new
generation of the Tegra SoC changes them.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/dsi.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index f7874458926a..584b771d8b2f 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -26,9 +26,6 @@
 #include "dsi.h"
 #include "mipi-phy.h"

-#define DSI_VIDEO_FIFO_DEPTH (1920 / 4)
-#define DSI_HOST_FIFO_DEPTH 64
-
 struct tegra_dsi {
struct host1x_client client;
struct tegra_output output;
@@ -54,6 +51,9 @@ struct tegra_dsi {

struct regulator *vdd;
bool enabled;
+
+   unsigned int video_fifo_depth;
+   unsigned int host_fifo_depth;
 };

 static inline struct tegra_dsi *
@@ -467,7 +467,7 @@ static int tegra_output_dsi_enable(struct tegra_output 
*output)
DSI_CONTROL_SOURCE(dc->pipe);
tegra_dsi_writel(dsi, value, DSI_CONTROL);

-   tegra_dsi_writel(dsi, DSI_VIDEO_FIFO_DEPTH, DSI_MAX_THRESHOLD);
+   tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD);

value = DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS |
DSI_HOST_CONTROL_ECC;
@@ -843,6 +843,8 @@ static int tegra_dsi_probe(struct platform_device *pdev)
return -ENOMEM;

dsi->output.dev = dsi->dev = >dev;
+   dsi->video_fifo_depth = 1920;
+   dsi->host_fifo_depth = 64;

err = tegra_output_probe(>output);
if (err < 0)
-- 
2.1.2

[PATCH 02/17] drm/tegra: Do not enable output on .mode_set()

[Thierry Reding]

From: Thierry Reding 

The output is already enabled in .dpms(), doing it in .mode_set() too
can cause noticeable flicker.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/output.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/tegra/output.c b/drivers/gpu/drm/tegra/output.c
index 0c67d7eebc94..6b393cfbb5e7 100644
--- a/drivers/gpu/drm/tegra/output.c
+++ b/drivers/gpu/drm/tegra/output.c
@@ -167,12 +167,6 @@ static void tegra_encoder_mode_set(struct drm_encoder 
*encoder,
   struct drm_display_mode *mode,
   struct drm_display_mode *adjusted)
 {
-   struct tegra_output *output = encoder_to_output(encoder);
-   int err;
-
-   err = tegra_output_enable(output);
-   if (err < 0)
-   dev_err(encoder->dev->dev, "tegra_output_enable(): %d\n", err);
 }

 static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
-- 
2.1.2

[PATCH 01/17] drm/tegra: dc: Add powergate support

[Thierry Reding]

From: Thierry Reding 

Both display controllers are in their own power partition. Currently the
driver relies on the assumption that these partitions are on (which is
the hardware default). However some bootloaders may disable them, so the
driver must make sure to turn them back on to avoid hangs.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/tegra/dc.c  | 45 ++---
 drivers/gpu/drm/tegra/drm.h |  1 +
 2 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 6553fd238685..4a015232e2e8 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -11,6 +11,8 @@
 #include 
 #include 

+#include 
+
 #include "dc.h"
 #include "drm.h"
 #include "gem.h"
@@ -20,6 +22,7 @@ struct tegra_dc_soc_info {
bool supports_cursor;
bool supports_block_linear;
unsigned int pitch_align;
+   bool has_powergate;
 };

 struct tegra_plane {
@@ -1357,6 +1360,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info 
= {
.supports_cursor = false,
.supports_block_linear = false,
.pitch_align = 8,
+   .has_powergate = false,
 };

 static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
@@ -1364,6 +1368,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info 
= {
.supports_cursor = false,
.supports_block_linear = false,
.pitch_align = 8,
+   .has_powergate = false,
 };

 static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
@@ -1371,6 +1376,7 @@ static const struct tegra_dc_soc_info 
tegra114_dc_soc_info = {
.supports_cursor = false,
.supports_block_linear = false,
.pitch_align = 64,
+   .has_powergate = true,
 };

 static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
@@ -1378,6 +1384,7 @@ static const struct tegra_dc_soc_info 
tegra124_dc_soc_info = {
.supports_cursor = true,
.supports_block_linear = true,
.pitch_align = 64,
+   .has_powergate = true,
 };

 static const struct of_device_id tegra_dc_of_match[] = {
@@ -1385,6 +1392,9 @@ static const struct of_device_id tegra_dc_of_match[] = {
.compatible = "nvidia,tegra124-dc",
.data = _dc_soc_info,
}, {
+   .compatible = "nvidia,tegra114-dc",
+   .data = _dc_soc_info,
+   }, {
.compatible = "nvidia,tegra30-dc",
.data = _dc_soc_info,
}, {
@@ -1467,9 +1477,34 @@ static int tegra_dc_probe(struct platform_device *pdev)
return PTR_ERR(dc->rst);
}

-   err = clk_prepare_enable(dc->clk);
-   if (err < 0)
-   return err;
+   if (dc->soc->has_powergate) {
+   if (dc->pipe == 0)
+   dc->powergate = TEGRA_POWERGATE_DIS;
+   else
+   dc->powergate = TEGRA_POWERGATE_DISB;
+
+   err = tegra_powergate_sequence_power_up(dc->powergate, dc->clk,
+   dc->rst);
+   if (err < 0) {
+   dev_err(>dev, "failed to power partition: %d\n",
+   err);
+   return err;
+   }
+   } else {
+   err = clk_prepare_enable(dc->clk);
+   if (err < 0) {
+   dev_err(>dev, "failed to enable clock: %d\n",
+   err);
+   return err;
+   }
+
+   err = reset_control_deassert(dc->rst);
+   if (err < 0) {
+   dev_err(>dev, "failed to deassert reset: %d\n",
+   err);
+   return err;
+   }
+   }

regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
dc->regs = devm_ioremap_resource(>dev, regs);
@@ -1523,6 +1558,10 @@ static int tegra_dc_remove(struct platform_device *pdev)
}

reset_control_assert(dc->rst);
+
+   if (dc->soc->has_powergate)
+   tegra_powergate_power_off(dc->powergate);
+
clk_disable_unprepare(dc->clk);

return 0;
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index e89c70fa82d5..b994c017971d 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -101,6 +101,7 @@ struct tegra_dc {
spinlock_t lock;

struct drm_crtc base;
+   int powergate;
int pipe;

struct clk *clk;
-- 
2.1.2

[PATCH v4 16/16] drm/panel: Add Sharp LQ101R1SX01 support

[Thierry Reding]

From: Thierry Reding 

This panel requires dual-channel mode. The device accepts command-mode
data on 8 lanes and will therefore need a dual-channel DSI controller.
The two interfaces that make up this device need to be instantiated in
the controllers that gang up to provide the dual-channel DSI host.

Signed-off-by: Thierry Reding 
---
Changes in v4:
- use low power mode since highspeed message transfers don't work
- clarify required and optional properties for both DSI links
- power off panel when .prepare() fails
- properly drop reference to DSI-LINK2
- don't allocate memory for DSI-LINK2
- propagate errors on failure

 .../bindings/panel/sharp,lq101r1sx01.txt   |  49 +++
 drivers/gpu/drm/panel/Kconfig  |  13 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c| 464 +
 4 files changed, 527 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt
 create mode 100644 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c

diff --git a/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt 
b/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt
new file mode 100644
index ..f522bb8e47e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/sharp,lq101r1sx01.txt
@@ -0,0 +1,49 @@
+Sharp Microelectronics 10.1" WQXGA TFT LCD panel
+
+This panel requires a dual-channel DSI host to operate. It supports two modes:
+- left-right: each channel drives the left or right half of the screen
+- even-odd: each channel drives the even or odd lines of the screen
+
+Each of the DSI channels controls a separate DSI peripheral. The peripheral
+driven by the first link (DSI-LINK1), left or even, is considered the primary
+peripheral and controls the device. The 'link2' property contains a phandle
+to the peripheral driven by the second link (DSI-LINK2, right or odd).
+
+Note that in video mode the DSI-LINK1 interface always provides the left/even
+pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
+is possible to program either link to drive the left/even or right/odd pixels
+but for the sake of consistency this binding assumes that the same assignment
+is chosen as for video mode.
+
+Required properties:
+- compatible: should be "sharp,lq101r1sx01"
+- reg: DSI virtual channel of the peripheral
+
+Required properties (for DSI-LINK1 only):
+- link2: phandle to the DSI peripheral on the secondary link. Note that the
+  presence of this property marks the containing node as DSI-LINK1.
+- power-supply: phandle of the regulator that provides the supply voltage
+
+Optional properties (for DSI-LINK1 only):
+- backlight: phandle of the backlight device attached to the panel
+
+Example:
+
+   dsi at 5430 {
+   panel: panel at 0 {
+   compatible = "sharp,lq101r1sx01";
+   reg = <0>;
+
+   link2 = <>;
+
+   power-supply = <...>;
+   backlight = <...>;
+   };
+   };
+
+   dsi at 5440 {
+   secondary: panel at 0 {
+   compatible = "sharp,lq101r1sx01";
+   reg = <0>;
+   };
+   };
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index bee9f72b3a93..024e98ef8e4d 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -27,4 +27,17 @@ config DRM_PANEL_S6E8AA0
select DRM_MIPI_DSI
select VIDEOMODE_HELPERS

+config DRM_PANEL_SHARP_LQ101R1SX01
+   tristate "Sharp LQ101R1SX01 panel"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   help
+ Say Y here if you want to enable support for Sharp LQ101R1SX01
+ TFT-LCD modules. The panel has a 2560x1600 resolution and uses
+ 24 bit RGB per pixel. It provides a dual MIPI DSI interface to
+ the host and has a built-in LED backlight.
+
+ To compile this driver as a module, choose M here: the module
+ will be called panel-sharp-lq101r1sx01.
+
 endmenu
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 8b929212fad7..4b2a0430804b 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
 obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o
 obj-$(CONFIG_DRM_PANEL_S6E8AA0) += panel-s6e8aa0.o
+obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o
diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c 
b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
new file mode 100644
index ..ee0e7f57e4a1
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c
@@ -0,0 +1,464 @@
+/*
+ * Copyright (C) 2014 NVIDIA Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under 

[PATCH v4 15/16] drm/dsi: Resolve MIPI DSI device from phandle

[Thierry Reding]

From: Thierry Reding 

Add a function, of_find_mipi_dsi_device_by_node(), that can be used to
resolve a phandle to a MIPI DSI device.

Acked-by: Andrzej Hajda 
Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 23 +++
 include/drm/drm_mipi_dsi.h |  1 +
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 97dcbaa6a301..afaa36c37fcb 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -67,6 +67,29 @@ static struct bus_type mipi_dsi_bus_type = {
.pm = _dsi_device_pm_ops,
 };

+static int of_device_match(struct device *dev, void *data)
+{
+   return dev->of_node == data;
+}
+
+/**
+ * of_find_mipi_dsi_device_by_node() - find the MIPI DSI device matching a
+ *device tree node
+ * @np: device tree node
+ *
+ * Return: A pointer to the MIPI DSI device corresponding to @np or NULL if no
+ *such device exists (or has not been registered yet).
+ */
+struct mipi_dsi_device *of_find_mipi_dsi_device_by_node(struct device_node *np)
+{
+   struct device *dev;
+
+   dev = bus_find_device(_dsi_bus_type, NULL, np, of_device_match);
+
+   return dev ? to_mipi_dsi_device(dev) : NULL;
+}
+EXPORT_SYMBOL(of_find_mipi_dsi_device_by_node);
+
 static void mipi_dsi_dev_release(struct device *dev)
 {
struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev);
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 6031593ee231..16c2e9890631 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -160,6 +160,7 @@ static inline struct mipi_dsi_device 
*to_mipi_dsi_device(struct device *dev)
return container_of(dev, struct mipi_dsi_device, dev);
 }

+struct mipi_dsi_device *of_find_mipi_dsi_device_by_node(struct device_node 
*np);
 int mipi_dsi_attach(struct mipi_dsi_device *dsi);
 int mipi_dsi_detach(struct mipi_dsi_device *dsi);
 int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
-- 
2.1.2

[PATCH v4 14/16] drm/dsi: Implement DCS set_{column, page}_address commands

[Thierry Reding]

From: Thierry Reding 

Provide small convenience wrappers to set the column and page extents of
the frame memory accessed by the host processors.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 46 ++
 include/drm/drm_mipi_dsi.h |  4 
 2 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 226822a44457..97dcbaa6a301 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -650,6 +650,52 @@ int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device 
*dsi)
 EXPORT_SYMBOL(mipi_dsi_dcs_set_display_on);

 /**
+ * mipi_dsi_dcs_set_column_address() - define the column extent of the frame
+ *memory accessed by the host processor
+ * @dsi: DSI peripheral device
+ * @start: first column of frame memory
+ * @end: last column of frame memory
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
+   u16 end)
+{
+   u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff };
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_COLUMN_ADDRESS, payload,
+sizeof(payload));
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_page_address() - define the page extent of the frame
+ *memory accessed by the host processor
+ * @dsi: DSI peripheral device
+ * @start: first page of frame memory
+ * @end: last page of frame memory
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
+ u16 end)
+{
+   u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff };
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PAGE_ADDRESS, payload,
+sizeof(payload));
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+
+/**
  * mipi_dsi_dcs_set_tear_off() - turn off the display module's Tearing Effect
  *output signal on the TE signal line
  * @dsi: DSI peripheral device
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 415d01f90086..6031593ee231 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -202,6 +202,10 @@ int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device 
*dsi);
 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
+   u16 end);
+int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
+ u16 end);
 int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
 enum mipi_dsi_dcs_tear_mode mode);
-- 
2.1.2

[PATCH v4 13/16] drm/dsi: Implement DCS {get, set}_pixel_format commands

[Thierry Reding]

From: Thierry Reding 

Provide small convenience wrappers to query or set the pixel format used
by the interface.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 42 ++
 include/drm/drm_mipi_dsi.h |  2 ++
 2 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index da34469b9b98..226822a44457 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -553,6 +553,27 @@ int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device 
*dsi, u8 *mode)
 EXPORT_SYMBOL(mipi_dsi_dcs_get_power_mode);

 /**
+ * mipi_dsi_dcs_get_pixel_format() - gets the pixel format for the RGB image
+ *data used by the interface
+ * @dsi: DSI peripheral device
+ * @format: return location for the pixel format
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_PIXEL_FORMAT, format,
+   sizeof(*format));
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_get_pixel_format);
+
+/**
  * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside the
  *display module except interface communication
  * @dsi: DSI peripheral device
@@ -670,6 +691,27 @@ int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_on);

+/**
+ * mipi_dsi_dcs_set_pixel_format() - sets the pixel format for the RGB image
+ *data used by the interface
+ * @dsi: DSI peripheral device
+ * @format: pixel format
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PIXEL_FORMAT, ,
+sizeof(format));
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_set_pixel_format);
+
 static int mipi_dsi_drv_probe(struct device *dev)
 {
struct mipi_dsi_driver *drv = to_mipi_dsi_driver(dev->driver);
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 4cbf8e658a3a..415d01f90086 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -197,6 +197,7 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 
cmd, void *data,
 int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
+int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
 int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
@@ -204,6 +205,7 @@ int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device 
*dsi);
 int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
 enum mipi_dsi_dcs_tear_mode mode);
+int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);

 /**
  * struct mipi_dsi_driver - DSI driver
-- 
2.1.2

[PATCH v4 12/16] drm/dsi: Implement DCS get_power_mode command

[Thierry Reding]

From: Thierry Reding 

Provide a small convenience wrapper that transmits a DCS get_power_mode
command. A set of bitmasks for the mode bits is also provided.

Acked-by: Andrzej Hajda 
Signed-off-by: Thierry Reding 
---
Changes in v4:
- return -ENODATA when no data could be read

 drivers/gpu/drm/drm_mipi_dsi.c | 25 +
 include/drm/drm_mipi_dsi.h |  7 +++
 2 files changed, 32 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index acfaaa37b905..da34469b9b98 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -528,6 +528,31 @@ int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi)
 EXPORT_SYMBOL(mipi_dsi_dcs_soft_reset);

 /**
+ * mipi_dsi_dcs_get_power_mode() - query the display module's current power
+ *mode
+ * @dsi: DSI peripheral device
+ * @mode: return location for the current power mode
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_POWER_MODE, mode,
+   sizeof(*mode));
+   if (err <= 0) {
+   if (err == 0)
+   err = -ENODATA;
+
+   return err;
+   }
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_get_power_mode);
+
+/**
  * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside the
  *display module except interface communication
  * @dsi: DSI peripheral device
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index c72838679136..4cbf8e658a3a 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -182,6 +182,12 @@ enum mipi_dsi_dcs_tear_mode {
MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
 };

+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE(1 << 6)
+
 ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
  const void *data, size_t len);
 ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
@@ -190,6 +196,7 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 
cmd, void *data,
  size_t len);
 int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
 int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
-- 
2.1.2

[PATCH v4 11/16] drm/dsi: Implement DCS soft_reset command

[Thierry Reding]

From: Thierry Reding 

Provide a small convenience wrapper that transmits a DCS soft_reset
command.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 18 ++
 include/drm/drm_mipi_dsi.h |  1 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index f1617fe5469e..acfaaa37b905 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -510,6 +510,24 @@ int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi)
 EXPORT_SYMBOL(mipi_dsi_dcs_nop);

 /**
+ * mipi_dsi_dcs_soft_reset() - perform a software reset of the display module
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SOFT_RESET, NULL, 0);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_soft_reset);
+
+/**
  * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside the
  *display module except interface communication
  * @dsi: DSI peripheral device
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 23b4ac575aa5..c72838679136 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -189,6 +189,7 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 
cmd,
 ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
  size_t len);
 int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
-- 
2.1.2

[PATCH v4 10/16] drm/dsi: Implement DCS nop command

[Thierry Reding]

From: Thierry Reding 

Provide a small convenience wrapper that transmits a DCS nop command.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 18 ++
 include/drm/drm_mipi_dsi.h |  1 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index b4e10d3c81ce..f1617fe5469e 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -492,6 +492,24 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 
cmd, void *data,
 EXPORT_SYMBOL(mipi_dsi_dcs_read);

 /**
+ * mipi_dsi_dcs_nop() - send DCS nop packet
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, NULL, 0);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_nop);
+
+/**
  * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside the
  *display module except interface communication
  * @dsi: DSI peripheral device
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 359287d4ca92..23b4ac575aa5 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -188,6 +188,7 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 
cmd,
   const void *data, size_t len);
 ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
  size_t len);
+int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
 int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
-- 
2.1.2

[PATCH v4 09/16] drm/dsi: Add to DocBook documentation

[Thierry Reding]

From: Thierry Reding 

Integrate the MIPI DSI helpers into DocBook and clean up various
kerneldoc warnings. Also add a brief DOC section and clarify some
aspects of the mipi_dsi_host struct's .transfer() operation.

Acked-by: Andrzej Hajda 
Signed-off-by: Thierry Reding 
---
 Documentation/DocBook/drm.tmpl |  6 ++
 drivers/gpu/drm/drm_mipi_dsi.c | 18 --
 include/drm/drm_mipi_dsi.h | 16 ++--
 3 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index f6a9d7b21380..d89ca5830697 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -2343,6 +2343,12 @@ void intel_crt_init(struct drm_device *dev)
 !Edrivers/gpu/drm/drm_dp_mst_topology.c
 
 
+  MIPI DSI Helper Functions Reference
+!Pdrivers/gpu/drm/drm_mipi_dsi.c dsi helpers
+!Iinclude/drm/drm_mipi_dsi.h
+!Edrivers/gpu/drm/drm_mipi_dsi.c
+
+
   EDID Helper Functions Reference
 !Edrivers/gpu/drm/drm_edid.c
 
diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 7a7217ee03af..b4e10d3c81ce 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -35,6 +35,16 @@

 #include 

+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
 static int mipi_dsi_device_match(struct device *dev, struct device_driver *drv)
 {
return of_driver_match_device(dev, drv);
@@ -624,8 +634,10 @@ static void mipi_dsi_drv_shutdown(struct device *dev)
 }

 /**
- * mipi_dsi_driver_register - register a driver for DSI devices
+ * mipi_dsi_driver_register() - register a driver for DSI devices
  * @drv: DSI driver structure
+ *
+ * Return: 0 on success or a negative error code on failure.
  */
 int mipi_dsi_driver_register(struct mipi_dsi_driver *drv)
 {
@@ -642,8 +654,10 @@ int mipi_dsi_driver_register(struct mipi_dsi_driver *drv)
 EXPORT_SYMBOL(mipi_dsi_driver_register);

 /**
- * mipi_dsi_driver_unregister - unregister a driver for DSI devices
+ * mipi_dsi_driver_unregister() - unregister a driver for DSI devices
  * @drv: DSI driver structure
+ *
+ * Return: 0 on success or a negative error code on failure.
  */
 void mipi_dsi_driver_unregister(struct mipi_dsi_driver *drv)
 {
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index d84429111ac4..359287d4ca92 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -26,6 +26,7 @@ struct mipi_dsi_device;
  * struct mipi_dsi_msg - read/write DSI buffer
  * @channel: virtual channel id
  * @type: payload data type
+ * @flags: flags controlling this message transmission
  * @tx_len: length of @tx_buf
  * @tx_buf: data to be written
  * @rx_len: length of @rx_buf
@@ -65,8 +66,19 @@ int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
  * struct mipi_dsi_host_ops - DSI bus operations
  * @attach: attach DSI device to DSI host
  * @detach: detach DSI device from DSI host
- * @transfer: send and/or receive DSI packet, return number of received bytes,
- *   or error
+ * @transfer: transmit a DSI packet
+ *
+ * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
+ * structures. This structure contains information about the type of packet
+ * being transmitted as well as the transmit and receive buffers. When an
+ * error is encountered during transmission, this function will return a
+ * negative error code. On success it shall return the number of bytes
+ * transmitted for write packets or the number of bytes received for read
+ * packets.
+ *
+ * Note that typically DSI packet transmission is atomic, so the .transfer()
+ * function will seldomly return anything other than the number of bytes
+ * contained in the transmit buffer on success.
  */
 struct mipi_dsi_host_ops {
int (*attach)(struct mipi_dsi_host *host,
-- 
2.1.2

[PATCH v4 08/16] drm/dsi: Implement some standard DCS commands

[Thierry Reding]

From: YoungJun Cho 

Add helpers for the {enter,exit}_sleep_mode, set_display_{on,off} and
set_tear_{on,off} DCS commands.

Signed-off-by: YoungJun Cho 
[treding: kerneldoc and other minor cleanup]
Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 118 +
 include/drm/drm_mipi_dsi.h |  19 +++
 2 files changed, 137 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index aee7962401fd..7a7217ee03af 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -481,6 +481,124 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 
cmd, void *data,
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_read);

+/**
+ * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside the
+ *display module except interface communication
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_SLEEP_MODE, NULL, 0);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_enter_sleep_mode);
+
+/**
+ * mipi_dsi_dcs_exit_sleep_mode() - enable all blocks inside the display
+ *module
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_EXIT_SLEEP_MODE, NULL, 0);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_exit_sleep_mode);
+
+/**
+ * mipi_dsi_dcs_set_display_off() - stop displaying the image data on the
+ *display device
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_OFF, NULL, 0);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_set_display_off);
+
+/**
+ * mipi_dsi_dcs_set_display_on() - start displaying the image data on the
+ *display device
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_ON, NULL, 0);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_set_display_on);
+
+/**
+ * mipi_dsi_dcs_set_tear_off() - turn off the display module's Tearing Effect
+ *output signal on the TE signal line
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi)
+{
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_OFF, NULL, 0);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_off);
+
+/**
+ * mipi_dsi_dcs_set_tear_on() - turn on the display module's Tearing Effect
+ *output signal on the TE signal line.
+ * @dsi: DSI peripheral device
+ * @mode: the Tearing Effect Output Line mode
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
+enum mipi_dsi_dcs_tear_mode mode)
+{
+   u8 value = mode;
+   ssize_t err;
+
+   err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_ON, ,
+sizeof(value));
+   if (err < 0)
+   return err;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_on);
+
 static int mipi_dsi_drv_probe(struct device *dev)
 {
struct mipi_dsi_driver *drv = to_mipi_dsi_driver(dev->driver);
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 7b7bf895e1b2..d84429111ac4 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -158,12 +158,31 @@ ssize_t mipi_dsi_generic_write(struct mipi_dsi_device 
*dsi, const void *payload,
 ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
  size_t num_params, void *data, size_t size);

+/**
+ * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
+ * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
+ *information only
+ * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
+ *V-Blanking and H-Blanking information
+ */
+enum mipi_dsi_dcs_tear_mode {
+   MIPI_DSI_DCS_TEAR_MODE_VBLANK,
+   MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
+};
+
 ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
  const void *data, size_t 

[PATCH v4 07/16] drm/dsi: Implement generic read and write commands

[Thierry Reding]

From: Thierry Reding 

Implement generic read and write commands. Selection of the proper data
type for packets is done automatically based on the number of parameters
or payload length.

Signed-off-by: Thierry Reding 
---
Changes in v4:
- do not handle protocol-level details in generic read/write

Changes in v3:
- use common helper to simplify code

 drivers/gpu/drm/drm_mipi_dsi.c | 89 ++
 include/drm/drm_mipi_dsi.h |  6 +++
 2 files changed, 95 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 640cabcd6c1f..aee7962401fd 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -282,6 +282,95 @@ int mipi_dsi_set_maximum_return_packet_size(struct 
mipi_dsi_device *dsi,
 EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size);

 /**
+ * mipi_dsi_generic_write() - transmit data using a generic write packet
+ * @dsi: DSI peripheral device
+ * @payload: buffer containing the payload
+ * @size: size of payload buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the payload length.
+ *
+ * Return: The number of bytes transmitted on success or a negative error code
+ * on failure.
+ */
+ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void 
*payload,
+  size_t size)
+{
+   struct mipi_dsi_msg msg = {
+   .channel = dsi->channel,
+   .tx_buf = payload,
+   .tx_len = size
+   };
+
+   switch (size) {
+   case 0:
+   msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
+   break;
+
+   case 1:
+   msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
+   break;
+
+   case 2:
+   msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
+   break;
+
+   default:
+   msg.type = MIPI_DSI_GENERIC_LONG_WRITE;
+   break;
+   }
+
+   return mipi_dsi_device_transfer(dsi, );
+}
+EXPORT_SYMBOL(mipi_dsi_generic_write);
+
+/**
+ * mipi_dsi_generic_read() - receive data using a generic read packet
+ * @dsi: DSI peripheral device
+ * @params: buffer containing the request parameters
+ * @num_params: number of request parameters
+ * @data: buffer in which to return the received data
+ * @size: size of receive buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the number of parameters passed in.
+ *
+ * Return: The number of bytes successfully read or a negative error code on
+ * failure.
+ */
+ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
+ size_t num_params, void *data, size_t size)
+{
+   struct mipi_dsi_msg msg = {
+   .channel = dsi->channel,
+   .tx_len = num_params,
+   .tx_buf = params,
+   .rx_len = size,
+   .rx_buf = data
+   };
+
+   switch (num_params) {
+   case 0:
+   msg.type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
+   break;
+
+   case 1:
+   msg.type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
+   break;
+
+   case 2:
+   msg.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
+   break;
+
+   default:
+   return -EINVAL;
+   }
+
+   return mipi_dsi_device_transfer(dsi, );
+}
+EXPORT_SYMBOL(mipi_dsi_generic_read);
+
+/**
  * mipi_dsi_dcs_write_buffer() - transmit a DCS command with payload
  * @dsi: DSI peripheral device
  * @data: buffer containing data to be transmitted
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index bab67099872b..7b7bf895e1b2 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -152,6 +152,12 @@ int mipi_dsi_attach(struct mipi_dsi_device *dsi);
 int mipi_dsi_detach(struct mipi_dsi_device *dsi);
 int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
u16 value);
+
+ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void 
*payload,
+  size_t size);
+ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
+ size_t num_params, void *data, size_t size);
+
 ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
  const void *data, size_t len);
 ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
-- 
2.1.2

[PATCH v4 06/16] drm/panel: s6e8aa0: Use standard MIPI DSI function

[Thierry Reding]

From: Thierry Reding 

Use the newly introduced mipi_dsi_set_maximum_return_packet_size()
function to replace an open-coded version.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/panel/panel-s6e8aa0.c | 16 ++--
 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-s6e8aa0.c 
b/drivers/gpu/drm/panel/panel-s6e8aa0.c
index 0f85a7c37687..c31e2953f290 100644
--- a/drivers/gpu/drm/panel/panel-s6e8aa0.c
+++ b/drivers/gpu/drm/panel/panel-s6e8aa0.c
@@ -800,27 +800,15 @@ static void s6e8aa0_panel_init(struct s6e8aa0 *ctx)
 }

 static void s6e8aa0_set_maximum_return_packet_size(struct s6e8aa0 *ctx,
-  int size)
+  u16 size)
 {
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
-   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
-   u8 buf[] = {size, 0};
-   struct mipi_dsi_msg msg = {
-   .channel = dsi->channel,
-   .type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
-   .tx_len = sizeof(buf),
-   .tx_buf = buf
-   };
int ret;

if (ctx->error < 0)
return;

-   if (!ops || !ops->transfer)
-   ret = -EIO;
-   else
-   ret = ops->transfer(dsi->host, );
-
+   ret = mipi_dsi_set_maximum_return_packet_size(dsi, size);
if (ret < 0) {
dev_err(ctx->dev,
"error %d setting maximum return packet size to %d\n",
-- 
2.1.2

[PATCH v4 05/16] drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper

[Thierry Reding]

From: YoungJun Cho 

This function can be used to set the maximum return packet size for a
MIPI DSI peripheral.

Signed-off-by: YoungJun Cho 
[treding: endianess, kerneldoc, return value]
Signed-off-by: Thierry Reding 
---
Changes in v4:
- use C99 initializer

Changes in v3:
- use common helper to simplify code

 drivers/gpu/drm/drm_mipi_dsi.c | 24 
 include/drm/drm_mipi_dsi.h |  2 ++
 2 files changed, 26 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index aa1aab24181c..640cabcd6c1f 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -257,6 +257,30 @@ int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
 }
 EXPORT_SYMBOL(mipi_dsi_create_packet);

+/*
+ * mipi_dsi_set_maximum_return_packet_size() - specify the maximum size of the
+ *the payload in a long packet transmitted from the peripheral back to the
+ *host processor
+ * @dsi: DSI peripheral device
+ * @value: the maximum size of the payload
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
+   u16 value)
+{
+   u8 tx[2] = { value & 0xff, value >> 8 };
+   struct mipi_dsi_msg msg = {
+   .channel = dsi->channel,
+   .type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
+   .tx_len = sizeof(tx),
+   .tx_buf = tx,
+   };
+
+   return mipi_dsi_device_transfer(dsi, );
+}
+EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size);
+
 /**
  * mipi_dsi_dcs_write_buffer() - transmit a DCS command with payload
  * @dsi: DSI peripheral device
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 6600cf630585..bab67099872b 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -150,6 +150,8 @@ static inline struct mipi_dsi_device 
*to_mipi_dsi_device(struct device *dev)

 int mipi_dsi_attach(struct mipi_dsi_device *dsi);
 int mipi_dsi_detach(struct mipi_dsi_device *dsi);
+int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
+   u16 value);
 ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
  const void *data, size_t len);
 ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
-- 
2.1.2

[PATCH v4 04/16] drm/dsi: Constify mipi_dsi_msg

[Thierry Reding]

From: Thierry Reding 

struct mipi_dsi_msg is a read-only structure, drivers should never need
to modify it. Make this explicit by making all references to the struct
const.

Acked-by: Andrzej Hajda 
Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 +-
 include/drm/drm_mipi_dsi.h  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index acf7e9e39dcd..f43d25896f3b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -1236,7 +1236,7 @@ static bool exynos_dsi_is_short_dsi_type(u8 type)
 }

 static ssize_t exynos_dsi_host_transfer(struct mipi_dsi_host *host,
-  struct mipi_dsi_msg *msg)
+   const struct mipi_dsi_msg *msg)
 {
struct exynos_dsi *dsi = host_to_dsi(host);
struct exynos_dsi_transfer xfer;
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index e37b1962ab7e..6600cf630585 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -74,7 +74,7 @@ struct mipi_dsi_host_ops {
int (*detach)(struct mipi_dsi_host *host,
  struct mipi_dsi_device *dsi);
ssize_t (*transfer)(struct mipi_dsi_host *host,
-   struct mipi_dsi_msg *msg);
+   const struct mipi_dsi_msg *msg);
 };

 /**
-- 
2.1.2

[PATCH v4 03/16] drm/dsi: Make mipi_dsi_dcs_{read, write}() symmetrical

[Thierry Reding]

From: Thierry Reding 

Currently the mipi_dsi_dcs_write() function requires the DCS command
byte to be embedded within the write buffer whereas mipi_dsi_dcs_read()
has a separate parameter. Make them more symmetrical by adding an extra
command parameter to mipi_dsi_dcs_write().

The S6E8AA0 driver relies on the old asymmetric API and there's concern
that moving to the new API may be less efficient. Provide a new function
with the old semantics for those cases and make the S6E8AA0 driver use
it instead.

Signed-off-by: Thierry Reding 
---
Changes in v4:
- do not handle protocol-level details in mipi_dsi_dcs_write()

Changes in v3:
- reuse mipi_dsi_dcs_write_buffer() in mipi_dsi_dcs_write()
- keep local ops variable for consistency
- use common helper to simplify code
- fix typo in comment

Changes in v2:
- provide mipi_dsi_dcs_write_buffer() for backwards compatibility

 drivers/gpu/drm/drm_mipi_dsi.c| 77 +--
 drivers/gpu/drm/panel/panel-s6e8aa0.c |  2 +-
 include/drm/drm_mipi_dsi.h|  6 ++-
 3 files changed, 70 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 89a228b4eacc..aa1aab24181c 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -258,13 +258,19 @@ int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
 EXPORT_SYMBOL(mipi_dsi_create_packet);

 /**
- * mipi_dsi_dcs_write - send DCS write command
- * @dsi: DSI device
- * @data: pointer to the command followed by parameters
- * @len: length of @data
+ * mipi_dsi_dcs_write_buffer() - transmit a DCS command with payload
+ * @dsi: DSI peripheral device
+ * @data: buffer containing data to be transmitted
+ * @len: size of transmission buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the command payload length.
+ *
+ * Return: The number of bytes successfully transmitted or a negative error
+ * code on failure.
  */
-ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data,
-   size_t len)
+ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
+ const void *data, size_t len)
 {
struct mipi_dsi_msg msg = {
.channel = dsi->channel,
@@ -275,12 +281,15 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, 
const void *data,
switch (len) {
case 0:
return -EINVAL;
+
case 1:
msg.type = MIPI_DSI_DCS_SHORT_WRITE;
break;
+
case 2:
msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
break;
+
default:
msg.type = MIPI_DSI_DCS_LONG_WRITE;
break;
@@ -288,16 +297,60 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, 
const void *data,

return mipi_dsi_device_transfer(dsi, );
 }
+EXPORT_SYMBOL(mipi_dsi_dcs_write_buffer);
+
+/**
+ * mipi_dsi_dcs_write() - send DCS write command
+ * @dsi: DSI peripheral device
+ * @cmd: DCS command
+ * @data: buffer containing the command payload
+ * @len: command payload length
+ *
+ * This function will automatically choose the right data type depending on
+ * the command payload length.
+ *
+ * Return: The number of bytes successfully transmitted or a negative error
+ * code on failure.
+ */
+ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
+  const void *data, size_t len)
+{
+   ssize_t err;
+   size_t size;
+   u8 *tx;
+
+   if (len > 0) {
+   size = 1 + len;
+
+   tx = kmalloc(size, GFP_KERNEL);
+   if (!tx)
+   return -ENOMEM;
+
+   /* concatenate the DCS command byte and the payload */
+   tx[0] = cmd;
+   memcpy([1], data, len);
+   } else {
+   tx = 
+   size = 1;
+   }
+
+   err = mipi_dsi_dcs_write_buffer(dsi, tx, size);
+
+   if (len > 0)
+   kfree(tx);
+
+   return err;
+}
 EXPORT_SYMBOL(mipi_dsi_dcs_write);

 /**
- * mipi_dsi_dcs_read - send DCS read request command
- * @dsi: DSI device
- * @cmd: DCS read command
- * @data: pointer to read buffer
- * @len: length of @data
+ * mipi_dsi_dcs_read() - send DCS read request command
+ * @dsi: DSI peripheral device
+ * @cmd: DCS command
+ * @data: buffer in which to receive data
+ * @len: size of receive buffer
  *
- * Function returns number of read bytes or error code.
+ * Return: The number of bytes read or a negative error code on failure.
  */
 ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
  size_t len)
diff --git a/drivers/gpu/drm/panel/panel-s6e8aa0.c 
b/drivers/gpu/drm/panel/panel-s6e8aa0.c
index b5217fe37f02..0f85a7c37687 100644
--- a/drivers/gpu/drm/panel/panel-s6e8aa0.c
+++ b/drivers/gpu/drm/panel/panel-s6e8aa0.c
@@ -141,7 +141,7 @@ static void 

[PATCH v4 02/16] drm/dsi: Add DSI transfer helper

[Thierry Reding]

From: Thierry Reding 

A common pattern is starting to emerge for higher level transfer
helpers. Create a new helper that encapsulates this pattern and avoids
code duplication.

Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 76e81aba8220..89a228b4eacc 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -198,6 +198,20 @@ int mipi_dsi_detach(struct mipi_dsi_device *dsi)
 }
 EXPORT_SYMBOL(mipi_dsi_detach);

+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+   struct mipi_dsi_msg *msg)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->transfer)
+   return -ENOSYS;
+
+   if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+   msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+   return ops->transfer(dsi->host, msg);
+}
+
 /**
  * mipi_dsi_create_packet - create a packet from a message according to the
  * DSI protocol
@@ -252,16 +266,12 @@ EXPORT_SYMBOL(mipi_dsi_create_packet);
 ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data,
size_t len)
 {
-   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
struct mipi_dsi_msg msg = {
.channel = dsi->channel,
.tx_buf = data,
.tx_len = len
};

-   if (!ops || !ops->transfer)
-   return -ENOSYS;
-
switch (len) {
case 0:
return -EINVAL;
@@ -276,10 +286,7 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, 
const void *data,
break;
}

-   if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
-   msg.flags = MIPI_DSI_MSG_USE_LPM;
-
-   return ops->transfer(dsi->host, );
+   return mipi_dsi_device_transfer(dsi, );
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_write);

@@ -295,7 +302,6 @@ EXPORT_SYMBOL(mipi_dsi_dcs_write);
 ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
  size_t len)
 {
-   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
struct mipi_dsi_msg msg = {
.channel = dsi->channel,
.type = MIPI_DSI_DCS_READ,
@@ -305,13 +311,7 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 
cmd, void *data,
.rx_len = len
};

-   if (!ops || !ops->transfer)
-   return -ENOSYS;
-
-   if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
-   msg.flags = MIPI_DSI_MSG_USE_LPM;
-
-   return ops->transfer(dsi->host, );
+   return mipi_dsi_device_transfer(dsi, );
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_read);

-- 
2.1.2

[PATCH v4 01/16] drm/dsi: Add message to packet translator

[Thierry Reding]

From: Thierry Reding 

This commit introduces a new function, mipi_dsi_create_packet(), which
converts from a MIPI DSI message to a MIPI DSI packet. The MIPI DSI
packet is as close to the protocol described in the DSI specification as
possible and useful in drivers that need to write a DSI packet into a
FIFO to send a message off to the peripheral.

Suggested-by: Andrzej Hajda 
Signed-off-by: Thierry Reding 
---
 drivers/gpu/drm/drm_mipi_dsi.c | 45 ++
 include/drm/drm_mipi_dsi.h | 18 +
 2 files changed, 63 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index eb6dfe52cab2..76e81aba8220 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -199,6 +199,51 @@ int mipi_dsi_detach(struct mipi_dsi_device *dsi)
 EXPORT_SYMBOL(mipi_dsi_detach);

 /**
+ * mipi_dsi_create_packet - create a packet from a message according to the
+ * DSI protocol
+ * @packet: pointer to a DSI packet structure
+ * @msg: message to translate into a packet
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+  const struct mipi_dsi_msg *msg)
+{
+   const u8 *tx = msg->tx_buf;
+
+   if (!packet || !msg)
+   return -EINVAL;
+
+   memset(packet, 0, sizeof(*packet));
+   packet->header[0] = ((msg->channel & 0x3) << 6) | (msg->type & 0x3f);
+
+   /* TODO: compute ECC if hardware support is not available */
+
+   /*
+* Long write packets contain the word count in header bytes 1 and 2.
+* The payload follows the header and is word count bytes long.
+*
+* Short write packets encode up to two parameters in header bytes 1
+* and 2.
+*/
+   if (msg->tx_len > 2) {
+   packet->header[1] = (msg->tx_len >> 0) & 0xff;
+   packet->header[2] = (msg->tx_len >> 8) & 0xff;
+
+   packet->payload_length = msg->tx_len;
+   packet->payload = tx;
+   } else {
+   packet->header[1] = (msg->tx_len > 0) ? tx[0] : 0;
+   packet->header[2] = (msg->tx_len > 1) ? tx[1] : 0;
+   }
+
+   packet->size = sizeof(packet->header) + packet->payload_length;
+
+   return 0;
+}
+EXPORT_SYMBOL(mipi_dsi_create_packet);
+
+/**
  * mipi_dsi_dcs_write - send DCS write command
  * @dsi: DSI device
  * @data: pointer to the command followed by parameters
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 8569dc5a1026..663aa68826f4 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -44,6 +44,24 @@ struct mipi_dsi_msg {
 };

 /**
+ * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
+ * @size: size (in bytes) of the packet
+ * @header: the four bytes that make up the header (Data ID, Word Count or
+ * Packet Data, and ECC)
+ * @payload_length: number of bytes in the payload
+ * @payload: a pointer to a buffer containing the payload, if any
+ */
+struct mipi_dsi_packet {
+   size_t size;
+   u8 header[4];
+   size_t payload_length;
+   const u8 *payload;
+};
+
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+  const struct mipi_dsi_msg *msg);
+
+/**
  * struct mipi_dsi_host_ops - DSI bus operations
  * @attach: attach DSI device to DSI host
  * @detach: detach DSI device from DSI host
-- 
2.1.2

[PATCH] drm: Per-plane locking

[Daniel Vetter]

On Mon, Nov 3, 2014 at 10:02 AM, Daniel Vetter  
wrote:
> On Mon, Nov 3, 2014 at 9:42 AM, Ville Syrjälä
>  wrote:
>> Were you planning to convert setplane over to this?
>
> Well yeah, I've forgotten about that one ... Will fix and resend.

Hm, update_plane isn't really a big problem, but disable_plane is -
the crazy trick I pull in the atomic helpers to fish out the acquire
context for atomic locking gets a bit in the way. I need to ponder
this again a bit. So smells more like a separate patch now.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH] drm: Per-plane locking

[Daniel Vetter]

On Mon, Nov 3, 2014 at 9:42 AM, Ville Syrjälä
 wrote:
> Were you planning to convert setplane over to this?

Well yeah, I've forgotten about that one ... Will fix and resend.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[Bug 83611] Kernel NULL pointer dereference when using tlp on a laptop with AMD video card.

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=83611

fhimpe at telenet.be changed:

   What|Removed |Added

 CC||fhimpe at telenet.be

--- Comment #4 from fhimpe at telenet.be ---
I experienced the same bug with 3.17.2, triggered by laptop-mode-tools:
https://bugs.freedesktop.org/show_bug.cgi?id=85771
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=767742

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