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[PATCH 2/2] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support
On 17.05.2015 21:03, Vladimir Zapolskiy wrote:
> The change adds support of internal HDMI I2C master controller, this
> subdevice is used by default, if "ddc-i2c-bus" DT property is omitted.
>
> The main purpose of this functionality is to support reading EDID from
> an HDMI monitor on boards, which don't have an I2C bus connected to
> DDC pins.
>
> Signed-off-by: Vladimir Zapolskiy
> ---
> drivers/gpu/drm/bridge/dw_hdmi.c | 332
> ++-
> 1 file changed, 326 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c
> b/drivers/gpu/drm/bridge/dw_hdmi.c
> index 49cafb6..2a52449 100644
> --- a/drivers/gpu/drm/bridge/dw_hdmi.c
> +++ b/drivers/gpu/drm/bridge/dw_hdmi.c
[snip]
> + ret = i2c_add_adapter(adap);
> + if (ret) {
> + dev_warn(hdmi->dev, "cannot add %s I2C adapter\n", adap->name);
> + devm_kfree(hdmi->i2c);
Immediately found a compilation problem in last minute update, I'll
resend the change, sorry.
> + hdmi->i2c = NULL;
> + return ERR_PTR(ret);
> + }
> +
--
With best wishes,
Vladimir
[PATCH 2/2] drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support
The change adds support of internal HDMI I2C master controller, this
subdevice is used by default, if "ddc-i2c-bus" DT property is omitted.
The main purpose of this functionality is to support reading EDID from
an HDMI monitor on boards, which don't have an I2C bus connected to
DDC pins.
Signed-off-by: Vladimir Zapolskiy
---
drivers/gpu/drm/bridge/dw_hdmi.c | 332 ++-
1 file changed, 326 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 49cafb6..2a52449 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -1,15 +1,17 @@
/*
+ * DesignWare High-Definition Multimedia Interface (HDMI) driver
+ *
+ * Copyright (C) 2013-2015 Mentor Graphics Inc.
* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010, Guennadi Liakhovetski
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
- * Designware High-Definition Multimedia Interface (HDMI) driver
- *
- * Copyright (C) 2010, Guennadi Liakhovetski
*/
+
#include
#include
#include
@@ -28,6 +30,26 @@
#include "dw_hdmi.h"
+/* HDMI_IH_I2CM_STAT0 and HDMI_IH_MUTE_I2CM_STAT0 register bits */
+#define HDMI_IH_I2CM_STAT0_ERROR BIT(0)
+#define HDMI_IH_I2CM_STAT0_DONEBIT(1)
+
+/* HDMI_I2CM_OPERATION register bits */
+#define HDMI_I2CM_OPERATION_READ BIT(0)
+#define HDMI_I2CM_OPERATION_READ_EXT BIT(1)
+#define HDMI_I2CM_OPERATION_WRITE BIT(4)
+
+/* HDMI_I2CM_INT register bits */
+#define HDMI_I2CM_INT_DONE_MASKBIT(2)
+#define HDMI_I2CM_INT_DONE_POL BIT(3)
+
+/* HDMI_I2CM_CTLINT register bits */
+#define HDMI_I2CM_CTLINT_ARB_MASK BIT(2)
+#define HDMI_I2CM_CTLINT_ARB_POL BIT(3)
+#define HDMI_I2CM_CTLINT_NAC_MASK BIT(6)
+#define HDMI_I2CM_CTLINT_NAC_POL BIT(7)
+
+
#define HDMI_EDID_LEN 512
#define RGB0
@@ -102,6 +124,17 @@ struct hdmi_data_info {
struct hdmi_vmode video_mode;
};
+struct dw_hdmi_i2c {
+ struct i2c_adapter adap;
+
+ spinlock_t lock;
+ struct completion cmp;
+ u8 stat;
+
+ u8 slave_reg;
+ boolis_regaddr;
+};
+
struct dw_hdmi {
struct drm_connector connector;
struct drm_encoder *encoder;
@@ -111,6 +144,7 @@ struct dw_hdmi {
struct device *dev;
struct clk *isfr_clk;
struct clk *iahb_clk;
+ struct dw_hdmi_i2c *i2c;
struct hdmi_data_info hdmi_data;
const struct dw_hdmi_plat_data *plat_data;
@@ -179,6 +213,242 @@ static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8
data, unsigned int reg,
hdmi_modb(hdmi, data << shift, mask, reg);
}
+static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(>i2c->lock, flags);
+
+ /* Set Fast Mode speed */
+ hdmi_writeb(hdmi, 0x0b, HDMI_I2CM_DIV);
+
+ /* Software reset */
+ hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
+
+ /* Set done, not acknowledged and arbitration interrupt polarities */
+ hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
+ hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
+ HDMI_I2CM_CTLINT);
+
+ /* Clear DONE and ERROR interrupts */
+ hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+ HDMI_IH_I2CM_STAT0);
+
+ /* Mute DONE and ERROR interrupts */
+ hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+ HDMI_IH_MUTE_I2CM_STAT0);
+
+ spin_unlock_irqrestore(>i2c->lock, flags);
+}
+
+static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
+ unsigned char *buf, int length)
+{
+ int stat;
+ unsigned long flags;
+ struct dw_hdmi_i2c *i2c = hdmi->i2c;
+
+ spin_lock_irqsave(>lock, flags);
+
+ if (!i2c->is_regaddr) {
+ dev_dbg(hdmi->dev, "set read register address to 0\n");
+ i2c->slave_reg = 0x00;
+ i2c->is_regaddr = true;
+ }
+
+ while (length--) {
+ hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
+ hdmi_writeb(hdmi,
+ HDMI_I2CM_OPERATION_READ, HDMI_I2CM_OPERATION);
+ i2c->stat = 0;
+
+ spin_unlock_irqrestore(>lock, flags);
+
+ stat = wait_for_completion_interruptible_timeout(>cmp,
+HZ / 10);
+ if (!stat)
+
[PATCH 1/2] drm: bridge/dw_hdmi: fix register I2CM_ADDRESS register name
I2CM_ADDRESS became a MESS, fix it, also change guarding define
to __DW_HDMI_H__ , since the driver is not IMX specific.
Signed-off-by: Vladimir Zapolskiy
---
drivers/gpu/drm/bridge/dw_hdmi.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/dw_hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h
index 175dbc8..ee7f7ed 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.h
+++ b/drivers/gpu/drm/bridge/dw_hdmi.h
@@ -7,8 +7,8 @@
* (at your option) any later version.
*/
-#ifndef __IMX_HDMI_H__
-#define __IMX_HDMI_H__
+#ifndef __DW_HDMI_H__
+#define __DW_HDMI_H__
/* Identification Registers */
#define HDMI_DESIGN_ID 0x
@@ -525,7 +525,7 @@
/* I2C Master Registers (E-DDC) */
#define HDMI_I2CM_SLAVE 0x7E00
-#define HDMI_I2CMESS0x7E01
+#define HDMI_I2CM_ADDRESS 0x7E01
#define HDMI_I2CM_DATAO 0x7E02
#define HDMI_I2CM_DATAI 0x7E03
#define HDMI_I2CM_OPERATION 0x7E04
@@ -1031,4 +1031,4 @@ enum {
HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
};
-#endif /* __IMX_HDMI_H__ */
+#endif /* __DW_HDMI_H__ */
--
2.1.4
[PATCH 0/2] drm: bridge/dw_hdmi: add I2C bus adapter support
This change adds support of internal HDMI I2C master controller,
originally the controller has its own separate driver written from
scratch http://patchwork.ozlabs.org/patch/405100 but due to shared
register space and interrupt with HDMI driver, it makes sense to
merge the code of both drivers.
The main purpose of this functionality is to support reading EDID from
an HDMI monitor on boards, which don't have an I2C bus connected to
DDC pins.
To use/test the change "ddc-i2c-bus" DT property must be omitted and
pin settings must be updated accordingly, here is an example for
iMX6 SabreLite:
---8<---
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 0b28a9d..22d4431 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -174,7 +174,6 @@
};
{
- ddc-i2c-bus = <>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_hdmi>;
status = "okay";
};
@@ -193,13 +192,6 @@
};
};
- {
- clock-frequency = <10>;
- pinctrl-names = "default";
- pinctrl-0 = <_i2c2>;
- status = "okay";
-};
-
{
clock-frequency = <10>;
pinctrl-names = "default";
@@ -284,10 +276,10 @@
>;
};
- pinctrl_i2c2: i2c2grp {
+ pinctrl_hdmi: hdmigrp {
fsl,pins = <
- MX6QDL_PAD_KEY_COL3__I2C2_SCL
0x4001b8b1
- MX6QDL_PAD_KEY_ROW3__I2C2_SDA
0x4001b8b1
+ MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL
0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA
0x4001b8b1
>;
};
---8<---
Vladimir Zapolskiy (2):
drm: bridge: fix register I2CM_ADDRESS register name
drm: bridge: add dw hdmi i2c bus adapter support
drivers/gpu/drm/bridge/dw_hdmi.c | 332 ++-
drivers/gpu/drm/bridge/dw_hdmi.h | 8 +-
2 files changed, 330 insertions(+), 10 deletions(-)
--
2.1.4
[BUG/REGRESSION] Radeon HDMI casuses oops on Acube Sam460ex amcc 460ex power board
[ 34.074334] NIP: c04a51bc LR: c04a546c CTR: c03e5050 [ 34.079578] REGS: ede8bc30 TRAP: 0300 Not tainted (4.0.3-Sam460ex) [ 34.086381] MSR: 00029000 <CE,EE,ME> CR: 20004422 XER: [ 34.092944] DEAR: 0008 ESR: GPR00: c04a5438 ede8bce0 edee4c60 eea84000 c071 GPR08: eeac0400 ede8bce0 2000 b7a55afc b80efab0 b80ee530 GPR16: 6f23c730 ede8be18 c03add44 eeac0578 0001 4000 GPR24: 4000 c0719b98 fff2 0001 eeb61200 eea84000 eea8df00 [ 34.127485] NIP [c04a51bc] radeon_audio_enable+0x4/0x18 [ 34.133000] LR [c04a546c] radeon_audio_detect+0xd4/0x104 [ 34.138604] Call Trace: [ 34.141185] [ede8bce0] [c04a5438] radeon_audio_detect+0xa0/0x104 (unreliable) [ 34.148771] [ede8bd00] [c03e6958] radeon_dvi_detect+0x390/0x3b4 [ 34.155046] [ede8bd30] [c0391cec] drm_helper_probe_single_connector_modes_merge_bits+0xf4/0x448 [ 34.164253] [ede8bd70] [c03ade28] drm_mode_getconnector+0xe4/0x334 [ 34.170796] [ede8be10] [c03a0be8] drm_ioctl+0x348/0x464 [ 34.176343] [ede8bed0] [c00ce2e8] do_vfs_ioctl+0x52c/0x6e8 [ 34.182158] [ede8bf20] [c00ce4e4] SyS_ioctl+0x40/0x68 [ 34.187515] [ede8bf40] [c000ab1c] ret_from_syscall+0x0/0x3c [ 34.193417] --- interrupt: c01 at 0x6fb001dc [ 34.193417] LR = 0x6fb00100 [ 34.201216] Instruction dump: [ 34.204368] 8129012c 806a0018 2f89 419e0018 81290004 2f89 419e000c 7d2903a6 [ 34.212674] 4e800420 3860 4e800020 81231cd8 <81290008> 2f89 4d9e0020 7d2903a6 [ 34.376219] ---[ end trace 803e15e46b991816 ]--- [ 34.380843] * Starting Mount filesystems on boot[ OK ] * -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150517/ac1ce10d/attachment.html>
[Bug 90481] Radeon R9 270X gpu lockup in game spec ops: the line.
https://bugs.freedesktop.org/show_bug.cgi?id=90481 --- Comment #2 from Ivan Viktorov --- Created attachment 115859 --> https://bugs.freedesktop.org/attachment.cgi?id=115859=edit kernel log 4.1-rc3 -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150517/cc5c63d4/attachment.html>
[Bug 90481] Radeon R9 270X gpu lockup in game spec ops: the line.
https://bugs.freedesktop.org/show_bug.cgi?id=90481 --- Comment #1 from Ivan Viktorov --- With kernel 4.1.0-rc3 same situation. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150517/9a96b874/attachment.html>
[Bug 90370] [radeonsi] dota2 suffers from many glitches
https://bugs.freedesktop.org/show_bug.cgi?id=90370 --- Comment #15 from Sylvain BERTRAND --- Ok, I nailed down the choppyness: source engine games do compile a lot of shaders live... then a "safe" llvm won't do and will cripple performance. You must maximize shader compilation performance with threading and aggressive compilation options for llvm. Vulkan spir-v will be more than welcome. One down. One to go. Those graphical glitches are also into portal2, but less visible and more rare. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20150517/bd6adc1c/attachment.html>
