[radeon agp] add blacklist for thinkpad T40p
Thinkpad T40p needs agpmode 1.
Signed-off-by: Pavel Machek
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c
b/drivers/gpu/drm/radeon/radeon_agp.c
index fe994aa..c77d349 100644
--- a/drivers/gpu/drm/radeon/radeon_agp.c
+++ b/drivers/gpu/drm/radeon/radeon_agp.c
@@ -54,6 +54,9 @@ static struct radeon_agpmode_quirk
radeon_agpmode_quirk_list[] = {
/* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1
(lp #195051) */
{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,
PCI_VENDOR_ID_IBM, 0x0550, 1},
+ /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon
9000] needs AGPMode 1 (Thinkpad T40p) */
+ { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
+ PCI_VENDOR_ID_IBM, 0x054d, 1},
/* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */
{ PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,
PCI_VENDOR_ID_IBM, 0x0530, 1},
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
[radeon r100] when ring test fails, provide users with option to test
Ring test failure is often caused by too high agpmode. Tell the user
what to try.
Signed-off-by: Pavel Machek
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 238b13f..32b1917 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3665,7 +3665,7 @@ int r100_ring_test(struct radeon_device *rdev, struct
radeon_ring *ring)
if (i < rdev->usec_timeout) {
DRM_INFO("ring test succeeded in %d usecs\n", i);
} else {
- DRM_ERROR("radeon: ring test failed (scratch(0x%04X)=0x%08X)\n",
+ DRM_ERROR("radeon: ring test failed (scratch(0x%04X)=0x%08X),
try radeon.agpmode=1?\n",
scratch, tmp);
r = -EINVAL;
}
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
[Bug 86320] Monitor on DisplayPort doesn't wake up
https://bugs.freedesktop.org/show_bug.cgi?id=86320 --- Comment #15 from Jan Holthuis --- #93021 is possibly related or a duplicate. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/6dfe7508/attachment.html>
[PATCH v2 10/10] drm/hisilicon: Add support for external bridge
Add support for external HDMI bridge.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 51
1 file changed, 51 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
index 066e08d..9e056db 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
@@ -78,6 +78,7 @@ struct dsi_hw_ctx {
struct hisi_dsi {
struct drm_encoder encoder;
+ struct drm_bridge *bridge;
struct mipi_dsi_host host;
struct drm_display_mode cur_mode;
struct dsi_hw_ctx *ctx;
@@ -671,6 +672,25 @@ static int dsi_host_init(struct device *dev, struct
hisi_dsi *dsi)
return 0;
}
+static int dsi_bridge_init(struct drm_device *dev, struct hisi_dsi *dsi)
+{
+ struct drm_encoder *encoder = &dsi->encoder;
+ struct drm_bridge *bridge = dsi->bridge;
+ int ret;
+
+ /* associate the bridge to dsi encoder */
+ encoder->bridge = bridge;
+ bridge->encoder = encoder;
+
+ ret = drm_bridge_attach(dev, bridge);
+ if (ret) {
+ DRM_ERROR("failed to attach exteranl bridge\n");
+ return ret;
+ }
+
+ return 0;
+}
+
static int dsi_bind(struct device *dev, struct device *master, void *data)
{
struct dsi_data *ddata = dev_get_drvdata(dev);
@@ -686,6 +706,10 @@ static int dsi_bind(struct device *dev, struct device
*master, void *data)
if (ret)
return ret;
+ ret = dsi_bridge_init(drm_dev, dsi);
+ if (ret)
+ return ret;
+
return 0;
}
@@ -702,8 +726,35 @@ static const struct component_ops dsi_ops = {
static int dsi_parse_dt(struct platform_device *pdev, struct hisi_dsi *dsi)
{
struct dsi_hw_ctx *ctx = dsi->ctx;
+ struct device_node *np = pdev->dev.of_node;
+ struct device_node *endpoint, *bridge_node;
+ struct drm_bridge *bridge;
struct resource *res;
+ /*
+* Get the endpoint node. In our case, dsi has one output port
+* to which the external HDMI bridge is connected.
+*/
+ endpoint = of_graph_get_next_endpoint(np, NULL);
+ if (!endpoint) {
+ DRM_ERROR("no valid endpoint node\n");
+ return -ENODEV;
+ }
+ of_node_put(endpoint);
+
+ bridge_node = of_graph_get_remote_port_parent(endpoint);
+ if (!bridge_node) {
+ DRM_ERROR("no valid bridge node\n");
+ return -ENODEV;
+ }
+ of_node_put(bridge_node);
+
+ bridge = of_drm_find_bridge(bridge_node);
+ if (!bridge) {
+ DRM_INFO("wait for external HDMI bridge driver.\n");
+ return -EPROBE_DEFER;
+ }
+ dsi->bridge = bridge;
ctx->dsi_cfg_clk = devm_clk_get(&pdev->dev, "pclk_dsi");
if (IS_ERR(ctx->dsi_cfg_clk)) {
--
1.9.1
[PATCH v2 09/10] drm/hisilicon: Add dsi host driver
Add dsi host driver for hi6220 SoC.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 50
1 file changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
index 7a6cf66..066e08d 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
@@ -78,6 +78,7 @@ struct dsi_hw_ctx {
struct hisi_dsi {
struct drm_encoder encoder;
+ struct mipi_dsi_host host;
struct drm_display_mode cur_mode;
struct dsi_hw_ctx *ctx;
struct mipi_phy_register phy;
@@ -625,6 +626,51 @@ static int hisi_drm_encoder_init(struct drm_device *dev,
return 0;
}
+static int dsi_host_attach(struct mipi_dsi_host *host,
+ struct mipi_dsi_device *mdsi)
+{
+ struct hisi_dsi *dsi = host_to_dsi(host);
+
+ if (mdsi->lanes < 1 || mdsi->lanes > 4) {
+ DRM_ERROR("dsi device params invalid\n");
+ return -EINVAL;
+ }
+
+ dsi->lanes = mdsi->lanes;
+ dsi->format = mdsi->format;
+ dsi->mode_flags = mdsi->mode_flags;
+
+ return 0;
+}
+
+static int dsi_host_detach(struct mipi_dsi_host *host,
+ struct mipi_dsi_device *mdsi)
+{
+ /* do nothing */
+ return 0;
+}
+
+static struct mipi_dsi_host_ops dsi_host_ops = {
+ .attach = dsi_host_attach,
+ .detach = dsi_host_detach,
+};
+
+static int dsi_host_init(struct device *dev, struct hisi_dsi *dsi)
+{
+ struct mipi_dsi_host *host = &dsi->host;
+ int ret;
+
+ host->dev = dev;
+ host->ops = &dsi_host_ops;
+ ret = mipi_dsi_host_register(host);
+ if (ret) {
+ DRM_ERROR("failed to register dsi host\n");
+ return ret;
+ }
+
+ return 0;
+}
+
static int dsi_bind(struct device *dev, struct device *master, void *data)
{
struct dsi_data *ddata = dev_get_drvdata(dev);
@@ -636,6 +682,10 @@ static int dsi_bind(struct device *dev, struct device
*master, void *data)
if (ret)
return ret;
+ ret = dsi_host_init(dev, dsi);
+ if (ret)
+ return ret;
+
return 0;
}
--
1.9.1
[PATCH v2 08/10] drm/hisilicon: Add dsi encoder driver
Add dsi encoder driver for hi6220 SoC.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
drivers/gpu/drm/hisilicon/Kconfig| 1 +
drivers/gpu/drm/hisilicon/Makefile | 3 +-
drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 728 +++
drivers/gpu/drm/hisilicon/hisi_dsi_reg.h | 89
4 files changed, 820 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
create mode 100644 drivers/gpu/drm/hisilicon/hisi_dsi_reg.h
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
index 70aa8d1..f1c33c2 100644
--- a/drivers/gpu/drm/hisilicon/Kconfig
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -4,6 +4,7 @@ config DRM_HISI
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
+ select DRM_MIPI_DSI
help
Choose this option if you have a hisilicon chipsets(hi6220).
If M is selected the module will be called hisi-drm.
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
index 3433c8b..5083c1f 100644
--- a/drivers/gpu/drm/hisilicon/Makefile
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -1,4 +1,5 @@
hisi-drm-y := hisi_drm_drv.o \
- hisi_drm_ade.o
+ hisi_drm_ade.o \
+ hisi_drm_dsi.o
obj-$(CONFIG_DRM_HISI) += hisi-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
new file mode 100644
index 000..7a6cf66
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
@@ -0,0 +1,728 @@
+/*
+ * Hisilicon hi6220 SoC dsi driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Author:
+ * Xinliang Liu
+ * Xinliang Liu
+ * Xinwei Kong
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "hisi_dsi_reg.h"
+
+#define MAX_TX_ESC_CLK(10)
+#define ROUND(x, y) ((x) / (y) + ((x) % (y) * 10 / (y) >= 5 ? 1 : 0))
+#define DEFAULT_MIPI_CLK_RATE 1920
+#define DEFAULT_MIPI_CLK_PERIOD_PS (10 / (DEFAULT_MIPI_CLK_RATE /
1000))
+#define R(x) ((u32)u64)(x) * (u64)1000 * (u64)mode->clock) / \
+ phy->lane_byte_clk_kHz)))
+
+#define encoder_to_dsi(encoder) \
+ container_of(encoder, struct hisi_dsi, encoder)
+#define host_to_dsi(host) \
+ container_of(host, struct hisi_dsi, host)
+
+struct mipi_phy_register {
+ u32 clk_t_lpx;
+ u32 clk_t_hs_prepare;
+ u32 clk_t_hs_zero;
+ u32 clk_t_hs_trial;
+ u32 clk_t_wakeup;
+ u32 data_t_lpx;
+ u32 data_t_hs_prepare;
+ u32 data_t_hs_zero;
+ u32 data_t_hs_trial;
+ u32 data_t_ta_go;
+ u32 data_t_ta_get;
+ u32 data_t_wakeup;
+ u32 hstx_ckg_sel;
+ u32 pll_fbd_div5f;
+ u32 pll_fbd_div1f;
+ u32 pll_fbd_2p;
+ u32 pll_enbwt;
+ u32 pll_fbd_p;
+ u32 pll_fbd_s;
+ u32 pll_pre_div1p;
+ u32 pll_pre_p;
+ u32 pll_vco_750M;
+ u32 pll_lpf_rs;
+ u32 pll_lpf_cs;
+ u32 clklp2hs_time;
+ u32 clkhs2lp_time;
+ u32 lp2hs_time;
+ u32 hs2lp_time;
+ u32 clk_to_data_delay;
+ u32 data_to_clk_delay;
+ u32 lane_byte_clk_kHz;
+ u32 clk_division;
+};
+
+struct dsi_hw_ctx {
+ void __iomem *base;
+ struct clk *dsi_cfg_clk;
+};
+
+struct hisi_dsi {
+ struct drm_encoder encoder;
+ struct drm_display_mode cur_mode;
+ struct dsi_hw_ctx *ctx;
+ struct mipi_phy_register phy;
+
+ u32 lanes;
+ enum mipi_dsi_pixel_format format;
+ unsigned long mode_flags;
+ bool enable;
+};
+
+struct dsi_data {
+ struct hisi_dsi dsi;
+ struct dsi_hw_ctx ctx;
+};
+
+struct dsi_phy_seq_info {
+ u32 min_range_kHz;
+ u32 max_range_kHz;
+ u32 pll_vco_750M;
+ u32 hstx_ckg_sel;
+};
+
+static const struct dsi_phy_seq_info dphy_seq_info[] = {
+ { 46000,62000, 1,7 },
+ { 62000,93000, 0,7 },
+ { 93000, 125000, 1,6 },
+ { 125000, 187000, 0,6 },
+ { 187000, 25, 1,5 },
+ { 25, 375000, 0,5 },
+ { 375000, 50, 1,4 },
+ { 50, 75, 0,4 },
+ { 75, 100, 1,0 },
+ { 100, 150, 0,0 }
+};
+
+static void set_dsi_phy_rate_equal_or_faster(u32 phy_freq_kHz,
+struct mipi_phy_register *phy)
+{
+ u32 ui = 0;
+ u32 cfg_clk_ps = DEFAULT_MIPI_CLK_PERIOD_PS;
+ u32 i = 0;
+ u32 q_pll = 1;
+ u32 m_pll = 0;
+ u32 n_pll = 0;
+ u32 r_pll = 1;
+ u32 m_n = 0;
+ u32 m_n_int = 0;
+ u64 f_kHz;
+ u64
[PATCH v2 07/10] drm/hisilicon: Add cma fbdev and hotplug
Add cma Fbdev, Fbdev is legency and optional, you can enable/disable it by
configuring DRM_FBDEV_EMULATION.
Add hotplug.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 34
drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 3 +++
2 files changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
index 13f59aa..76eb711 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include "hisi_drm_ade.h"
#include "hisi_drm_drv.h"
@@ -30,6 +31,13 @@ static int hisi_drm_unload(struct drm_device *dev)
{
struct hisi_drm_private *priv = dev->dev_private;
+#ifdef CONFIG_DRM_FBDEV_EMULATION
+ if (priv->fbdev) {
+ drm_fbdev_cma_fini(priv->fbdev);
+ priv->fbdev = NULL;
+ }
+#endif
+ drm_kms_helper_poll_fini(dev);
drm_vblank_cleanup(dev);
drm_mode_config_cleanup(dev);
devm_kfree(dev->dev, priv);
@@ -38,8 +46,28 @@ static int hisi_drm_unload(struct drm_device *dev)
return 0;
}
+#ifdef CONFIG_DRM_FBDEV_EMULATION
+static void hisi_fbdev_output_poll_changed(struct drm_device *dev)
+{
+ struct hisi_drm_private *priv = dev->dev_private;
+
+ if (priv->fbdev) {
+ drm_fbdev_cma_hotplug_event(priv->fbdev);
+ } else {
+ priv->fbdev = drm_fbdev_cma_init(dev, 32,
+ dev->mode_config.num_crtc,
+ dev->mode_config.num_connector);
+ if (IS_ERR(priv->fbdev))
+ priv->fbdev = NULL;
+ }
+}
+#endif
+
static const struct drm_mode_config_funcs hisi_drm_mode_config_funcs = {
.fb_create = drm_fb_cma_create,
+#ifdef CONFIG_DRM_FBDEV_EMULATION
+ .output_poll_changed = hisi_fbdev_output_poll_changed,
+#endif
.atomic_check = drm_atomic_helper_check,
.atomic_commit = drm_atomic_helper_commit,
};
@@ -90,6 +118,12 @@ static int hisi_drm_load(struct drm_device *dev, unsigned
long flags)
/* reset all the states of crtc/plane/encoder/connector */
drm_mode_config_reset(dev);
+ /* init kms poll for handling hpd */
+ drm_kms_helper_poll_init(dev);
+
+ /* force detection after connectors init */
+ (void)drm_helper_hpd_irq_event(dev);
+
return 0;
err_unbind_all:
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.h
b/drivers/gpu/drm/hisilicon/hisi_drm_drv.h
index a10229e..984121f 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.h
@@ -11,6 +11,9 @@
#define __HISI_DRM_DRV_H__
struct hisi_drm_private {
+#ifdef CONFIG_DRM_FBDEV_EMULATION
+ struct drm_fbdev_cma *fbdev;
+#endif
};
#endif /* __HISI_DRM_DRV_H__ */
--
1.9.1
[PATCH v2 06/10] drm/hisilicon: Add vblank feature
Add vblank handle for ADE.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
drivers/gpu/drm/hisilicon/hisi_drm_ade.c | 78
drivers/gpu/drm/hisilicon/hisi_drm_ade.h | 16 +++
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 19 +++-
3 files changed, 112 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_ade.h
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
b/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
index b0976c3..acb11e7 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
@@ -267,7 +267,79 @@ static void ade_power_down(struct ade_hw_ctx *ctx)
ctx->power_on = false;
}
+static struct drm_crtc *hisi_get_crtc_from_index(struct drm_device *dev,
+unsigned int index)
+{
+ unsigned int index_tmp = 0;
+ struct drm_crtc *crtc;
+
+ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+ if (index_tmp == index)
+ return crtc;
+
+ index_tmp++;
+ }
+
+ WARN_ON(true);
+}
+
+int ade_enable_vblank(struct drm_device *dev, int crtc_index)
+{
+ struct drm_crtc *crtc = hisi_get_crtc_from_index(dev, crtc_index);
+ struct ade_crtc *acrtc = to_ade_crtc(crtc);
+ struct ade_hw_ctx *ctx = acrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 intr_en;
+
+ DRM_INFO("enable_vblank enter.\n");
+ if (!ctx->power_on)
+ (void)ade_power_up(ctx);
+
+ intr_en = readl(base + LDI_INT_EN);
+ intr_en |= LDI_ISR_FRAME_END_INT;
+ writel(intr_en, base + LDI_INT_EN);
+ return 0;
+}
+
+void ade_disable_vblank(struct drm_device *dev, int crtc_index)
+{
+ struct drm_crtc *crtc = hisi_get_crtc_from_index(dev, crtc_index);
+ struct ade_crtc *acrtc = to_ade_crtc(crtc);
+ struct ade_hw_ctx *ctx = acrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 intr_en;
+
+ DRM_INFO("disable_vblank enter.\n");
+ if (!ctx->power_on) {
+ DRM_ERROR("power is down! vblank disable fail\n");
+ return;
+ }
+ intr_en = readl(base + LDI_INT_EN);
+ intr_en &= ~LDI_ISR_FRAME_END_INT;
+ writel(intr_en, base + LDI_INT_EN);
+}
+
+static irqreturn_t ade_irq_handler(int irq, void *data)
+{
+ struct ade_crtc *acrtc = data;
+ struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct drm_crtc *crtc = &acrtc->base;
+ struct drm_device *dev = crtc->dev;
+ void __iomem *base = ctx->base;
+ u32 status;
+
+ status = readl(base + LDI_MSK_INT);
+ /* DRM_INFO("LDI IRQ: status=0x%X\n",status); */
+
+ /* vblank irq */
+ if (status & LDI_ISR_FRAME_END_INT) {
+ writel(LDI_ISR_FRAME_END_INT, base + LDI_INT_CLR);
+ drm_handle_vblank(dev, drm_crtc_index(crtc));
+ }
+
+ return IRQ_HANDLED;
+}
/*
* set modules' reset mode: by software or hardware
@@ -858,6 +930,12 @@ static int ade_bind(struct device *dev, struct device
*master, void *data)
if (ret)
return ret;
+ /* vblank irq init */
+ ret = request_irq(ctx->irq, ade_irq_handler, DRIVER_IRQ_SHARED,
+ drm_dev->driver->name, acrtc);
+ if (ret)
+ return ret;
+
return 0;
}
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_ade.h
b/drivers/gpu/drm/hisilicon/hisi_drm_ade.h
new file mode 100644
index 000..d1d7b5d
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_ade.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __HISI_DRM_ADE_H__
+#define __HISI_DRM_ADE_H__
+
+int ade_enable_vblank(struct drm_device *dev, int crtc_index);
+void ade_disable_vblank(struct drm_device *dev, int crtc_index);
+
+#endif
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
index d0eca80..13f59aa 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
@@ -21,6 +21,7 @@
#include
#include
+#include "hisi_drm_ade.h"
#include "hisi_drm_drv.h"
#define DRIVER_NAME"hisi-drm"
@@ -29,6 +30,7 @@ static int hisi_drm_unload(struct drm_device *dev)
{
struct hisi_drm_private *priv = dev->dev_private;
+ drm_vblank_cleanup(dev);
drm_mode_config_cleanup(dev);
devm_kfree(dev->dev, priv);
dev->dev_private = NULL;
@@ -76,11 +78,22 @@ static int hisi_drm_load(struct drm_device *dev, unsigned
long flags)
goto err_mode_config_cleanup;
}
+ /* vblank init */
+ ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
+ if (ret) {
+
[PATCH v2 05/10] drm/hisilicon: Add plane funcs for ADE
Add plane funcs and helper funcs for ADE.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
drivers/gpu/drm/hisilicon/hisi_drm_ade.c | 479 +++
1 file changed, 479 insertions(+)
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
b/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
index d157879..b0976c3 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
@@ -23,15 +23,22 @@
#include
#include
#include
+#include
+#include
+#include
#include "hisi_drm_drv.h"
#include "hisi_ade_reg.h"
#define FORCE_PIXEL_CLOCK_SAME_OR_HIGHER 0
+#define PRIMARY_CH (ADE_CH1)
#define to_ade_crtc(crtc) \
container_of(crtc, struct ade_crtc, base)
+#define to_ade_plane(plane) \
+ container_of(plane, struct ade_plane, base)
+
struct ade_hw_ctx {
void __iomem *base;
void __iomem *media_base;
@@ -53,11 +60,75 @@ struct ade_crtc {
u64 use_mask;
};
+struct ade_plane {
+ struct drm_plane base;
+ void *ctx;
+ u8 ch; /* channel */
+};
+
struct ade_data {
struct ade_crtc acrtc;
+ struct ade_plane aplane[ADE_CH_NUM];
struct ade_hw_ctx ctx;
};
+/* ade-format info: */
+struct ade_format {
+ u32 pixel_format;
+ enum ADE_FORMAT ade_format;
+};
+
+static const struct ade_format ade_formats[] = {
+ /* 16bpp RGB: */
+ { DRM_FORMAT_RGB565, ADE_RGB_565 },
+ { DRM_FORMAT_BGR565, ADE_BGR_565 },
+ /* 24bpp RGB: */
+ { DRM_FORMAT_RGB888, ADE_RGB_888 },
+ { DRM_FORMAT_BGR888, ADE_BGR_888 },
+ /* 32bpp [A]RGB: */
+ { DRM_FORMAT_XRGB, ADE_XRGB_ },
+ { DRM_FORMAT_XBGR, ADE_XBGR_ },
+ { DRM_FORMAT_RGBA, ADE_RGBA_ },
+ { DRM_FORMAT_BGRA, ADE_BGRA_ },
+ { DRM_FORMAT_ARGB, ADE_ARGB_ },
+ { DRM_FORMAT_ABGR, ADE_ABGR_ },
+};
+
+static const u32 channel_formats1[] = {
+ /* channel 1,2,3,4 */
+ DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+ DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+ DRM_FORMAT_ABGR
+};
+
+u32 ade_get_channel_formats(u8 ch, const u32 **formats)
+{
+ switch (ch) {
+ case ADE_CH1:
+ *formats = channel_formats1;
+ return ARRAY_SIZE(channel_formats1);
+ default:
+ DRM_ERROR("no this channel %d\n", ch);
+ *formats = NULL;
+ return 0;
+ }
+}
+
+/* convert from fourcc format to ade format */
+static u32 ade_get_format(u32 pixel_format)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ade_formats); i++)
+ if (ade_formats[i].pixel_format == pixel_format)
+ return ade_formats[i].ade_format;
+
+ /* not found */
+ DRM_ERROR("Not found pixel format!!fourcc_format= %d\n", pixel_format);
+ return ADE_FORMAT_NOT_SUPPORT;
+}
+
static void ade_init(struct ade_hw_ctx *ctx)
{
void __iomem *base = ctx->base;
@@ -377,8 +448,416 @@ static int ade_crtc_init(struct drm_device *dev, struct
drm_crtc *crtc,
return 0;
}
+static void ade_rdma_set(struct ade_crtc *acrtc, struct drm_framebuffer *fb,
+u32 ch, u32 y, u32 in_h, u32 fmt)
+{
+ u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en;
+ struct drm_gem_cma_object *obj = drm_fb_cma_get_gem_obj(fb, 0);
+ struct ade_hw_ctx *ctx = acrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 stride = fb->pitches[0];
+ u32 addr = (u32)obj->paddr + y * stride;
+
+ DRM_DEBUG_DRIVER("rdma%d: (y=%d, height=%d), stride=%d, paddr=0x%x,",
+"addr=0x%x, fb:%dx%d, pixel_format=%d(%s)\n",
+ch + 1, y, in_h, stride, (u32)obj->paddr,
+addr, fb->width, fb->height,
+fmt, drm_get_format_name(fb->pixel_format));
+
+ /* get reg offset */
+ reg_ctrl = RD_CH_CTRL(ch);
+ reg_addr = RD_CH_ADDR(ch);
+ reg_size = RD_CH_SIZE(ch);
+ reg_stride = RD_CH_STRIDE(ch);
+ reg_space = RD_CH_SPACE(ch);
+ reg_en = RD_CH_EN(ch);
+
+ /*
+* TODO: set rotation
+*/
+ writel((fmt << 16) & 0x1f, base + reg_ctrl);
+ writel(addr, base + reg_addr);
+ writel((in_h << 16) | stride, base + reg_size);
+ writel(stride, base + reg_stride);
+ writel(in_h * stride, base + reg_space);
+ writel(1, base + reg_en);
+
+ acrtc->use_mask |= BIT(ADE_CH_RDMA_BIT_OFST + ch);
+}
+
+static void ade_rdma_disable(struct ade_crtc *acrtc, u32 ch)
+{
+ struct ade_hw_ctx *ctx = acrtc->ctx;
+ void __iomem *base = ctx->base;
+ u32 reg_en;
+
+ /* get reg offset */
+ reg_en = RD_CH_EN(ch);
+
+ writel(0, base + reg_en);
+ acrtc->use_mask &= ~BIT(ADE
[PATCH v2 04/10] drm/hisilicon: Add crtc funcs for ADE
Add crtc funcs and helper funcs for ADE. Signed-off-by: Xinliang Liu Signed-off-by: Xinwei Kong Signed-off-by: Andy Green --- drivers/gpu/drm/hisilicon/Makefile | 3 +- drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 490 + drivers/gpu/drm/hisilicon/hisi_drm_ade.c | 511 +++ drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 15 + drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 16 + 5 files changed, 1034 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade_reg.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_ade.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.h diff --git a/drivers/gpu/drm/hisilicon/Makefile b/drivers/gpu/drm/hisilicon/Makefile index 7375456..3433c8b 100644 --- a/drivers/gpu/drm/hisilicon/Makefile +++ b/drivers/gpu/drm/hisilicon/Makefile @@ -1,3 +1,4 @@ -hisi-drm-y := hisi_drm_drv.o +hisi-drm-y := hisi_drm_drv.o \ + hisi_drm_ade.o obj-$(CONFIG_DRM_HISI) += hisi-drm.o diff --git a/drivers/gpu/drm/hisilicon/hisi_ade_reg.h b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h new file mode 100644 index 000..6a7bc46 --- /dev/null +++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h @@ -0,0 +1,490 @@ +/* + * Copyright (c) 2014-2015 Hisilicon Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __HISI_ADE_REG_H__ +#define __HISI_ADE_REG_H__ + +/* + * ADE Registers Offset + */ +#define ADE_CTRL (0x4) +#define ADE_CTRL1 (0x8C) +#define ADE_ROT_SRC_CFG(0x10) +#define ADE_DISP_SRC_CFG (0x18) +#define ADE_WDMA2_SRC_CFG (0x1C) +#define ADE_SEC_OVLY_SRC_CFG (0x20) +#define ADE_WDMA3_SRC_CFG (0x24) +#define ADE_OVLY1_TRANS_CFG(0x2C) +#define ADE_EN (0x100) +#define INTR_MASK_CPU_0(0xC10) +#define INTR_MASK_CPU_1(0xC14) +#define ADE_FRM_DISGARD_CTRL (0xA4) +/* reset and reload regs */ +#define ADE_SOFT_RST_SEL0 (0x78) +#define ADE_SOFT_RST_SEL1 (0x7C) +#define ADE_RELOAD_DIS0(0xAC) +#define ADE_RELOAD_DIS1(0xB0) +#define ADE_CH_RDMA_BIT_OFST (0) +#define ADE_CLIP_BIT_OFST (15) +#define ADE_SCL_BIT_OFST (21) +#define ADE_CTRAN_BIT_OFST (24) +#define ADE_OVLY_BIT_OFST (37) /* 32+5 */ +/* channel regs */ +#define RD_CH_PE(x)(0x1000 + (x) * 0x80) +#define RD_CH_CTRL(x) (0x1004 + (x) * 0x80) +#define RD_CH_ADDR(x) (0x1008 + (x) * 0x80) +#define RD_CH_SIZE(x) (0x100C + (x) * 0x80) +#define RD_CH_STRIDE(x)(0x1010 + (x) * 0x80) +#define RD_CH_SPACE(x) (0x1014 + (x) * 0x80) +#define RD_CH_PARTIAL_SIZE(x) (0x1018 + (x) * 0x80) +#define RD_CH_PARTIAL_SPACE(x) (0x101C + (x) * 0x80) +#define RD_CH_EN(x)(0x1020 + (x) * 0x80) +#define RD_CH_STATUS(x)(0x1024 + (x) * 0x80) +#define RD_CH_DISP_CTRL(0x1404) +#define RD_CH_DISP_ADDR(0x1408) +#define RD_CH_DISP_SIZE(0x140C) +#define RD_CH_DISP_STRIDE (0x1410) +#define RD_CH_DISP_SPACE (0x1414) +#define RD_CH_DISP_EN (0x142C) +/* clip regs */ +#define ADE_CLIP_DISABLE(x)(0x6800 + (x) * 0x100) +#define ADE_CLIP_SIZE0(x) (0x6804 + (x) * 0x100) +#define ADE_CLIP_SIZE1(x) (0x6808 + (x) * 0x100) +#define ADE_CLIP_SIZE2(x) (0x680C + (x) * 0x100) +#define ADE_CLIP_CFG_OK(x) (0x6810 + (x) * 0x100) +/* scale regs */ +#define ADE_SCL1_MUX_CFG (0xC) +#define ADE_SCL2_SRC_CFG (0x14) +#define ADE_SCL3_MUX_CFG (0x8) +#define ADE_SCL_CTRL(x)(0x3000 + (x) * 0x800) +#define ADE_SCL_HSP(x) (0x3004 + (x) * 0x800) +#define ADE_SCL_UV_HSP(x) (0x3008 + (x) * 0x800) +#define ADE_SCL_VSP(x) (0x300C + (x) * 0x800) +#define ADE_SCL_UV_VSP(x) (0x3010 + (x) * 0x800) +#define ADE_SCL_ORES(x)(0x3014 + (x) * 0x800) +#define ADE_SCL_IRES(x)(0x3018 + (x) * 0x800) +#define ADE_SCL_START(x) (0x301C + (x) * 0x800) +#define ADE_SCL_ERR(x) (0x3020 + (x) * 0x800) +#define ADE_SCL_PIX_OFST(x)(0x3024 + (x) * 0x800) +#define ADE_SCL_UV_PIX_OFST(x) (0x3028 + (x) * 0x800) +#define ADE_SCL_COEF_CLR(x)(0x3030 + (x) * 0x800) +#define ADE_SCL_HCOEF(x, m, n) (0x3100 + (x) * 0x800 + \ + 12
[PATCH v2 03/10] drm/hisilicon: Add hisilicon DRM master driver
Add DRM master driver for hi6220 SoC which used in HiKey board.
Add dumb buffer feature.
Add prime dmabuf feature.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/hisilicon/Kconfig| 9 ++
drivers/gpu/drm/hisilicon/Makefile | 3 +
drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 214 +++
5 files changed, 229 insertions(+)
create mode 100644 drivers/gpu/drm/hisilicon/Kconfig
create mode 100644 drivers/gpu/drm/hisilicon/Makefile
create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.c
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 8773fad..038aae8 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -274,3 +274,5 @@ source "drivers/gpu/drm/amd/amdkfd/Kconfig"
source "drivers/gpu/drm/imx/Kconfig"
source "drivers/gpu/drm/vc4/Kconfig"
+
+source "drivers/gpu/drm/hisilicon/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 1e9ff4c..e7efcb7 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -75,3 +75,4 @@ obj-y += i2c/
obj-y += panel/
obj-y += bridge/
obj-$(CONFIG_DRM_FSL_DCU) += fsl-dcu/
+obj-$(CONFIG_DRM_HISI) += hisilicon/
diff --git a/drivers/gpu/drm/hisilicon/Kconfig
b/drivers/gpu/drm/hisilicon/Kconfig
new file mode 100644
index 000..70aa8d1
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -0,0 +1,9 @@
+config DRM_HISI
+ tristate "DRM Support for Hisilicon SoCs Platform"
+ depends on DRM
+ select DRM_KMS_HELPER
+ select DRM_GEM_CMA_HELPER
+ select DRM_KMS_CMA_HELPER
+ help
+ Choose this option if you have a hisilicon chipsets(hi6220).
+ If M is selected the module will be called hisi-drm.
diff --git a/drivers/gpu/drm/hisilicon/Makefile
b/drivers/gpu/drm/hisilicon/Makefile
new file mode 100644
index 000..7375456
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -0,0 +1,3 @@
+hisi-drm-y := hisi_drm_drv.o
+
+obj-$(CONFIG_DRM_HISI) += hisi-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
new file mode 100644
index 000..445e2ec
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
@@ -0,0 +1,214 @@
+/*
+ * Hisilicon SoCs drm master driver
+ *
+ * Copyright (c) 2014-2015 Hisilicon Limited.
+ * Author:
+ * Xinliang Liu
+ * Xinliang Liu
+ * Xinwei Kong
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#define DRIVER_NAME"hisi-drm"
+
+static int hisi_drm_unload(struct drm_device *dev)
+{
+ drm_mode_config_cleanup(dev);
+ return 0;
+}
+
+static const struct drm_mode_config_funcs hisi_drm_mode_config_funcs = {
+ .fb_create = drm_fb_cma_create,
+ .atomic_check = drm_atomic_helper_check,
+ .atomic_commit = drm_atomic_helper_commit,
+};
+
+static void hisi_drm_mode_config_init(struct drm_device *dev)
+{
+ dev->mode_config.min_width = 0;
+ dev->mode_config.min_height = 0;
+
+ dev->mode_config.max_width = 2048;
+ dev->mode_config.max_height = 2048;
+
+ dev->mode_config.funcs = &hisi_drm_mode_config_funcs;
+}
+
+static int hisi_drm_load(struct drm_device *dev, unsigned long flags)
+{
+ int ret;
+
+ dev_set_drvdata(dev->dev, dev);
+
+ /* dev->mode_config initialization */
+ drm_mode_config_init(dev);
+ hisi_drm_mode_config_init(dev);
+
+ /* bind and init sub drivers */
+ ret = component_bind_all(dev->dev, dev);
+ if (ret) {
+ DRM_ERROR("failed to bind all component.\n");
+ goto err_mode_config_cleanup;
+ }
+
+ /* reset all the states of crtc/plane/encoder/connector */
+ drm_mode_config_reset(dev);
+
+ return 0;
+
+err_mode_config_cleanup:
+ drm_mode_config_cleanup(dev);
+
+ return ret;
+}
+
+static const struct file_operations hisi_drm_fops = {
+ .owner = THIS_MODULE,
+ .open = drm_open,
+ .release= drm_release,
+ .unlocked_ioctl = drm_ioctl,
+#ifdef CONFIG_COMPAT
+ .compat_ioctl = drm_compat_ioctl,
+#endif
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+ .mmap = drm_gem_cma_mmap,
+};
+
+static struct dma_buf *hisi_gem_prime_export(struct drm_device *dev,
+struct drm_gem_object *obj,
+int flags)
+{
+ /* we want to be able to write in mmapped buffer */
+ flags |= O_RDWR;
+ return drm_gem_prime_ex
[PATCH v2 02/10] drm/hisilicon: Add DT binding docs for hi6220 display subsystem
Add the device tree binding documentation for hi6220 SoC display subsystem.
drm master device binding doc.
ADE display controller binding doc.
DSI controller binding doc.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
.../bindings/display/hisilicon/hisi-ade.txt| 42 ++
.../bindings/display/hisilicon/hisi-drm.txt| 66 ++
.../bindings/display/hisilicon/hisi-dsi.txt| 53 +
3 files changed, 161 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
create mode 100644
Documentation/devicetree/bindings/display/hisilicon/hisi-drm.txt
create mode 100644
Documentation/devicetree/bindings/display/hisilicon/hisi-dsi.txt
diff --git a/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
new file mode 100644
index 000..2777a2c
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
@@ -0,0 +1,42 @@
+Device-Tree bindings for hisilicon ADE display controller driver
+
+ADE (Advanced Display Engine) is the display controller which grab image
+data from memory, do composition, do post image processing, generate RGB
+timing stream and transfer to DSI.
+
+Required properties:
+- compatible: value should be one of the following
+ "hisilicon,hi6220-ade".
+- reg: physical base address and length of the controller's registers.
+- reg-names: name of physical base.
+- interrupt: the interrupt number.
+- clocks: the clocks needed.
+- clock-names: the name of the clocks.
+- ade_core_clk_rate: ADE core clock rate.
+- media_noc_clk_rate: media noc module clock rate.
+
+
+A example of HiKey board hi6220 SoC specific DT entry:
+Example:
+
+ ade: ade at f410 {
+ compatible = "hisilicon,hi6220-ade";
+ reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>;
+ reg-names = "ade_base",
+ "media_base";
+ interrupts = <0 115 4>;
+
+ clocks = <&media_ctrl HI6220_ADE_CORE>,
+<&media_ctrl HI6220_CODEC_JPEG>,
+<&media_ctrl HI6220_ADE_PIX_SRC>,
+<&media_ctrl HI6220_PLL_SYS>,
+<&media_ctrl HI6220_PLL_SYS_MEDIA>;
+ clock-names = "clk_ade_core",
+ "aclk_codec_jpeg_src",
+ "clk_ade_pix",
+ "clk_syspll_src",
+ "clk_medpll_src";
+ ade_core_clk_rate = <36000>;
+ media_noc_clk_rate = <28800>;
+ };
diff --git a/Documentation/devicetree/bindings/display/hisilicon/hisi-drm.txt
b/Documentation/devicetree/bindings/display/hisilicon/hisi-drm.txt
new file mode 100644
index 000..fd93026
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/hisilicon/hisi-drm.txt
@@ -0,0 +1,66 @@
+Hisilicon DRM master device
+
+The Hisilicon DRM master device is a virtual device needed to list all
+the other display relevant nodes that comprise the display subsystem.
+
+
+Required properties:
+- compatible: Should be "hisilicon,-dss"
+- #address-cells: should be set to 2.
+- #size-cells: should be set to 2.
+- range: to allow probing of subdevices.
+
+Optional properties:
+- dma-coherent: Present if dma operations are coherent.
+
+Required sub nodes:
+All the device nodes of display subsystem of SoC should be the sub nodes.
+Such as display controller node, DSI node and so on.
+
+A example of HiKey board hi6220 SoC specific DT entry:
+Example:
+
+ display-subsystem {
+ compatible = "hisilicon,hi6220-dss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ dma-coherent;
+
+ ade: ade at f410 {
+ compatible = "hisilicon,hi6220-ade";
+ reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>;
+ reg-names = "ade_base",
+ "media_base";
+ interrupts = <0 115 4>; /* ldi interrupt */
+
+ clocks = <&media_ctrl HI6220_ADE_CORE>,
+<&media_ctrl HI6220_CODEC_JPEG>,
+<&media_ctrl HI6220_ADE_PIX_SRC>,
+<&media_ctrl HI6220_PLL_SYS>,
+<&media_ctrl HI6220_PLL_SYS_MEDIA>;
+ /*clock name*/
+ clock-names = "clk_ade_core",
+ "aclk_codec_jpeg_src",
+ "clk_ade_pix",
+ "clk_syspll_src",
+ "clk_medpll_src";
+ ad
[PATCH v2 01/10] arm64: dts: hisilicon: Add display subsystem DT nodes for hi6220
Add ade, dsi and adv7533 DT nodes for hikey board.
Signed-off-by: Xinliang Liu
Signed-off-by: Xinwei Kong
Signed-off-by: Andy Green
---
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 21
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 44 ++
2 files changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 8d43a0f..81236b3 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -31,4 +31,25 @@
device_type = "memory";
reg = <0x0 0x0 0x0 0x4000>;
};
+
+ soc {
+ i2c2: i2c at f7102000 {
+ status = "ok";
+
+ adv7533: adv7533 at 39 {
+ compatible = "adi,adv7533";
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <1 2>;
+ pd-gpio = <&gpio0 4 0>;
+ adi,dsi-lanes = <4>;
+
+ port {
+ adv_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 82d2488..2d6cf03 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -208,5 +208,49 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+ display-subsystem {
+ compatible = "hisilicon,hi6220-dss";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ade: ade at f410 {
+ compatible = "hisilicon,hi6220-ade";
+ reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>;
+ reg-names = "ade_base",
+ "media_base";
+ interrupts = <0 115 4>; /* ldi interrupt */
+
+ clocks = <&media_ctrl HI6220_ADE_CORE>,
+<&media_ctrl HI6220_CODEC_JPEG>,
+<&media_ctrl HI6220_ADE_PIX_SRC>,
+<&media_ctrl HI6220_PLL_SYS>,
+<&media_ctrl HI6220_PLL_SYS_MEDIA>;
+ /*clock name*/
+ clock-names = "clk_ade_core",
+ "aclk_codec_jpeg_src",
+ "clk_ade_pix",
+ "clk_syspll_src",
+ "clk_medpll_src";
+ ade_core_clk_rate = <36000>;
+ media_noc_clk_rate = <28800>;
+ };
+
+ dsi: dsi at 0xf4107800 {
+ compatible = "hisilicon,hi6220-dsi";
+ reg = <0x0 0xf4107800 0x0 0x100>;
+ clocks = <&media_ctrl HI6220_DSI_PCLK>;
+ clock-names = "pclk_dsi";
+
+ port {
+ dsi_out: endpoint {
+ remote-endpoint = <&adv_in>;
+ };
+ };
+
+ };
+ };
};
};
--
1.9.1
[PATCH v2 00/10] Add New DRM Driver for HiSilicon hi6220 SoC
This patch set adds a new drm driver for HiSilicon hi6220 SoC. Current testing and support board is Hikey board which is one of Linaro 96boards. It is an arm64 open source board. For more information about this board, please access https://www.96boards.org. Hardware Detail --- The display subsystem of Hi6220 SoC is shown as bellow: +-+ +--+ +-+ +-+ | | | | | | | | | FB |-->| ADE|>| DSI |>| External| | | | | | | | HDMI | +-+ +--+ +-+ +-+ - ADE(Advanced Display Engine) is the display controller. It contains 7 channels, 3 overlay compositors and a LDI. - A channel looks like: DMA-->clip-->scale-->ctrans(or called csc). - Overlay compositor is response to compose planes which come from 7 channels and pass composed image to LDI. - LDI is response to generate timings and RGB data stream. - DSI converts the RGB data stream from ADE to DSI packets. - External HDMI module is connected with DSI bus. Now Hikey use a ADI's ADV7533 external HDMI chip. Change History - Changes in v2: - Remove abtraction layer of plane/crtc/encoder/connector. - Refactor atomic implementation according to Daniel Vetter's guides: http://blog.ffwll.ch/2014/11/atomic-modeset-support-for-kms-drivers.html http://blog.ffwll.ch/2015/09/xdc-2015-atomic-modesetting-for-drivers.html http://blog.ffwll.ch/2015/08/atomic-modesetting-design-overview.html - Use bridge instead of slave encoder to connect external HDMI. - Move dt binding docs to bindings/display/hisilicon directory. Xinliang Liu (10): arm64: dts: hisilicon: Add display subsystem DT nodes for hi6220. drm/hisilicon: Add device tree binding for hi6220 display subsystem drm/hisilicon: Add hisilicon DRM master driver drm/hisilicon: Add crtc funcs for ADE drm/hisilicon: Add plane funcs for ADE drm/hisilicon: Add vblank feature drm/hisilicon: Add cma fbdev and hotplug drm/hisilicon: Add dsi encoder driver drm/hisilicon: Add dsi host driver drm/hisilicon: Add support for external bridge .../bindings/display/hisilicon/hisi-ade.txt| 42 + .../bindings/display/hisilicon/hisi-drm.txt| 66 ++ .../bindings/display/hisilicon/hisi-dsi.txt| 53 + arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 21 + arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 44 + drivers/gpu/drm/Kconfig|2 + drivers/gpu/drm/Makefile |1 + drivers/gpu/drm/hisilicon/Kconfig | 10 + drivers/gpu/drm/hisilicon/Makefile |5 + drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 490 + drivers/gpu/drm/hisilicon/hisi_drm_ade.c | 1068 drivers/gpu/drm/hisilicon/hisi_drm_ade.h | 16 + drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 280 + drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 19 + drivers/gpu/drm/hisilicon/hisi_drm_dsi.c | 829 +++ drivers/gpu/drm/hisilicon/hisi_dsi_reg.h | 89 ++ 16 files changed, 3035 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisi-drm.txt create mode 100644 Documentation/devicetree/bindings/display/hisilicon/hisi-dsi.txt create mode 100644 drivers/gpu/drm/hisilicon/Kconfig create mode 100644 drivers/gpu/drm/hisilicon/Makefile create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade_reg.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_ade.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_ade.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_dsi.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_dsi_reg.h -- 1.9.1
[PATCH v2 04/10] drm/hisilicon: Add crtc funcs for ADE
use_maskOn 28 November 2015 at 10:38, Xinliang Liu
wrote:
> Add crtc funcs and helper funcs for ADE.
>
> Signed-off-by: Xinliang Liu
> Signed-off-by: Xinwei Kong
> Signed-off-by: Andy Green
> ---
> --- /dev/null
> +++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
> +#define ADE_CTRL (0x4)
> +#define ADE_CTRL1 (0x8C)
> +#define ADE_ROT_SRC_CFG(0x10)
> +#define ADE_DISP_SRC_CFG (0x18)
> +#define ADE_WDMA2_SRC_CFG (0x1C)
> +#define ADE_SEC_OVLY_SRC_CFG (0x20)
> +#define ADE_WDMA3_SRC_CFG (0x24)
> +#define ADE_OVLY1_TRANS_CFG(0x2C)
> +#define ADE_EN (0x100)
> +#define INTR_MASK_CPU_0(0xC10)
> +#define INTR_MASK_CPU_1(0xC14)
> +#define ADE_FRM_DISGARD_CTRL (0xA4)
> +/* reset and reload regs */
> +#define ADE_SOFT_RST_SEL0 (0x78)
> +#define ADE_SOFT_RST_SEL1 (0x7C)
> +#define ADE_RELOAD_DIS0(0xAC)
> +#define ADE_RELOAD_DIS1(0xB0)
> +#define ADE_CH_RDMA_BIT_OFST (0)
> +#define ADE_CLIP_BIT_OFST (15)
> +#define ADE_SCL_BIT_OFST (21)
> +#define ADE_CTRAN_BIT_OFST (24)
> +#define ADE_OVLY_BIT_OFST (37) /* 32+5 */
Don't think we have any cases in drm where constants are wrapped in
brackets. Is there any benefit of doing that here ?
> +/* channel regs */
> +#define RD_CH_PE(x)(0x1000 + (x) * 0x80)
... and I'm not talking about cases where the macros such as this one.
> +union U_LDI_CTRL {
> +struct {
> + unsigned intldi_en:1;
> + unsigned intdisp_mode_buf :1;
> + unsigned intdate_gate_en :1;
> + unsigned intbpp :2;
> + unsigned intwait_vsync_en :1;
> + unsigned intcorlorbar_width :7;
> + unsigned intbgr :1;
> + unsigned intcolor_mode:1;
> + unsigned intshutdown :1;
> + unsigned intvactive_line :12;
> + unsigned intldi_en_self_clr :1;
> + unsigned intreserved_573 :3;
> + } bits;
> + unsigned intu32;
> +};
> +
> +union U_LDI_WORK_MODE {
> +struct {
> + unsigned intwork_mode :1;
> + unsigned intwback_en :1;
> + unsigned intcolorbar_en :1;
> + unsigned intreserved_577 :29;
> + } bits;
> + unsigned intu32;
> +};
> +
The struct in the above two unions is missing a level of indentation.
> --- /dev/null
> +++ b/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
> +static void ade_ldi_set_mode(struct ade_crtc *acrtc,
> +struct drm_display_mode *mode,
> +struct drm_display_mode *adj_mode)
> +{
> + struct ade_hw_ctx *ctx = acrtc->ctx;
> + void __iomem *base = ctx->base;
> + u32 out_w = mode->hdisplay;
> + u32 out_h = mode->vdisplay;
> + u32 hfp, hbp, hsw, vfp, vbp, vsw;
> + u32 plr_flags;
> + int ret;
> +
> + plr_flags = (mode->flags & DRM_MODE_FLAG_NVSYNC)
> + ? HISI_LDI_FLAG_NVSYNC : 0;
> + plr_flags |= (mode->flags & DRM_MODE_FLAG_NHSYNC)
> + ? HISI_LDI_FLAG_NHSYNC : 0;
> + hfp = mode->hsync_start - mode->hdisplay;
> + hbp = mode->htotal - mode->hsync_end;
> + hsw = mode->hsync_end - mode->hsync_start;
> + vfp = mode->vsync_start - mode->vdisplay;
> + vbp = mode->vtotal - mode->vsync_end;
> + vsw = mode->vsync_end - mode->vsync_start;
> + if (vsw > 15) {
> + DRM_INFO("vsw exceeded 15\n");
DRM_ERROR or DRM_DEBUG_xx perhaps ?
> + vsw = 15;
> + }
> +
> + writel((hbp << 20) | (hfp << 0), base + LDI_HRZ_CTRL0);
> + /* p3-73 6220V100 pdf:
> +* "The configured value is the actual width - 1"
> +*/
> + writel(hsw - 1, base + LDI_HRZ_CTRL1);
> + writel((vbp << 20) | (vfp << 0), base + LDI_VRT_CTRL0);
> + /* p3-74 6220V100 pdf:
> +* "The configured value is the actual width - 1"
> +*/
> + writel(vsw - 1, base + LDI_VRT_CTRL1);
> +
> + /* p3-75 6220V100 pdf:
> +* "The configured value is the actual width - 1"
> +*/
> + writel(((out_h - 1) << 20) | ((out_w - 1) << 0),
> + base + LDI_DSP_SIZE);
> + writel(plr_flags, base + LDI_PLR_CTRL);
> +
> + ret = clk_set_rate(ctx->ade_pix_clk, mode->clock * 1000);
> + /* Success should be guaranteed in aotomic_check
> +* failer shouldn't happen here
> +*/
> + if (ret)
> + DRM_ERROR("set ade_pixel_clk_rate fail\n");
DItto
> + adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000;
> +
[PATCH v2 03/10] drm/hisilicon: Add hisilicon DRM master driver
Hi Xinliang,
On 28 November 2015 at 10:38, Xinliang Liu wrote:
> Add DRM master driver for hi6220 SoC which used in HiKey board.
> Add dumb buffer feature.
> Add prime dmabuf feature.
>
> Signed-off-by: Xinliang Liu
> Signed-off-by: Xinwei Kong
> Signed-off-by: Andy Green
Your s-o-b should be the bottom of the list. There was a presentation
(ages ago) from Greg KH, who nicely described the order as a "chain of
command" or "guilt path". Looks like the rest of the series could use
this tweak.
> ---
> drivers/gpu/drm/Kconfig | 2 +
> drivers/gpu/drm/Makefile | 1 +
> drivers/gpu/drm/hisilicon/Kconfig| 9 ++
> drivers/gpu/drm/hisilicon/Makefile | 3 +
> drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 214
> +++
> 5 files changed, 229 insertions(+)
> create mode 100644 drivers/gpu/drm/hisilicon/Kconfig
> create mode 100644 drivers/gpu/drm/hisilicon/Makefile
> create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.c
>
> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> index 8773fad..038aae8 100644
> --- a/drivers/gpu/drm/Kconfig
> +++ b/drivers/gpu/drm/Kconfig
> @@ -274,3 +274,5 @@ source "drivers/gpu/drm/amd/amdkfd/Kconfig"
> source "drivers/gpu/drm/imx/Kconfig"
>
> source "drivers/gpu/drm/vc4/Kconfig"
> +
> +source "drivers/gpu/drm/hisilicon/Kconfig"
I could swear that we can a patch that sorts these alphabetically,
although it doesn't seem to have made it upstream yet :-(
> --- /dev/null
> +++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
> +static int hisi_drm_load(struct drm_device *dev, unsigned long flags)
> +{
The use of .load (and .unload?) callbacks is not recommended. Take a
look at Laurent Pinchart's patch [1] about the whys and hows on the
topic
> +static struct dma_buf *hisi_gem_prime_export(struct drm_device *dev,
> +struct drm_gem_object *obj,
> +int flags)
> +{
> + /* we want to be able to write in mmapped buffer */
> + flags |= O_RDWR;
Erm... something feels fishy here. Out of the existing 15 drivers
setting up the prime callbacks only one (sti) does a similar thing. So
either everyone else is missing something obvious or hisilicon and sti
can rework their inner working to remove this (dare I say it) hack.
> +static int hisi_gem_cma_dumb_create(struct drm_file *file,
> + struct drm_device *dev,
> + struct drm_mode_create_dumb *args)
> +{
> + int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
> +
> + /* mali gpu need pitch 8 bytes alignment for 32bpp */
> + args->pitch = roundup(min_pitch, 8);
> +
I'm not sure you want this kind of dependency of an out of tree driver
upstream. If this is some limitation on the display engine so be it,
but tailoring things for an external module seems like a very bad
idea.
> + return drm_gem_cma_dumb_create_internal(file, dev, args);
> +}
> +static int hisi_drm_bind(struct device *dev)
> +{
> + dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
> + return drm_platform_init(&hisi_drm_driver, to_platform_device(dev));
As pointed out by the the kernel doc - drm_platform_init is deprecated.
Regards,
Emil
[1] http://lists.freedesktop.org/archives/dri-devel/2015-November/095466.html
[Bug 93147] [regression bisected] Stuttering in games caused by commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many vblanks were missed"
https://bugs.freedesktop.org/show_bug.cgi?id=93147 --- Comment #3 from Dave Witbrodt --- (In reply to Michel Dänzer from comment #2) > Does running the affected apps with the environment variable > LIBGL_DRI3_DISABLE=1 avoid the problem? Yes, symptoms are completely eliminated in prboom-plus when using that variable. (I am currently using a kernel built from a local branch with fa4270d8 and 4dfd6486 reverted, but I have left my previous kernel installed. I tested by rebooting to the previous kernel, and running prboom-plus with and w/o the variable set.) -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/0bd6c61c/attachment.html>
[Bug 108401] GPU lockup with [AMD/ATI] RV730 XT [Radeon HD 4670]
https://bugzilla.kernel.org/show_bug.cgi?id=108401 --- Comment #7 from joe.r.floss.user at gmail.com --- Right, I've had no such problem with recent mesa from Git master (47b3a0d23504de43ce2dc028e84037f7cd89bd89). Besides, should the problem arise again, I would report it where you said, therefore I suppose you may close this report. Thank you! -- You are receiving this mail because: You are watching the assignee of the bug.
[Bug 93147] [regression bisected] Stuttering in games caused by commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many vblanks were missed"
https://bugs.freedesktop.org/show_bug.cgi?id=93147 --- Comment #2 from Michel Dänzer --- Does running the affected apps with the environment variable LIBGL_DRI3_DISABLE=1 avoid the problem? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/42c41924/attachment.html>
[Bug 76490] Hang during boot when DPM is on (R9 270X)
https://bugs.freedesktop.org/show_bug.cgi?id=76490 --- Comment #69 from Maxim Sheviakov --- I can't see no logic. Nothing sensible. Remember: NOTHING does XXX automatically,it first has to be implemented. And, hell, tbe kernel actually reads the vbios and looks for the same IDs, but it's not able to find them - they are absent. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/c36917b6/attachment.html>
[Bug 66501] Feature request: support multiseat for a single multi-headed graphics card
https://bugs.freedesktop.org/show_bug.cgi?id=66501 Cristian Ciupitu changed: What|Removed |Added CC||cristian.ciupitu at yahoo.com --- Comment #6 from Cristian Ciupitu --- Any news on this? -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/1ff22ec5/attachment-0001.html>
[git pull] drm fixes
On 28 November 2015 at 05:05, Linus Torvalds wrote: > On Thu, Nov 19, 2015 at 8:07 PM, Dave Airlie wrote: >> >> core: Atomic fixes and Atomic helper fixes >> i915: Revert for the backlight regression along with a bunch of fixes. > > So I have no idea if the GPU updates are my problem, but my main > desktop machine has been hanging silently a few times lately. > > It has never done it while unattended, even if it's doing things like > compiling the kernel. So I'm a bit inclined to blame graphics. > > Sadly, when it hangs, it's a total hang and doesn't leave anything in > the logs - I just have to reboot. > > I'll try to see if I can get anything at all out of the machine, but I > thought I'd ask if there is some known issue with Haswell graphics in > the 4.4-rc code base? > > Sorry for the complete lack of details, and really any hard reason to > even blame the GPU people.. You may be entirely blameless. I've been running this fixes pull on my haswell laptop since I sent it to you, and I've been using it, F22 + gnome-shell. 05:35:41 up 7 days, 18:31, 35 users, load average: 0.26, 0.26, 0.23 So I'm not aware of anything at least with Haswell in general. Dave.
[Bug 93147] [regression bisected] Stuttering in games caused by commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many vblanks were missed"
https://bugs.freedesktop.org/show_bug.cgi?id=93147 --- Comment #1 from Dave Witbrodt --- Created attachment 120188 --> https://bugs.freedesktop.org/attachment.cgi?id=120188&action=edit Xorg.0.log when running kernel built at "bad" commit -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/178a052d/attachment.html>
[Bug 93147] [regression bisected] Stuttering in games caused by commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many vblanks were missed"
4dfd64862ff852df7b1198d667dda778715ee88f Author: Ville Syrjälä Date: Mon Sep 14 22:43:51 2015 +0300 drm: Use vblank timestamps to guesstimate how many vblanks were missed Since the problem could still have been only in my Frankenstein local tree, I built kernels from drm-next at commits 4dfd6486 and 4dfd6486^ (= 1b2eb710). I found that 4dfd6486 showed the buggy behavior, while 1b2eb710 did not. I did notice that a regression against this same commit was noticed and apparently fixed in this commit: commit fa4270d8e0257b4b76f11baa2866f4313d29aaf5 Author: Ville Syrjälä Date: Wed Sep 30 19:21:34 2015 +0300 drm: Don't zero vblank timestamps from the irq handler [...] This fixes a regression from 4dfd64862ff852df drm: Use vblank timestamps to guesstimate how many vblanks were missed This commit was present in my local Frankenstein tree, as well as both drm-next and drm-fixes, and (obviously) does not fix the bug I am reporting. The problem commit no doubt had other effects that were fixed by fa4270d8, but the stuttering I am seeing was not fixed by it. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/de3bad5c/attachment.html>
[Bug 93133] Pink screen on Gravilon with VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] RC410M [Mobility Radeon Xpress 200M]
https://bugs.freedesktop.org/show_bug.cgi?id=93133 Ilia Mirkin changed: What|Removed |Added Attachment #120163|text/plain |image/png mime type|| -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20151128/006a263b/attachment.html>
