[PATCH v12 18/18] drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable time

[Yakir Yang]

It may caused a dead lock if we flush the hpd work in bridge disable time.

The normal flow would like:
  IN --> DRM IOCTL
1. Acquire crtc_ww_class_mutex (DRM IOCTL)
  IN --> analogix_dp_bridge
2. Acquire hpd work lock (Flush hpd work)
3. HPD work already in idle, no need to run the work function.
  OUT <-- analogix_dp_bridge
  OUT <-- DRM IOCTL

The dead lock flow would like:
  IN --> DRM IOCTL
1. Acquire crtc_ww_class_mutex (DRM IOCTL)
  IN --> analogix_dp_bridge
2. Acquire hpd work lock (Flush hpd work)
  IN --> analogix_dp_hotplug
  IN --> drm_helper_hpd_irq_event
3. Acquire mode_config lock (This lock already have been acquired in 
previous step 1)
** Dead Lock Now **

It's wrong to flush the hpd work in bridge->disable time, I guess the
original code just want to ensure the delay work must be finish before
encoder disabled.

The flush work in bridge disable time is try to ensure the HPD event
won't be missed before display card disabled, actually we can take a
fast respond way(interrupt thread) to update DRM HPD event to fix the
delay update and possible dead lock.

Signed-off-by: Yakir Yang 
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 62 ++
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  3 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 26 +
 3 files changed, 55 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 1e98489..04efed2 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -851,47 +851,40 @@ static void analogix_dp_enable_scramble(struct 
analogix_dp_device *dp,
}
 }

-static irqreturn_t analogix_dp_irq_handler(int irq, void *arg)
+static irqreturn_t analogix_dp_hardirq(int irq, void *arg)
 {
struct analogix_dp_device *dp = arg;
-
+   irqreturn_t ret = IRQ_NONE;
enum dp_irq_type irq_type;

irq_type = analogix_dp_get_irq_type(dp);
-   switch (irq_type) {
-   case DP_IRQ_TYPE_HP_CABLE_IN:
-   dev_dbg(dp->dev, "Received irq - cable in\n");
-   schedule_work(>hotplug_work);
-   analogix_dp_clear_hotplug_interrupts(dp);
-   break;
-   case DP_IRQ_TYPE_HP_CABLE_OUT:
-   dev_dbg(dp->dev, "Received irq - cable out\n");
-   analogix_dp_clear_hotplug_interrupts(dp);
-   break;
-   case DP_IRQ_TYPE_HP_CHANGE:
-   /*
-* We get these change notifications once in a while, but there
-* is nothing we can do with them. Just ignore it for now and
-* only handle cable changes.
-*/
-   dev_dbg(dp->dev, "Received irq - hotplug change; ignoring.\n");
-   analogix_dp_clear_hotplug_interrupts(dp);
-   break;
-   default:
-   dev_err(dp->dev, "Received irq - unknown type!\n");
-   break;
+   if (irq_type != DP_IRQ_TYPE_UNKNOWN) {
+   analogix_dp_mute_hpd_interrupt(dp);
+   ret = IRQ_WAKE_THREAD;
}
-   return IRQ_HANDLED;
+
+   return ret;
 }

-static void analogix_dp_hotplug(struct work_struct *work)
+static irqreturn_t analogix_dp_irq_thread(int irq, void *arg)
 {
-   struct analogix_dp_device *dp;
+   struct analogix_dp_device *dp = arg;
+   enum dp_irq_type irq_type;
+
+   irq_type = analogix_dp_get_irq_type(dp);
+   if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN ||
+   irq_type & DP_IRQ_TYPE_HP_CABLE_OUT) {
+   dev_dbg(dp->dev, "Detected cable status changed!\n");
+   if (dp->drm_dev)
+   drm_helper_hpd_irq_event(dp->drm_dev);
+   }

-   dp = container_of(work, struct analogix_dp_device, hotplug_work);
+   if (irq_type != DP_IRQ_TYPE_UNKNOWN) {
+   analogix_dp_clear_hotplug_interrupts(dp);
+   analogix_dp_unmute_hpd_interrupt(dp);
+   }

-   if (dp->drm_dev)
-   drm_helper_hpd_irq_event(dp->drm_dev);
+   return IRQ_HANDLED;
 }

 static void analogix_dp_commit(struct analogix_dp_device *dp)
@@ -1077,7 +1070,6 @@ static void analogix_dp_bridge_disable(struct drm_bridge 
*bridge)
}

disable_irq(dp->irq);
-   flush_work(>hotplug_work);
phy_power_off(dp->phy);

if (dp->plat_data->power_off)
@@ -1336,8 +1328,6 @@ int analogix_dp_bind(struct device *dev, struct 
drm_device *drm_dev,
return -ENODEV;
}

-   INIT_WORK(>hotplug_work, analogix_dp_hotplug);
-
pm_runtime_enable(dev);

phy_power_on(dp->phy);
@@ 

[PATCH v12 17/18] drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume time

[Yakir Yang]

Turn off the panel power in suspend time would help to reduce
power waste.

Signed-off-by: Yakir Yang 
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index a86a283..1e98489 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -1400,6 +1400,12 @@ int analogix_dp_suspend(struct device *dev)
struct analogix_dp_device *dp = dev_get_drvdata(dev);

clk_disable_unprepare(dp->clock);
+
+   if (dp->plat_data->panel) {
+   if (drm_panel_unprepare(dp->plat_data->panel))
+   DRM_ERROR("failed to turnoff the panel\n");
+   }
+
return 0;
 }
 EXPORT_SYMBOL_GPL(analogix_dp_suspend);
@@ -1415,6 +1421,13 @@ int analogix_dp_resume(struct device *dev)
return ret;
}

+   if (dp->plat_data->panel) {
+   if (drm_panel_prepare(dp->plat_data->panel)) {
+   DRM_ERROR("failed to setup the panel\n");
+   return -EBUSY;
+   }
+   }
+
return 0;
 }
 EXPORT_SYMBOL_GPL(analogix_dp_resume);
-- 
1.9.1

[PATCH v12 16/18] drm: bridge: analogix/dp: expand the wait time for looking AUX CH reply flag

[Yakir Yang]

On Rockchip platform, sometimes driver would failed at reading EDID
message, and it's caused by the AUX reply flag wouldn't received under
the 100*10us wait time.

But after expand the wait time a little, the AUX reply flag would be
set, so maybe the wait time is a little critical. Besides the analogix
dp book haven't reminded the standard wait for looking AUX reply flag,
so I thought it's okay to expand the wait time.

And the external wait time won't hurt Exynos DP too much, cause they
wouldn't meet this problem, then driver would received the reply command
very soon, so no more additional wait time would bring to Exynos platform.

Signed-off-by: Yakir Yang 
---
Changes in v12:
- Using another way to expand the AUX reply wait time (Jingoo)

Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index cba3ffd..8687eea 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -471,7 +471,7 @@ int analogix_dp_start_aux_transaction(struct 
analogix_dp_device *dp)
 {
int reg;
int retval = 0;
-   int timeout_loop = 0;
+   unsigned long timeout;

/* Enable AUX CH operation */
reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
@@ -479,14 +479,12 @@ int analogix_dp_start_aux_transaction(struct 
analogix_dp_device *dp)
writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);

/* Is AUX CH command reply received? */
-   reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
-   while (!(reg & RPLY_RECEIV)) {
-   timeout_loop++;
-   if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+   timeout = jiffies + msecs_to_jiffies(5);
+   while ((readl(dp->reg_base + ANALOGIX_DP_INT_STA) & RPLY_RECEIV) == 0) {
+   if (time_after(jiffies, timeout)) {
dev_err(dp->dev, "AUX CH command reply failed!\n");
return -ETIMEDOUT;
}
-   reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
usleep_range(10, 11);
}

-- 
1.9.1

[PATCH v12 15/18] drm: bridge: analogix/dp: add edid modes parse in get_modes method

[Yakir Yang]

Display Port monitor could support kinds of mode which indicate
in monitor edid, not just one single display resolution which
defined in panel or devivetree property display timing.

Note: Gustavo Padovan try to remove the controller and phy
power on function in bind time at bellow commit:
drm/exynos: do not start enabling DP at bind() phase

But for now driver need to read edid message in .get_modes()
function, so controller must be inited in bind time, so we
need to add controller init back.

Signed-off-by: Yakir Yang 
Tested-by: Javier Martinez Canillas 
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Call drm_panel_prepare() in .get_modes function, ensure panel should
  power on before driver try to read edid message.

Changes in v3:
- Add edid modes parse support

Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 17 
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 46 +++---
 2 files changed, 33 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 1ff2d8ee..a86a283 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -110,7 +110,7 @@ static unsigned char 
analogix_dp_calc_edid_check_sum(unsigned char *edid_data)

 static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 {
-   unsigned char edid[EDID_BLOCK_LENGTH * 2];
+   unsigned char *edid = dp->edid;
unsigned int extend_block = 0;
unsigned char sum;
unsigned char test_vector;
@@ -904,12 +904,6 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
DRM_ERROR("failed to disable the panel\n");
}

-   ret = analogix_dp_handle_edid(dp);
-   if (ret) {
-   dev_err(dp->dev, "unable to handle edid\n");
-   return;
-   }
-
ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
 dp->video_info.max_link_rate);
if (ret) {
@@ -939,8 +933,14 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
 int analogix_dp_get_modes(struct drm_connector *connector)
 {
struct analogix_dp_device *dp = to_dp(connector);
+   struct edid *edid = (struct edid *)dp->edid;
int num_modes = 0;

+   if (analogix_dp_handle_edid(dp) == 0) {
+   drm_mode_connector_update_edid_property(>connector, edid);
+   num_modes += drm_add_edid_modes(>connector, edid);
+   }
+
if (dp->plat_data->panel)
num_modes += drm_panel_get_modes(dp->plat_data->panel);

@@ -978,6 +978,7 @@ static void analogix_dp_connector_destroy(struct 
drm_connector *connector)
 {
drm_connector_unregister(connector);
drm_connector_cleanup(connector);
+
 }

 static struct drm_connector_funcs analogix_dp_connector_funcs = {
@@ -1348,6 +1349,8 @@ int analogix_dp_bind(struct device *dev, struct 
drm_device *drm_dev,
}
}

+   analogix_dp_init_dp(dp);
+
ret = devm_request_irq(>dev, dp->irq, analogix_dp_irq_handler,
   irq_flags, "analogix-dp", dp);
if (ret) {
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index a8cba64..40a0759 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -20,6 +20,28 @@
 #define MAX_CR_LOOP5
 #define MAX_EQ_LOOP5

+/* I2C EDID Chip ID, Slave Address */
+#define I2C_EDID_DEVICE_ADDR   0x50
+#define I2C_E_EDID_DEVICE_ADDR 0x30
+
+#define EDID_BLOCK_LENGTH  0x80
+#define EDID_HEADER_PATTERN0x00
+#define EDID_EXTENSION_FLAG0x7e
+#define EDID_CHECKSUM  0x7f
+
+/* DP_MAX_LANE_COUNT */
+#define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1)
+#define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f)
+
+/* DP_LANE_COUNT_SET */
+#define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f)
+
+/* DP_TRAINING_LANE0_SET */
+#define DPCD_PRE_EMPHASIS_SET(x)   (((x) & 0x3) << 3)
+#define DPCD_PRE_EMPHASIS_GET(x)   (((x) >> 3) & 0x3)
+#define DPCD_VOLTAGE_SWING_SET(x)  (((x) & 0x3) << 0)
+#define DPCD_VOLTAGE_SWING_GET(x)  (((x) >> 0) & 0x3)
+
 enum link_lane_count_type {
LANE_COUNT1 = 1,
LANE_COUNT2 = 2,
@@ -155,6 +177,7 @@ struct analogix_dp_device {
int dpms_mode;
int hpd_gpio;
boolforce_hpd;
+   unsigned char   edid[EDID_BLOCK_LENGTH 

[PATCH v12 14/18] drm: bridge: analogix/dp: move hpd detect to connector detect function

[Yakir Yang]

This change just make a little clean to make code more like
drm core expect, move hdp detect code from bridge->enable(),
and place them into connector->detect().

Note: Gustavo Padovan try to remove the controller and phy
power on function in bind time at bellow commit:
drm/exynos: do not start enabling DP at bind() phase

But for now the connector status don't hardcode to connected,
need to operate dp phy in .detect function, so we need to revert
parts if Gustavo Padovan's changes, add phy poweron
function in bind time.

Signed-off-by: Yakir Yang 
Tested-by: Javier Martinez Canillas 
---
Changes in v12: None
Changes in v11:
- Revert parts of Gustavo Padovan's changes in commit:
drm/exynos: do not start enabling DP at bind() phase
  Add dp phy poweron function in bind time.
- Move the panel prepare from get_modes time to bind time, and move
  the panel unprepare from bridge->disable to unbind time. (Heiko)

Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Take Jingoo suggest, add commit messages.

Changes in v3:
- move dp hpd detect to connector detect function.

Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 38 --
 1 file changed, 20 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 0be1ac8..1ff2d8ee 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -904,12 +904,6 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
DRM_ERROR("failed to disable the panel\n");
}

-   ret = analogix_dp_detect_hpd(dp);
-   if (ret) {
-   /* Cable has been disconnected, we're done */
-   return;
-   }
-
ret = analogix_dp_handle_edid(dp);
if (ret) {
dev_err(dp->dev, "unable to handle edid\n");
@@ -972,6 +966,11 @@ static struct drm_connector_helper_funcs 
analogix_dp_connector_helper_funcs = {
 enum drm_connector_status
 analogix_dp_detect(struct drm_connector *connector, bool force)
 {
+   struct analogix_dp_device *dp = to_dp(connector);
+
+   if (analogix_dp_detect_hpd(dp))
+   return connector_status_disconnected;
+
return connector_status_connected;
 }

@@ -1051,13 +1050,6 @@ static void analogix_dp_bridge_enable(struct drm_bridge 
*bridge)

pm_runtime_get_sync(dp->dev);

-   if (dp->plat_data->panel) {
-   if (drm_panel_prepare(dp->plat_data->panel)) {
-   DRM_ERROR("failed to setup the panel\n");
-   return;
-   }
-   }
-
if (dp->plat_data->power_on)
dp->plat_data->power_on(dp->plat_data);

@@ -1090,11 +1082,6 @@ static void analogix_dp_bridge_disable(struct drm_bridge 
*bridge)
if (dp->plat_data->power_off)
dp->plat_data->power_off(dp->plat_data);

-   if (dp->plat_data->panel) {
-   if (drm_panel_unprepare(dp->plat_data->panel))
-   DRM_ERROR("failed to turnoff the panel\n");
-   }
-
pm_runtime_put_sync(dp->dev);

dp->dpms_mode = DRM_MODE_DPMS_OFF;
@@ -1352,6 +1339,15 @@ int analogix_dp_bind(struct device *dev, struct 
drm_device *drm_dev,

pm_runtime_enable(dev);

+   phy_power_on(dp->phy);
+
+   if (dp->plat_data->panel) {
+   if (drm_panel_prepare(dp->plat_data->panel)) {
+   DRM_ERROR("failed to setup the panel\n");
+   return -EBUSY;
+   }
+   }
+
ret = devm_request_irq(>dev, dp->irq, analogix_dp_irq_handler,
   irq_flags, "analogix-dp", dp);
if (ret) {
@@ -1385,6 +1381,12 @@ void analogix_dp_unbind(struct device *dev, struct 
device *master,
struct analogix_dp_device *dp = dev_get_drvdata(dev);

analogix_dp_bridge_disable(dp->bridge);
+
+   if (dp->plat_data->panel) {
+   if (drm_panel_unprepare(dp->plat_data->panel))
+   DRM_ERROR("failed to turnoff the panel\n");
+   }
+
pm_runtime_disable(dev);
 }
 EXPORT_SYMBOL_GPL(analogix_dp_unbind);
-- 
1.9.1

[PATCH v12 13/18] drm: bridge: analogix/dp: try force hpd after plug in lookup failed

[Yakir Yang]

Some edp screen do not have hpd signal, so we can't just return
failed when hpd plug in detect failed.

This is an hardware property, so we need add a devicetree property
"analogix,need-force-hpd" to indicate this sutiation.

Signed-off-by: Yakir Yang 
Acked-by: Rob Herring 
Tested-by: Javier Martinez Canillas 
---
Changes in v12: None
Changes in v11:
- Rename the "analogix,need-force-hpd" to common 'force-hpd' (Rob)
- Add the ack from Rob Herring

Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Add "analogix,need-force-hpd" to indicate whether driver need foce
  hpd when hpd detect failed.

Changes in v2: None

 .../bindings/display/bridge/analogix_dp.txt|  4 ++-
 .../bindings/display/exynos/exynos_dp.txt  |  1 +
 .../display/rockchip/analogix_dp-rockchip.txt  |  1 +
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 35 ++
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  2 ++
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  9 ++
 6 files changed, 46 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt 
b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
index 7659a7a..4f2ba8c 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
+++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
@@ -22,6 +22,9 @@ Required properties for dp-controller:
from general PHY binding: Should be "dp".

 Optional properties for dp-controller:
+   -force-hpd:
+   Indicate driver need force hpd when hpd detect failed, this
+   is used for some eDP screen which don't have hpd signal.
-hpd-gpios:
Hotplug detect GPIO.
Indicates which GPIO should be used for hotplug detection
@@ -31,7 +34,6 @@ Optional properties for dp-controller:
* Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
* 
Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt

-
 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
 ---

diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt 
b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
index 9905081..8800164 100644
--- a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
+++ b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
@@ -41,6 +41,7 @@ For the below properties, please refer to Analogix DP binding 
document:
-phys (required)
-phy-names (required)
-hpd-gpios (optional)
+   -analogix,need-force-hpd (optional)
-video interfaces (optional)

 Deprecated properties for DisplayPort:
diff --git 
a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt 
b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 04d99e3..e832ff9 100644
--- 
a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ 
b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -32,6 +32,7 @@ For the below properties, please refer to Analogix DP binding 
document:
 - phys (required)
 - phy-names (required)
 - hpd-gpios (optional)
+- force-hpd (optional)
 ---

 Example:
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 7c5f1f7..0be1ac8 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -62,15 +62,38 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device 
*dp)
 {
int timeout_loop = 0;

-   while (analogix_dp_get_plug_in_status(dp) != 0) {
+   while (timeout_loop < DP_TIMEOUT_LOOP_COUNT) {
+   if (analogix_dp_get_plug_in_status(dp) == 0)
+   return 0;
+
timeout_loop++;
-   if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-   dev_err(dp->dev, "failed to get hpd plug status\n");
-   return -ETIMEDOUT;
-   }
usleep_range(10, 11);
}

+   /*
+* Some edp screen do not have hpd signal, so we can't just
+* return failed when hpd plug in detect failed, DT property
+* "need-force-hpd" would indicate whether driver need this.
+*/
+   if (!dp->force_hpd)
+   return -ETIMEDOUT;
+
+   /*
+* The eDP TRM indicate that if HPD_STATUS(RO) is 0, AUX CH
+* will not work, so we need to give a force hpd action to
+* set HPD_STATUS manually.
+*/
+   dev_dbg(dp->dev, "failed to get hpd plug status, try to force hpd\n");

[PATCH v12 12/18] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288

[Yakir Yang]

There are some IP limit on rk3288 that only support 4 physical lanes
of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.

Signed-off-by: Yakir Yang 
Tested-by: Javier Martinez Canillas 
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Remove the surplus "plat_data" check. (Heiko)
-   switch (dp->plat_data && dp->plat_data->dev_type) {
+   switch (dp->plat_data->dev_type) {

Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Seprate the link-rate and lane-count limit out with the device_type
  flag. (Thierry)

Changes in v3: None
Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 33 ++
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  4 +--
 2 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 27752df..7c5f1f7 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -893,8 +893,8 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
return;
}

-   ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,
-dp->video_info.link_rate);
+   ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
+dp->video_info.max_link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@@ -1203,16 +1203,25 @@ static int analogix_dp_dt_parse_pdata(struct 
analogix_dp_device *dp)
struct device_node *dp_node = dp->dev->of_node;
struct video_info *video_info = >video_info;

-   if (of_property_read_u32(dp_node, "samsung,link-rate",
-_info->link_rate)) {
-   dev_err(dp->dev, "failed to get link-rate\n");
-   return -EINVAL;
-   }
-
-   if (of_property_read_u32(dp_node, "samsung,lane-count",
-_info->lane_count)) {
-   dev_err(dp->dev, "failed to get lane-count\n");
-   return -EINVAL;
+   switch (dp->plat_data->dev_type) {
+   case RK3288_DP:
+   /*
+* Like Rk3288 DisplayPort TRM indicate that "Main link
+* containing 4 physical lanes of 2.7/1.62 Gbps/lane".
+*/
+   video_info->max_link_rate = 0x0A;
+   video_info->max_lane_count = 0x04;
+   break;
+   case EXYNOS_DP:
+   /*
+* NOTE: those property parseing code is used for
+* providing backward compatibility for samsung platform.
+*/
+   of_property_read_u32(dp_node, "samsung,link-rate",
+_info->max_link_rate);
+   of_property_read_u32(dp_node, "samsung,lane-count",
+_info->max_lane_count);
+   break;
}

return 0;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index d488dd6..6cc53d4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -123,8 +123,8 @@ struct video_info {
enum color_coefficient ycbcr_coeff;
enum color_depth color_depth;

-   int link_rate;
-   enum link_lane_count_type lane_count;
+   int max_link_rate;
+   enum link_lane_count_type max_lane_count;
 };

 struct link_train {
-- 
1.9.1

[PATCH v12 11/18] drm: bridge: analogix/dp: add some rk3288 special registers setting

[Yakir Yang]

RK3288 need some special registers setting, we can separate
them out by the dev_type of plat_data.

Signed-off-by: Yakir Yang 
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fix compile failed dut to phy_pd_addr variable misspell error

 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 76 ++-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 12 
 2 files changed, 60 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 3858df5..1e24b37 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -15,6 +15,8 @@
 #include 
 #include 

+#include 
+
 #include "analogix_dp_core.h"
 #include "analogix_dp_reg.h"

@@ -72,6 +74,14 @@ void analogix_dp_init_analog_param(struct analogix_dp_device 
*dp)
reg = SEL_24M | TX_DVDD_BIT_1_0625V;
writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);

+   if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
+   writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+   writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
+   writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
+   writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
+   writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5);
+   }
+
reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;
writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3);

@@ -206,81 +216,85 @@ void analogix_dp_set_analog_power_down(struct 
analogix_dp_device *dp,
   bool enable)
 {
u32 reg;
+   u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
+
+   if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+   phy_pd_addr = ANALOGIX_DP_PD;

switch (block) {
case AUX_BLOCK:
if (enable) {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg |= AUX_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, dp->reg_base + phy_pd_addr);
} else {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg &= ~AUX_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, dp->reg_base + phy_pd_addr);
}
break;
case CH0_BLOCK:
if (enable) {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg |= CH0_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, dp->reg_base + phy_pd_addr);
} else {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg &= ~CH0_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, dp->reg_base + phy_pd_addr);
}
break;
case CH1_BLOCK:
if (enable) {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg |= CH1_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, dp->reg_base + phy_pd_addr);
} else {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg &= ~CH1_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, dp->reg_base + phy_pd_addr);
}
break;
case CH2_BLOCK:
if (enable) {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg |= CH2_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, dp->reg_base + phy_pd_addr);
} else {
-   reg = readl(dp->reg_base + ANALOGIX_DP_PHY_PD);
+   reg = readl(dp->reg_base + phy_pd_addr);
reg &= ~CH2_PD;
-   writel(reg, dp->reg_base + ANALOGIX_DP_PHY_PD);
+   writel(reg, 

[PATCH v12 10/18] dt-bindings: add document for rockchip dp phy

[Yakir Yang]

Add dt binding documentation for rockchip display port PHY.

Signed-off-by: Yakir Yang 
Acked-by: Rob Herring 
Reviewed-by: Heiko Stuebner 
---
Changes in v12: None
Changes in v11:
- Correct the title of this rockchip dp phy document(Rob)
- Add the ack from Rob Herring

Changes in v10: None
Changes in v9: None
Changes in v8:
- Remove the specific address in the example node name. (Heiko)

Changes in v7:
- Simplify the commit message. (Kishon)

Changes in v6: None
Changes in v5:
- Split binding doc's from driver changes. (Rob)
- Update the rockchip,grf explain in document, and correct the clock required
  elemets in document. (Rob & Heiko)

Changes in v4: None
Changes in v3: None
Changes in v2: None

 .../devicetree/bindings/phy/rockchip-dp-phy.txt| 22 ++
 1 file changed, 22 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt

diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt 
b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
new file mode 100644
index 000..50c4f9b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
@@ -0,0 +1,22 @@
+Rockchip specific extensions to the Analogix Display Port PHY
+
+
+Required properties:
+- compatible : should be one of the following supported values:
+- "rockchip.rk3288-dp-phy"
+- clocks: from common clock binding: handle to dp clock.
+   of memory mapped region.
+- clock-names: from common clock binding:
+   Required elements: "24m"
+- rockchip,grf: phandle to the syscon managing the "general register files"
+- #phy-cells : from the generic PHY bindings, must be 0;
+
+Example:
+
+edp_phy: edp-phy {
+   compatible = "rockchip,rk3288-dp-phy";
+   rockchip,grf = <>;
+   clocks = < SCLK_EDP_24M>;
+   clock-names = "24m";
+   #phy-cells = <0>;
+};
-- 
1.9.1

[PATCH v12 09/18] phy: Add driver for rockchip Display Port PHY

[Yakir Yang]

Add phy driver for the Rockchip DisplayPort PHY module. This
is required to get DisplayPort working in Rockchip SoCs.

Signed-off-by: Yakir Yang 
Reviewed-by: Heiko Stuebner 
---
Changes in v12:
- Re-order the include headers file alphabetically in phy-rockchip-dp.c (Jingoo)

Changes in v11: None
Changes in v10:
- Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK
BIT(4) -> BIT(20)

Changes in v9:
- Removed the unused the variable "res" in probe function. (Heiko)
- Removed the unused head file.

Changes in v8:
- Fix the mixed spacers on macro definitions. (Heiko)
- Remove the unnecessary empty line after clk_prepare_enable. (Heiko)

Changes in v7:
- Simply the commit message. (Kishon)
- Symmetrical enable/disbale the phy clock and power. (Kishon)

Changes in v6: None
Changes in v5:
- Remove "reg" DT property, cause driver could poweron/poweroff phy via
  the exist "grf" syscon already. And rename the example DT node from
  "edp_phy: phy at ff770274" to "edp_phy: edp-phy" directly. (Heiko)
- Add deivce_node at the front of driver, update phy_ops type from "static
  struct" to "static const struct". And correct the input paramters of
  devm_phy_create() interfaces. (Heiko)

Changes in v4:
- Add commit message, and remove the redundant rockchip_dp_phy_init()
  function, move those code to probe() method. And remove driver .owner
  number. (Kishon)

Changes in v3:
- Suggest, add rockchip dp phy driver, collect the phy clocks and
  power control. (Heiko)

Changes in v2: None

 drivers/phy/Kconfig   |   7 ++
 drivers/phy/Makefile  |   1 +
 drivers/phy/phy-rockchip-dp.c | 151 ++
 3 files changed, 159 insertions(+)
 create mode 100644 drivers/phy/phy-rockchip-dp.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 7eb5859d..7355819 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -319,6 +319,13 @@ config PHY_ROCKCHIP_USB
help
  Enable this to support the Rockchip USB 2.0 PHY.

+config PHY_ROCKCHIP_DP
+   tristate "Rockchip Display Port PHY Driver"
+   depends on ARCH_ROCKCHIP && OF
+   select GENERIC_PHY
+   help
+ Enable this to support the Rockchip Display Port PHY.
+
 config PHY_ST_SPEAR1310_MIPHY
tristate "ST SPEAR1310-MIPHY driver"
select GENERIC_PHY
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 075db1a..b1700cd 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -35,6 +35,7 @@ phy-exynos-usb2-$(CONFIG_PHY_S5PV210_USB2)+= 
phy-s5pv210-usb2.o
 obj-$(CONFIG_PHY_EXYNOS5_USBDRD)   += phy-exynos5-usbdrd.o
 obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)+= phy-qcom-apq8064-sata.o
 obj-$(CONFIG_PHY_ROCKCHIP_USB) += phy-rockchip-usb.o
+obj-$(CONFIG_PHY_ROCKCHIP_DP)  += phy-rockchip-dp.o
 obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)+= phy-qcom-ipq806x-sata.o
 obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY)   += phy-spear1310-miphy.o
 obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY)   += phy-spear1340-miphy.o
diff --git a/drivers/phy/phy-rockchip-dp.c b/drivers/phy/phy-rockchip-dp.c
new file mode 100644
index 000..88f09ec
--- /dev/null
+++ b/drivers/phy/phy-rockchip-dp.c
@@ -0,0 +1,151 @@
+/*
+ * Rockchip DP PHY driver
+ *
+ * Copyright (C) 2015 FuZhou Rockchip Co., Ltd.
+ * Author: Yakir Yang 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define GRF_SOC_CON12   0x0274
+
+#define GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK   BIT(20)
+#define GRF_EDP_REF_CLK_SEL_INTER   BIT(4)
+
+#define GRF_EDP_PHY_SIDDQ_HIWORD_MASK   BIT(21)
+#define GRF_EDP_PHY_SIDDQ_ON0
+#define GRF_EDP_PHY_SIDDQ_OFF   BIT(5)
+
+struct rockchip_dp_phy {
+   struct device  *dev;
+   struct regmap  *grf;
+   struct clk *phy_24m;
+};
+
+static int rockchip_set_phy_state(struct phy *phy, bool enable)
+{
+   struct rockchip_dp_phy *dp = phy_get_drvdata(phy);
+   int ret;
+
+   if (enable) {
+   ret = regmap_write(dp->grf, GRF_SOC_CON12,
+  GRF_EDP_PHY_SIDDQ_HIWORD_MASK |
+  GRF_EDP_PHY_SIDDQ_ON);
+   if (ret < 0) {
+   dev_err(dp->dev, "Can't enable PHY power %d\n", ret);
+   return ret;
+   }
+
+   ret = clk_prepare_enable(dp->phy_24m);
+   } else {
+   clk_disable_unprepare(dp->phy_24m);
+
+   ret = regmap_write(dp->grf, GRF_SOC_CON12,
+  GRF_EDP_PHY_SIDDQ_HIWORD_MASK |
+  GRF_EDP_PHY_SIDDQ_OFF);
+   }
+
+   return ret;
+}
+
+static int 

[PATCH v12 08/18] dt-bindings: add document for rockchip variant of analogix_dp

[Yakir Yang]

Rockchip DP driver is a helper driver of analogix_dp coder driver,
so most of the DT property should be descriped in analogix_dp document.

Signed-off-by: Yakir Yang 
Acked-by: Rob Herring 
Reviewed-by: Heiko Stuebner 
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Add the ack from Rob Herring

Changes in v9:
- Document more details for 'ports' property.

Changes in v8:
- Modify the commit subject name. (Heiko)

Changes in v7: None
Changes in v6: None
Changes in v5:
- Split binding doc's from driver changes. (Rob)
- Add eDP hotplug pinctrl property. (Heiko)

Changes in v4: None
Changes in v3: None
Changes in v2: None

 .../display/rockchip/analogix_dp-rockchip.txt  | 91 ++
 1 file changed, 91 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt 
b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
new file mode 100644
index 000..04d99e3
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -0,0 +1,91 @@
+Rockchip RK3288 specific extensions to the Analogix Display Port
+
+
+Required properties:
+- compatible: "rockchip,rk3288-edp";
+
+- reg: physical base address of the controller and length
+
+- clocks: from common clock binding: handle to dp clock.
+ of memory mapped region.
+
+- clock-names: from common clock binding:
+  Required elements: "dp" "pclk"
+
+- resets: Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+
+- pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
+- pinctrl-0: pin-control mode. should be <_hpd>
+
+- reset-names: Must include the name "dp"
+
+- rockchip,grf: this soc should set GRF regs, so need get grf here.
+
+- ports: there are 2 port nodes with endpoint definitions as defined in
+  Documentation/devicetree/bindings/media/video-interfaces.txt.
+Port 0: contained 2 endpoints, connecting to the output of vop.
+Port 1: contained 1 endpoint, connecting to the input of panel.
+
+For the below properties, please refer to Analogix DP binding document:
+ * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
+- phys (required)
+- phy-names (required)
+- hpd-gpios (optional)
+---
+
+Example:
+   dp-controller: dp at ff97 {
+   compatible = "rockchip,rk3288-dp";
+   reg = <0xff97 0x4000>;
+   interrupts = ;
+   clocks = < SCLK_EDP>, < PCLK_EDP_CTRL>;
+   clock-names = "dp", "pclk";
+   phys = <_phy>;
+   phy-names = "dp";
+
+   rockchip,grf = <>;
+   resets = < 111>;
+   reset-names = "dp";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_hpd>;
+
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   edp_in: port at 0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   edp_in_vopb: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <_out_edp>;
+   };
+   edp_in_vopl: endpoint at 1 {
+   reg = <1>;
+   remote-endpoint = <_out_edp>;
+   };
+   };
+
+   edp_out: port at 1 {
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   edp_out_panel: endpoint {
+   reg = <0>;
+   remote-endpoint = <_in_edp>
+   };
+   };
+   };
+   };
+
+   pinctrl {
+   edp {
+   edp_hpd: edp-hpd {
+   rockchip,pins = <7 11 RK_FUNC_2 
_pull_none>;
+   };
+   };
+   };
-- 
1.9.1

[PATCH v12 07/18] drm: rockchip: dp: add rockchip platform dp driver

[Yakir Yang]

Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.

Signed-off-by: Yakir Yang 
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig to tabs here (Heiko)

Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- Remove the empty line at the end of document, and correct the endpoint
  numbers in the example DT node, and remove the regulator iomux setting
  in driver code while using the pinctl in devicetree instead. (Heiko)
- Add device type declared, cause the previous "platform device type
  support (v4 11/16)" already merge into (v5 02/14).
- Implement connector registration code. (Thierry)

Changes in v4:
- Remove some deprecated DT properties in rockchip dp document.

Changes in v3:
- Leave "sclk_edp_24m" to rockchip dp phy driver which name to "24m",
  and leave "sclk_edp" to analogix dp core driver which name to "dp",
  and leave "pclk_edp" to rockchip dp platform driver which name to
  "pclk". (Thierry & Heiko)
- Add devicetree binding document. (Heiko)
- Remove "rockchip,panel" DT property, take use of remote point to get panel
  node. (Heiko)
- Add the new function point dp_platdata->get_modes() init.

Changes in v2:
- Get panel node with remote-endpoint method, and create devicetree binding
  for driver. (Heiko)
- Remove the clock enable/disbale with "sclk_edp" & "sclk_edp_24m",
  leave those clock to rockchip dp phy driver.

 drivers/gpu/drm/rockchip/Kconfig|   9 +
 drivers/gpu/drm/rockchip/Makefile   |   1 +
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 385 
 include/drm/bridge/analogix_dp.h|   1 +
 4 files changed, 396 insertions(+)
 create mode 100644 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 35215f6..686cb49 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -25,3 +25,12 @@ config ROCKCHIP_DW_HDMI
  for the Synopsys DesignWare HDMI driver. If you want to
  enable HDMI on RK3288 based SoC, you should selet this
  option.
+
+config ROCKCHIP_ANALOGIX_DP
+   tristate "Rockchip specific extensions for Analogix DP driver"
+   depends on DRM_ROCKCHIP
+   select DRM_ANALOGIX_DP
+   help
+ This selects support for Rockchip SoC specific extensions
+ for the Analogix Core DP driver. If you want to enable DP
+ on RK3288 based SoC, you should selet this option.
diff --git a/drivers/gpu/drm/rockchip/Makefile 
b/drivers/gpu/drm/rockchip/Makefile
index f3d8a19..8ad01fb 100644
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -6,5 +6,6 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o 
rockchip_drm_fbdev.o \
rockchip_drm_gem.o

 obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
+obj-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o

 obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c 
b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
new file mode 100644
index 000..9552273
--- /dev/null
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -0,0 +1,385 @@
+/*
+ * Rockchip SoC DP (Display Port) interface driver.
+ *
+ * Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
+ * Author: Andy Yan 
+ * Yakir Yang 
+ * Jeff Chen 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "rockchip_drm_drv.h"
+#include "rockchip_drm_vop.h"
+
+#define to_dp(nm)  container_of(nm, struct rockchip_dp_device, nm)
+
+/* dp grf register offset */
+#define GRF_SOC_CON60x025c
+#define GRF_EDP_LCD_SEL_MASKBIT(5)
+#define GRF_EDP_SEL_VOP_LIT BIT(5)
+#define GRF_EDP_SEL_VOP_BIG 0
+
+struct rockchip_dp_device {
+   struct drm_device*drm_dev;
+   struct device*dev;
+   struct drm_encoder   encoder;
+   struct drm_display_mode  mode;
+
+   struct clk   *pclk;
+   struct regmap*grf;
+   struct reset_control *rst;
+
+   struct analogix_dp_plat_data plat_data;
+};
+
+static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
+{
+   reset_control_assert(dp->rst);
+   usleep_range(10, 20);
+   reset_control_deassert(dp->rst);
+
+   return 0;
+}

[PATCH v12 06/18] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver

[Yakir Yang]

After exynos_dp have been split the common IP code into analogix_dp driver,
the analogix_dp driver have deprecated some Samsung platform properties which
could be dynamically parsed from EDID/MODE/DPCD message, so this is an update
for Exynos DTS file for dp-controller.

Beside the backward compatibility is fully preserved, so there are no
bisectability break that make this change in a separate patch.

Signed-off-by: Yakir Yang 
Reviewed-by: Krzysztof Kozlowski 
Reviewed-by: Jingoo Han < jingoohan1 at gmail.com> 
Tested-by: Javier Martinez Canillas 
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- Fix Peach Pit hpd property name error:
-   hpd-gpio = < 6 0>;
+   hpd-gpios = < 6 0>;

Changes in v5:
- Correct the misspell in commit message. (Krzysztof)

Changes in v4:
- Separate all DTS changes to a separate patch. (Krzysztof)

Changes in v3: None
Changes in v2: None

 arch/arm/boot/dts/exynos5250-arndale.dts  | 2 --
 arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 --
 arch/arm/boot/dts/exynos5250-snow-common.dtsi | 4 +---
 arch/arm/boot/dts/exynos5250-spring.dts   | 4 +---
 arch/arm/boot/dts/exynos5420-peach-pit.dts| 4 +---
 arch/arm/boot/dts/exynos5420-smdk5420.dts | 2 --
 arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 +---
 7 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts 
b/arch/arm/boot/dts/exynos5250-arndale.dts
index c000532..b1790cf 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -124,8 +124,6 @@
  {
status = "okay";
samsung,color-space = <0>;
-   samsung,dynamic-range = <0>;
-   samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 0f5dcd4..f30c2db 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -80,8 +80,6 @@

  {
samsung,color-space = <0>;
-   samsung,dynamic-range = <0>;
-   samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi 
b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
index 5cb33ba..b96624b 100644
--- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
+++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
@@ -236,12 +236,10 @@
pinctrl-names = "default";
pinctrl-0 = <_hpd>;
samsung,color-space = <0>;
-   samsung,dynamic-range = <0>;
-   samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <2>;
-   samsung,hpd-gpio = < 7 GPIO_ACTIVE_HIGH>;
+   hpd-gpios = < 7 GPIO_ACTIVE_HIGH>;

ports {
port at 0 {
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts 
b/arch/arm/boot/dts/exynos5250-spring.dts
index c1edd6d..91881d7 100644
--- a/arch/arm/boot/dts/exynos5250-spring.dts
+++ b/arch/arm/boot/dts/exynos5250-spring.dts
@@ -74,12 +74,10 @@
pinctrl-names = "default";
pinctrl-0 = <_hpd_gpio>;
samsung,color-space = <0>;
-   samsung,dynamic-range = <0>;
-   samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <1>;
-   samsung,hpd-gpio = < 0 GPIO_ACTIVE_HIGH>;
+   hpd-gpios = < 0 GPIO_ACTIVE_HIGH>;
 };

  {
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 35cfb07..2f37c87 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -148,12 +148,10 @@
pinctrl-names = "default";
pinctrl-0 = <_hpd_gpio>;
samsung,color-space = <0>;
-   samsung,dynamic-range = <0>;
-   samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x06>;
samsung,lane-count = <2>;
-   samsung,hpd-gpio = < 6 GPIO_ACTIVE_HIGH>;
+   hpd-gpios = < 6 GPIO_ACTIVE_HIGH>;

ports {
port at 0 {
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index ac35aef..f67344f 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -93,8 +93,6 @@
pinctrl-names = "default";
pinctrl-0 = <_hpd>;
samsung,color-space = <0>;
-   samsung,dynamic-range = <0>;
-   samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
samsung,link-rate = <0x0a>;
samsung,lane-count = <4>;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts 
b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 7b018e4..363c95f 100644
--- 

[PATCH v12 05/18] dt-bindings: add document for analogix display port driver

[Yakir Yang]

Analogix dp driver is split from exynos dp driver, so we just
make an copy of exynos_dp.txt, and then simplify exynos_dp.txt

Beside update some exynos dtsi file with the latest change
according to the devicetree binding documents.

Signed-off-by: Yakir Yang 
Acked-by: Rob Herring 
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Add the ack from Rob Herring

Changes in v9: None
Changes in v8:
- Correct the right document path of display-timing.txt (Heiko)
- Correct the misspell of 'from' to 'frm'. (Heiko)

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Split all DTS changes, and provide backward compatibility. Mark old
  properties as deprecated but still support them. (Krzysztof)
- Update "analogix,hpd-gpio" to "hpd-gpios" prop name. (Rob)
- Deprecated some properties which could parsed from Edid/Mode/DPCD. (Thierry)
"analogix,color-space" & "analogix,color-depth"   &
"analogix,link-rate"   & "analogix,lane-count"&
"analogix,ycbcr-coeff" & "analogix,dynamic-range" &
"vsync-active-high"& "hsync-active-high"  & "interlaces"

Changes in v3:
- Add devicetree binding documents. (Heiko)
- Remove sync pol & colorimetry properies from the new analogix dp driver
  devicetree binding. (Thierry)
- Update the exist exynos dtsi file with the latest DP DT properies.

Changes in v2: None

 .../bindings/display/bridge/analogix_dp.txt| 50 +
 .../bindings/display/exynos/exynos_dp.txt  | 65 --
 2 files changed, 72 insertions(+), 43 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/analogix_dp.txt

diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt 
b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
new file mode 100644
index 000..7659a7a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
@@ -0,0 +1,50 @@
+Analogix Display Port bridge bindings
+
+Required properties for dp-controller:
+   -compatible:
+   platform specific such as:
+* "samsung,exynos5-dp"
+* "rockchip,rk3288-dp"
+   -reg:
+   physical base address of the controller and length
+   of memory mapped region.
+   -interrupts:
+   interrupt combiner values.
+   -clocks:
+   from common clock binding: handle to dp clock.
+   -clock-names:
+   from common clock binding: Shall be "dp".
+   -interrupt-parent:
+   phandle to Interrupt combiner node.
+   -phys:
+   from general PHY binding: the phandle for the PHY device.
+   -phy-names:
+   from general PHY binding: Should be "dp".
+
+Optional properties for dp-controller:
+   -hpd-gpios:
+   Hotplug detect GPIO.
+   Indicates which GPIO should be used for hotplug detection
+   -port@[X]: SoC specific port nodes with endpoint definitions as defined
+   in Documentation/devicetree/bindings/media/video-interfaces.txt,
+   please refer to the SoC specific binding document:
+   * Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
+   * 
Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt
+
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+---
+
+Example:
+
+   dp-controller {
+   compatible = "samsung,exynos5-dp";
+   reg = <0x145b 0x1>;
+   interrupts = <10 3>;
+   interrupt-parent = <>;
+   clocks = < 342>;
+   clock-names = "dp";
+
+   phys = <_phy>;
+   phy-names = "dp";
+   };
diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt 
b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
index 64693f2..9905081 100644
--- a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
+++ b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
@@ -31,45 +31,31 @@ Required properties for dp-controller:
from general PHY binding: the phandle for the PHY device.
-phy-names:
from general PHY binding: Should be "dp".
-   -samsung,color-space:
-   input video data format.
-   COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
-   -samsung,dynamic-range:
-   dynamic range for input video data.
-   VESA = 0, CEA = 1
-   -samsung,ycbcr-coeff:
-   YCbCr co-efficients for input video.
-   COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
-   -samsung,color-depth:
-   number of bits per colour component.
-   COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
-   -samsung,link-rate:
-   link 

[PATCH v12 04/18] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range

[Yakir Yang]

Both hsync/vsync polarity and interlace mode can be parsed from
drm display mode, and dynamic_range and ycbcr_coeff can be judge
by the video code.

But presumably Exynos still relies on the DT properties, so take
good use of mode_fixup() in to achieve the compatibility hacks.

Signed-off-by: Yakir Yang 
Reviewed-by: Krzysztof Kozlowski 
Tested-by: Javier Martinez Canillas 
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7:
- Back to use the of_property_read_bool() interfacs to provoid backward
  compatibility of "hsync-active-high" "vsync-active-high" "interlaced"
  to avoid -EOVERFLOW error (Krzysztof)

Changes in v6: None
Changes in v5:
- Switch video timing type to "u32", so driver could use "of_property_read_u32"
  to get the backword timing values. Krzysztof suggest me that driver could use
  the "of_property_read_bool" to get backword timing values, but that interfacs
  would modify the original drm_display_mode timing directly (whether those
  properties exists or not).

Changes in v4:
- Provide backword compatibility with samsung. (Krzysztof)

Changes in v3:
- Dynamic parse video timing info from struct drm_display_mode and
  struct drm_display_info. (Thierry)

Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 148 +
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |   2 +-
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  14 +-
 3 files changed, 103 insertions(+), 61 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index fac8ad4..27752df 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -893,8 +893,8 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
return;
}

-   ret = analogix_dp_set_link_train(dp, dp->video_info->lane_count,
-dp->video_info->link_rate);
+   ret = analogix_dp_set_link_train(dp, dp->video_info.lane_count,
+dp->video_info.link_rate);
if (ret) {
dev_err(dp->dev, "unable to do link train\n");
return;
@@ -1077,6 +1077,85 @@ static void analogix_dp_bridge_disable(struct drm_bridge 
*bridge)
dp->dpms_mode = DRM_MODE_DPMS_OFF;
 }

+static void analogix_dp_bridge_mode_set(struct drm_bridge *bridge,
+   struct drm_display_mode *orig_mode,
+   struct drm_display_mode *mode)
+{
+   struct analogix_dp_device *dp = bridge->driver_private;
+   struct drm_display_info *display_info = >connector.display_info;
+   struct video_info *video = >video_info;
+   struct device_node *dp_node = dp->dev->of_node;
+   int vic;
+
+   /* Input video interlaces & hsync pol & vsync pol */
+   video->interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
+   video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
+   video->h_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
+
+   /* Input video dynamic_range & colorimetry */
+   vic = drm_match_cea_mode(mode);
+   if ((vic == 6) || (vic == 7) || (vic == 21) || (vic == 22) ||
+   (vic == 2) || (vic == 3) || (vic == 17) || (vic == 18)) {
+   video->dynamic_range = CEA;
+   video->ycbcr_coeff = COLOR_YCBCR601;
+   } else if (vic) {
+   video->dynamic_range = CEA;
+   video->ycbcr_coeff = COLOR_YCBCR709;
+   } else {
+   video->dynamic_range = VESA;
+   video->ycbcr_coeff = COLOR_YCBCR709;
+   }
+
+   /* Input vide bpc and color_formats */
+   switch (display_info->bpc) {
+   case 12:
+   video->color_depth = COLOR_12;
+   break;
+   case 10:
+   video->color_depth = COLOR_10;
+   break;
+   case 8:
+   video->color_depth = COLOR_8;
+   break;
+   case 6:
+   video->color_depth = COLOR_6;
+   break;
+   default:
+   video->color_depth = COLOR_8;
+   break;
+   }
+   if (display_info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+   video->color_space = COLOR_YCBCR444;
+   else if (display_info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+   video->color_space = COLOR_YCBCR422;
+   else if (display_info->color_formats & DRM_COLOR_FORMAT_RGB444)
+   video->color_space = COLOR_RGB;
+   else
+   video->color_space = COLOR_RGB;
+
+   /*
+* NOTE: those property parsing code is used for providing backward
+* compatibility for samsung platform.
+* Due to we used the "of_property_read_u32" interfaces, when this
+* property isn't present, the "video_info" 

[PATCH v12 03/18] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count

[Yakir Yang]

link_rate and lane_count already configured in analogix_dp_set_link_train(),
so we don't need to config those repeatly after training finished, just
remove them out.

Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7Gbps, 5.4Gbps}.

Signed-off-by: Yakir Yang 
Tested-by: Javier Martinez Canillas 
---
Changes in v12:
- Remove the enum link_rate_type struct, using the marcos in drm_dp_helper.h 
(Jingoo)

Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- Update commit message more readable. (Jingoo)
- Adjust the order from 05 to 04

Changes in v3:
- The link_rate and lane_count shouldn't config to the DT property value
  directly, but we can take those as hardware limite. For example, RK3288
  only support 4 physical lanes of 2.7/1.62 Gbps/lane, so DT property would
  like "link-rate = 0x0a" "lane-count = 4". (Thierry)

Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 14 +++---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  7 +--
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  |  2 +-
 3 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 915fb46..fac8ad4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -627,6 +627,8 @@ static void analogix_dp_get_max_rx_bandwidth(struct 
analogix_dp_device *dp,
/*
 * For DP rev.1.1, Maximum link rate of Main Link lanes
 * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps
+* For DP rev.1.2, Maximum link rate of Main Link lanes
+* 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps
 */
analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, );
*bandwidth = data;
@@ -647,7 +649,7 @@ static void analogix_dp_get_max_rx_lane_count(struct 
analogix_dp_device *dp,

 static void analogix_dp_init_training(struct analogix_dp_device *dp,
  enum link_lane_count_type max_lane,
- enum link_rate_type max_rate)
+ int max_rate)
 {
/*
 * MACRO_RST must be applied after the PLL_LOCK to avoid
@@ -659,11 +661,12 @@ static void analogix_dp_init_training(struct 
analogix_dp_device *dp,
analogix_dp_get_max_rx_bandwidth(dp, >link_train.link_rate);
analogix_dp_get_max_rx_lane_count(dp, >link_train.lane_count);

-   if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
-   (dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
+   if ((dp->link_train.link_rate != DP_LINK_BW_1_62) &&
+   (dp->link_train.link_rate != DP_LINK_BW_2_7) &&
+   (dp->link_train.link_rate != DP_LINK_BW_5_4)) {
dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
dp->link_train.link_rate);
-   dp->link_train.link_rate = LINK_RATE_1_62GBPS;
+   dp->link_train.link_rate = DP_LINK_BW_1_62;
}

if (dp->link_train.lane_count == 0) {
@@ -901,9 +904,6 @@ static void analogix_dp_commit(struct analogix_dp_device 
*dp)
analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
analogix_dp_enable_enhanced_mode(dp, 1);

-   analogix_dp_set_lane_count(dp, dp->video_info->lane_count);
-   analogix_dp_set_link_bandwidth(dp, dp->video_info->link_rate);
-
analogix_dp_init_video(dp);
ret = analogix_dp_config_video(dp);
if (ret)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index f7dfc8e..911642e 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -20,11 +20,6 @@
 #define MAX_CR_LOOP5
 #define MAX_EQ_LOOP5

-enum link_rate_type {
-   LINK_RATE_1_62GBPS = 0x06,
-   LINK_RATE_2_70GBPS = 0x0a
-};
-
 enum link_lane_count_type {
LANE_COUNT1 = 1,
LANE_COUNT2 = 2,
@@ -128,7 +123,7 @@ struct video_info {
enum color_coefficient ycbcr_coeff;
enum color_depth color_depth;

-   enum link_rate_type link_rate;
+   int link_rate;
enum link_lane_count_type lane_count;
 };

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index a388c0a..eb0b63c 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -855,7 +855,7 @@ void analogix_dp_set_link_bandwidth(struct 
analogix_dp_device *dp, u32 bwtype)
u32 reg;

reg = bwtype;
-   if ((bwtype == LINK_RATE_2_70GBPS) || (bwtype == LINK_RATE_1_62GBPS))
+   if ((bwtype == 

[PATCH v12 02/18] drm: bridge: analogix/dp: fix some obvious code style

[Yakir Yang]

Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.

Signed-off-by: Yakir Yang 
Acked-by: Jingoo Han 
Reviewed-by: Krzysztof Kozlowski 
Tested-by: Javier Martinez Canillas 
---
Changes in v12:
- Add the ack from Jingoo

Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- Resequence this patch after analogix_dp driver have been split
  from exynos_dp code, and rephrase reasonable commit message, and
  remove some controversial style (Krzysztof)
-   analogix_dp_write_byte_to_dpcd(
-   dp, DP_TEST_RESPONSE,
+   analogix_dp_write_byte_to_dpcd(dp,
+   DP_TEST_RESPONSE,
DP_TEST_EDID_CHECKSUM_WRITE);

Changes in v4: None
Changes in v3: None
Changes in v2:
- Improved commit message more readable, and avoid using some
  uncommon style like bellow: (Joe Preches)
-  retval = exynos_dp_read_bytes_from_i2c(...
  ...);
+  retval =
+  exynos_dp_read_bytes_from_i2c(..);

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 129 ++---
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  72 ++--
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 124 ++--
 3 files changed, 163 insertions(+), 162 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 3ac4f1d..915fb46 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -64,7 +64,7 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device 
*dp)

while (analogix_dp_get_plug_in_status(dp) != 0) {
timeout_loop++;
-   if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+   if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
dev_err(dp->dev, "failed to get hpd plug status\n");
return -ETIMEDOUT;
}
@@ -101,8 +101,8 @@ static int analogix_dp_read_edid(struct analogix_dp_device 
*dp)

/* Read Extension Flag, Number of 128-byte EDID extension blocks */
retval = analogix_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
-   EDID_EXTENSION_FLAG,
-   _block);
+   EDID_EXTENSION_FLAG,
+   _block);
if (retval)
return retval;

@@ -110,7 +110,8 @@ static int analogix_dp_read_edid(struct analogix_dp_device 
*dp)
dev_dbg(dp->dev, "EDID data includes a single extension!\n");

/* Read EDID data */
-   retval = analogix_dp_read_bytes_from_i2c(dp, 
I2C_EDID_DEVICE_ADDR,
+   retval = analogix_dp_read_bytes_from_i2c(dp,
+   I2C_EDID_DEVICE_ADDR,
EDID_HEADER_PATTERN,
EDID_BLOCK_LENGTH,
[EDID_HEADER_PATTERN]);
@@ -141,7 +142,7 @@ static int analogix_dp_read_edid(struct analogix_dp_device 
*dp)
}

analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
-   _vector);
+   _vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
analogix_dp_write_byte_to_dpcd(dp,
DP_TEST_EDID_CHECKSUM,
@@ -155,10 +156,8 @@ static int analogix_dp_read_edid(struct analogix_dp_device 
*dp)

/* Read EDID data */
retval = analogix_dp_read_bytes_from_i2c(dp,
-   I2C_EDID_DEVICE_ADDR,
-   EDID_HEADER_PATTERN,
-   EDID_BLOCK_LENGTH,
-   [EDID_HEADER_PATTERN]);
+   I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
+   EDID_BLOCK_LENGTH, [EDID_HEADER_PATTERN]);
if (retval != 0) {
dev_err(dp->dev, "EDID Read failed!\n");
return -EIO;
@@ -169,16 +168,13 @@ static int analogix_dp_read_edid(struct 
analogix_dp_device *dp)
return -EIO;
}

-   analogix_dp_read_byte_from_dpcd(dp,
-   DP_TEST_REQUEST,
-   _vector);
+   analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+   _vector);
if (test_vector & DP_TEST_LINK_EDID_READ) {
analogix_dp_write_byte_to_dpcd(dp,
-   

[PATCH v12 01/18] drm: bridge: analogix/dp: split exynos dp driver to bridge directory

[Yakir Yang]

Split the dp core driver from exynos directory to bridge directory,
and rename the core driver to analogix_dp_*, rename the platform
code to exynos_dp.

Beside the new analogix_dp driver would export six hooks.
"analogix_dp_bind()" and "analogix_dp_unbind()"
"analogix_dp_suspned()" and "analogix_dp_resume()"
"analogix_dp_detect()" and "analogix_dp_get_modes()"

The bind/unbind symbols is used for analogix platform driver to connect
with analogix_dp core driver. And the detect/get_modes is used for analogix
platform driver to init the connector.

They reason why connector need register in helper driver is rockchip drm
haven't implement the atomic API, but Exynos drm have implement it, so
there would need two different connector helper functions, that's why we
leave the connector register in helper driver.

Signed-off-by: Yakir Yang 
---
Changes in v12:
- Move the connector init to analogix_dp driver, and using ATOMIC helper(Heiko)

Changes in v11:
- Uses tabs to fix the indentation issues in analogix_dp_core.h (Heiko)

Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- Fix the Kconfig recursive dependency (Javier)

Changes in v5:
- Correct the check condition of gpio_is_valid when driver try to get
  the "hpd-gpios" DT propery. (Heiko)
- Move the platform attach callback in the front of core driver bridge
  attch function. Cause once platform failed at attach, core driver should
  still failed, so no need to init connector before platform attached 
(Krzysztof)
- Keep code style no changes with the previous exynos_dp_code.c in this
  patch, and update commit message about the new export symbol (Krzysztof)
- Gather the device type patch (v4 11/16) into this one. (Krzysztof)
- leave out the connector registration to analogix platform driver. (Thierry)

Changes in v4:
- Update "analogix,hpd-gpios" to "hpd-gpios" DT propery. (Rob)
- Rename "analogix_dp-exynos.c" file name to "exynos_dp.c" (Jingoo)
- Create a separate folder for analogix code in bridge/ (Archit)

Changes in v3:
- Move exynos's video_timing code to analogix_dp-exynos platform driver,
  add get_modes method to struct analogix_dp_plat_data. (Thierry)
- Rename some "samsung*" dts propery to "analogix*". (Heiko)

Changes in v2:
- Remove new copyright (Jingoo)
- Fix compiled failed due to analogix_dp_device misspell

 drivers/gpu/drm/bridge/Kconfig |2 +
 drivers/gpu/drm/bridge/Makefile|1 +
 drivers/gpu/drm/bridge/analogix/Kconfig|3 +
 drivers/gpu/drm/bridge/analogix/Makefile   |1 +
 .../analogix/analogix_dp_core.c}   |  816 +
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  277 +
 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 1263 
 .../analogix/analogix_dp_reg.h}|  258 ++--
 drivers/gpu/drm/exynos/Kconfig |3 +-
 drivers/gpu/drm/exynos/Makefile|2 +-
 drivers/gpu/drm/exynos/exynos_dp.c |  328 +
 drivers/gpu/drm/exynos/exynos_dp_core.h|  282 -
 drivers/gpu/drm/exynos/exynos_dp_reg.c | 1263 
 include/drm/bridge/analogix_dp.h   |   40 +
 14 files changed, 2373 insertions(+), 2166 deletions(-)
 create mode 100644 drivers/gpu/drm/bridge/analogix/Kconfig
 create mode 100644 drivers/gpu/drm/bridge/analogix/Makefile
 rename drivers/gpu/drm/{exynos/exynos_dp_core.c => 
bridge/analogix/analogix_dp_core.c} (52%)
 create mode 100644 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
 create mode 100644 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
 rename drivers/gpu/drm/{exynos/exynos_dp_reg.h => 
bridge/analogix/analogix_dp_reg.h} (64%)
 create mode 100644 drivers/gpu/drm/exynos/exynos_dp.c
 delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_core.h
 delete mode 100644 drivers/gpu/drm/exynos/exynos_dp_reg.c
 create mode 100644 include/drm/bridge/analogix_dp.h

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 27e2022..efd94e0 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -40,4 +40,6 @@ config DRM_PARADE_PS8622
---help---
  Parade eDP-LVDS bridge chip driver.

+source "drivers/gpu/drm/bridge/analogix/Kconfig"
+
 endmenu
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index f13c33d..ff821f4 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
 obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
 obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
+obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig 
b/drivers/gpu/drm/bridge/analogix/Kconfig
new file mode 100644
index 000..80f286f
--- /dev/null
+++ 

[PATCH v12 0/18] Add Analogix Core Display Port Driver

[Yakir Yang]

Hi all,

   The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
share the same IP, so a lot of parts can be re-used. I split the common
code into bridge directory, then rk3288 and exynos only need to keep
some platform code. Cause I can't find the exact IP name of exynos dp
controller, so I decide to name dp core driver with "analogix" which I
find in rk3288 eDP TRM

But  there are still three light registers setting different between
exynos and rk3288.
1. RK3288 have five special pll registers which not indicate in exynos
   dp controller.
2. The address of DP_PHY_PD(dp phy power manager register) are different
   between rk3288 and exynos.
3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug
   register).

Due to Mark Yao have introduced the ATOMIC support to Rockchip drm, so it's
okay to use the ATOMIC helpers functions in connector_funcs. No need to
splict the connector init to platform driver anymore, and this is the biggest
change in version 12.

I have tested this on Rockchip Pinky platform, but

Previous version have been well tested on Rockchip platform and Samsung 
platform,
but for this version I only tested on Rockchip Pinky Chromebook, haven't tested
on Samsung platform yet(would test later).

Thanks,
- Yakir


Changes in v12:
- Move the connector init to analogix_dp driver, and using ATOMIC helper(Heiko)
- Add the ack from Jingoo
- Remove the enum link_rate_type struct, using the marcos in drm_dp_helper.h 
(Jingoo)
- Re-order the include headers file alphabetically in phy-rockchip-dp.c (Jingoo)
- Using another way to expand the AUX reply wait time (Jingoo)

Changes in v11:
- Uses tabs to fix the indentation issues in analogix_dp_core.h (Heiko)
- Correct the title of this rockchip dp phy document(Rob)
- Add the ack from Rob Herring
- Rename the "analogix,need-force-hpd" to common 'force-hpd' (Rob)
- Add the ack from Rob Herring
- Revert parts of Gustavo Padovan's changes in commit:
drm/exynos: do not start enabling DP at bind() phase
  Add dp phy poweron function in bind time.
- Move the panel prepare from get_modes time to bind time, and move
  the panel unprepare from bridge->disable to unbind time. (Heiko)

Changes in v10:
- Add the ack from Rob Herring
- Correct the ROCKCHIP_ANALOGIX_DP indentation in Kconfig to tabs here (Heiko)
- Add the ack from Rob Herring
- Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK
BIT(4) -> BIT(20)
- Remove the surplus "plat_data" check. (Heiko)
-   switch (dp->plat_data && dp->plat_data->dev_type) {
+   switch (dp->plat_data->dev_type) {

Changes in v9:
- Document more details for 'ports' property.
- Removed the unused the variable "res" in probe function. (Heiko)
- Removed the unused head file.

Changes in v8:
- Correct the right document path of display-timing.txt (Heiko)
- Correct the misspell of 'from' to 'frm'. (Heiko)
- Modify the commit subject name. (Heiko)
- Fix the mixed spacers on macro definitions. (Heiko)
- Remove the unnecessary empty line after clk_prepare_enable. (Heiko)
- Remove the specific address in the example node name. (Heiko)

Changes in v7:
- Back to use the of_property_read_bool() interfacs to provoid backward
  compatibility of "hsync-active-high" "vsync-active-high" "interlaced"
  to avoid -EOVERFLOW error (Krzysztof)
- Simply the commit message. (Kishon)
- Symmetrical enable/disbale the phy clock and power. (Kishon)
- Simplify the commit message. (Kishon)

Changes in v6:
- Fix the Kconfig recursive dependency (Javier)
- Fix Peach Pit hpd property name error:
-   hpd-gpio = < 6 0>;
+   hpd-gpios = < 6 0>;

Changes in v5:
- Correct the check condition of gpio_is_valid when driver try to get
  the "hpd-gpios" DT propery. (Heiko)
- Move the platform attach callback in the front of core driver bridge
  attch function. Cause once platform failed at attach, core driver should
  still failed, so no need to init connector before platform attached 
(Krzysztof)
- Keep code style no changes with the previous exynos_dp_code.c in this
  patch, and update commit message about the new export symbol (Krzysztof)
- Gather the device type patch (v4 11/16) into this one. (Krzysztof)
- leave out the connector registration to analogix platform driver. (Thierry)
- Resequence this patch after analogix_dp driver have been split
  from exynos_dp code, and rephrase reasonable commit message, and
  remove some controversial style (Krzysztof)
-   analogix_dp_write_byte_to_dpcd(
-   dp, DP_TEST_RESPONSE,
+   analogix_dp_write_byte_to_dpcd(dp,
+   DP_TEST_RESPONSE,
DP_TEST_EDID_CHECKSUM_WRITE);
- Switch video timing type to "u32", so driver could use "of_property_read_u32"
  to get the backword timing values. Krzysztof suggest me that driver could use
  the "of_property_read_bool" to get backword timing values, but that interfacs
  would modify the original 

[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it

[Russell King - ARM Linux]

On Wed, Dec 23, 2015 at 06:20:33PM +0100, Jean-Francois Moine wrote:
> On Wed, 23 Dec 2015 10:05:34 +
> Liviu Dudau  wrote:
> 
> > > What was the reason to keep the "ports" node instead of the device?
> > 
> > The function is an extract of common code sprinkled through a few DRM 
> > drivers,
> > they all used port rather than port->parent.
> 
> Sorry for I could find such drivers. May you give me any pointer?

imx-drm probably.

> > Have a look at my v2 where I've introduced two compare functions and also
> > modified the Rockchip compare_port() to use port->parent in the comparison. 
> > I
> > guess that should solve your problem.
> 
> Keeping the port instead of the parent asks for more code, but,
> especially, it also asks for changes in the component drivers because,
> at bind time, in 'data', they get a port instead of the device.

Sorry, this doesn't make sense.  You have far too many sub-clauses
which mean nothing at all.  Please rephrase.

-- 
RMK's Patch system: http://www.arm.linux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

[Bug 64661] udl causes blank screen

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=64661

--- Comment #8 from Jason Schulz  ---
(In reply to Austin Robertson from comment #7)
> What versions of the nVidia driver and kernel do you have this working with?
> I've been trying to resolve the same problem.

I am currently using version 4.3.3 of the kernel and 358.16 for nvidia drivers.
 However this started working correctly somewhere in 3.x.x and/or with a much
earlier version of the nvidia drivers.

> I get the same message in dmesg indicating from udl that the swiotlb buffer
> is full. Here's the relevant dmesg.debug from my machine:

IIRC, an earlier kernel update resolved that specific issue.  The kernel
sources I'm using are Gentoo/Funtoo.

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[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it

[Jean-Francois Moine]

On Wed, 23 Dec 2015 10:05:34 +
Liviu Dudau  wrote:

> > What was the reason to keep the "ports" node instead of the device?
> 
> The function is an extract of common code sprinkled through a few DRM drivers,
> they all used port rather than port->parent.

Sorry for I could find such drivers. May you give me any pointer?

> Have a look at my v2 where I've introduced two compare functions and also
> modified the Rockchip compare_port() to use port->parent in the comparison. I
> guess that should solve your problem.

Keeping the port instead of the parent asks for more code, but,
especially, it also asks for changes in the component drivers because,
at bind time, in 'data', they get a port instead of the device.

You might say that this could be interesting for components with many
different masters (video and audio), but this could be solved adding
intermediate device nodes in the DT (ports).

-- 
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Jef |   http://moinejf.free.fr/

[Bug 80419] XCOM: Enemy Unknown Causes lockup

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=80419

--- Comment #92 from Jose Fonseca  ---
(In reply to Daniel Exner from comment #91)
> So it seems like it is indeed a Bug in the game to try to address this index
> element but also the operation should not crash and its unspecified
> behaviour.
> 
> Perhaps radeonsi should handle it the same as other mesa drivers to for the
> sake of cosistency.

Yes, crashing should be avoided.

But correct rendering, no, not generally.  Not unless it can be without
performance impact (which is probably not the case.)

Otherwise it would be sacrificing the performance of correct GL apps, for the
sake of buggy GL apps.  Which is rewarding the wrong behavior.


It's not that hard: the start/end parameters are hints precisely aimed at
enabling the driver to do performance optimizations.  If the application
developers can't get them right, just them don't set to invalid values!  Use 0
/ ~0 which is guaranteed to work.   This way the application developers that
actually bothered to get them right don't get penalized.  Everybody's happy.


Maybe it would help if Mesa's KHR_debug / apitrace checked for this sort of
error.

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HDLCD tree for linux-next

[Liviu Dudau]

Hi Stephen,

I would like to add the HDLCD DRM driver tree to linux-next. I'm planning
to send a pull request for inclusion into v4.5 and I hope that getting a
wider exposure for a few weeks is beneficial.

Please add the following git tree:

   git://linux-arm.org/linux-ld for-upstream/hdlcd

It is based on Dave Airlie's drm-next tree as of 23rd of December.

Many thanks,
Liviu

-- 

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| fix the world,  |
| but they're not |
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 \ source code!  /
  ---
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[PATCH] drm/amd/powerplay: drop dual include.

[Dave Airlie]

From: Dave Airlie 

Seems to get included twice.

Signed-off-by: Dave Airlie 
---
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 
b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index eb0f1b2..f997b8d 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -30,7 +30,6 @@
 #include "pp_power_source.h"
 #include "hwmgr_ppt.h"
 #include "ppatomctrl.h"
-#include "hwmgr_ppt.h"

 struct pp_instance;
 struct pp_hwmgr;
-- 
2.5.0

[PATCH 8/8] ASoC: AMD: Manage ACP 2.x SRAM banks power

[Alex Deucher]

From: Maruthi Srinivas Bayyavarapu 

ACP SRAM banks gets turned on when ACP is powered on.
Not all banks are used for playback/capture. So, power on
required banks during audio device open and power off during
audio device close.

Signed-off-by: Maruthi Bayyavarapu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
---

v2: Changes:
1. Clean up sram bank handling to clarify operation
2. Add timeout to loop

sound/soc/amd/acp-pcm-dma.c | 90 +++--
 1 file changed, 86 insertions(+), 4 deletions(-)

diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
index a45e910..7af0b04 100644
--- a/sound/soc/amd/acp-pcm-dma.c
+++ b/sound/soc/amd/acp-pcm-dma.c
@@ -375,9 +375,57 @@ static int acp_dma_stop(void __iomem *acp_mmio, u8 ch_num)
return 0;
 }

+static void acp_set_sram_bank_state(void __iomem *acp_mmio, u16 bank,
+   bool power_on)
+{
+   u32 val, req_reg, sts_reg, sts_reg_mask;
+   u32 loops = 1000;
+
+   if (bank < 32) {
+   req_reg = mmACP_MEM_SHUT_DOWN_REQ_LO;
+   sts_reg = mmACP_MEM_SHUT_DOWN_STS_LO;
+   sts_reg_mask = 0x;
+
+   } else {
+   bank -= 32;
+   req_reg = mmACP_MEM_SHUT_DOWN_REQ_HI;
+   sts_reg = mmACP_MEM_SHUT_DOWN_STS_HI;
+   sts_reg_mask = 0x;
+   }
+
+   val = acp_reg_read(acp_mmio, req_reg);
+   if (val & (1 << bank)) {
+   /* bank is in off state */
+   if (power_on == true)
+   /* request to on */
+   val &= ~(1 << bank);
+   else
+   /* request to off */
+   return;
+   } else {
+   /* bank is in on state */
+   if (power_on == false)
+   /* request to off */
+   val |= 1 << bank;
+   else
+   /* request to on */
+   return;
+   }
+   acp_reg_write(val, acp_mmio, req_reg);
+
+   while (acp_reg_read(acp_mmio, sts_reg) != sts_reg_mask) {
+   if (!loops--) {
+   pr_err("ACP SRAM bank %d state change failed\n", bank);
+   break;
+   }
+   cpu_relax();
+   }
+}
+
 /* Initialize and bring ACP hardware to default state. */
 static int acp_init(void __iomem *acp_mmio)
 {
+   u16 bank;
u32 val, count, sram_pte_offset;

/* Assert Soft reset of ACP */
@@ -445,6 +493,16 @@ static int acp_init(void __iomem *acp_mmio)
acp_reg_write(ACP_EXTERNAL_INTR_CNTL__DMAIOCMask_MASK,
acp_mmio, mmACP_EXTERNAL_INTR_CNTL);

+   /* When ACP_TILE_P1 is turned on, all SRAM banks get turned on.
+   * Now, turn off all of them. This can't be done in 'poweron' of
+   * ACP pm domain, as this requires ACP to be initialized.
+   */
+   for (bank = 1; bank < 32; bank++)
+   acp_set_sram_bank_state(acp_mmio, bank, false);
+
+   for (bank = 32; bank < 48; bank++)
+   acp_set_sram_bank_state(acp_mmio, bank, false);
+
/* Designware I2S driver requries proper capabilities
 * from mmACP_I2SMICSP_COMP_PARAM_1 register. The register
 * reports playback and capture capabilities though the
@@ -569,6 +627,7 @@ static irqreturn_t dma_irq_handler(int irq, void *arg)

 static int acp_dma_open(struct snd_pcm_substream *substream)
 {
+   u16 bank;
int ret = 0;
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *prtd = substream->private_data;
@@ -602,10 +661,17 @@ static int acp_dma_open(struct snd_pcm_substream 
*substream)
if (!intr_data->play_stream && !intr_data->capture_stream)
acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);

-   if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+   if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
intr_data->play_stream = substream;
-   else
+   for (bank = 1; bank <= 4; bank++)
+   acp_set_sram_bank_state(intr_data->acp_mmio, bank,
+   true);
+   } else {
intr_data->capture_stream = substream;
+   for (bank = 5; bank <= 8; bank++)
+   acp_set_sram_bank_state(intr_data->acp_mmio, bank,
+   true);
+   }

return 0;
 }
@@ -637,6 +703,7 @@ static int acp_dma_hw_params(struct snd_pcm_substream 
*substream,
pg = virt_to_page(substream->dma_buffer.area);

if (pg != NULL) {
+   acp_set_sram_bank_state(rtd->acp_mmio, 0, true);
/* Save for runtime private data */
rtd->pg = pg;
rtd->order = get_order(size);
@@ -812,6 +879,7 @@ 

[PATCH 7/8] ASoC: AMD: add pm ops

[Alex Deucher]

From: Maruthi Srinivas Bayyavarapu 

genpd will power off/on ACP to manage runtime ACP PM. ACP runtime PM
hooks are added to get it deinitialized and initialized respectively,
after it is powered off/on.

When system goes to suspend when audio usecase is active, ACP will
be powered off through genpd. When it resumes, ACP needs to be
initialized and reconfigured.

Acked-by: Christian König 
Signed-off-by: Maruthi Bayyavarapu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
---
 sound/soc/amd/acp-pcm-dma.c | 60 +
 1 file changed, 60 insertions(+)

diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
index 0494ac8..a45e910 100644
--- a/sound/soc/amd/acp-pcm-dma.c
+++ b/sound/soc/amd/acp-pcm-dma.c
@@ -15,6 +15,7 @@

 #include 
 #include 
+#include 

 #include 

@@ -895,6 +896,10 @@ static int acp_audio_probe(struct platform_device *pdev)
return status;
}

+   pm_runtime_set_autosuspend_delay(>dev, 1);
+   pm_runtime_use_autosuspend(>dev);
+   pm_runtime_enable(>dev);
+
return status;
 }

@@ -904,15 +909,70 @@ static int acp_audio_remove(struct platform_device *pdev)

acp_deinit(adata->acp_mmio);
snd_soc_unregister_platform(>dev);
+   pm_runtime_disable(>dev);
+
+   return 0;
+}
+
+static int acp_pcm_resume(struct device *dev)
+{
+   struct snd_pcm_substream *stream;
+   struct snd_pcm_runtime *rtd;
+   struct audio_substream_data *sdata;
+   struct audio_drv_data *adata = dev_get_drvdata(dev);
+
+   acp_init(adata->acp_mmio);
+
+   stream = adata->play_stream;
+   rtd = stream ? stream->runtime : NULL;
+   if (rtd != NULL) {
+   /* Resume playback stream from a suspended state */
+   sdata = rtd->private_data;
+   config_acp_dma(adata->acp_mmio, sdata);
+   }
+
+   stream = adata->capture_stream;
+   rtd =  stream ? stream->runtime : NULL;
+   if (rtd != NULL) {
+   /* Resume capture stream from a suspended state */
+   sdata = rtd->private_data;
+   config_acp_dma(adata->acp_mmio, sdata);
+   }
+
+   acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
+   return 0;
+}
+
+static int acp_pcm_runtime_suspend(struct device *dev)
+{
+   struct audio_drv_data *adata = dev_get_drvdata(dev);

+   acp_deinit(adata->acp_mmio);
+   acp_reg_write(0, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
return 0;
 }

+static int acp_pcm_runtime_resume(struct device *dev)
+{
+   struct audio_drv_data *adata = dev_get_drvdata(dev);
+
+   acp_init(adata->acp_mmio);
+   acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
+   return 0;
+}
+
+static const struct dev_pm_ops acp_pm_ops = {
+   .resume = acp_pcm_resume,
+   .runtime_suspend = acp_pcm_runtime_suspend,
+   .runtime_resume = acp_pcm_runtime_resume,
+};
+
 static struct platform_driver acp_dma_driver = {
.probe = acp_audio_probe,
.remove = acp_audio_remove,
.driver = {
.name = "acp_audio_dma",
+   .pm = _pm_ops,
},
 };

-- 
2.5.0

[PATCH 6/8] ASoC: AMD: add AMD ASoC ACP 2.x DMA driver

[Alex Deucher]

From: Maruthi Srinivas Bayyavarapu 

ACP IP has internal DMA controller with multiple channels which
can be programmed in cyclic/non cyclic manner. ACP can generate
interrupt upon completion of DMA transfer, if required.
The PCM driver provides the platform DMA component to ALSA core.

Signed-off-by: Maruthi Bayyavarapu 
Reviewed-by: Alex Deucher 
Reviewed-by: Murali Krishna Vemuri 
Signed-off-by: Alex Deucher 
---

v2: Changes
1. Squash ACP DMA abstraction and DMA patches together
2. Fix IRQ_NONE case in dma_irq_handler
3. Replace ternery operations
4. Add loop timeout

 sound/soc/Kconfig   |   1 +
 sound/soc/Makefile  |   1 +
 sound/soc/amd/Kconfig   |   4 +
 sound/soc/amd/Makefile  |   3 +
 sound/soc/amd/acp-pcm-dma.c | 924 
 sound/soc/amd/acp.h | 119 ++
 6 files changed, 1052 insertions(+)
 create mode 100644 sound/soc/amd/Kconfig
 create mode 100644 sound/soc/amd/Makefile
 create mode 100644 sound/soc/amd/acp-pcm-dma.c
 create mode 100644 sound/soc/amd/acp.h

diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index 7ff7d88..a34e9e9 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -38,6 +38,7 @@ config SND_SOC_TOPOLOGY

 # All the supported SoCs
 source "sound/soc/adi/Kconfig"
+source "sound/soc/amd/Kconfig"
 source "sound/soc/atmel/Kconfig"
 source "sound/soc/au1x/Kconfig"
 source "sound/soc/bcm/Kconfig"
diff --git a/sound/soc/Makefile b/sound/soc/Makefile
index 8eb06db..a79a4c7 100644
--- a/sound/soc/Makefile
+++ b/sound/soc/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SND_SOC) += snd-soc-core.o
 obj-$(CONFIG_SND_SOC)  += codecs/
 obj-$(CONFIG_SND_SOC)  += generic/
 obj-$(CONFIG_SND_SOC)  += adi/
+obj-$(CONFIG_SND_SOC)  += amd/
 obj-$(CONFIG_SND_SOC)  += atmel/
 obj-$(CONFIG_SND_SOC)  += au1x/
 obj-$(CONFIG_SND_SOC)  += bcm/
diff --git a/sound/soc/amd/Kconfig b/sound/soc/amd/Kconfig
new file mode 100644
index 000..78187eb
--- /dev/null
+++ b/sound/soc/amd/Kconfig
@@ -0,0 +1,4 @@
+config SND_SOC_AMD_ACP
+   tristate "AMD Audio Coprocessor support"
+   help
+This option enables ACP DMA support on AMD platform.
diff --git a/sound/soc/amd/Makefile b/sound/soc/amd/Makefile
new file mode 100644
index 000..1a66ec0
--- /dev/null
+++ b/sound/soc/amd/Makefile
@@ -0,0 +1,3 @@
+snd-soc-acp-pcm-objs   := acp-pcm-dma.o
+
+obj-$(CONFIG_SND_SOC_AMD_ACP) += snd-soc-acp-pcm.o
diff --git a/sound/soc/amd/acp-pcm-dma.c b/sound/soc/amd/acp-pcm-dma.c
new file mode 100644
index 000..0494ac8
--- /dev/null
+++ b/sound/soc/amd/acp-pcm-dma.c
@@ -0,0 +1,924 @@
+/*
+ * AMD ALSA SoC PCM Driver for ACP 2.x
+ *
+ * Copyright 2014-2015 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#include 
+#include 
+
+#include 
+
+#include "acp.h"
+
+#define PLAYBACK_MIN_NUM_PERIODS2
+#define PLAYBACK_MAX_NUM_PERIODS2
+#define PLAYBACK_MAX_PERIOD_SIZE16384
+#define PLAYBACK_MIN_PERIOD_SIZE1024
+#define CAPTURE_MIN_NUM_PERIODS 2
+#define CAPTURE_MAX_NUM_PERIODS 2
+#define CAPTURE_MAX_PERIOD_SIZE 16384
+#define CAPTURE_MIN_PERIOD_SIZE 1024
+
+#define MAX_BUFFER (PLAYBACK_MAX_PERIOD_SIZE * PLAYBACK_MAX_NUM_PERIODS)
+#define MIN_BUFFER MAX_BUFFER
+
+static const struct snd_pcm_hardware acp_pcm_hardware_playback = {
+   .info = SNDRV_PCM_INFO_INTERLEAVED |
+   SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP |
+   SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH |
+   SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
+   .formats = SNDRV_PCM_FMTBIT_S16_LE |
+   SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
+   .channels_min = 1,
+   .channels_max = 8,
+   .rates = SNDRV_PCM_RATE_8000_96000,
+   .rate_min = 8000,
+   .rate_max = 96000,
+   .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
+   .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
+   .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
+   .periods_min = PLAYBACK_MIN_NUM_PERIODS,
+   .periods_max = PLAYBACK_MAX_NUM_PERIODS,
+};
+
+static const struct snd_pcm_hardware acp_pcm_hardware_capture = {
+   .info = SNDRV_PCM_INFO_INTERLEAVED |
+   SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP |
+   SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH |
+   SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
+   .formats = SNDRV_PCM_FMTBIT_S16_LE |
+   SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE,
+   

[PATCH 4/8] drm/amd: add pm domain for ACP IP sub blocks

[Alex Deucher]

From: Maruthi Srinivas Bayyavarapu 

ACP IP have internal DMA controller, DW I2S controller and DSPs
as separate power tiles. DMA and I2S devices are added to generic
pm domain, so that entire IP can be powered off/on at appropriate
times. Unused DSPs are made to be powered off though they are powered
on during ACP pm domain power on sequence.

Acked-by: Christian König 
Signed-off-by: Maruthi Bayyavarapu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
---

v2: fix authorship accidently broken in last rebase

drivers/gpu/drm/amd/acp/Kconfig |   1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 206 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h |   1 +
 3 files changed, 207 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/acp/Kconfig b/drivers/gpu/drm/amd/acp/Kconfig
index 28b5e70..2b07813 100644
--- a/drivers/gpu/drm/amd/acp/Kconfig
+++ b/drivers/gpu/drm/amd/acp/Kconfig
@@ -4,6 +4,7 @@ config DRM_AMD_ACP
bool "Enable ACP IP support"
default y
select MFD_CORE
+   select PM_GENERIC_DOMAINS if PM
help
Choose this option to enable ACP IP support for AMD SOCs.

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index eb5dc10..b425c44 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -24,6 +24,7 @@
  */

 #include 
+#include 
 #include 
 #include 
 #include 
@@ -102,6 +103,155 @@ static int acp_sw_fini(void *handle)
return 0;
 }

+/* power off a tile/block within ACP */
+static int acp_suspend_tile(void *cgs_dev, int tile)
+{
+   u32 val = 0;
+   u32 count = 0;
+
+   if ((tile  < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) {
+   pr_err("Invalid ACP tile : %d to suspend\n", tile);
+   return -1;
+   }
+
+   val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile);
+   val &= ACP_TILE_ON_MASK;
+
+   if (val == 0x0) {
+   val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG);
+   val = val | (1 << tile);
+   cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val);
+   cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG,
+   0x500 + tile);
+
+   count = ACP_TIMEOUT_LOOP;
+   while (true) {
+   val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0
+   + tile);
+   val = val & ACP_TILE_ON_MASK;
+   if (val == ACP_TILE_OFF_MASK)
+   break;
+   if (--count == 0) {
+   pr_err("Timeout reading ACP PGFSM status\n");
+   return -ETIMEDOUT;
+   }
+   udelay(100);
+   }
+
+   val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG);
+
+   val |= ACP_TILE_OFF_RETAIN_REG_MASK;
+   cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val);
+   }
+   return 0;
+}
+
+/* power on a tile/block within ACP */
+static int acp_resume_tile(void *cgs_dev, int tile)
+{
+   u32 val = 0;
+   u32 count = 0;
+
+   if ((tile  < ACP_TILE_P1) || (tile > ACP_TILE_DSP2)) {
+   pr_err("Invalid ACP tile to resume\n");
+   return -1;
+   }
+
+   val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile);
+   val = val & ACP_TILE_ON_MASK;
+
+   if (val != 0x0) {
+   cgs_write_register(cgs_dev, mmACP_PGFSM_CONFIG_REG,
+   0x600 + tile);
+   count = ACP_TIMEOUT_LOOP;
+   while (true) {
+   val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0
+   + tile);
+   val = val & ACP_TILE_ON_MASK;
+   if (val == 0x0)
+   break;
+   if (--count == 0) {
+   pr_err("Timeout reading ACP PGFSM status\n");
+   return -ETIMEDOUT;
+   }
+   udelay(100);
+   }
+   val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG);
+   if (tile == ACP_TILE_P1)
+   val = val & (ACP_TILE_P1_MASK);
+   else if (tile == ACP_TILE_P2)
+   val = val & (ACP_TILE_P2_MASK);
+
+   cgs_write_register(cgs_dev, mmACP_PGFSM_RETAIN_REG, val);
+   }
+   return 0;
+}
+
+struct acp_pm_domain {
+   void *cgs_dev;
+   struct generic_pm_domain gpd;
+};
+
+static int acp_poweroff(struct generic_pm_domain *genpd)
+{
+   int i, ret;
+   struct acp_pm_domain *apd;
+
+   apd = container_of(genpd, 

[PATCH 3/8] drm/amd: add ACP driver support

[Alex Deucher]

From: Maruthi Bayyavarapu 

This adds the ACP (Audio CoProcessor) IP driver and wires
it up to the amdgpu driver.  The ACP block provides the DMA
engine for i2s based ALSA driver. This is required for audio
on APUs that utilize an i2s codec.

Acked-by: Christian König 
Reviewed-by: Jammy Zhou 
Reviewed-by: Maruthi Bayyavarapu 
Reviewed-by: Alex Deucher 
Reviewed-by: Murali Krishna Vemuri 
Signed-off-by: Maruthi Bayyavarapu 
Signed-off-by: Chunming Zhou 
Signed-off-by: Alex Deucher 
---

v2: integrate i2s/az check patch
v3: s/amd_acp/amdgpu_acp/
v4: update copyright notice
v5: squash multiple patches, convert to mfd
v6: major changes as below :
1. Pass ACP register base to DMA and dw i2s drivers
   as IORESOURCE_MEM resources.
2. add dw i2s as a new mfd cell.
v7: specify broken out dw quirks that apply to AMD hardware
v8: Changes:
1. Select MFD_CORE
2. use genirq for ACP interrupt
3. Add separate cells for dws capture and playback
v9: drop stale include path

drivers/gpu/drm/Kconfig  |   2 +
 drivers/gpu/drm/amd/acp/Kconfig  |  10 +
 drivers/gpu/drm/amd/acp/Makefile |   8 +
 drivers/gpu/drm/amd/acp/acp_hw.c |  50 +
 drivers/gpu/drm/amd/acp/include/acp_gfx_if.h |  34 +++
 drivers/gpu/drm/amd/amdgpu/Makefile  |  13 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  12 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c  | 297 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h  |  41 
 drivers/gpu/drm/amd/amdgpu/vi.c  |  12 ++
 drivers/gpu/drm/amd/include/amd_shared.h |   1 +
 11 files changed, 479 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/amd/acp/Kconfig
 create mode 100644 drivers/gpu/drm/amd/acp/Makefile
 create mode 100644 drivers/gpu/drm/amd/acp/acp_hw.c
 create mode 100644 drivers/gpu/drm/amd/acp/include/acp_gfx_if.h
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 59babd5..01f5db6 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -162,6 +162,8 @@ config DRM_AMDGPU
 source "drivers/gpu/drm/amd/amdgpu/Kconfig"
 source "drivers/gpu/drm/amd/powerplay/Kconfig"

+source "drivers/gpu/drm/amd/acp/Kconfig"
+
 source "drivers/gpu/drm/nouveau/Kconfig"

 config DRM_I810
diff --git a/drivers/gpu/drm/amd/acp/Kconfig b/drivers/gpu/drm/amd/acp/Kconfig
new file mode 100644
index 000..28b5e70
--- /dev/null
+++ b/drivers/gpu/drm/amd/acp/Kconfig
@@ -0,0 +1,10 @@
+menu "ACP Configuration"
+
+config DRM_AMD_ACP
+   bool "Enable ACP IP support"
+   default y
+   select MFD_CORE
+   help
+   Choose this option to enable ACP IP support for AMD SOCs.
+
+endmenu
diff --git a/drivers/gpu/drm/amd/acp/Makefile b/drivers/gpu/drm/amd/acp/Makefile
new file mode 100644
index 000..8363cb5
--- /dev/null
+++ b/drivers/gpu/drm/amd/acp/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for the ACP, which is a sub-component
+# of AMDSOC/AMDGPU drm driver.
+# It provides the HW control for ACP related functionalities.
+
+subdir-ccflags-y += -I$(AMDACPPATH)/ -I$(AMDACPPATH)/include
+
+AMD_ACP_FILES := $(AMDACPPATH)/acp_hw.o
diff --git a/drivers/gpu/drm/amd/acp/acp_hw.c b/drivers/gpu/drm/amd/acp/acp_hw.c
new file mode 100644
index 000..7af83f1
--- /dev/null
+++ b/drivers/gpu/drm/amd/acp/acp_hw.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2015 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "acp_gfx_if.h"
+
+#define ACP_MODE_I2S   0
+#define ACP_MODE_AZ1
+
+#define mmACP_AZALIA_I2S_SELECT 0x51d4
+
+int amd_acp_hw_init(void *cgs_device,
+   unsigned acp_version_major, unsigned acp_version_minor)
+{
+   unsigned int acp_mode = 

[PATCH 2/8] drm/amdgpu: add irq domain support

[Alex Deucher]

Hardware blocks on the GPU like ACP generate interrupts in
the GPU interrupt controller, but are driven by a separate
driver.  Add an irq domain to the GPU driver so that
blocks like ACP can register a Linux interrupt.

Acked-by: Christian König 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 108 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h |   9 +++
 drivers/gpu/drm/amd/amdgpu/cik_ih.c |   6 ++
 drivers/gpu/drm/amd/amdgpu/cz_ih.c  |   7 +++
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c |   7 +++
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c   |   7 +++
 6 files changed, 136 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 7c42ff6..3006182 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -312,6 +312,7 @@ int amdgpu_irq_add_id(struct amdgpu_device *adev, unsigned 
src_id,
}

adev->irq.sources[src_id] = source;
+
return 0;
 }

@@ -335,15 +336,19 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
return;
}

-   src = adev->irq.sources[src_id];
-   if (!src) {
-   DRM_DEBUG("Unhandled interrupt src_id: %d\n", src_id);
-   return;
-   }
+   if (adev->irq.virq[src_id]) {
+   generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id));
+   } else {
+   src = adev->irq.sources[src_id];
+   if (!src) {
+   DRM_DEBUG("Unhandled interrupt src_id: %d\n", src_id);
+   return;
+   }

-   r = src->funcs->process(adev, src, entry);
-   if (r)
-   DRM_ERROR("error processing interrupt (%d)\n", r);
+   r = src->funcs->process(adev, src, entry);
+   if (r)
+   DRM_ERROR("error processing interrupt (%d)\n", r);
+   }
 }

 /**
@@ -461,3 +466,90 @@ bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct 
amdgpu_irq_src *src,

return !!atomic_read(>enabled_types[type]);
 }
+
+/* gen irq */
+static void amdgpu_irq_mask(struct irq_data *irqd)
+{
+   /* XXX */
+}
+
+static void amdgpu_irq_unmask(struct irq_data *irqd)
+{
+   /* XXX */
+}
+
+static struct irq_chip amdgpu_irq_chip = {
+   .name = "amdgpu-ih",
+   .irq_mask = amdgpu_irq_mask,
+   .irq_unmask = amdgpu_irq_unmask,
+};
+
+static int amdgpu_irqdomain_map(struct irq_domain *d,
+   unsigned int irq, irq_hw_number_t hwirq)
+{
+   if (hwirq >= AMDGPU_MAX_IRQ_SRC_ID)
+   return -EPERM;
+
+   irq_set_chip_and_handler(irq,
+_irq_chip, handle_simple_irq);
+   return 0;
+}
+
+static struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
+   .map = amdgpu_irqdomain_map,
+};
+
+/**
+ * amdgpu_irq_add_domain - create a linear irq domain
+ *
+ * @adev: amdgpu device pointer
+ *
+ * Create an irq domain for GPU interrupt sources
+ * that may be driven by another driver (e.g., ACP).
+ */
+int amdgpu_irq_add_domain(struct amdgpu_device *adev)
+{
+   adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,
+_hw_irqdomain_ops, 
adev);
+   if (!adev->irq.domain) {
+   DRM_ERROR("GPU irq add domain failed\n");
+   return -ENODEV;
+   }
+
+   return 0;
+}
+
+/**
+ * amdgpu_irq_remove_domain - remove the irq domain
+ *
+ * @adev: amdgpu device pointer
+ *
+ * Remove the irq domain for GPU interrupt sources
+ * that may be driven by another driver (e.g., ACP).
+ */
+void amdgpu_irq_remove_domain(struct amdgpu_device *adev)
+{
+   if (adev->irq.domain) {
+   irq_domain_remove(adev->irq.domain);
+   adev->irq.domain = NULL;
+   }
+}
+
+/**
+ * amdgpu_irq_create_mapping - create a mapping between a domain irq and a
+ * Linux irq
+ *
+ * @adev: amdgpu device pointer
+ * @src_id: IH source id
+ *
+ * Create a mapping between a domain irq (GPU IH src id) and a Linux irq
+ * Use this for components that generate a GPU interrupt, but are driven
+ * by a different driver (e.g., ACP).
+ * Returns the Linux irq.
+ */
+unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id)
+{
+   adev->irq.virq[src_id] = irq_create_mapping(adev->irq.domain, src_id);
+
+   return adev->irq.virq[src_id];
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
index 17b01aef..e124b59 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
@@ -24,6 +24,7 @@
 #ifndef __AMDGPU_IRQ_H__
 #define __AMDGPU_IRQ_H__

+#include 
 #include "amdgpu_ih.h"

 #define AMDGPU_MAX_IRQ_SRC_ID  0x100
@@ -65,6 +66,10 @@ struct amdgpu_irq {
/* interrupt ring */
struct amdgpu_ih_ring   ih;

[PATCH 1/8] drm/amdgpu/cgs: add an interface to access PCI resources

[Alex Deucher]

This provides an interface to get access to the base address
of PCI resources (MMIO, DOORBELL, etc.).  Only MMIO and
DOORBELL are implemented right now.  This is necessary to
properly utilize shared drivers on platform devices.  IP
modules can use this interface to get the base address
of the resource and add any additional offset and set the
size when setting up the platform driver(s).

Acked-by: Christian König 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c  | 36 
 drivers/gpu/drm/amd/include/cgs_common.h | 34 ++
 2 files changed, 70 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 6fa0fea..bf5c6a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -398,6 +398,41 @@ static void amdgpu_cgs_write_pci_config_dword(void 
*cgs_device, unsigned addr,
WARN(ret, "pci_write_config_dword error");
 }

+
+static int amdgpu_cgs_get_pci_resource(void *cgs_device,
+  enum cgs_resource_type resource_type,
+  uint64_t size,
+  uint64_t offset,
+  uint64_t *resource_base)
+{
+   CGS_FUNC_ADEV;
+
+   if (resource_base == NULL)
+   return -EINVAL;
+
+   switch (resource_type) {
+   case CGS_RESOURCE_TYPE_MMIO:
+   if (adev->rmmio_size == 0)
+   return -ENOENT;
+   if ((offset + size) > adev->rmmio_size)
+   return -EINVAL;
+   *resource_base = adev->rmmio_base;
+   return 0;
+   case CGS_RESOURCE_TYPE_DOORBELL:
+   if (adev->doorbell.size == 0)
+   return -ENOENT;
+   if ((offset + size) > adev->doorbell.size)
+   return -EINVAL;
+   *resource_base = adev->doorbell.base;
+   return 0;
+   case CGS_RESOURCE_TYPE_FB:
+   case CGS_RESOURCE_TYPE_IO:
+   case CGS_RESOURCE_TYPE_ROM:
+   default:
+   return -EINVAL;
+   }
+}
+
 static const void *amdgpu_cgs_atom_get_data_table(void *cgs_device,
  unsigned table, uint16_t 
*size,
  uint8_t *frev, uint8_t *crev)
@@ -1041,6 +1076,7 @@ static const struct cgs_ops amdgpu_cgs_ops = {
amdgpu_cgs_write_pci_config_byte,
amdgpu_cgs_write_pci_config_word,
amdgpu_cgs_write_pci_config_dword,
+   amdgpu_cgs_get_pci_resource,
amdgpu_cgs_atom_get_data_table,
amdgpu_cgs_atom_get_cmd_table_revs,
amdgpu_cgs_atom_exec_cmd_table,
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h 
b/drivers/gpu/drm/amd/include/cgs_common.h
index 03affb3..713aec9 100644
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -122,6 +122,17 @@ struct cgs_system_info {
uint64_t   padding[13];
 };

+/*
+ * enum cgs_resource_type - GPU resource type
+ */
+enum cgs_resource_type {
+   CGS_RESOURCE_TYPE_MMIO = 0,
+   CGS_RESOURCE_TYPE_FB,
+   CGS_RESOURCE_TYPE_IO,
+   CGS_RESOURCE_TYPE_DOORBELL,
+   CGS_RESOURCE_TYPE_ROM,
+};
+
 /**
  * struct cgs_clock_limits - Clock limits
  *
@@ -417,6 +428,23 @@ typedef void (*cgs_write_pci_config_word_t)(void 
*cgs_device, unsigned addr,
 typedef void (*cgs_write_pci_config_dword_t)(void *cgs_device, unsigned addr,
 uint32_t value);

+
+/**
+ * cgs_get_pci_resource() - provide access to a device resource (PCI BAR)
+ * @cgs_device:opaque device handle
+ * @resource_type: Type of Resource (MMIO, IO, ROM, FB, DOORBELL)
+ * @size:  size of the region
+ * @offset:offset from the start of the region
+ * @resource_base: base address (not including offset) returned
+ *
+ * Return: 0 on success, -errno otherwise
+ */
+typedef int (*cgs_get_pci_resource_t)(void *cgs_device,
+ enum cgs_resource_type resource_type,
+ uint64_t size,
+ uint64_t offset,
+ uint64_t *resource_base);
+
 /**
  * cgs_atom_get_data_table() - Get a pointer to an ATOM BIOS data table
  * @cgs_device:opaque device handle
@@ -593,6 +621,8 @@ struct cgs_ops {
cgs_write_pci_config_byte_t write_pci_config_byte;
cgs_write_pci_config_word_t write_pci_config_word;
cgs_write_pci_config_dword_t write_pci_config_dword;
+   /* PCI resources */
+   cgs_get_pci_resource_t get_pci_resource;
/* ATOM BIOS */
cgs_atom_get_data_table_t atom_get_data_table;
cgs_atom_get_cmd_table_revs_t atom_get_cmd_table_revs;
@@ -708,5 +738,9 @@ struct cgs_device

[PATCH 0/8] Add ASoC support for AMD APUs [v6]

[Alex Deucher]

This patch set implements support for i2s audio and new AMD GPUs.
The i2s codec is fed by a DMA engine on the GPU.  To handle this
we create mfd cells which we hang the i2s codec and DMA engine on.
Because of this, this patch set covers two subsystems: drm and alsa.
The drm patches add support for the ACP hw block which provides the
DMA engine for the i2s codec.  The alsa patches add the ASoC driver
for the i2s codec.  Since the alsa changes depend on the drm changes,
I'd like to take the alsa patches in via the drm tree.

This patch set depends on the following patch from the linux-pm tree:

PM / Domains: export symbols to add/remove devices from genpd

And the following patches from the audio tree:

ASoC: dwc: add runtime suspend/resume functionality
ASoC: dwc: add quirk for different register offset
ASoC: dwc: reconfigure dwc in 'resume' from 'suspend'

I talked to Dave Airlie on IRC and he has acked the drm side.

V2 changes:
- Use the MFD subsystem rather than adding our own bus
- Squash all sub-feature patches together
- fix comments mentioned in previous review

V3 changes:
- Update the designware driver to handle slave mode, amd specific
  features
  - Use the designware driver directly for i2s
  - Move the DMA handling from the GPU driver into the AMD ASoC
driver
- Change the license on the ASoC driver to GPL

v4 changes:
- patch "ASoC : dwc : support dw i2s in slave mode" accepted
- Add a _dai_fmt() operation that checks to make sure that the mode
  we're setting corresponds to what we read back from the hardware.
  - Split specific quirks into separate patches
  - Set the specific quirks that apply to AMD chips in the acp driver

v5 changes:
- patch "ASoC : dwc : add check for master/slave format" accepted
- Fix MFD_CORE selection in ACP Kconfig
- Add irq domain support to amdgpu driver
- Use genirq in ACP DMA driver
- Export some genpd symbols to support ACP powergating (Acked by PM maintainer)
- Use genpd for ACP powergating
- add separate capture and playback instances of dws in ACP init
- add runtime suspend support for dws in master mode

v6 changes:
- Squash ACP DMA and abstraction layer patches into one
- Drop dependent patches from other trees
- Fix ACP DMA irq none case
- ACP DMA coding style cleanups
- Add timeouts to wait loops
- Clarify ACP powergating banks handling

Patch 5 adds the register headers for the ACP block which is a
pretty big patch so I've excluded it from email.  The entire patch
set can be viewed here:
http://cgit.freedesktop.org/~agd5f/linux/log/?h=acp-upstream9

Thanks,

Alex


Alex Deucher (2):
  drm/amdgpu/cgs: add an interface to access PCI resources
  drm/amdgpu: add irq domain support

Maruthi Bayyavarapu (1):
  drm/amd: add ACP driver support

Maruthi Srinivas Bayyavarapu (5):
  drm/amd: add pm domain for ACP IP sub blocks
  ASoC: AMD: add ACP 2.2 register headers
  ASoC: AMD: add AMD ASoC ACP 2.x DMA driver
  ASoC: AMD: add pm ops
  ASoC: AMD: Manage ACP 2.x SRAM banks power

 drivers/gpu/drm/Kconfig  |2 +
 drivers/gpu/drm/amd/acp/Kconfig  |   11 +
 drivers/gpu/drm/amd/acp/Makefile |8 +
 drivers/gpu/drm/amd/acp/acp_hw.c |   50 +
 drivers/gpu/drm/amd/acp/include/acp_gfx_if.h |   34 +
 drivers/gpu/drm/amd/amdgpu/Makefile  |   13 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |   12 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c  |  501 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h  |   42 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c  |   36 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c  |  108 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h  |9 +
 drivers/gpu/drm/amd/amdgpu/cik_ih.c  |6 +
 drivers/gpu/drm/amd/amdgpu/cz_ih.c   |7 +
 drivers/gpu/drm/amd/amdgpu/iceland_ih.c  |7 +
 drivers/gpu/drm/amd/amdgpu/tonga_ih.c|7 +
 drivers/gpu/drm/amd/amdgpu/vi.c  |   12 +
 drivers/gpu/drm/amd/include/amd_shared.h |1 +
 drivers/gpu/drm/amd/include/cgs_common.h |   34 +
 sound/soc/Kconfig|1 +
 sound/soc/Makefile   |1 +
 sound/soc/amd/Kconfig|4 +
 sound/soc/amd/Makefile   |3 +
 sound/soc/amd/acp-pcm-dma.c  | 1066 
 sound/soc/amd/acp.h  |  119 ++
 sound/soc/amd/include/acp_2_2_d.h|  609 +++
 sound/soc/amd/include/acp_2_2_enum.h | 1068 
 sound/soc/amd/include/acp_2_2_sh_mask.h  | 2292 ++
 28 files changed, 6054 insertions(+), 9 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/acp/Kconfig
 create mode 100644 drivers/gpu/drm/amd/acp/Makefile
 create mode 100644 drivers/gpu/drm/amd/acp/acp_hw.c
 create mode 100644 drivers/gpu/drm/amd/acp/include/acp_gfx_if.h
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.h
 create mode 

[PATCH v11 17/19] drm: bridge: analogix/dp: expand the look time for waiting AUX CH reply

[Yakir Yang]

Hi Jingoo,

On 12/23/2015 12:24 PM, Yakir Yang wrote:
> Hi Jingoo,
>
> On 12/22/2015 08:26 PM, Jingoo Han wrote:
>> On Wednesday, December 16, 2015 12:58 PM, Yakir Yang wrote:
>>> After test on rockchiop platform, i found sometims driver would failed
>>> at reading EDID message. After debugging more, i found that it's okay
>>> to read_a byte from i2c, but it would failed at AUX transcation if we
>>> try to ready multi-bytes from i2c.
>>>
>>> Driver just can't received the AUX CH reply command, even no AUX error
>>> code. I may guess that the AUX wait time is not enough, so I try to
>>> expand the AUX wait time, and i do see this could fix the EDID read
>>> failed at rockchip platform.
>>>
>>> And I thought that expand the wait time won't hurt Exynos platform too
>>> much, cause Exynos didn't have this problem, then driver would received
>>> the reply command very soon, so no more additional wait time would 
>>> bring
>>> to Exynos platform.
>>>
>>> Signed-off-by: Yakir Yang 
>>> ---
>>> Changes in v11: None
>>> Changes in v10: None
>>> Changes in v9: None
>>> Changes in v8: None
>>> Changes in v7: None
>>> Changes in v6: None
>>> Changes in v5: None
>>> Changes in v4: None
>>> Changes in v3: None
>>> Changes in v2: None
>>>
>>>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>>> b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>>> index c7e2959..dc376bd 100644
>>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>>> @@ -482,7 +482,7 @@ int analogix_dp_start_aux_transaction(struct 
>>> analogix_dp_device *dp)
>>>   reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
>>>   while (!(reg & RPLY_RECEIV)) {
>>>   timeout_loop++;
>>> -if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
>>> +if (DP_TIMEOUT_LOOP_COUNT * 10 < timeout_loop) {
>> No, I hate this coding.
>> analogix_dp_reg.c is the common code that can be shared by various SoCs.
>> Please, find another way.
>
> Okay, I have double checked that i do have this problem in my side. 
> Hmmm.
> I thought it's okay for you if I expand the "DP_TIMEOUT_LOOP_COUNT" 
> directly,
> it won't hurt Exynos platform too much, cause Exynos didn't have this 
> problem,
> then driver would received,the reply command very soon, so no more 
> additional
> wait time would bring to Exynos platform.
>

Oh, sorry, little mistaken, I mean, is it okay for you to expand the 
"DP_TIMEOUT_LOOP_COUNT" directly ?

- Yakir


> And actually the datasheet haven't described the spec of aux reply 
> delay time.
>
> Thanks,
> - Yakir
>
>> Best regards,
>> Jingoo Han
>>
>>
>>>   dev_err(dp->dev, "AUX CH command reply failed!\n");
>>>   return -ETIMEDOUT;
>>>   }
>>> -- 
>>> 1.9.1
>>
>>
>>
>>
>
>
>
> ___
> Linux-rockchip mailing list
> Linux-rockchip at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>
>
>

[PULL] topic/drm-misc

[Daniel Vetter]

Hi Dave,

Just one more patch in drm-misc before I disappear into the swiss alps. I
was a bit on the fence whether this should go into -fixes, but then
figured meh. If it blows up in reality (the linked bug is just our QA) we
can always cherry-pick afterwards.

Cheers, Daniel


The following changes since commit e112e593b215c394c0303dbf0534db0928e87967:

  drm: use dev_name as default unique name in drm_dev_alloc() (2015-12-15 
13:56:06 +0100)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/topic/drm-misc-2015-12-23

for you to fetch changes up to e112e593b215c394c0303dbf0534db0928e87967:

  drm: use dev_name as default unique name in drm_dev_alloc() (2015-12-15 
13:56:06 +0100)



-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

[Bug 80419] XCOM: Enemy Unknown Causes lockup

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=80419

--- Comment #91 from Daniel Exner <dex+fdobugzilla at dragonslave.de> ---
Sorry for pasting instead of an attachement.

The specs for glDrawRangeElementsBaseVertex [1] say this case (array out of
bounds) should be handled like this:

"Index values lying outside the range [start, end] are treated in the same way
as glDrawElementsBaseVertex. "

The specs for glDrawElementsBaseVertex [2] don't say anything about this case
(obviously since this function doesn't imply any size constrains for the
array).

So it seems like it is indeed a Bug in the game to try to address this index
element but also the operation should not crash and its unspecified behaviour.

Perhaps radeonsi should handle it the same as other mesa drivers to for the
sake of cosistency.

[1]
https://www.opengl.org/sdk/docs/man/html/glDrawRangeElementsBaseVertex.xhtml
[2] https://www.opengl.org/sdk/docs/man/html/glDrawElementsBaseVertex.xhtml

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[PATCH] drm/vc4: fix build warning

[Sudip Mukherjee]

We were getting build warning:

drivers/gpu/drm/vc4/vc4_validate.c: In function 'validate_gl_shader_rec':
drivers/gpu/drm/vc4/vc4_validate.c:864:4:
warning: format '%d' expects argument of type 'int', but argument 4 has type 
'size_t' [-Wformat=]
DRM_ERROR("BO offset overflow (%d + %d > %d)\n",

vbo->base.size is size_t and for printing size_t we should be using %zu.

Signed-off-by: Sudip Mukherjee 
---
 drivers/gpu/drm/vc4/vc4_validate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/vc4/vc4_validate.c 
b/drivers/gpu/drm/vc4/vc4_validate.c
index 0fb5b99..e26d9f6 100644
--- a/drivers/gpu/drm/vc4/vc4_validate.c
+++ b/drivers/gpu/drm/vc4/vc4_validate.c
@@ -861,7 +861,7 @@ validate_gl_shader_rec(struct drm_device *dev,

if (vbo->base.size < offset ||
vbo->base.size - offset < attr_size) {
-   DRM_ERROR("BO offset overflow (%d + %d > %d)\n",
+   DRM_ERROR("BO offset overflow (%d + %d > %zu)\n",
  offset, attr_size, vbo->base.size);
return -EINVAL;
}
-- 
1.9.1

[PULL] drm-intel-fixes

[Jani Nikula]

Hi Dave (and/or Linus, depending on the new arrival and eggnog
schedules) -

Here's a batch of i915 fixes all around. It may be slightly bigger than
one would hope for at this stage, but they've all been through testing
in our -next before being picked up for v4.4. Also, I missed Dave's
fixes pull earlier today just because I wanted an extra testing round on
this. So I'm fairly confident.

Wishing you all the things it is customary to wish this time of the
year.


BR,
Jani.

The following changes since commit 4ef7675344d687a0ef5b0d7c0cee12da005870c0:

  Linux 4.4-rc6 (2015-12-20 16:06:09 -0800)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/drm-intel-fixes-2015-12-23

for you to fetch changes up to a98728e0bb978fbe9246c93ea89198de612c22e6:

  drm/i915: Correct max delay for HDMI hotplug live status checking (2015-12-22 
13:01:24 +0200)


Chris Wilson (4):
  drm/i915: Set the map-and-fenceable flag for preallocated objects
  drm/i915: Break busywaiting for requests on pending signals
  drm/i915: Limit the busy wait on requests to 5us not 10ms!
  drm/i915: Only spin whilst waiting on the current request

Daniel Vetter (1):
  drm/i915: mdelay(10) considered harmful

Gary Wang (1):
  drm/i915: Correct max delay for HDMI hotplug live status checking

Matt Roper (1):
  drm/i915: Disable primary plane if we fail to reconstruct BIOS fb (v2)

Ville Syrjälä (3):
  drm/i915: Drop the broken cursor base==0 special casing
  drm/i915: Workaround CHV pipe C cursor fail
  drm/i915: Kill intel_crtc->cursor_bo

 drivers/gpu/drm/i915/i915_drv.h|  28 ++---
 drivers/gpu/drm/i915/i915_gem.c| 111 +
 drivers/gpu/drm/i915/i915_gem_gtt.c|   1 +
 drivers/gpu/drm/i915/i915_gem_stolen.c |   1 +
 drivers/gpu/drm/i915/intel_display.c   |  66 +---
 drivers/gpu/drm/i915/intel_drv.h   |   1 -
 drivers/gpu/drm/i915/intel_hdmi.c  |   7 ++-
 7 files changed, 154 insertions(+), 61 deletions(-)

-- 
Jani Nikula, Intel Open Source Technology Center

[PATCH v11 17/19] drm: bridge: analogix/dp: expand the look time for waiting AUX CH reply

[Yakir Yang]

Hi Jingoo,

On 12/22/2015 08:26 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:58 PM, Yakir Yang wrote:
>> After test on rockchiop platform, i found sometims driver would failed
>> at reading EDID message. After debugging more, i found that it's okay
>> to read_a byte from i2c, but it would failed at AUX transcation if we
>> try to ready multi-bytes from i2c.
>>
>> Driver just can't received the AUX CH reply command, even no AUX error
>> code. I may guess that the AUX wait time is not enough, so I try to
>> expand the AUX wait time, and i do see this could fix the EDID read
>> failed at rockchip platform.
>>
>> And I thought that expand the wait time won't hurt Exynos platform too
>> much, cause Exynos didn't have this problem, then driver would received
>> the reply command very soon, so no more additional wait time would bring
>> to Exynos platform.
>>
>> Signed-off-by: Yakir Yang 
>> ---
>> Changes in v11: None
>> Changes in v10: None
>> Changes in v9: None
>> Changes in v8: None
>> Changes in v7: None
>> Changes in v6: None
>> Changes in v5: None
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2: None
>>
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> index c7e2959..dc376bd 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
>> @@ -482,7 +482,7 @@ int analogix_dp_start_aux_transaction(struct 
>> analogix_dp_device *dp)
>>  reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
>>  while (!(reg & RPLY_RECEIV)) {
>>  timeout_loop++;
>> -if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
>> +if (DP_TIMEOUT_LOOP_COUNT * 10 < timeout_loop) {
> No, I hate this coding.
> analogix_dp_reg.c is the common code that can be shared by various SoCs.
> Please, find another way.

Okay, I have double checked that i do have this problem in my side. 
Hmmm.
I thought it's okay for you if I expand the "DP_TIMEOUT_LOOP_COUNT" 
directly,
it won't hurt Exynos platform too much, cause Exynos didn't have this 
problem,
then driver would received,the reply command very soon, so no more 
additional
wait time would bring to Exynos platform.

And actually the datasheet haven't described the spec of aux reply delay 
time.

Thanks,
- Yakir

> Best regards,
> Jingoo Han
>
>
>>  dev_err(dp->dev, "AUX CH command reply failed!\n");
>>  return -ETIMEDOUT;
>>  }
>> --
>> 1.9.1
>
>
>
>

[PATCH v6.3 4/6] drm: rockchip: Support Synopsys DW MIPI DSI

[Chris Zhong]

Add support for Synopsys DesignWare MIPI DSI controller which is
embedded in the rk3288 SoCs.

Signed-off-by: Chris Zhong 
---

Changes in v6.3:
- move the mipi_en gate to ockchip_drm_crtc_mode_config

Changes in v6.2:
- Remove the atomic feature check (Mark Yao)

Changes in v6.1:
- Add atomic API support (Heiko Stübne)

Changes in v6:
- Do not use bridge driver (Thierry Reding)
- Optimization the phy init sequence

Changes in v5: None
Changes in v4: None
Changes in v3: None

 drivers/gpu/drm/rockchip/Kconfig|   10 +
 drivers/gpu/drm/rockchip/Makefile   |1 +
 drivers/gpu/drm/rockchip/dw-mipi-dsi.c  | 1196 +++
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |3 +
 4 files changed, 1210 insertions(+)
 create mode 100644 drivers/gpu/drm/rockchip/dw-mipi-dsi.c

diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 686cb49..1db1b86 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -34,3 +34,13 @@ config ROCKCHIP_ANALOGIX_DP
  This selects support for Rockchip SoC specific extensions
  for the Analogix Core DP driver. If you want to enable DP
  on RK3288 based SoC, you should selet this option.
+
+config ROCKCHIP_DW_MIPI_DSI
+   bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
+   depends on DRM_ROCKCHIP
+   select DRM_MIPI_DSI
+   help
+This selects support for Rockchip SoC specific extensions
+for the Synopsys DesignWare HDMI driver. If you want to
+enable MIPI DSI on RK3288 based SoC, you should selet this
+option.
diff --git a/drivers/gpu/drm/rockchip/Makefile 
b/drivers/gpu/drm/rockchip/Makefile
index 8ad01fb..c5c2d61 100644
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -7,5 +7,6 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o 
rockchip_drm_fbdev.o \

 obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
 obj-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
+obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw-mipi-dsi.o

 obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c 
b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
new file mode 100644
index 000..1fe631e
--- /dev/null
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -0,0 +1,1196 @@
+/*
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "rockchip_drm_drv.h"
+#include "rockchip_drm_vop.h"
+
+#define DRIVER_NAME"dw-mipi-dsi"
+
+#define GRF_SOC_CON60x025c
+#define DSI0_SEL_VOP_LIT(1 << 6)
+#define DSI1_SEL_VOP_LIT(1 << 9)
+
+#define DSI_VERSION0x00
+#define DSI_PWR_UP 0x04
+#define RESET  0
+#define POWERUPBIT(0)
+
+#define DSI_CLKMGR_CFG 0x08
+#define TO_CLK_DIVIDSION(div)  (((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVIDSION(div)  (((div) & 0xff) << 0)
+
+#define DSI_DPI_VCID   0x0c
+#define DPI_VID(vid)   (((vid) & 0x3) << 0)
+
+#define DSI_DPI_COLOR_CODING   0x10
+#define EN18_LOOSELY   BIT(8)
+#define DPI_COLOR_CODING_16BIT_1   0x0
+#define DPI_COLOR_CODING_16BIT_2   0x1
+#define DPI_COLOR_CODING_16BIT_3   0x2
+#define DPI_COLOR_CODING_18BIT_1   0x3
+#define DPI_COLOR_CODING_18BIT_2   0x4
+#define DPI_COLOR_CODING_24BIT 0x5
+
+#define DSI_DPI_CFG_POL0x14
+#define COLORM_ACTIVE_LOW  BIT(4)
+#define SHUTD_ACTIVE_LOW   BIT(3)
+#define HSYNC_ACTIVE_LOW   BIT(2)
+#define VSYNC_ACTIVE_LOW   BIT(1)
+#define DATAEN_ACTIVE_LOW  BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM 0x18
+#define OUTVACT_LPCMD_TIME(p)  (((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p)   ((p) & 0xff)
+
+#define DSI_DBI_CFG0x20
+#define DSI_DBI_CMDSIZE0x28
+
+#define DSI_PCKHDL_CFG 0x2c
+#define EN_CRC_RX  BIT(4)
+#define EN_ECC_RX  BIT(3)
+#define EN_BTA BIT(2)
+#define EN_EOTP_RX BIT(1)
+#define EN_EOTP_TX BIT(0)
+
+#define DSI_MODE_CFG   0x34
+#define ENABLE_VIDEO_MODE  0
+#define ENABLE_CMD_MODEBIT(0)
+
+#define DSI_VID_MODE_CFG   0x38

[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it

[Dave Airlie]

On 23 December 2015 at 03:38, Liviu Dudau  wrote:
> On Fri, Nov 20, 2015 at 02:22:03PM +, Liviu Dudau wrote:
>> Hello,
>>
>> This is v2 of the patchset trying to make drm_of_component_probe() cope with 
>> finding
>> both local crtc ports and remote encoder ones. Heiko Stübner was nice 
>> enough to test
>> an earlier version that was patched following Russell's suggestions on 
>> rk3288, but
>> I haven't seen any reports from iMX or Armada users.
>>
>> Changelog:
>>  v2: Updated the drm_of_component_probe() comment to explain why the 
>> reference count
>>  is not dropped. Fixed the compare_port() function for rockchip as 
>> described by
>>  Russell.
>>  v1: Original submission. 
>> http://lists.freedesktop.org/archives/dri-devel/2015-November/094546.html
>
> Gentle ping, this has now been tested by Rockchip people and fixes the 
> earlier version
> that had to be reverted in mainline. Can it be included in the -next 
> somewhere?

It would be good to get Russell ack on the first one, especially after
reading the previous thread.

Dave.

[Bug 93292] "Thea: The Awakening" world map textures not rendered (blue background)

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=93292

--- Comment #3 from Jan-Marek Glogowski  ---
(In reply to Ilia Mirkin from comment #2)
> In case it's of any interest, I tested this on nouveau -- on nvc0 (GF108)
> the trace replays seemingly fine. On nv50 (GT215), I also get a failure on
> the map screen, but it's different -- everything is drawn except the
> background, so it appears as though it's all black(ish), with trees/etc
> drawn over it.

The current bugs component is tagged Drivers/Gallium/r600

Probably you should open a new bug for nv50 or change the component, otherwise
it'll probably be unnoticed. I'm actually not sure if the component is right,
as I expected it to be reported to the mesa-dev mailing list.

-- 
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[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it

[Jean-Francois Moine]

On Tue, 22 Dec 2015 17:38:00 +
Liviu Dudau  wrote:

> On Fri, Nov 20, 2015 at 02:22:03PM +, Liviu Dudau wrote:
> > Hello,
> > 
> > This is v2 of the patchset trying to make drm_of_component_probe() cope 
> > with finding
> > both local crtc ports and remote encoder ones. Heiko Stübner was nice 
> > enough to test
> > an earlier version that was patched following Russell's suggestions on 
> > rk3288, but
> > I haven't seen any reports from iMX or Armada users.
> > 
> > Changelog:
> >  v2: Updated the drm_of_component_probe() comment to explain why the 
> > reference count
> >  is not dropped. Fixed the compare_port() function for rockchip as 
> > described by
> >  Russell.
> >  v1: Original submission. 
> > http://lists.freedesktop.org/archives/dri-devel/2015-November/094546.html
> 
> Gentle ping, this has now been tested by Rockchip people and fixes the 
> earlier version
> that had to be reverted in mainline. Can it be included in the -next 
> somewhere?

Hi Liviu,

Sorry for being a bit late.

I wanted to use drm_of_component_probe() for a new DRM driver, but I
could not find any way to do it: you add the "ports" nodes as
components while, usually, the components are the device nodes
themselves.

With this simple patch:

diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
index 493c05c..dbd2921 100644
--- a/drivers/gpu/drm/drm_of.c
+++ b/drivers/gpu/drm/drm_of.c
@@ -101,7 +101,7 @@ int drm_of_component_probe(struct device *dev,
continue;
}

-   component_match_add(dev, , compare_of, port);
+   component_match_add(dev, , compare_of, port->parent);
of_node_put(port);
}

everything is easy, my DT being like:

de_controller {
...
ports = <_p>;
};

lcd_controller {
...
lcd0_p: port {
lcd0_ep: endpoint {
remote-endpoint = <_ep>;
};
};
};

What was the reason to keep the "ports" node instead of the device?

-- 
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef |   http://moinejf.free.fr/

[PATCH] drm/amd/powerplay: drop dual include.

[Alex Deucher]

On Tue, Dec 22, 2015 at 11:17 PM, Dave Airlie  wrote:
> From: Dave Airlie 
>
> Seems to get included twice.
>
> Signed-off-by: Dave Airlie 

Reviewed-by: Alex Deucher 

Do you want to pull this in directly, or should I queue it for my next
pull request?

> ---
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h 
> b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index eb0f1b2..f997b8d 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -30,7 +30,6 @@
>  #include "pp_power_source.h"
>  #include "hwmgr_ppt.h"
>  #include "ppatomctrl.h"
> -#include "hwmgr_ppt.h"
>
>  struct pp_instance;
>  struct pp_hwmgr;
> --
> 2.5.0
>
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

[PULL] drm-intel-fixes

[Linus Torvalds]

On Wed, Dec 23, 2015 at 2:40 AM, Jani Nikula  wrote:
>
>
>   git://anongit.freedesktop.org/drm-intel tags/drm-intel-fixes-2015-12-23

Btw, since you're already using tags, mind using *signed* tags
instead? It's just good housekeeping..

   Linus

[PULL] drm-intel-fixes

[Linus Torvalds]

On Wed, Dec 23, 2015 at 2:40 AM, Jani Nikula  wrote:
>
> Hi Dave (and/or Linus, depending on the new arrival and eggnog
> schedules) -

I'll pull it directly. Dave just sent me his pending drm fixes, he may
or may not be around any more, it's already christmas eve down under.

Linus

[Intel-gfx] [PULL] drm-intel-next

[Chris Wilson]

On Tue, Dec 22, 2015 at 04:31:22PM +, Tvrtko Ursulin wrote:
> 
> On 22/12/15 14:31, Chris Wilson wrote:
> >On Tue, Dec 22, 2015 at 03:05:14PM +0100, Daniel Vetter wrote:
> >>On Tue, Dec 22, 2015 at 11:37:18AM +0100, Daniel Vetter wrote:
> >>>Hi Dave,
> >>>
> >>>Final 4.5 feature pull for drm/i915!
> >>>
> >>>drm-intel-next-2015-12-18:
> >>>- fix atomic watermark recomputation logic (Maarten)
> >>>- modeset sequence fixes for LPT (Ville)
> >>>- more kbl enabling work (Rodrigo, Wayne)
> >>>- first bits for mst audio
> >>>- page dirty tracking fixes from Dave Gordon
> >>>- new get_eld hook from Takashi, also included in the sound tree
> >>>- fixup cursor handling when placed at address 0 (Ville)
> >>>- refactor VBT parsing code (Jani)
> >>>- rpm wakelock debug infrastructure ( Imre)
> >>>- fbdev is pinned again (Chris)
> >>>- tune the busywait logic to avoid wasting cpu cycles (Chris)
> >>>
> >>>Two small caveats as a heads up:
> >>>- the runtime pm wakelock debug stuff catches a few bugs. rpm is disabled
> >>>   by default, but lots enable it (e.g. powertop does), and we iirc have
> >>>   fixes floating for most. If we can't squeeze them all in for 4.5 because
> >>>   too big or late we can just tune down the dmesg noise since the
> >>>   uncovered bugs are all as old as rpm support.
> >>>- softpin is still thrashing around: Chris complains that the ABI can't be
> >>>   used of anything else than beignet, but I think that's ok since easy to
> >>>   remedy and softpin was done primarily for buffered svm opencl mode. And
> >>>   then there's some confusion around canonical 48bit addresses that I
> >>>   don't fully understand myself. I expect Tvrtko to handle this before
> >>>   your merge window pull goes out.
> >>
> >>So just with Tvrtko and the canonical address is something
> >>userspace/beignet will never hit under legitimate usage. So it's just a
> >>bit of closing a corner-case, and the patch+testcase is ready except for
> >>bit of final polish and unfortunately people going on holidays already.
> >
> >Nope, it was reported in the wild and it imposes an ABI constraint on
> >the execobject.offsets.
> 
> Plan is for "drm/i915: Avoid writing relocs with addresses in
> non-canonical form" to be ready as a fixup either before, or
> slightly after rc1. As long as we hit that, slight wobbling in the
> ABI between two release candidates shouldn't be an issue. That is my
> understanding at least.

What about the other ABI issue you just ignored? What about the severe
scaling issues that were known and addressed before you pushed a patch
*out of context*?

> Especially given how the announced user plans to pass in user
> pointer allocated addresses which will already be in canonical
> format.

Not good enough for ABI as the existing code that you just enabled
didn't adhere to the required ABI.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

[PATCH v7 2/4] drm: Add support for ARM's HDLCD controller.

[Liviu Dudau]

On Wed, Dec 23, 2015 at 10:03:00AM +, Daniel Stone wrote:
> Hi,
> 
> On 22 December 2015 at 17:41, Liviu Dudau  wrote:
> > The HDLCD controller is a display controller that supports resolutions
> > up to 4096x4096 pixels. It is present on various development boards
> > produced by ARM Ltd and emulated by the latest Fast Models from the
> > company.
> 
> I didn't get to take as close a look as last time, but I only had
> fairly minor quibbles then, and nothing jumped out at me this time
> either.
> 
> Reviewed-by: Daniel Stone 

Cheers and Merry Holidays!
Liviu

> 
> Cheers,
> Daniel
> 

-- 

| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---
¯\_(ツ)_/¯

linux-next: manual merge of the drm tree with the drm-intel-fixes tree

[Stephen Rothwell]

Hi Dave,

Today's linux-next merge of the drm tree got a conflict in:

  drivers/gpu/drm/i915/intel_display.c

between commit:

  57a2af6bbc7a ("drm/i915: Kill intel_crtc->cursor_bo")

from the drm-intel-fixes tree and commit:

  6285262259ca ("drm/i915: Only run commit when crtc is active, v2.")

from the drm tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwellsfr at canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_display.c
index beb0374a19f1,bda6b9c82e66..
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -6322,13 -6351,12 +6366,14 @@@ static void intel_crtc_disable_noatomic
return;

if (to_intel_plane_state(crtc->primary->state)->visible) {
-   intel_crtc_wait_for_pending_flips(crtc);
+   WARN_ON(intel_crtc->unpin_work);
+ 
intel_pre_disable_primary(crtc);
 +
 +  intel_crtc_disable_planes(crtc, 1 << 
drm_plane_index(crtc->primary));
 +  to_intel_plane_state(crtc->primary->state)->visible = false;
}

 -  intel_crtc_disable_planes(crtc, crtc->state->plane_mask);
dev_priv->display.crtc_disable(crtc);
intel_crtc->active = false;
intel_update_watermarks(crtc);
@@@ -13809,9 -14051,10 +14077,8 @@@ intel_commit_cursor_plane(struct drm_pl
addr = obj->phys_handle->busaddr;

intel_crtc->cursor_addr = addr;
 -  intel_crtc->cursor_bo = obj;

-   if (crtc->state->active)
-   intel_crtc_update_cursor(crtc, state->visible);
 -update:
+   intel_crtc_update_cursor(crtc, state->visible);
  }

  static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,

[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it

[Liviu Dudau]

On Wed, Dec 23, 2015 at 10:39:06AM +0100, Jean-Francois Moine wrote:
> On Tue, 22 Dec 2015 17:38:00 +
> Liviu Dudau  wrote:
> 
> > On Fri, Nov 20, 2015 at 02:22:03PM +, Liviu Dudau wrote:
> > > Hello,
> > > 
> > > This is v2 of the patchset trying to make drm_of_component_probe() cope 
> > > with finding
> > > both local crtc ports and remote encoder ones. Heiko Stübner was nice 
> > > enough to test
> > > an earlier version that was patched following Russell's suggestions on 
> > > rk3288, but
> > > I haven't seen any reports from iMX or Armada users.
> > > 
> > > Changelog:
> > >  v2: Updated the drm_of_component_probe() comment to explain why the 
> > > reference count
> > >  is not dropped. Fixed the compare_port() function for rockchip as 
> > > described by
> > >  Russell.
> > >  v1: Original submission. 
> > > http://lists.freedesktop.org/archives/dri-devel/2015-November/094546.html
> > 
> > Gentle ping, this has now been tested by Rockchip people and fixes the 
> > earlier version
> > that had to be reverted in mainline. Can it be included in the -next 
> > somewhere?
> 
> Hi Liviu,
> 
> Sorry for being a bit late.
> 
> I wanted to use drm_of_component_probe() for a new DRM driver, but I
> could not find any way to do it: you add the "ports" nodes as
> components while, usually, the components are the device nodes
> themselves.
> 
> With this simple patch:
> 
> diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c
> index 493c05c..dbd2921 100644
> --- a/drivers/gpu/drm/drm_of.c
> +++ b/drivers/gpu/drm/drm_of.c
> @@ -101,7 +101,7 @@ int drm_of_component_probe(struct device *dev,
>   continue;
>   }
>  
> - component_match_add(dev, , compare_of, port);
> + component_match_add(dev, , compare_of, port->parent);
>   of_node_put(port);
>   }
>  
> everything is easy, my DT being like:
> 
>   de_controller {
>   ...
>   ports = <_p>;
>   };
> 
>   lcd_controller {
>   ...
>   lcd0_p: port {
>   lcd0_ep: endpoint {
>   remote-endpoint = <_ep>;
>   };
>   };
>   };
> 
> What was the reason to keep the "ports" node instead of the device?

The function is an extract of common code sprinkled through a few DRM drivers,
they all used port rather than port->parent.

Have a look at my v2 where I've introduced two compare functions and also
modified the Rockchip compare_port() to use port->parent in the comparison. I
guess that should solve your problem.

Best regards,
Liviu

> 
> -- 
> Ken ar c'hentañ  | ** Breizh ha Linux atav! **
> Jef   |   http://moinejf.free.fr/
> ___
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 

| I would like to |
| fix the world,  |
| but they're not |
| giving me the   |
 \ source code!  /
  ---
¯\_(ツ)_/¯

[PATCH v7 2/4] drm: Add support for ARM's HDLCD controller.

[Daniel Stone]

Hi,

On 22 December 2015 at 17:41, Liviu Dudau  wrote:
> The HDLCD controller is a display controller that supports resolutions
> up to 4096x4096 pixels. It is present on various development boards
> produced by ARM Ltd and emulated by the latest Fast Models from the
> company.

I didn't get to take as close a look as last time, but I only had
fairly minor quibbles then, and nothing jumped out at me this time
either.

Reviewed-by: Daniel Stone 

Cheers,
Daniel

[PATCH v11 02/19] drm: bridge: analogix/dp: fix some obvious code style

[Yakir Yang]

On 12/22/2015 08:05 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:26 PM, Yakir Yang wrote:
>> Fix some obvious alignment problems, like alignment and line
>> over 80 characters problems, make this easy to be maintained
>> later.
>>
>> Signed-off-by: Yakir Yang 
>> Reviewed-by: Krzysztof Kozlowski 
>> Tested-by: Javier Martinez Canillas 
> Acked-by: Jingoo Han 

Thanks,
- Yakir

> Best regards,
> Jingoo Han
>
>> ---
>> Changes in v11: None
>> Changes in v10: None
>> Changes in v9: None
>> Changes in v8: None
>> Changes in v7: None
>> Changes in v6: None
>> Changes in v5:
>> - Resequence this patch after analogix_dp driver have been split
>>from exynos_dp code, and rephrase reasonable commit message, and
>>remove some controversial style (Krzysztof)
>>  -   analogix_dp_write_byte_to_dpcd(
>>  -   dp, DP_TEST_RESPONSE,
>>  +   analogix_dp_write_byte_to_dpcd(dp,
>>  +   DP_TEST_RESPONSE,
>>  DP_TEST_EDID_CHECKSUM_WRITE);
>>
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2:
>> - Improved commit message more readable, and avoid using some
>>uncommon style like bellow: (Joe Preches)
>>  -  retval = exynos_dp_read_bytes_from_i2c(...
>>...);
>>  +  retval =
>>  +  exynos_dp_read_bytes_from_i2c(..);
>>
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 129 
>> ++---
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.h |  72 ++--
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c  | 124 
>> ++--
>>   3 files changed, 163 insertions(+), 162 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> index fb8bda8..4a05c2b 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> @@ -61,7 +61,7 @@ static int analogix_dp_detect_hpd(struct 
>> analogix_dp_device *dp)
>>
>>  while (analogix_dp_get_plug_in_status(dp) != 0) {
>>  timeout_loop++;
>> -if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
>> +if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
>>  dev_err(dp->dev, "failed to get hpd plug status\n");
>>  return -ETIMEDOUT;
>>  }
>> @@ -98,8 +98,8 @@ static int analogix_dp_read_edid(struct analogix_dp_device 
>> *dp)
>>
>>  /* Read Extension Flag, Number of 128-byte EDID extension blocks */
>>  retval = analogix_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
>> -EDID_EXTENSION_FLAG,
>> -_block);
>> +EDID_EXTENSION_FLAG,
>> +_block);
>>  if (retval)
>>  return retval;
>>
>> @@ -107,7 +107,8 @@ static int analogix_dp_read_edid(struct 
>> analogix_dp_device *dp)
>>  dev_dbg(dp->dev, "EDID data includes a single extension!\n");
>>
>>  /* Read EDID data */
>> -retval = analogix_dp_read_bytes_from_i2c(dp, 
>> I2C_EDID_DEVICE_ADDR,
>> +retval = analogix_dp_read_bytes_from_i2c(dp,
>> +I2C_EDID_DEVICE_ADDR,
>>  EDID_HEADER_PATTERN,
>>  EDID_BLOCK_LENGTH,
>>  [EDID_HEADER_PATTERN]);
>> @@ -138,7 +139,7 @@ static int analogix_dp_read_edid(struct 
>> analogix_dp_device *dp)
>>  }
>>
>>  analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
>> -_vector);
>> +_vector);
>>  if (test_vector & DP_TEST_LINK_EDID_READ) {
>>  analogix_dp_write_byte_to_dpcd(dp,
>>  DP_TEST_EDID_CHECKSUM,
>> @@ -152,10 +153,8 @@ static int analogix_dp_read_edid(struct 
>> analogix_dp_device *dp)
>>
>>  /* Read EDID data */
>>  retval = analogix_dp_read_bytes_from_i2c(dp,
>> -I2C_EDID_DEVICE_ADDR,
>> -EDID_HEADER_PATTERN,
>> -EDID_BLOCK_LENGTH,
>> -[EDID_HEADER_PATTERN]);
>> +I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
>> +EDID_BLOCK_LENGTH, [EDID_HEADER_PATTERN]);
>>  if (retval != 0) {
>>  dev_err(dp->dev, "EDID Read failed!\n");
>>  return -EIO;
>> @@ -166,16 +165,13 @@ static int analogix_dp_read_edid(struct 
>> analogix_dp_device *dp)
>>  return -EIO;
>>  }
>>
>> -analogix_dp_read_byte_from_dpcd(dp,
>> -

[PATCH v11 03/19] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count

[Yakir Yang]

Hi Jingoo,

Thanks for your respond.

On 12/22/2015 08:09 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:28 PM, Yakir Yang wrote:
>> link_rate and lane_count already configured in analogix_dp_set_link_train(),
>> so we don't need to config those repeatly after training finished, just
>> remove them out.
>>
>> Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
>> would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7Gbps, 5.4Gbps}.
>>
>> Signed-off-by: Yakir Yang 
>> Tested-by: Javier Martinez Canillas 
>> ---
>> Changes in v11: None
>> Changes in v10: None
>> Changes in v9: None
>> Changes in v8: None
>> Changes in v7: None
>> Changes in v6: None
>> Changes in v5: None
>> Changes in v4:
>> - Update commit message more readable. (Jingoo)
>> - Adjust the order from 05 to 04
>>
>> Changes in v3:
>> - The link_rate and lane_count shouldn't config to the DT property value
>>directly, but we can take those as hardware limite. For example, RK3288
>>only support 4 physical lanes of 2.7/1.62 Gbps/lane, so DT property would
>>like "link-rate = 0x0a" "lane-count = 4". (Thierry)
>>
>> Changes in v2: None
>>
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 8 
>>   drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 5 +++--
>>   2 files changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> index 4a05c2b..6f899cd 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
>> @@ -624,6 +624,8 @@ static void analogix_dp_get_max_rx_bandwidth(struct 
>> analogix_dp_device *dp,
>>  /*
>>   * For DP rev.1.1, Maximum link rate of Main Link lanes
>>   * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps
>> + * For DP rev.1.2, Maximum link rate of Main Link lanes
>> + * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps
>>   */
>>  analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, );
>>  *bandwidth = data;
>> @@ -657,7 +659,8 @@ static void analogix_dp_init_training(struct 
>> analogix_dp_device *dp,
>>  analogix_dp_get_max_rx_lane_count(dp, >link_train.lane_count);
>>
>>  if ((dp->link_train.link_rate != LINK_RATE_1_62GBPS) &&
>> -(dp->link_train.link_rate != LINK_RATE_2_70GBPS)) {
>> +(dp->link_train.link_rate != LINK_RATE_2_70GBPS) &&
>> +(dp->link_train.link_rate != LINK_RATE_5_40GBPS)) {
>>  dev_err(dp->dev, "Rx Max Link Rate is abnormal :%x !\n",
>>  dp->link_train.link_rate);
>>  dp->link_train.link_rate = LINK_RATE_1_62GBPS;
>> @@ -898,9 +901,6 @@ static void analogix_dp_commit(struct analogix_dp_device 
>> *dp)
>>  analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
>>  analogix_dp_enable_enhanced_mode(dp, 1);
>>
>> -analogix_dp_set_lane_count(dp, dp->video_info->lane_count);
>> -analogix_dp_set_link_bandwidth(dp, dp->video_info->link_rate);
>> -
>>  analogix_dp_init_video(dp);
>>  ret = analogix_dp_config_video(dp);
>>  if (ret)
>> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>> b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>> index 8e84208..57aa4b0d 100644
>> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
>> @@ -21,8 +21,9 @@
>>   #define MAX_EQ_LOOP5
>>
>>   enum link_rate_type {
>> -LINK_RATE_1_62GBPS = 0x06,
>> -LINK_RATE_2_70GBPS = 0x0a
>> +LINK_RATE_1_62GBPS = DP_LINK_BW_1_62,
>> +LINK_RATE_2_70GBPS = DP_LINK_BW_2_7,
>> +LINK_RATE_5_40GBPS = DP_LINK_BW_5_4,
> Then, how about removing 'enum link_rate_type'?
> If DP_LINK_BW_* are used, LINK_RATE_* are not necessary.

Sure, good catch.

Thanks,
- Yakir

> Best regards,
> Jingoo Han
>
>
>>   };
>>
>>   enum link_lane_count_type {
>> --
>> 1.9.1
>
>
>
>

[PATCH v11 06/19] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver

[Yakir Yang]

On 12/22/2015 08:13 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:35 PM, Yakir Yang wrote:
>> After exynos_dp have been split the common IP code into analogix_dp driver,
>> the analogix_dp driver have deprecated some Samsung platform properties which
>> could be dynamically parsed from EDID/MODE/DPCD message, so this is an update
>> for Exynos DTS file for dp-controller.
>>
>> Beside the backward compatibility is fully preserved, so there are no
>> bisectability break that make this change in a separate patch.
>>
>> Signed-off-by: Yakir Yang 
>> Reviewed-by: Krzysztof Kozlowski 
>> Tested-by: Javier Martinez Canillas 
> Reviewed-by: Jingoo Han < jingoohan1 at gmail.com >

Thanks,
- Yakir

> Best regards,
> Jingoo Han
>
>> ---
>> Changes in v11: None
>> Changes in v10: None
>> Changes in v9: None
>> Changes in v8: None
>> Changes in v7: None
>> Changes in v6:
>> - Fix Peach Pit hpd property name error:
>> -   hpd-gpio = < 6 0>;
>> +   hpd-gpios = < 6 0>;
>>
>> Changes in v5:
>> - Correct the misspell in commit message. (Krzysztof)
>>
>> Changes in v4:
>> - Separate all DTS changes to a separate patch. (Krzysztof)
>>
>> Changes in v3: None
>> Changes in v2: None
>>
>>   arch/arm/boot/dts/exynos5250-arndale.dts  | 2 --
>>   arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 --
>>   arch/arm/boot/dts/exynos5250-snow-common.dtsi | 4 +---
>>   arch/arm/boot/dts/exynos5250-spring.dts   | 4 +---
>>   arch/arm/boot/dts/exynos5420-peach-pit.dts| 4 +---
>>   arch/arm/boot/dts/exynos5420-smdk5420.dts | 2 --
>>   arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 +---
>>   7 files changed, 4 insertions(+), 18 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts 
>> b/arch/arm/boot/dts/exynos5250-arndale.dts
>> index c000532..b1790cf 100644
>> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
>> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
>> @@ -124,8 +124,6 @@
>>{
>>  status = "okay";
>>  samsung,color-space = <0>;
>> -samsung,dynamic-range = <0>;
>> -samsung,ycbcr-coeff = <0>;
>>  samsung,color-depth = <1>;
>>  samsung,link-rate = <0x0a>;
>>  samsung,lane-count = <4>;
>> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts 
>> b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> index 0f5dcd4..f30c2db 100644
>> --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> @@ -80,8 +80,6 @@
>>
>>{
>>  samsung,color-space = <0>;
>> -samsung,dynamic-range = <0>;
>> -samsung,ycbcr-coeff = <0>;
>>  samsung,color-depth = <1>;
>>  samsung,link-rate = <0x0a>;
>>  samsung,lane-count = <4>;
>> diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi 
>> b/arch/arm/boot/dts/exynos5250-snow-
>> common.dtsi
>> index 5cb33ba..b96624b 100644
>> --- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
>> +++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
>> @@ -236,12 +236,10 @@
>>  pinctrl-names = "default";
>>  pinctrl-0 = <_hpd>;
>>  samsung,color-space = <0>;
>> -samsung,dynamic-range = <0>;
>> -samsung,ycbcr-coeff = <0>;
>>  samsung,color-depth = <1>;
>>  samsung,link-rate = <0x0a>;
>>  samsung,lane-count = <2>;
>> -samsung,hpd-gpio = < 7 GPIO_ACTIVE_HIGH>;
>> +hpd-gpios = < 7 GPIO_ACTIVE_HIGH>;
>>
>>  ports {
>>  port at 0 {
>> diff --git a/arch/arm/boot/dts/exynos5250-spring.dts 
>> b/arch/arm/boot/dts/exynos5250-spring.dts
>> index c1edd6d..91881d7 100644
>> --- a/arch/arm/boot/dts/exynos5250-spring.dts
>> +++ b/arch/arm/boot/dts/exynos5250-spring.dts
>> @@ -74,12 +74,10 @@
>>  pinctrl-names = "default";
>>  pinctrl-0 = <_hpd_gpio>;
>>  samsung,color-space = <0>;
>> -samsung,dynamic-range = <0>;
>> -samsung,ycbcr-coeff = <0>;
>>  samsung,color-depth = <1>;
>>  samsung,link-rate = <0x0a>;
>>  samsung,lane-count = <1>;
>> -samsung,hpd-gpio = < 0 GPIO_ACTIVE_HIGH>;
>> +hpd-gpios = < 0 GPIO_ACTIVE_HIGH>;
>>   };
>>
>>{
>> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts 
>> b/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> index 35cfb07..2f37c87 100644
>> --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
>> @@ -148,12 +148,10 @@
>>  pinctrl-names = "default";
>>  pinctrl-0 = <_hpd_gpio>;
>>  samsung,color-space = <0>;
>> -samsung,dynamic-range = <0>;
>> -samsung,ycbcr-coeff = <0>;
>>  samsung,color-depth = <1>;
>>  samsung,link-rate = <0x06>;
>>  samsung,lane-count = <2>;
>> -samsung,hpd-gpio = < 6 GPIO_ACTIVE_HIGH>;
>> +hpd-gpios = < 6 GPIO_ACTIVE_HIGH>;
>>
>>  ports {
>>  port at 0 {
>> diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts 
>> b/arch/arm/boot/dts/exynos5420-smdk5420.dts
>> index ac35aef..f67344f 100644
>> --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
>> +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
>> @@ -93,8 +93,6 @@
>>  pinctrl-names = 

[PATCH v11 09/19] phy: Add driver for rockchip Display Port PHY

[Yakir Yang]

Hi Jingoo,

Thanks for your respond.

On 12/22/2015 08:20 PM, Jingoo Han wrote:
> On Wednesday, December 16, 2015 12:41 PM, Yakir Yang wrote:
>> Add phy driver for the Rockchip DisplayPort PHY module. This
>> is required to get DisplayPort working in Rockchip SoCs.
>>
>> Signed-off-by: Yakir Yang 
>> Reviewed-by: Heiko Stuebner 
>> ---
>> Changes in v11: None
>> Changes in v10:
>> - Fix the wrong macro value of GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK
>>  BIT(4) -> BIT(20)
>>
>> Changes in v9:
>> - Removed the unused the variable "res" in probe function. (Heiko)
>> - Removed the unused head file.
>>
>> Changes in v8:
>> - Fix the mixed spacers on macro definitions. (Heiko)
>> - Remove the unnecessary empty line after clk_prepare_enable. (Heiko)
>>
>> Changes in v7:
>> - Simply the commit message. (Kishon)
>> - Symmetrical enable/disbale the phy clock and power. (Kishon)
>>
>> Changes in v6: None
>> Changes in v5:
>> - Remove "reg" DT property, cause driver could poweron/poweroff phy via
>>the exist "grf" syscon already. And rename the example DT node from
>>"edp_phy: phy at ff770274" to "edp_phy: edp-phy" directly. (Heiko)
>> - Add deivce_node at the front of driver, update phy_ops type from "static
>>struct" to "static const struct". And correct the input paramters of
>>devm_phy_create() interfaces. (Heiko)
>>
>> Changes in v4:
>> - Add commit message, and remove the redundant rockchip_dp_phy_init()
>>function, move those code to probe() method. And remove driver .owner
>>number. (Kishon)
>>
>> Changes in v3:
>> - Suggest, add rockchip dp phy driver, collect the phy clocks and
>>power control. (Heiko)
>>
>> Changes in v2: None
>>
>>   drivers/phy/Kconfig   |   7 ++
>>   drivers/phy/Makefile  |   1 +
>>   drivers/phy/phy-rockchip-dp.c | 151 
>> ++
>>   3 files changed, 159 insertions(+)
>>   create mode 100644 drivers/phy/phy-rockchip-dp.c
>>
>> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
>> index 7eb5859d..7355819 100644
>> --- a/drivers/phy/Kconfig
>> +++ b/drivers/phy/Kconfig
>> @@ -319,6 +319,13 @@ config PHY_ROCKCHIP_USB
>>  help
>>Enable this to support the Rockchip USB 2.0 PHY.
>>
>> +config PHY_ROCKCHIP_DP
>> +tristate "Rockchip Display Port PHY Driver"
>> +depends on ARCH_ROCKCHIP && OF
>> +select GENERIC_PHY
>> +help
>> +  Enable this to support the Rockchip Display Port PHY.
>> +
>>   config PHY_ST_SPEAR1310_MIPHY
>>  tristate "ST SPEAR1310-MIPHY driver"
>>  select GENERIC_PHY
>> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
>> index 075db1a..b1700cd 100644
>> --- a/drivers/phy/Makefile
>> +++ b/drivers/phy/Makefile
>> @@ -35,6 +35,7 @@ phy-exynos-usb2-$(CONFIG_PHY_S5PV210_USB2) += 
>> phy-s5pv210-usb2.o
>>   obj-$(CONFIG_PHY_EXYNOS5_USBDRD)   += phy-exynos5-usbdrd.o
>>   obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)+= phy-qcom-apq8064-sata.o
>>   obj-$(CONFIG_PHY_ROCKCHIP_USB) += phy-rockchip-usb.o
>> +obj-$(CONFIG_PHY_ROCKCHIP_DP)   += phy-rockchip-dp.o
>>   obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)+= phy-qcom-ipq806x-sata.o
>>   obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY)   += phy-spear1310-miphy.o
>>   obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY)   += phy-spear1340-miphy.o
>> diff --git a/drivers/phy/phy-rockchip-dp.c b/drivers/phy/phy-rockchip-dp.c
>> new file mode 100644
>> index 000..3cb3bf8
>> --- /dev/null
>> +++ b/drivers/phy/phy-rockchip-dp.c
>> @@ -0,0 +1,151 @@
>> +/*
>> + * Rockchip DP PHY driver
>> + *
>> + * Copyright (C) 2015 FuZhou Rockchip Co., Ltd.
>> + * Author: Yakir Yang 
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
> Please order these headers alphabetically.
> It will enhance the readability.

Done,

Thanks,
- Yakir

> Best regards,
> Jingoo Han
>
>> +
>> +#define GRF_SOC_CON12   0x0274
>> +
>> +#define GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK   BIT(20)
>> +#define GRF_EDP_REF_CLK_SEL_INTER   BIT(4)
>> +
>> +#define GRF_EDP_PHY_SIDDQ_HIWORD_MASK   BIT(21)
>> +#define GRF_EDP_PHY_SIDDQ_ON0
>> +#define GRF_EDP_PHY_SIDDQ_OFF   BIT(5)
>> +
>> +struct rockchip_dp_phy {
>> +struct device  *dev;
>> +struct regmap  *grf;
>> +struct clk *phy_24m;
>> +};
>> +
>> +static int rockchip_set_phy_state(struct phy *phy, bool enable)
>> +{
>> +struct rockchip_dp_phy *dp = phy_get_drvdata(phy);
>> +int ret;
>> +
>> +if (enable) {
>> +ret = regmap_write(dp->grf, GRF_SOC_CON12,
>> +   GRF_EDP_PHY_SIDDQ_HIWORD_MASK |
>> +   GRF_EDP_PHY_SIDDQ_ON);
>> + 

[Bug 64661] udl causes blank screen

[bugzilla-dae...@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=64661

Austin Robertson  changed:

   What|Removed |Added

 CC||austinrobertson at gmail.com

--- Comment #7 from Austin Robertson  ---
(In reply to Jason Schulz from comment #6)
> Later versions of either the nvidia drivers or kernel have fixed this
> problem.

What versions of the nVidia driver and kernel do you have this working with?
I've been trying to resolve the same problem. 

I get the same message in dmesg indicating from udl that the swiotlb buffer is
full. Here's the relevant dmesg.debug from my machine:

[  133.947952] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
[  133.947960] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:22:DVI-I-1]
[  134.107906] [drm:drm_helper_probe_single_connector_modes_merge_bits]
[CONNECTOR:22:DVI-I-1] probed modes :
[  134.107916] [drm:drm_mode_debug_printmodeline] Modeline 24:"1920x1080" 60
148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[  134.107920] [drm:drm_mode_debug_printmodeline] Modeline 31:"1280x1024" 75
135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
[  134.107925] [drm:drm_mode_debug_printmodeline] Modeline 26:"1280x1024" 60
108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
[  134.107929] [drm:drm_mode_debug_printmodeline] Modeline 25:"1152x864" 75
108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
[  134.107933] [drm:drm_mode_debug_printmodeline] Modeline 32:"1024x768" 75
78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
[  134.107937] [drm:drm_mode_debug_printmodeline] Modeline 33:"1024x768" 60
65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
[  134.107941] [drm:drm_mode_debug_printmodeline] Modeline 34:"800x600" 75
49500 800 816 896 1056 600 601 604 625 0x40 0x5
[  134.107945] [drm:drm_mode_debug_printmodeline] Modeline 27:"800x600" 60
4 800 840 968 1056 600 601 605 628 0x40 0x5
[  134.107949] [drm:drm_mode_debug_printmodeline] Modeline 28:"640x480" 75
31500 640 656 720 840 480 481 484 500 0x40 0xa
[  134.107953] [drm:drm_mode_debug_printmodeline] Modeline 29:"640x480" 60
25200 640 656 752 800 480 490 492 525 0x40 0xa
[  134.107957] [drm:drm_mode_debug_printmodeline] Modeline 30:"720x400" 70
28320 720 738 846 900 400 412 414 449 0x40 0x6
[  134.107990] [drm:drm_mode_getconnector] [CONNECTOR:22:?]
[  134.131440] udl 1-1.4.3:1.0: swiotlb buffer is full (sz: 2097152 bytes)
[  134.131447] DMA: Out of SW-IOMMU space for 2097152 bytes at device
1-1.4.3:1.0
[  134.131825] [drm:drm_mode_addfb2] [FB:37]
[  134.131843] [drm:drm_mode_setcrtc] [CRTC:20]
[  134.131881] [drm:drm_crtc_check_viewport] Invalid fb size 1024x768 for CRTC
viewport 1920x1080+0+0.


This is with Linux 4.2.5-1 and nVidia 358.16:

$ cat /proc/driver/nvidia/version
NVRM version: NVIDIA UNIX x86_64 Kernel Module  358.16  Mon Nov 16 19:25:55 PST
2015
GCC version:  gcc version 5.2.0 (GCC) 
$ uname -a
Linux archie 4.2.5-1-ARCH #1 SMP PREEMPT Tue Oct 27 08:13:28 CET 2015 x86_64
GNU/Linux

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[git pull] drm fixes

[Dave Airlie]

Hi Linus,

Not much happening, should have dequeued this lot earlier,

One amdgpu, one nouveau and one exynos fix.

Dave.

The following changes since commit 76b8ebdc4c7a8299e6365428a36cc0fb1c2a4103:

  Merge tag 'media/v4.4-3' of 
git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media (2015-12-18 
15:41:35 -0800)

are available in the git repository at:

  git://people.freedesktop.org/~airlied/linux drm-fixes

for you to fetch changes up to 1957d62c29be413d77da2e69737f4251e5449fbd:

  Merge branch 'exynos-drm-fixes' of 
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes 
(2015-12-20 08:51:34 +1000)


Andrzej Hajda (1):
  drm/exynos: atomic check only enabled crtc states

Christian König (1):
  drm/amdgpu: fix user fence handling

Dave Airlie (3):
  Merge branch 'drm-fixes-4.4' of git://people.freedesktop.org/~agd5f/linux 
into drm-fixes
  Merge branch 'linux-4.4' of git://github.com/skeggsb/linux into drm-fixes
  Merge branch 'exynos-drm-fixes' of 
git://git.kernel.org/.../daeinki/drm-exynos into drm-fixes

Martin Peres (1):
  drm/nouveau/bios/fan: hardcode the fan mode to linear

 drivers/gpu/drm/amd/amdgpu/amdgpu.h|  3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 63 +-
 drivers/gpu/drm/exynos/exynos_drm_crtc.c   |  3 ++
 drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.c |  1 +
 4 files changed, 48 insertions(+), 22 deletions(-)

[Bug 80419] XCOM: Enemy Unknown Causes lockup

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=80419

--- Comment #90 from Paulo Dias  ---
just to let you guys know that with latest llvm 3.8 (256187) fixes and mesa up
to 50fc4a925644378c50282004304bc8fd64b95e3c, it takes much longer for xcom
enemy unknown to crash the GPU, i played for two solid hours, so its getting
better. if someone wants, i can test the drirc workaround for
glDrawRangeElementsBaseVertex, just put a .drirc here.

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[Bug 80419] XCOM: Enemy Unknown Causes lockup

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=80419

--- Comment #89 from Michel Dänzer  ---
(In reply to Daniel Exner from comment #83)
> Managed to get some more infos about glretrace crash:
> 
> Stack trace of thread 13986:
> #0  0x7fca93b67945 loader_dri3_wait_gl (libGL.so.1)

This crash is fixed in current Mesa Git master.

BTW, please create attachments for such large pieces information.

(In reply to Kamil Páral from comment #87)
> > If you happen to get a gdb backtrace of it in the future, that will help
> > verify this assumption, but it's no more than nice to have.
> 
> I have it now, attaching.

Thanks, it confirms that the Xorg crash is caused by the GPU hang and not
related to the apitrace crash.

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