[Bug 94025] [bisected] r600_texture.c:562: r600_texture_get_htile_size: Assertion `0' failed

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=94025

--- Comment #2 from Alexandre Demers  ---
(In reply to Alexandre Demers from comment #1)
> I'm using and R9 290X, which is a Sea Islands, covered by this comment.

I meant R9 280X (Tahiti family, thus Southern Islands). So, was it included in
the removed r600_get_gb_tiling_config()? It seems so, but then the comment
would have been slightly wrong.

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[PATCH] drm/qxl: fix erroneous return value

2016-02-06 Thread Anton Protopopov
The qxl_gem_prime_mmap() function returns ENOSYS instead of -ENOSYS

Signed-off-by: Anton Protopopov 
---
 drivers/gpu/drm/qxl/qxl_prime.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/qxl/qxl_prime.c b/drivers/gpu/drm/qxl/qxl_prime.c
index 3d031b5..9f029dd 100644
--- a/drivers/gpu/drm/qxl/qxl_prime.c
+++ b/drivers/gpu/drm/qxl/qxl_prime.c
@@ -68,5 +68,5 @@ int qxl_gem_prime_mmap(struct drm_gem_object *obj,
   struct vm_area_struct *area)
 {
WARN_ONCE(1, "not implemented");
-   return ENOSYS;
+   return -ENOSYS;
 }
-- 
2.1.4



[Bug 92936] Tonga powerplay isssues

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=92936

--- Comment #13 from Andy Furniss  ---
(In reply to Alex Deucher from comment #12)
> Can you try my latest 4.6 wip branch?  I fixed it in a more unified way.
> http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-4.6-wip

This also fixes the memclk getting stuck and uvd corruption issues.

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[PATCH] drm/gma500: remove helper function

2016-02-06 Thread Patrik Jakobsson
On Tue, Feb 2, 2016 at 7:05 AM, Sudip Mukherjee
 wrote:
> We were getting build warning about:
> drivers/gpu/drm/gma500/mdfld_dsi_output.c:407:2: warning: initialization
> from incompatible pointer type
>
> The callback to dpms was pointing to a helper function which had a
> return type of void, whereas the callback should point to a function
> which has a return type of int.
> On closer look it turned out that we do not need the helper function
> since if we call drm_helper_connector_dpms() directly, the first check
> that drm_helper_connector_dpms() does is: if (mode == connector->dpms)
>
> Signed-off-by: Sudip Mukherjee 

Looks good, thanks.

Signed-off-by: Patrik Jakobsson 

> ---
>  drivers/gpu/drm/gma500/mdfld_dsi_output.c | 12 +---
>  1 file changed, 1 insertion(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_output.c 
> b/drivers/gpu/drm/gma500/mdfld_dsi_output.c
> index d758f4c..907cb51 100644
> --- a/drivers/gpu/drm/gma500/mdfld_dsi_output.c
> +++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.c
> @@ -382,16 +382,6 @@ static int mdfld_dsi_connector_mode_valid(struct 
> drm_connector *connector,
> return MODE_OK;
>  }
>
> -static void mdfld_dsi_connector_dpms(struct drm_connector *connector, int 
> mode)
> -{
> -   if (mode == connector->dpms)
> -   return;
> -
> -   /*first, execute dpms*/
> -
> -   drm_helper_connector_dpms(connector, mode);
> -}
> -
>  static struct drm_encoder *mdfld_dsi_connector_best_encoder(
> struct drm_connector *connector)
>  {
> @@ -404,7 +394,7 @@ static struct drm_encoder 
> *mdfld_dsi_connector_best_encoder(
>
>  /*DSI connector funcs*/
>  static const struct drm_connector_funcs mdfld_dsi_connector_funcs = {
> -   .dpms = /*drm_helper_connector_dpms*/mdfld_dsi_connector_dpms,
> +   .dpms = drm_helper_connector_dpms,
> .detect = mdfld_dsi_connector_detect,
> .fill_modes = drm_helper_probe_single_connector_modes,
> .set_property = mdfld_dsi_connector_set_property,
> --
> 1.9.1
>


[Bug 94025] [bisected] r600_texture.c:562: r600_texture_get_htile_size: Assertion `0' failed

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=94025

--- Comment #1 from Alexandre Demers  ---
I added a line to output the value of "num_pipes" when it can't be matched to
the defined values in the switch:
fprintf(stderr, "Driver was unable to determine num_pipes (value = %i)\n",
num_pipes);

I ended up outputting "Driver was unable to determine num_pipes (value = 12)",
which is not coverded in the switch... Expected?

In commit 294ec530, r600_get_gb_tiling_config() was removed. num_pipes was
defined there and a comment was telling:
"/* Convert Sea Islands register values GB_ADDR_CFG and MC_ADDR_CFG
 * into GB_TILING_CONFIG register which is only present on R600-R700. */"

I'm using and R9 290X, which is a Sea Islands, covered by this comment.

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[PATCH v4 1/2] clk: sunxi: Add sun6i/8i video support

2016-02-06 Thread Chen-Yu Tsai
On Sat, Feb 6, 2016 at 5:37 PM, Jean-Francois Moine  wrote:
> On Fri, 5 Feb 2016 10:39:15 +0100
> Maxime Ripard  wrote:
>
>> > +CLK_OF_DECLARE(sun6i_display, "allwinner,sun6i-display-clk", 
>> > sun6i_display_setup);
>>
>> Please use the display driver from my DRM serie, it covers everything
>> you need here.
>
> If you give me a pointer, I will have a look.
>
>> > +CLK_OF_DECLARE(sun6i_pll3, "allwinner,sun6i-pll3-clk", sun6i_pll3_setup);
>>
>> And please use the clk-factors code here.
>
> I don't see how I can get direct 297MHz and 270MHz in fractional mode
> with that code.

clk-factors now supports a custom .recalc callback. Along with get_factors,
you can support pretty much any clock that has four variables, not including
the mux and clock gate.

So for this you'd have the div as factor m, and the integer mode bit as p,
and the fraction bit as n, and recalc would be somewhat like this:

if (p) {
rate = parent_rate / (m + 1);
} else if (n) {
rate = 29700;
} else {
rate = 27000;
}

get_factors should be easy enough to figure out.

Regards
ChenYu


[Bug 94025] [bisected] r600_texture.c:562: r600_texture_get_htile_size: Assertion `0' failed

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=94025

Bug ID: 94025
   Summary: [bisected] r600_texture.c:562:
r600_texture_get_htile_size: Assertion `0' failed
   Product: Mesa
   Version: git
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/Gallium/radeonsi
  Assignee: dri-devel at lists.freedesktop.org
  Reporter: alexandre.f.demers at gmail.com
QA Contact: dri-devel at lists.freedesktop.org

Created attachment 121557
  --> https://bugs.freedesktop.org/attachment.cgi?id=121557=edit
backtrace

Since yesterday night, I've been unable to get a window manage running (see
attached backtrace). After bisecting Mesa (was the only thing recompiled), I
found out that the following commit was the culprit. Any application being
launched while bisecting from and after that commit ends up with a
"r600_texture.c:562: r600_texture_get_htile_size: Assertion `0' failed" error.

294ec530c9829aead97487b1feb06361ef97cc2d is the first bad commit
commit 294ec530c9829aead97487b1feb06361ef97cc2d
Author: Marek Olšák 
Date:   Sat Jan 30 01:52:58 2016 +0100

gallium/radeon: just get num_tile_pipes from the winsys

Reviewed-by: Michel Dänzer 

:04 04 71cb2da01a5912443f2ca74f97e46533f50f50d8
964978b8372e95f18eb09db4158b032bf25611fb Msrc

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[Bug 94019] [bisected] 3D acceleration broken with gallium/radeon: just get num_tile_pipes from the winsys

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=94019

--- Comment #2 from sarnex  ---
(In reply to Ernst Sj�strand from comment #1)
> There is a backtrace but no result of any bisect...?

I'm not sure what you mean. The bad commit is 'gallium/radeon: just get
num_tile_pipes from the winsys'

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[Bug 94019] [bisected] 3D acceleration broken with gallium/radeon: just get num_tile_pipes from the winsys

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=94019

--- Comment #1 from Ernst Sj�strand  ---
There is a backtrace but no result of any bisect...?

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[PATCH v4 11/11] arm64: dts: hisilicon: Add display subsystem DT nodes for hi6220

2016-02-06 Thread Xinliang Liu
Add ade, dsi and adv7533 DT nodes for hikey board.

Signed-off-by: Xinliang Liu 
---
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 44 +
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi  | 53 ++
 2 files changed, 97 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts 
b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 818525197508..5c3557c8e59b 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -39,3 +39,47 @@
  {
label = "LS-UART1";
 };
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "ok";
+
+   ports {
+/* 1 for output port */
+   port at 1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+
+   /* 0 for bridge, other value for panel */
+   dsi_out0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+};
+
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "ok";
+
+   adv7533: adv7533 at 39 {
+   compatible = "adi,adv7533";
+   reg = <0x39>;
+   interrupt-parent = <>;
+   interrupts = <1 2>;
+   pd-gpio = < 4 0>;
+   adi,dsi-lanes = <4>;
+
+   port {
+   adv7533_in: endpoint {
+   remote-endpoint = <_out0>;
+   };
+   };
+   };
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index ad1f1ebcb05c..e50e81cdd242 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -209,5 +209,58 @@
clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
+
+   ade: ade at f410 {
+   compatible = "hisilicon,hi6220-ade";
+   reg = <0x0 0xf410 0x0 0x7800>,
+ <0x0 0xf441 0x0 0x1000>,
+ <0x0 0xf452 0x0 0x1000>;
+   reg-names = "ade_base",
+   "media_base",
+   "media_noc_base";
+
+   interrupts = <0 115 4>; /* ldi interrupt */
+
+   clocks = <_ctrl HI6220_ADE_CORE>,
+<_ctrl HI6220_CODEC_JPEG>,
+<_ctrl HI6220_ADE_PIX_SRC>;
+   /*clock name*/
+   clock-names  = "clk_ade_core",
+  "clk_codec_jpeg",
+  "clk_ade_pix";
+
+   assigned-clocks = <_ctrl HI6220_ADE_CORE>,
+   <_ctrl HI6220_CODEC_JPEG>;
+   assigned-clock-rates = <36000>, <28800>;
+   dma-coherent;
+   status = "disabled";
+
+   port {
+   ade_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+
+   dsi: dsi at f4107800 {
+   compatible = "hisilicon,hi6220-dsi";
+   reg = <0x0 0xf4107800 0x0 0x100>;
+   clocks = <_ctrl  HI6220_DSI_PCLK>;
+   clock-names = "pclk_dsi";
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   /* 0 for input port */
+   port at 0 {
+   reg = <0>;
+   dsi_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+   };
};
 };
-- 
1.9.1



[PATCH v4 10/11] MAINTAINERS: Add maintainer for hisilicon DRM driver

2016-02-06 Thread Xinliang Liu
Add maintainer and reviewer for hisilicon DRM driver.

v4:
- Add Chen Feng  as Designated reviewer.
v3: First version.

Signed-off-by: Xinliang Liu 
---
 MAINTAINERS | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 30aca4aa5467..730ebc571edf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3777,6 +3777,16 @@ S:   Maintained
 F: drivers/gpu/drm/gma500
 F: include/drm/gma500*

+DRM DRIVERS FOR HISILICON
+M: Xinliang Liu 
+R: Xinwei Kong 
+R: Chen Feng 
+L: dri-devel at lists.freedesktop.org
+T: git git://github.com/xin3liang/linux.git
+S: Maintained
+F: drivers/gpu/drm/hisilicon
+F: Documentation/devicetree/bindings/display/hisilicon
+
 DRM DRIVERS FOR NVIDIA TEGRA
 M: Thierry Reding 
 M: Terje Bergström 
-- 
1.9.1



[PATCH v4 09/11] drm/hisilicon: Add support for external bridge

2016-02-06 Thread Xinliang Liu
Add support for external HDMI bridge.

v4: None.
v3:
- Fix a typo: s/exteranl/external.
v2:
- Remove abtraction layer.

Signed-off-by: Xinliang Liu 
---
 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 52 
 1 file changed, 52 insertions(+)

diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 
b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
index 2837af01e935..1342d84d7c68 100644
--- a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
@@ -79,6 +79,7 @@ struct dsi_hw_ctx {

 struct dw_dsi {
struct drm_encoder encoder;
+   struct drm_bridge *bridge;
struct mipi_dsi_host host;
struct drm_display_mode cur_mode;
struct dsi_hw_ctx *ctx;
@@ -688,6 +689,25 @@ static int dsi_host_init(struct device *dev, struct dw_dsi 
*dsi)
return 0;
 }

+static int dsi_bridge_init(struct drm_device *dev, struct dw_dsi *dsi)
+{
+   struct drm_encoder *encoder = >encoder;
+   struct drm_bridge *bridge = dsi->bridge;
+   int ret;
+
+   /* associate the bridge to dsi encoder */
+   encoder->bridge = bridge;
+   bridge->encoder = encoder;
+
+   ret = drm_bridge_attach(dev, bridge);
+   if (ret) {
+   DRM_ERROR("failed to attach external bridge\n");
+   return ret;
+   }
+
+   return 0;
+}
+
 static int dsi_bind(struct device *dev, struct device *master, void *data)
 {
struct dsi_data *ddata = dev_get_drvdata(dev);
@@ -703,6 +723,10 @@ static int dsi_bind(struct device *dev, struct device 
*master, void *data)
if (ret)
return ret;

+   ret = dsi_bridge_init(drm_dev, dsi);
+   if (ret)
+   return ret;
+
return 0;
 }

@@ -719,8 +743,36 @@ static const struct component_ops dsi_ops = {
 static int dsi_parse_dt(struct platform_device *pdev, struct dw_dsi *dsi)
 {
struct dsi_hw_ctx *ctx = dsi->ctx;
+   struct device_node *np = pdev->dev.of_node;
+   struct device_node *endpoint, *bridge_node;
+   struct drm_bridge *bridge;
struct resource *res;

+   /*
+* Get the endpoint node. In our case, dsi has one output port1
+* to which the external HDMI bridge is connected.
+*/
+   endpoint = of_graph_get_endpoint_by_regs(np, 1, -1);
+   if (!endpoint) {
+   DRM_ERROR("no valid endpoint node\n");
+   return -ENODEV;
+   }
+   of_node_put(endpoint);
+
+   bridge_node = of_graph_get_remote_port_parent(endpoint);
+   if (!bridge_node) {
+   DRM_ERROR("no valid bridge node\n");
+   return -ENODEV;
+   }
+   of_node_put(bridge_node);
+
+   bridge = of_drm_find_bridge(bridge_node);
+   if (!bridge) {
+   DRM_INFO("wait for external HDMI bridge driver.\n");
+   return -EPROBE_DEFER;
+   }
+   dsi->bridge = bridge;
+
ctx->dsi_cfg_clk = devm_clk_get(>dev, "pclk_dsi");
if (IS_ERR(ctx->dsi_cfg_clk)) {
DRM_ERROR("failed to get dsi plck clock\n");
-- 
1.9.1



[PATCH v4 08/11] drm/hisilicon: Add designware dsi host driver

2016-02-06 Thread Xinliang Liu
Add DesignWare dsi host driver for hi6220 SoC.

v4: None.
v3: None.
v2:
- Remove abtraction layer.

Signed-off-by: Xinliang Liu 
---
 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 50 
 1 file changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 
b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
index 7c9423537b71..2837af01e935 100644
--- a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
@@ -79,6 +79,7 @@ struct dsi_hw_ctx {

 struct dw_dsi {
struct drm_encoder encoder;
+   struct mipi_dsi_host host;
struct drm_display_mode cur_mode;
struct dsi_hw_ctx *ctx;
struct mipi_phy_params phy;
@@ -642,6 +643,51 @@ static int dw_drm_encoder_init(struct device *dev,
return 0;
 }

+static int dsi_host_attach(struct mipi_dsi_host *host,
+  struct mipi_dsi_device *mdsi)
+{
+   struct dw_dsi *dsi = host_to_dsi(host);
+
+   if (mdsi->lanes < 1 || mdsi->lanes > 4) {
+   DRM_ERROR("dsi device params invalid\n");
+   return -EINVAL;
+   }
+
+   dsi->lanes = mdsi->lanes;
+   dsi->format = mdsi->format;
+   dsi->mode_flags = mdsi->mode_flags;
+
+   return 0;
+}
+
+static int dsi_host_detach(struct mipi_dsi_host *host,
+  struct mipi_dsi_device *mdsi)
+{
+   /* do nothing */
+   return 0;
+}
+
+static const struct mipi_dsi_host_ops dsi_host_ops = {
+   .attach = dsi_host_attach,
+   .detach = dsi_host_detach,
+};
+
+static int dsi_host_init(struct device *dev, struct dw_dsi *dsi)
+{
+   struct mipi_dsi_host *host = >host;
+   int ret;
+
+   host->dev = dev;
+   host->ops = _host_ops;
+   ret = mipi_dsi_host_register(host);
+   if (ret) {
+   DRM_ERROR("failed to register dsi host\n");
+   return ret;
+   }
+
+   return 0;
+}
+
 static int dsi_bind(struct device *dev, struct device *master, void *data)
 {
struct dsi_data *ddata = dev_get_drvdata(dev);
@@ -653,6 +699,10 @@ static int dsi_bind(struct device *dev, struct device 
*master, void *data)
if (ret)
return ret;

+   ret = dsi_host_init(dev, dsi);
+   if (ret)
+   return ret;
+
return 0;
 }

-- 
1.9.1



[PATCH v4 07/11] drm/hisilicon: Add designware dsi encoder driver

2016-02-06 Thread Xinliang Liu
Add DesignWare MIPI DSI Host Controller v1.02 encoder driver
for hi6220 SoC.

v4: None.
v3:
- Rename file name to dw_drm_dsi.c
- Make encoder type as DRM_MODE_ENCODER_DSI.
- A few cleanup.
v2:
- Remove abtraction layer.

Signed-off-by: Xinliang Liu 
Signed-off-by: Xinwei Kong 
Signed-off-by: Andy Green 
---
 drivers/gpu/drm/hisilicon/kirin/Kconfig  |   1 +
 drivers/gpu/drm/hisilicon/kirin/Makefile |   3 +-
 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 743 +++
 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h |  83 +++
 4 files changed, 829 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h

diff --git a/drivers/gpu/drm/hisilicon/kirin/Kconfig 
b/drivers/gpu/drm/hisilicon/kirin/Kconfig
index 3ac4b8edeac1..de0d454c5c13 100644
--- a/drivers/gpu/drm/hisilicon/kirin/Kconfig
+++ b/drivers/gpu/drm/hisilicon/kirin/Kconfig
@@ -4,6 +4,7 @@ config DRM_HISI_KIRIN
select DRM_KMS_HELPER
select DRM_GEM_CMA_HELPER
select DRM_KMS_CMA_HELPER
+   select DRM_MIPI_DSI
help
  Choose this option if you have a hisilicon Kirin chipsets(hi6220).
  If M is selected the module will be called kirin-drm.
diff --git a/drivers/gpu/drm/hisilicon/kirin/Makefile 
b/drivers/gpu/drm/hisilicon/kirin/Makefile
index 2a61ab006ddb..5dcd0d4328b6 100644
--- a/drivers/gpu/drm/hisilicon/kirin/Makefile
+++ b/drivers/gpu/drm/hisilicon/kirin/Makefile
@@ -1,4 +1,5 @@
 kirin-drm-y := kirin_drm_drv.o \
-  kirin_drm_ade.o
+  kirin_drm_ade.o \
+  dw_drm_dsi.o

 obj-$(CONFIG_DRM_HISI_KIRIN) += kirin-drm.o
diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c 
b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
new file mode 100644
index ..7c9423537b71
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
@@ -0,0 +1,743 @@
+/*
+ * DesignWare MIPI DSI Host Controller v1.02 driver
+ *
+ * Copyright (c) 2016 Linaro Limited.
+ * Copyright (c) 2014-2016 Hisilicon Limited.
+ *
+ * Author:
+ * Xinliang Liu 
+ * Xinliang Liu 
+ * Xinwei Kong 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "dw_dsi_reg.h"
+
+#define MAX_TX_ESC_CLK(10)
+#define ROUND(x, y) ((x) / (y) + ((x) % (y) * 10 / (y) >= 5 ? 1 : 0))
+#define PHY_REF_CLK_RATE   1920
+#define PHY_REF_CLK_PERIOD_PS (10 / (PHY_REF_CLK_RATE / 1000))
+
+#define encoder_to_dsi(encoder) \
+   container_of(encoder, struct dw_dsi, encoder)
+#define host_to_dsi(host) \
+   container_of(host, struct dw_dsi, host)
+
+struct mipi_phy_params {
+   u32 clk_t_lpx;
+   u32 clk_t_hs_prepare;
+   u32 clk_t_hs_zero;
+   u32 clk_t_hs_trial;
+   u32 clk_t_wakeup;
+   u32 data_t_lpx;
+   u32 data_t_hs_prepare;
+   u32 data_t_hs_zero;
+   u32 data_t_hs_trial;
+   u32 data_t_ta_go;
+   u32 data_t_ta_get;
+   u32 data_t_wakeup;
+   u32 hstx_ckg_sel;
+   u32 pll_fbd_div5f;
+   u32 pll_fbd_div1f;
+   u32 pll_fbd_2p;
+   u32 pll_enbwt;
+   u32 pll_fbd_p;
+   u32 pll_fbd_s;
+   u32 pll_pre_div1p;
+   u32 pll_pre_p;
+   u32 pll_vco_750M;
+   u32 pll_lpf_rs;
+   u32 pll_lpf_cs;
+   u32 clklp2hs_time;
+   u32 clkhs2lp_time;
+   u32 lp2hs_time;
+   u32 hs2lp_time;
+   u32 clk_to_data_delay;
+   u32 data_to_clk_delay;
+   u32 lane_byte_clk_kHz;
+   u32 clk_division;
+};
+
+struct dsi_hw_ctx {
+   void __iomem *base;
+   struct clk *dsi_cfg_clk;
+};
+
+struct dw_dsi {
+   struct drm_encoder encoder;
+   struct drm_display_mode cur_mode;
+   struct dsi_hw_ctx *ctx;
+   struct mipi_phy_params phy;
+
+   u32 lanes;
+   enum mipi_dsi_pixel_format format;
+   unsigned long mode_flags;
+   bool enable;
+};
+
+struct dsi_data {
+   struct dw_dsi dsi;
+   struct dsi_hw_ctx ctx;
+};
+
+struct dsi_phy_range {
+   u32 min_range_kHz;
+   u32 max_range_kHz;
+   u32 pll_vco_750M;
+   u32 hstx_ckg_sel;
+};
+
+static const struct dsi_phy_range dphy_range_info[] = {
+   {   46875,62500,   1,7 },
+   {   62500,93750,   0,7 },
+   {   93750,   125000,   1,6 },
+   {  125000,   187500,   0,6 },
+   {  187500,   25,   1,5 },
+   {  25,   375000,   0,5 },
+   {  375000,   50,   1,4 },
+   {  50,   75,   0,4 },
+   {  75,  100,   1,0 },
+   { 100,  150,   0,0 }
+};
+
+static void dsi_get_phy_params(u32 phy_freq_kHz,
+  struct mipi_phy_params *phy)
+{
+   u32 ui = 0;
+   u32 cfg_clk_ps = 

[PATCH v4 06/11] drm/hisilicon: Add cma fbdev and hotplug

2016-02-06 Thread Xinliang Liu
Add cma Fbdev, Fbdev is legency and optional, you can enable/disable it by
configuring DRM_FBDEV_EMULATION.
Add hotplug.

v4: None.
v3: None.
v2:
- Use CONFIG_DRM_FBDEV_EMULATION instead of CONFIG_DRM_HISI_FBDEV.

Signed-off-by: Xinliang Liu 
---
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 34 +
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h |  3 +++
 2 files changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 
b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
index 723888feb760..d57b9fa0ce3e 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 

 #include "kirin_drm_drv.h"

@@ -32,6 +33,13 @@ static int kirin_drm_kms_cleanup(struct drm_device *dev)
 {
struct kirin_drm_private *priv = dev->dev_private;

+#ifdef CONFIG_DRM_FBDEV_EMULATION
+   if (priv->fbdev) {
+   drm_fbdev_cma_fini(priv->fbdev);
+   priv->fbdev = NULL;
+   }
+#endif
+   drm_kms_helper_poll_fini(dev);
drm_vblank_cleanup(dev);
dc_ops->cleanup(dev);
drm_mode_config_cleanup(dev);
@@ -41,8 +49,28 @@ static int kirin_drm_kms_cleanup(struct drm_device *dev)
return 0;
 }

+#ifdef CONFIG_DRM_FBDEV_EMULATION
+static void kirin_fbdev_output_poll_changed(struct drm_device *dev)
+{
+   struct kirin_drm_private *priv = dev->dev_private;
+
+   if (priv->fbdev) {
+   drm_fbdev_cma_hotplug_event(priv->fbdev);
+   } else {
+   priv->fbdev = drm_fbdev_cma_init(dev, 32,
+   dev->mode_config.num_crtc,
+   dev->mode_config.num_connector);
+   if (IS_ERR(priv->fbdev))
+   priv->fbdev = NULL;
+   }
+}
+#endif
+
 static const struct drm_mode_config_funcs kirin_drm_mode_config_funcs = {
.fb_create = drm_fb_cma_create,
+#ifdef CONFIG_DRM_FBDEV_EMULATION
+   .output_poll_changed = kirin_fbdev_output_poll_changed,
+#endif
.atomic_check = drm_atomic_helper_check,
.atomic_commit = drm_atomic_helper_commit,
 };
@@ -98,6 +126,12 @@ static int kirin_drm_kms_init(struct drm_device *dev)
/* reset all the states of crtc/plane/encoder/connector */
drm_mode_config_reset(dev);

+   /* init kms poll for handling hpd */
+   drm_kms_helper_poll_init(dev);
+
+   /* force detection after connectors init */
+   (void)drm_helper_hpd_irq_event(dev);
+
return 0;

 err_unbind_all:
diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h 
b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h
index 5a05ad6a81db..1a07caf8e7f4 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h
@@ -21,6 +21,9 @@ struct kirin_dc_ops {

 struct kirin_drm_private {
struct drm_crtc *crtc[MAX_CRTC];
+#ifdef CONFIG_DRM_FBDEV_EMULATION
+   struct drm_fbdev_cma *fbdev;
+#endif
 };

 extern const struct kirin_dc_ops ade_dc_ops;
-- 
1.9.1



[PATCH v4 05/11] drm/hisilicon: Add vblank driver for ADE

2016-02-06 Thread Xinliang Liu
Add vblank irq handle.

v4: None.
v3:
- Remove hisi_get_crtc_from_index func.
- A few cleanup.
v2:
- Remove abtraction layer.

Signed-off-by: Xinliang Liu 
---
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 62 +
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 14 +-
 2 files changed, 75 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 
b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
index ff70f1c3dd78..2a12e14ea6ab 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
@@ -295,6 +295,59 @@ static void ade_set_medianoc_qos(struct ade_crtc *acrtc)
writel(val, reg);
 }

+static int ade_enable_vblank(struct drm_device *dev, unsigned int pipe)
+{
+   struct kirin_drm_private *priv = dev->dev_private;
+   struct ade_crtc *acrtc = to_ade_crtc(priv->crtc[pipe]);
+   struct ade_hw_ctx *ctx = acrtc->ctx;
+   void __iomem *base = ctx->base;
+
+   if (!ctx->power_on)
+   (void)ade_power_up(ctx);
+
+   ade_update_bits(base + LDI_INT_EN, FRAME_END_INT_EN_OFST,
+   MASK(1), 1);
+
+   return 0;
+}
+
+static void ade_disable_vblank(struct drm_device *dev, unsigned int pipe)
+{
+   struct kirin_drm_private *priv = dev->dev_private;
+   struct ade_crtc *acrtc = to_ade_crtc(priv->crtc[pipe]);
+   struct ade_hw_ctx *ctx = acrtc->ctx;
+   void __iomem *base = ctx->base;
+
+   if (!ctx->power_on) {
+   DRM_ERROR("power is down! vblank disable fail\n");
+   return;
+   }
+
+   ade_update_bits(base + LDI_INT_EN, FRAME_END_INT_EN_OFST,
+   MASK(1), 0);
+}
+
+static irqreturn_t ade_irq_handler(int irq, void *data)
+{
+   struct ade_crtc *acrtc = data;
+   struct ade_hw_ctx *ctx = acrtc->ctx;
+   struct drm_crtc *crtc = >base;
+   void __iomem *base = ctx->base;
+   u32 status;
+
+   status = readl(base + LDI_MSK_INT);
+   DRM_DEBUG_VBL("LDI IRQ: status=0x%X\n", status);
+
+   /* vblank irq */
+   if (status & BIT(FRAME_END_INT_EN_OFST)) {
+   ade_update_bits(base + LDI_INT_CLR, FRAME_END_INT_EN_OFST,
+   MASK(1), 1);
+   drm_crtc_handle_vblank(crtc);
+   }
+
+   return IRQ_HANDLED;
+}
+
 static void ade_display_enable(struct ade_crtc *acrtc)
 {
struct ade_hw_ctx *ctx = acrtc->ctx;
@@ -973,6 +1026,15 @@ int ade_drm_init(struct drm_device *dev)
if (ret)
return ret;

+   /* vblank irq init */
+   ret = devm_request_irq(dev->dev, ctx->irq, ade_irq_handler,
+  DRIVER_IRQ_SHARED, dev->driver->name, acrtc);
+   if (ret)
+   return ret;
+   dev->driver->get_vblank_counter = drm_vblank_no_hw_counter;
+   dev->driver->enable_vblank = ade_enable_vblank;
+   dev->driver->disable_vblank = ade_disable_vblank;
+
return 0;
 }

diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 
b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
index 055729c1889c..723888feb760 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
@@ -32,6 +32,7 @@ static int kirin_drm_kms_cleanup(struct drm_device *dev)
 {
struct kirin_drm_private *priv = dev->dev_private;

+   drm_vblank_cleanup(dev);
dc_ops->cleanup(dev);
drm_mode_config_cleanup(dev);
devm_kfree(dev->dev, priv);
@@ -85,11 +86,22 @@ static int kirin_drm_kms_init(struct drm_device *dev)
goto err_dc_cleanup;
}

+   /* vblank init */
+   ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
+   if (ret) {
+   DRM_ERROR("failed to initialize vblank.\n");
+   goto err_unbind_all;
+   }
+   /* with irq_enabled = true, we can use the vblank feature. */
+   dev->irq_enabled = true;
+
/* reset all the states of crtc/plane/encoder/connector */
drm_mode_config_reset(dev);

return 0;

+err_unbind_all:
+   component_unbind_all(dev->dev, dev);
 err_dc_cleanup:
dc_ops->cleanup(dev);
 err_mode_config_cleanup:
@@ -123,7 +135,7 @@ static int kirin_gem_cma_dumb_create(struct drm_file *file,

 static struct drm_driver kirin_drm_driver = {
.driver_features= DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME |
- DRIVER_ATOMIC,
+ DRIVER_ATOMIC | DRIVER_HAVE_IRQ,
.fops   = _drm_fops,
.set_busid  = drm_platform_set_busid,

-- 
1.9.1



[PATCH v4 04/11] drm/hisilicon: Add plane driver for ADE

2016-02-06 Thread Xinliang Liu
Add plane funcs and helper funcs for ADE.

v4: None.
v3:
- A few cleanup.
v2:
- Remove abtraction layer.

Signed-off-by: Xinliang Liu 
---
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 535 +++-
 1 file changed, 534 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c 
b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
index b45149616716..ff70f1c3dd78 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
@@ -24,13 +24,23 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 

 #include "kirin_drm_drv.h"
 #include "kirin_ade_reg.h"

+#define PRIMARY_CH ADE_CH1 /* primary plane */
+#define OUT_OVLY   ADE_OVLY2 /* output overlay compositor */
+#define ADE_DEBUG  1
+
 #define to_ade_crtc(crtc) \
container_of(crtc, struct ade_crtc, base)

+#define to_ade_plane(plane) \
+   container_of(plane, struct ade_plane, base)
+
 struct ade_hw_ctx {
void __iomem  *base;
void __iomem  *media_base;
@@ -49,11 +59,76 @@ struct ade_crtc {
u32 out_format;
 };

+struct ade_plane {
+   struct drm_plane base;
+   void *ctx;
+   u8 ch; /* channel */
+};
+
 struct ade_data {
struct ade_crtc acrtc;
+   struct ade_plane aplane[ADE_CH_NUM];
struct ade_hw_ctx ctx;
 };

+/* ade-format info: */
+struct ade_format {
+   u32 pixel_format;
+   enum ade_fb_format ade_format;
+};
+
+static const struct ade_format ade_formats[] = {
+   /* 16bpp RGB: */
+   { DRM_FORMAT_RGB565, ADE_RGB_565 },
+   { DRM_FORMAT_BGR565, ADE_BGR_565 },
+   /* 24bpp RGB: */
+   { DRM_FORMAT_RGB888, ADE_RGB_888 },
+   { DRM_FORMAT_BGR888, ADE_BGR_888 },
+   /* 32bpp [A]RGB: */
+   { DRM_FORMAT_XRGB, ADE_XRGB_ },
+   { DRM_FORMAT_XBGR, ADE_XBGR_ },
+   { DRM_FORMAT_RGBA, ADE_RGBA_ },
+   { DRM_FORMAT_BGRA, ADE_BGRA_ },
+   { DRM_FORMAT_ARGB, ADE_ARGB_ },
+   { DRM_FORMAT_ABGR, ADE_ABGR_ },
+};
+
+static const u32 channel_formats1[] = {
+   /* channel 1,2,3,4 */
+   DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
+   DRM_FORMAT_BGR888, DRM_FORMAT_XRGB, DRM_FORMAT_XBGR,
+   DRM_FORMAT_RGBA, DRM_FORMAT_BGRA, DRM_FORMAT_ARGB,
+   DRM_FORMAT_ABGR
+};
+
+u32 ade_get_channel_formats(u8 ch, const u32 **formats)
+{
+   switch (ch) {
+   case ADE_CH1:
+   *formats = channel_formats1;
+   return ARRAY_SIZE(channel_formats1);
+   default:
+   DRM_ERROR("no this channel %d\n", ch);
+   *formats = NULL;
+   return 0;
+   }
+}
+
+/* convert from fourcc format to ade format */
+static u32 ade_get_format(u32 pixel_format)
+{
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(ade_formats); i++)
+   if (ade_formats[i].pixel_format == pixel_format)
+   return ade_formats[i].ade_format;
+
+   /* not found */
+   DRM_ERROR("Not found pixel format!!fourcc_format= %d\n",
+ pixel_format);
+   return ADE_FORMAT_NOT_SUPPORT;
+}
+
 static void ade_update_reload_bit(void __iomem *base, u32 bit_num, u32 val)
 {
u32 bit_ofst, reg_num;
@@ -86,7 +161,7 @@ static void ade_init(struct ade_hw_ctx *ctx)
/* clear overlay */
writel(0, base + ADE_OVLY1_TRANS_CFG);
writel(0, base + ADE_OVLY_CTL);
-   writel(0, base + ADE_OVLYX_CTL(ADE_OVLY2));
+   writel(0, base + ADE_OVLYX_CTL(OUT_OVLY));
/* clear reset and reload regs */
writel(MASK(32), base + ADE_SOFT_RST_SEL(0));
writel(MASK(32), base + ADE_SOFT_RST_SEL(1));
@@ -144,6 +219,10 @@ static void ade_ldi_set_mode(struct ade_crtc *acrtc,
  mode->clock * 1000, ret);
adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000;

+   /* set overlay compositor output size */
+   writel(((width - 1) << OUTPUT_XSIZE_OFST) | (height - 1),
+  base + ADE_OVLY_OUTPUT_SIZE(OUT_OVLY));
+
/* ctran6 setting */
writel(CTRAN_BYPASS_ON, base + ADE_CTRAN_DIS(ADE_CTRAN6));
 /* the configured value is actual value - 1 */
@@ -222,6 +301,10 @@ static void ade_display_enable(struct ade_crtc *acrtc)
void __iomem *base = ctx->base;
u32 out_fmt = acrtc->out_format;

+   /* enable output overlay compositor */
+   writel(ADE_ENABLE, base + ADE_OVLYX_CTL(OUT_OVLY));
+   ade_update_reload_bit(base, OVLY_OFST + OUT_OVLY, 0);
+
/* display source setting */
writel(DISP_SRC_OVLY2, base + ADE_DISP_SRC_CFG);

@@ -235,6 +318,97 @@ static void ade_display_enable(struct ade_crtc *acrtc)
writel(DSI_PCLK_ON, base + LDI_HDMI_DSI_GT);
 }

+#if ADE_DEBUG
+static void ade_rdma_dump_regs(void __iomem *base, u32 ch)
+{
+   u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en;
+   u32 val;
+
+   

[PATCH v4 03/11] drm/hisilicon: Add crtc driver for ADE

2016-02-06 Thread Xinliang Liu
Add crtc funcs and helper funcs for ADE.

v4: None.
v3:
- Make ade as the master driver.
- Use port to connect with encoder.
- A few cleanup.
v2:
- Remove abtraction layer.

Signed-off-by: Xinliang Liu 
---
 drivers/gpu/drm/hisilicon/kirin/Makefile|   3 +-
 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h | 280 +++
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 458 
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c |  15 +
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h |   8 +
 5 files changed, 763 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

diff --git a/drivers/gpu/drm/hisilicon/kirin/Makefile 
b/drivers/gpu/drm/hisilicon/kirin/Makefile
index cb346de47d48..2a61ab006ddb 100644
--- a/drivers/gpu/drm/hisilicon/kirin/Makefile
+++ b/drivers/gpu/drm/hisilicon/kirin/Makefile
@@ -1,3 +1,4 @@
-kirin-drm-y := kirin_drm_drv.o
+kirin-drm-y := kirin_drm_drv.o \
+  kirin_drm_ade.o

 obj-$(CONFIG_DRM_HISI_KIRIN) += kirin-drm.o
diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h 
b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
new file mode 100644
index ..78020747abfe
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
@@ -0,0 +1,280 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ * Copyright (c) 2014-2016 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __KIRIN_ADE_REG_H__
+#define __KIRIN_ADE_REG_H__
+
+/*
+ * ADE Registers
+ */
+#define MASK(x)(BIT(x) - 1)
+
+#define ADE_CTRL   0x0004
+#define FRM_END_START_OFST 0
+#define FRM_END_START_MASK MASK(2)
+#define ADE_CTRL1  0x008C
+#define AUTO_CLK_GATE_EN_OFST  0
+#define AUTO_CLK_GATE_EN   BIT(0)
+#define ADE_ROT_SRC_CFG0x0010
+#define ADE_DISP_SRC_CFG   0x0018
+#define ADE_WDMA2_SRC_CFG  0x001C
+#define ADE_SEC_OVLY_SRC_CFG   0x0020
+#define ADE_WDMA3_SRC_CFG  0x0024
+#define ADE_OVLY1_TRANS_CFG0x002C
+#define ADE_EN 0x0100
+#define ADE_DISABLE0
+#define ADE_ENABLE 1
+#define INTR_MASK_CPU(x)   (0x0C10 + (x) * 0x4)
+#define ADE_FRM_DISGARD_CTRL   0x00A4
+/* reset and reload regs */
+#define ADE_SOFT_RST_SEL(x)(0x0078 + (x) * 0x4)
+#define ADE_RELOAD_DIS(x)  (0x00AC + (x) * 0x4)
+#define RDMA_OFST  0
+#define CLIP_OFST  15
+#define SCL_OFST   21
+#define CTRAN_OFST 24
+#define OVLY_OFST  37 /* 32+5 */
+/* channel regs */
+#define RD_CH_PE(x)(0x1000 + (x) * 0x80)
+#define RD_CH_CTRL(x)  (0x1004 + (x) * 0x80)
+#define RD_CH_ADDR(x)  (0x1008 + (x) * 0x80)
+#define RD_CH_SIZE(x)  (0x100C + (x) * 0x80)
+#define RD_CH_STRIDE(x)(0x1010 + (x) * 0x80)
+#define RD_CH_SPACE(x) (0x1014 + (x) * 0x80)
+#define RD_CH_PARTIAL_SIZE(x)  (0x1018 + (x) * 0x80)
+#define RD_CH_PARTIAL_SPACE(x) (0x101C + (x) * 0x80)
+#define RD_CH_EN(x)(0x1020 + (x) * 0x80)
+#define RD_CH_STATUS(x)(0x1024 + (x) * 0x80)
+#define RD_CH_DISP_CTRL0x1404
+#define RD_CH_DISP_ADDR0x1408
+#define RD_CH_DISP_SIZE0x140C
+#define RD_CH_DISP_STRIDE  0x1410
+#define RD_CH_DISP_SPACE   0x1414
+#define RD_CH_DISP_EN  0x142C
+/* clip regs */
+#define ADE_CLIP_DISABLE(x)(0x6800 + (x) * 0x100)
+#define ADE_CLIP_SIZE0(x)  (0x6804 + (x) * 0x100)
+#define ADE_CLIP_SIZE1(x)  (0x6808 + (x) * 0x100)
+#define ADE_CLIP_SIZE2(x)  (0x680C + (x) * 0x100)
+#define ADE_CLIP_CFG_OK(x) (0x6810 + (x) * 0x100)
+/* scale regs */
+#define ADE_SCL1_MUX_CFG   0x000C
+#define ADE_SCL2_SRC_CFG   0x0014
+#define ADE_SCL3_MUX_CFG   0x0008
+#define ADE_SCL_CTRL(x)(0x3000 + (x) * 0x800)
+#define ADE_SCL_HSP(x) (0x3004 + (x) * 0x800)
+#define ADE_SCL_UV_HSP(x)  (0x3008 + (x) * 0x800)
+#define ADE_SCL_VSP(x) (0x300C + (x) * 0x800)
+#define ADE_SCL_UV_VSP(x)  (0x3010 + (x) * 0x800)
+#define ADE_SCL_ORES(x)(0x3014 + (x) * 0x800)
+#define ADE_SCL_IRES(x)(0x3018 + (x) * 0x800)
+#define ADE_SCL_START(x)   (0x301C + (x) * 0x800)
+#define ADE_SCL_ERR(x)   

[PATCH v4 02/11] drm/hisilicon: Add hisilicon kirin drm master driver

2016-02-06 Thread Xinliang Liu
Add kirin DRM master driver for hi6220 SoC which used in HiKey board.
Add dumb buffer feature.
Add prime dmabuf feature.

v4: None.
v3:
- Move and rename all the files to kirin sub-directory.
  So that we could separate different seires SoCs' driver.
- Replace drm_platform_init, load, unload implementation.
v2:
- Remove abtraction layer.

Signed-off-by: Xinwei Kong 
Signed-off-by: Xinliang Liu 
---
 drivers/gpu/drm/Kconfig |   2 +
 drivers/gpu/drm/Makefile|   1 +
 drivers/gpu/drm/hisilicon/Kconfig   |   5 +
 drivers/gpu/drm/hisilicon/Makefile  |   5 +
 drivers/gpu/drm/hisilicon/kirin/Kconfig |   9 +
 drivers/gpu/drm/hisilicon/kirin/Makefile|   3 +
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 321 
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h |  20 ++
 8 files changed, 366 insertions(+)
 create mode 100644 drivers/gpu/drm/hisilicon/Kconfig
 create mode 100644 drivers/gpu/drm/hisilicon/Makefile
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/Kconfig
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/Makefile
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index b50ae60f5f50..f5c5656e2547 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -277,3 +277,5 @@ source "drivers/gpu/drm/imx/Kconfig"
 source "drivers/gpu/drm/vc4/Kconfig"

 source "drivers/gpu/drm/etnaviv/Kconfig"
+
+source "drivers/gpu/drm/hisilicon/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 61766dec6a8d..60554832079c 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -74,3 +74,4 @@ obj-y += panel/
 obj-y  += bridge/
 obj-$(CONFIG_DRM_FSL_DCU) += fsl-dcu/
 obj-$(CONFIG_DRM_ETNAVIV) += etnaviv/
+obj-y  += hisilicon/
diff --git a/drivers/gpu/drm/hisilicon/Kconfig 
b/drivers/gpu/drm/hisilicon/Kconfig
new file mode 100644
index ..558c61b1b8e8
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Kconfig
@@ -0,0 +1,5 @@
+#
+# hisilicon drm device configuration.
+# Please keep this list sorted alphabetically
+
+source "drivers/gpu/drm/hisilicon/kirin/Kconfig"
diff --git a/drivers/gpu/drm/hisilicon/Makefile 
b/drivers/gpu/drm/hisilicon/Makefile
new file mode 100644
index ..e3f6d493c996
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for hisilicon drm drivers.
+# Please keep this list sorted alphabetically
+
+obj-$(CONFIG_DRM_HISI_KIRIN) += kirin/
diff --git a/drivers/gpu/drm/hisilicon/kirin/Kconfig 
b/drivers/gpu/drm/hisilicon/kirin/Kconfig
new file mode 100644
index ..3ac4b8edeac1
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/kirin/Kconfig
@@ -0,0 +1,9 @@
+config DRM_HISI_KIRIN
+   tristate "DRM Support for Hisilicon Kirin series SoCs Platform"
+   depends on DRM
+   select DRM_KMS_HELPER
+   select DRM_GEM_CMA_HELPER
+   select DRM_KMS_CMA_HELPER
+   help
+ Choose this option if you have a hisilicon Kirin chipsets(hi6220).
+ If M is selected the module will be called kirin-drm.
diff --git a/drivers/gpu/drm/hisilicon/kirin/Makefile 
b/drivers/gpu/drm/hisilicon/kirin/Makefile
new file mode 100644
index ..cb346de47d48
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/kirin/Makefile
@@ -0,0 +1,3 @@
+kirin-drm-y := kirin_drm_drv.o
+
+obj-$(CONFIG_DRM_HISI_KIRIN) += kirin-drm.o
diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 
b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
new file mode 100644
index ..789ebd1f5922
--- /dev/null
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
@@ -0,0 +1,321 @@
+/*
+ * Hisilicon Kirin SoCs drm master driver
+ *
+ * Copyright (c) 2016 Linaro Limited.
+ * Copyright (c) 2014-2016 Hisilicon Limited.
+ *
+ * Author:
+ * Xinliang Liu 
+ * Xinliang Liu 
+ * Xinwei Kong 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "kirin_drm_drv.h"
+
+static struct kirin_dc_ops *dc_ops;
+
+static int kirin_drm_kms_cleanup(struct drm_device *dev)
+{
+   dc_ops->cleanup(dev);
+   drm_mode_config_cleanup(dev);
+
+   return 0;
+}
+
+static const struct drm_mode_config_funcs kirin_drm_mode_config_funcs = {
+   .fb_create = drm_fb_cma_create,
+   .atomic_check = drm_atomic_helper_check,
+   .atomic_commit = drm_atomic_helper_commit,
+};
+
+static void kirin_drm_mode_config_init(struct drm_device *dev)
+{
+   dev->mode_config.min_width = 0;
+   dev->mode_config.min_height = 0;
+
+   dev->mode_config.max_width = 2048;
+   

[PATCH v4 01/11] drm/hisilicon: Add device tree binding for hi6220 display subsystem

2016-02-06 Thread Xinliang Liu
Add ADE display controller binding doc.
Add DesignWare DSI Host Controller v1.20a binding doc.

v4:
- Describe more specific of clocks and ports.
- Fix indentation.
v3:
- Make ade as the drm master node.
- Use assigned-clocks to set clock rate.
- Use ports to connect display relavant nodes.
v2:
- Move dt binding docs to bindings/display/hisilicon directory.

Signed-off-by: Xinwei Kong 
Signed-off-by: Xinliang Liu 
---
 .../bindings/display/hisilicon/dw-dsi.txt  | 77 ++
 .../bindings/display/hisilicon/hisi-ade.txt| 69 +++
 2 files changed, 146 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
 create mode 100644 
Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt

diff --git a/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt 
b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
new file mode 100644
index ..af6d702f3282
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
@@ -0,0 +1,77 @@
+Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
+
+A DSI Host Controller resides in the middle of display controller and external
+HDMI converter.
+
+Required properties:
+- compatible: value should be "hisilicon,hi6220-dsi".
+- reg: physical base address and length of dsi controller's registers.
+- clocks: the clocks needed.
+- clock-names: the name of the clocks.
+- ports: contains DSI controller input and output sub port.
+  The input port connects to ADE output port with the reg value "0".
+  The output port with the reg value "1", it could connect to panel or
+  any other bridge endpoints. And the reg value for bridge endpoint is "0",
+  other values for panel endpoint.
+  See Documentation/devicetree/bindings/graph.txt for more device graph info.
+
+A example of HiKey board hi6220 SoC and board specific DT entry:
+Example:
+
+SoC specific:
+   dsi: dsi at f4107800 {
+   compatible = "hisilicon,hi6220-dsi";
+   reg = <0x0 0xf4107800 0x0 0x100>;
+   clocks = <_ctrl  HI6220_DSI_PCLK>;
+   clock-names = "pclk_dsi";
+   status = "disabled";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   /* 0 for input port */
+   port at 0 {
+   reg = <0>;
+   dsi_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+   };
+   };
+
+
+Board specific:
+{
+   status = "ok";
+
+   ports {
+   /* 1 for output port */
+   port at 1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <1>;
+
+   /* 0 for bridge, other value for panel */
+   dsi_out0: endpoint at 0 {
+   reg = <0>;
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+   };
+
+{
+   ...
+
+   adv7533: adv7533 at 39 {
+   ...
+
+   port {
+   adv7533_in: endpoint {
+   remote-endpoint = <_out0>;
+   };
+   };
+   };
+   };
+
diff --git a/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt 
b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
new file mode 100644
index ..1eff5a41b98d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
@@ -0,0 +1,69 @@
+Device-Tree bindings for hisilicon ADE display controller driver
+
+ADE (Advanced Display Engine) is the display controller which grab image
+data from memory, do composition, do post image processing, generate RGB
+timing stream and transfer to DSI.
+
+Required properties:
+- compatible: value should be "hisilicon,hi6220-ade".
+- reg: physical base address and length of the controller's registers.
+  Three reg ranges are used in ADE driver:
+  ADE reg range, value should be "<0x0 0xf410 0x0 0x7800>";
+  media subsystem reg range, value should be "<0x0 0xf441 0x0 0x1000>";
+  media subsystem NOC QoS reg range, value should be "<0x0 0xf452 0x0
+  0x1000>".
+- reg-names: name of physical base.Valuse should be "ade_base",
"media_base"
+  and "media_noc_base".
+- interrupt: the ldi vblank interrupt number used.
+- clocks: the clocks needed. Three clocks are used in ADE driver:
+  ADE core clock, value should be "<_ctrl HI6220_ADE_CORE>";
+  ADE pixel clok, value should 

[PATCH v4 00/11] Add DRM Driver for HiSilicon Kirin hi6220 SoC

2016-02-06 Thread Xinliang Liu
This patch set adds a new drm driver for HiSilicon Kirin hi6220 SoC.
Current testing and support board is Hikey board which is one of Linaro
96boards. It is an arm64 open source board. For more information about
this board, please access https://www.96boards.org.

Hardware Detail
---
  The display subsystem of Hi6220 SoC is shown as bellow:
 +-+   +--+ +-+ +-+
 | |   |  | | | | | 
 | FB  |-->|   ADE|>| DSI |>|   External  |
 | |   |  | | | |  HDMI/panel |
 +-+   +--+ +-+ +-+

- ADE(Advanced Display Engine) is the display controller. It contains 7
channels, 3 overlay compositors and a LDI.
  - A channel looks like: DMA-->clip-->scale-->ctrans(or called csc).
  - Overlay compositor is response to compose planes which come from 7
  channels and pass composed image to LDI.
  - LDI is response to generate timings and RGB data stream.
- DSI converts the RGB data stream from ADE to DSI packets.
- External HDMI/panel module is connected with DSI bus. Now Hikey use a
  ADI's ADV7533 external HDMI chip.

Change History
-
Changes in v4:
- Describe more specific of clocks and ports of binding docs.
- Fix indentation of binding docs.

Changes in v3:
- Move and rename all the files to kirin sub-directory.
  So that we could separate different seires SoCs' driver.
- Make ade as the drm master node.
- Replace drm_platform_init, load, unload implementation.
- Use assigned-clocks to set clock rate.
- Use ports to connect display relavant nodes.
- Rename hisi_drm_dsi.c to dw_drm_dsi.c
- Make encoder type as DRM_MODE_ENCODER_DSI.
- A few cleanup on regs and code.

Changes in v2:
- Remove abtraction layer of plane/crtc/encoder/connector.
- Refactor atomic implementation according to Daniel Vetter's guides:
http://blog.ffwll.ch/2014/11/atomic-modeset-support-for-kms-drivers.html
http://blog.ffwll.ch/2015/09/xdc-2015-atomic-modesetting-for-drivers.html
http://blog.ffwll.ch/2015/08/atomic-modesetting-design-overview.html
- Use bridge instead of slave encoder to connect external HDMI.
- Move dt binding docs to bindings/display/hisilicon directory. 

Xinliang Liu (11):
  drm/hisilicon: Add device tree binding for hi6220 display subsystem
  drm/hisilicon: Add hisilicon kirin drm master driver
  drm/hisilicon: Add crtc driver for ADE
  drm/hisilicon: Add plane driver for ADE
  drm/hisilicon: Add vblank driver for ADE
  drm/hisilicon: Add cma fbdev and hotplug
  drm/hisilicon: Add designware dsi encoder driver
  drm/hisilicon: Add designware dsi host driver
  drm/hisilicon: Add support for external bridge
  MAINTAINERS: Add maintainer for hisilicon DRM driver
  arm64: dts: hisilicon: Add display subsystem DT nodes for hi6220

 .../bindings/display/hisilicon/dw-dsi.txt  |   77 ++
 .../bindings/display/hisilicon/hisi-ade.txt|   69 ++
 MAINTAINERS|   10 +
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts |   44 +
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi  |   53 +
 drivers/gpu/drm/Kconfig|2 +
 drivers/gpu/drm/Makefile   |1 +
 drivers/gpu/drm/hisilicon/Kconfig  |5 +
 drivers/gpu/drm/hisilicon/Makefile |5 +
 drivers/gpu/drm/hisilicon/kirin/Kconfig|   10 +
 drivers/gpu/drm/hisilicon/kirin/Makefile   |5 +
 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c   |  845 
 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h   |   83 ++
 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h|  280 ++
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c| 1053 
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c|  382 +++
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h|   31 +
 17 files changed, 2955 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/hisilicon/dw-dsi.txt
 create mode 100644 
Documentation/devicetree/bindings/display/hisilicon/hisi-ade.txt
 create mode 100644 drivers/gpu/drm/hisilicon/Kconfig
 create mode 100644 drivers/gpu/drm/hisilicon/Makefile
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/Kconfig
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/Makefile
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/dw_dsi_reg.h
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c
 create mode 100644 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.h

-- 
1.9.1



[PATCH v4 1/2] clk: sunxi: Add sun6i/8i video support

2016-02-06 Thread Jean-Francois Moine
On Fri, 5 Feb 2016 10:39:15 +0100
Maxime Ripard  wrote:

> > +CLK_OF_DECLARE(sun6i_display, "allwinner,sun6i-display-clk", 
> > sun6i_display_setup);
> 
> Please use the display driver from my DRM serie, it covers everything
> you need here.

If you give me a pointer, I will have a look.

> > +CLK_OF_DECLARE(sun6i_pll3, "allwinner,sun6i-pll3-clk", sun6i_pll3_setup);
> 
> And please use the clk-factors code here.

I don't see how I can get direct 297MHz and 270MHz in fractional mode
with that code.

-- 
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef |   http://moinejf.free.fr/



[Bug 93217] [tonga] [powerplay] Radon M395X isn't initialised with the powerplay branch

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=93217

--- Comment #29 from Mike Lothian  ---
Would you like me to try re-enabling pcie dpm and use the new kernel parameters
in drm-next-4.6-wip?

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[Bug 93424] [amdgpu] [powerplay] [runpm] Card doesn't re-init when using powerplay and runpm

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=93424

Mike Lothian  changed:

   What|Removed |Added

 CC||mike at fireburn.co.uk

--- Comment #1 from Mike Lothian  ---
The card now re-inits with

However when power_dpm_force_performance_level is at auto the speeds don't ramp
up

When I was in bioshock everything was at it's lowest levels and I was getting
about 3fps, when I echo'd high into power_dpm_force_performance_level I went
back to 17fps, when I echo'd auto back into power_dpm_force_performance_level
the fps stayed high

When I leave the game and relaunch (so the card is re-initialised with runpm)
it goes back to 3fps  

This is with the latest code in drm-next-4.6-wip - pcie dpm is still disabled

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[Bug 94019] [bisected] 3D acceleration broken with gallium/radeon: just get num_tile_pipes from the winsys

2016-02-06 Thread bugzilla-dae...@freedesktop.org
https://bugs.freedesktop.org/show_bug.cgi?id=94019

Bug ID: 94019
   Summary: [bisected] 3D acceleration broken with gallium/radeon:
just get num_tile_pipes from the winsys
   Product: Mesa
   Version: git
  Hardware: Other
OS: Linux (All)
Status: NEW
  Severity: major
  Priority: medium
 Component: Drivers/Gallium/radeonsi
  Assignee: dri-devel at lists.freedesktop.org
  Reporter: commendsarnex at gmail.com
QA Contact: dri-devel at lists.freedesktop.org

Created attachment 121545
  --> https://bugs.freedesktop.org/attachment.cgi?id=121545=edit
backtrace

Hi guys,

If I have commit 'gallium/radeon: just get num_tile_pipes from the winsys',
everything I try to run gives me
/var/tmp/portage/media-libs/mesa-/work/mesa-/src/gallium/drivers/radeon/r600_texture.c:562:
r600_texture_get_htile_size: Assertion `0' failed.


I've attached a gdb backtrace of the assert. I'm on a HD 7950 TAHITI.

Let me know if you need anything,

sarnex

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[git pull] drm fixes

2016-02-06 Thread Dave Airlie

Hi Linus,

Fixes all over the place:

amdkfd: two static checker fixes
mst: a bunch of static checker and spec/hw interaction fixes
amdgpu: fix Iceland hw properly, and some fiji bugs, along with
some write-combining fixes.
exynos: some regression fixes
adv7511: fix some EDID reading issues.

Dave.

The following changes since commit 36f90b0a2ddd60823fe193a85e60ff1906c2a9b3:

  Linux 4.5-rc2 (2016-01-31 18:12:16 -0800)

are available in the git repository at:

  git://people.freedesktop.org/~airlied/linux drm-fixes

for you to fetch changes up to 6739b3d7bc18a5373efd863b11831e8f515fffe1:

  Merge branch 'drm-fixes-mst' of git://people.freedesktop.org/~airlied/linux 
into drm-fixes (2016-02-05 15:24:17 +1000)


Alex Deucher (10):
  drm/amdgpu: no need to load MC firmware on fiji
  drm/amdgpu/gfx8: enable cp inst/reg error interrupts
  drm/amdgpu/gfx7: enable cp inst/reg error interrupts
  drm/amdgpu: move gmc7 support out of CIK dependency
  drm/amdgpu: pull topaz gmc bits into gmc_v7
  drm/amdgpu: drop topaz support from gmc8 module
  drm/amdgpu: don't load MEC2 on topaz
  drm/amdgpu: load MEC ucode manually on iceland
  drm/amdgpu: remove exp hardware support from iceland
  drm/amdgpu: disable uvd and vce clockgating on Fiji

Amitoj Kaur Chawla (1):
  drm/amdkfd: Remove unnecessary cast in kfree

Andreas Ziegler (1):
  drm/i915: Remove select to deleted STOP_MACHINE from Kconfig

Andrey Grodzovsky (1):
  drm/dp/mst: Reverse order of MST enable and clearing VC payload table.

Arnd Bergmann (2):
  drm/exynos: fix building without CONFIG_PM_SLEEP
  drm: exynos: make PM functions as __maybe_unused

Colin Ian King (1):
  drm/amdgpu: fix non-ANSI declaration of 
amdgpu_amdkfd_gfx_*_get_functions()

Dave Airlie (7):
  drm: add helper to check for wc memory support
  Merge tag 'drm-intel-fixes-2016-02-04' of 
git://anongit.freedesktop.org/drm-intel into drm-fixes
  Merge branch 'drm/adv7511' of git://git.kernel.org/.../wsa/linux into 
drm-fixes
  Merge branch 'exynos-drm-fixes' of 
git://git.kernel.org:/.../daeinki/drm-exynos into drm-fixes
  Merge tag 'drm-amdkfd-fixes-2016-01-28' of 
git://people.freedesktop.org/~gabbayo/linux into drm-fixes
  Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux 
into drm-fixes
  Merge branch 'drm-fixes-mst' of 
git://people.freedesktop.org/~airlied/linux into drm-fixes

Francisco Jerez (1):
  drm/i915: Make sure DC writes are coherent on flush.

Gerd Hoffmann (1):
  drm/i915: refine qemu south bridge detection

Harry Wentland (2):
  drm: Add drm_fixp_from_fraction and drm_fixp2int_ceil
  drm/dp/mst: Calculate MST PBN with 31.32 fixed point

Hersen Wu (1):
  drm/dp/mst: move GUID storage from mgr, port to only mst branch

Imre Deak (2):
  drm/mst: Don't ignore the MST PBN self-test result
  drm/mst: Add range check for max_payloads during init

Insu Yun (1):
  drm: fix missing reference counting decrease

Jani Nikula (1):
  drm/i915/dp: fall back to 18 bpp when sink capability is unknown

Javier Martinez Canillas (1):
  drm/exynos: dp: Fix panel and bridge lookup logic

Ken Wang (2):
  drm/amdgpu: iceland use CI based MC IP
  drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above

Mykola Lysenko (2):
  drm/dp/mst: change MST detection scheme
  drm/dp/mst: deallocate payload on port destruction

Oded Gabbay (2):
  drm/radeon: mask out WC from BO on unsupported arches
  drm/amdgpu: mask out WC from BO on unsupported arches

Ville Syrjälä (2):
  drm/i915: Don't reject primary plane windowing with color keying enabled 
on SKL+
  drm/i915: Fix NULL plane->fb oops on SKL

Wolfram Sang (3):
  drm: adv7511: really enable interrupts for EDID detection
  drm: adv7511: mark ADV7511_REG_EDID_READ_CTRL volatile
  drm: adv7511: it's HPD, not HDP

 drivers/gpu/drm/amd/amdgpu/Makefile   |   3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c   |  10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c|   8 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c   |   2 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c |  20 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c |  28 ++-
 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c |  43 +++-
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c |  30 +--
 drivers/gpu/drm/amd/amdgpu/iceland_smc.c  |  12 +-
 drivers/gpu/drm/amd/amdgpu/vi.c   |  10 +-
 drivers/gpu/drm/amd/amdkfd/kfd_process.c  |   2 +-
 drivers/gpu/drm/drm_dp_mst_topology.c | 279 ++
 drivers/gpu/drm/exynos/exynos_dp_core.c   |  55 ++---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c   |   6 +-