Re: [Nouveau] [RFC PATCH 0/3] drm/nouveau/dispnv04 overlay and primary fb format fixes
On 05/20/2017 12:57 PM, Ilia Mirkin wrote: This came out of some debugging I was doing to figure out how BE mode works on this hardware. Among other things, it came out that we're not exposing 16-bpp mode support and that the ARGB mode that we do expose is broken. Also the overlay logic was pretty broken, I must have only tested with very "normal" overlay buffer sizes with modetest before. That said, this code has only received literal testing on a NV34/G5 PPC combo. I was poking at various registers on a NV34/x86 to make modetest display the correct data though. That's where e.g. the pitch mask comes from. I haven't at all tested on my NV05 or NV1x hardware. Should probably do that before we push this out. But since I've already been sitting on these patches for a few weeks, thought I'd get them out there. The patches look fine to me, but I can wait to merge them until you've tested the older HW if you prefer. Ben. Ilia Mirkin (3): drm/nouveau/overlay: improve error detection, fix pitch setting drm/nouveau/overlay: add NV21 support drm/nouveau/dispnv04: fix exposed format list drivers/gpu/drm/nouveau/dispnv04/crtc.c| 36 +++- drivers/gpu/drm/nouveau/dispnv04/overlay.c | 89 +++--- 2 files changed, 93 insertions(+), 32 deletions(-) ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[RFC PATCH 3/3] drm/nouveau/dispnv04: fix exposed format list
drm_crtc_init exposes the XRGB and ARGB formats. In actuality,
ARGB's 32-bit depth messes up some formulas that weren't meant for
it, and the alpha is failry meaningless for the primary plane.
The modesetting logic appears to be fully prepared for RGB565 as well as
XRGB1555 however, as tested with modetest.
Signed-off-by: Ilia Mirkin
---
drivers/gpu/drm/nouveau/dispnv04/crtc.c | 36 -
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
index 4b4b0b496262..c078811b4e11 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
@@ -1099,6 +1099,38 @@ static const struct drm_crtc_helper_funcs
nv04_crtc_helper_funcs = {
.disable = nv_crtc_disable,
};
+static const uint32_t modeset_formats[] = {
+DRM_FORMAT_XRGB,
+DRM_FORMAT_RGB565,
+DRM_FORMAT_XRGB1555,
+};
+
+static struct drm_plane *
+create_primary_plane(struct drm_device *dev)
+{
+struct drm_plane *primary;
+int ret;
+
+primary = kzalloc(sizeof(*primary), GFP_KERNEL);
+if (primary == NULL) {
+DRM_DEBUG_KMS("Failed to allocate primary plane\n");
+return NULL;
+}
+
+/* possible_crtc's will be filled in later by crtc_init */
+ret = drm_universal_plane_init(dev, primary, 0,
+ &drm_primary_helper_funcs,
+ modeset_formats,
+ ARRAY_SIZE(modeset_formats),
+ DRM_PLANE_TYPE_PRIMARY, NULL);
+if (ret) {
+kfree(primary);
+primary = NULL;
+}
+
+return primary;
+}
+
int
nv04_crtc_create(struct drm_device *dev, int crtc_num)
{
@@ -1122,7 +1154,9 @@ nv04_crtc_create(struct drm_device *dev, int crtc_num)
nv_crtc->save = nv_crtc_save;
nv_crtc->restore = nv_crtc_restore;
- drm_crtc_init(dev, &nv_crtc->base, &nv04_crtc_funcs);
+ drm_crtc_init_with_planes(dev, &nv_crtc->base,
+ create_primary_plane(dev), NULL,
+ &nv04_crtc_funcs, NULL);
drm_crtc_helper_add(&nv_crtc->base, &nv04_crtc_helper_funcs);
drm_mode_crtc_set_gamma_size(&nv_crtc->base, 256);
--
2.13.0
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[RFC PATCH 0/3] drm/nouveau/dispnv04 overlay and primary fb format fixes
This came out of some debugging I was doing to figure out how BE mode works on this hardware. Among other things, it came out that we're not exposing 16-bpp mode support and that the ARGB mode that we do expose is broken. Also the overlay logic was pretty broken, I must have only tested with very "normal" overlay buffer sizes with modetest before. That said, this code has only received literal testing on a NV34/G5 PPC combo. I was poking at various registers on a NV34/x86 to make modetest display the correct data though. That's where e.g. the pitch mask comes from. I haven't at all tested on my NV05 or NV1x hardware. Should probably do that before we push this out. But since I've already been sitting on these patches for a few weeks, thought I'd get them out there. Ilia Mirkin (3): drm/nouveau/overlay: improve error detection, fix pitch setting drm/nouveau/overlay: add NV21 support drm/nouveau/dispnv04: fix exposed format list drivers/gpu/drm/nouveau/dispnv04/crtc.c| 36 +++- drivers/gpu/drm/nouveau/dispnv04/overlay.c | 89 +++--- 2 files changed, 93 insertions(+), 32 deletions(-) -- 2.13.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[RFC PATCH 2/3] drm/nouveau/overlay: add NV21 support
Signed-off-by: Ilia Mirkin
---
drivers/gpu/drm/nouveau/dispnv04/overlay.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
index ee7df9ef2695..96354a5ff21c 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
@@ -63,6 +63,7 @@ static uint32_t formats[] = {
DRM_FORMAT_YUYV,
DRM_FORMAT_UYVY,
DRM_FORMAT_NV12,
+ DRM_FORMAT_NV21,
};
/* Sine can be approximated with
@@ -177,16 +178,18 @@ nv10_update_plane(struct drm_plane *plane, struct
drm_crtc *crtc,
nvif_wr32(dev, NV_PVIDEO_POINT_OUT(flip), crtc_y << 16 | crtc_x);
nvif_wr32(dev, NV_PVIDEO_SIZE_OUT(flip), crtc_h << 16 | crtc_w);
- if (fb->format->format != DRM_FORMAT_UYVY)
+ if (fb->format->format == DRM_FORMAT_YUYV ||
+ fb->format->format == DRM_FORMAT_NV12)
format |= NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8;
- if (fb->format->format == DRM_FORMAT_NV12)
+ if (fb->format->format == DRM_FORMAT_NV12 ||
+ fb->format->format == DRM_FORMAT_NV21)
format |= NV_PVIDEO_FORMAT_PLANAR;
if (nv_plane->iturbt_709)
format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709;
if (nv_plane->colorkey & (1 << 24))
format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY;
- if (fb->format->format == DRM_FORMAT_NV12) {
+ if (format & NV_PVIDEO_FORMAT_PLANAR) {
nvif_wr32(dev, NV_PVIDEO_UVPLANE_BASE(flip), 0);
nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip),
nv_fb->nvbo->bo.offset + fb->offsets[1]);
--
2.13.0
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[RFC PATCH 1/3] drm/nouveau/overlay: improve error detection, fix pitch setting
We were previously setting the pitch based on a perfectly packed buffer.
This does not necessarily happen. Either modetest started generating
such buffers recently, or earlier testing only happened with well-picked
overlay sizes.
While we're at it, beef up and refactor the error state detection.
Signed-off-by: Ilia Mirkin
---
drivers/gpu/drm/nouveau/dispnv04/overlay.c | 80 +++---
1 file changed, 52 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
index e54944d23268..ee7df9ef2695 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
@@ -90,6 +90,42 @@ cos_mul(int degrees, int factor)
}
static int
+verify_fb(const struct drm_framebuffer *fb, uint32_t src_w, uint32_t src_h,
+ uint32_t crtc_w, uint32_t crtc_h, bool scale_fail, bool offset_fail)
+{
+ if (fb->pitches[0] & 0x3f) {
+ DRM_DEBUG_KMS("Unsuitable framebuffer for plane: align 64:
0x%x\n",
+ fb->pitches[0]);
+ return -EINVAL;
+ }
+
+ if (fb->pitches[0] >= 0x1) {
+ DRM_DEBUG_KMS("Unsuitable framebuffer for plane: pitch 0x%x >=
0x1\n",
+ fb->pitches[0]);
+ return -EINVAL;
+ }
+
+ if (fb->pitches[1] && fb->pitches[0] != fb->pitches[1]) {
+ DRM_DEBUG_KMS("Unsuitable framebuffer for plane: diff pitches:
0x%x != 0x%x\n",
+ fb->pitches[0], fb->pitches[1]);
+ return -ERANGE;
+ }
+
+ if (scale_fail) {
+ DRM_DEBUG_KMS("Unsuitable framebuffer scaling: %dx%d ->
%dx%d\n",
+ src_w, src_h, crtc_w, crtc_h);
+ return -ERANGE;
+ }
+
+ if (offset_fail) {
+ DRM_DEBUG_KMS("Unsuitable framebuffer offset\n");
+ return -ERANGE;
+ }
+
+ return 0;
+}
+
+static int
nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
struct drm_framebuffer *fb, int crtc_x, int crtc_y,
unsigned int crtc_w, unsigned int crtc_h,
@@ -107,7 +143,9 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc
*crtc,
bool flip = nv_plane->flip;
int soff = NV_PCRTC0_SIZE * nv_crtc->index;
int soff2 = NV_PCRTC0_SIZE * !nv_crtc->index;
- int format, ret;
+ unsigned shift = drm->client.device.info.chipset >= 0x30 ? 1 : 3;
+ unsigned format = 0;
+ int ret;
/* Source parameters given in 16.16 fixed point, ignore fractional. */
src_x >>= 16;
@@ -115,18 +153,11 @@ nv10_update_plane(struct drm_plane *plane, struct
drm_crtc *crtc,
src_w >>= 16;
src_h >>= 16;
- format = ALIGN(src_w * 4, 0x100);
-
- if (format > 0x)
- return -ERANGE;
-
- if (drm->client.device.info.chipset >= 0x30) {
- if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1))
- return -ERANGE;
- } else {
- if (crtc_w < (src_w >> 3) || crtc_h < (src_h >> 3))
- return -ERANGE;
- }
+ ret = verify_fb(fb, src_w, src_h, crtc_w, crtc_h,
+ crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift),
+ false);
+ if (ret)
+ return ret;
ret = nouveau_bo_pin(nv_fb->nvbo, TTM_PL_FLAG_VRAM, false);
if (ret)
@@ -160,7 +191,7 @@ nv10_update_plane(struct drm_plane *plane, struct drm_crtc
*crtc,
nvif_wr32(dev, NV_PVIDEO_UVPLANE_OFFSET_BUFF(flip),
nv_fb->nvbo->bo.offset + fb->offsets[1]);
}
- nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format);
+ nvif_wr32(dev, NV_PVIDEO_FORMAT(flip), format | fb->pitches[0]);
nvif_wr32(dev, NV_PVIDEO_STOP, 0);
/* TODO: wait for vblank? */
nvif_wr32(dev, NV_PVIDEO_BUFFER, flip ? 0x10 : 0x1);
@@ -357,7 +388,7 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc
*crtc,
struct nouveau_bo *cur = nv_plane->cur;
uint32_t overlay = 1;
int brightness = (nv_plane->brightness - 512) * 62 / 512;
- int pitch, ret, i;
+ int ret, i;
/* Source parameters given in 16.16 fixed point, ignore fractional. */
src_x >>= 16;
@@ -365,17 +396,9 @@ nv04_update_plane(struct drm_plane *plane, struct drm_crtc
*crtc,
src_w >>= 16;
src_h >>= 16;
- pitch = ALIGN(src_w * 4, 0x100);
-
- if (pitch > 0x)
- return -ERANGE;
-
- /* TODO: Compute an offset? Not sure how to do this for YUYV. */
- if (src_x != 0 || src_y != 0)
- return -ERANGE;
-
- if (crtc_w < src_w || crtc_h < src_h)
- return -ERANGE;
+ ret = verify_fb(fb, src_w, src_h, crtc_w, crtc_h,
+ crtc_w < src_w || crtc_h < src_h,
Re: [linux-sunxi] Re: [RFC PATCH 10/11] ARM: sun8i: h3: add display engine pipeline for TVE
于 2017年5月20日 GMT+08:00 上午2:06:16, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:53AM +0800, Icenowy Zheng wrote:
>> As we have already the support for the TV encoder on Allwinner H3,
>add
>> the display engine pipeline device tree nodes to its DTSI file.
>>
>> The H5 pipeline has some differences and will be enabled later.
>>
>> The currently-unused mixer0 and tcon0 are also needed, for the
>> completement of the pipeline.
>>
>> Signed-off-by: Icenowy Zheng
>> ---
>> arch/arm/boot/dts/sun8i-h3.dtsi | 189
>
>> 1 file changed, 189 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi
>b/arch/arm/boot/dts/sun8i-h3.dtsi
>> index b36f9f423c39..20172ef92415 100644
>> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
>> @@ -41,6 +41,8 @@
>> */
>>
>> #include "sunxi-h3-h5.dtsi"
>> +#include
>> +#include
>>
>> / {
>> cpus {
>> @@ -72,6 +74,193 @@
>> };
>> };
>>
>> +de: display-engine {
>> +compatible = "allwinner,sun8i-h3-display-engine";
>> +allwinner,pipelines = <&mixer0>,
>> + <&mixer1>;
>> +status = "disabled";
>> +};
>> +
>> +soc {
>> +display_clocks: clock@100 {
>> +compatible = "allwinner,sun8i-a83t-de2-clk";
>> +reg = <0x0100 0x10>;
>> +clocks = <&ccu CLK_BUS_DE>,
>> + <&ccu CLK_DE>;
>> +clock-names = "bus",
>> + "mod";
>> +resets = <&ccu RST_BUS_DE>;
>> +#clock-cells = <1>;
>> +#reset-cells = <1>;
>> +assigned-clocks = <&ccu CLK_DE>;
>> +assigned-clock-parents = <&ccu CLK_PLL_DE>;
>> +assigned-clock-rates = <43200>;
>
>This shouldn't be set in the DT, but evaluated at runtime when calling
>clk_set_rate.
Nope, DE2 clock doesn't need evalution, as the clock is decoupled with
DE2 mixers' output signal. (Although it seems that SoCs with larger
plane size will use higher clock.)
And setting it to 432MHz is also needed for properly 216MHz clock to TVE.
>
>> +tve0: tv-encoder@1e0 {
>> +compatible = "allwinner,sun8i-h3-tv-encoder";
>> +reg = <0x01e0 0x1000>;
>> +clocks = <&ccu CLK_BUS_TVE>, <&ccu CLK_TVE>;
>> +clock-names = "bus", "mod";
>> +resets = <&ccu RST_BUS_TVE>;
>> +status = "disabled";
>> +
>> +assigned-clocks = <&ccu CLK_TVE>;
>> +assigned-clock-parents = <&ccu CLK_PLL_DE>;
>
>Same thing here. clk_set_rate should just do the right thing.
>
>> +assigned-clock-rates = <21600>;
>
>And why are you setting it in the driver and in the DT?
>
>Maxime
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Re: [RFC PATCH 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2
于 2017年5月20日 GMT+08:00 上午1:57:53, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:46AM +0800, Icenowy Zheng wrote:
>> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to
>> tcon0 and mixer1 is connected to tcon1; however by setting a bit
>> the connection can be swapped.
>>
>> As we now hardcode the default connection, ignore the bonus endpoint
>for
>> the mixer's output and the TCON's input, as they stands for the
>swapped
>> connection.
>>
>> Signed-off-by: Icenowy Zheng
>> ---
>> drivers/gpu/drm/sun4i/sun4i_drv.c | 27 ++
>> drivers/gpu/drm/sun4i/sun4i_tcon.c | 39
>+-
>> drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++
>> 3 files changed, 59 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
>b/drivers/gpu/drm/sun4i/sun4i_drv.c
>> index 1dd1948025d2..29bf1325ded6 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
>> +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
>> @@ -173,6 +173,13 @@ static bool sun4i_drv_node_is_frontend(struct
>device_node *node)
>> of_device_is_compatible(node,
>"allwinner,sun8i-a33-display-frontend");
>> }
>>
>> +static bool sun4i_drv_node_is_swappable_de2_mixer(struct device_node
>*node)
>> +{
>> +/* The V3s has only one mixer-tcon pair, so it's not listed here.
>*/
>> +return of_device_is_compatible(node,
>"allwinner,sun8i-h3-de2-mixer0") ||
>> +of_device_is_compatible(node, "allwinner,sun8i-h3-de2-mixer1");
>> +}
>> +
>> static bool sun4i_drv_node_is_tcon(struct device_node *node)
>> {
>> return of_device_is_compatible(node, "allwinner,sun5i-a13-tcon") ||
>> @@ -249,6 +256,26 @@ static int sun4i_drv_add_endpoints(struct device
>*dev,
>> }
>> }
>>
>> +/*
>> + * The second endpoint of the output of a swappable DE2 mixer
>> + * is the TCON after connection swapping.
>> + * Ignore it now, as we now hardcode mixer0->tcon0,
>> + * mixer1->tcon1 connection.
>> + */
>> +if (sun4i_drv_node_is_swappable_de2_mixer(node)) {
>> +struct of_endpoint endpoint;
>> +
>> +if (of_graph_parse_endpoint(ep, &endpoint)) {
>> +DRM_DEBUG_DRIVER("Couldn't parse endpoint\n");
>> +continue;
>> +}
>> +
>> +if (endpoint.id) {
>> +DRM_DEBUG_DRIVER("Endpoint is an unused
>> connection for DE2
>mixer... skipping\n");
>> +continue;
>> +}
>> +}
>> +
>> /* Walk down our tree */
>> count += sun4i_drv_add_endpoints(dev, match, remote);
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
>b/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> index f44a37a5993d..89a215ff2370 100644
>> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
>> @@ -425,7 +425,8 @@ static int sun4i_tcon_init_regmap(struct device
>*dev,
>> * requested via the get_id function of the engine.
>> */
>> static struct sunxi_engine *sun4i_tcon_find_engine(struct sun4i_drv
>*drv,
>> - struct device_node *node)
>> + struct device_node *node,
>> + bool skip_bonus_ep)
>> {
>> struct device_node *port, *ep, *remote;
>> struct sunxi_engine *engine;
>> @@ -439,6 +440,20 @@ static struct sunxi_engine
>*sun4i_tcon_find_engine(struct sun4i_drv *drv,
>> if (!remote)
>> continue;
>>
>> +if (skip_bonus_ep) {
>> +struct of_endpoint endpoint;
>> +
>> +if (of_graph_parse_endpoint(ep, &endpoint)) {
>> +DRM_DEBUG_DRIVER("Couldn't parse endpoint\n");
>> +continue;
>> +}
>> +
>> +if (endpoint.id) {
>> +DRM_DEBUG_DRIVER("Skipping bonus mixer->TCON
>> connection when
>searching engine\n");
>> +continue;
>> +}
>> +}
>> +
>
>You don't list the mixers in the tcon's output, why do you need that
>exactly?
Mixers are TCONs' input, not output...
>
>Maxime
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Re: [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC
于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard 写到: >On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote: >> Allwinner H3 features a TV encoder similar to the one in earlier >SoCs, >> but with some different points about clocks: >> - It has a mod clock and a bus clock. >> - The mod clock must be at a fixed rate to generate signal. > >Why? It's experiment result by Jernej. The clock rates in BSP kernel is also specially designed (PLL_DE at 432MHz) in order to be able to feed the TVE. > >Maxime ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2 3/5] drm/bridge/synopsys: Add MIPI DSI host controller bridge
On 05/19/2017 05:33 PM, Neil Armstrong wrote: > On 05/19/2017 05:20 PM, Philippe CORNU wrote: >> Add a Synopsys Designware MIPI DSI host DRM bridge driver, based on the >> Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. >> >> Signed-off-by: Philippe CORNU >> --- >> drivers/gpu/drm/bridge/synopsys/Kconfig |9 + >> drivers/gpu/drm/bridge/synopsys/Makefile |2 + >> drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 1024 >> + >> 3 files changed, 1035 insertions(+) >> create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c >> >> diff --git a/drivers/gpu/drm/bridge/synopsys/Kconfig >> b/drivers/gpu/drm/bridge/synopsys/Kconfig >> index 40d2827..d7fbdff 100644 >> --- a/drivers/gpu/drm/bridge/synopsys/Kconfig >> +++ b/drivers/gpu/drm/bridge/synopsys/Kconfig >> @@ -21,3 +21,12 @@ config DRM_DW_HDMI_I2S_AUDIO >> help >>Support the I2S Audio interface which is part of the Synopsys >>Designware HDMI block. >> + >> +config DRM_DW_MIPI_DSI >> +tristate "Synopsys DesignWare MIPI DSI host controller bridge" >> +select DRM_KMS_HELPER >> +select DRM_MIPI_DSI >> +select DRM_PANEL >> +help >> + Choose this if you want to use the Synopsys DesignWare MIPI DSI host >> + controller bridge. >> diff --git a/drivers/gpu/drm/bridge/synopsys/Makefile >> b/drivers/gpu/drm/bridge/synopsys/Makefile >> index 17aa7a6..5f57d36 100644 >> --- a/drivers/gpu/drm/bridge/synopsys/Makefile >> +++ b/drivers/gpu/drm/bridge/synopsys/Makefile >> @@ -3,3 +3,5 @@ >> obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o >> obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o >> obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o >> + >> +obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw-mipi-dsi.o >> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c >> b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c >> new file mode 100644 >> index 000..041f564 >> --- /dev/null >> +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c >> @@ -0,0 +1,1024 @@ >> +/* >> + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License as published by >> + * the Free Software Foundation; either version 2 of the License, or >> + * (at your option) any later version. >> + * >> + * Modified by Philippe Cornu >> + * This generic Synopsys Designware MIPI DSI host driver is based on the >> + * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#define DSI_VERSION 0x00 >> +#define DSI_PWR_UP 0x04 >> +#define RESET 0 >> +#define POWERUP BIT(0) >> + >> +#define DSI_CLKMGR_CFG 0x08 >> +#define TO_CLK_DIVIDSION(div) (((div) & 0xff) << 8) >> +#define TX_ESC_CLK_DIVIDSION(div) (((div) & 0xff) << 0) >> + >> +#define DSI_DPI_VCID0x0c >> +#define DPI_VID(vid)(((vid) & 0x3) << 0) >> + >> +#define DSI_DPI_COLOR_CODING0x10 >> +#define EN18_LOOSELYBIT(8) >> +#define DPI_COLOR_CODING_16BIT_10x0 >> +#define DPI_COLOR_CODING_16BIT_20x1 >> +#define DPI_COLOR_CODING_16BIT_30x2 >> +#define DPI_COLOR_CODING_18BIT_10x3 >> +#define DPI_COLOR_CODING_18BIT_20x4 >> +#define DPI_COLOR_CODING_24BIT 0x5 >> + >> +#define DSI_DPI_CFG_POL 0x14 >> +#define COLORM_ACTIVE_LOW BIT(4) >> +#define SHUTD_ACTIVE_LOWBIT(3) >> +#define HSYNC_ACTIVE_LOWBIT(2) >> +#define VSYNC_ACTIVE_LOWBIT(1) >> +#define DATAEN_ACTIVE_LOW BIT(0) >> + >> +#define DSI_DPI_LP_CMD_TIM 0x18 >> +#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16) >> +#define INVACT_LPCMD_TIME(p)((p) & 0xff) >> + >> +#define DSI_DBI_CFG 0x20 >> +#define DSI_DBI_CMDSIZE 0x28 >> + >> +#define DSI_PCKHDL_CFG 0x2c >> +#define EN_CRC_RX BIT(4) >> +#define EN_ECC_RX BIT(3) >> +#define EN_BTA BIT(2) >> +#define EN_EOTP_RX BIT(1) >> +#define EN_EOTP_TX BIT(0) >> + >> +#define DSI_MODE_CFG0x34 >> +#define ENABLE_VIDEO_MODE 0 >> +#define ENABLE_CMD_MODE BIT(0) >> + >> +#define DSI_VID_MODE_CFG0x38 >> +#define FRAME_BTA_ACK BIT(14) >> +#define ENABLE_LOW_POWER(0x3f << 8) >> +#define ENABLE_LOW_POWER_MASK (0x3f << 8) >> +#defi
[PATCH 00/29] Standardize doc formats - part 3
Each document under Documentation/*.txt has its own format. Some follow markup notations, some don't even have a title! In order to try to get some order on it, change the document style to the standard we're adopting after the adoption of ReStructured Text. The documents touched on this series now build fine with Sphinx, if renamed to *.rst extension. The main goal with this is to teach people by example about what format is expected on newer documents. It also helps to add those files to Kernel books. In order to make things more palatable, I'm spliting the conversion into three parts. This is part 3. Mauro Carvalho Chehab (29): pinctrl.txt: standardize document format pnp.txt: standardize document format preempt-locking.txt: standardize document format printk-formats.txt: standardize document format pwm.txt: standardize document format rbtree.txt: standardize document format remoteproc.txt: standardize document format rfkill.txt: standardize document format robust-futex-ABI.txt: standardize document format robust-futexes.txt: standardize document format rpmsg.txt: standardize document format rtc.txt: standardize document format SAK.txt: standardize document format sgi-ioc4.txt: standardize document format siphash.txt: standardize document format SM501.txt: standardize document format smsc_ece1099.txt: standardize document format static-keys.txt: standardize document format svga.txt: standardize document format sync_file.txt: standardize document format this_cpu_ops.txt: standardize document format unaligned-memory-access.txt: standardize document format vfio-mediated-device.txt: standardize document format vfio.txt: standardize document format video-output.txt: standardize document format xillybus.txt: standardize document format xz.txt: standardize document format zorro.txt: standardize document format dell_rbu.txt: standardize document format Documentation/SAK.txt | 65 +- Documentation/SM501.txt |9 +- Documentation/dell_rbu.txt| 81 ++- Documentation/pinctrl.txt | 1104 +++-- Documentation/pnp.txt | 343 + Documentation/preempt-locking.txt | 40 +- Documentation/printk-formats.txt | 416 ++- Documentation/pwm.txt | 46 +- Documentation/rbtree.txt | 88 +-- Documentation/remoteproc.txt | 320 + Documentation/rfkill.txt | 47 +- Documentation/robust-futex-ABI.txt| 14 +- Documentation/robust-futexes.txt | 12 +- Documentation/rpmsg.txt | 340 + Documentation/rtc.txt | 44 +- Documentation/sgi-ioc4.txt|4 + Documentation/siphash.txt | 186 ++--- Documentation/smsc_ece1099.txt|4 + Documentation/static-keys.txt | 199 +++--- Documentation/svga.txt| 146 ++-- Documentation/sync_file.txt | 23 +- Documentation/this_cpu_ops.txt| 49 +- Documentation/unaligned-memory-access.txt | 57 +- Documentation/vfio-mediated-device.txt| 252 +++ Documentation/vfio.txt| 261 +++ Documentation/video-output.txt| 54 +- Documentation/xillybus.txt| 29 +- Documentation/xz.txt | 182 ++--- Documentation/zorro.txt | 59 +- 29 files changed, 2437 insertions(+), 2037 deletions(-) -- 2.9.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 4/5] dt-bindings: display: Add STM32 DSI host driver
This patch adds documentation of device tree bindings for the STM32
DSI host driver based on the Synopsys DW MIPI DSI driver from Rockchip.
Signed-off-by: Philippe CORNU
---
.../devicetree/bindings/display/st,stm32-ltdc.txt | 102 -
1 file changed, 100 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
index 8e14769..18a57a2 100644
--- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
+++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
@@ -1,7 +1,6 @@
* STMicroelectronics STM32 lcd-tft display controller
- ltdc: lcd-tft display controller host
- must be a sub-node of st-display-subsystem
Required properties:
- compatible: "st,stm32-ltdc"
- reg: Physical base address of the IP registers and length of memory mapped
region.
@@ -13,8 +12,37 @@
Required nodes:
- Video port for RGB output.
-Example:
+* STMicroelectronics STM32 specific extensions to Synopsys DesignWare MIPI DSI
+Required properties:
+- #address-cells: Should be <1>.
+- #size-cells: Should be <0>.
+- compatible: "st,stm32-dsi".
+- reg: Memory mapped base address and length of the DWC MIPI DSI registers.
+- clocks: References to all the clocks specified in the clock-names property
+ as specified in [1].
+- clock-names: The DWC MIPI DSI host uses the following clocks.
+ - "pclk" is the peripheral clock for either AHB and APB (mandatory).
+ - "ref" is the pll reference clock (mandatory).
+- resets: References to all the resets specified in the reset-names property
+ as specified in [2]. (optional)
+- reset-names: string reset name, must be "apb" if used. (optional)
+- ports: The connectivity of the DWC MIPI DSI host controller
+ with the rest of the system is expressed in using ports as specified in the
+ device graph bindings in [2].
+ - port@0 is the dsi input, connected to the ltdc output port.
+ - port@1 is the dsi output, connected to the dsi panel or bridge.
+
+Note: You can find more documentation related to the Synopsys DesignWare MIPI
+DSI host controller in [5].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+[2] Documentation/devicetree/bindings/reset/reset.txt
+[3] Documentation/devicetree/bindings/media/video-interfaces.txt
+[4] Documentation/devicetree/bindings/graph.txt
+[5] Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt
+
+Example 1: RGB panel
/ {
...
soc {
@@ -34,3 +62,73 @@ Example:
};
};
};
+
+Example 2: DSI panel
+
+/ {
+ ...
+ soc {
+ ...
+ ltdc: display-controller@40016800 {
+ compatible = "st,stm32-ltdc";
+ reg = <0x40016800 0x200>;
+ interrupts = <88>, <89>;
+ resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
+ clocks = <&rcc 1 CLK_LCD>;
+ clock-names = "lcd";
+
+ port {
+ ltdc_out_dsi: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
+
+
+ dsi: dsi@40016C00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-dsi";
+ reg = <0x40016C00 0x800>;
+ clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
+ clock-names = "ref", "pclk";
+ resets = <&rcc STM32F4_APB2_RESET(DSI)>;
+ reset-names = "apb";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi_in: endpoint {
+ remote-endpoint =
<;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi_out_panel: endpoint {
+ remote-endpoint =
<&dsi_in_panel>;
+ };
+ };
+
+ };
+
+ panel-dsi@0 {
+ reg = <0>; /* dsi virtual channel (0..3) */
+ compatible = ...;
+ enable-gpios = ...;
+
+ port {
+ dsi_in_panel: endpoint {
+ remote-endpoint =
<&dsi_out_panel>;
+ };
+
[PATCH v2 3/5] drm/bridge/synopsys: Add MIPI DSI host controller bridge
Add a Synopsys Designware MIPI DSI host DRM bridge driver, based on the Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. Signed-off-by: Philippe CORNU --- drivers/gpu/drm/bridge/synopsys/Kconfig |9 + drivers/gpu/drm/bridge/synopsys/Makefile |2 + drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 1024 + 3 files changed, 1035 insertions(+) create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c diff --git a/drivers/gpu/drm/bridge/synopsys/Kconfig b/drivers/gpu/drm/bridge/synopsys/Kconfig index 40d2827..d7fbdff 100644 --- a/drivers/gpu/drm/bridge/synopsys/Kconfig +++ b/drivers/gpu/drm/bridge/synopsys/Kconfig @@ -21,3 +21,12 @@ config DRM_DW_HDMI_I2S_AUDIO help Support the I2S Audio interface which is part of the Synopsys Designware HDMI block. + +config DRM_DW_MIPI_DSI + tristate "Synopsys DesignWare MIPI DSI host controller bridge" + select DRM_KMS_HELPER + select DRM_MIPI_DSI + select DRM_PANEL + help + Choose this if you want to use the Synopsys DesignWare MIPI DSI host + controller bridge. diff --git a/drivers/gpu/drm/bridge/synopsys/Makefile b/drivers/gpu/drm/bridge/synopsys/Makefile index 17aa7a6..5f57d36 100644 --- a/drivers/gpu/drm/bridge/synopsys/Makefile +++ b/drivers/gpu/drm/bridge/synopsys/Makefile @@ -3,3 +3,5 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o + +obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw-mipi-dsi.o diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c new file mode 100644 index 000..041f564 --- /dev/null +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -0,0 +1,1024 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * Modified by Philippe Cornu + * This generic Synopsys Designware MIPI DSI host driver is based on the + * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DSI_VERSION0x00 +#define DSI_PWR_UP 0x04 +#define RESET 0 +#define POWERUPBIT(0) + +#define DSI_CLKMGR_CFG 0x08 +#define TO_CLK_DIVIDSION(div) (((div) & 0xff) << 8) +#define TX_ESC_CLK_DIVIDSION(div) (((div) & 0xff) << 0) + +#define DSI_DPI_VCID 0x0c +#define DPI_VID(vid) (((vid) & 0x3) << 0) + +#define DSI_DPI_COLOR_CODING 0x10 +#define EN18_LOOSELY BIT(8) +#define DPI_COLOR_CODING_16BIT_1 0x0 +#define DPI_COLOR_CODING_16BIT_2 0x1 +#define DPI_COLOR_CODING_16BIT_3 0x2 +#define DPI_COLOR_CODING_18BIT_1 0x3 +#define DPI_COLOR_CODING_18BIT_2 0x4 +#define DPI_COLOR_CODING_24BIT 0x5 + +#define DSI_DPI_CFG_POL0x14 +#define COLORM_ACTIVE_LOW BIT(4) +#define SHUTD_ACTIVE_LOW BIT(3) +#define HSYNC_ACTIVE_LOW BIT(2) +#define VSYNC_ACTIVE_LOW BIT(1) +#define DATAEN_ACTIVE_LOW BIT(0) + +#define DSI_DPI_LP_CMD_TIM 0x18 +#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16) +#define INVACT_LPCMD_TIME(p) ((p) & 0xff) + +#define DSI_DBI_CFG0x20 +#define DSI_DBI_CMDSIZE0x28 + +#define DSI_PCKHDL_CFG 0x2c +#define EN_CRC_RX BIT(4) +#define EN_ECC_RX BIT(3) +#define EN_BTA BIT(2) +#define EN_EOTP_RX BIT(1) +#define EN_EOTP_TX BIT(0) + +#define DSI_MODE_CFG 0x34 +#define ENABLE_VIDEO_MODE 0 +#define ENABLE_CMD_MODEBIT(0) + +#define DSI_VID_MODE_CFG 0x38 +#define FRAME_BTA_ACK BIT(14) +#define ENABLE_LOW_POWER (0x3f << 8) +#define ENABLE_LOW_POWER_MASK (0x3f << 8) +#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0 +#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1 +#define VID_MODE_TYPE_BURST0x2 +#define VID_MODE_TYPE_MASK 0x3 + +#define DSI_VID_PKT_SIZE 0x3c +#define VID_PKT_SIZE(p)(((p) & 0x3fff) << 0) +#define VID_PKT_MAX_SIZE 0x3fff + +#define DSI_VID_HSA_TIME 0x48 +#define DSI_VID_HBP_TIME 0x4c
Re: [PATCH v2 00/29] gpu/drm: remove -Iinclude/drm compiler flags from Makefile
Hi Daniel, 2017-05-18 14:38 GMT+09:00 Daniel Vetter : > On Mon, Apr 24, 2017 at 01:50:18PM +0900, Masahiro Yamada wrote: >> Many Makefiles needed to add -Iinclude/drm as an include path, >> but the right thing to do is to include headers in the form >> #include >> >> This series fixes the source files, then rip off -Iinclude/drm flags. >> >> >> Masahiro Yamada (29): >> drm: make drm_panel.h self-contained >> drm/ttm: fix include notation and remove -Iinclude/drm flag >> drm/amd: fix include notation and remove -Iinclude/drm flag >> drm/ast: fix include notation and remove -Iinclude/drm flag >> drm/bochs: fix include notation and remove -Iinclude/drm flag >> drm/bridge: fix include notation and remove -Iinclude/drm flag >> drm/cirrus: fix include notation and remove -Iinclude/drm flag >> drm/hisilicon: fix include notation and remove -Iinclude/drm flag >> drm/mgag200: fix include notation and remove -Iinclude/drm flag >> drm/msm: fix include notation and remove -Iinclude/drm flag >> drm/nouveau: fix include notation and remove -Iinclude/drm flag >> drm/qxl: fix include notation and remove -Iinclude/drm flag >> drm/radeon: fix include notation and remove -Iinclude/drm flag >> drm/tilcdc: fix include notation and remove -Iinclude/drm flag >> drm/vc4: fix include notation and remove -Iinclude/drm flag >> drm/virtio: fix include notation and remove -Iinclude/drm flag >> drm/vmwgfx: fix include notation and remove -Iinclude/drm flag >> drm/gma500: remove unneeded -Iinclude/drm compiler flag >> drm/i810: remove unneeded -Iinclude/drm compiler flag >> drm/i2c: remove unneeded -Iinclude/drm compiler flag >> drm/mga: remove unneeded -Iinclude/drm compiler flag >> drm/omap: remove unneeded -Iinclude/drm compiler flag >> drm/r128: remove unneeded -Iinclude/drm compiler flag >> drm/savage: remove unneeded -Iinclude/drm compiler flag >> drm/sis: remove unneeded -Iinclude/drm compiler flag >> drm/tdfx: remove unneeded -Iinclude/drm compiler flag >> drm/udl: remove unneeded -Iinclude/drm compiler flag >> drm/vgem: remove unneeded -Iinclude/drm compiler flag >> drm/via: remove unneeded -Iinclude/drm compiler flag > > Ok, I think I merged them all except the vc4 one. Can you please > rebase&resubmit that one? > I had already submitted the one. https://patchwork.kernel.org/patch/9734869/ and one more patch https://patchwork.kernel.org/patch/9734827/ -- Best Regards Masahiro Yamada ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 0/5] STM32 DSI HOST
Version 2: - Add a generic Synopsys DesignWare MIPI DSI bridge driver following comments from Neil Armstrong & Archit Taneja. - Use drm_of_find_panel_or_bridge() thanks to Eric Anholt comments - Update dt-bindings thanks to Rob Herring comments Version 1: - Initial commit The purpose of this set of patches is to add the mipi dsi host driver to the stm32 family. This mipi dsi host driver is based on the Rockchip version of the Synopsys Designware mipi dsi driver (rockchip/dw-mipi-dsi.c) modified for the stm32 family: - replace Rockchip digital & phy specific extensions with stm32's ones. - add a bridge Philippe CORNU (5): drm/stm: ltdc: Add bridge support dt-bindings: display: Add Synopsys DW MIPI DSI DRM bridge driver drm/bridge/synopsys: Add MIPI DSI host controller bridge dt-bindings: display: Add STM32 DSI host driver drm/stm: Add STM32 DSI host driver .../bindings/display/bridge/dw_mipi_dsi.txt| 36 + .../devicetree/bindings/display/st,stm32-ltdc.txt | 102 +- drivers/gpu/drm/bridge/synopsys/Kconfig|9 + drivers/gpu/drm/bridge/synopsys/Makefile |2 + drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 1024 drivers/gpu/drm/stm/Kconfig|8 + drivers/gpu/drm/stm/Makefile |2 + drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 328 +++ drivers/gpu/drm/stm/ltdc.c | 74 +- drivers/gpu/drm/stm/ltdc.h |1 + 10 files changed, 1565 insertions(+), 21 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c create mode 100644 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c -- 1.9.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v3 00/21] drm: sun4i: Add support for the HDMI controller
On Wed, May 17, 2017 at 3:40 PM, Maxime Ripard wrote: > Hi, > > Here is an attempt at getting the HDMI controller running. > > This HDMI controller is found on a number of old Allwinner SoCs (A10, A10s, > A20, A31). > > This driver only supports for now the A10s because it was an easy target, > being very close to the A13 that is already supported by our DRM driver. > > There's nothing out of the extraordinary there, except maybe the clock > setup. All the internal clocks (TMDS, DDC) have been modeled using the > common clock framework, the TMDS clock being the parent of the DDC one. > > While this might sound overkill, other SoC have a different, external > source for the DDC clock, which will be easier to support through the clock > framework. > > The IP also supports audio (through an already supported i2s controller, > and some missing configuration in the HDMI controller) and CEC. Both will > come eventually. > > Let me know what you think! > Maxime > > Changes from v2: > - Fixed the PLL control macros definitions > - Called clk_enable / disable on the DDC clock > - Added the flags to enable the connection polling > - Fixed the vtotal computation in TCON's code, and added a comment > - Added and documented the A10s display engine compatible > - Reworked the component parsing code to bail out when a standard > connector is found > - Fixed a inconsistent comment in the predivider unapplication > - Fixed a commit log > - Added Chen-Yu's and Rob's Acked-By > - Changed divider_round_rate to a static, inline function in the header > - Added and document the A10s display pipeline compatible > - Rebased on top of 4.12 > > Changes from v1: > - Fixed typos in the CCU header and the HDMI code > - Reintroduced the comment for the backporch timings > - Renamed the hdmi node to hdmi, instead of hdmi0 > - Added support for hdmi-connector > - Added a separate Kconfig option for the HDMI support > - Changed the TCON muxing configuration for an explicit call in the > TCON's "clients" > - Fixed the initialisation sequence that was clearing the clocks bits > - Constified the HDMI's structures and removed whitespaces errors > - Fixed an issue in the sunxi-ng code that was not reporting the proper > parent clock rate if it was modified > - Removed unused headers > - Removed CLK_SET_RATE_PARENT for the DDC clock > - Used the DDC address defines > - Removed the interlace flag that wasn't supported at the moment > - Moved most of the HDMI encoder init to the bind function like we do for > the other encoders > - Switched to drm_of_find_possible_crtcs > - Removed the extra printk that were still in my code > - Rebased on top of linux-next > - Removed the patch changing the divider_round_rate prototype to > introduce a new function instead that takes the parent clock to > evaluate > - Added a clk_set_rate for the hdmi module clock > - Fixed the V_TOTAL TCON ch0 calculation to be consistent with ch1's > - Defined all registers, and remove the TODOs > - Fixed the EDID issues by increasing the timeout. > - Added an atomic_check to prevent the DBLCLK modes to be used, as it is > not supported yet > - Updated the binding to add the interrupts and DMA channels > > Maxime Ripard (21): > clk: divider: Make divider_round_rate take the parent clock > clk: sunxi-ng: Pass the parent and a pointer to the clocks round rate > clk: sunxi-ng: div: Switch to divider_round_rate > clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENT > clk: sunxi-ng: mux: split out the pre-divider computation code > clk: sunxi-ng: mux: Change pre-divider application function prototype > clk: sunxi-ng: mux: Re-adjust parent rate > clk: sunxi-ng: sun5i: Export video PLLs Merged patches 1 ~ 8 and ... > drm/sun4i: tcon: Add channel debug > drm/sun4i: tcon: Move the muxing out of the mode set function > drm/sun4i: tcon: Switch mux on only for composite > drm/sun4i: tcon: Fix tcon channel 1 backporch calculation > drm/sun4i: tcon: Change vertical total size computation inconsistency > drm/sun4i: tcon: multiply the vtotal when not in interlace > drm/sun4i: Ignore the generic connectors for components > dt-bindings: display: sun4i: Add HDMI display bindings > dt-bindings: display: sun4i: Add allwinner,tcon-channel property > drm/sun4i: Add HDMI support > drm/sun4i: Add compatible for the A10s pipeline > ARM: sun5i: a10s: Add the HDMI controller node > ARM: sun5i: a10s-olinuxino: Enable HDMI ... 20 ~ 21 for 4.13. ChenYu ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC PATCH 01/11] dt-bindings: update the binding for Allwinner H3 TVE support
于 2017年5月20日 GMT+08:00 上午2:02:15, Maxime Ripard 写到: >On Thu, May 18, 2017 at 12:43:44AM +0800, Icenowy Zheng wrote: >> -On SoCs other than the A33 and V3s, there is one more clock >required: >> +For the following compatibles: >> + * allwinner,sun5i-a13-tcon >> + * allwinner,sun6i-a31-tcon >> + * allwinner,sun6i-a31s-tcon >> + * allwinner,sun8i-a33-tcon >> + * allwinner,sun8i-v3s-tcon >> +there is one more clock and one more property required: >> + - clocks: >> + - 'tcon-ch0': The clock driving the TCON channel 0 >> + - clock-output-names: Name of the pixel clock created >> + >> +For the following compatibles: >> + * allwinner,sun5i-a13-tcon >> + * allwinner,sun6i-a31-tcon >> + * allwinner,sun6i-a31s-tcon >> + * allwinner,sun8i-h3-tcon0 >> +there is one more clock required: >> - 'tcon-ch1': The clock driving the TCON channel 1 > >Putting ID's in the compatible name is usually a bad idea. What is the >difference between the two? Only that the second one doesn't have a >clock? Yes. > >That seems highly unlikely. How does it generate the pixel clock >frequency? Yes it seems impossible, but it's also the fact. There's only one CLK_TCON in H3/5, which is for TCON0. It's possible that lcd-ch1 clk is CLK_TVE, but it's still a weird situation -- Although we have a lcd-ch1 clock, we cannot touch it, otherwise the TVE will refuse to work (the TVE can only work under 216MHz). > >Maxime ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 2/5] dt-bindings: display: Add Synopsys DW MIPI DSI DRM bridge driver
This patch adds documentation of device tree bindings for the Synopsys DesignWare MIPI DSI host DRM bridge driver. Signed-off-by: Philippe CORNU --- .../bindings/display/bridge/dw_mipi_dsi.txt| 36 ++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt diff --git a/Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt b/Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt new file mode 100644 index 000..652c0f5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt @@ -0,0 +1,36 @@ +Synopsys DesignWare MIPI DSI host controller + + +This document defines device tree properties for the Synopsys DesignWare MIPI +DSI host controller. It doesn't constitue a device tree binding specification +by itself but is meant to be referenced by platform-specific device tree +bindings. + +When referenced from platform device tree bindings the properties defined in +this document are defined as follows. The platform device tree bindings are +responsible for defining whether each property is required or optional. + +- reg: Memory mapped base address and length of the DWC MIPI DSI registers. + +- clocks: References to all the clocks specified in the clock-names property + as specified in [1]. + +- clock-names: The DWC MIPI DSI host uses the following clocks. + + - "pclk" is the peripheral clock for either AHB and APB (mandatory). + - "ref" is the pll reference clock (mandatory). + +- resets: References to all the resets specified in the reset-names property + as specified in [2]. (optional) + +- reset-names: string reset name, must be "apb" if used. (optional) + +- ports: The connectivity of the DWC MIPI DSI host controller + with the rest of the system is expressed in using ports as specified in the + device graph bindings in [3] & [4]. The numbering of the ports + is platform-specific. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt +[2] Documentation/devicetree/bindings/reset/reset.txt +[3] Documentation/devicetree/bindings/media/video-interfaces.txt +[4] Documentation/devicetree/bindings/graph.txt -- 1.9.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [linux-sunxi] Re: [RFC PATCH 02/11] drm: sun4i: add support for H3 mixers
于 2017年5月20日 GMT+08:00 上午1:47:29, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:45AM +0800, Icenowy Zheng wrote:
>> From: Icenowy Zheng
>>
>> Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI
>channels,
>> and the other has 1 VI and 1 UI.
>>
>> Add support for these two variants.
>>
>> Signed-off-by: Icenowy Zheng
>> ---
>> drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++
>> 1 file changed, 18 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
>b/drivers/gpu/drm/sun4i/sun8i_mixer.c
>> index cb193c5f1686..d658a3a8159a 100644
>> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
>> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
>> @@ -390,11 +390,29 @@ static const struct sun8i_mixer_cfg
>sun8i_v3s_mixer_cfg = {
>> .ui_num = 1,
>> };
>>
>> +static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = {
>> +.vi_num = 1,
>> +.ui_num = 3,
>> +};
>> +
>> +static const struct sun8i_mixer_cfg sun8i_h3_mixer1_cfg = {
>> +.vi_num = 1,
>> +.ui_num = 1,
>> +};
>> +
>> static const struct of_device_id sun8i_mixer_of_table[] = {
>> {
>> .compatible = "allwinner,sun8i-v3s-de2-mixer",
>> .data = &sun8i_v3s_mixer_cfg,
>> },
>> +{
>> +.compatible = "allwinner,sun8i-h3-de2-mixer0",
>> +.data = &sun8i_h3_mixer0_cfg
>> +},
>> +{
>> +.compatible = "allwinner,sun8i-h3-de2-mixer1",
>> +.data = &sun8i_h3_mixer1_cfg
>> +},
>
>So the only difference between the two is the number of ui planes?
Not only., but currently we only implemented this.
More functions differ, but we still don't support them...
>
>Why not create a property to give the number then, instead of a
>compatible?
>
>Maxime
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[PATCH 20/29] sync_file.txt: standardize document format
Each text file under Documentation follows a different format. Some doesn't even have titles! Change its representation to follow the adopted standard, using ReST markups for it to be parseable by Sphinx: - Use markup for document title and authorship; - Mark literal blocks; - Use a numbered list for references. Signed-off-by: Mauro Carvalho Chehab --- Documentation/sync_file.txt | 23 +-- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/Documentation/sync_file.txt b/Documentation/sync_file.txt index c3d033a06e8d..496fb2c3b3e6 100644 --- a/Documentation/sync_file.txt +++ b/Documentation/sync_file.txt @@ -1,8 +1,8 @@ - Sync File API Guide - ~~~ +=== +Sync File API Guide +=== - Gustavo Padovan - +:Author: Gustavo Padovan This document serves as a guide for device drivers writers on what the sync_file API is, and how drivers can support it. Sync file is the carrier of @@ -46,16 +46,17 @@ Creating Sync Files When a driver needs to send an out-fence userspace it creates a sync_file. -Interface: +Interface:: + struct sync_file *sync_file_create(struct dma_fence *fence); The caller pass the out-fence and gets back the sync_file. That is just the first step, next it needs to install an fd on sync_file->file. So it gets an -fd: +fd:: fd = get_unused_fd_flags(O_CLOEXEC); -and installs it on sync_file->file: +and installs it on sync_file->file:: fd_install(fd, sync_file->file); @@ -71,7 +72,8 @@ When userspace needs to send an in-fence to the driver it passes file descriptor of the Sync File to the kernel. The kernel can then retrieve the fences from it. -Interface: +Interface:: + struct dma_fence *sync_file_get_fence(int fd); @@ -79,5 +81,6 @@ The returned reference is owned by the caller and must be disposed of afterwards using dma_fence_put(). In case of error, a NULL is returned instead. References: -[1] struct sync_file in include/linux/sync_file.h -[2] All interfaces mentioned above defined in include/linux/sync_file.h + +1. struct sync_file in include/linux/sync_file.h +2. All interfaces mentioned above defined in include/linux/sync_file.h -- 2.9.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/5] drm/stm: ltdc: Add bridge support
Add the bridge support, used by DSI host and HDMI/LVDS bridges.
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/ltdc.c | 74 ++
drivers/gpu/drm/stm/ltdc.h | 1 +
2 files changed, 56 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 7b2d63b..809e420 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -858,6 +858,43 @@ static struct drm_encoder *ltdc_rgb_encoder_create(struct
drm_device *ddev)
return encoder;
}
+static const struct drm_encoder_funcs bridge_encoder_funcs = {
+ .destroy = drm_encoder_cleanup,
+};
+
+struct drm_encoder *bridge_encoder_create(struct drm_device *ddev,
+ struct drm_bridge *bridge)
+{
+ struct drm_encoder *encoder;
+ int ret;
+
+ encoder = devm_kzalloc(ddev->dev, sizeof(*encoder), GFP_KERNEL);
+ if (!encoder)
+ return NULL;
+
+ encoder->possible_crtcs = CRTC_MASK;
+ encoder->possible_clones = 0; /* No cloning support */
+
+ drm_encoder_init(ddev, encoder, &bridge_encoder_funcs,
+DRM_MODE_ENCODER_TMDS, NULL);
+
+ drm_encoder_helper_add(encoder, NULL);
+
+ /* Link drm_bridge to encoder */
+ bridge->encoder = encoder;
+ encoder->bridge = bridge;
+
+ ret = drm_bridge_attach(encoder, bridge, NULL);
+ if (ret) {
+ drm_encoder_cleanup(encoder);
+ return NULL;
+ }
+
+ DRM_DEBUG_DRIVER("Bridge encoder:%d created\n", encoder->base.id);
+
+ return encoder;
+}
+
/*
* DRM_CONNECTOR
*/
@@ -967,12 +1004,13 @@ static int ltdc_get_caps(struct drm_device *ddev)
return 0;
}
-static struct drm_panel *ltdc_get_panel(struct drm_device *ddev)
+static int ltdc_parse_dt(struct drm_device *ddev)
{
+ struct ltdc_device *ldev = ddev->dev_private;
struct device *dev = ddev->dev;
struct device_node *np = dev->of_node;
- struct device_node *entity, *port = NULL;
- struct drm_panel *panel = NULL;
+ struct device_node *entity;
+ int ret;
DRM_DEBUG_DRIVER("\n");
@@ -985,21 +1023,13 @@ static struct drm_panel *ltdc_get_panel(struct
drm_device *ddev)
if (!of_device_is_available(entity))
continue;
- port = of_graph_get_remote_port_parent(entity);
- if (port) {
- panel = of_drm_find_panel(port);
- of_node_put(port);
- if (panel) {
- DRM_DEBUG_DRIVER("remote panel %s\n",
-port->full_name);
- } else {
- DRM_DEBUG_DRIVER("panel missing\n");
- of_node_put(entity);
- }
- }
+ ret = drm_of_find_panel_or_bridge(np, 0, 0,
+ &ldev->panel, &ldev->bridge);
+ if (ret)
+ return ret;
}
- return panel;
+ return 0;
}
int ltdc_load(struct drm_device *ddev)
@@ -1017,9 +1047,9 @@ int ltdc_load(struct drm_device *ddev)
DRM_DEBUG_DRIVER("\n");
- ldev->panel = ltdc_get_panel(ddev);
- if (!ldev->panel)
- return -EPROBE_DEFER;
+ ret = ltdc_parse_dt(ddev);
+ if (ret)
+ return ret;
rstc = of_reset_control_get(np, NULL);
@@ -1077,6 +1107,12 @@ int ltdc_load(struct drm_device *ddev)
DRM_INFO("ltdc hw version 0x%08x - ready\n", ldev->caps.hw_version);
+ if (ldev->bridge) {
+ encoder = bridge_encoder_create(ddev, ldev->bridge);
+ if (!encoder)
+ return -EINVAL;
+ }
+
if (ldev->panel) {
encoder = ltdc_rgb_encoder_create(ddev);
if (!encoder) {
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index 5427ef4..0083cad 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -25,6 +25,7 @@ struct ltdc_device {
void __iomem *regs;
struct clk *pixel_clk; /* lcd pixel clock */
struct drm_panel *panel;
+ struct drm_bridge *bridge;
struct spinlock lock; /* protecting irq status register */
struct ltdc_caps caps;
u32 clut[256]; /* color look up table */
--
1.9.1
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Re: [linux-sunxi] Re: [RFC PATCH 02/11] drm: sun4i: add support for H3 mixers
Hi!
Dne petek, 19. maj 2017 ob 19:49:58 CEST je Icenowy Zheng napisal(a):
> 于 2017年5月20日 GMT+08:00 上午1:47:29, Maxime Ripard 写到:
> >On Thu, May 18, 2017 at 12:43:45AM +0800, Icenowy Zheng wrote:
> >> From: Icenowy Zheng
> >>
> >> Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI
> >
> >channels,
> >
> >> and the other has 1 VI and 1 UI.
> >>
> >> Add support for these two variants.
> >>
> >> Signed-off-by: Icenowy Zheng
> >> ---
> >>
> >> drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++
> >> 1 file changed, 18 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> >
> >b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> >
> >> index cb193c5f1686..d658a3a8159a 100644
> >> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> >> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> >> @@ -390,11 +390,29 @@ static const struct sun8i_mixer_cfg
> >
> >sun8i_v3s_mixer_cfg = {
> >
> >>.ui_num = 1,
> >>
> >> };
> >>
> >> +static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = {
> >> + .vi_num = 1,
> >> + .ui_num = 3,
> >> +};
> >> +
> >> +static const struct sun8i_mixer_cfg sun8i_h3_mixer1_cfg = {
> >> + .vi_num = 1,
> >> + .ui_num = 1,
> >> +};
> >> +
> >>
> >> static const struct of_device_id sun8i_mixer_of_table[] = {
> >>
> >>{
> >>
> >>.compatible = "allwinner,sun8i-v3s-de2-mixer",
> >>.data = &sun8i_v3s_mixer_cfg,
> >>
> >>},
> >>
> >> + {
> >> + .compatible = "allwinner,sun8i-h3-de2-mixer0",
> >> + .data = &sun8i_h3_mixer0_cfg
> >> + },
> >> + {
> >> + .compatible = "allwinner,sun8i-h3-de2-mixer1",
> >> + .data = &sun8i_h3_mixer1_cfg
> >> + },
> >
> >So the only difference between the two is the number of ui planes?
>
> Not only., but currently we only implemented this.
>
> More functions differ, but we still don't support them...
>
As far as I can tell, they only differ in ui & vi number of planes and between
different SoCs, max plane size.
Icenowy,
Do you know any other property they differ? I think everything else is based
mostly on ui & vi number of planes.
Best regards,
Jernej
> >Why not create a property to give the number then, instead of a
> >compatible?
> >
> >Maxime
>
> --
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Re: [PATCH v1 2/3] dt-bindings: display: Add STM32 DSI host driver
On 05/18/2017 11:42 PM, Rob Herring wrote:
> On Fri, May 12, 2017 at 04:56:28PM +0200, Philippe CORNU wrote:
>> This patch adds documentation of device tree bindings for the STM32
>> DSI host driver based on the Synopsys DW MIPI DSI driver from Rockchip.
>>
>> Signed-off-by: Philippe CORNU
>> ---
>> .../devicetree/bindings/display/st,stm32-ltdc.txt | 92
>> +-
>> 1 file changed, 90 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>> b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>> index 8e14769..a61381b 100644
>> --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>> +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt
>> @@ -1,7 +1,6 @@
>> * STMicroelectronics STM32 lcd-tft display controller
>>
>> - ltdc: lcd-tft display controller host
>> - must be a sub-node of st-display-subsystem
>
> Why is this removed? The "must" refers to the location, not whether
> present or not if that's what you were trying to change.
>
Dear Rob,
Many thanks for your comments.
There is no need anymore to have a st-display-subsystem parent node in
the device tree for the ltdc, that is why I removed this "must" information.
>> Required properties:
>> - compatible: "st,stm32-ltdc"
>> - reg: Physical base address of the IP registers and length of memory
>> mapped region.
>> @@ -13,8 +12,25 @@
>> Required nodes:
>> - Video port for RGB output.
>>
>> -Example:
>> +* STMicroelectronics STM32 specific extensions to Synopsys Designware MIPI
>> DSI
>> +(similar to "rockchip/dw_mipi_dsi_rockchip.txt")
>>
>> +Required properties:
>> +- #address-cells: Should be <1>.
>> +- #size-cells: Should be <0>.
>> +- compatible: "st,stm32-dsi_host".
>
> Don't use '_' and this needs to be more specific than just "stm32".
>
Fixed in v2 patchset.
>> +- reg: Represent the physical address range of the controller.
>> +- clocks, clock-names: Phandles to the controller's pll reference
>> + clock(ref) and APB clock(pclk). As described in [1].
>
> Ideally these should be in a common binding (like the driver) as a given
> IP block doesn't have a varying number of clocks (typically).
>
Updated in v2 patchset.
>> +- ports: contain a port node with endpoint definitions as defined in [2].
>
> a single port? Need to be clear how many ports/endpoints and their
> function.
>
Updated in v2 patchset.
>> +- resets: list of phandle + reset specifier pairs, as described in [3].
>> +- reset-names: string reset name, must be "apb".
>> +
>> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +[2] Documentation/devicetree/bindings/media/video-interfaces.txt
>> +[3] Documentation/devicetree/bindings/reset/reset.txt
>> +
>> +Example 1: RGB panel
>> / {
>> ...
>> soc {
>> @@ -34,3 +50,75 @@ Example:
>> };
>> };
>> };
>> +
>> +Example 2: DSI panel
>> +
>> +/ {
>> +...
>> +soc {
>> +...
>> +ltdc: display-controller@40016800 {
>> +compatible = "st,stm32-ltdc";
>> +reg = <0x40016800 0x200>;
>> +interrupts = <88>, <89>;
>> +resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
>> +clocks = <&rcc 1 CLK_LCD>;
>> +clock-names = "lcd";
>> +
>> +port {
>> +ltdc_out_dsi_host: endpoint {
>> +remote-endpoint = <&dsi_host_in>;
>> +};
>> +};
>> +};
>> +
>> +
>> +dsi_host: dsi_host@40016C00 {
>
> dsi@...
>
Fixed in v2 patchset.
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +compatible = "st,stm32-dsi_host";
>> +reg = <0x40016C00 0x800>;
>> +clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
>> +clock-names = "ref", "pclk";
>> +resets = <&rcc STM32F4_APB2_RESET(DSI)>;
>> +reset-names = "apb";
>> +status = "okay";
>
> Don't show status in examples.
Fixed in v2 patchset.
>> +
>> +ports {
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +
>> +port@0 {
>> +reg = <0>;
>> +dsi_host_in: endpoint {
>> +remote-endpoint =
>> <;
>> +};
>> +};
>> +
>> +port@1 {
>> +reg = <1>;
>> +dsi_host_out_panel: endpoint {
>> +remote-endpoint =
>> <&dsi_host_in_panel>;
>> +
[PATCH v2 5/5] drm/stm: Add STM32 DSI host driver
Add the STM32 DSI host driver that uses the Synopsys DesignWare
MIPI DSI DRM bridge.
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/Kconfig | 8 +
drivers/gpu/drm/stm/Makefile | 2 +
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 328 ++
3 files changed, 338 insertions(+)
create mode 100644 drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
diff --git a/drivers/gpu/drm/stm/Kconfig b/drivers/gpu/drm/stm/Kconfig
index 2c4817f..cbda4df 100644
--- a/drivers/gpu/drm/stm/Kconfig
+++ b/drivers/gpu/drm/stm/Kconfig
@@ -14,3 +14,11 @@ config DRM_STM
STMicroelectronics STM32 MCUs.
To compile this driver as a module, choose M here: the module
will be called stm-drm.
+
+config DRM_STM_DSI
+ tristate "STMicroelectronics specific extensions for Synopsys MIPI DSI"
+ depends on DRM_STM
+ select DRM_MIPI_DSI
+ select DRM_DW_MIPI_DSI
+ help
+ Choose this option for MIPI DSI support on STMicroelectronics SoC.
diff --git a/drivers/gpu/drm/stm/Makefile b/drivers/gpu/drm/stm/Makefile
index e114d45..8730a59 100644
--- a/drivers/gpu/drm/stm/Makefile
+++ b/drivers/gpu/drm/stm/Makefile
@@ -4,4 +4,6 @@ stm-drm-y := \
drv.o \
ltdc.o
+obj-$(CONFIG_DRM_STM_DSI) += dw_mipi_dsi-stm.o
+
obj-$(CONFIG_DRM_STM) += stm-drm.o
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
new file mode 100644
index 000..914f203
--- /dev/null
+++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
@@ -0,0 +1,328 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ *
+ * Authors: Philippe Cornu
+ * Yannick Fertre
+ *
+ * License terms: GNU General Public License (GPL), version 2
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* DSI wrapper register & bit definitions */
+/* Note: registers are named as in the Reference Manual */
+#define DSI_WCFGR 0x0400 /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0) /* DSI Mode */
+#define WCFGR_COLMUX GENMASK(3, 1) /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404 /* Wrapper Control Reg */
+#define WCR_DSIEN BIT(3) /* DSI ENable */
+
+#define DSI_WISR 0x040C /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8) /* PLL Lock Status */
+#define WISR_RRS BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0 0x0418 /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0) /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR 0x0430 /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0) /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2) /* pll loop DIVision Factor */
+#define WRPCR_IDF GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN 10
+#define NDIV_MAX 125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+ DSI_RGB565_CONF1, DSI_RGB565_CONF2, DSI_RGB565_CONF3,
+ DSI_RGB666_CONF1, DSI_RGB666_CONF2,
+ DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS 31250
+#define LANE_MAX_KBPS 50
+
+/* Sleep & timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define SLEEP_US 1000
+#define TIMEOUT_US 20
+
+struct dw_mipi_dsi_stm {
+ void __iomem *base;
+};
+
+static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val)
+{
+ writel_relaxed(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg)
+{
+ return readl_relaxed(dsi->base + reg);
+}
+
+static inline void dsi_set(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask)
+{
+ dsi_write(dsi, reg, dsi_read(dsi, reg) | mask);
+}
+
+static inline void dsi_clear(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask)
+{
+ dsi_write(dsi, reg, dsi_read(dsi, reg) & ~mask);
+}
+
+static inline void dsi_update_bits(struct dw_mipi_dsi_stm *dsi, u32 reg,
+ u32 mask, u32 val)
+{
+ dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val);
+}
+
+static enum dsi_color dsi_color_from_mipi(enum mipi_dsi_pixel_format fmt)
+{
+ switch (fmt) {
+ case MIPI_DSI_FMT_RGB888:
+ return DSI_RGB888;
+ case MIPI_DSI_FMT_RGB666:
+ return DSI_RGB666_CONF2;
+ case MIPI_DSI_FMT_RGB666_PACKED:
+ return DSI_RGB666_CONF1;
+ case MIPI_DSI_FMT_RGB565:
+ return DSI_RGB565_CONF1;
+ default:
+ DRM
Re: [drm:qxl] BUG: sleeping function called from invalid context - qxl_bo_kmap_atomic_page()...splat
On Thu, 2017-05-18 at 17:40 -0300, Gabriel Krisman Bertazi wrote: > > Mike Galbraith writes: > > > > > On Mon, 2017-05-08 at 16:48 -0300, Gabriel Krisman Bertazi wrote: > > > > > > > > Thanks for reporting this. Can you confirm the following patch prevents > > > the issue? > > > > Nope, it still gripes. > > Oops... Thanks for checking. The following patch fixes the issue for > me. Can you please test that one? Yup, all better. -Mike ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH] drm/stm: add COMPILE_TEST to Kconfig (fwd)
On 05/19/2017 09:49 AM, Julia Lawall wrote:
> On line 466, the preceeding comment suggests that the second constant
> should start with VS rather than HS again.
>
> julia
>
> -- Forwarded message --
> Date: Fri, 19 May 2017 15:45:39 +0800
> From: kbuild test robot
> To: kbu...@01.org
> Cc: Julia Lawall
> Subject: Re: [PATCH] drm/stm: add COMPILE_TEST to Kconfig
>
> CC: kbuild-...@01.org
> In-Reply-To: <1495082711-10535-1-git-send-email-yamada.masah...@socionext.com>
> TO: Masahiro Yamada
> CC: dri-devel@lists.freedesktop.org, Daniel Vetter ,
> linux-ker...@vger.kernel.org, Masahiro Yamada
> , Yannick Fertre ,
> Philippe Cornu , David Airlie
> CC: linux-ker...@vger.kernel.org, Masahiro Yamada
> , Yannick Fertre ,
> Philippe Cornu , David Airlie
>
> Hi Masahiro,
>
> [auto build test WARNING on drm/drm-next]
> [cannot apply to v4.12-rc1 next-20170518]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Masahiro-Yamada/drm-stm-add-COMPILE_TEST-to-Kconfig/20170519-131342
> base: git://people.freedesktop.org/~airlied/linux.git drm-next
> :: branch date: 3 hours ago
> :: commit date: 3 hours ago
>
>>> drivers/gpu/drm/stm/ltdc.c:466:7-15: duplicated argument to & or |
>
> git remote add linux-review https://github.com/0day-ci/linux
> git remote update linux-review
> git checkout c669a25d907f95d3e13f1dae9812642330b4aa28
> vim +466 drivers/gpu/drm/stm/ltdc.c
>
> b759012c Yannick Fertre 2017-04-14 450 accum_vbp = vsync +
> vm.vback_porch;
> b759012c Yannick Fertre 2017-04-14 451 accum_act_w = accum_hbp +
> vm.hactive;
> b759012c Yannick Fertre 2017-04-14 452 accum_act_h = accum_vbp +
> vm.vactive;
> b759012c Yannick Fertre 2017-04-14 453 total_width = accum_act_w +
> vm.hfront_porch;
> b759012c Yannick Fertre 2017-04-14 454 total_height = accum_act_h +
> vm.vfront_porch;
> b759012c Yannick Fertre 2017-04-14 455
> b759012c Yannick Fertre 2017-04-14 456 clk_disable(ldev->pixel_clk);
> b759012c Yannick Fertre 2017-04-14 457
> b759012c Yannick Fertre 2017-04-14 458 if
> (clk_set_rate(ldev->pixel_clk, rate) < 0) {
> b759012c Yannick Fertre 2017-04-14 459 DRM_ERROR("Cannot set
> rate (%dHz) for pixel clk\n", rate);
> b759012c Yannick Fertre 2017-04-14 460 return;
> b759012c Yannick Fertre 2017-04-14 461 }
> b759012c Yannick Fertre 2017-04-14 462
> b759012c Yannick Fertre 2017-04-14 463 clk_enable(ldev->pixel_clk);
> b759012c Yannick Fertre 2017-04-14 464
> b759012c Yannick Fertre 2017-04-14 465 /* Configures the HS, VS, DE
> and PC polarities. */
> b759012c Yannick Fertre 2017-04-14 @466 val = HSPOL_AL | HSPOL_AL |
> DEPOL_AL | PCPOL_IPC;
Thanks Julia for your comments.
Masahiro, may I ask you please to propose a patch (simply rename the 2nd
HSPOL_AL to VSPOL_AL at line 466.) as the issue is revealed by your
patch named "drm/stm: add COMPILE_TEST to Kconfig".
Many thanks,
Philippe
> b759012c Yannick Fertre 2017-04-14 467
> b759012c Yannick Fertre 2017-04-14 468 if (vm.flags &
> DISPLAY_FLAGS_HSYNC_HIGH)
> b759012c Yannick Fertre 2017-04-14 469 val |= HSPOL_AH;
> b759012c Yannick Fertre 2017-04-14 470
> b759012c Yannick Fertre 2017-04-14 471 if (vm.flags &
> DISPLAY_FLAGS_VSYNC_HIGH)
> b759012c Yannick Fertre 2017-04-14 472 val |= VSPOL_AH;
> b759012c Yannick Fertre 2017-04-14 473
> b759012c Yannick Fertre 2017-04-14 474 if (vm.flags &
> DISPLAY_FLAGS_DE_HIGH)
>
> :: The code at line 466 was first introduced by commit
> :: b759012c5fa761ee08998c80fc4ad6343c258487 drm/stm: Add STM32 LTDC driver
>
> :: TO: Yannick Fertre
> :: CC: Eric Anholt
>
> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all Intel Corporation
>
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[PATCH v2] gpu: drm: gma500: remove dead code
Local variable use_gct is assigned to a constant value and it is never
updated again. Remove this variable and the dead code it guards.
Addresses-Coverity-ID: 145690
Signed-off-by: Gustavo A. R. Silva
---
Changes in v2:
Remove variables ti and dev_priv, which was causing a compilation warning.
I have improved my testing to avoid similar issues in the future.
This is how I tested it this time:
$ make allmodconfig
$ make drivers/gpu/drm/gma500/mdfld_tpo_vid.o
drivers/gpu/drm/gma500/mdfld_tpo_vid.c | 53 ++
1 file changed, 9 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
b/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
index d8d4170..a9420bf 100644
--- a/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
+++ b/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
@@ -30,55 +30,20 @@
static struct drm_display_mode *tpo_vid_get_config_mode(struct drm_device *dev)
{
struct drm_display_mode *mode;
- struct drm_psb_private *dev_priv = dev->dev_private;
- struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
- bool use_gct = false;
mode = kzalloc(sizeof(*mode), GFP_KERNEL);
if (!mode)
return NULL;
- if (use_gct) {
- mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
- mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
- mode->hsync_start = mode->hdisplay +
- ((ti->hsync_offset_hi << 8) |
- ti->hsync_offset_lo);
- mode->hsync_end = mode->hsync_start +
- ((ti->hsync_pulse_width_hi << 8) |
- ti->hsync_pulse_width_lo);
- mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) |
- ti->hblank_lo);
- mode->vsync_start =
- mode->vdisplay + ((ti->vsync_offset_hi << 8) |
- ti->vsync_offset_lo);
- mode->vsync_end =
- mode->vsync_start + ((ti->vsync_pulse_width_hi << 8) |
- ti->vsync_pulse_width_lo);
- mode->vtotal = mode->vdisplay +
- ((ti->vblank_hi << 8) | ti->vblank_lo);
- mode->clock = ti->pixel_clock * 10;
-
- dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay);
- dev_dbg(dev->dev, "vdisplay is %d\n", mode->vdisplay);
- dev_dbg(dev->dev, "HSS is %d\n", mode->hsync_start);
- dev_dbg(dev->dev, "HSE is %d\n", mode->hsync_end);
- dev_dbg(dev->dev, "htotal is %d\n", mode->htotal);
- dev_dbg(dev->dev, "VSS is %d\n", mode->vsync_start);
- dev_dbg(dev->dev, "VSE is %d\n", mode->vsync_end);
- dev_dbg(dev->dev, "vtotal is %d\n", mode->vtotal);
- dev_dbg(dev->dev, "clock is %d\n", mode->clock);
- } else {
- mode->hdisplay = 864;
- mode->vdisplay = 480;
- mode->hsync_start = 873;
- mode->hsync_end = 876;
- mode->htotal = 887;
- mode->vsync_start = 487;
- mode->vsync_end = 490;
- mode->vtotal = 499;
- mode->clock = 33264;
- }
+ mode->hdisplay = 864;
+ mode->vdisplay = 480;
+ mode->hsync_start = 873;
+ mode->hsync_end = 876;
+ mode->htotal = 887;
+ mode->vsync_start = 487;
+ mode->vsync_end = 490;
+ mode->vtotal = 499;
+ mode->clock = 33264;
drm_mode_set_name(mode);
drm_mode_set_crtcinfo(mode, 0);
--
2.5.0
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Re: [linux-sunxi] Re: [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC
Hi, Dne petek, 19. maj 2017 ob 20:08:18 CEST je Icenowy Zheng napisal(a): > 于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard 写到: > >On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote: > >> Allwinner H3 features a TV encoder similar to the one in earlier > > > >SoCs, > > > >> but with some different points about clocks: > >> - It has a mod clock and a bus clock. > >> - The mod clock must be at a fixed rate to generate signal. > > > >Why? > > It's experiment result by Jernej. > > The clock rates in BSP kernel is also specially designed > (PLL_DE at 432MHz) in order to be able to feed the TVE. My experiments and search through BSP code showed that TVE seems to have additional fixed predivider 8. So if you want to generate 27 MHz clock, unit has to be feed with 216 MHz. TVE has only one PLL source PLL_DE. And since 216 MHz is a bit low for DE2, BSP defaults to 432 MHz for PLL_DE and use divider 2 to generate 216 MHz. This clock is then divided by 8 internaly to get final 27 MHz. Please note that I don't have any hard evidence to support that, only experimental data. However, only that explanation make sense to me. BTW, BSP H3/H5 TV driver supports only PAL and NTSC which both use 27 MHz base clock. Further experiments are needed to check if there is any possibility to have other resolutions by manipulating clocks and give other proper settings. I plan to do that, but not in very near future. Best regards, Jernej ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [Intel-gfx] [PATCH v8 3/5] drm/i915: Add option to support dynamic backlight via DPCD
Hi Dhinakaran,
Quick question
So what is the update about adding new option in i915_params?
Is this patch good to go after fixing the 2 points you mentioned?
Thanks
On Wed, May 17, 2017 at 1:33 PM, Pandiyan, Dhinakaran <
dhinakaran.pandi...@intel.com> wrote:
> On Tue, 2017-05-16 at 17:34 -0700, Puthikorn Voravootivat wrote:
> > This patch adds option to enable dynamic backlight for eDP
> > panel that supports this feature via DPCD register and
> > set minimum / maximum brightness to 0% and 100% of the
> > normal brightness.
> >
> > Signed-off-by: Puthikorn Voravootivat
> > ---
> > drivers/gpu/drm/i915/i915_params.c| 5
> > drivers/gpu/drm/i915/i915_params.h| 3 +-
> > drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 40
> +++
> > 3 files changed, 41 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> > index 13cf3f1572ab..6eaf660e74da 100644
> > --- a/drivers/gpu/drm/i915/i915_params.c
> > +++ b/drivers/gpu/drm/i915/i915_params.c
> > @@ -65,6 +65,7 @@ struct i915_params i915 __read_mostly = {
> > .inject_load_failure = 0,
> > .enable_dpcd_backlight = -1,
> > .enable_gvt = false,
> > + .enable_dbc = false,
> > };
> >
> > module_param_named(modeset, i915.modeset, int, 0400);
> > @@ -255,3 +256,7 @@ MODULE_PARM_DESC(enable_dpcd_backlight,
> > module_param_named(enable_gvt, i915.enable_gvt, bool, 0400);
> > MODULE_PARM_DESC(enable_gvt,
> > "Enable support for Intel GVT-g graphics virtualization host
> support(default:false)");
> > +
> > +module_param_named(enable_dbc, i915.enable_dbc, bool, 0600);
> > +MODULE_PARM_DESC(enable_dbc,
> > + "Enable support for dynamic backlight control (default:false)");
> > diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> > index ac02efce6e22..2de3e2850b54 100644
> > --- a/drivers/gpu/drm/i915/i915_params.h
> > +++ b/drivers/gpu/drm/i915/i915_params.h
> > @@ -67,7 +67,8 @@
> > func(bool, nuclear_pageflip); \
> > func(bool, enable_dp_mst); \
> > func(int, enable_dpcd_backlight); \
> > - func(bool, enable_gvt)
> > + func(bool, enable_gvt); \
> > + func(bool, enable_dbc)
> >
> > #define MEMBER(T, member) T member
> > struct i915_params {
> > diff --git a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> > index 16ba1924308d..c0eeb8fc2013 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_aux_backlight.c
> > @@ -100,10 +100,27 @@ intel_dp_aux_set_backlight(struct intel_connector
> *connector, u32 level)
> > }
> > }
> >
> > +/*
> > + * Set minimum / maximum dynamic brightness percentage. This value is
> expressed
> > + * as the percentage of normal brightness in 5% increments.
> > + */
> > +static void
> > +intel_dp_aux_set_dynamic_backlight_percent(struct intel_dp *intel_dp,
> > +u32 min, u32 max)
> > +{
> > + u8 dbc[] = { DIV_ROUND_CLOSEST(min, 5), DIV_ROUND_CLOSEST(max, 5)
> };
> > +
> > + if (drm_dp_dpcd_write(&intel_dp->aux,
> DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET,
> > + dbc, sizeof(dbc) < 0)) {
>
> Incorrect parentheses placement and return value check.
>
> > + DRM_DEBUG_KMS("Failed to write aux DBC brightness
> level\n");
> > + }
> > +}
> > +
> > static void intel_dp_aux_enable_backlight(struct intel_connector
> *connector)
> > {
> > struct intel_dp *intel_dp = enc_to_intel_dp(&connector->
> encoder->base);
> > uint8_t dpcd_buf = 0;
> > + uint8_t new_dpcd_buf = 0;
>
> nit: unnecessary initialization.
>
> > uint8_t edp_backlight_mode = 0;
> >
> > if (drm_dp_dpcd_readb(&intel_dp->aux,
> > @@ -113,18 +130,15 @@ static void intel_dp_aux_enable_backlight(struct
> intel_connector *connector)
> > return;
> > }
> >
> > + new_dpcd_buf = dpcd_buf;
> > edp_backlight_mode = dpcd_buf & DP_EDP_BACKLIGHT_CONTROL_MODE_
> MASK;
> >
> > switch (edp_backlight_mode) {
> > case DP_EDP_BACKLIGHT_CONTROL_MODE_PWM:
> > case DP_EDP_BACKLIGHT_CONTROL_MODE_PRESET:
> > case DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT:
> > - dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
> > - dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD;
> > - if (drm_dp_dpcd_writeb(&intel_dp->aux,
> > - DP_EDP_BACKLIGHT_MODE_SET_REGISTER, dpcd_buf) <
> 0) {
> > - DRM_DEBUG_KMS("Failed to write aux backlight
> mode\n");
> > - }
> > + new_dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK;
> > + new_dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD;
> > break;
> >
> > /* Do nothing when it is already DPCD mode */
> > @@ -133,6 +147,20 @@ static void intel_dp_aux_enable_backlight(struct
> intel_connector *connec
[PATCH v2 1/3] drm/radeon: Cleanup display interrupt handling for evergreen, si
The current code here is really, really bad. A huge amount of it looks
to be copy pasted, it has some weird hatred of arrays and code sharing,
switch cases everywhere for things that really don't need them, and it
makes the file seem immensely more complex then it actually is. This is
a pain for maintanence, and is vulnerable to more weird irq handling
bugs.
So, let's start cleaning this up a bit. Modify all of the IRQ handlers
for evergreen/si so that they just use for loops. As well, we add a
helper function radeon_irq_kms_set_irq_n_enabled(), whose purpose is
just to update the state of registers that enable/disable interrupts
while printing any changes to the set of enabled interrupts to the
kernel log.
Note in this commit, since vblank/vline irq acking is intertwined with
page flip irq acking, we can't cut out all of the copy paste in
evergreen/si_irq_ack() just yet.
Changes since v1:
- Preserve order we write back all registers
Signed-off-by: Lyude
---
drivers/gpu/drm/radeon/evergreen.c | 729 +++-
drivers/gpu/drm/radeon/radeon.h | 13 +-
drivers/gpu/drm/radeon/radeon_irq_kms.c | 35 ++
drivers/gpu/drm/radeon/si.c | 596 ++
4 files changed, 314 insertions(+), 1059 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index 0bf1035..44ac6d3 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -35,6 +35,10 @@
#include "evergreen_blit_shaders.h"
#include "radeon_ucode.h"
+#define DC_HPDx_CONTROL(x)(DC_HPD1_CONTROL + (x * 0xc))
+#define DC_HPDx_INT_CONTROL(x)(DC_HPD1_INT_CONTROL + (x * 0xc))
+#define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
+
/*
* Indirect registers accessor
*/
@@ -1714,38 +1718,10 @@ void evergreen_pm_finish(struct radeon_device *rdev)
*/
bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
{
- bool connected = false;
-
- switch (hpd) {
- case RADEON_HPD_1:
- if (RREG32(DC_HPD1_INT_STATUS) & DC_HPDx_SENSE)
- connected = true;
- break;
- case RADEON_HPD_2:
- if (RREG32(DC_HPD2_INT_STATUS) & DC_HPDx_SENSE)
- connected = true;
- break;
- case RADEON_HPD_3:
- if (RREG32(DC_HPD3_INT_STATUS) & DC_HPDx_SENSE)
- connected = true;
- break;
- case RADEON_HPD_4:
- if (RREG32(DC_HPD4_INT_STATUS) & DC_HPDx_SENSE)
- connected = true;
- break;
- case RADEON_HPD_5:
- if (RREG32(DC_HPD5_INT_STATUS) & DC_HPDx_SENSE)
- connected = true;
- break;
- case RADEON_HPD_6:
- if (RREG32(DC_HPD6_INT_STATUS) & DC_HPDx_SENSE)
- connected = true;
- break;
- default:
- break;
- }
+ if (hpd == RADEON_HPD_NONE)
+ return false;
- return connected;
+ return !!(RREG32(DC_HPDx_INT_STATUS_REG(hpd)) & DC_HPDx_SENSE);
}
/**
@@ -1759,61 +1735,15 @@ bool evergreen_hpd_sense(struct radeon_device *rdev,
enum radeon_hpd_id hpd)
void evergreen_hpd_set_polarity(struct radeon_device *rdev,
enum radeon_hpd_id hpd)
{
- u32 tmp;
bool connected = evergreen_hpd_sense(rdev, hpd);
- switch (hpd) {
- case RADEON_HPD_1:
- tmp = RREG32(DC_HPD1_INT_CONTROL);
- if (connected)
- tmp &= ~DC_HPDx_INT_POLARITY;
- else
- tmp |= DC_HPDx_INT_POLARITY;
- WREG32(DC_HPD1_INT_CONTROL, tmp);
- break;
- case RADEON_HPD_2:
- tmp = RREG32(DC_HPD2_INT_CONTROL);
- if (connected)
- tmp &= ~DC_HPDx_INT_POLARITY;
- else
- tmp |= DC_HPDx_INT_POLARITY;
- WREG32(DC_HPD2_INT_CONTROL, tmp);
- break;
- case RADEON_HPD_3:
- tmp = RREG32(DC_HPD3_INT_CONTROL);
- if (connected)
- tmp &= ~DC_HPDx_INT_POLARITY;
- else
- tmp |= DC_HPDx_INT_POLARITY;
- WREG32(DC_HPD3_INT_CONTROL, tmp);
- break;
- case RADEON_HPD_4:
- tmp = RREG32(DC_HPD4_INT_CONTROL);
- if (connected)
- tmp &= ~DC_HPDx_INT_POLARITY;
- else
- tmp |= DC_HPDx_INT_POLARITY;
- WREG32(DC_HPD4_INT_CONTROL, tmp);
- break;
- case RADEON_HPD_5:
- tmp = RREG32(DC_HPD5_INT_CONTROL);
- if (connected)
- tmp &= ~DC_HPDx_INT_POLARITY;
- else
- tmp |= DC_HPDx_INT_POLARITY
[PATCH v2 3/3] drm/radeon: Cleanup pageflipping IRQ handling for evergreen, si
Same as the previous patch, but for pageflipping now. This also lets us
clear up the copy paste for vblank/vline IRQs.
Changes since v1:
- Preserve the order all registers are written back
Signed-off-by: Lyude
---
drivers/gpu/drm/radeon/evergreen.c | 105 ---
drivers/gpu/drm/radeon/radeon.h| 7 +--
drivers/gpu/drm/radeon/si.c| 111 +
3 files changed, 51 insertions(+), 172 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index 507a773..44527e6 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4467,17 +4467,8 @@ void evergreen_disable_interrupt_state(struct
radeon_device *rdev)
WREG32(SRBM_INT_CNTL, 0);
for (i = 0; i < rdev->num_crtc; i++)
WREG32(INT_MASK + crtc_offsets[i], 0);
-
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
- if (rdev->num_crtc >= 4) {
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);
- }
- if (rdev->num_crtc >= 6) {
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
- }
+ for (i = 0; i < rdev->num_crtc; i++)
+ WREG32(GRPH_INT_CONTROL + crtc_offsets[i], 0);
/* only one DAC on DCE5 */
if (!ASIC_IS_DCE5(rdev))
@@ -4581,22 +4572,8 @@ int evergreen_irq_set(struct radeon_device *rdev)
atomic_read(&rdev->irq.pflip[i]), "vblank", i);
}
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET,
- GRPH_PFLIP_INT_MASK);
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET,
- GRPH_PFLIP_INT_MASK);
- if (rdev->num_crtc >= 4) {
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET,
- GRPH_PFLIP_INT_MASK);
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET,
- GRPH_PFLIP_INT_MASK);
- }
- if (rdev->num_crtc >= 6) {
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,
- GRPH_PFLIP_INT_MASK);
- WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET,
- GRPH_PFLIP_INT_MASK);
- }
+ for (i = 0; i < rdev->num_crtc; i++)
+ WREG32(GRPH_INT_CONTROL + crtc_offsets[i], GRPH_PFLIP_INT_MASK);
for (i = 0; i < 6; i++) {
radeon_irq_kms_set_irq_n_enabled(
@@ -4626,68 +4603,34 @@ int evergreen_irq_set(struct radeon_device *rdev)
/* Note that the order we write back regs here is important */
static void evergreen_irq_ack(struct radeon_device *rdev)
{
- int i;
+ int i, j;
+ u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int;
u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int;
u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status;
for (i = 0; i < 6; i++) {
disp_int[i] = RREG32(evergreen_disp_int_status[i]);
afmt_status[i] = RREG32(AFMT_STATUS + crtc_offsets[i]);
+ if (i < rdev->num_crtc)
+ grph_int[i] = RREG32(GRPH_INT_STATUS + crtc_offsets[i]);
}
- rdev->irq.stat_regs.evergreen.d1grph_int = RREG32(GRPH_INT_STATUS +
EVERGREEN_CRTC0_REGISTER_OFFSET);
- rdev->irq.stat_regs.evergreen.d2grph_int = RREG32(GRPH_INT_STATUS +
EVERGREEN_CRTC1_REGISTER_OFFSET);
- if (rdev->num_crtc >= 4) {
- rdev->irq.stat_regs.evergreen.d3grph_int =
RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET);
- rdev->irq.stat_regs.evergreen.d4grph_int =
RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET);
- }
- if (rdev->num_crtc >= 6) {
- rdev->irq.stat_regs.evergreen.d5grph_int =
RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET);
- rdev->irq.stat_regs.evergreen.d6grph_int =
RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET);
- }
-
-
- if (rdev->irq.stat_regs.evergreen.d1grph_int & GRPH_PFLIP_INT_OCCURRED)
- WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET,
GRPH_PFLIP_INT_CLEAR);
- if (rdev->irq.stat_regs.evergreen.d2grph_int & GRPH_PFLIP_INT_OCCURRED)
- WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET,
GRPH_PFLIP_INT_CLEAR);
- if (disp_int[0] & LB_D1_VBLANK_INTERRUPT)
- WREG32(VBLANK_STATUS + crtc_offsets[0], VBLANK_ACK);
- if (disp_int[0] & LB_D1_VLINE_INTERRUPT)
- WREG32(VLINE_STATUS + crtc_offsets[0], VLINE_ACK);
- if (disp_int[1] & LB_D1_VBLANK_INTERRUPT)
- WREG32(VBLANK_STATUS + crtc_offsets[1], V
[PATCH v2 2/3] drm/radeon: Cleanup HDMI audio interrupt handling for evergreen
Same as the previous patch, but now for handling HDMI audio interrupts.
Changes since v1:
- Preserve the order we write back all registers
Signed-off-by: Lyude
---
drivers/gpu/drm/radeon/evergreen.c | 153 +++--
drivers/gpu/drm/radeon/radeon.h| 7 +-
2 files changed, 27 insertions(+), 133 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c
b/drivers/gpu/drm/radeon/evergreen.c
index 44ac6d3..507a773 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4495,7 +4495,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
u32 cp_int_cntl = CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE;
u32 cp_int_cntl1 = 0, cp_int_cntl2 = 0;
u32 grbm_int_cntl = 0;
- u32 afmt1 = 0, afmt2 = 0, afmt3 = 0, afmt4 = 0, afmt5 = 0, afmt6 = 0;
u32 dma_cntl, dma_cntl1 = 0;
u32 thermal_int = 0;
@@ -4518,13 +4517,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
thermal_int = RREG32(CG_THERMAL_INT) &
~(THERM_INT_MASK_HIGH | THERM_INT_MASK_LOW);
- afmt1 = RREG32(AFMT_AUDIO_PACKET_CONTROL +
EVERGREEN_CRTC0_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
- afmt2 = RREG32(AFMT_AUDIO_PACKET_CONTROL +
EVERGREEN_CRTC1_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
- afmt3 = RREG32(AFMT_AUDIO_PACKET_CONTROL +
EVERGREEN_CRTC2_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
- afmt4 = RREG32(AFMT_AUDIO_PACKET_CONTROL +
EVERGREEN_CRTC3_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
- afmt5 = RREG32(AFMT_AUDIO_PACKET_CONTROL +
EVERGREEN_CRTC4_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
- afmt6 = RREG32(AFMT_AUDIO_PACKET_CONTROL +
EVERGREEN_CRTC5_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
-
dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
if (rdev->family >= CHIP_CAYMAN) {
@@ -4567,31 +4559,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
thermal_int |= THERM_INT_MASK_HIGH | THERM_INT_MASK_LOW;
}
- if (rdev->irq.afmt[0]) {
- DRM_DEBUG("evergreen_irq_set: hdmi 0\n");
- afmt1 |= AFMT_AZ_FORMAT_WTRIG_MASK;
- }
- if (rdev->irq.afmt[1]) {
- DRM_DEBUG("evergreen_irq_set: hdmi 1\n");
- afmt2 |= AFMT_AZ_FORMAT_WTRIG_MASK;
- }
- if (rdev->irq.afmt[2]) {
- DRM_DEBUG("evergreen_irq_set: hdmi 2\n");
- afmt3 |= AFMT_AZ_FORMAT_WTRIG_MASK;
- }
- if (rdev->irq.afmt[3]) {
- DRM_DEBUG("evergreen_irq_set: hdmi 3\n");
- afmt4 |= AFMT_AZ_FORMAT_WTRIG_MASK;
- }
- if (rdev->irq.afmt[4]) {
- DRM_DEBUG("evergreen_irq_set: hdmi 4\n");
- afmt5 |= AFMT_AZ_FORMAT_WTRIG_MASK;
- }
- if (rdev->irq.afmt[5]) {
- DRM_DEBUG("evergreen_irq_set: hdmi 5\n");
- afmt6 |= AFMT_AZ_FORMAT_WTRIG_MASK;
- }
-
if (rdev->family >= CHIP_CAYMAN) {
cayman_cp_int_cntl_setup(rdev, 0, cp_int_cntl);
cayman_cp_int_cntl_setup(rdev, 1, cp_int_cntl1);
@@ -4643,12 +4610,12 @@ int evergreen_irq_set(struct radeon_device *rdev)
else
WREG32(CG_THERMAL_INT, thermal_int);
- WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET,
afmt1);
- WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET,
afmt2);
- WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET,
afmt3);
- WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET,
afmt4);
- WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,
afmt5);
- WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET,
afmt6);
+ for (i = 0; i < 6; i++) {
+ radeon_irq_kms_set_irq_n_enabled(
+ rdev, AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i],
+ AFMT_AZ_FORMAT_WTRIG_MASK,
+ rdev->irq.afmt[i], "HDMI", i);
+ }
/* posting read */
RREG32(SRBM_STATUS);
@@ -4661,10 +4628,12 @@ static void evergreen_irq_ack(struct radeon_device
*rdev)
{
int i;
u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int;
- u32 tmp;
+ u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status;
- for (i = 0; i < 6; i++)
+ for (i = 0; i < 6; i++) {
disp_int[i] = RREG32(evergreen_disp_int_status[i]);
+ afmt_status[i] = RREG32(AFMT_STATUS + crtc_offsets[i]);
+ }
rdev->irq.stat_regs.evergreen.d1grph_int = RREG32(GRPH_INT_STATUS +
EVERGREEN_CRTC0_REGISTER_OFFSET);
rdev->irq.stat_regs.evergreen.d2grph_int = RREG32(GRPH_INT_STATUS +
EVERGREEN_CRTC1_REGISTER_OFFSET);
@@ -4677,12 +4646,6 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
rdev->irq.stat_regs.evergreen.d6grph_int =
RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5
[PATCH v2 0/3] Cleanup evergreen/si IRQ handling code
This is the first part of me going through and cleaning up the IRQ handling code for radeon, since after taking a look at it the other day while trying to debug something I realized basically all of the code was copy pasted everywhere, and quite difficult to actually read through. Will come up with something for r600 and cik once I've got the chipsets on hand to test with. Lyude (3): drm/radeon: Cleanup display interrupt handling for evergreen, si drm/radeon: Cleanup HDMI audio interrupt handling for evergreen drm/radeon: Cleanup pageflipping IRQ handling for evergreen, si drivers/gpu/drm/radeon/evergreen.c | 943 ++-- drivers/gpu/drm/radeon/radeon.h | 27 +- drivers/gpu/drm/radeon/radeon_irq_kms.c | 35 ++ drivers/gpu/drm/radeon/si.c | 655 +- 4 files changed, 344 insertions(+), 1316 deletions(-) -- 2.9.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 91880] Radeonsi on Grenada cards (r9 390) exceptionally unstable and poorly performing
https://bugs.freedesktop.org/show_bug.cgi?id=91880 --- Comment #152 from Alfredo Mendez --- (In reply to Marek Olšák from comment #151) > Alfredo, did you try to switch the TDP switch on the side of the card? Yeah, and the system eventually was hit with a blackscreen. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v4 1/2] drm/blend: Fix comment typ-o
Fix DRM_REFELCT_Y -> DRM_REFLECT_Y. Signed-off-by: Robert Foss --- drivers/gpu/drm/drm_blend.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c index a0d0d6843288..dee67ef6c670 100644 --- a/drivers/gpu/drm/drm_blend.c +++ b/drivers/gpu/drm/drm_blend.c @@ -129,7 +129,7 @@ * "rotate-270" * DRM_REFLECT_X: * "reflect-x" - * DRM_REFELCT_Y: + * DRM_REFLECT_Y: * "reflect-y" * * Rotation is the specified amount in degrees in counter clockwise direction, -- 2.11.0.453.g787f75f05 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v4 2/2] drm: Add DRM_MODE_ROTATE_ and DRM_MODE_REFLECT_ to UAPI
Add DRM_MODE_ROTATE_ and DRM_MODE_REFLECT_ defines to the UAPI
as a convenience.
Ideally the DRM_ROTATE_ and DRM_REFLECT_ property ids are looked up
through the atomic API, but realizing that userspace is likely to take
shortcuts and assume that the enum values are what is sent over the
wire.
As a result these defines are provided purely as a convenience to
userspace applications.
Signed-off-by: Robert Foss
Reviewed-by: Emil Velikov
Reviewed-by: Sinclair Yeh
Acked-by: Liviu Dudau
---
Changes since v3:
- Switched away from past tense in comments
- Add define name change to previously mis-spelled DRM_REFLECT_X comment
- Improved the comment for the DRM_MODE_REFLECT_ comment
Changes since v2:
- Changed define prefix from DRM_MODE_PROP_ to DRM_MODE_
- Fix compilation errors
- Changed comment formatting
- Deduplicated comment lines
- Clarified DRM_MODE_PROP_REFLECT_ comment
Changes since v1:
- Moved defines from drm.h to drm_mode.h
- Changed define prefix from DRM_ to DRM_MODE_PROP_
- Updated uses of the defines to the new prefix
- Removed include from drm_rect.c
- Stopped using the BIT() macro
drivers/gpu/drm/arm/malidp_drv.h| 2 +-
drivers/gpu/drm/arm/malidp_planes.c | 18 -
drivers/gpu/drm/armada/armada_overlay.c | 2 +-
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 20 +-
drivers/gpu/drm/drm_atomic.c| 2 +-
drivers/gpu/drm/drm_atomic_helper.c | 2 +-
drivers/gpu/drm/drm_blend.c | 45 +++---
drivers/gpu/drm/drm_fb_helper.c | 4 +-
drivers/gpu/drm/drm_plane_helper.c | 2 +-
drivers/gpu/drm/drm_rect.c | 36 +-
drivers/gpu/drm/i915/i915_debugfs.c | 14 +++
drivers/gpu/drm/i915/intel_atomic_plane.c | 6 +--
drivers/gpu/drm/i915/intel_display.c| 50 -
drivers/gpu/drm/i915/intel_fbc.c| 2 +-
drivers/gpu/drm/i915/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/intel_sprite.c | 20 +-
drivers/gpu/drm/imx/ipuv3-plane.c | 2 +-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 30 +++
drivers/gpu/drm/nouveau/nv50_display.c | 2 +-
drivers/gpu/drm/omapdrm/omap_drv.c | 4 +-
drivers/gpu/drm/omapdrm/omap_fb.c | 18 -
drivers/gpu/drm/omapdrm/omap_plane.c| 16
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 4 +-
include/drm/drm_blend.h | 21 +--
include/uapi/drm/drm_mode.h | 49 +++-
25 files changed, 202 insertions(+), 171 deletions(-)
diff --git a/drivers/gpu/drm/arm/malidp_drv.h b/drivers/gpu/drm/arm/malidp_drv.h
index 040311ffcaec..2e2033140efc 100644
--- a/drivers/gpu/drm/arm/malidp_drv.h
+++ b/drivers/gpu/drm/arm/malidp_drv.h
@@ -65,6 +65,6 @@ void malidp_de_planes_destroy(struct drm_device *drm);
int malidp_crtc_init(struct drm_device *drm);
/* often used combination of rotational bits */
-#define MALIDP_ROTATED_MASK(DRM_ROTATE_90 | DRM_ROTATE_270)
+#define MALIDP_ROTATED_MASK(DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
#endif /* __MALIDP_DRV_H__ */
diff --git a/drivers/gpu/drm/arm/malidp_planes.c
b/drivers/gpu/drm/arm/malidp_planes.c
index 814fda23cead..063a8d2b0be3 100644
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -80,7 +80,7 @@ static void malidp_plane_reset(struct drm_plane *plane)
state = kzalloc(sizeof(*state), GFP_KERNEL);
if (state) {
state->base.plane = plane;
- state->base.rotation = DRM_ROTATE_0;
+ state->base.rotation = DRM_MODE_ROTATE_0;
plane->state = &state->base;
}
}
@@ -221,7 +221,7 @@ static int malidp_de_plane_check(struct drm_plane *plane,
return ret;
/* packed RGB888 / BGR888 can't be rotated or flipped */
- if (state->rotation != DRM_ROTATE_0 &&
+ if (state->rotation != DRM_MODE_ROTATE_0 &&
(fb->format->format == DRM_FORMAT_RGB888 ||
fb->format->format == DRM_FORMAT_BGR888))
return -EINVAL;
@@ -315,12 +315,12 @@ static void malidp_de_plane_update(struct drm_plane
*plane,
val &= ~LAYER_ROT_MASK;
/* setup the rotation and axis flip bits */
- if (plane->state->rotation & DRM_ROTATE_MASK)
- val |= ilog2(plane->state->rotation & DRM_ROTATE_MASK) <<
+ if (plane->state->rotation & DRM_MODE_ROTATE_MASK)
+ val |= ilog2(plane->state->rotation & DRM_MODE_ROTATE_MASK) <<
LAYER_ROT_OFFSET;
- if (plane->state->rotation & DRM_REFLECT_X)
+ if (plane->state->rotation & DRM_MODE_REFLECT_X)
val |= LAYER_H_FLIP;
- if (plane->state->rotation & DRM_REFLECT_Y)
+ if (plane->state->rotation &
Re: [PATCH v3] drm: Add DRM_MODE_ROTATE_ and DRM_MODE_REFLECT_ to UAPI
On 2017-05-18 05:49 AM, Ville Syrjälä wrote:
On Wed, May 17, 2017 at 09:39:11PM -0400, Robert Foss wrote:
+/*
+ * DRM_MODE_REFLECT_
+ *
+ * Signals that the contents of a drm plane has been reflected in
+ * the axis.
Still vague.
Ack, I'll add some verbiage.
Also you didn't respond to my comment about the use of past tense.
Fixed in v4.
Rob.
+ *
+ * This define is provided as a convenience, looking up the property id
+ * using the name->prop id lookup is the preferred method.
+ */
+#define DRM_MODE_REFLECT_X (1<<4)
+#define DRM_MODE_REFLECT_Y (1<<5)
+
+/*
+ * DRM_MODE_REFLECT_MASK
+ *
+ * Bitmask used to look for drm plane reflections.
+ */
+#define DRM_MODE_REFLECT_MASK (\
+ DRM_MODE_REFLECT_X | \
+ DRM_MODE_REFLECT_Y)
+
+
struct drm_mode_modeinfo {
__u32 clock;
__u16 hdisplay;
--
2.11.0.453.g787f75f05
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Re: [PATCH][drm-next] drm/pl111: make structure pl111_display_funcs static
On Fri, May 19, 2017 at 01:08:20PM -0700, Eric Anholt wrote: > OK, that's definitely not how I've read the > Documentation/process/submitting-patches.rst description of the Fixes > tag, which talks about bugs found with git bisect and things that should > go to -stable. I would not have considered what this patch is changing > to be a bug. True. I don't consider this a bug either. I wouldn't have included a Fixes tag. I pretty much agree with the submitting-patches.rst except it should probably say to include it on more stuff. Fixes: tags are required for all bugfixes to netdev for example. regards, dan carpenter ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH][drm-next] drm/pl111: make structure pl111_display_funcs static
Dan Carpenter writes:
> On Fri, May 19, 2017 at 03:03:31PM +0300, Jani Nikula wrote:
>> On Fri, 19 May 2017, Colin King wrote:
>> > From: Colin Ian King
>> >
>> > structure pl111_display_funcs can be made static as it does not need to be
>> > in global scope. Fixes sparse warning:
>> >
>> > "warning: symbol 'pl111_display_funcs' was not declared. Should it
>> > be static?"
>> >
>> > Fixes: bed41005e6174d ("drm/pl111: Initial drm/kms driver for pl111")
>>
>> The patch looks good and I appreciate what you're doing, but I question
>> the usefulness of adding Fixes: tags for trivial stuff like this. I'd
>> prefer Fixes: was reserved for actual fixes that should be backported to
>> any kernels that have the commit being fixed.
>>
>> The same applies to many other patches you've sent recently.
>>
>
> The Fixes tag is so so useful for everything. It should be included
> in every bugfix. (I am the inventor of the Fixes tag).
>
> I told Colin to include the Fixes tag on everything. My review process
> is partly "How was this bug introduced? How can we prevent it from
> happening again? Who was the original author and have they reviewed the
> proposed fix?" So I end up looking up the original commit anyway. It
> helps me a lot to have the Fixes tag there.
>
> The Fixes tag is obviously useful for the stable people as well, but
> that wasn't really the point.
OK, that's definitely not how I've read the
Documentation/process/submitting-patches.rst description of the Fixes
tag, which talks about bugs found with git bisect and things that should
go to -stable. I would not have considered what this patch is changing
to be a bug.
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[git pull] drm fixes for 4.12-rc2
Hi Linus, Just some drm fixes for 4.12-rc2, mostly nouveau and i915, fairly quiet as usual for rc2. Dave. The following changes since commit 8b4822de59d5d9919b9b045183a36c673ce20b73: Merge tag 'md/4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/shli/md (2017-05-18 12:04:41 -0700) are available in the git repository at: git://people.freedesktop.org/~airlied/linux tags/drm-fixes-for-v4.12-rc2 for you to fetch changes up to d51aff16e821a755c242e14168f5d4601199eafd: Merge branch 'for-upstream/hdlcd' of git://linux-arm.org/linux-ld into drm-fixes (2017-05-20 06:00:49 +1000) i915, nouveau, hdlcd and misc fixes. Ander Conselvan de Oliveira (1): drm/i915/glk: Fix DSI "*ERROR* ULPS is still active" messages Arnd Bergmann (1): gpu: host1x: select IOMMU_IOVA Boris Brezillon (1): drm/atmel-hlcdc: Fix output initialization Christophe JAILLET (1): drm/nouveau/secboot: plug memory leak in ls_ucode_img_load_gr() error path Chuanxiao Dong (1): drm/i915/gvt: not to restore in-context mmio Colin Ian King (1): drm/i915/gvt: fix typo: "supporte" -> "support" Dan Carpenter (1): drm/nouveau/fifo/gk104-: Silence a locking warning Dave Airlie (5): Merge branch 'etnaviv/fixes' of https://git.pengutronix.de/git/lst/linux into drm-fixes Merge tag 'drm-misc-fixes-2017-05-18' of git://anongit.freedesktop.org/git/drm-misc into drm-fixes Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-fixes Merge tag 'drm-intel-fixes-2017-05-18-1' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes Merge branch 'for-upstream/hdlcd' of git://linux-arm.org/linux-ld into drm-fixes Jani Nikula (1): Merge tag 'gvt-fixes-2017-05-11' of https://github.com/01org/gvt-linux into drm-intel-fixes Liviu Dudau (1): drm: hdlcd: Fix the calculation of the scanout start address Lucas Stach (1): drm/etnaviv: don't put fence in case of submit failure Matthew Auld (1): drm/i915: don't do allocate_va_range again on PIN_UPDATE Peter Ujfalusi (1): drm/nouveau: Fix drm poll_helper handling Ping Gao (1): drm/i915/gvt: avoid unnecessary vgpu switch Ville Syrjälä (2): drm/i915: Fix runtime PM for LPE audio drm/i915: Fix rawclk readout for g4x drivers/gpu/drm/arm/hdlcd_crtc.c | 47 ++ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c | 36 +++-- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 4 +- drivers/gpu/drm/i915/gvt/handlers.c| 2 +- drivers/gpu/drm/i915/gvt/render.c | 3 ++ drivers/gpu/drm/i915/gvt/sched_policy.c| 8 +++- drivers/gpu/drm/i915/i915_gem_gtt.c| 12 -- drivers/gpu/drm/i915/i915_reg.h| 10 +++-- drivers/gpu/drm/i915/intel_cdclk.c | 6 +-- drivers/gpu/drm/i915/intel_dsi.c | 7 ++-- drivers/gpu/drm/i915/intel_lpe_audio.c | 5 +++ drivers/gpu/drm/nouveau/nouveau_display.c | 6 +-- drivers/gpu/drm/nouveau/nouveau_drm.c | 6 +-- drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c | 3 +- .../drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c | 4 +- drivers/gpu/host1x/Kconfig | 1 + sound/x86/intel_hdmi_audio.c | 4 -- 17 files changed, 94 insertions(+), 70 deletions(-) ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH][drm-next] drm/pl111: make structure pl111_display_funcs static
On Fri, May 19, 2017 at 03:03:31PM +0300, Jani Nikula wrote:
> On Fri, 19 May 2017, Colin King wrote:
> > From: Colin Ian King
> >
> > structure pl111_display_funcs can be made static as it does not need to be
> > in global scope. Fixes sparse warning:
> >
> > "warning: symbol 'pl111_display_funcs' was not declared. Should it
> > be static?"
> >
> > Fixes: bed41005e6174d ("drm/pl111: Initial drm/kms driver for pl111")
>
> The patch looks good and I appreciate what you're doing, but I question
> the usefulness of adding Fixes: tags for trivial stuff like this. I'd
> prefer Fixes: was reserved for actual fixes that should be backported to
> any kernels that have the commit being fixed.
>
> The same applies to many other patches you've sent recently.
>
The Fixes tag is so so useful for everything. It should be included
in every bugfix. (I am the inventor of the Fixes tag).
I told Colin to include the Fixes tag on everything. My review process
is partly "How was this bug introduced? How can we prevent it from
happening again? Who was the original author and have they reviewed the
proposed fix?" So I end up looking up the original commit anyway. It
helps me a lot to have the Fixes tag there.
The Fixes tag is obviously useful for the stable people as well, but
that wasn't really the point.
regards,
dan carpenter
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Re: [PATCH][drm-next] drm/pl111: make structure pl111_display_funcs static
On Fri, May 19, 2017 at 11:19:03AM -0700, Eric Anholt wrote:
> Jani Nikula writes:
>
> > On Fri, 19 May 2017, Colin King wrote:
> >> From: Colin Ian King
> >>
> >> structure pl111_display_funcs can be made static as it does not need to be
> >> in global scope. Fixes sparse warning:
> >>
> >> "warning: symbol 'pl111_display_funcs' was not declared. Should it
> >> be static?"
> >>
> >> Fixes: bed41005e6174d ("drm/pl111: Initial drm/kms driver for pl111")
> >
> > The patch looks good and I appreciate what you're doing, but I question
> > the usefulness of adding Fixes: tags for trivial stuff like this. I'd
> > prefer Fixes: was reserved for actual fixes that should be backported to
> > any kernels that have the commit being fixed.
>
> Agreed -- since Fixes implies going to stable, we don't want it on
> non-stable-candidates like this. Reviewed these two and will push
> without the tag in a moment.
Fixes does NOT imply that it goes to stable. Only a
Cc: implies that.
Fixes is purely informational to show where the bug was introduced.
Just today I was using it to see if API changes introduce a bugs that
take months to fix.
regards,
dan carpenter
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Re: [PATCH][drm-next] drm/i915: Check for allocation failure
On Fri, May 19, 2017 at 06:56:17PM +0100, Colin King wrote:
> From: Colin Ian King
>
> The memory allocation for C is not being null checked and hence we
> could end up with a null pointer dereference. Fix this with a null
> pointer check. (I really should have noticed this when I was fixing an
> earlier issue.)
>
> Detected by CoverityScan, CID#1436406 ("Dereference null return")
>
> Fixes: 47624cc3301b60 ("drm/i915: Import the kfence selftests for
> i915_sw_fence")
> Signed-off-by: Colin Ian King
Pushed, thanks very much for the patch.
-Chris
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Re: [PATCH v2 1/5] drm/stm: ltdc: Add bridge support
Philippe CORNU writes: > Add the bridge support, used by DSI host and HDMI/LVDS bridges. > > Signed-off-by: Philippe CORNU The DW DSI host is bridging from MIPI DPI to MIPI DSI, right? I think you could just have ltdc always set up a DPI encoder (the ltdc_rgb_encoder_create() function), and then depending on whether drm_of_find_panel_or_bridge() finds you a panel or a bridge, you drm_panel_attach() or drm_bridge_attach(). You wouldn't even need to wrap the drm_panel_prepare() and related calls with a check for the panel, because the inlines already do that. signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH][drm-next] drm/pl111: make structure pl111_display_funcs static
Jani Nikula writes:
> On Fri, 19 May 2017, Colin King wrote:
>> From: Colin Ian King
>>
>> structure pl111_display_funcs can be made static as it does not need to be
>> in global scope. Fixes sparse warning:
>>
>> "warning: symbol 'pl111_display_funcs' was not declared. Should it
>> be static?"
>>
>> Fixes: bed41005e6174d ("drm/pl111: Initial drm/kms driver for pl111")
>
> The patch looks good and I appreciate what you're doing, but I question
> the usefulness of adding Fixes: tags for trivial stuff like this. I'd
> prefer Fixes: was reserved for actual fixes that should be backported to
> any kernels that have the commit being fixed.
Agreed -- since Fixes implies going to stable, we don't want it on
non-stable-candidates like this. Reviewed these two and will push
without the tag in a moment.
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Re: [PATCH] drm/pl111: Add a debugfs node to dump our registers.
Eric Engestrom writes:
> On Wednesday, 2017-05-17 17:56:40 -0700, Eric Anholt wrote:
>> While debugging an X11 display failure, I wanted to see where we were
>> actually scanning out from. This is probably generally useful to
>> others that might be working on this device.
>>
>> Signed-off-by: Eric Anholt
>> ---
>> drivers/gpu/drm/pl111/Makefile| 2 ++
>> drivers/gpu/drm/pl111/pl111_debugfs.c | 55
>> +++
>> drivers/gpu/drm/pl111/pl111_drm.h | 3 ++
>> drivers/gpu/drm/pl111/pl111_drv.c | 4 +++
>> 4 files changed, 64 insertions(+)
>> create mode 100644 drivers/gpu/drm/pl111/pl111_debugfs.c
>>
>> diff --git a/drivers/gpu/drm/pl111/Makefile b/drivers/gpu/drm/pl111/Makefile
>> index 01caee727c13..59483d610ef5 100644
>> --- a/drivers/gpu/drm/pl111/Makefile
>> +++ b/drivers/gpu/drm/pl111/Makefile
>> @@ -2,4 +2,6 @@ pl111_drm-y += pl111_connector.o \
>> pl111_display.o \
>> pl111_drv.o
>>
>> +pl111_drm-$(CONFIG_DEBUG_FS) += pl111_debugfs.o
>> +
>> obj-$(CONFIG_DRM_PL111) += pl111_drm.o
>> diff --git a/drivers/gpu/drm/pl111/pl111_debugfs.c
>> b/drivers/gpu/drm/pl111/pl111_debugfs.c
>> new file mode 100644
>> index ..ee13a060cddf
>> --- /dev/null
>> +++ b/drivers/gpu/drm/pl111/pl111_debugfs.c
>> @@ -0,0 +1,55 @@
>> +/*
>> + * Copyright © 2017 Broadcom
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include "pl111_drm.h"
>> +
>> +#define REGDEF(reg) { reg, #reg }
>> +static const struct {
>> +uint32_t reg;
>> +const char *name;
>> +} pl111_reg_defs[] = {
>> +REGDEF(CLCD_TIM0),
>> +REGDEF(CLCD_TIM1),
>> +REGDEF(CLCD_TIM2),
>> +REGDEF(CLCD_TIM3),
>> +REGDEF(CLCD_UBAS),
>> +REGDEF(CLCD_PL111_CNTL),
>> +REGDEF(CLCD_PL111_IENB),
>> +};
>> +
>> +int pl111_debugfs_regs(struct seq_file *m, void *unused)
>> +{
>> +struct drm_info_node *node = (struct drm_info_node *)m->private;
>> +struct drm_device *dev = node->minor->dev;
>> +struct pl111_drm_dev_private *priv = dev->dev_private;
>> +int i;
>
> nit: this will print a warning; s/int/unsigned/ ?
I don't see any. I think the warning is only for non-constant
expressions -- we do i < ARRAY_SIZE all over the place.
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[Bug 99851] [drm:.r600_ring_test [radeon]] *ERROR* radeon: ring 0 test failed (scratch(0x8504)=0xCAFEDEAD)
https://bugs.freedesktop.org/show_bug.cgi?id=99851 --- Comment #36 from runa...@candw.ms --- https://lists.freedesktop.org/archives/dri-devel/2016-March/104058.html -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 99851] [drm:.r600_ring_test [radeon]] *ERROR* radeon: ring 0 test failed (scratch(0x8504)=0xCAFEDEAD)
https://bugs.freedesktop.org/show_bug.cgi?id=99851 --- Comment #35 from runa...@candw.ms --- Also have a problem on Sam460ex AMCC460ex machine. [drm] radeon: irq initialized. [drm:r600_ring_test] *ERROR* radeon: ring 0 test failed (scratch(0x850C)=0xCAFEDEAD) radeon 0001:81:00.0: disabling GPU acceleration We have discussed it before . -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2] drm/pl111: Register the clock divider and use it.
Stephen Boyd writes:
> On 05/08, Eric Anholt wrote:
>> This is required for the panel to work on bcm911360, where CLCDCLK is
>> the fixed 200Mhz AXI41 clock. The rate set is still passed up to the
>> CLCDCLK, for platforms that have a settable rate on that one.
>>
>> v2: Set SET_RATE_PARENT (caught by Linus Walleij), depend on
>> COMMON_CLK.
>>
>> Signed-off-by: Eric Anholt
>
> Reviewed-by: Stephen Boyd
>
> One minor comment below
>
>> diff --git a/drivers/gpu/drm/pl111/pl111_display.c
>> b/drivers/gpu/drm/pl111/pl111_display.c
>> index 39a5c33bce7d..2d924a6bf43c 100644
>> --- a/drivers/gpu/drm/pl111/pl111_display.c
>> +++ b/drivers/gpu/drm/pl111/pl111_display.c
>> @@ -288,6 +296,126 @@ const struct drm_simple_display_pipe_funcs
>> pl111_display_funcs = {
> [...]
>> +
>> +return 0;
>> +}
>> +
>> +const struct clk_ops pl111_clk_div_ops = {
>
> static?
Fixed, thanks.
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Re: [RFC PATCH 10/11] ARM: sun8i: h3: add display engine pipeline for TVE
On Thu, May 18, 2017 at 12:43:53AM +0800, Icenowy Zheng wrote:
> As we have already the support for the TV encoder on Allwinner H3, add
> the display engine pipeline device tree nodes to its DTSI file.
>
> The H5 pipeline has some differences and will be enabled later.
>
> The currently-unused mixer0 and tcon0 are also needed, for the
> completement of the pipeline.
>
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm/boot/dts/sun8i-h3.dtsi | 189
>
> 1 file changed, 189 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index b36f9f423c39..20172ef92415 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -41,6 +41,8 @@
> */
>
> #include "sunxi-h3-h5.dtsi"
> +#include
> +#include
>
> / {
> cpus {
> @@ -72,6 +74,193 @@
> };
> };
>
> + de: display-engine {
> + compatible = "allwinner,sun8i-h3-display-engine";
> + allwinner,pipelines = <&mixer0>,
> + <&mixer1>;
> + status = "disabled";
> + };
> +
> + soc {
> + display_clocks: clock@100 {
> + compatible = "allwinner,sun8i-a83t-de2-clk";
> + reg = <0x0100 0x10>;
> + clocks = <&ccu CLK_BUS_DE>,
> + <&ccu CLK_DE>;
> + clock-names = "bus",
> + "mod";
> + resets = <&ccu RST_BUS_DE>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + assigned-clocks = <&ccu CLK_DE>;
> + assigned-clock-parents = <&ccu CLK_PLL_DE>;
> + assigned-clock-rates = <43200>;
This shouldn't be set in the DT, but evaluated at runtime when calling
clk_set_rate.
> + tve0: tv-encoder@1e0 {
> + compatible = "allwinner,sun8i-h3-tv-encoder";
> + reg = <0x01e0 0x1000>;
> + clocks = <&ccu CLK_BUS_TVE>, <&ccu CLK_TVE>;
> + clock-names = "bus", "mod";
> + resets = <&ccu RST_BUS_TVE>;
> + status = "disabled";
> +
> + assigned-clocks = <&ccu CLK_TVE>;
> + assigned-clock-parents = <&ccu CLK_PLL_DE>;
Same thing here. clk_set_rate should just do the right thing.
> + assigned-clock-rates = <21600>;
And why are you setting it in the driver and in the DT?
Maxime
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Re: [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC
On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote: > Allwinner H3 features a TV encoder similar to the one in earlier SoCs, > but with some different points about clocks: > - It has a mod clock and a bus clock. > - The mod clock must be at a fixed rate to generate signal. Why? Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC PATCH 01/11] dt-bindings: update the binding for Allwinner H3 TVE support
On Thu, May 18, 2017 at 12:43:44AM +0800, Icenowy Zheng wrote: > -On SoCs other than the A33 and V3s, there is one more clock required: > +For the following compatibles: > + * allwinner,sun5i-a13-tcon > + * allwinner,sun6i-a31-tcon > + * allwinner,sun6i-a31s-tcon > + * allwinner,sun8i-a33-tcon > + * allwinner,sun8i-v3s-tcon > +there is one more clock and one more property required: > + - clocks: > + - 'tcon-ch0': The clock driving the TCON channel 0 > + - clock-output-names: Name of the pixel clock created > + > +For the following compatibles: > + * allwinner,sun5i-a13-tcon > + * allwinner,sun6i-a31-tcon > + * allwinner,sun6i-a31s-tcon > + * allwinner,sun8i-h3-tcon0 > +there is one more clock required: > - 'tcon-ch1': The clock driving the TCON channel 1 Putting ID's in the compatible name is usually a bad idea. What is the difference between the two? Only that the second one doesn't have a clock? That seems highly unlikely. How does it generate the pixel clock frequency? Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm/pl111: Fix defined-but-not-used warnings in COMPILE_TEST mode.
Our probe function is guarded by CONFIG_ARM_ABMA, so these functions
end up unused if it's not enabled. We do want to be able to build DRM
drivers on inapplicable platforms, for refactor testing purposees.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/pl111/pl111_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/pl111/pl111_drv.c
b/drivers/gpu/drm/pl111/pl111_drv.c
index 936403f65508..0a99a80dc354 100644
--- a/drivers/gpu/drm/pl111/pl111_drv.c
+++ b/drivers/gpu/drm/pl111/pl111_drv.c
@@ -78,7 +78,7 @@ struct drm_mode_config_funcs mode_config_funcs = {
.atomic_commit = drm_atomic_helper_commit,
};
-static int pl111_modeset_init(struct drm_device *dev)
+static int __used pl111_modeset_init(struct drm_device *dev)
{
struct drm_mode_config *mode_config;
struct pl111_drm_dev_private *priv = dev->dev_private;
@@ -146,7 +146,7 @@ static void pl111_lastclose(struct drm_device *dev)
drm_fbdev_cma_restore_mode(priv->fbdev);
}
-static struct drm_driver pl111_drm_driver = {
+static struct drm_driver __used pl111_drm_driver = {
.driver_features =
DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | DRIVER_ATOMIC,
.lastclose = pl111_lastclose,
--
2.11.0
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Re: [drm:qxl] BUG: sleeping function called from invalid context - qxl_bo_kmap_atomic_page()...splat
Mike Galbraith writes: > On Thu, 2017-05-18 at 17:40 -0300, Gabriel Krisman Bertazi wrote: >> > Mike Galbraith writes: >> >> > >> > On Mon, 2017-05-08 at 16:48 -0300, Gabriel Krisman Bertazi wrote: >> > >> > > >> > > Thanks for reporting this. Can you confirm the following patch prevents >> > > the issue? >> > >> > Nope, it still gripes. >> >> Oops... Thanks for checking. The following patch fixes the issue for >> me. Can you please test that one? > > Yup, all better. Thanks for testing. I resent it to the list with the appropriate subject line to make sure it gets properly reviewed. -- Gabriel Krisman Bertazi ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] drm: qxl: Delay entering atomic context during cursor update
Hi Dave,
This is -rc material. Once Gerd and others are happy with it, we should
queue for 4.12.
Thanks!
>8
qxl_release_map will enter an atomic context, but since we still need to
alloc memory for BOs, we better delay that until we have everything we
need, in case we need to sleep inside the allocation. This avoids the
Sleep in atomic state below, which was reported by Mike.
[ 43.910362] BUG: sleeping function called from invalid context at
mm/slab.h:432
[ 43.910955] in_atomic(): 1, irqs_disabled(): 0, pid: 2077, name: Xorg
[ 43.911472] Preemption disabled at:
[ 43.911478] [] qxl_bo_kmap_atomic_page+0xa5/0x100 [qxl]
[ 43.912103] CPU: 0 PID: 2077 Comm: Xorg Tainted: GE
4.12.0-master #38
[ 43.912550] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS
rel-1.8.1-0-g4adadbd-20161202_174313-build11a 04/01/2014
[ 43.913202] Call Trace:
[ 43.913371] dump_stack+0x65/0x89
[ 43.913581] ? qxl_bo_kmap_atomic_page+0xa5/0x100 [qxl]
[ 43.913876] ___might_sleep+0x11a/0x190
[ 43.914095] __might_sleep+0x4a/0x80
[ 43.914319] ? qxl_bo_create+0x50/0x190 [qxl]
[ 43.914565] kmem_cache_alloc_trace+0x46/0x180
[ 43.914836] qxl_bo_create+0x50/0x190 [qxl]
[ 43.915082] ? refcount_dec_and_test+0x11/0x20
[ 43.915332] ? ttm_mem_io_reserve+0x41/0xe0 [ttm]
[ 43.915595] qxl_alloc_bo_reserved+0x37/0xb0 [qxl]
[ 43.915884] qxl_cursor_atomic_update+0x8f/0x260 [qxl]
[ 43.916172] ? drm_atomic_helper_update_legacy_modeset_state+0x1d6/0x210
[drm_kms_helper]
[ 43.916623] drm_atomic_helper_commit_planes+0xec/0x230 [drm_kms_helper]
[ 43.916995] drm_atomic_helper_commit_tail+0x2b/0x60 [drm_kms_helper]
[ 43.917398] commit_tail+0x65/0x70 [drm_kms_helper]
[ 43.917693] drm_atomic_helper_commit+0xa9/0x100 [drm_kms_helper]
[ 43.918039] drm_atomic_commit+0x4b/0x50 [drm]
[ 43.918334] drm_atomic_helper_update_plane+0xf1/0x110 [drm_kms_helper]
[ 43.918902] __setplane_internal+0x19f/0x280 [drm]
[ 43.919240] drm_mode_cursor_universal+0x101/0x1c0 [drm]
[ 43.919541] drm_mode_cursor_common+0x15b/0x1d0 [drm]
[ 43.919858] drm_mode_cursor2_ioctl+0xe/0x10 [drm]
[ 43.920157] drm_ioctl+0x211/0x460 [drm]
[ 43.920383] ? drm_mode_cursor_ioctl+0x50/0x50 [drm]
[ 43.920664] ? handle_mm_fault+0x93/0x160
[ 43.920893] do_vfs_ioctl+0x96/0x6e0
[ 43.921117] ? __fget+0x73/0xa0
[ 43.921322] SyS_ioctl+0x41/0x70
[ 43.921545] entry_SYSCALL_64_fastpath+0x1a/0xa5
[ 43.922188] RIP: 0033:0x7f1145804bc7
[ 43.922526] RSP: 002b:7ffcd3e50508 EFLAGS: 3246 ORIG_RAX:
0010
[ 43.923367] RAX: ffda RBX: 0040 RCX:
7f1145804bc7
[ 43.923852] RDX: 7ffcd3e50540 RSI: c02464bb RDI:
000b
[ 43.924299] RBP: 0040 R08: 0040 R09:
000c
[ 43.924694] R10: 7ffcd3e50340 R11: 3246 R12:
0018
[ 43.925128] R13: 022bc390 R14: 0040 R15:
7ffcd3e5062c
Reported-by: Mike Galbraith
Signed-off-by: Gabriel Krisman Bertazi
---
drivers/gpu/drm/qxl/qxl_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/qxl/qxl_display.c
b/drivers/gpu/drm/qxl/qxl_display.c
index 058340a002c2..4a340efd8ba6 100644
--- a/drivers/gpu/drm/qxl/qxl_display.c
+++ b/drivers/gpu/drm/qxl/qxl_display.c
@@ -575,8 +575,6 @@ static void qxl_cursor_atomic_update(struct drm_plane
*plane,
if (ret)
return;
- cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release);
-
if (fb != old_state->fb) {
obj = to_qxl_framebuffer(fb)->obj;
user_bo = gem_to_qxl_bo(obj);
@@ -614,6 +612,7 @@ static void qxl_cursor_atomic_update(struct drm_plane
*plane,
qxl_bo_kunmap(cursor_bo);
qxl_bo_kunmap(user_bo);
+ cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release);
cmd->u.set.visible = 1;
cmd->u.set.shape = qxl_bo_physical_address(qdev,
cursor_bo, 0);
@@ -624,6 +623,7 @@ static void qxl_cursor_atomic_update(struct drm_plane
*plane,
if (ret)
goto out_free_release;
+ cmd = (struct qxl_cursor_cmd *) qxl_release_map(qdev, release);
cmd->type = QXL_CURSOR_MOVE;
}
--
2.11.0
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Re: [RFC PATCH 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2
On Thu, May 18, 2017 at 12:43:46AM +0800, Icenowy Zheng wrote:
> Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to
> tcon0 and mixer1 is connected to tcon1; however by setting a bit
> the connection can be swapped.
>
> As we now hardcode the default connection, ignore the bonus endpoint for
> the mixer's output and the TCON's input, as they stands for the swapped
> connection.
>
> Signed-off-by: Icenowy Zheng
> ---
> drivers/gpu/drm/sun4i/sun4i_drv.c | 27 ++
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 39
> +-
> drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++
> 3 files changed, 59 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
> b/drivers/gpu/drm/sun4i/sun4i_drv.c
> index 1dd1948025d2..29bf1325ded6 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_drv.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c
> @@ -173,6 +173,13 @@ static bool sun4i_drv_node_is_frontend(struct
> device_node *node)
> of_device_is_compatible(node,
> "allwinner,sun8i-a33-display-frontend");
> }
>
> +static bool sun4i_drv_node_is_swappable_de2_mixer(struct device_node *node)
> +{
> + /* The V3s has only one mixer-tcon pair, so it's not listed here. */
> + return of_device_is_compatible(node, "allwinner,sun8i-h3-de2-mixer0") ||
> + of_device_is_compatible(node, "allwinner,sun8i-h3-de2-mixer1");
> +}
> +
> static bool sun4i_drv_node_is_tcon(struct device_node *node)
> {
> return of_device_is_compatible(node, "allwinner,sun5i-a13-tcon") ||
> @@ -249,6 +256,26 @@ static int sun4i_drv_add_endpoints(struct device *dev,
> }
> }
>
> + /*
> + * The second endpoint of the output of a swappable DE2 mixer
> + * is the TCON after connection swapping.
> + * Ignore it now, as we now hardcode mixer0->tcon0,
> + * mixer1->tcon1 connection.
> + */
> + if (sun4i_drv_node_is_swappable_de2_mixer(node)) {
> + struct of_endpoint endpoint;
> +
> + if (of_graph_parse_endpoint(ep, &endpoint)) {
> + DRM_DEBUG_DRIVER("Couldn't parse endpoint\n");
> + continue;
> + }
> +
> + if (endpoint.id) {
> + DRM_DEBUG_DRIVER("Endpoint is an unused
> connection for DE2 mixer... skipping\n");
> + continue;
> + }
> + }
> +
> /* Walk down our tree */
> count += sun4i_drv_add_endpoints(dev, match, remote);
>
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index f44a37a5993d..89a215ff2370 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> @@ -425,7 +425,8 @@ static int sun4i_tcon_init_regmap(struct device *dev,
> * requested via the get_id function of the engine.
> */
> static struct sunxi_engine *sun4i_tcon_find_engine(struct sun4i_drv *drv,
> -struct device_node *node)
> +struct device_node *node,
> +bool skip_bonus_ep)
> {
> struct device_node *port, *ep, *remote;
> struct sunxi_engine *engine;
> @@ -439,6 +440,20 @@ static struct sunxi_engine
> *sun4i_tcon_find_engine(struct sun4i_drv *drv,
> if (!remote)
> continue;
>
> + if (skip_bonus_ep) {
> + struct of_endpoint endpoint;
> +
> + if (of_graph_parse_endpoint(ep, &endpoint)) {
> + DRM_DEBUG_DRIVER("Couldn't parse endpoint\n");
> + continue;
> + }
> +
> + if (endpoint.id) {
> + DRM_DEBUG_DRIVER("Skipping bonus mixer->TCON
> connection when searching engine\n");
> + continue;
> + }
> + }
> +
You don't list the mixers in the tcon's output, why do you need that
exactly?
Maxime
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[PATCH][drm-next] drm/i915: Check for allocation failure
From: Colin Ian King
The memory allocation for C is not being null checked and hence we
could end up with a null pointer dereference. Fix this with a null
pointer check. (I really should have noticed this when I was fixing an
earlier issue.)
Detected by CoverityScan, CID#1436406 ("Dereference null return")
Fixes: 47624cc3301b60 ("drm/i915: Import the kfence selftests for
i915_sw_fence")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index c31d439fae3a..33128be77bbe 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -123,6 +123,10 @@ static int test_dag(void *arg)
}
C = alloc_fence();
+ if (!C) {
+ ret = -ENOMEM;
+ goto err_B;
+ }
if (i915_sw_fence_await_sw_fence_gfp(B, C, GFP_KERNEL) == -EINVAL) {
pr_err("invalid cycle detected\n");
goto err_C;
--
2.11.0
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Re: [RFC PATCH 02/11] drm: sun4i: add support for H3 mixers
On Thu, May 18, 2017 at 12:43:45AM +0800, Icenowy Zheng wrote:
> From: Icenowy Zheng
>
> Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels,
> and the other has 1 VI and 1 UI.
>
> Add support for these two variants.
>
> Signed-off-by: Icenowy Zheng
> ---
> drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> index cb193c5f1686..d658a3a8159a 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> @@ -390,11 +390,29 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg
> = {
> .ui_num = 1,
> };
>
> +static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = {
> + .vi_num = 1,
> + .ui_num = 3,
> +};
> +
> +static const struct sun8i_mixer_cfg sun8i_h3_mixer1_cfg = {
> + .vi_num = 1,
> + .ui_num = 1,
> +};
> +
> static const struct of_device_id sun8i_mixer_of_table[] = {
> {
> .compatible = "allwinner,sun8i-v3s-de2-mixer",
> .data = &sun8i_v3s_mixer_cfg,
> },
> + {
> + .compatible = "allwinner,sun8i-h3-de2-mixer0",
> + .data = &sun8i_h3_mixer0_cfg
> + },
> + {
> + .compatible = "allwinner,sun8i-h3-de2-mixer1",
> + .data = &sun8i_h3_mixer1_cfg
> + },
So the only difference between the two is the number of ui planes?
Why not create a property to give the number then, instead of a
compatible?
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[PATCH][V2] [media] rainshadow-cec: ensure exit_loop is intialized
From: Colin Ian King
exit_loop is not being initialized, so it contains garbage. Ensure it is
initialized to false.
Detected by CoverityScan, CID#1436409 ("Uninitialized scalar variable")
Fixes: ea6a69defd3311 ("[media] rainshadow-cec: avoid -Wmaybe-uninitialized
warning")
Signed-off-by: Colin Ian King
---
drivers/media/usb/rainshadow-cec/rainshadow-cec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
index 8d3ca2c8b20f..ad468efc4399 100644
--- a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
+++ b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
@@ -119,7 +119,7 @@ static void rain_irq_work_handler(struct work_struct *work)
while (true) {
unsigned long flags;
- bool exit_loop;
+ bool exit_loop = false;
char data;
spin_lock_irqsave(&rain->buf_lock, flags);
--
2.11.0
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NACK: [PATCH] [media] rainshadow-cec: ensure exit_loop is initialized
On 19/05/17 18:39, Colin King wrote:
> From: Colin Ian King
>
> exit_loop is not being initialized, so it contains garbage. Ensure it is
> initialized to false.
>
> Detected by CoverityScan, CID#1436409 ("Uninitialzed scalar variable")
>
> Fixes: ea6a69defd3311 ("[media] rainshadow-cec: avoid -Wmaybe-uninitialized
> warning")
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/vc4/vc4_v3d.c | 2 +-
> drivers/media/usb/rainshadow-cec/rainshadow-cec.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c
> index c53afec34586..c42210203f6e 100644
> --- a/drivers/gpu/drm/vc4/vc4_v3d.c
> +++ b/drivers/gpu/drm/vc4/vc4_v3d.c
> @@ -218,7 +218,7 @@ int vc4_v3d_get_bin_slot(struct vc4_dev *vc4)
> * overall CMA pool before they make scenes complicated enough to run
> * out of bin space.
> */
> -int
> +static int
> vc4_allocate_bin_bo(struct drm_device *drm)
> {
> struct vc4_dev *vc4 = to_vc4_dev(drm);
> diff --git a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
> b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
> index 8d3ca2c8b20f..ad468efc4399 100644
> --- a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
> +++ b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
> @@ -119,7 +119,7 @@ static void rain_irq_work_handler(struct work_struct
> *work)
>
> while (true) {
> unsigned long flags;
> - bool exit_loop;
> + bool exit_loop = false;
> char data;
>
> spin_lock_irqsave(&rain->buf_lock, flags);
>
Sorry, got another fix included into that. I'll re-submit
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[PATCH] [media] rainshadow-cec: ensure exit_loop is initialized
From: Colin Ian King
exit_loop is not being initialized, so it contains garbage. Ensure it is
initialized to false.
Detected by CoverityScan, CID#1436409 ("Uninitialzed scalar variable")
Fixes: ea6a69defd3311 ("[media] rainshadow-cec: avoid -Wmaybe-uninitialized
warning")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/vc4/vc4_v3d.c | 2 +-
drivers/media/usb/rainshadow-cec/rainshadow-cec.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c
index c53afec34586..c42210203f6e 100644
--- a/drivers/gpu/drm/vc4/vc4_v3d.c
+++ b/drivers/gpu/drm/vc4/vc4_v3d.c
@@ -218,7 +218,7 @@ int vc4_v3d_get_bin_slot(struct vc4_dev *vc4)
* overall CMA pool before they make scenes complicated enough to run
* out of bin space.
*/
-int
+static int
vc4_allocate_bin_bo(struct drm_device *drm)
{
struct vc4_dev *vc4 = to_vc4_dev(drm);
diff --git a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
index 8d3ca2c8b20f..ad468efc4399 100644
--- a/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
+++ b/drivers/media/usb/rainshadow-cec/rainshadow-cec.c
@@ -119,7 +119,7 @@ static void rain_irq_work_handler(struct work_struct *work)
while (true) {
unsigned long flags;
- bool exit_loop;
+ bool exit_loop = false;
char data;
spin_lock_irqsave(&rain->buf_lock, flags);
--
2.11.0
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Re: [PATCH v2 3/5] drm/bridge/synopsys: Add MIPI DSI host controller bridge
On 05/19/2017 05:20 PM, Philippe CORNU wrote: > Add a Synopsys Designware MIPI DSI host DRM bridge driver, based on the > Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. > > Signed-off-by: Philippe CORNU > --- > drivers/gpu/drm/bridge/synopsys/Kconfig |9 + > drivers/gpu/drm/bridge/synopsys/Makefile |2 + > drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 1024 > + > 3 files changed, 1035 insertions(+) > create mode 100644 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > > diff --git a/drivers/gpu/drm/bridge/synopsys/Kconfig > b/drivers/gpu/drm/bridge/synopsys/Kconfig > index 40d2827..d7fbdff 100644 > --- a/drivers/gpu/drm/bridge/synopsys/Kconfig > +++ b/drivers/gpu/drm/bridge/synopsys/Kconfig > @@ -21,3 +21,12 @@ config DRM_DW_HDMI_I2S_AUDIO > help > Support the I2S Audio interface which is part of the Synopsys > Designware HDMI block. > + > +config DRM_DW_MIPI_DSI > + tristate "Synopsys DesignWare MIPI DSI host controller bridge" > + select DRM_KMS_HELPER > + select DRM_MIPI_DSI > + select DRM_PANEL > + help > + Choose this if you want to use the Synopsys DesignWare MIPI DSI host > + controller bridge. > diff --git a/drivers/gpu/drm/bridge/synopsys/Makefile > b/drivers/gpu/drm/bridge/synopsys/Makefile > index 17aa7a6..5f57d36 100644 > --- a/drivers/gpu/drm/bridge/synopsys/Makefile > +++ b/drivers/gpu/drm/bridge/synopsys/Makefile > @@ -3,3 +3,5 @@ > obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o > obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o > obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o > + > +obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw-mipi-dsi.o > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > new file mode 100644 > index 000..041f564 > --- /dev/null > +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c > @@ -0,0 +1,1024 @@ > +/* > + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * Modified by Philippe Cornu > + * This generic Synopsys Designware MIPI DSI host driver is based on the > + * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define DSI_VERSION 0x00 > +#define DSI_PWR_UP 0x04 > +#define RESET0 > +#define POWERUP BIT(0) > + > +#define DSI_CLKMGR_CFG 0x08 > +#define TO_CLK_DIVIDSION(div)(((div) & 0xff) << 8) > +#define TX_ESC_CLK_DIVIDSION(div)(((div) & 0xff) << 0) > + > +#define DSI_DPI_VCID 0x0c > +#define DPI_VID(vid) (((vid) & 0x3) << 0) > + > +#define DSI_DPI_COLOR_CODING 0x10 > +#define EN18_LOOSELY BIT(8) > +#define DPI_COLOR_CODING_16BIT_1 0x0 > +#define DPI_COLOR_CODING_16BIT_2 0x1 > +#define DPI_COLOR_CODING_16BIT_3 0x2 > +#define DPI_COLOR_CODING_18BIT_1 0x3 > +#define DPI_COLOR_CODING_18BIT_2 0x4 > +#define DPI_COLOR_CODING_24BIT 0x5 > + > +#define DSI_DPI_CFG_POL 0x14 > +#define COLORM_ACTIVE_LOWBIT(4) > +#define SHUTD_ACTIVE_LOW BIT(3) > +#define HSYNC_ACTIVE_LOW BIT(2) > +#define VSYNC_ACTIVE_LOW BIT(1) > +#define DATAEN_ACTIVE_LOWBIT(0) > + > +#define DSI_DPI_LP_CMD_TIM 0x18 > +#define OUTVACT_LPCMD_TIME(p)(((p) & 0xff) << 16) > +#define INVACT_LPCMD_TIME(p) ((p) & 0xff) > + > +#define DSI_DBI_CFG 0x20 > +#define DSI_DBI_CMDSIZE 0x28 > + > +#define DSI_PCKHDL_CFG 0x2c > +#define EN_CRC_RXBIT(4) > +#define EN_ECC_RXBIT(3) > +#define EN_BTA BIT(2) > +#define EN_EOTP_RX BIT(1) > +#define EN_EOTP_TX BIT(0) > + > +#define DSI_MODE_CFG 0x34 > +#define ENABLE_VIDEO_MODE0 > +#define ENABLE_CMD_MODE BIT(0) > + > +#define DSI_VID_MODE_CFG 0x38 > +#define FRAME_BTA_ACKBIT(14) > +#define ENABLE_LOW_POWER (0x3f << 8) > +#define ENABLE_LOW_POWER_MASK(0x3f << 8) > +#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES 0x0 > +#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS 0x1 > +#define VID_MODE_TYPE_BURST 0x2 > +#define VID_MODE_TYPE_MASK
Re: [kbuild-all] [radeon-alex:amd-staging-4.11 1061/1085] sparc64-linux-gnu-gcc: error: unrecognized command line option '-msse'; did you mean '-fdse'?
On 2017-05-16 05:56 AM, Christian König wrote: Am 16.05.2017 um 11:16 schrieb Michel Dänzer: [ Dropping build robot aliases, adding amd-gfx and DC folks ] On 16/05/17 05:18 PM, Philip Li wrote: On Tue, May 16, 2017 at 10:04:32AM +0200, Christian König wrote: Am 16.05.2017 um 07:20 schrieb zhoucm1: On 2017年05月15日 17:52, kbuild test robot wrote: tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-4.11 head: c285c73f2213f503a93aa142fff186e160b4a371 commit: 5f92704d0cc5928824ffa4ff8cec5cd4c0f55b24 [1061/1085] drm/amd: fix init order of sched job config: sparc-allmodconfig (attached as .config) compiler: sparc64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705 reproduce: wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 5f92704d0cc5928824ffa4ff8cec5cd4c0f55b24 # save the attached .config to linux build tree make.cross ARCH=sparc All errors (new ones prefixed by >>): sparc64-linux-gnu-gcc: error: unrecognized command line option '-msse'; did you mean '-fdse'? sparc64-linux-gnu-gcc: error: unrecognized command line option '-mpreferred-stack-boundary=4' [...] Thanks for input, the issue does exist (as introduced by "drm/amdgpu/display: Enable DCN in DC"), so the report like https://lists.01.org/pipermail/kbuild-all/2017-May/033857.html does make sense. It's because some DC Makefiles hardcode -msse and other compiler flags which aren't supported on all architectures. DC folks, please fix this, either by only adding flags on architectures where they're supported, or by preventing the corresponding code from getting built on architectures where they're not supported. Ah, yes that's indeed an issue. But please at least fix the bisect or otherwise the wrong people get those mails and wonder about the error messages. I just submitted a fix for this: "drm/amd/display: Limit DCN to x86 arch" It seems to do the trick but I've never really dealt with multiple architectures before. Would appreciate if someone more knowledgeable than myself reviews this. Essentially I'm blocking DCN code for non-x86 architectures for now. Thanks, Harry Christian. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v8 0/5] replace hwmon_device_register for hwmon_device_register_with_info
On 05/19/2017 07:24 AM, Oscar Salvador wrote: This v8 fixes removes dummy functions which only had a return and moves the code into the switch statements. Merged. Thank you! Versions: v1 -> v2: * Keep temp attrs as read only v2 -> v3: * Code fix-ups: struct and string as const and add return within switch due to fallthrough * Add Signed-off-by to all commits v3 -> v4: * Rever const to struct attribute. Kbuild complains. v4 -> v5: * Drops a check for attr_set in "nouveau_temp_is_visible". v5 -> v6: * Change to nouveau/hwmon all commit titles * Drop author change * Coding-Style * Move the check before the switch in nouveau_power_is_visible function * Expose temperature attrs as RW again * Get rid of nouveau_hwmon_set_pwm1/_enable and implement the code inside nouveau_pwm_write * Get rid of nouveau_hwmon_set_temp_* and implement the code inside nouveau_temp_write v6 -> v7: * Got rid of all dummy functions that only had a return, and moved code into the switch statements. v7 -> v8: * Fix warnings This patchseries replaces the deprecated hwmon_device_register function with the new one hwmon_device_register_with_info. It also does some cleanup. Oscar Salvador (5): nouveau/hwmon: Add config for all sensors and their settings nouveau/hwmon: Add nouveau_hwmon_ops structure with .is_visible/.read_string nouveau/hwmon: Remove old code, add .write/.read operations nouveau/hwmon: expose the auto_point and pwm_min/max attrs nouveau/hwmon: Change permissions to numeric drivers/gpu/drm/nouveau/nouveau_hwmon.c | 983 +++- 1 file changed, 464 insertions(+), 519 deletions(-) ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH] gpu: ipu-v3: allocate ipuv3_channels as needed
Most of the 64 IPUv3 DMA channels are never used, some of them (channels
16, 30, 32, 34-39, and 53-63) are even marked as reserved.
Allocate the channel control structure only when a channel is actually
requested, replace the fixed size array with a list, and remove the
unused enabled and busy fields from the ipuv3_channel structure.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-common.c | 23 +++
drivers/gpu/ipu-v3/ipu-prv.h| 8 ++--
2 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index 67c45fd250291..18ef46fc70860 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -296,15 +296,22 @@ struct ipuv3_channel *ipu_idmac_get(struct ipu_soc *ipu,
unsigned num)
mutex_lock(&ipu->channel_lock);
- channel = &ipu->channel[num];
+ list_for_each_entry(channel, &ipu->channels, list) {
+ if (channel->num == num) {
+ channel = ERR_PTR(-EBUSY);
+ goto out;
+ }
+ }
- if (channel->busy) {
- channel = ERR_PTR(-EBUSY);
+ channel = kzalloc(sizeof(*channel), GFP_KERNEL);
+ if (!channel) {
+ channel = ERR_PTR(-ENOMEM);
goto out;
}
- channel->busy = true;
channel->num = num;
+ channel->ipu = ipu;
+ list_add(&channel->list, &ipu->channels);
out:
mutex_unlock(&ipu->channel_lock);
@@ -321,7 +328,8 @@ void ipu_idmac_put(struct ipuv3_channel *channel)
mutex_lock(&ipu->channel_lock);
- channel->busy = false;
+ list_del(&channel->list);
+ kfree(channel);
mutex_unlock(&ipu->channel_lock);
}
@@ -1400,7 +1408,7 @@ static int ipu_probe(struct platform_device *pdev)
struct ipu_soc *ipu;
struct resource *res;
unsigned long ipu_base;
- int i, ret, irq_sync, irq_err;
+ int ret, irq_sync, irq_err;
const struct ipu_devtype *devtype;
devtype = of_device_get_match_data(&pdev->dev);
@@ -1433,13 +1441,12 @@ static int ipu_probe(struct platform_device *pdev)
return -EPROBE_DEFER;
}
- for (i = 0; i < 64; i++)
- ipu->channel[i].ipu = ipu;
ipu->devtype = devtype;
ipu->ipu_type = devtype->type;
spin_lock_init(&ipu->lock);
mutex_init(&ipu->channel_lock);
+ INIT_LIST_HEAD(&ipu->channels);
dev_dbg(&pdev->dev, "cm_reg: 0x%08lx\n",
ipu_base + devtype->cm_ofs);
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 3a579e35de584..13194e1e1621a 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -157,11 +157,8 @@ enum ipu_modules {
struct ipuv3_channel {
unsigned int num;
-
- bool enabled;
- bool busy;
-
struct ipu_soc *ipu;
+ struct list_head list;
};
struct ipu_cpmem;
@@ -184,6 +181,7 @@ struct ipu_soc {
enum ipuv3_type ipu_type;
spinlock_t lock;
struct mutexchannel_lock;
+ struct list_headchannels;
void __iomem*cm_reg;
void __iomem*idmac_reg;
@@ -193,8 +191,6 @@ struct ipu_soc {
struct clk *clk;
- struct ipuv3_channelchannel[64];
-
int irq_sync;
int irq_err;
struct irq_domain *domain;
--
2.11.0
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[PATCH] gpu: ipu-v3: Add support for double read/write reduction
Allow to skip writing odd chroma rows by setting the RDRW bit for
4:2:0 chroma subsampled formats for any IDMAC write channel. This
also allows to skip reading odd rows for the VDIC read channel.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-cpmem.c | 6 ++
include/video/imx-ipu-v3.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c
index 3e00de5288e2d..3491c43b48d10 100644
--- a/drivers/gpu/ipu-v3/ipu-cpmem.c
+++ b/drivers/gpu/ipu-v3/ipu-cpmem.c
@@ -224,6 +224,12 @@ void ipu_cpmem_set_resolution(struct ipuv3_channel *ch,
int xres, int yres)
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_resolution);
+void ipu_cpmem_skip_odd_chroma_rows(struct ipuv3_channel *ch)
+{
+ ipu_ch_param_write_field(ch, IPU_FIELD_RDRW, 1);
+}
+EXPORT_SYMBOL_GPL(ipu_cpmem_skip_odd_chroma_rows);
+
void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride)
{
ipu_ch_param_write_field(ch, IPU_FIELD_SLY, stride - 1);
diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h
index 8cb07680fb416..ce4c07688b13d 100644
--- a/include/video/imx-ipu-v3.h
+++ b/include/video/imx-ipu-v3.h
@@ -250,6 +250,7 @@ struct ipu_image {
void ipu_cpmem_zero(struct ipuv3_channel *ch);
void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, int xres, int yres);
+void ipu_cpmem_skip_odd_chroma_rows(struct ipuv3_channel *ch);
void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride);
void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch);
void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t
buf);
--
2.11.0
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[PATCH] gpu: ipu-v3: remove interrupt busy waiting routine
This is not used anymore since commit eb8c88808c83 ("drm/imx: add
deferred plane disabling"), remove it.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-common.c | 16
drivers/gpu/ipu-v3/ipu-prv.h| 1 -
2 files changed, 17 deletions(-)
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index dcdbb9a599aa8..de292e9aaf720 100644
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -638,22 +638,6 @@ int ipu_idmac_wait_busy(struct ipuv3_channel *channel, int
ms)
}
EXPORT_SYMBOL_GPL(ipu_idmac_wait_busy);
-int ipu_wait_interrupt(struct ipu_soc *ipu, int irq, int ms)
-{
- unsigned long timeout;
-
- timeout = jiffies + msecs_to_jiffies(ms);
- ipu_cm_write(ipu, BIT(irq % 32), IPU_INT_STAT(irq / 32));
- while (!(ipu_cm_read(ipu, IPU_INT_STAT(irq / 32) & BIT(irq % 32 {
- if (time_after(jiffies, timeout))
- return -ETIMEDOUT;
- cpu_relax();
- }
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(ipu_wait_interrupt);
-
int ipu_idmac_disable_channel(struct ipuv3_channel *channel)
{
struct ipu_soc *ipu = channel->ipu;
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 97e182c71aa3c..e678742fec238 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -230,7 +230,6 @@ int ipu_module_enable(struct ipu_soc *ipu, u32 mask);
int ipu_module_disable(struct ipu_soc *ipu, u32 mask);
bool ipu_idmac_channel_busy(struct ipu_soc *ipu, unsigned int chno);
-int ipu_wait_interrupt(struct ipu_soc *ipu, int irq, int ms);
int ipu_csi_init(struct ipu_soc *ipu, struct device *dev, int id,
unsigned long base, u32 module, struct clk *clk_ipu);
--
2.11.0
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[PATCH] drm/etnaviv: restore ETNA_PREP_NOSYNC behaviour
This reverts commit cd34db4a526c (drm/etnaviv: Remove manual call to
reservation_object_test_signaled_rcu before wait), as the patch to turn
reservation_object_wait_timeout_rcu() into
reservation_object_test_signaled_rcu() with a 0 timeout has been reverted.
This causes the driver to call into the fence wait, even with a timeout of 0
The etnaviv BO cache depends on ETNA_PREP_NOSYNC to be wait-free, even if
the BO has attached fences, so restore the behaviour for this flag.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 24 ++--
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
index fd56f92f3469..f0efc5db793f 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c
@@ -411,16 +411,20 @@ int etnaviv_gem_cpu_prep(struct drm_gem_object *obj, u32
op,
struct etnaviv_gem_object *etnaviv_obj = to_etnaviv_bo(obj);
struct drm_device *dev = obj->dev;
bool write = !!(op & ETNA_PREP_WRITE);
- unsigned long remain =
- op & ETNA_PREP_NOSYNC ? 0 : etnaviv_timeout_to_jiffies(timeout);
- long lret;
-
- lret = reservation_object_wait_timeout_rcu(etnaviv_obj->resv,
- write, true, remain);
- if (lret < 0)
- return lret;
- else if (lret == 0)
- return remain == 0 ? -EBUSY : -ETIMEDOUT;
+ int ret;
+
+ if (op & ETNA_PREP_NOSYNC) {
+ if (!reservation_object_test_signaled_rcu(etnaviv_obj->resv,
+ write))
+ return -EBUSY;
+ } else {
+ unsigned long remain = etnaviv_timeout_to_jiffies(timeout);
+
+ ret = reservation_object_wait_timeout_rcu(etnaviv_obj->resv,
+ write, true, remain);
+ if (ret <= 0)
+ return ret == 0 ? -ETIMEDOUT : ret;
+ }
if (etnaviv_obj->flags & ETNA_BO_CACHED) {
if (!etnaviv_obj->sgt) {
--
2.11.0
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[Bug 100306] System randomly freezes or crashes to the login screen, glitches until rebooted
https://bugs.freedesktop.org/show_bug.cgi?id=100306 --- Comment #23 from MirceaKitsune --- (In reply to Daniel Stone from comment #22) > (In reply to MirceaKitsune from comment #21) > > You may be surprised to hear that the code is not an explicit 'if (rand()) > hang_gpu();' call. > > Regardless, insulting people is rarely the best way to get them to do > things. Everyone has more problems to solve than hours in the day, and the > guy calling people 'incapable' does not tend to work his way to the top of > the list. > > No, it really did not. I understand your frustration, and I'm sorry to hear > it, though as the Bugzilla footer notes, the freedesktop.org Code of Conduct > applies here: > https://www.freedesktop.org/wiki/CodeOfConduct/ > > If you cannot keep your behaviour civil in future, your access to this bug > tracker will be revoked. Thanks for your understanding, and I do hope your > bug gets resolved. Alright. Can't argue that and I'll keep your words in mind... also I wasn't looking to insult anyone per say. Please understand this sort of thing is something I've never dealt with in nearly 5 years since I use Linux, and I don't understand either how it happens nor why nothing is being done: Not only is it the most severe type of issue, and that it's been there for months, but it's literally coming and going on a weekly schedule. I'd care less if it was a minor issue, but I literally can't preform daily activities properly because my monitor simply shuts itself down randomly for no reason! I don't have Windows and wouldn't want to use it again, nor can I downgrade to a version as old as before the time I can assume the issue started... what am I to do? I'll try to be more calm, but I believe this sort of thing needs to have some solution. There are millions of people using these drivers, I don't think it's a normal situation that they can't use their machine safely and no one even knows what's triggering it... if this happened in Windows it would probably make headlines. Anyway I don't want to take this off-topic. I'll wait for more answers and post new updates as I see changes. Sorry again for earlier. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/8] drm/dp: Add defines for DP SDP types
From: Ville Syrjälä
Add defines for the secondary data packet (SDP) types from the spec.
These are the DP specific ones, and in addition HDMI infoframe types
(see enum hdmi_infoframe_type) are also valid SDP types.
v2: Add more SDP types
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
---
include/drm/drm_dp_helper.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index f7007e544f29..8db4513b9195 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -869,6 +869,17 @@ void drm_dp_link_train_channel_eq_delay(const u8
dpcd[DP_RECEIVER_CAP_SIZE]);
u8 drm_dp_link_rate_to_bw_code(int link_rate);
int drm_dp_bw_code_to_link_rate(u8 link_bw);
+#define DP_SDP_AUDIO_TIMESTAMP 0x01
+#define DP_SDP_AUDIO_STREAM0x02
+#define DP_SDP_EXTENSION 0x04
+#define DP_SDP_AUDIO_COPYMANAGEMENT0x05
+#define DP_SDP_ISRC0x06
+#define DP_SDP_VSC 0x07
+#define DP_SDP_CAMERA_GENERIC(i) (0x08 + (i)) /* 0-7 */
+#define DP_SDP_PPS 0x10
+#define DP_SDP_VSC_EXT_VESA0x20
+#define DP_SDP_VSC_EXT_CEA 0x21
+
struct edp_sdp_header {
u8 HB0; /* Secondary Data Packet ID */
u8 HB1; /* Secondary Data Packet Type */
--
2.10.2
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[Bug 100306] System randomly freezes or crashes to the login screen, glitches until rebooted
https://bugs.freedesktop.org/show_bug.cgi?id=100306 Daniel Stone changed: What|Removed |Added CC||dan...@fooishbar.org --- Comment #22 from Daniel Stone --- (In reply to MirceaKitsune from comment #21) > Why are the developers so incapable this time? This has been happening for > nearly 3 darn months! The problem has been fixed twice, and each time it's > returned after over 2 weeks. Can someone please explain what the heck is > going on here? At this stage, it feels like someone is actively developing > and updating this freeze against the latest system components... I don't > even see how it could survive through this many package updates by chance > alone, it is ridiculous. You may be surprised to hear that the code is not an explicit 'if (rand()) hang_gpu();' call. > And please don't lecture me on how this is free software, and I should only > be complaining if I was actually paying the developers: Regardless, insulting people is rarely the best way to get them to do things. Everyone has more problems to solve than hours in the day, and the guy calling people 'incapable' does not tend to work his way to the top of the list. > I'm sorry for the outburst, but at this stage I think something needed to be > said. No, it really did not. I understand your frustration, and I'm sorry to hear it, though as the Bugzilla footer notes, the freedesktop.org Code of Conduct applies here: https://www.freedesktop.org/wiki/CodeOfConduct/ If you cannot keep your behaviour civil in future, your access to this bug tracker will be revoked. Thanks for your understanding, and I do hope your bug gets resolved. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 100306] System randomly freezes or crashes to the login screen, glitches until rebooted
https://bugs.freedesktop.org/show_bug.cgi?id=100306 MirceaKitsune changed: What|Removed |Added Priority|high|highest Severity|major |critical --- Comment #21 from MirceaKitsune --- Once again, I'm dealing with at least one system crash per day. The latest one happens even after upgrading to the 4.11.0 Kernel, meaning the error was ported to it as well. Why are the developers so incapable this time? This has been happening for nearly 3 darn months! The problem has been fixed twice, and each time it's returned after over 2 weeks. Can someone please explain what the heck is going on here? At this stage, it feels like someone is actively developing and updating this freeze against the latest system components... I don't even see how it could survive through this many package updates by chance alone, it is ridiculous. And please don't lecture me on how this is free software, and I should only be complaining if I was actually paying the developers: There is a limit beyond which an important piece of software, be it a free Linux distribution or component, can break and stay broken. To literally be unable to keep a system running without the image suddenly freezing and the monitor shutting down every single day, for over a quarter of an year... that goes far beyond that limit. I'm sorry for the outburst, but at this stage I think something needed to be said. I did not expect something like this to get dragged so far, and that I'd be unable to keep my system running for months. I'm going to bump the severity of this issue again, in hopes that someone can please take a look at it so I can run my system normally again! Thank you. -- You are receiving this mail because: You are the assignee for the bug.___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 194761] amdgpu driver breaks on Oland (SI)
https://bugzilla.kernel.org/show_bug.cgi?id=194761 --- Comment #11 from Jean Delvare (jdelv...@suse.de) --- Can you please point me to the exact tree and branch I am supposed to test? Also, do you happen to know which commits in that branch are fixing the problem? -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v2] gpu: drm: gma500: remove dead code
On Fri, May 19, 2017 at 11:19 AM, Gustavo A. R. Silva
wrote:
> Local variable use_gct is assigned to a constant value and it is never
> updated again. Remove this variable and the dead code it guards.
>
> Addresses-Coverity-ID: 145690
> Signed-off-by: Gustavo A. R. Silva
I believe the first version is already in drm-misc. Actually this
entire file can be removed. It was never hooked up and since nobody
every complained I feel confident we can remove it.
Cheers
Patrik
> ---
> Changes in v2:
> Remove variables ti and dev_priv, which was causing a compilation warning.
>
> I have improved my testing to avoid similar issues in the future.
> This is how I tested it this time:
>
> $ make allmodconfig
> $ make drivers/gpu/drm/gma500/mdfld_tpo_vid.o
>
>
> drivers/gpu/drm/gma500/mdfld_tpo_vid.c | 53
> ++
> 1 file changed, 9 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
> b/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
> index d8d4170..a9420bf 100644
> --- a/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
> +++ b/drivers/gpu/drm/gma500/mdfld_tpo_vid.c
> @@ -30,55 +30,20 @@
> static struct drm_display_mode *tpo_vid_get_config_mode(struct drm_device
> *dev)
> {
> struct drm_display_mode *mode;
> - struct drm_psb_private *dev_priv = dev->dev_private;
> - struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
> - bool use_gct = false;
>
> mode = kzalloc(sizeof(*mode), GFP_KERNEL);
> if (!mode)
> return NULL;
>
> - if (use_gct) {
> - mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
> - mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
> - mode->hsync_start = mode->hdisplay +
> - ((ti->hsync_offset_hi << 8) |
> - ti->hsync_offset_lo);
> - mode->hsync_end = mode->hsync_start +
> - ((ti->hsync_pulse_width_hi << 8) |
> - ti->hsync_pulse_width_lo);
> - mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) |
> -
> ti->hblank_lo);
> - mode->vsync_start =
> - mode->vdisplay + ((ti->vsync_offset_hi << 8) |
> - ti->vsync_offset_lo);
> - mode->vsync_end =
> - mode->vsync_start + ((ti->vsync_pulse_width_hi << 8) |
> - ti->vsync_pulse_width_lo);
> - mode->vtotal = mode->vdisplay +
> - ((ti->vblank_hi << 8) | ti->vblank_lo);
> - mode->clock = ti->pixel_clock * 10;
> -
> - dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay);
> - dev_dbg(dev->dev, "vdisplay is %d\n", mode->vdisplay);
> - dev_dbg(dev->dev, "HSS is %d\n", mode->hsync_start);
> - dev_dbg(dev->dev, "HSE is %d\n", mode->hsync_end);
> - dev_dbg(dev->dev, "htotal is %d\n", mode->htotal);
> - dev_dbg(dev->dev, "VSS is %d\n", mode->vsync_start);
> - dev_dbg(dev->dev, "VSE is %d\n", mode->vsync_end);
> - dev_dbg(dev->dev, "vtotal is %d\n", mode->vtotal);
> - dev_dbg(dev->dev, "clock is %d\n", mode->clock);
> - } else {
> - mode->hdisplay = 864;
> - mode->vdisplay = 480;
> - mode->hsync_start = 873;
> - mode->hsync_end = 876;
> - mode->htotal = 887;
> - mode->vsync_start = 487;
> - mode->vsync_end = 490;
> - mode->vtotal = 499;
> - mode->clock = 33264;
> - }
> + mode->hdisplay = 864;
> + mode->vdisplay = 480;
> + mode->hsync_start = 873;
> + mode->hsync_end = 876;
> + mode->htotal = 887;
> + mode->vsync_start = 487;
> + mode->vsync_end = 490;
> + mode->vtotal = 499;
> + mode->clock = 33264;
>
> drm_mode_set_name(mode);
> drm_mode_set_crtcinfo(mode, 0);
> --
> 2.5.0
>
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Re: [PATCH][drm-next] drm/pl111: make structure pl111_display_funcs static
On Fri, 19 May 2017, Colin King wrote:
> From: Colin Ian King
>
> structure pl111_display_funcs can be made static as it does not need to be
> in global scope. Fixes sparse warning:
>
> "warning: symbol 'pl111_display_funcs' was not declared. Should it
> be static?"
>
> Fixes: bed41005e6174d ("drm/pl111: Initial drm/kms driver for pl111")
The patch looks good and I appreciate what you're doing, but I question
the usefulness of adding Fixes: tags for trivial stuff like this. I'd
prefer Fixes: was reserved for actual fixes that should be backported to
any kernels that have the commit being fixed.
The same applies to many other patches you've sent recently.
BR,
Jani.
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/pl111/pl111_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/pl111/pl111_display.c
> b/drivers/gpu/drm/pl111/pl111_display.c
> index 39a5c33bce7d..bd8ff82c2fd9 100644
> --- a/drivers/gpu/drm/pl111/pl111_display.c
> +++ b/drivers/gpu/drm/pl111/pl111_display.c
> @@ -280,7 +280,7 @@ static int pl111_display_prepare_fb(struct
> drm_simple_display_pipe *pipe,
> return drm_fb_cma_prepare_fb(&pipe->plane, plane_state);
> }
>
> -const struct drm_simple_display_pipe_funcs pl111_display_funcs = {
> +static const struct drm_simple_display_pipe_funcs pl111_display_funcs = {
> .check = pl111_display_check,
> .enable = pl111_display_enable,
> .disable = pl111_display_disable,
--
Jani Nikula, Intel Open Source Technology Center
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[PATCH] drm/pl111: make structure mode_config_funcs static
From: Colin Ian King
structure mode_config_funcs can be made static as it does not need to be
in global scope. Fixes sparse warning:
warning: symbol 'mode_config_funcs' was not declared. Should it be static?
Fixes: bed41005e6174d ("drm/pl111: Initial drm/kms driver for pl111")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/pl111/pl111_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/pl111/pl111_drv.c
b/drivers/gpu/drm/pl111/pl111_drv.c
index 936403f65508..7012411071ba 100644
--- a/drivers/gpu/drm/pl111/pl111_drv.c
+++ b/drivers/gpu/drm/pl111/pl111_drv.c
@@ -72,7 +72,7 @@
#define DRIVER_DESC "DRM module for PL111"
-struct drm_mode_config_funcs mode_config_funcs = {
+static struct drm_mode_config_funcs mode_config_funcs = {
.fb_create = drm_fb_cma_create,
.atomic_check = drm_atomic_helper_check,
.atomic_commit = drm_atomic_helper_commit,
--
2.11.0
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[PATCH][drm-next] drm/pl111: make structure pl111_display_funcs static
From: Colin Ian King
structure pl111_display_funcs can be made static as it does not need to be
in global scope. Fixes sparse warning:
"warning: symbol 'pl111_display_funcs' was not declared. Should it
be static?"
Fixes: bed41005e6174d ("drm/pl111: Initial drm/kms driver for pl111")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/pl111/pl111_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/pl111/pl111_display.c
b/drivers/gpu/drm/pl111/pl111_display.c
index 39a5c33bce7d..bd8ff82c2fd9 100644
--- a/drivers/gpu/drm/pl111/pl111_display.c
+++ b/drivers/gpu/drm/pl111/pl111_display.c
@@ -280,7 +280,7 @@ static int pl111_display_prepare_fb(struct
drm_simple_display_pipe *pipe,
return drm_fb_cma_prepare_fb(&pipe->plane, plane_state);
}
-const struct drm_simple_display_pipe_funcs pl111_display_funcs = {
+static const struct drm_simple_display_pipe_funcs pl111_display_funcs = {
.check = pl111_display_check,
.enable = pl111_display_enable,
.disable = pl111_display_disable,
--
2.11.0
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[PATCH v2] drm: mediatek: change the variable type of rdma threshold
For some greater resolution, the rdma threshold
variable will overflow.
Signed-off-by: Bibby Hsieh
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index 0df05f9..9afdcd7 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -37,7 +37,7 @@
#define DISP_REG_RDMA_FIFO_CON 0x0040
#define RDMA_FIFO_UNDERFLOW_EN BIT(31)
#define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16)
-#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes)((bytes) / 16)
+#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) (((bytes) / 16) & 0x3ff)
/**
* struct mtk_disp_rdma - DISP_RDMA driver structure
@@ -109,7 +109,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp,
unsigned int width,
unsigned int height, unsigned int vrefresh,
unsigned int bpc)
{
- unsigned int threshold;
+ unsigned long long threshold;
unsigned int reg;
rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width);
@@ -121,7 +121,8 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp,
unsigned int width,
* output threshold to 6 microseconds with 7/6 overhead to
* account for blanking, and with a pixel depth of 4 bytes:
*/
- threshold = width * height * vrefresh * 4 * 7 / 100;
+ threshold = (unsigned long long)width * height * vrefresh *
+ 4 * 7 / 100;
reg = RDMA_FIFO_UNDERFLOW_EN |
RDMA_FIFO_PSEUDO_SIZE(SZ_8K) |
RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
--
1.9.1
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[Bug 194761] amdgpu driver breaks on Oland (SI)
https://bugzilla.kernel.org/show_bug.cgi?id=194761 --- Comment #10 from flora@amd.com --- glxgears works on oland with alex's 4.11 branch (HEAD: commit 3a7370c - drm/amdgpu: correct emit frame size for vcn dec/enc ring). -- You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[GIT PULL] exynos-drm-fixes
Hi Dave, a little bit big cleanups but this fixes some timeout issue at wait-for-vblank, fixups to dt broken issue and trivial cleanups. Please kindly let me know if there is any problem. Thanks, Inki Dae The following changes since commit 4fd8922689c9d73edc93473552987ea81e11463e: Merge tag 'drm-intel-fixes-2017-05-18-1' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes (2017-05-19 10:23:14 +1000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos tags/exynos-drm-fixes-for-v4.12 for you to fetch changes up to 041d4fcf12520cb32c18edb953ec6b707a2c6340: drm/exynos/decon5433: remove useless check (2017-05-19 17:28:17 +0900) Summary: - Fix dt binding of MIPI-DSI driver - Rework vblank handling . This patch series adds frame counter callback and removes unnecessary pipe relevnt fields and simplifies event handling. - Implement and fix sw-trigger relevant code . This patch moves TE relevant code from Panel and HDMI to DECON driver to fix a race between interrupt handlers and DECON disable, and to fix timeout issue at wait-for-vblank. . It removes unnecessary flags and check code specific to Exynos driver. Andrzej Hajda (21): drm/exynos: simplify completion event handling drm/exynos/decon5433: implement frame counter drm/exynos: kill exynos_drm_crtc::pipe drm/exynos: kill exynos_drm_private::pipe drm/exynos: set plane possible_crtcs in exynos_plane_init drm/exynos: kill pipe field from drivers contexts drm/exynos: kill mode_set_nofb callback drm/exynos/decon5433: kill DECON_UPDATE workaround drm/exynos/decon5433: kill BIT_IRQS_ENABLED drm/exynos/decon5433: simplify shadow protect code drm/exynos/hdmi: fix pipeline disable order drm/exynos/dsi: fix bridge_node DT parsing drm/exynos/decon5433: always do sw-trigger when vblanks enabled dt-bindings: exynos5433-decon: fix interrupts bindings dt-bindings: exynos5433-decon: add TE interrupt binding drm/exynos/decon5433: move TE handling to DECON drm/exynos/decon5433: kill BIT_IRQS_ENABLED flag drm/exynos/decon5433: kill BIT_CLKS_ENABLED flag drm/exynos/decon5433: kill BIT_WIN_UPDATED flag drm/exynos/decon5433: kill BIT_SUSPENDED flag drm/exynos/decon5433: remove useless check Daniel Vetter (1): drm/exynos: Merge pre/postclose hooks Hoegeun Kwon (1): drm/exynos: dsi: Fix the parse_dt function Inki Dae (1): drm/exynos: clean up description of exynos_drm_crtc Tobias Jakobi (2): drm/exynos: mixer: simplify mixer_cfg_rgb_fmt() drm/exynos: mixer: document YCbCr magic numbers .../bindings/display/exynos/exynos5433-decon.txt | 13 +- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 218 + drivers/gpu/drm/exynos/exynos7_drm_decon.c | 19 +- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 50 +++-- drivers/gpu/drm/exynos/exynos_drm_crtc.h | 1 - drivers/gpu/drm/exynos/exynos_drm_drv.c| 8 +- drivers/gpu/drm/exynos/exynos_drm_drv.h| 19 +- drivers/gpu/drm/exynos/exynos_drm_dsi.c| 24 +-- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 24 +-- drivers/gpu/drm/exynos/exynos_drm_plane.c | 5 +- drivers/gpu/drm/exynos/exynos_drm_plane.h | 1 - drivers/gpu/drm/exynos/exynos_drm_vidi.c | 22 +-- drivers/gpu/drm/exynos/exynos_hdmi.c | 13 +- drivers/gpu/drm/exynos/exynos_mixer.c | 76 --- drivers/gpu/drm/exynos/regs-mixer.h| 7 +- include/video/exynos5433_decon.h | 1 + 16 files changed, 192 insertions(+), 309 deletions(-) ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 2/4] dt-bindings: Document the Raspberry Pi Touchscreen nodes.
Hi Archit,
On Friday 19 May 2017 14:24:36 Archit Taneja wrote:
> On 05/18/2017 08:25 PM, Laurent Pinchart wrote:
> > On Thursday 18 May 2017 13:56:19 Archit Taneja wrote:
> >> On 05/17/2017 12:16 AM, Eric Anholt wrote:
> >
> > [snip]
> >
> >>> In terms of physical connections:
> >>>[15-pin "DSI" connector on 2835]
> >>> | I2C | DSI
> >>>/ \SPI |
> >>> [TS] [Atmel]--[TC358762]
> >>>\|
> >>> \PWM|
> >>> \ | DPI
> >>>
> >>> [some backlight]--[some unknown panel]
> >>>
> >>> The binding I'm trying to create is to expose what's necessary for a
> >>> driver that talks I2C to the Atmel, which then controls the PWM and does
> >>> the command sequence over SPI to the Toshiba that sets up its end of the
> >>> DSI link.
> >>
> >> The bridge (Atmel + TC358762 combination) here looks like it's primarily
> >> an i2c device (i.e, the control bus is i2c). Therefore, the drm-bridge
> >> driver here should be an i2c driver instead of a mipi_dsi_driver.
> >
> > Glad to see we agree, that's what I've proposed in a separate answer :-)
> > I'd go one step further though, there should be no DRM bridge, just a DRM
> > panel.
>
> If the PCB containing the controller chips and the panel are part of a
> single casing, and the set up won't work with another panel, then yeah, I
> agree. If the bridge chips are on a separate adapter board, and there is a
> possibility to connect other panels, then maybe a separate DRM bridge and a
> DRM panel might be a safer bet.
I thought it was a single black box, but upon closer inspection there's a
separate PCB with the Microcontroller and TC358762.
Eric, do you know if it's possible to exchange the panel for another one (and
not just an model with identical features from another vendor, but another
panel with a different mode for instance) without reprogramming the
microcontroller, or is the bridge board tied to the panel model ?
> >> We have the facility to create a mipi DSI device without the need to have
> >> a corresponding node in DT. The ADV7533 and TC358767 drivers are examples
> >> of that.
> >>
> >> The following is what the binding could look like, it's same as what Rob
> >> also mentioned previously in the thread.
> >>
> >> Thanks,
> >> Archit
> >>
> >> dsi1: dsi@7e70 {
> >>
> >>#address-cells = <1>;
> >>#size-cells = <0>;
> >><...>
> >>
> >>/* The SoC's DSI input/output port */
> >>ports {
> >>#address-cells = <1>;
> >>#size-cells = <0>;
> >>
> >>/* port@0 if needed */
> >>port@1 {
> >>dsi_out_port: endpoint {
> >>reg = <1>;
> >>remote-endpoint = <&bridge_dsi_port>;
> >>};
> >>};
> >>};
> >> };
> >>
> >> i2c_dsi: i2c {
> >>compatible = "i2c-gpio";
> >>#address-cells = <1>;
> >>#size-cells = <0>;
> >>gpios = <&gpio 28 0
> >> &gpio 29 0>;
> >>
> >>/* the Atmel + TC35872 bridge */
> >>pitouchscreen_bridge: bridge@45 {
> >
> > This should thus be lcd@45.
> >
> >>compatible = "raspberrypi,touchscreen-bridge";
> >
> > And this raspberrypi,7inch-touchscreen-panel. Shame we haven't
> > standardized
> > the vendor name prefix to rpi :-/
> >
> >>reg = <0x45>;
> >>
> >>ports {
> >>#address-cells = <1>;
> >>#size-cells = <0>;
> >>port@0 {
> >>reg = <0>;
> >>bridge_dsi_port: endpoint {
> >
> > This should be named panel_dsi_port.
> >
> >>remote-endpoint = <&dsi_out_port>;
> >>};
> >>};
> >>port@1 {
> >>reg = <1>;
> >>bridge_dpi_port: endpoint {
> >>remote-endpoint =
> > <&pitouchscreen_panel_port>;
> >>};
> >>};
> >
> > The second port is thus not needed.
> >
> >>};
> >
> > So we can simplify this to
> >
> > port {
> > panel_dsi_port: endpoint {
> > remote-endpoint = <&dsi_out_port>;
> > };
> > };
> >
> > (no need for a ports node when there's a single port)
> >
> >>};
> >> };
> >>
> >> lcd {
> >>compatible = "raspberrypi,7inch-touchscreen-panel";
> >>ports {
> >>#address-cells = <1>;
> >>#size-cells = <0>;
> >>port@0 {
> >>reg = <0>;
> >>pitouchscreen_panel_port: endpoint {
> >>remote-endpoint = <&bridge_dpi_port>;
> >>};
> >>};
> >>};
> >> };
> >
> > And this node
Re: [PATCH 2/4] dt-bindings: Document the Raspberry Pi Touchscreen nodes.
On 05/18/2017 08:25 PM, Laurent Pinchart wrote:
Hi Archit,
On Thursday 18 May 2017 13:56:19 Archit Taneja wrote:
On 05/17/2017 12:16 AM, Eric Anholt wrote:
[snip]
In terms of physical connections:
[15-pin "DSI" connector on 2835]
| I2C | DSI
/ \SPI |
[TS] [Atmel]--[TC358762]
\|
\PWM|
\ | DPI
[some backlight]--[some unknown panel]
The binding I'm trying to create is to expose what's necessary for a
driver that talks I2C to the Atmel, which then controls the PWM and does
the command sequence over SPI to the Toshiba that sets up its end of the
DSI link.
The bridge (Atmel + TC358762 combination) here looks like it's primarily
an i2c device (i.e, the control bus is i2c). Therefore, the drm-bridge
driver here should be an i2c driver instead of a mipi_dsi_driver.
Glad to see we agree, that's what I've proposed in a separate answer :-) I'd
go one step further though, there should be no DRM bridge, just a DRM panel.
If the PCB containing the controller chips and the panel are part of a single
casing, and the set up won't work with another panel, then yeah, I agree. If the
bridge chips are on a separate adapter board, and there is a possibility to
connect
other panels, then maybe a separate DRM bridge and a DRM panel might be a safer
bet.
Thanks,
Archit
We have the facility to create a mipi DSI device without the need to have
a corresponding node in DT. The ADV7533 and TC358767 drivers are examples
of that.
The following is what the binding could look like, it's same as what Rob
also mentioned previously in the thread.
Thanks,
Archit
dsi1: dsi@7e70 {
#address-cells = <1>;
#size-cells = <0>;
<...>
/* The SoC's DSI input/output port */
ports {
#address-cells = <1>;
#size-cells = <0>;
/* port@0 if needed */
port@1 {
dsi_out_port: endpoint {
reg = <1>;
remote-endpoint = <&bridge_dsi_port>;
};
};
};
};
i2c_dsi: i2c {
compatible = "i2c-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpio 28 0
&gpio 29 0>;
/* the Atmel + TC35872 bridge */
pitouchscreen_bridge: bridge@45 {
This should thus be lcd@45.
compatible = "raspberrypi,touchscreen-bridge";
And this raspberrypi,7inch-touchscreen-panel. Shame we haven't standardized
the vendor name prefix to rpi :-/
reg = <0x45>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
bridge_dsi_port: endpoint {
This should be named panel_dsi_port.
remote-endpoint = <&dsi_out_port>;
};
};
port@1 {
reg = <1>;
bridge_dpi_port: endpoint {
remote-endpoint =
<&pitouchscreen_panel_port>;
};
};
The second port is thus not needed.
};
So we can simplify this to
port {
panel_dsi_port: endpoint {
remote-endpoint = <&dsi_out_port>;
};
};
(no need for a ports node when there's a single port)
};
};
lcd {
compatible = "raspberrypi,7inch-touchscreen-panel";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
pitouchscreen_panel_port: endpoint {
remote-endpoint = <&bridge_dpi_port>;
};
};
};
};
And this node can go away.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
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Re: [PATCH] drm/stm: add COMPILE_TEST to Kconfig (fwd)
On line 466, the preceeding comment suggests that the second constant
should start with VS rather than HS again.
julia
-- Forwarded message --
Date: Fri, 19 May 2017 15:45:39 +0800
From: kbuild test robot
To: kbu...@01.org
Cc: Julia Lawall
Subject: Re: [PATCH] drm/stm: add COMPILE_TEST to Kconfig
CC: kbuild-...@01.org
In-Reply-To: <1495082711-10535-1-git-send-email-yamada.masah...@socionext.com>
TO: Masahiro Yamada
CC: dri-devel@lists.freedesktop.org, Daniel Vetter ,
linux-ker...@vger.kernel.org, Masahiro Yamada ,
Yannick Fertre , Philippe Cornu ,
David Airlie
CC: linux-ker...@vger.kernel.org, Masahiro Yamada
, Yannick Fertre ,
Philippe Cornu , David Airlie
Hi Masahiro,
[auto build test WARNING on drm/drm-next]
[cannot apply to v4.12-rc1 next-20170518]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Masahiro-Yamada/drm-stm-add-COMPILE_TEST-to-Kconfig/20170519-131342
base: git://people.freedesktop.org/~airlied/linux.git drm-next
:: branch date: 3 hours ago
:: commit date: 3 hours ago
>> drivers/gpu/drm/stm/ltdc.c:466:7-15: duplicated argument to & or |
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout c669a25d907f95d3e13f1dae9812642330b4aa28
vim +466 drivers/gpu/drm/stm/ltdc.c
b759012c Yannick Fertre 2017-04-14 450 accum_vbp = vsync +
vm.vback_porch;
b759012c Yannick Fertre 2017-04-14 451 accum_act_w = accum_hbp +
vm.hactive;
b759012c Yannick Fertre 2017-04-14 452 accum_act_h = accum_vbp +
vm.vactive;
b759012c Yannick Fertre 2017-04-14 453 total_width = accum_act_w +
vm.hfront_porch;
b759012c Yannick Fertre 2017-04-14 454 total_height = accum_act_h +
vm.vfront_porch;
b759012c Yannick Fertre 2017-04-14 455
b759012c Yannick Fertre 2017-04-14 456 clk_disable(ldev->pixel_clk);
b759012c Yannick Fertre 2017-04-14 457
b759012c Yannick Fertre 2017-04-14 458 if
(clk_set_rate(ldev->pixel_clk, rate) < 0) {
b759012c Yannick Fertre 2017-04-14 459 DRM_ERROR("Cannot set
rate (%dHz) for pixel clk\n", rate);
b759012c Yannick Fertre 2017-04-14 460 return;
b759012c Yannick Fertre 2017-04-14 461 }
b759012c Yannick Fertre 2017-04-14 462
b759012c Yannick Fertre 2017-04-14 463 clk_enable(ldev->pixel_clk);
b759012c Yannick Fertre 2017-04-14 464
b759012c Yannick Fertre 2017-04-14 465 /* Configures the HS, VS, DE
and PC polarities. */
b759012c Yannick Fertre 2017-04-14 @466 val = HSPOL_AL | HSPOL_AL |
DEPOL_AL | PCPOL_IPC;
b759012c Yannick Fertre 2017-04-14 467
b759012c Yannick Fertre 2017-04-14 468 if (vm.flags &
DISPLAY_FLAGS_HSYNC_HIGH)
b759012c Yannick Fertre 2017-04-14 469 val |= HSPOL_AH;
b759012c Yannick Fertre 2017-04-14 470
b759012c Yannick Fertre 2017-04-14 471 if (vm.flags &
DISPLAY_FLAGS_VSYNC_HIGH)
b759012c Yannick Fertre 2017-04-14 472 val |= VSPOL_AH;
b759012c Yannick Fertre 2017-04-14 473
b759012c Yannick Fertre 2017-04-14 474 if (vm.flags &
DISPLAY_FLAGS_DE_HIGH)
:: The code at line 466 was first introduced by commit
:: b759012c5fa761ee08998c80fc4ad6343c258487 drm/stm: Add STM32 LTDC driver
:: TO: Yannick Fertre
:: CC: Eric Anholt
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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Re: [PATCH -next] drm/i915: Fix return value check in kfence selftests
On Fri, May 19, 2017 at 12:26:05AM +, Wei Yongjun wrote: > From: Wei Yongjun > > Fix the return value check which testing the wrong variable. Already fixed up yesterday: commit ac0a73fb526100adc521ec2069623e47ca3997a8 Author: Colin Ian King Date: Thu May 18 14:39:42 2017 +0100 drm/i915: Check C for null pointer rather than B Thanks for the patch. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/4] drm/dp: start a DPCD based DP sink/branch device quirk database
On Fri, 19 May 2017, Andrzej Hajda wrote:
> On 18.05.2017 13:10, Jani Nikula wrote:
>> Face the fact, there are Display Port sink and branch devices out there
>> in the wild that don't follow the Display Port specifications, or they
>> have bugs, or just otherwise require special treatment. Start a common
>> quirk database the drivers can query based on the DP device
>> identification. At least for now, we leave the workarounds for the
>> drivers to implement as they see fit.
>>
>> For starters, add a branch device that can't handle full 24-bit main
>> link Mdiv and Ndiv main link attributes properly. Naturally, the
>> workaround of reducing main link attributes for all devices ended up in
>> regressions for other devices. So here we are.
>>
>> v2: Rebase on DRM DP desc read helpers
>>
>> v3: Fix the OUI memcmp blunder (Clint)
>>
>> Cc: Ville Syrjälä
>> Cc: Dhinakaran Pandiyan
>> Cc: Clint Taylor
>> Cc: Adam Jackson
>> Cc: Harry Wentland
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/drm_dp_helper.c | 52
>> +++--
>> include/drm/drm_dp_helper.h | 32 +
>> 2 files changed, 82 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_dp_helper.c
>> b/drivers/gpu/drm/drm_dp_helper.c
>> index 52e0ca9a5bb1..213fb837e1c4 100644
>> --- a/drivers/gpu/drm/drm_dp_helper.c
>> +++ b/drivers/gpu/drm/drm_dp_helper.c
>> @@ -1209,6 +1209,51 @@ int drm_dp_stop_crc(struct drm_dp_aux *aux)
>> }
>> EXPORT_SYMBOL(drm_dp_stop_crc);
>>
>> +struct dpcd_quirk {
>> +u8 oui[3];
>> +bool is_branch;
>> +u32 quirks;
>> +};
>> +
>> +#define OUI(first, second, third) { (first), (second), (third) }
>> +
>> +static const struct dpcd_quirk dpcd_quirk_list[] = {
>> +/* Analogix 7737 needs reduced M and N at HBR2 link rates */
>> +{ OUI(0x00, 0x22, 0xb9), true, BIT(DP_DPCD_QUIRK_LIMITED_M_N) },
>> +};
>> +
>> +#undef OUI
>> +
>
> Wouldn't be more clear this way:
>
> #define OUI_ANALOGIX {0x00, 0x22, 0xb9}
>
> static const struct dpcd_quirk dpcd_quirk_list[] = {
> { OUI_ANALOGIX, true, BIT(DP_DPCD_QUIRK_LIMITED_M_N) },
> };
Assuming we add more quirks like this later on, I prefer keeping my
approach.
> Anyway, it seems the quirk is for all analogix branch devs, not only
> ANX7737, is it correct?
True. I'm not sure if we have enough information to accurately limit
this to just the affected devices. The check can be narrowed later on as
needed.
BR,
Jani.
>
> Regards
> Andrzej
>
>> +/*
>> + * Get a bit mask of DPCD quirks for the sink/branch device identified by
>> + * ident. The quirk data is shared but it's up to the drivers to act on the
>> + * data.
>> + *
>> + * For now, only the OUI (first three bytes) is used, but this may be
>> extended
>> + * to device identification string and hardware/firmware revisions later.
>> + */
>> +static u32
>> +drm_dp_get_quirks(const struct drm_dp_dpcd_ident *ident, bool is_branch)
>> +{
>> +const struct dpcd_quirk *quirk;
>> +u32 quirks = 0;
>> +int i;
>> +
>> +for (i = 0; i < ARRAY_SIZE(dpcd_quirk_list); i++) {
>> +quirk = &dpcd_quirk_list[i];
>> +
>> +if (quirk->is_branch != is_branch)
>> +continue;
>> +
>> +if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0)
>> +continue;
>> +
>> +quirks |= quirk->quirks;
>> +}
>> +
>> +return quirks;
>> +}
>> +
>> /**
>> * drm_dp_read_desc - read sink/branch descriptor from DPCD
>> * @aux: DisplayPort AUX channel
>> @@ -1231,14 +1276,17 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct
>> drm_dp_desc *desc,
>> if (ret < 0)
>> return ret;
>>
>> +desc->quirks = drm_dp_get_quirks(ident, is_branch);
>> +
>> dev_id_len = strnlen(ident->device_id, sizeof(ident->device_id));
>>
>> -DRM_DEBUG_KMS("DP %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev
>> %d.%d\n",
>> +DRM_DEBUG_KMS("DP %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d
>> quirks 0x%04x\n",
>>is_branch ? "branch" : "sink",
>>(int)sizeof(ident->oui), ident->oui,
>>dev_id_len, ident->device_id,
>>ident->hw_rev >> 4, ident->hw_rev & 0xf,
>> - ident->sw_major_rev, ident->sw_minor_rev);
>> + ident->sw_major_rev, ident->sw_minor_rev,
>> + desc->quirks);
>>
>> return 0;
>> }
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index aee5b96b51d7..717cb8496725 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -1090,12 +1090,44 @@ struct drm_dp_dpcd_ident {
>> /**
>> * struct drm_dp_desc - DP branch/sink device descriptor
>> * @ident: DP device identification from DPCD 0x400 (sink) or 0x500
>> (branch).
>> + * @quirks: Quirks; use drm_dp_has_quirk() to query for the quirks.
>> */
>> struct drm_dp_desc {
>> struct drm
