Re: [PATCH 2/2] drm/fourcc: Fill out all block sizes for P210
On Tue, Nov 26, 2019 at 10:14:14AM +0100, Daniel Vetter wrote:
> 0 means 1 as the default, but it's mighty confusing if the block size
> for the first plane is spelled out explicitly, but not for the 2nd
> plane.
>
> No cc: stable because this is just confusion, but 0 functional issue.
Agree!
>
> Fixes: 7ba0fee247ee ("drm/fourcc: Add AFBC yuv fourccs for Mali")
> Cc: Brian Starkey
> Cc: Ayan Kumar Halder
> Cc: Liviu Dudau
Acked-by: Liviu Dudau
Best regards,
> Cc: Alyssa Rosenzweig
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_fourcc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index fe79ce857c8a..b234bfaeda06 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -263,7 +263,7 @@ const struct drm_format_info *__drm_format_info(u32
> format)
> .hsub = 2, .vsub = 2, .is_yuv = true},
> { .format = DRM_FORMAT_P210,.depth = 0,
> .num_planes = 2, .char_per_block = { 2, 4, 0 },
> - .block_w = { 1, 0, 0 }, .block_h = { 1, 0, 0 }, .hsub = 2,
> + .block_w = { 1, 1, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2,
> .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_VUY101010, .depth = 0,
> .num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1,
> --
> 2.24.0
>
--
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---
¯\_(ツ)_/¯
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Re: [PATCH v2 2/2] drm: share address space for dma bufs
Am 22.11.19 um 19:21 schrieb Alex Deucher:
On Fri, Nov 22, 2019 at 4:17 AM Daniel Vetter wrote:
On Fri, Nov 22, 2019 at 7:37 AM Gerd Hoffmann wrote:
Use the shared address space of the drm device (see drm_open() in
drm_file.c) for dma-bufs too. That removes a difference betweem drm
device mmap vmas and dma-buf mmap vmas and fixes corner cases like
dropping ptes (using madvise(DONTNEED) for example) not working
properly.
Also remove amdgpu driver's private dmabuf update. It is not needed
any more now that we are doing this for everybody.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Daniel Vetter
But I think you want at least an ack from amd guys for double checking here.
-Daniel
Looks correct to me.
Reviewed-by: Alex Deucher
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 4 +---
drivers/gpu/drm/drm_prime.c | 4 +++-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index d5bcdfefbad6..586db4fb46bd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -361,10 +361,8 @@ struct dma_buf *amdgpu_gem_prime_export(struct
drm_gem_object *gobj,
return ERR_PTR(-EPERM);
buf = drm_gem_prime_export(gobj, flags);
- if (!IS_ERR(buf)) {
- buf->file->f_mapping = gobj->dev->anon_inode->i_mapping;
+ if (!IS_ERR(buf))
buf->ops = _dmabuf_ops;
- }
return buf;
}
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index a9633bd241bb..c3fc341453c0 100644
--- a/drivers/gpu/drm/drm_prime.c
+++ b/drivers/gpu/drm/drm_prime.c
@@ -240,6 +240,7 @@ void drm_prime_destroy_file_private(struct
drm_prime_file_private *prime_fpriv)
struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev,
struct dma_buf_export_info *exp_info)
{
+ struct drm_gem_object *obj = exp_info->priv;
struct dma_buf *dma_buf;
dma_buf = dma_buf_export(exp_info);
@@ -247,7 +248,8 @@ struct dma_buf *drm_gem_dmabuf_export(struct drm_device
*dev,
return dma_buf;
drm_dev_get(dev);
- drm_gem_object_get(exp_info->priv);
+ drm_gem_object_get(obj);
+ dma_buf->file->f_mapping = obj->dev->anon_inode->i_mapping;
return dma_buf;
}
--
2.18.1
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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[PATCH v1 2/2] drm/komeda: Refactor sysfs node "config_id"
From: "James Qian Wang (Arm Technology China)"
Split sysfs config_id bitfiles to multiple separated sysfs files.
Signed-off-by: James Qian Wang (Arm Technology China)
---
.../drm/arm/display/include/malidp_product.h | 13 ---
.../gpu/drm/arm/display/komeda/komeda_sysfs.c | 80 ++-
2 files changed, 62 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/include/malidp_product.h
b/drivers/gpu/drm/arm/display/include/malidp_product.h
index dbd3d4765065..b21f4aa15c95 100644
--- a/drivers/gpu/drm/arm/display/include/malidp_product.h
+++ b/drivers/gpu/drm/arm/display/include/malidp_product.h
@@ -21,17 +21,4 @@
#define MALIDP_D71_PRODUCT_ID 0x0071
#define MALIDP_D32_PRODUCT_ID 0x0032
-union komeda_config_id {
- struct {
- __u32 max_line_sz:16,
- n_pipelines:2,
- n_scalers:2, /* number of scalers per pipeline */
- n_layers:3, /* number of layers per pipeline */
- n_richs:3, /* number of rich layers per pipeline */
- side_by_side:1, /* if HW works on side_by_side mode */
- reserved_bits:5;
- };
- __u32 value;
-};
-
#endif /* _MALIDP_PRODUCT_H_ */
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
b/drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
index 740f095b4ca5..5effab795dc1 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
@@ -18,28 +18,67 @@ core_id_show(struct device *dev, struct device_attribute
*attr, char *buf)
static DEVICE_ATTR_RO(core_id);
static ssize_t
-config_id_show(struct device *dev, struct device_attribute *attr, char *buf)
+line_size_show(struct device *dev, struct device_attribute *attr, char *buf)
{
struct komeda_dev *mdev = dev_to_mdev(dev);
struct komeda_pipeline *pipe = mdev->pipelines[0];
- union komeda_config_id config_id;
- int i;
-
- memset(_id, 0, sizeof(config_id));
-
- config_id.max_line_sz = pipe->layers[0]->hsize_in.end;
- config_id.side_by_side = mdev->side_by_side;
- config_id.n_pipelines = mdev->n_pipelines;
- config_id.n_scalers = pipe->n_scalers;
- config_id.n_layers = pipe->n_layers;
- config_id.n_richs = 0;
- for (i = 0; i < pipe->n_layers; i++) {
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", pipe->layers[0]->hsize_in.end);
+}
+static DEVICE_ATTR_RO(line_size);
+
+static ssize_t
+n_pipelines_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct komeda_dev *mdev = dev_to_mdev(dev);
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", mdev->n_pipelines);
+}
+static DEVICE_ATTR_RO(n_pipelines);
+
+static ssize_t
+n_layers_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct komeda_dev *mdev = dev_to_mdev(dev);
+ struct komeda_pipeline *pipe = mdev->pipelines[0];
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", pipe->n_layers);
+}
+static DEVICE_ATTR_RO(n_layers);
+
+static ssize_t
+n_rich_layers_show(struct device *dev, struct device_attribute *attr, char
*buf)
+{
+ struct komeda_dev *mdev = dev_to_mdev(dev);
+ struct komeda_pipeline *pipe = mdev->pipelines[0];
+ int i, n_richs = 0;
+
+ for (i = 0; i < pipe->n_layers; i++)
if (pipe->layers[i]->layer_type == KOMEDA_FMT_RICH_LAYER)
- config_id.n_richs++;
- }
- return snprintf(buf, PAGE_SIZE, "0x%08x\n", config_id.value);
+ n_richs++;
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", n_richs);
+}
+static DEVICE_ATTR_RO(n_rich_layers);
+
+static ssize_t
+n_scalers_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct komeda_dev *mdev = dev_to_mdev(dev);
+ struct komeda_pipeline *pipe = mdev->pipelines[0];
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", pipe->n_scalers);
+}
+static DEVICE_ATTR_RO(n_scalers);
+
+static ssize_t
+side_by_side_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct komeda_dev *mdev = dev_to_mdev(dev);
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", mdev->side_by_side);
}
-static DEVICE_ATTR_RO(config_id);
+static DEVICE_ATTR_RO(side_by_side);
static ssize_t
aclk_hz_show(struct device *dev, struct device_attribute *attr, char *buf)
@@ -52,7 +91,12 @@ static DEVICE_ATTR_RO(aclk_hz);
static struct attribute *komeda_sysfs_entries[] = {
_attr_core_id.attr,
- _attr_config_id.attr,
+ _attr_line_size.attr,
+ _attr_n_pipelines.attr,
+ _attr_n_layers.attr,
+ _attr_n_rich_layers.attr,
+ _attr_n_scalers.attr,
+ _attr_side_by_side.attr,
_attr_aclk_hz.attr,
NULL,
};
--
2.20.1
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[PATCH v1 0/2] drm/komeda: refactor sysfs node "config_id"
Split sysfs node "config_id" to multiple files. James Qian Wang (Arm Technology China) (2): drm/komeda: Add a new file komeda_sysfs.c drm/komeda: Refactor sysfs node "config_id" .../drm/arm/display/include/malidp_product.h | 13 -- drivers/gpu/drm/arm/display/komeda/Makefile | 1 + .../gpu/drm/arm/display/komeda/komeda_dev.c | 61 + .../gpu/drm/arm/display/komeda/komeda_dev.h | 3 + .../gpu/drm/arm/display/komeda/komeda_sysfs.c | 125 ++ 5 files changed, 132 insertions(+), 71 deletions(-) create mode 100644 drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c -- 2.20.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v1 1/2] drm/komeda: Add a new file komeda_sysfs.c
From: "James Qian Wang (Arm Technology China)"
Add a new file komeda_sysfs.c and move all sysfs related code to it.
Signed-off-by: James Qian Wang (Arm Technology China)
---
drivers/gpu/drm/arm/display/komeda/Makefile | 1 +
.../gpu/drm/arm/display/komeda/komeda_dev.c | 61 +-
.../gpu/drm/arm/display/komeda/komeda_dev.h | 3 +
.../gpu/drm/arm/display/komeda/komeda_sysfs.c | 81 +++
4 files changed, 88 insertions(+), 58 deletions(-)
create mode 100644 drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
diff --git a/drivers/gpu/drm/arm/display/komeda/Makefile
b/drivers/gpu/drm/arm/display/komeda/Makefile
index 1931a7fa1a14..706674ca5928 100644
--- a/drivers/gpu/drm/arm/display/komeda/Makefile
+++ b/drivers/gpu/drm/arm/display/komeda/Makefile
@@ -7,6 +7,7 @@ ccflags-y := \
komeda-y := \
komeda_drv.o \
komeda_dev.o \
+ komeda_sysfs.o \
komeda_format_caps.o \
komeda_color_mgmt.o \
komeda_pipeline.o \
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
index 8e0bce46555b..734b88b88d94 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
@@ -63,59 +63,6 @@ static void komeda_debugfs_init(struct komeda_dev *mdev)
}
#endif
-static ssize_t
-core_id_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct komeda_dev *mdev = dev_to_mdev(dev);
-
- return snprintf(buf, PAGE_SIZE, "0x%08x\n", mdev->chip.core_id);
-}
-static DEVICE_ATTR_RO(core_id);
-
-static ssize_t
-config_id_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct komeda_dev *mdev = dev_to_mdev(dev);
- struct komeda_pipeline *pipe = mdev->pipelines[0];
- union komeda_config_id config_id;
- int i;
-
- memset(_id, 0, sizeof(config_id));
-
- config_id.max_line_sz = pipe->layers[0]->hsize_in.end;
- config_id.side_by_side = mdev->side_by_side;
- config_id.n_pipelines = mdev->n_pipelines;
- config_id.n_scalers = pipe->n_scalers;
- config_id.n_layers = pipe->n_layers;
- config_id.n_richs = 0;
- for (i = 0; i < pipe->n_layers; i++) {
- if (pipe->layers[i]->layer_type == KOMEDA_FMT_RICH_LAYER)
- config_id.n_richs++;
- }
- return snprintf(buf, PAGE_SIZE, "0x%08x\n", config_id.value);
-}
-static DEVICE_ATTR_RO(config_id);
-
-static ssize_t
-aclk_hz_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct komeda_dev *mdev = dev_to_mdev(dev);
-
- return snprintf(buf, PAGE_SIZE, "%lu\n", clk_get_rate(mdev->aclk));
-}
-static DEVICE_ATTR_RO(aclk_hz);
-
-static struct attribute *komeda_sysfs_entries[] = {
- _attr_core_id.attr,
- _attr_config_id.attr,
- _attr_aclk_hz.attr,
- NULL,
-};
-
-static struct attribute_group komeda_sysfs_attr_group = {
- .attrs = komeda_sysfs_entries,
-};
-
static int komeda_parse_pipe_dt(struct komeda_pipeline *pipe)
{
struct device_node *np = pipe->of_node;
@@ -277,11 +224,9 @@ struct komeda_dev *komeda_dev_create(struct device *dev)
clk_disable_unprepare(mdev->aclk);
- err = sysfs_create_group(>kobj, _sysfs_attr_group);
- if (err) {
- DRM_ERROR("create sysfs group failed.\n");
+ err = komeda_dev_sysfs_init(mdev);
+ if (err)
goto err_cleanup;
- }
mdev->err_verbosity = KOMEDA_DEV_PRINT_ERR_EVENTS;
@@ -304,7 +249,7 @@ void komeda_dev_destroy(struct komeda_dev *mdev)
const struct komeda_dev_funcs *funcs = mdev->funcs;
int i;
- sysfs_remove_group(>kobj, _sysfs_attr_group);
+ komeda_dev_sysfs_destroy(mdev);
#ifdef CONFIG_DEBUG_FS
debugfs_remove_recursive(mdev->debugfs_root);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
index dacdb00153e9..6183e0f394f0 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
@@ -248,4 +248,7 @@ void komeda_print_events(struct komeda_events *evts, struct
drm_device *dev);
int komeda_dev_resume(struct komeda_dev *mdev);
int komeda_dev_suspend(struct komeda_dev *mdev);
+int komeda_dev_sysfs_init(struct komeda_dev *mdev);
+void komeda_dev_sysfs_destroy(struct komeda_dev *mdev);
+
#endif /*_KOMEDA_DEV_H_*/
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
b/drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
new file mode 100644
index ..740f095b4ca5
--- /dev/null
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_sysfs.c
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) COPYRIGHT 2019 ARM Limited. All rights reserved.
+ * Author: James.Qian.Wang
+ *
+ */
+#include
+
+#include "komeda_dev.h"
+
+static ssize_t
+core_id_show(struct device *dev, struct device_attribute *attr,
Re: [PATCH 15/15] dma-buf: Remove kernel map/unmap hooks
On Mon, Nov 18, 2019 at 11:35:36AM +0100, Daniel Vetter wrote:
> All implementations are gone now.
>
> Signed-off-by: Daniel Vetter
> Cc: Sumit Semwal
> Cc: linux-me...@vger.kernel.org
> Cc: linaro-mm-...@lists.linaro.org
Applied the final two patches of this series now too.
-Daniel
> ---
> include/linux/dma-buf.h | 25 -
> 1 file changed, 25 deletions(-)
>
> diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h
> index 7feb9c3805ae..abf5459a5b9d 100644
> --- a/include/linux/dma-buf.h
> +++ b/include/linux/dma-buf.h
> @@ -249,31 +249,6 @@ struct dma_buf_ops {
>*/
> int (*mmap)(struct dma_buf *, struct vm_area_struct *vma);
>
> - /**
> - * @map:
> - *
> - * Maps a page from the buffer into kernel address space. The page is
> - * specified by offset into the buffer in PAGE_SIZE units.
> - *
> - * This callback is optional.
> - *
> - * Returns:
> - *
> - * Virtual address pointer where requested page can be accessed. NULL
> - * on error or when this function is unimplemented by the exporter.
> - */
> - void *(*map)(struct dma_buf *, unsigned long);
> -
> - /**
> - * @unmap:
> - *
> - * Unmaps a page from the buffer. Page offset and address pointer should
> - * be the same as the one passed to and returned by matching call to
> map.
> - *
> - * This callback is optional.
> - */
> - void (*unmap)(struct dma_buf *, unsigned long, void *);
> -
> void *(*vmap)(struct dma_buf *);
> void (*vunmap)(struct dma_buf *, void *vaddr);
> };
> --
> 2.24.0
>
--
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[PATCH v2] drm/mgag200: Add module parameter to pin all buffers at offset 0
For hardware that does not interpret the startadd field correctly,
add the module parameter 'hw_bug_no_startadd', which enables the
workaround.
v2:
* ask user for feedback if the option is active
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Cc: John Donnelly
---
drivers/gpu/drm/mgag200/mgag200_drv.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
b/drivers/gpu/drm/mgag200/mgag200_drv.c
index d43951caeea0..284d58af8d45 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -27,6 +27,10 @@ int mgag200_modeset = -1;
MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, mgag200_modeset, int, 0400);
+int mgag200_hw_bug_no_startadd = -1;
+MODULE_PARM_DESC(modeset, "HW does not interpret scanout-buffer start address
correctly");
+module_param_named(hw_bug_no_startadd, mgag200_hw_bug_no_startadd, int, 0400);
+
static struct drm_driver driver;
static const struct pci_device_id pciidlist[] = {
@@ -64,6 +68,15 @@ DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
static bool mgag200_pin_bo_at_0(const struct mga_device *mdev)
{
+ if (mgag200_hw_bug_no_startadd > 0) {
+ DRM_WARN_ONCE("Option hw_bug_no_startedd is enabled. Please "
+ "report the output of 'lspci -vvnn' to "
+ " if this "
+ "option is required to make mgag200 work "
+ "correctly on your system.\n");
+ return true;
+ } else if (!mgag200_hw_bug_no_startadd)
+ return false;
return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD;
}
--
2.23.0
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[PATCH v2 3/3] drm/mgag200: Add workaround for HW that does not support 'startadd'
There's at least one system that does not interpret the value of
the device's 'startadd' field correctly, which leads to incorrectly
displayed scanout buffers. Always placing the active scanout buffer
at offset 0 works around the problem.
Signed-off-by: Thomas Zimmermann
Reported-by: John Donnelly
Tested-by: John Donnelly
Reviewed-by: Daniel Vetter
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap +
unpin")
Cc: Gerd Hoffmann
Cc: Dave Airlie
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: David Airlie
Cc: Sam Ravnborg
Cc: "Y.C. Chen"
Cc: Neil Armstrong
Cc: Thomas Gleixner
Cc: "José Roberto de Souza"
Cc: Andrzej Pietrasiewicz
Cc: dri-devel@lists.freedesktop.org
Cc: # v5.3+
Link: https://gitlab.freedesktop.org/drm/misc/issues/7
---
drivers/gpu/drm/mgag200/mgag200_drv.c | 36 ++-
drivers/gpu/drm/mgag200/mgag200_drv.h | 3 +++
2 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
b/drivers/gpu/drm/mgag200/mgag200_drv.c
index 397f8b0a9af8..d43951caeea0 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -30,6 +30,8 @@ module_param_named(modeset, mgag200_modeset, int, 0400);
static struct drm_driver driver;
static const struct pci_device_id pciidlist[] = {
+ { PCI_VENDOR_ID_MATROX, 0x522, PCI_VENDOR_ID_SUN, 0x4852, 0, 0,
+ G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
{ PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A
},
{ PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B
},
{ PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
@@ -60,6 +62,35 @@ static void mga_pci_remove(struct pci_dev *pdev)
DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
+static bool mgag200_pin_bo_at_0(const struct mga_device *mdev)
+{
+ return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD;
+}
+
+int mgag200_driver_dumb_create(struct drm_file *file,
+ struct drm_device *dev,
+ struct drm_mode_create_dumb *args)
+{
+ struct mga_device *mdev = dev->dev_private;
+ unsigned long pg_align;
+
+ if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
+ return -EINVAL;
+
+ pg_align = 0ul;
+
+ /*
+* Aligning scanout buffers to the size of the video ram forces
+* placement at offset 0. Works around a bug where HW does not
+* respect 'startadd' field.
+*/
+ if (mgag200_pin_bo_at_0(mdev))
+ pg_align = PFN_UP(mdev->mc.vram_size);
+
+ return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
+pg_align, false, args);
+}
+
static struct drm_driver driver = {
.driver_features = DRIVER_GEM | DRIVER_MODESET,
.load = mgag200_driver_load,
@@ -71,7 +102,10 @@ static struct drm_driver driver = {
.major = DRIVER_MAJOR,
.minor = DRIVER_MINOR,
.patchlevel = DRIVER_PATCHLEVEL,
- DRM_GEM_VRAM_DRIVER
+ .debugfs_init = drm_vram_mm_debugfs_init,
+ .dumb_create = mgag200_driver_dumb_create,
+ .dumb_map_offset = drm_gem_vram_driver_dumb_mmap_offset,
+ .gem_prime_mmap = drm_gem_prime_mmap,
};
static struct pci_driver mgag200_pci_driver = {
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 4b4f9ce74a84..aa32aad222c2 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -150,6 +150,9 @@ enum mga_type {
G200_EW3,
};
+/* HW does not handle 'startadd' field correct. */
+#define MGAG200_FLAG_HW_BUG_NO_STARTADD(1ul << 8)
+
#define MGAG200_TYPE_MASK (0x00ff)
#define MGAG200_FLAG_MASK (0x0000)
--
2.23.0
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[PATCH v2 0/3] drm/mgag200: Workaround HW bug with non-0 offset
We found an MGA chip that does not interpret the scanout offset correctly. This patchset works around the problem by placing all buffer objects at offset 0 on this system. v2: * serarate [4/4] from the rest of the series * add missing tags to patch files Thomas Zimmermann (3): drm/mgag200: Extract device type from flags drm/mgag200: Store flags from PCI driver data in device structure drm/mgag200: Add workaround for HW that does not support 'startadd' drivers/gpu/drm/mgag200/mgag200_drv.c | 36 +- drivers/gpu/drm/mgag200/mgag200_drv.h | 18 + drivers/gpu/drm/mgag200/mgag200_main.c | 3 ++- 3 files changed, 55 insertions(+), 2 deletions(-) -- 2.23.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/3] drm/mgag200: Extract device type from flags
Adds a conversion function that extracts the device type from the
PCI id-table flags. Allows for storing additional information in the
other flag bits.
Signed-off-by: Thomas Zimmermann
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap +
unpin")
Reviewed-by: Daniel Vetter
Cc: John Donnelly
Cc: Gerd Hoffmann
Cc: Dave Airlie
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: David Airlie
Cc: Sam Ravnborg
Cc: Emil Velikov
Cc: "Y.C. Chen"
Cc: Laurent Pinchart
Cc: "José Roberto de Souza"
Cc: Andrzej Pietrasiewicz
Cc: dri-devel@lists.freedesktop.org
Cc: # v5.3+
---
drivers/gpu/drm/mgag200/mgag200_drv.h | 7 +++
drivers/gpu/drm/mgag200/mgag200_main.c | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 0ea9a525e57d..976404634092 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -150,6 +150,8 @@ enum mga_type {
G200_EW3,
};
+#define MGAG200_TYPE_MASK (0x00ff)
+
#define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
struct mga_device {
@@ -181,6 +183,11 @@ struct mga_device {
u32 unique_rev_id;
};
+static inline enum mga_type
+mgag200_type_from_driver_data(kernel_ulong_t driver_data)
+{
+ return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
+}
/* mgag200_mode.c */
int mgag200_modeset_init(struct mga_device *mdev);
void mgag200_modeset_fini(struct mga_device *mdev);
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 5f74aabcd3df..517c5693ad69 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -94,7 +94,7 @@ static int mgag200_device_init(struct drm_device *dev,
struct mga_device *mdev = dev->dev_private;
int ret, option;
- mdev->type = flags;
+ mdev->type = mgag200_type_from_driver_data(flags);
/* Hardcode the number of CRTCs to 1 */
mdev->num_crtc = 1;
--
2.23.0
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[PATCH v2 2/3] drm/mgag200: Store flags from PCI driver data in device structure
The flags field in struct mga_device has been unused so far. We now
use it to store flag bits from the PCI driver.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap +
unpin")
Cc: John Donnelly
Cc: Gerd Hoffmann
Cc: Dave Airlie
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: David Airlie
Cc: Sam Ravnborg
Cc: "Y.C. Chen"
Cc: Neil Armstrong
Cc: Thomas Gleixner
Cc: "José Roberto de Souza"
Cc: Andrzej Pietrasiewicz
Cc: dri-devel@lists.freedesktop.org
Cc: # v5.3+
---
drivers/gpu/drm/mgag200/mgag200_drv.h | 8
drivers/gpu/drm/mgag200/mgag200_main.c | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 976404634092..4b4f9ce74a84 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -151,6 +151,7 @@ enum mga_type {
};
#define MGAG200_TYPE_MASK (0x00ff)
+#define MGAG200_FLAG_MASK (0x0000)
#define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
@@ -188,6 +189,13 @@ mgag200_type_from_driver_data(kernel_ulong_t driver_data)
{
return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
}
+
+static inline unsigned long
+mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
+{
+ return driver_data & MGAG200_FLAG_MASK;
+}
+
/* mgag200_mode.c */
int mgag200_modeset_init(struct mga_device *mdev);
void mgag200_modeset_fini(struct mga_device *mdev);
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 517c5693ad69..e1bc5b0aa774 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -94,6 +94,7 @@ static int mgag200_device_init(struct drm_device *dev,
struct mga_device *mdev = dev->dev_private;
int ret, option;
+ mdev->flags = mgag200_flags_from_driver_data(flags);
mdev->type = mgag200_type_from_driver_data(flags);
/* Hardcode the number of CRTCs to 1 */
--
2.23.0
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Re: [PATCH] drm: radeon: replace 0 with NULL
Am 26.11.19 um 01:35 schrieb Jules Irenge:
Replace 0 with NULL to fix sparse tool warning
warning: Using plain integer as NULL pointer
Signed-off-by: Jules Irenge
Acked-by: Christian König
---
drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.c
b/drivers/gpu/drm/radeon/radeon_audio.c
index b9aea5776d3d..2269cfced788 100644
--- a/drivers/gpu/drm/radeon/radeon_audio.c
+++ b/drivers/gpu/drm/radeon/radeon_audio.c
@@ -288,7 +288,7 @@ static void radeon_audio_interface_init(struct
radeon_device *rdev)
} else {
rdev->audio.funcs = _funcs;
rdev->audio.hdmi_funcs = _hdmi_funcs;
- rdev->audio.dp_funcs = 0;
+ rdev->audio.dp_funcs = NULL;
}
}
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[PATCH 2/5] dt-bindings: display: ti, am65x-dss: Add dt-schema yaml binding
Add dt-schema yaml bindig for AM65x DSS, AM65x version TI Keystone
Display SubSystem.
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,am65x-dss.yaml | 133 ++
1 file changed, 133 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
new file mode 100644
index ..6691f5dad383
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
@@ -0,0 +1,133 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#;
+$schema: "http://devicetree.org/meta-schemas/core.yaml#;
+
+title: Texas Instruments AM65x Display Subsystem
+
+maintainers:
+ - Jyri Sarha
+ - Tomi Valkeinen
+
+description: |
+ The AM65x TI Keystone Display SubSystem with two output ports and
+ two video planes. The first video port supports OLDI and the second
+ supports DPI format. The fist plane is full video plane with all
+ features and the second is a "lite plane" without scaling support.
+
+properties:
+ compatible:
+const: ti,am65x-dss
+
+ reg:
+maxItems: 7
+minItems: 7
+
+ reg-names:
+items:
+ - const: common
+ - const: vidl1
+ - const: vid
+ - const: ovr1
+ - const: ovr2
+ - const: vp1
+ - const: vp2
+
+ clocks:
+maxItems: 3
+minItems: 3
+
+ clock-names:
+items:
+ - const: fck
+ - const: vp1
+ - const: vp2
+
+ interrupts:
+maxItems: 1
+
+ power-domains:
+maxItems: 1
+description: phandle to the associated power domain
+
+ port@0:
+type: object
+description:
+ The DSS OLDI output port node form video port 1
+
+ port@1:
+type: object
+description:
+ The DSS DPI output port node from video port 2
+
+ ti,am65x-oldi-io-ctrl:
+maxItems: 1
+description:
+ $ref: "/schemas/types.yaml#/definitions/phandle-array"
+ phandle to syscon device node mapping OLDI IO_CTRL registers.
+ The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
+ following OLDI_DAT1_IO_CTRL, OLDI_DAT2_IO_CTRL, OLDI_DAT3_IO_CTRL,
+ and OLDI_CLK_IO_CTRL registers. This property is needed for OLDI
+ interface to work.
+
+ max-memory-bandwidth:
+$ref: /schemas/types.yaml#/definitions/uint32
+description:
+ Input memory (from main memory to dispc) bandwidth limit in
+ bytes per second
+
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interrupts
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ dss: dss@04a0 {
+compatible = "ti,am65x-dss";
+reg = <0x0 0x04a0 0x0 0x1000>, /* common */
+<0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
+<0x0 0x04a06000 0x0 0x1000>, /* vid */
+<0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
+<0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
+<0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
+<0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
+reg-names = "common", "vidl1", "vid",
+"ovr1", "ovr2", "vp1", "vp2";
+
+ti,am65x-oldi-io-ctrl = <_oldi_io_ctrl>;
+
+power-domains = <_pds 67 TI_SCI_PD_EXCLUSIVE>;
+
+clocks =<_clks 67 1>,
+<_clks 216 1>,
+<_clks 67 2>;
+clock-names = "fck", "vp1", "vp2";
+
+interrupts = ;
+
+status = "disabled";
+
+port@0 {
+reg = <0>;
+
+oldi_out0: endpoint {
+remote-endpoint = <_in0>;
+};
+};
+};
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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[PATCH 3/5] dt-bindings: display: ti, j721e-dss: Add dt-schema yaml binding
Add dt-schema yaml bindig for J721E DSS, J721E version TI Keystone
Display SubSystem.
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,j721e-dss.yaml | 177 ++
1 file changed, 177 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
new file mode 100644
index ..cb3b64b9f04e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
@@ -0,0 +1,177 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#;
+$schema: "http://devicetree.org/meta-schemas/core.yaml#;
+
+title: Texas Instruments J721E Display Subsystem
+
+maintainers:
+ - Jyri Sarha
+ - Tomi Valkeinen
+
+description: |
+ The J721E TI Keystone Display SubSystem with four output ports and
+ four video planes. There is two full video planes and two "lite
+ planes" without scaling support. The video ports can be connected to
+ the SoC's DPI pins or to integrated display bridges on the SoC.
+
+properties:
+ compatible:
+const: ti,j721e-dss
+
+ reg:
+maxItems: 17
+minItems: 17
+
+ reg-names:
+items:
+ - const: common_m
+ - const: common_s0
+ - const: common_s1
+ - const: common_s2
+ - const: vidl1
+ - const: vidl2
+ - const: vid1
+ - const: vid2
+ - const: ovr1
+ - const: ovr2
+ - const: ovr3
+ - const: ovr4
+ - const: vp1
+ - const: vp2
+ - const: vp3
+ - const: vp4
+ - const: wp
+
+ clocks:
+maxItems: 5
+minItems: 5
+
+ clock-names:
+items:
+ - const: fck
+ - const: vp1
+ - const: vp2
+ - const: vp3
+ - const: vp4
+
+ interrupts:
+maxItems: 4
+
+ interrupt-names:
+items:
+ - const: common_m
+ - const: common_s0
+ - const: common_s1
+ - const: common_s2
+
+ power-domains:
+maxItems: 1
+description: phandle to the associated power domain
+
+ port@0:
+type: object
+description:
+ The output port node form video port 1
+
+ port@1:
+type: object
+description:
+ The output port node from video port 2
+
+ port@2:
+type: object
+description:
+ The output port node from video port 3
+
+ port@3:
+type: object
+description:
+ The output port node from video port 4
+
+ max-memory-bandwidth:
+$ref: /schemas/types.yaml#/definitions/uint32
+description:
+ Input memory (from main memory to dispc) bandwidth limit in
+ bytes per second
+
+ "#address-cells":
+const: 1
+
+ "#size-cells":
+const: 0
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+dss: dss@04a0 {
+compatible = "ti,j721e-dss";
+reg =
+<0x00 0x04a0 0x00 0x1>, /* common_m */
+<0x00 0x04a1 0x00 0x1>, /* common_s0*/
+<0x00 0x04b0 0x00 0x1>, /* common_s1*/
+<0x00 0x04b1 0x00 0x1>, /* common_s2*/
+
+<0x00 0x04a2 0x00 0x1>, /* vidl1 */
+<0x00 0x04a3 0x00 0x1>, /* vidl2 */
+<0x00 0x04a5 0x00 0x1>, /* vid1 */
+<0x00 0x04a6 0x00 0x1>, /* vid2 */
+
+<0x00 0x04a7 0x00 0x1>, /* ovr1 */
+<0x00 0x04a9 0x00 0x1>, /* ovr2 */
+<0x00 0x04ab 0x00 0x1>, /* ovr3 */
+<0x00 0x04ad 0x00 0x1>, /* ovr4 */
+
+<0x00 0x04a8 0x00 0x1>, /* vp1 */
+<0x00 0x04aa 0x00 0x1>, /* vp2 */
+<0x00 0x04ac 0x00 0x1>, /* vp3 */
+<0x00 0x04ae 0x00 0x1>, /* vp4 */
+
+<0x00 0x04af 0x00 0x1>; /* wb */
+ reg-names = "common_m", "common_s0",
+"common_s1", "common_s2",
+"vidl1", "vidl2","vid1","vid2",
+"ovr1", "ovr2", "ovr3", "ovr4",
+"vp1", "vp2", "vp3", "vp4",
+"wb";
+
+clocks =<_clks 152 0>,
+<_clks 152 1>,
+<_clks 152 4>,
+<_clks 152 9>,
+<_clks 152 13>;
+clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
+
+interrupts = ,
+ ,
+
[PATCH 1/5] dt-bindings: display: ti, k2g-dss: Add dt-schema yaml binding
Add dt-schema yaml bindig for K2G DSS, an ultra-light version of TI
Keystone Display SubSystem.
Signed-off-by: Jyri Sarha
---
.../bindings/display/ti/ti,k2g-dss.yaml | 97 +++
1 file changed, 97 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
new file mode 100644
index ..2d92dea1c411
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml
@@ -0,0 +1,97 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#;
+$schema: "http://devicetree.org/meta-schemas/core.yaml#;
+
+title: Texas Instruments K2G Display Subsystem
+
+maintainers:
+ - Jyri Sarha
+ - Tomi Valkeinen
+
+description: |
+ The K2G DSS is an ultra-light version of TI Keystone Display
+ SubSystem. It has only one output port and video plane. The
+ output is DPI.
+
+properties:
+ compatible:
+const: ti,k2g-dss
+
+ reg:
+maxItems: 5
+minItems: 5
+
+ reg-names:
+items:
+ - const: cfg
+ - const: common
+ - const: vid1
+ - const: ovr1
+ - const: vp1
+
+ clocks:
+maxItems: 2
+minItems: 2
+
+ clock-names:
+items:
+ - const: fck
+ - const: vp1
+
+ interrupts:
+maxItems: 1
+
+ power-domains:
+maxItems: 1
+description: phandle to the associated power domain
+
+ port@0:
+type: object
+description:
+ The DSS DPI output port node
+
+ max-memory-bandwidth:
+$ref: /schemas/types.yaml#/definitions/uint32
+description:
+ Input memory (from main memory to dispc) bandwidth limit in
+ bytes per second
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interrupts
+ - port@0
+
+additionalProperties: false
+
+examples:
+ - |
+dss: dss@0254 {
+compatible = "ti,k2g-dss";
+reg = <0x0254 0x400>,
+<0x0255 0x1000>,
+<0x02557000 0x1000>,
+<0x0255a800 0x100>,
+<0x0255ac00 0x100>;
+reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
+clocks =<_clks 0x2 0>,
+<_clks 0x2 1>;
+clock-names = "fck", "vp1";
+interrupts = ;
+
+power-domains = <_pds 0x2>;
+status = "disabled";
+
+max-memory-bandwidth = <23000>;
+port {
+dpi_out: endpoint {
+remote-endpoint = <_in>;
+};
+};
+};
--
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Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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[PATCH 5/5] MAINTAINERS: add entry for tidss
Add entry for tidss DRM driver. Signed-off-by: Jyri Sarha --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index eb19fad370d7..556b7425e883 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5554,6 +5554,16 @@ F: include/uapi/drm/v3d_drm.h F: Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt T: git git://anongit.freedesktop.org/drm/drm-misc +DRM DRIVERS FOR TI KEYSTONE +M: Jyri Sarha +M: Tomi Valkeinen +L: dri-devel@lists.freedesktop.org +S: Maintained +F: drivers/gpu/drm/tidss/ +F: Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt +F: Documentation/devicetree/bindings/display/ti/ti,am65x-dss.txt +F: Documentation/devicetree/bindings/display/ti/ti,j721e-dss.txt + DRM DRIVERS FOR VC4 M: Eric Anholt T: git git://github.com/anholt/linux -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 0/5] drm/tidss: New driver for TI Keystone platform Display SubSystem
There was couple of attempts upstream an earlier version of this driver about a year ago [1]. Back then I needed to stop my efforts to implement support for next Keystone DSS version, so now the driver supports three different Keystone DSS version on three different SoCs. I am starting the patch series versioning from the beginning since it has been over a year since the previous patch set and the structure of the driver has evolved quite a bit. However, all the earlier comments should be addressed in this series. [1] https://patchwork.freedesktop.org/series/44947/ Jyri Sarha (5): dt-bindings: display: ti,k2g-dss: Add dt-schema yaml binding dt-bindings: display: ti,am65x-dss: Add dt-schema yaml binding dt-bindings: display: ti,j721e-dss: Add dt-schema yaml binding drm/tidss: New driver for TI Keystone platform Display SubSystem MAINTAINERS: add entry for tidss .../bindings/display/ti/ti,am65x-dss.yaml | 133 + .../bindings/display/ti/ti,j721e-dss.yaml | 177 ++ .../bindings/display/ti/ti,k2g-dss.yaml | 97 + MAINTAINERS | 10 + drivers/gpu/drm/Kconfig |2 + drivers/gpu/drm/Makefile |1 + drivers/gpu/drm/tidss/Kconfig | 15 + drivers/gpu/drm/tidss/Makefile| 12 + drivers/gpu/drm/tidss/tidss_crtc.c| 373 +++ drivers/gpu/drm/tidss/tidss_crtc.h| 45 + drivers/gpu/drm/tidss/tidss_dispc.c | 2645 + drivers/gpu/drm/tidss/tidss_dispc.h | 132 + drivers/gpu/drm/tidss/tidss_dispc_regs.h | 243 ++ drivers/gpu/drm/tidss/tidss_drv.c | 292 ++ drivers/gpu/drm/tidss/tidss_drv.h | 42 + drivers/gpu/drm/tidss/tidss_encoder.c | 89 + drivers/gpu/drm/tidss/tidss_encoder.h | 17 + drivers/gpu/drm/tidss/tidss_irq.c | 185 ++ drivers/gpu/drm/tidss/tidss_irq.h | 71 + drivers/gpu/drm/tidss/tidss_kms.c | 239 ++ drivers/gpu/drm/tidss/tidss_kms.h | 15 + drivers/gpu/drm/tidss/tidss_plane.c | 218 ++ drivers/gpu/drm/tidss/tidss_plane.h | 25 + drivers/gpu/drm/tidss/tidss_scale_coefs.c | 201 ++ drivers/gpu/drm/tidss/tidss_scale_coefs.h | 22 + 25 files changed, 5301 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml create mode 100644 Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml create mode 100644 Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml create mode 100644 drivers/gpu/drm/tidss/Kconfig create mode 100644 drivers/gpu/drm/tidss/Makefile create mode 100644 drivers/gpu/drm/tidss/tidss_crtc.c create mode 100644 drivers/gpu/drm/tidss/tidss_crtc.h create mode 100644 drivers/gpu/drm/tidss/tidss_dispc.c create mode 100644 drivers/gpu/drm/tidss/tidss_dispc.h create mode 100644 drivers/gpu/drm/tidss/tidss_dispc_regs.h create mode 100644 drivers/gpu/drm/tidss/tidss_drv.c create mode 100644 drivers/gpu/drm/tidss/tidss_drv.h create mode 100644 drivers/gpu/drm/tidss/tidss_encoder.c create mode 100644 drivers/gpu/drm/tidss/tidss_encoder.h create mode 100644 drivers/gpu/drm/tidss/tidss_irq.c create mode 100644 drivers/gpu/drm/tidss/tidss_irq.h create mode 100644 drivers/gpu/drm/tidss/tidss_kms.c create mode 100644 drivers/gpu/drm/tidss/tidss_kms.h create mode 100644 drivers/gpu/drm/tidss/tidss_plane.c create mode 100644 drivers/gpu/drm/tidss/tidss_plane.h create mode 100644 drivers/gpu/drm/tidss/tidss_scale_coefs.c create mode 100644 drivers/gpu/drm/tidss/tidss_scale_coefs.h -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/4] drm/mgag200: Add workaround for HW that does not support 'startadd'
Hi
Am 26.11.19 um 10:37 schrieb Daniel Vetter:
> On Tue, Nov 26, 2019 at 08:25:44AM +0100, Thomas Zimmermann wrote:
>> There's at least one system that does not interpret the value of
>> the device's 'startadd' field correctly, which leads to incorrectly
>> displayed scanout buffers. Always placing the active scanout buffer
>> at offset 0 works around the problem.
>>
>> Signed-off-by: Thomas Zimmermann
>> Reported-by: John Donnelly
>> Link: https://gitlab.freedesktop.org/drm/misc/issues/7
>
> Tested-by: John Donnelly
>
> (Not quite this patch, but pretty much the logic, so counts).
>
> Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap
> + unpin")
> Cc: # v5.3+
>
> Also you need the stable line on both prep patches too. For next time
> around,
>
> $ dim fixes 81da87f63a1e
>
> will generate all the stuff you need, including a good set of suggested
> Cc: you should have.
>
> On the first 3 patches, with all that stuff added:
>
> Reviewed-by: Daniel Vetter
Thanks for the review.
Sorry for leaving out some of the tags. I wanted to wait for feedback
before adding tested-by, fixes, stable. I'll split off patch 4 from the
series and get 1 to 3 merged ASAP.
Best regards
Thomas
>
> Please push these to drm-misc-next-fixes so they get backported as quickly
> as possible.
> -Daniel
>
>> ---
>> drivers/gpu/drm/mgag200/mgag200_drv.c | 36 ++-
>> drivers/gpu/drm/mgag200/mgag200_drv.h | 3 +++
>> 2 files changed, 38 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
>> b/drivers/gpu/drm/mgag200/mgag200_drv.c
>> index 397f8b0a9af8..d43951caeea0 100644
>> --- a/drivers/gpu/drm/mgag200/mgag200_drv.c
>> +++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
>> @@ -30,6 +30,8 @@ module_param_named(modeset, mgag200_modeset, int, 0400);
>> static struct drm_driver driver;
>>
>> static const struct pci_device_id pciidlist[] = {
>> +{ PCI_VENDOR_ID_MATROX, 0x522, PCI_VENDOR_ID_SUN, 0x4852, 0, 0,
>> +G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
>> { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A
>> },
>> { PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B
>> },
>> { PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
>> @@ -60,6 +62,35 @@ static void mga_pci_remove(struct pci_dev *pdev)
>>
>> DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
>>
>> +static bool mgag200_pin_bo_at_0(const struct mga_device *mdev)
>> +{
>> +return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD;
>> +}
>> +
>> +int mgag200_driver_dumb_create(struct drm_file *file,
>> + struct drm_device *dev,
>> + struct drm_mode_create_dumb *args)
>> +{
>> +struct mga_device *mdev = dev->dev_private;
>> +unsigned long pg_align;
>> +
>> +if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
>> +return -EINVAL;
>> +
>> +pg_align = 0ul;
>> +
>> +/*
>> + * Aligning scanout buffers to the size of the video ram forces
>> + * placement at offset 0. Works around a bug where HW does not
>> + * respect 'startadd' field.
>> + */
>> +if (mgag200_pin_bo_at_0(mdev))
>> +pg_align = PFN_UP(mdev->mc.vram_size);
>> +
>> +return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
>> + pg_align, false, args);
>> +}
>> +
>> static struct drm_driver driver = {
>> .driver_features = DRIVER_GEM | DRIVER_MODESET,
>> .load = mgag200_driver_load,
>> @@ -71,7 +102,10 @@ static struct drm_driver driver = {
>> .major = DRIVER_MAJOR,
>> .minor = DRIVER_MINOR,
>> .patchlevel = DRIVER_PATCHLEVEL,
>> -DRM_GEM_VRAM_DRIVER
>> +.debugfs_init = drm_vram_mm_debugfs_init,
>> +.dumb_create = mgag200_driver_dumb_create,
>> +.dumb_map_offset = drm_gem_vram_driver_dumb_mmap_offset,
>> +.gem_prime_mmap = drm_gem_prime_mmap,
>> };
>>
>> static struct pci_driver mgag200_pci_driver = {
>> diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
>> b/drivers/gpu/drm/mgag200/mgag200_drv.h
>> index 4b4f9ce74a84..aa32aad222c2 100644
>> --- a/drivers/gpu/drm/mgag200/mgag200_drv.h
>> +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
>> @@ -150,6 +150,9 @@ enum mga_type {
>> G200_EW3,
>> };
>>
>> +/* HW does not handle 'startadd' field correct. */
>> +#define MGAG200_FLAG_HW_BUG_NO_STARTADD (1ul << 8)
>> +
>> #define MGAG200_TYPE_MASK (0x00ff)
>> #define MGAG200_FLAG_MASK (0x0000)
>>
>> --
>> 2.23.0
>>
>
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
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Re: [PATCH 4/4] drm/mgag200: Add module parameter to pin all buffers at offset 0
On Tue, Nov 26, 2019 at 08:25:45AM +0100, Thomas Zimmermann wrote:
> For hardware that does not interpret the startadd field correctly,
> add the module parameter 'hw_bug_no_startadd', which enables the
> workaround.
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/mgag200/mgag200_drv.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
> b/drivers/gpu/drm/mgag200/mgag200_drv.c
> index d43951caeea0..79836b09a54a 100644
> --- a/drivers/gpu/drm/mgag200/mgag200_drv.c
> +++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
> @@ -27,6 +27,10 @@ int mgag200_modeset = -1;
> MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
> module_param_named(modeset, mgag200_modeset, int, 0400);
>
> +int mgag200_hw_bug_no_startadd = -1;
> +MODULE_PARM_DESC(modeset, "HW does not interpret scanout-buffer start
> address correctly");
> +module_param_named(hw_bug_no_startadd, mgag200_hw_bug_no_startadd, int,
> 0400);
> +
> static struct drm_driver driver;
>
> static const struct pci_device_id pciidlist[] = {
> @@ -64,6 +68,10 @@ DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
>
> static bool mgag200_pin_bo_at_0(const struct mga_device *mdev)
> {
I'd add a infor printing if the module option is non-zero that people
should submit a bug report if this fixes their issue. We don't want people
fixing bugs with module options, stuff should work by default.
With that addressed:
Reviewed-by: Daniel Vetter
> + if (!mgag200_hw_bug_no_startadd)
> + return false;
> + else if (mgag200_hw_bug_no_startadd > 0)
> + return true;
> return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD;
> }
>
> --
> 2.23.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH 3/4] drm/mgag200: Add workaround for HW that does not support 'startadd'
On Tue, Nov 26, 2019 at 08:25:44AM +0100, Thomas Zimmermann wrote:
> There's at least one system that does not interpret the value of
> the device's 'startadd' field correctly, which leads to incorrectly
> displayed scanout buffers. Always placing the active scanout buffer
> at offset 0 works around the problem.
>
> Signed-off-by: Thomas Zimmermann
> Reported-by: John Donnelly
> Link: https://gitlab.freedesktop.org/drm/misc/issues/7
Tested-by: John Donnelly
(Not quite this patch, but pretty much the logic, so counts).
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap +
unpin")
Cc: # v5.3+
Also you need the stable line on both prep patches too. For next time
around,
$ dim fixes 81da87f63a1e
will generate all the stuff you need, including a good set of suggested
Cc: you should have.
On the first 3 patches, with all that stuff added:
Reviewed-by: Daniel Vetter
Please push these to drm-misc-next-fixes so they get backported as quickly
as possible.
-Daniel
> ---
> drivers/gpu/drm/mgag200/mgag200_drv.c | 36 ++-
> drivers/gpu/drm/mgag200/mgag200_drv.h | 3 +++
> 2 files changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
> b/drivers/gpu/drm/mgag200/mgag200_drv.c
> index 397f8b0a9af8..d43951caeea0 100644
> --- a/drivers/gpu/drm/mgag200/mgag200_drv.c
> +++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
> @@ -30,6 +30,8 @@ module_param_named(modeset, mgag200_modeset, int, 0400);
> static struct drm_driver driver;
>
> static const struct pci_device_id pciidlist[] = {
> + { PCI_VENDOR_ID_MATROX, 0x522, PCI_VENDOR_ID_SUN, 0x4852, 0, 0,
> + G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
> { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A
> },
> { PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B
> },
> { PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
> @@ -60,6 +62,35 @@ static void mga_pci_remove(struct pci_dev *pdev)
>
> DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
>
> +static bool mgag200_pin_bo_at_0(const struct mga_device *mdev)
> +{
> + return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD;
> +}
> +
> +int mgag200_driver_dumb_create(struct drm_file *file,
> +struct drm_device *dev,
> +struct drm_mode_create_dumb *args)
> +{
> + struct mga_device *mdev = dev->dev_private;
> + unsigned long pg_align;
> +
> + if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
> + return -EINVAL;
> +
> + pg_align = 0ul;
> +
> + /*
> + * Aligning scanout buffers to the size of the video ram forces
> + * placement at offset 0. Works around a bug where HW does not
> + * respect 'startadd' field.
> + */
> + if (mgag200_pin_bo_at_0(mdev))
> + pg_align = PFN_UP(mdev->mc.vram_size);
> +
> + return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
> + pg_align, false, args);
> +}
> +
> static struct drm_driver driver = {
> .driver_features = DRIVER_GEM | DRIVER_MODESET,
> .load = mgag200_driver_load,
> @@ -71,7 +102,10 @@ static struct drm_driver driver = {
> .major = DRIVER_MAJOR,
> .minor = DRIVER_MINOR,
> .patchlevel = DRIVER_PATCHLEVEL,
> - DRM_GEM_VRAM_DRIVER
> + .debugfs_init = drm_vram_mm_debugfs_init,
> + .dumb_create = mgag200_driver_dumb_create,
> + .dumb_map_offset = drm_gem_vram_driver_dumb_mmap_offset,
> + .gem_prime_mmap = drm_gem_prime_mmap,
> };
>
> static struct pci_driver mgag200_pci_driver = {
> diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h
> b/drivers/gpu/drm/mgag200/mgag200_drv.h
> index 4b4f9ce74a84..aa32aad222c2 100644
> --- a/drivers/gpu/drm/mgag200/mgag200_drv.h
> +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
> @@ -150,6 +150,9 @@ enum mga_type {
> G200_EW3,
> };
>
> +/* HW does not handle 'startadd' field correct. */
> +#define MGAG200_FLAG_HW_BUG_NO_STARTADD (1ul << 8)
> +
> #define MGAG200_TYPE_MASK(0x00ff)
> #define MGAG200_FLAG_MASK(0x0000)
>
> --
> 2.23.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[PATCH v2 3/5] drm/vram: Support scanline alignment for dumb buffers
Adding the pitch alignment as an argument to drm_gem_vram_fill_create_dumb()
allows to align scanlines to certain offsets. A value of 0 disables scanline
pitches.
v2:
* split of patch from related hibmc changes
* test if scanline pitch is power of 2
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/drm_gem_vram_helper.c | 13 ++---
include/drm/drm_gem_vram_helper.h | 1 +
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c
b/drivers/gpu/drm/drm_gem_vram_helper.c
index 666cb4c22bb9..ee37c2629943 100644
--- a/drivers/gpu/drm/drm_gem_vram_helper.c
+++ b/drivers/gpu/drm/drm_gem_vram_helper.c
@@ -485,6 +485,7 @@ EXPORT_SYMBOL(drm_gem_vram_vunmap);
* @dev: the DRM device
* @bdev: the TTM BO device managing the buffer object
* @pg_align: the buffer's alignment in multiples of the page size
+ * @pitch_align: the scanline's alignment in powers of 2
* @interruptible: sleep interruptible if waiting for memory
* @args: the arguments as provided to \
drm_driver.dumb_create
@@ -502,6 +503,7 @@ int drm_gem_vram_fill_create_dumb(struct drm_file *file,
struct drm_device *dev,
struct ttm_bo_device *bdev,
unsigned long pg_align,
+ unsigned long pitch_align,
bool interruptible,
struct drm_mode_create_dumb *args)
{
@@ -510,7 +512,12 @@ int drm_gem_vram_fill_create_dumb(struct drm_file *file,
int ret;
u32 handle;
- pitch = args->width * ((args->bpp + 7) / 8);
+ if (WARN_ON_ONCE(!is_power_of_2(pitch_align)))
+ return -EINVAL;
+
+ pitch = args->width * DIV_ROUND_UP(args->bpp, 8);
+ if (pitch_align)
+ pitch = ALIGN(pitch, pitch_align);
size = pitch * args->height;
size = roundup(size, PAGE_SIZE);
@@ -612,8 +619,8 @@ int drm_gem_vram_driver_dumb_create(struct drm_file *file,
if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
return -EINVAL;
- return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev, 0,
-false, args);
+ return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
+0, 0, false, args);
}
EXPORT_SYMBOL(drm_gem_vram_driver_dumb_create);
diff --git a/include/drm/drm_gem_vram_helper.h
b/include/drm/drm_gem_vram_helper.h
index e040541a105f..c642b4cb6600 100644
--- a/include/drm/drm_gem_vram_helper.h
+++ b/include/drm/drm_gem_vram_helper.h
@@ -113,6 +113,7 @@ int drm_gem_vram_fill_create_dumb(struct drm_file *file,
struct drm_device *dev,
struct ttm_bo_device *bdev,
unsigned long pg_align,
+ unsigned long pitch_align,
bool interruptible,
struct drm_mode_create_dumb *args);
--
2.23.0
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[PATCH v2 2/5] drm/hisilicon/hibmc: Replace struct hibmc_framebuffer with generic code
The hibmc driver's struct hibmc_framebuffer stores a DRM framebuffer
with an associated GEM object. This functionality is also provided by
generic code. Switch hibmc over.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
.../gpu/drm/hisilicon/hibmc/hibmc_drm_de.c| 4 +-
.../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 11 ---
drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 69 +--
3 files changed, 3 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index 6527a97f68a3..7fa7d4933f60 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -99,14 +99,12 @@ static void hibmc_plane_atomic_update(struct drm_plane
*plane,
s64 gpu_addr = 0;
unsigned int line_l;
struct hibmc_drm_private *priv = plane->dev->dev_private;
- struct hibmc_framebuffer *hibmc_fb;
struct drm_gem_vram_object *gbo;
if (!state->fb)
return;
- hibmc_fb = to_hibmc_framebuffer(state->fb);
- gbo = drm_gem_vram_of_gem(hibmc_fb->obj);
+ gbo = drm_gem_vram_of_gem(state->fb->obj[0]);
gpu_addr = drm_gem_vram_offset(gbo);
if (WARN_ON_ONCE(gpu_addr < 0))
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
index b34493ead30b..8eb7258b236a 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
@@ -20,11 +20,6 @@
struct drm_device;
struct drm_gem_object;
-struct hibmc_framebuffer {
- struct drm_framebuffer fb;
- struct drm_gem_object *obj;
-};
-
struct hibmc_drm_private {
/* hw */
void __iomem *mmio;
@@ -38,8 +33,6 @@ struct hibmc_drm_private {
bool mode_config_initialized;
};
-#define to_hibmc_framebuffer(x) container_of(x, struct hibmc_framebuffer, fb)
-
void hibmc_set_power_mode(struct hibmc_drm_private *priv,
unsigned int power_mode);
void hibmc_set_current_gate(struct hibmc_drm_private *priv,
@@ -50,10 +43,6 @@ int hibmc_vdac_init(struct hibmc_drm_private *priv);
int hibmc_gem_create(struct drm_device *dev, u32 size, bool iskernel,
struct drm_gem_object **obj);
-struct hibmc_framebuffer *
-hibmc_framebuffer_init(struct drm_device *dev,
- const struct drm_mode_fb_cmd2 *mode_cmd,
- struct drm_gem_object *obj);
int hibmc_mm_init(struct hibmc_drm_private *hibmc);
void hibmc_mm_fini(struct hibmc_drm_private *hibmc);
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
index 21b684eab5c9..f6d25b85c209 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
@@ -15,6 +15,7 @@
#include
#include
+#include
#include
#include
@@ -97,74 +98,8 @@ int hibmc_dumb_create(struct drm_file *file, struct
drm_device *dev,
return 0;
}
-static void hibmc_user_framebuffer_destroy(struct drm_framebuffer *fb)
-{
- struct hibmc_framebuffer *hibmc_fb = to_hibmc_framebuffer(fb);
-
- drm_gem_object_put_unlocked(hibmc_fb->obj);
- drm_framebuffer_cleanup(fb);
- kfree(hibmc_fb);
-}
-
-static const struct drm_framebuffer_funcs hibmc_fb_funcs = {
- .destroy = hibmc_user_framebuffer_destroy,
-};
-
-struct hibmc_framebuffer *
-hibmc_framebuffer_init(struct drm_device *dev,
- const struct drm_mode_fb_cmd2 *mode_cmd,
- struct drm_gem_object *obj)
-{
- struct hibmc_framebuffer *hibmc_fb;
- int ret;
-
- hibmc_fb = kzalloc(sizeof(*hibmc_fb), GFP_KERNEL);
- if (!hibmc_fb) {
- DRM_ERROR("failed to allocate hibmc_fb\n");
- return ERR_PTR(-ENOMEM);
- }
-
- drm_helper_mode_fill_fb_struct(dev, _fb->fb, mode_cmd);
- hibmc_fb->obj = obj;
- ret = drm_framebuffer_init(dev, _fb->fb, _fb_funcs);
- if (ret) {
- DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
- kfree(hibmc_fb);
- return ERR_PTR(ret);
- }
-
- return hibmc_fb;
-}
-
-static struct drm_framebuffer *
-hibmc_user_framebuffer_create(struct drm_device *dev,
- struct drm_file *filp,
- const struct drm_mode_fb_cmd2 *mode_cmd)
-{
- struct drm_gem_object *obj;
- struct hibmc_framebuffer *hibmc_fb;
-
- DRM_DEBUG_DRIVER("%dx%d, format %c%c%c%c\n",
-mode_cmd->width, mode_cmd->height,
-(mode_cmd->pixel_format) & 0xff,
-(mode_cmd->pixel_format >> 8) & 0xff,
-(mode_cmd->pixel_format >> 16) & 0xff,
-(mode_cmd->pixel_format >> 24) & 0xff);
-
- obj =
[PATCH v2 4/5] drm/hisilicon/hibmc: Implement hibmc_dumb_create() with generic helpers
The hibmc driver aligns scanlines to 16 bytes. By using the new pitch_align
argument of drm_gem_vram_fill_create_dumb(), convert hibmc over.
v2:
* move changes to VRAM helpers into separate patch
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
.../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 4 --
drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 48 +--
2 files changed, 2 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
index 8eb7258b236a..50a0c1f9d211 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
@@ -18,7 +18,6 @@
#include
struct drm_device;
-struct drm_gem_object;
struct hibmc_drm_private {
/* hw */
@@ -41,9 +40,6 @@ void hibmc_set_current_gate(struct hibmc_drm_private *priv,
int hibmc_de_init(struct hibmc_drm_private *priv);
int hibmc_vdac_init(struct hibmc_drm_private *priv);
-int hibmc_gem_create(struct drm_device *dev, u32 size, bool iskernel,
-struct drm_gem_object **obj);
-
int hibmc_mm_init(struct hibmc_drm_private *hibmc);
void hibmc_mm_fini(struct hibmc_drm_private *hibmc);
int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
index f6d25b85c209..0af5d966a480 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c
@@ -47,55 +47,11 @@ void hibmc_mm_fini(struct hibmc_drm_private *hibmc)
drm_vram_helper_release_mm(hibmc->dev);
}
-int hibmc_gem_create(struct drm_device *dev, u32 size, bool iskernel,
-struct drm_gem_object **obj)
-{
- struct drm_gem_vram_object *gbo;
- int ret;
-
- *obj = NULL;
-
- size = roundup(size, PAGE_SIZE);
- if (size == 0)
- return -EINVAL;
-
- gbo = drm_gem_vram_create(dev, >vram_mm->bdev, size, 0, false);
- if (IS_ERR(gbo)) {
- ret = PTR_ERR(gbo);
- if (ret != -ERESTARTSYS)
- DRM_ERROR("failed to allocate GEM object: %d\n", ret);
- return ret;
- }
- *obj = >bo.base;
- return 0;
-}
-
int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
struct drm_mode_create_dumb *args)
{
- struct drm_gem_object *gobj;
- u32 handle;
- int ret;
-
- args->pitch = ALIGN(args->width * DIV_ROUND_UP(args->bpp, 8), 16);
- args->size = args->pitch * args->height;
-
- ret = hibmc_gem_create(dev, args->size, false,
- );
- if (ret) {
- DRM_ERROR("failed to create GEM object: %d\n", ret);
- return ret;
- }
-
- ret = drm_gem_handle_create(file, gobj, );
- drm_gem_object_put_unlocked(gobj);
- if (ret) {
- DRM_ERROR("failed to unreference GEM object: %d\n", ret);
- return ret;
- }
-
- args->handle = handle;
- return 0;
+ return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
+0, 16, false, args);
}
const struct drm_mode_config_funcs hibmc_mode_funcs = {
--
2.23.0
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[PATCH v2 5/5] drm/hisilicon/hibmc: Export VRAM MM information to debugfs
This change makes information about VRAM consumption available on
debugfs. See
/sys/kernel/debug/dri/0/vram-mm
for an overview of how VRAM is being used.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 113d27b8a8f1..11d1b0761c9a 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -55,6 +55,7 @@ static struct drm_driver hibmc_driver = {
.desc = "hibmc drm driver",
.major = 1,
.minor = 0,
+ .debugfs_init = drm_vram_mm_debugfs_init,
.dumb_create= hibmc_dumb_create,
.dumb_map_offset= drm_gem_vram_driver_dumb_mmap_offset,
.gem_prime_mmap = drm_gem_prime_mmap,
--
2.23.0
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[PATCH v2 0/5] Replace hibmc code with generic implmentation
The patch set replaces code in hibmc with generic implementation. Patches 1 to 4 replace fbdev emuation, framebuffer and creation of dumb buffers with respective code from DRM helpers. Patch 5 adds an additional interface to debugfs that displays the allocated and free areas in video memory. The patches have only been compile-tested. Further testing is appreciated. v2: * split [3/4] into vram and hibmc changes * verify that pitch_align is power of two Thomas Zimmermann (5): drm/hisilicon/hibmc: Switch to generic fbdev emulation drm/hisilicon/hibmc: Replace struct hibmc_framebuffer with generic code drm/vram: Support scanline alignment for dumb buffers drm/hisilicon/hibmc: Implement hibmc_dumb_create() with generic helpers drm/hisilicon/hibmc: Export VRAM MM information to debugfs drivers/gpu/drm/drm_gem_vram_helper.c | 13 +- drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 +- .../gpu/drm/hisilicon/hibmc/hibmc_drm_de.c| 4 +- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 6 +- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 26 -- .../gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c | 240 -- drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 117 + include/drm/drm_gem_vram_helper.h | 1 + 8 files changed, 20 insertions(+), 389 deletions(-) delete mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c -- 2.23.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v2 1/5] drm/hisilicon/hibmc: Switch to generic fbdev emulation
There's nothing special about hibmc's fbdev emulation that is not
provided by the generic implementation. Switch over and remove the
driver's code.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Vetter
Acked-by: Sam Ravnborg
---
drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 +-
.../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 5 +-
.../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 11 -
.../gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c | 240 --
4 files changed, 3 insertions(+), 255 deletions(-)
delete mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c
diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile
b/drivers/gpu/drm/hisilicon/hibmc/Makefile
index 0c2d4296bccd..f99132715597 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/Makefile
+++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
-hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o
hibmc_drm_fbdev.o hibmc_ttm.o
+hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_ttm.o
obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc-drm.o
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
index 2fd4ca91a62d..113d27b8a8f1 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c
@@ -17,6 +17,7 @@
#include
#include
+#include
#include
#include
#include
@@ -247,8 +248,6 @@ static int hibmc_unload(struct drm_device *dev)
{
struct hibmc_drm_private *priv = dev->dev_private;
- hibmc_fbdev_fini(priv);
-
drm_atomic_helper_shutdown(dev);
if (dev->irq_enabled)
@@ -307,7 +306,7 @@ static int hibmc_load(struct drm_device *dev)
/* reset all the states of crtc/plane/encoder/connector */
drm_mode_config_reset(dev);
- ret = hibmc_fbdev_init(priv);
+ ret = drm_fbdev_generic_setup(dev, 16);
if (ret) {
DRM_ERROR("failed to initialize fbdev: %d\n", ret);
goto err;
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
index e58ecd7edcf8..b34493ead30b 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
@@ -25,12 +25,6 @@ struct hibmc_framebuffer {
struct drm_gem_object *obj;
};
-struct hibmc_fbdev {
- struct drm_fb_helper helper; /* must be first */
- struct hibmc_framebuffer *fb;
- int size;
-};
-
struct hibmc_drm_private {
/* hw */
void __iomem *mmio;
@@ -42,9 +36,6 @@ struct hibmc_drm_private {
/* drm */
struct drm_device *dev;
bool mode_config_initialized;
-
- /* fbdev */
- struct hibmc_fbdev *fbdev;
};
#define to_hibmc_framebuffer(x) container_of(x, struct hibmc_framebuffer, fb)
@@ -56,8 +47,6 @@ void hibmc_set_current_gate(struct hibmc_drm_private *priv,
int hibmc_de_init(struct hibmc_drm_private *priv);
int hibmc_vdac_init(struct hibmc_drm_private *priv);
-int hibmc_fbdev_init(struct hibmc_drm_private *priv);
-void hibmc_fbdev_fini(struct hibmc_drm_private *priv);
int hibmc_gem_create(struct drm_device *dev, u32 size, bool iskernel,
struct drm_gem_object **obj);
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c
deleted file mode 100644
index b4c1cea051e8..
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_fbdev.c
+++ /dev/null
@@ -1,240 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/* Hisilicon Hibmc SoC drm driver
- *
- * Based on the bochs drm driver.
- *
- * Copyright (c) 2016 Huawei Limited.
- *
- * Author:
- * Rongrong Zou
- * Rongrong Zou
- * Jianhua Li
- */
-
-#include
-#include
-#include
-#include
-#include
-
-#include "hibmc_drm_drv.h"
-
-static int hibmcfb_create_object(
- struct hibmc_drm_private *priv,
- const struct drm_mode_fb_cmd2 *mode_cmd,
- struct drm_gem_object **gobj_p)
-{
- struct drm_gem_object *gobj;
- struct drm_device *dev = priv->dev;
- u32 size;
- int ret = 0;
-
- size = mode_cmd->pitches[0] * mode_cmd->height;
- ret = hibmc_gem_create(dev, size, true, );
- if (ret)
- return ret;
-
- *gobj_p = gobj;
- return ret;
-}
-
-static struct fb_ops hibmc_drm_fb_ops = {
- .owner = THIS_MODULE,
- .fb_check_var = drm_fb_helper_check_var,
- .fb_set_par = drm_fb_helper_set_par,
- .fb_fillrect = drm_fb_helper_sys_fillrect,
- .fb_copyarea = drm_fb_helper_sys_copyarea,
- .fb_imageblit = drm_fb_helper_sys_imageblit,
- .fb_pan_display = drm_fb_helper_pan_display,
- .fb_blank = drm_fb_helper_blank,
- .fb_setcmap = drm_fb_helper_setcmap,
-};
-
-static int hibmc_drm_fb_create(struct
[PATCH 1/2] drm/fourcc: Fill out all block sizes for P10/12/16
0 means 1 as the default, but it's mighty confusing if the block size
for the first plane is spelled out explicitly, but not for the 2nd
plane.
No cc: stable because this is just confusion, but 0 functional issue.
Fixes: 05f8bc82fc42 ("drm/fourcc: Add new P010, P016 video format")
Cc: Daniel Stone
Cc: Ville Syrjälä
Cc: Randy Li
Cc: Clint Taylor
Cc: Ayan Kumar Halder
Cc: Neil Armstrong
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_fourcc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index c630064ccf41..fe79ce857c8a 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -253,13 +253,13 @@ const struct drm_format_info *__drm_format_info(u32
format)
.char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 },
.block_h = { 2, 0, 0 },
.hsub = 2, .vsub = 2, .is_yuv = true },
{ .format = DRM_FORMAT_P010,.depth = 0,
.num_planes = 2,
- .char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 },
.block_h = { 1, 0, 0 },
+ .char_per_block = { 2, 4, 0 }, .block_w = { 1, 1, 0 },
.block_h = { 1, 1, 0 },
.hsub = 2, .vsub = 2, .is_yuv = true},
{ .format = DRM_FORMAT_P012,.depth = 0,
.num_planes = 2,
- .char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 },
.block_h = { 1, 0, 0 },
+ .char_per_block = { 2, 4, 0 }, .block_w = { 1, 1, 0 },
.block_h = { 1, 1, 0 },
.hsub = 2, .vsub = 2, .is_yuv = true},
{ .format = DRM_FORMAT_P016,.depth = 0,
.num_planes = 2,
- .char_per_block = { 2, 4, 0 }, .block_w = { 1, 0, 0 },
.block_h = { 1, 0, 0 },
+ .char_per_block = { 2, 4, 0 }, .block_w = { 1, 1, 0 },
.block_h = { 1, 1, 0 },
.hsub = 2, .vsub = 2, .is_yuv = true},
{ .format = DRM_FORMAT_P210,.depth = 0,
.num_planes = 2, .char_per_block = { 2, 4, 0 },
--
2.24.0
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[PATCH 2/2] drm/fourcc: Fill out all block sizes for P210
0 means 1 as the default, but it's mighty confusing if the block size
for the first plane is spelled out explicitly, but not for the 2nd
plane.
No cc: stable because this is just confusion, but 0 functional issue.
Fixes: 7ba0fee247ee ("drm/fourcc: Add AFBC yuv fourccs for Mali")
Cc: Brian Starkey
Cc: Ayan Kumar Halder
Cc: Liviu Dudau
Cc: Alyssa Rosenzweig
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_fourcc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index fe79ce857c8a..b234bfaeda06 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -263,7 +263,7 @@ const struct drm_format_info *__drm_format_info(u32 format)
.hsub = 2, .vsub = 2, .is_yuv = true},
{ .format = DRM_FORMAT_P210,.depth = 0,
.num_planes = 2, .char_per_block = { 2, 4, 0 },
- .block_w = { 1, 0, 0 }, .block_h = { 1, 0, 0 }, .hsub = 2,
+ .block_w = { 1, 1, 0 }, .block_h = { 1, 1, 0 }, .hsub = 2,
.vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_VUY101010, .depth = 0,
.num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1,
--
2.24.0
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Re: [PATCH v3 1/2] drm/sched: Avoid job cleanup if sched thread is parked.
Am 25.11.19 um 17:51 schrieb Steven Price: On 25/11/2019 14:10, Andrey Grodzovsky wrote: When the sched thread is parked we assume ring_mirror_list is not accessed from here. FWIW I don't think this is necessary. kthread_park() will wait until the thread is parked, at which point the thread is stuck in kthread_parkme() until unparked. So all this does is avoid waiting for any cleanup jobs before parking - which might be a reasonable goal in itself, but if so lets at least document that. Now that you mention it that is indeed wrong. The real problem is that in the main thread we mangled the call to kthread_parkme() into drm_sched_blocked() which can be called in atomic context. I suggest to rework this so that the kthread_should_park() and kthread_should_stop() test in wait_event_interruptible() come first and then call kthread_parkme() outside of the wait_event_interruptible(). Regards, Christian. Steve Signed-off-by: Andrey Grodzovsky Reviewed-by: Christian König --- drivers/gpu/drm/scheduler/sched_main.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index d4cc728..6774955 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -635,9 +635,13 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) struct drm_sched_job *job; unsigned long flags; - /* Don't destroy jobs while the timeout worker is running */ - if (sched->timeout != MAX_SCHEDULE_TIMEOUT && - !cancel_delayed_work(>work_tdr)) + /* + * Don't destroy jobs while the timeout worker is running OR thread + * is being parked and hence assumed to not touch ring_mirror_list + */ + if ((sched->timeout != MAX_SCHEDULE_TIMEOUT && +!cancel_delayed_work(>work_tdr)) || +__kthread_should_park(sched->thread)) return NULL; spin_lock_irqsave(>job_list_lock, flags); ___ amd-gfx mailing list amd-...@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 1/7] drm/mediatek: fix atomic_state reference counting
On Tue, Nov 26, 2019 at 02:29:26PM +0800, Bibby Hsieh wrote:
> The DRM core takes care of all atomic state refcounting.
> However, mediatek drm defers some work that accesses planes
> and plane_states in drm_atomic_state, and must therefore
> keep its own atomic state references until this work complete.
>
> We take the atomic_state reference in atomic_fulsh() and ensure all the
> information in atomic_state already was updated in hardware for
> showing on screen and then schedules unreference_work to drop references
> on atomic_state.
>
> Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
>
> Signed-off-by: Bibby Hsieh
This looks strange. For one you implement your own reference counting - if
drivers have a need for drm_atomic_state_put_irq then I
think we should implement this in the core code.
The other bit is that atomic commits are meant to simply wait for
everything to finish - commit_tail doesn't hold locks, it's only ordered
through drm_crtc_commit events (at least with the async implementation in
the helpers), so you can just block there until your interrupt handler is
done processing the commit. Depending how you want to do this you might
want to wait before or after drm_atomic_helper_commit_hw_done().
-Daniel
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 11 +++-
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 79 +
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 9 +++
> 3 files changed, 97 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 29d0582e90e9..68b92adc96bb 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -7,7 +7,7 @@
> #include
>
> #include
> -
> +#include
> #include
> #include
> #include
> @@ -47,6 +47,7 @@ struct mtk_drm_crtc {
> struct mtk_disp_mutex *mutex;
> unsigned intddp_comp_nr;
> struct mtk_ddp_comp **ddp_comp;
> + struct drm_crtc_state *old_crtc_state;
> };
>
> struct mtk_crtc_state {
> @@ -362,6 +363,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc
> *mtk_crtc)
> static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
> {
> struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
> + struct drm_atomic_state *atomic_state = mtk_crtc->old_crtc_state->state;
> struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);
> struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
> unsigned int i;
> @@ -399,6 +401,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
> plane_state->pending.config = false;
> }
> mtk_crtc->pending_planes = false;
> + mtk_atomic_state_put_queue(atomic_state);
> }
> }
>
> @@ -494,6 +497,7 @@ static void mtk_drm_crtc_atomic_begin(struct drm_crtc
> *crtc,
> static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc,
> struct drm_crtc_state *old_crtc_state)
> {
> + struct drm_atomic_state *old_atomic_state = old_crtc_state->state;
> struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
> struct mtk_drm_private *priv = crtc->dev->dev_private;
> unsigned int pending_planes = 0;
> @@ -512,8 +516,11 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc
> *crtc,
> pending_planes |= BIT(i);
> }
> }
> - if (pending_planes)
> + if (pending_planes) {
> mtk_crtc->pending_planes = true;
> + drm_atomic_state_get(old_atomic_state);
> + mtk_crtc->old_crtc_state = old_crtc_state;
> + }
> if (crtc->state->color_mgmt_changed)
> for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)
> mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 6588dc6dd5e3..6c68283b6124 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -115,10 +115,85 @@ static int mtk_atomic_commit(struct drm_device *drm,
> return 0;
> }
>
> +struct mtk_atomic_state {
> + struct drm_atomic_state base;
> + struct list_head list;
> +};
> +
> +static inline struct mtk_atomic_state *to_mtk_state(struct drm_atomic_state
> *s)
> +{
> + return container_of(s, struct mtk_atomic_state, base);
> +}
> +
> +void mtk_atomic_state_put_queue(struct drm_atomic_state *state)
> +{
> + struct drm_device *drm = state->dev;
> + struct mtk_drm_private *mtk_drm = drm->dev_private;
> + struct mtk_atomic_state *mtk_state = to_mtk_state(state);
> + unsigned long flags;
> +
> + spin_lock_irqsave(_drm->unreference.lock, flags);
> + list_add_tail(_state->list, _drm->unreference.list);
> + spin_unlock_irqrestore(_drm->unreference.lock,
Re: [PATCH 0/5] drm/udl: Convert to GEM framebuffer helpers
Am 25.11.19 um 19:39 schrieb Sam Ravnborg: > Hi Thomas. > > On Thu, Nov 14, 2019 at 03:10:20PM +0100, Thomas Zimmermann wrote: >> Udl uses struct udl_framebuffer for representing its framebuffer. The >> type can be replaced by the standard DRM framebuffer structure. >> >> Patches 1 to 4 prepare the driver for the conversion. Patch 5 replaces >> the structure. >> >> The patchset has been tested by running the fb console, X11 and Weston >> on a DisplayLink adapter. > > Series looks good, with some nice cleanup to prepare for the > removal of udl_framebuffer. > > Whole series is: > Acked-by: Sam Ravnborg Thanks! > >> >> Thomas Zimmermann (5): >> drm/udl: Unmap buffer object after damage update >> drm/udl: Remove udl implementation of GEM's free_object() >> drm/udl: Store active framebuffer in device structure >> drm/udl: Call udl_handle_damage() with DRM framebuffer >> drm/udl: Replace struct udl_framebuffer with generic implementation >> >> drivers/gpu/drm/udl/udl_drv.h | 14 ++-- >> drivers/gpu/drm/udl/udl_fb.c | 131 +++--- >> drivers/gpu/drm/udl/udl_gem.c | 18 +--- >> drivers/gpu/drm/udl/udl_main.c| 3 + >> drivers/gpu/drm/udl/udl_modeset.c | 31 +++ >> 5 files changed, 70 insertions(+), 127 deletions(-) >> >> -- >> 2.23.0 -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer signature.asc Description: OpenPGP digital signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: WARNING in md_ioctl
On Mon, Nov 25, 2019 at 02:37:01PM -0800, syzbot wrote:
> syzbot has bisected this bug to:
>
> commit 4b6ce6810a5dc0af387a238e8c852e0d3822381f
> Author: Rafael Antognolli
> Date: Mon Feb 5 23:33:30 2018 +
>
> drm/i915/cnl: WaPipeControlBefore3DStateSamplePattern
This seems very unlikely, the reproducer doesn't open a drm device, and
I'd be surprised if your gcd instances have an actual i915 device in them
(but I can't check because boot log isn't provided, didn't find it on the
dashboard either).
Since i915 is built-in I suspect this simply moved something else in the
kernel image around which provokes the bug.
-Daniel
>
> bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=13aeb522e0
> start commit: c61a56ab Merge branch 'x86-urgent-for-linus' of git://git...
> git tree: upstream
> final crash:https://syzkaller.appspot.com/x/report.txt?x=106eb522e0
> console output: https://syzkaller.appspot.com/x/log.txt?x=17aeb522e0
> kernel config: https://syzkaller.appspot.com/x/.config?x=4013180e7c7a9ff9
> dashboard link: https://syzkaller.appspot.com/bug?extid=1e46a0864c1a6e9bd3d8
> syz repro: https://syzkaller.appspot.com/x/repro.syz?x=16bca20780
> C reproducer: https://syzkaller.appspot.com/x/repro.c?x=14819a4780
>
> Reported-by: syzbot+1e46a0864c1a6e9bd...@syzkaller.appspotmail.com
> Fixes: 4b6ce6810a5d ("drm/i915/cnl:
> WaPipeControlBefore3DStateSamplePattern")
>
> For information about bisection process see: https://goo.gl/tpsmEJ#bisection
> ___
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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radeon UBSAN warning from user syscall
I tried latest (5.4) custom kernel (with UBSAN) on my Dell D600 laptop and found that it exhibits a UBSAN warning triggered by userspace ioctl. Here is dmesg with anything radeon-related + the warning, and config: [ 17.659534] [drm] radeon kernel modesetting enabled. [ 17.659607] radeon :01:00.0: remove_conflicting_pci_framebuffers: bar 0: 0xe800 -> 0xefff [ 17.659609] radeon :01:00.0: remove_conflicting_pci_framebuffers: bar 2: 0xfcff -> 0xfcff [ 17.659613] radeon :01:00.0: vgaarb: deactivate vga console [ 17.661629] Console: switching to colour dummy device 80x25 [ 17.667764] [drm] initializing kernel modesetting (RV250 0x1002:0x4C66 0x1028:0x011D 0x01). [ 17.667822] resource sanity check: requesting [mem 0x000c-0x000d], which spans more than PCI Bus :00 [mem 0x000d-0x000d window] [ 17.667832] caller pci_map_rom+0x6d/0x19a mapping multiple BARs [ 17.668236] agpgart-intel :00:00.0: AGP 2.0 bridge [ 17.668246] agpgart-intel :00:00.0: putting AGP V2 device into 4x mode [ 17.668269] radeon :01:00.0: putting AGP V2 device into 4x mode [ 17.668291] radeon :01:00.0: GTT: 128M 0xE000 - 0xE7FF [ 17.668299] radeon :01:00.0: VRAM: 128M 0xE800 - 0xEFFF (32M used) [ 17.668336] [drm] Detected VRAM RAM=128M, BAR=128M [ 17.668337] [drm] RAM width 64bits DDR [ 17.681858] [TTM] Zone kernel: Available graphics memory: 412324 KiB [ 17.681861] [TTM] Initializing pool allocator [ 17.681868] [TTM] Initializing DMA pool allocator [ 17.681905] [drm] radeon: 32M of VRAM memory ready [ 17.681907] [drm] radeon: 128M of GTT memory ready. [ 17.681918] [drm] radeon: power management initialized [ 17.685726] radeon :01:00.0: WB disabled [ 17.685735] radeon :01:00.0: fence driver on ring 0 use gpu addr 0xe000 and cpu addr 0x116c2780 [ 17.685738] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 17.685739] [drm] Driver supports precise vblank timestamp query. [ 17.685755] [drm] radeon: irq initialized. [ 17.685758] [drm] Loading R200 Microcode [ 17.788181] [drm] radeon: ring at 0xE0001000 [ 17.788207] [drm] ring test succeeded in 1 usecs [ 17.788379] [drm] ib test succeeded in 0 usecs [ 17.788845] [drm] Panel ID String: 2K077141X13 [ 17.788846] [drm] Panel Size 1024x768 [ 17.70] [drm] No TV DAC info found in BIOS [ 17.788912] [drm] Radeon Display Connectors [ 17.788913] [drm] Connector 0: [ 17.788914] [drm] VGA-1 [ 17.788916] [drm] DDC: 0x60 0x60 0x60 0x60 0x60 0x60 0x60 0x60 [ 17.788917] [drm] Encoders: [ 17.788918] [drm] CRT1: INTERNAL_DAC1 [ 17.788920] [drm] Connector 1: [ 17.788920] [drm] DVI-D-1 [ 17.788921] [drm] HPD1 [ 17.788923] [drm] DDC: 0x64 0x64 0x64 0x64 0x64 0x64 0x64 0x64 [ 17.788923] [drm] Encoders: [ 17.788924] [drm] DFP1: INTERNAL_TMDS1 [ 17.788925] [drm] Connector 2: [ 17.788925] [drm] LVDS-1 [ 17.788926] [drm] Encoders: [ 17.788927] [drm] LCD1: INTERNAL_LVDS [ 17.788927] [drm] Connector 3: [ 17.788928] [drm] SVIDEO-1 [ 17.788929] [drm] Encoders: [ 17.788929] [drm] TV1: INTERNAL_DAC2 [ 17.957500] [drm] fb mappable at 0xE804 [ 17.957503] [drm] vram apper at 0xE800 [ 17.957504] [drm] size 1572864 [ 17.957505] [drm] fb depth is 16 [ 17.957505] [drm]pitch is 2048 [ 18.013861] fbcon: radeondrmfb (fb0) is primary device [ 18.566984] Console: switching to colour frame buffer device 128x48 [ 18.576250] radeon :01:00.0: fb0: radeondrmfb frame buffer device [ 18.577844] [drm] Initialized radeon 2.50.0 20080528 for :01:00.0 on minor 0 [ 64.194226] [ 64.194238] UBSAN: Undefined behaviour in drivers/gpu/drm/radeon/r200.c:480:34 [ 64.194244] shift exponent 4096 is too large for 32-bit type 'int' [ 64.194248] CPU: 0 PID: 447 Comm: Xorg Not tainted 5.4.0 #16 [ 64.194249] Hardware name: Dell Computer Corporation Latitude D600 /0X2034, BIOS A16 06/29/2005 [ 64.194251] Call Trace: [ 64.194266] dump_stack+0x16/0x19 [ 64.194272] ubsan_epilogue+0xb/0x29 [ 64.194274] __ubsan_handle_shift_out_of_bounds.cold+0x26/0x78 [ 64.194368] ? radeon_cs_packet_next_reloc+0x3c/0x170 [radeon] [ 64.194403] ? r100_reloc_pitch_offset+0x27/0x140 [radeon] [ 64.194433] r200_packet0_check.cold+0x5e/0x63 [radeon] [ 64.194473] ? r200_copy_dma+0x430/0x430 [radeon] [ 64.194508] r100_cs_parse_packet0+0x53/0xe0 [radeon] [ 64.194543] r100_cs_parse+0x2de/0x4b0 [radeon] [ 64.194583] ? r200_copy_dma+0x430/0x430 [radeon] [ 64.194617] radeon_cs_ioctl+0x305/0x890 [radeon] [ 64.194626] ? ttm_bo_init_reserved+0x2f0/0x390 [ttm] [ 64.194662] ? radeon_cs_parser_init+0x550/0x550 [radeon] [ 64.194689] drm_ioctl_kernel+0x8b/0xd0 [drm] [ 64.194724] ?
Re: [PATCH 3/4] drm/hisilicon/hibmc: Implement hibmc_dumb_create() with generic helpers
On Tue, Nov 26, 2019 at 08:40:27AM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 25.11.19 um 10:14 schrieb Daniel Vetter:
> > On Fri, Nov 22, 2019 at 09:30:43AM +0100, Thomas Zimmermann wrote:
> >> The hibmc driver aligns scanlines to 16 bytes. Adding the pitch alignment
> >> as an argument to drm_gem_vram_fill_create_dumb() allows to use the generic
> >> implementation with hibmc. A value of 0 disables scanline pitches.
> >>
> >> Signed-off-by: Thomas Zimmermann
> >
> > I concur with Sam, the vram change should be split out.
> >
> >> ---
> >> drivers/gpu/drm/drm_gem_vram_helper.c | 10 ++--
> >> .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 4 --
> >> drivers/gpu/drm/hisilicon/hibmc/hibmc_ttm.c | 48 +--
> >> include/drm/drm_gem_vram_helper.h | 1 +
> >> 4 files changed, 10 insertions(+), 53 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c
> >> b/drivers/gpu/drm/drm_gem_vram_helper.c
> >> index 666cb4c22bb9..f098784e7dfd 100644
> >> --- a/drivers/gpu/drm/drm_gem_vram_helper.c
> >> +++ b/drivers/gpu/drm/drm_gem_vram_helper.c
> >> @@ -485,6 +485,7 @@ EXPORT_SYMBOL(drm_gem_vram_vunmap);
> >> * @dev: the DRM device
> >> * @bdev: the TTM BO device managing the buffer object
> >> * @pg_align: the buffer's alignment in multiples of the page
> >> size
> >> + * @pitch_align: the scanline's alignment in powers of 2
> >> * @interruptible:sleep interruptible if waiting for memory
> >
> > I also noticed that no one sets this to true, neither here nor in
> > drm_gem_vram_create(). Maybe remove that too? Otherwise the argument list
> > becomes very unwielding. And you're already touching the (few) callers.
>
> OK, I'll add this as a separate patch.
Yeah makes sense.
> BTW What's the DRM interface's behavior wrt interruption? For example,
> can a ioctl call like CREATE_DUMB return EINTR to userspace?
Yup. Everyone is required to use drmIoctl() for all drm ioctls, which
auto-restarts all syscalls when userspace sees a EINTR. We also generally
test that in igt (but maybe not for all the kms ioctls, at least not for
the dumb ones).
interruptible + igts using igt_while_interruptible is a fairly effective
way to exercise error paths in all kinds of places. Only trouble is that
if we introduce a new interruptible point somewhere we might run into
userspace that gets it wrong (e.g. dumb ioctls I think aren't
interruptible on most x86 drivers right now, so there might be a surprise
and we need to audit userspaces, including plymouth and all those).
-Daniel
>
> Best regards
> Thomas
>
> >
> >> * @args: the arguments as provided to \
> >> drm_driver.dumb_create
> >> @@ -502,6 +503,7 @@ int drm_gem_vram_fill_create_dumb(struct drm_file
> >> *file,
> >> struct drm_device *dev,
> >> struct ttm_bo_device *bdev,
> >> unsigned long pg_align,
> >> +unsigned long pitch_align,
> >> bool interruptible,
> >> struct drm_mode_create_dumb *args)
> >> {
> >> @@ -510,7 +512,9 @@ int drm_gem_vram_fill_create_dumb(struct drm_file
> >> *file,
> >>int ret;
> >>u32 handle;
> >>
> >> - pitch = args->width * ((args->bpp + 7) / 8);
> >> + pitch = args->width * DIV_ROUND_UP(args->bpp, 8);
> >> + if (pitch_align)
> >> + pitch = ALIGN(pitch, pitch_align);
> >
> > Maybe throw a WARN_IS(is_pot(align)) in here?
> >
> > Cheers, Daniel
> >
> >>size = pitch * args->height;
> >>
> >>size = roundup(size, PAGE_SIZE);
> >> @@ -612,8 +616,8 @@ int drm_gem_vram_driver_dumb_create(struct drm_file
> >> *file,
> >>if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
> >>return -EINVAL;
> >>
> >> - return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev, 0,
> >> - false, args);
> >> + return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
> >> + 0, 0, false, args);
> >> }
> >> EXPORT_SYMBOL(drm_gem_vram_driver_dumb_create);
> >>
> >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
> >> b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
> >> index 8eb7258b236a..50a0c1f9d211 100644
> >> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
> >> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
> >> @@ -18,7 +18,6 @@
> >> #include
> >>
> >> struct drm_device;
> >> -struct drm_gem_object;
> >>
> >> struct hibmc_drm_private {
> >>/* hw */
> >> @@ -41,9 +40,6 @@ void hibmc_set_current_gate(struct hibmc_drm_private
> >> *priv,
> >> int hibmc_de_init(struct hibmc_drm_private *priv);
> >> int hibmc_vdac_init(struct hibmc_drm_private *priv);
> >>
> >> -int hibmc_gem_create(struct drm_device *dev, u32 size, bool iskernel,
> >> - struct
Re: [PATCH 05/15] drm/armada: Delete dma_buf->k(un)map implemenation
On Tue, Nov 26, 2019 at 1:35 AM Russell King - ARM Linux admin
wrote:
> On Mon, Nov 25, 2019 at 10:44:43PM +0100, Daniel Vetter wrote:
> > On Mon, Nov 18, 2019 at 11:35:26AM +0100, Daniel Vetter wrote:
> > > It's a dummy anyway.
> > >
> > > Signed-off-by: Daniel Vetter
> > > Cc: Russell King
> >
> > I merged the entire series except this one and the final patch, sill
> > waiting a bit more for an ack on this perhaps.
>
> Acked-by: Russell King
Thanks for taking a look.
> I thought drm trees closed around -rc6?
drm.git closes for pull request. But drm-misc is open all the time, so
that committers can push patches whenever the patches are ready,
instead of having to remember that there's something in the queue. The
script used for drm-misc pushes then makes sure that drm-misc-next
doesn't show up in linux-next until after -rc1. So this is all going
into 5.6.
-Daniel
>
> > -Daniel
> >
> > > ---
> > > drivers/gpu/drm/armada/armada_gem.c | 12
> > > 1 file changed, 12 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/armada/armada_gem.c
> > > b/drivers/gpu/drm/armada/armada_gem.c
> > > index 93cf8b8bfcff..976685f2939e 100644
> > > --- a/drivers/gpu/drm/armada/armada_gem.c
> > > +++ b/drivers/gpu/drm/armada/armada_gem.c
> > > @@ -461,16 +461,6 @@ static void armada_gem_prime_unmap_dma_buf(struct
> > > dma_buf_attachment *attach,
> > > kfree(sgt);
> > > }
> > >
> > > -static void *armada_gem_dmabuf_no_kmap(struct dma_buf *buf, unsigned
> > > long n)
> > > -{
> > > - return NULL;
> > > -}
> > > -
> > > -static void
> > > -armada_gem_dmabuf_no_kunmap(struct dma_buf *buf, unsigned long n, void
> > > *addr)
> > > -{
> > > -}
> > > -
> > > static int
> > > armada_gem_dmabuf_mmap(struct dma_buf *buf, struct vm_area_struct *vma)
> > > {
> > > @@ -481,8 +471,6 @@ static const struct dma_buf_ops
> > > armada_gem_prime_dmabuf_ops = {
> > > .map_dma_buf= armada_gem_prime_map_dma_buf,
> > > .unmap_dma_buf = armada_gem_prime_unmap_dma_buf,
> > > .release= drm_gem_dmabuf_release,
> > > - .map= armada_gem_dmabuf_no_kmap,
> > > - .unmap = armada_gem_dmabuf_no_kunmap,
> > > .mmap = armada_gem_dmabuf_mmap,
> > > };
> > >
> > > --
> > > 2.24.0
> > >
> >
> > --
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > http://blog.ffwll.ch
> >
>
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
> According to speedtest.net: 11.9Mbps down 500kbps up
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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[PATCH] drm: radeon: replace 0 with NULL
Replace 0 with NULL to fix sparse tool warning
warning: Using plain integer as NULL pointer
Signed-off-by: Jules Irenge
---
drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.c
b/drivers/gpu/drm/radeon/radeon_audio.c
index b9aea5776d3d..2269cfced788 100644
--- a/drivers/gpu/drm/radeon/radeon_audio.c
+++ b/drivers/gpu/drm/radeon/radeon_audio.c
@@ -288,7 +288,7 @@ static void radeon_audio_interface_init(struct
radeon_device *rdev)
} else {
rdev->audio.funcs = _funcs;
rdev->audio.hdmi_funcs = _hdmi_funcs;
- rdev->audio.dp_funcs = 0;
+ rdev->audio.dp_funcs = NULL;
}
}
--
2.23.0
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Re: WARNING in md_ioctl
syzbot has bisected this bug to:
commit 4b6ce6810a5dc0af387a238e8c852e0d3822381f
Author: Rafael Antognolli
Date: Mon Feb 5 23:33:30 2018 +
drm/i915/cnl: WaPipeControlBefore3DStateSamplePattern
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=13aeb522e0
start commit: c61a56ab Merge branch 'x86-urgent-for-linus' of git://git...
git tree: upstream
final crash:https://syzkaller.appspot.com/x/report.txt?x=106eb522e0
console output: https://syzkaller.appspot.com/x/log.txt?x=17aeb522e0
kernel config: https://syzkaller.appspot.com/x/.config?x=4013180e7c7a9ff9
dashboard link: https://syzkaller.appspot.com/bug?extid=1e46a0864c1a6e9bd3d8
syz repro: https://syzkaller.appspot.com/x/repro.syz?x=16bca20780
C reproducer: https://syzkaller.appspot.com/x/repro.c?x=14819a4780
Reported-by: syzbot+1e46a0864c1a6e9bd...@syzkaller.appspotmail.com
Fixes: 4b6ce6810a5d ("drm/i915/cnl:
WaPipeControlBefore3DStateSamplePattern")
For information about bisection process see: https://goo.gl/tpsmEJ#bisection
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RE: [PATCH v4 12/13] [HACK] drm/bridge: lvds-codec: Enforce device specific compatible strings
Hi Geert,
> From: Geert Uytterhoeven
> Sent: 22 November 2019 08:17
> Subject: Re: [PATCH v4 12/13] [HACK] drm/bridge: lvds-codec: Enforce device
> specific compatible strings
>
> Hi Fabrizio,
>
> On Thu, Nov 21, 2019 at 5:00 PM Fabrizio Castro
> wrote:
> > > From: devicetree-ow...@vger.kernel.org
> > > On Behalf Of Laurent Pinchart
> > > Sent: 19 November 2019 21:52
> > > Subject: Re: [PATCH v4 12/13] [HACK] drm/bridge: lvds-codec: Enforce
> > > device specific compatible strings
> > >
> > > On Tue, Nov 19, 2019 at 11:17:34AM +, Fabrizio Castro wrote:
> > > > On 19 November 2019 00:16 Laurent Pinchart wrote:
> > > > > On Wed, Nov 13, 2019 at 03:51:31PM +, Fabrizio Castro wrote:
> > > > > > The lvds-codec driver is a generic stub for transparent LVDS
> > > > > > encoders and decoders.
> > > > > > It's good practice to list a device specific compatible string
> > > > > > before the generic fallback (if any) in the DT node for the relevant
> > > > > > LVDS encoder/decoder, and it's also required by the dt-bindings.
> > > > > > A notable exception to the generic fallback mechanism is the case
> > > > > > of "thine,thc63lvdm83d", as documented in:
> > > > > > Documentation/devicetree/bindings/display/bridge/thine,thc63lvdm83d.txt
> > > > > > This patch enforces the adoption of a device specific compatible
> > > > > > string (as fist string in the list), by using markers for the
> > > > > > compatible string we match against and the index of the matching
> > > > > > compatible string in the list.
> > > > > >
> > > > > > Signed-off-by: Fabrizio Castro
> > > > > >
> > > > > > ---
> > > > > > Hi Laurent,
> > > > > >
> > > > > > I don't think we need to do anything in the driver to address your
> > > > > > comment, as we can "enforce" this with the bindings (please see the
> > > > > > next patch, as it would help with the "enforcing" of the compatible
> > > > > > string for the thine device).
> > > > > > I am sending this patch only so that you can see what a possible
> > > > > > solution in the driver could look like.
> > > > > >
> > > > > > v3->v4:
> > > > > > * New patch addressing the below comment from Laurent:
> > > > > > "I think the lvds-decoder driver should error out at probe time if
> > > > > > only
> > > > > > one compatible string is listed."
>
> > > > > > --- a/drivers/gpu/drm/bridge/lvds-codec.c
> > > > > > +++ b/drivers/gpu/drm/bridge/lvds-codec.c
>
> > > > > > @@ -65,7 +70,30 @@ static int lvds_codec_probe(struct
> > > > > > platform_device *pdev)
> > > > > > if (!lvds_codec)
> > > > > > return -ENOMEM;
> > > > > >
> > > > > > - lvds_codec->connector_type =
> > > > > > (u32)of_device_get_match_data(>dev);
> > > > > > + lvds_codec->data = of_device_get_match_data(>dev);
> > > > > > + if (!lvds_codec->data)
> > > > > > + return -EINVAL;
> > > > > > +
> > > > > > + /*
> > > > > > +* If we haven't matched a device specific compatible
> > > > > > string, we need
> > > > > > +* to work out if the generic compatible string we matched
> > > > > > against was
> > > > > > +* listed first in the compatible property.
> > > > > > +*/
> > > > >
> > > > > Can't we do this unconditionally, and thus drop the lvds_codec_data
> > > > > structure ?
> > > >
> > > > I don't think so, and the reason for this is that we have a corner case
> > > > for
> > > > thine,thc63lvdm83d. Here is what's allowed (according to the
> > > > documentation)
> > > > from what's supported upstream (+ this series):
> > > > "ti,ds90c185", "lvds-encoder"
> > > > "ti,ds90c187", "lvds-encoder"
> > > > "ti,sn75lvds83", "lvds-encoder"
> > > > "ti,ds90cf384a", "lvds-decoder"
> > > > "thine,thc63lvdm83d"
> > > >
> > > > As you can see from the examples above, in most cases it's enough to
> > > > say it's
> > > > all good when we match a compatible string with index > 0, but for the
> > > > thine
> > > > device you _have_ to match the string with index 0 as that's what's
> > > > currently
> > > > documented (please see thine,thc63lvdm83d.txt) and that's what's
> > > > supported
> > > > by device trees already (please see
> > > > arch/arm/boot/dts/r8a7779-marzen.dts).
> > >
> > > How about the following logic ?
> > >
> > > if (match_index("lvds-encoder") == 0 ||
> > > match_index("lvds-decoder") == 0)
> > > return -EINVAL;
> > >
> > >
> >
> > Now I see what you mean
> >
> > > > This patch "classifies" compatible strings, and it considers a good
> > > > match
> > > > device specific compatible strings, or generic compatible strings as
> > > > long
> > > > as they are not listed first.
> > > >
> > > > These days you can leverage the yaml files to validate the device trees,
> > > > therefore we should be focusing on writing yaml files in such a way we
> > > > only
> > > > pass the checks we mean to, and by checks I mean:
> > > > make dtbs_check
> > > >
> > > > or more specifically, for this
RE: [PATCH libdrm v4] modetest: Add support for setting mode having floating vertical refresh rate
> -Original Message-
> From: Ville Syrjälä
> Sent: 25 November 2019 06:30
> To: Devarsh Thakkar
> Cc: dri-devel@lists.freedesktop.org; Hyun Kwon ; vcu-
> team ; Ranganathan Sk ; Dhaval
> Rajeshbhai Shah ; Satish Kumar Nagireddy
> ; Varunkumar Allagadapa
> Subject: Re: [PATCH libdrm v4] modetest: Add support for setting mode
> having floating vertical refresh rate
>
> EXTERNAL EMAIL
>
> On Mon, Nov 25, 2019 at 07:34:37AM +, Devarsh Thakkar wrote:
> > Ping. Just wanted to confirm if the patch is applied or anything still
> > pending
> from my side ?
>
> Seems to work -> pushed.
>
> One thing I noticed is that we still print the modes with an integer vrefresh
> so
> it's a bit hard to know what value to pass in. Might be nice to make it dumo
> the
> modes with %.2f vrefresh as well.
>
Agreed, thanks for pointing out, I am updating it and sending separate patch
shortly.
> >
> > Also I tried to subscribe as per instructions at
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> > Sometime back, but still not able to receive messages from mailing list. Is
> there any other way to subscribe ?
> >
> > Regards,
> > Devarsh
> > > -Original Message-
> > > From: Devarsh Thakkar
> > > Sent: 15 November 2019 06:31
> > > To: dri-devel@lists.freedesktop.org; ville.syrj...@linux.intel.com
> > > Cc: Hyun Kwon ; vcu-team ;
> > > Ranganathan Sk ; Dhaval Rajeshbhai Shah
> > > ; Satish Kumar Nagireddy ;
> > > Varunkumar Allagadapa ; Devarsh Thakkar
> > >
> > > Subject: [PATCH libdrm v4] modetest: Add support for setting mode
> > > having floating vertical refresh rate
> > >
> > > For the scenario where user may require to modeset with a mode
> > > supporting a fractional value for vertical refresh-rate, appropriate
> > > mode can be selected by searching for mode having matching
> > > fractional vertical refresh rate using below equation.
> > >
> > > vrefresh = (1000 * pixel clock) / (htotal * vtotal) Hz.
> > >
> > > We do this way since driver doesn't return float value of vrefresh
> > > as it use int for vrefresh in struct drm_mode_info, but we can
> > > derive the actual value using pixel clock, horizontal total size and
> > > vertical
> total size values.
> > >
> > > So for e.g. if user want to select mode having 59.94 Hz as refresh
> > > rate then with this patch it be can done as shown in below command,
> > > given there is an appropriate mode is available :
> > >
> > > modetest -M xlnx -s 39:1920x1080-59.94@BG24 -v
> > >
> > > NOTE: Above command was tested on xilinx DRM driver with DP monitor
> > > which was supporting mode having 59.94 Hz refresh rate.
> > >
> > > V2: Update commit message
> > > V3: Update with below changes as per review comments :
> > > 1) Use epsilon for vrefresh comparison
> > > 2) Use implicit type-casting wherever possible
> > > V4: Keep patch version history on main commit message
> > >
> > > Signed-off-by: Devarsh Thakkar
> > > Reviewed-by: Ville Syrjälä
> > > ---
> > > tests/modetest/modetest.c | 20
> > > 1 file changed, 12 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c
> > > index e66be66..b4edfcb 100644
> > > --- a/tests/modetest/modetest.c
> > > +++ b/tests/modetest/modetest.c
> > > @@ -54,6 +54,7 @@
> > > #ifdef HAVE_SYS_SELECT_H
> > > #include
> > > #endif
> > > +#include
> > >
> > > #include "xf86drm.h"
> > > #include "xf86drmMode.h"
> > > @@ -795,7 +796,7 @@ struct pipe_arg {
> > > uint32_t crtc_id;
> > > char mode_str[64];
> > > char format_str[5];
> > > - unsigned int vrefresh;
> > > + float vrefresh;
> > > unsigned int fourcc;
> > > drmModeModeInfo *mode;
> > > struct crtc *crtc;
> > > @@ -822,11 +823,12 @@ struct plane_arg {
> > >
> > > static drmModeModeInfo *
> > > connector_find_mode(struct device *dev, uint32_t con_id, const char
> > > *mode_str,
> > > -const unsigned int vrefresh)
> > > + const float vrefresh)
> > > {
> > > drmModeConnector *connector;
> > > drmModeModeInfo *mode;
> > > int i;
> > > + float mode_vrefresh;
> > >
> > > connector = get_connector_by_id(dev, con_id);
> > > if (!connector || !connector->count_modes) @@ -839,9 +841,11 @@
> > > connector_find_mode(struct device *dev, uint32_t con_id, const char
> > > *mode_str,
> > > * first mode that match with the name. Else,
> > > return the mode that match
> > > * the name and the specified vertical refresh
> > > frequency.
> > > */
> > > + mode_vrefresh = mode->clock * 1000.00
> > > + / (mode->htotal * mode->vtotal);
> > > if (vrefresh == 0)
> > > return mode;
> > > - else if (mode->vrefresh == vrefresh)
> > > + else if (fabs(mode_vrefresh - vrefresh) < 0.005)
> > > return mode;
> >
[PATCH -next] drm/amd/powerplay: remove set but not used variable 'stretch_amount2'
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/vegam_smumgr.c:
In function vegam_populate_clock_stretcher_data_table:
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/vegam_smumgr.c:1489:29:
warning: variable stretch_amount2 set but not used [-Wunused-but-set-variable]
It is never used, so can be removed.
Signed-off-by: YueHaibing
---
drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
b/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
index 50896e9..b0e0d67 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
@@ -1486,7 +1486,7 @@ static int
vegam_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr)
struct vegam_smumgr *smu_data =
(struct vegam_smumgr *)(hwmgr->smu_backend);
- uint8_t i, stretch_amount, stretch_amount2, volt_offset = 0;
+ uint8_t i, stretch_amount, volt_offset = 0;
struct phm_ppt_v1_information *table_info =
(struct phm_ppt_v1_information *)(hwmgr->pptable);
struct phm_ppt_v1_clock_voltage_dependency_table *sclk_table =
@@ -1525,11 +1525,9 @@ static int
vegam_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr)
(table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ?
table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 5;
/* Populate CKS Lookup Table */
- if (stretch_amount == 1 || stretch_amount == 2 || stretch_amount == 5)
- stretch_amount2 = 0;
- else if (stretch_amount == 3 || stretch_amount == 4)
- stretch_amount2 = 1;
- else {
+ if (!(stretch_amount == 1 || stretch_amount == 2 ||
+ stretch_amount == 5 || stretch_amount == 3 ||
+ stretch_amount == 4)) {
phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_ClockStretcher);
PP_ASSERT_WITH_CODE(false,
--
2.7.4
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[PATCH 3/4] msm:disp:dpu1: setup display datapath for SC7180 target
Add changes to setup display datapath on SC7180 target.
Changes in v1:
- Add changes to support ctl_active on SC7180 target.
- While selecting the number of mixers in the topology
consider the interface width.
Changes in v2:
- Spawn topology mixer selection into separate patch (Rob Clark).
- Add co-developed-by tags in the commit msg (Stephen Boyd).
Changes in v3:
- Fix kernel checkpatch errors in v2.
This patch has dependency on the below series
https://patchwork.kernel.org/patch/11253747/
Co-developed-by: Shubhashree Dhar
Signed-off-by: Shubhashree Dhar
Co-developed-by: Raviteja Tamatam
Signed-off-by: Raviteja Tamatam
Signed-off-by: Kalyan Thota
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 21 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 84 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 24 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c| 28
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h| 6 ++
6 files changed, 159 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index b9c84fb..8cc8ad12 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -280,6 +280,14 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
phys_enc->hw_intf->ops.setup_timing_gen(phys_enc->hw_intf,
_params, fmt);
phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl, _cfg);
+
+ /* setup which pp blk will connect to this intf */
+ if (phys_enc->hw_intf->ops.bind_pingpong_blk)
+ phys_enc->hw_intf->ops.bind_pingpong_blk(
+ phys_enc->hw_intf,
+ true,
+ phys_enc->hw_pp->idx);
+
spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);
programmable_fetch_config(phys_enc, _params);
@@ -435,6 +443,7 @@ static void dpu_encoder_phys_vid_enable(struct
dpu_encoder_phys *phys_enc)
{
struct dpu_hw_ctl *ctl;
u32 flush_mask = 0;
+ u32 intf_flush_mask = 0;
ctl = phys_enc->hw_ctl;
@@ -459,10 +468,18 @@ static void dpu_encoder_phys_vid_enable(struct
dpu_encoder_phys *phys_enc)
ctl->ops.get_bitmask_intf(ctl, _mask, phys_enc->hw_intf->idx);
ctl->ops.update_pending_flush(ctl, flush_mask);
+ if (ctl->ops.get_bitmask_active_intf)
+ ctl->ops.get_bitmask_active_intf(ctl, _flush_mask,
+ phys_enc->hw_intf->idx);
+
+ if (ctl->ops.update_pending_intf_flush)
+ ctl->ops.update_pending_intf_flush(ctl, intf_flush_mask);
+
skip_flush:
DPU_DEBUG_VIDENC(phys_enc,
-"update pending flush ctl %d flush_mask %x\n",
-ctl->idx - CTL_0, flush_mask);
+ "update pending flush ctl %d flush_mask 0%x intf_mask 0x%x\n",
+ ctl->idx - CTL_0, flush_mask, intf_flush_mask);
+
/* ctl_flush & timing engine enable will be triggered by framework */
if (phys_enc->enable_state == DPU_ENC_DISABLED)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 1cf4509..0ee2b6c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -374,6 +374,7 @@
{\
.name = _name, .id = _id, \
.base = _base, .len = 0x280, \
+ .features = BIT(DPU_CTL_ACTIVE_CFG), \
.type = _type, \
.controller_id = _ctrl_id, \
.prog_fetch_lines_worst_case = 24 \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 179e8d5..2ce4b5a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -22,11 +22,15 @@
#define CTL_PREPARE 0x0d0
#define CTL_SW_RESET 0x030
#define CTL_LAYER_EXTN_OFFSET 0x40
+#define CTL_INTF_ACTIVE 0x0F4
+#define CTL_INTF_FLUSH0x110
+#define CTL_INTF_MASTER 0x134
#define CTL_MIXER_BORDER_OUTBIT(24)
#define CTL_FLUSH_MASK_CTL BIT(17)
#define DPU_REG_RESET_TIMEOUT_US2000
+#define INTF_IDX 31
static struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
struct dpu_mdss_cfg *m,
@@ -100,11 +104,27 @@ static inline void dpu_hw_ctl_update_pending_flush(struct
dpu_hw_ctl *ctx,
ctx->pending_flush_mask |= flushbits;
}
+static inline void dpu_hw_ctl_update_pending_intf_flush(struct dpu_hw_ctl *ctx,
+ u32 flushbits)
+{
+ ctx->pending_intf_flush_mask |= flushbits;
+}
+
static u32 dpu_hw_ctl_get_pending_flush(struct dpu_hw_ctl *ctx)
{
[PATCH 1/4] dt-bindings: msm:disp: add sc7180 DPU variant
Add a compatible string to support sc7180 dpu version. Signed-off-by: Kalyan Thota --- Documentation/devicetree/bindings/display/msm/dpu.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu.txt b/Documentation/devicetree/bindings/display/msm/dpu.txt index a61dd40..551ae26 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu.txt +++ b/Documentation/devicetree/bindings/display/msm/dpu.txt @@ -8,7 +8,7 @@ The DPU display controller is found in SDM845 SoC. MDSS: Required properties: -- compatible: "qcom,sdm845-mdss" +- compatible: "qcom,sdm845-mdss", "qcom,sc7180-mdss" - reg: physical base address and length of contoller's registers. - reg-names: register region names. The following region is required: * "mdss" @@ -41,7 +41,7 @@ Optional properties: MDP: Required properties: -- compatible: "qcom,sdm845-dpu" +- compatible: "qcom,sdm845-dpu", "qcom,sc7180-dpu" - reg: physical base address and length of controller's registers. - reg-names : register region names. The following region is required: * "mdp" -- 1.9.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PULL] drm-misc-fixes
Hi Dave, Daniel, Here are a few lates fixes for drm-misc-fixes. Obviously, it's not going to make it into 5.4, but it'd be great if they were in the upcoming PR. Thanks! Maxime drm-misc-fixes-2019-11-25: - A fix for a memory leak in the dma-buf support - One in mcde DSI support that leads to a pointer dereference The following changes since commit 0b8e7bbde5e7e2c419567e1ee29587dae3b78ee3: drm/sun4i: tcon: Set min division of TCON0_DCLK to 1. (2019-11-13 15:20:33 +0100) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2019-11-25 for you to fetch changes up to 6645d42d79d33e8a9fe262660a75d5f4556bbea9: dma-buf: Fix memory leak in sync_file_merge() (2019-11-25 10:21:33 +0100) - A fix for a memory leak in the dma-buf support - One in mcde DSI support that leads to a pointer dereference Navid Emamdoost (1): dma-buf: Fix memory leak in sync_file_merge() Stephan Gerhold (1): drm/mcde: dsi: Fix invalid pointer dereference if panel cannot be found drivers/dma-buf/sync_file.c | 2 +- drivers/gpu/drm/mcde/mcde_dsi.c | 6 -- 2 files changed, 5 insertions(+), 3 deletions(-) signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v3 8/8] MIPS: DTS: jz4780: add sgx gpu node
* H. Nikolaus Schaller [191124 18:00]:
> Hi Paul, Tony,
>
> > Am 24.11.2019 um 18:48 schrieb Tony Lindgren :
> >
> > * Paul Cercueil [191124 12:58]:
> >> Le dim., nov. 24, 2019 at 12:40, H. Nikolaus Schaller
> >> a
> >> écrit :
> >>> and add interrupt and clocks.
> > ...
> >>> --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
> >>> +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> >>> @@ -46,6 +46,17 @@
> >>> #clock-cells = <1>;
> >>> };
> >>>
> >>> + gpu: gpu@1304 {
> >>
> >> We try to keep the nodes ordered by address, could you move this node where
> >> it belongs?
> > ...
>
> Yes, I have noted.
>
> >
> >>> + compatible = "ingenic,jz4780-sgx540-120", "img,sgx540-120",
> >>> "img,sgx540", "img,sgx5";
> >>> + reg = <0x1304 0x4000>;
> >>> +
> >>> + clocks = < JZ4780_CLK_GPU>;
> >>> + clock-names = "gpu";
> >
> > Just checking.. Is there something else to configure here
> > potentially in addition to the clocks?
>
> It doesn't look so. Unfortuantely there isn't much information
> except a v3.18 kernel supported by the vendor and that one also
> just has a gpu node with clock control.
>
> > That is, do we need to do some interconnect specific
> > configuration etc in addition to the clocks to have
> > runtime PM work for enabling and disabling sgx on
> > jz4780?
>
> I think we have to leave that open for further study.
OK for now, let's assume we just need to call
clk_enable/disable from the PM runtime functions if a
clock exists.
Regards,
Tony
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[GIT PULL] Please pull hmm changes
Hi Linus, Here is this batch of hmm updates, I think we are nearing the end of this project for now, although I suspect there will be some more patches related to hmm_range_fault() in the next cycle. You will probably be most interested in the patch "mm/mmu_notifier: add an interval tree notifier". The approach here largely pre-exists in the various drivers, but is honestly kind of complex/ugly. No better idea was found, I'm hoping putting it all in one place will help improve this over the long term. At least many bugs were squashed and lines of code eliminated while consolidating. Already i915 GPU has posted a series for the next window that also needs this same approach. There are two small conflicts I know of, the first is RDMA related with -rc, the second is a one liner updating a deleted comment in GPU. Both can be solved by using the hmm.git side of the conflict. All the big driver changes have been acked and/or tested by their respective maintainers. Regards, Jason The following changes since commit d6d5df1db6e9d7f8f76d2911707f7d5877251b02: Linux 5.4-rc5 (2019-10-27 13:19:19 -0400) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git tags/for-linus-hmm for you to fetch changes up to 93f4e735b6d98ee4b7a1252d81e815a983e359f2: mm/hmm: remove hmm_range_dma_map and hmm_range_dma_unmap (2019-11-23 19:56:45 -0400) hmm related patches for 5.5 This is another round of bug fixing and cleanup. This time the focus is on the driver pattern to use mmu notifiers to monitor a VA range. This code is lifted out of many drivers and hmm_mirror directly into the mmu_notifier core and written using the best ideas from all the driver implementations. This removes many bugs from the drivers and has a very pleasing diffstat. More drivers can still be converted, but that is for another cycle. - A shared branch with RDMA reworking the RDMA ODP implementation - New mmu_interval_notifier API. This is focused on the use case of monitoring a VA and simplifies the process for drivers - A common seq-count locking scheme built into the mmu_interval_notifier API usable by drivers that call get_user_pages() or hmm_range_fault() with the VA range - Conversion of mlx5 ODP, hfi1, radeon, nouveau, AMD GPU, and Xen GntDev drivers to the new API. This deletes a lot of wonky driver code. - Two improvements for hmm_range_fault(), from testing done by Ralph Christoph Hellwig (1): mm/hmm: remove hmm_range_dma_map and hmm_range_dma_unmap Jason Gunthorpe (30): RDMA/mlx5: Use SRCU properly in ODP prefetch RDMA/mlx5: Split sig_err MR data into its own xarray RDMA/mlx5: Use a dedicated mkey xarray for ODP RDMA/mlx5: Delete struct mlx5_priv->mkey_table RDMA/mlx5: Rework implicit_mr_get_data RDMA/mlx5: Lift implicit_mr_alloc() into the two routines that call it RDMA/mlx5: Set the HW IOVA of the child MRs to their place in the tree RDMA/mlx5: Split implicit handling from pagefault_mr RDMA/mlx5: Use an xarray for the children of an implicit ODP RDMA/mlx5: Reduce locking in implicit_mr_get_data() RDMA/mlx5: Avoid double lookups on the pagefault path RDMA/mlx5: Rework implicit ODP destroy RDMA/mlx5: Do not store implicit children in the odp_mkeys xarray RDMA/mlx5: Do not race with mlx5_ib_invalidate_range during create and destroy RDMA/odp: Remove broken debugging call to invalidate_range Merge branch 'odp_rework' into hmm.git mm/mmu_notifier: define the header pre-processor parts even if disabled mm/mmu_notifier: add an interval tree notifier mm/hmm: allow hmm_range to be used with a mmu_interval_notifier or hmm_mirror mm/hmm: define the pre-processor related parts of hmm.h even if disabled RDMA/odp: Use mmu_interval_notifier_insert() RDMA/hfi1: Use mmu_interval_notifier_insert for user_exp_rcv drm/radeon: use mmu_interval_notifier_insert nouveau: use mmu_notifier directly for invalidate_range_start nouveau: use mmu_interval_notifier instead of hmm_mirror drm/amdgpu: Call find_vma under mmap_sem drm/amdgpu: Use mmu_interval_insert instead of hmm_mirror drm/amdgpu: Use mmu_interval_notifier instead of hmm_mirror mm/hmm: remove hmm_mirror and related xen/gntdev: use mmu_interval_notifier_insert Ralph Campbell (2): mm/hmm: allow snapshot of the special zero page mm/hmm: make full use of walk_page_range() Documentation/vm/hmm.rst | 105 +-- drivers/gpu/drm/amd/amdgpu/amdgpu.h |2 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c |9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |1 + drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
[PATCH] drm/panel: Add Boe Himax8279d MIPI-DSI LCD panel
Support Boe Himax8279d 8.0" 1200x1920 TFT LCD panel, it is a MIPI DSI
panel.
V9:
- Adjust init code, make the format more concise
- kill off default_off_cmds (Emil)
- use mipi_dsi_dcs_set_display_{on,off} in their enable/disable
callbacks. (Emil)
- Adjusting the delay function (Emil)
V8:
- modify PARENTHESIS_ALIGNMENT format (Sam)
- use gpios are required API replace optional gpio API (Emil)
V7:
- Modify communication address
V6:
- Add the information of the reviewer
- Remove unnecessary delays, The udelay_range code gracefully returns
without hitting the scheduler on a delay of 0. (Derek)
- Merge the same data structures, like display_mode and off_cmds (Derek)
- Optimize the processing of results returned by
devm_gpiod_get_optional (Derek)
V5:
- Add the information of the reviewer (Sam)
- Delete unnecessary header files #include (Sam)
- The config DRM_PANEL_BOE_HIMAX8279D appears twice. Drop one of them (Sam)
- ADD static, set_gpios function is not used outside this module (Sam)
V4:
- Frefix all function maes with boe_ (Sam)
- Fsed "enable_gpio" replace "reset_gpio", Make it look clearer (Sam)
- Sort include lines alphabetically (Sam)
- Fixed entries in the makefile must be sorted alphabetically (Sam)
- Add send_mipi_cmds function to avoid duplicating the code (Sam)
- Add the necessary delay(reset_delay_t5) between reset and sending
the initialization command (Rock wang)
V3:
- Remove unnecessary delays in sending initialization commands (Jitao Shi)
V2:
- Use SPDX identifier (Sam)
- Use necessary header files replace drmP.h (Sam)
- Delete unnecessary header files #include (Sam)
- Specifies a GPIOs array to control the reset timing,
instead of reading "dsi-reset-sequence" data from DTS (Sam)
- Delete backlight_disable() function when already disabled (Sam)
- Use devm_of_find_backlight() replace of_find_backlight_by_node() (Sam)
- Move the necessary data in the DTS to the current file,
like porch, display_mode and Init code etc. (Sam)
- Add compatible device "boe,himax8279d10p" (Sam)
V1:
- Support Boe Himax8279d 8.0" 1200x1920 TFT LCD panel, it is a MIPI DSI
panel.
Signed-off-by: Jerry Han
Reviewed-by: Sam Ravnborg
Reviewed-by: Derek Basehore
Reviewed-by: Emil Velikov
Cc: Jitao Shi
Cc: Rock wang
---
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig| 11 +
drivers/gpu/drm/panel/Makefile | 2 +
drivers/gpu/drm/panel/panel-boe-himax8279d.c | 990 +++
4 files changed, 1009 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-boe-himax8279d.c
diff --git a/MAINTAINERS b/MAINTAINERS
index c2b89453805f..295cb214834c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5135,6 +5135,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
S: Maintained
F: drivers/gpu/drm/bochs/
+DRM DRIVER FOR BOE HIMAX8279D PANELS
+M: Jerry Han
+S: Maintained
+F: drivers/gpu/drm/panel/panel-boe-himax8279d.c
+F: Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt
+
DRM DRIVER FOR FARADAY TVE200 TV ENCODER
M: Linus Walleij
T: git git://anongit.freedesktop.org/drm/drm-misc
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index f152bc4eeb53..683ff77a3733 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -18,6 +18,17 @@ config DRM_PANEL_ARM_VERSATILE
reference designs. The panel is detected using special registers
in the Versatile family syscon registers.
+config DRM_PANEL_BOE_HIMAX8279D
+ tristate "Boe Himax8279d panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for Boe Himax8279d
+ TFT-LCD modules. The panel has a 1200x1920 resolution and uses
+ 24 bit RGB per pixel. It provides a MIPI DSI interface to
+ the host and has a built-in LED backlight.
+
config DRM_PANEL_LVDS
tristate "Generic LVDS panel driver"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index b6cd39fe0f20..4beae2ab427f 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o
+obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) +=
panel-feiyang-fy07024di26a30d.o
@@ -36,5 +37,6 @@ obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) +=
panel-sitronix-st7789v.o
obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
obj-$(CONFIG_DRM_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o
obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o
+obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) +=
[PATCH 4/4] msm:disp:dpu1: add mixer selection for display topology
mixer selection in the display topology is based on multiple
factors
1) mixers available in the hw
2) interfaces to be enabled
3) merge capability
change will pickup mixer as per the topology need.
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 21 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 ++
3 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index d82ea99..067ef0b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -58,7 +58,7 @@
#define IDLE_SHORT_TIMEOUT 1
-#define MAX_VDISPLAY_SPLIT 1080
+#define MAX_HDISPLAY_SPLIT 1080
/* timeout in frames waiting for frame done */
#define DPU_ENCODER_FRAME_DONE_TIMEOUT_FRAMES 5
@@ -534,8 +534,23 @@ static struct msm_display_topology
dpu_encoder_get_topology(
if (dpu_enc->phys_encs[i])
intf_count++;
- /* User split topology for width > 1080 */
- topology.num_lm = (mode->vdisplay > MAX_VDISPLAY_SPLIT) ? 2 : 1;
+ /* Datapath topology selection
+*
+* Dual display
+* 2 LM, 2 INTF ( Split display using 2 interfaces)
+*
+* Single display
+* 1 LM, 1 INTF
+* 2 LM, 1 INTF (stream merge to support high resolution interfaces)
+*
+*/
+ if (intf_count == 2)
+ topology.num_lm = 2;
+ else if (!dpu_kms->catalog->caps->has_3d_merge)
+ topology.num_lm = 1;
+ else
+ topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1;
+
topology.num_enc = 0;
topology.num_intf = intf_count;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 0ee2b6c..de69f71 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -67,6 +67,7 @@
.has_src_split = true,
.has_dim_layer = true,
.has_idle_pc = true,
+ .has_3d_merge = true,
};
static const struct dpu_caps sc7180_dpu_caps = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 2607ef3..d0cb41c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -287,6 +287,7 @@ struct dpu_qos_lut_tbl {
* @has_src_split source split feature status
* @has_dim_layer dim layer feature status
* @has_idle_pcindicate if idle power collapse feature is supported
+ * @has_3d_merge indicate if 3D merge is supported
*/
struct dpu_caps {
u32 max_mixer_width;
@@ -297,6 +298,7 @@ struct dpu_caps {
bool has_src_split;
bool has_dim_layer;
bool has_idle_pc;
+ bool has_3d_merge;
};
/**
--
1.9.1
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Re: nouveau on NV04 calling illegal method 02fc under fbcon
Hi Daniel, On Mon, 25 Nov 2019 09:18:41 +0100 Daniel Vetter wrote: > On Mon, Nov 25, 2019 at 9:08 AM Bruno Prémont wrote: > > Trying a new kernel on old [NV04] system I get tons of > > nouveau :01:00.0: gr: intr 0001 [NOTIFY] nsource 0040 > > [ILLEGAL_MTHD] nstatus 4000 [PROTECTION_FAULT] ch 0 > > [DRM] subc 3 class 004a mthd 02fc data 0003 > > errors when operating on console. > > > > As I updated from 4.3 kernel, a bisect does not feel like the best start. > > The bigger your upgrade, the more efficient bisecting actually is. The > difference between one kernel (usually 12-13 bisects) and 20 kernels > is just 4-5 bisects more. Well with the time it takes to compile the kernel (and worse the Kconfig changing quite a lot between the endpoints) it's not fun at all. Thus I will first try with reverting below few commits. > > What is that 02fc method which fbcon is probably triggering as > > hardware-acceleration on nouveau side. > > Booting with nouveau.nofbaccel=0 (that should be the default, I guess > you changed it) should help confirm that's it's indeed fbcon causing > this stuff. I will try out when I am back next to that machine. If it's fbcon acceleration (which I assume as output to fbcon causes new errors), probably one of the few commits to drivers/gpu/drm/nouveau/nv04_fbcon.c would be the cause: 1167c6bc51880cb74a3b1a02286fc25392684281 drm/nouveau: allocate device object for every client 9dec9280523157da820f923e18dd6a7bf99fead7 drm/nouveau/fbcon: make use of drm_fb_helper.dev 28668f43b8e421634e1623f72a879812288dd06b drm/nouveau/fbcon: fix font width not divisible by 8 f045f459d925138fe7d6193a8c86406bda7e49da drm/nouveau/fbcon: fix out-of-bounds memory accesses 4dc28134a8c124aa01b441e1e5b8b54312edc5dd drm/nouveau: rename nouveau_drm.h to nouveau_drv.h At first glance I would suspect one of: 28668f43b8e421634e1623f72a879812288dd06b f045f459d925138fe7d6193a8c86406bda7e49da Bruno > I think at least, not a nouveau expert. > -Daniel > > > > Thanks, > > Bruno > > > > > > > > Below, a grep for nouveau on kernel log: > > > > Nov 24 18:27:27 zeus kernel: Kernel command line: BOOT_IMAGE=5.3.12 ro > > root=802 slub_debug=FZP nouveau.runpm=1 nouveau.debug=debug > > console=ttyS0,115200 nouveau.agpmode=0 > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: NVIDIA NV04 (20044001) > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: trying PRAMIN... > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: 0260: NPDE > > signature (9b030041) unknown > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: : type 00, > > 32768 bytes > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: scored 4 > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: trying PROM... > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: : ROM > > signature () unknown > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: image 0 invalid > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: scored 0 > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: trying ACPI... > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: using image from > > PRAMIN > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: 0260: NPDE > > signature (9b030041) unknown > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: 0260: NPDE > > signature (9b030041) unknown > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: BMP version 1.1 > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: version > > 02.04.19.00.00 > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: DCB table not found > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: i2c: ccb 00: type 00 > > drive 3f sense 3e share ff auxch cb > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: DCB table not found > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: i2c: ccb 01: type 00 > > drive 37 sense 36 share ff auxch cb > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: DCB table not found > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: bios: DCB table not found > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: disp: head-0: ctor > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: disp: head-1: ctor > > Nov 24 18:27:27 zeus kernel: nouveau: DRM-master::0080: init > > running... > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: putting AGP V2 device > > into 0x mode > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: tmr: unknown input clock > > freq > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: tmr: input frequency : > > 0Hz > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: tmr: numerator : > > 0001 > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: tmr: denominator : > > 0001 > > Nov 24 18:27:27 zeus kernel: nouveau :01:00.0: tmr: timer frequency : > > 0Hz > > Nov 24 18:27:27
[PATCH v1] drm/mediatek: fix up 1440x900 dp display black screen issue
From: Yongqiang Niu This patch fix up 1440x900 dp display black screen issue the computed result will overflow rdma1 fifo max size when external display pixel clock bigger than 74MHZ Signed-off-by: Yongqiang Niu --- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c index c1abde3..41143f5 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -152,6 +152,10 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, * account for blanking, and with a pixel depth of 4 bytes: */ threshold = width * height * vrefresh * 4 * 7 / 100; + + if (threshold > rdma_fifo_size) + threshold = rdma_fifo_size; + reg = RDMA_FIFO_UNDERFLOW_EN | RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) | RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold); -- 1.8.1.1.dirty ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [RFC 06/13] drm/i915/svm: Page table mirroring support
On Sun, Nov 24, 2019 at 01:12:47PM -0800, Niranjan Vishwanathapura wrote:
> > > > Using a temporary range is the pattern from nouveau, is it really
> > > > necessary in this driver?
> > >
> > > Yah, not required. In my local build I tried with proper default_flags
> > > and set pfn_flags_mask to 0 and it is working fine.
> >
> > Sorry, I ment calling hmm_range_register during fault processing.
> >
> > If your driver works around user space objects that cover a VA then
> > the range should be created when the object is created.
> >
>
> Oh ok. No, there is no user space object here.
> Binding the user space object to device page table is handled in
> patch 03 of this series (no HMM there).
> This is for binding a system allocated (malloc) memory. User calls
> the bind ioctl with the VA range.
>
> > > > > + /*
> > > > > + * No needd to dma map the host pages and later unmap it, as
> > > > > + * GPU is not allowed to access it with SVM. Hence, no need
> > > > > + * of any intermediate data strucutre to hold the mappings.
> > > > > + */
> > > > > + for (i = 0; i < npages; i++) {
> > > > > + u64 addr = range->pfns[i] & ~((1UL << range->pfn_shift)
> > > > > - 1);
> > > > > +
> > > > > + if (sg && (addr == (sg_dma_address(sg) + sg->length))) {
> > > > > + sg->length += PAGE_SIZE;
> > > > > + sg_dma_len(sg) += PAGE_SIZE;
> > > > > + continue;
> > > > > + }
> > > > > +
> > > > > + if (sg)
> > > > > + sg_page_sizes |= sg->length;
> > > > > +
> > > > > + sg = sg ? __sg_next(sg) : st->sgl;
> > > > > + sg_dma_address(sg) = addr;
> > > > > + sg_dma_len(sg) = PAGE_SIZE;
> > > > > + sg->length = PAGE_SIZE;
> > > > > + st->nents++;
> > > >
> > > > It is odd to build the range into a sgl.
> > > >
> > > > IMHO it is not a good idea to use the sg_dma_address like this, that
> > > > should only be filled in by a dma map. Where does it end up being
> > > > used?
> > >
> > > The sgl is used to plug into the page table update function in i915.
> > >
> > > For the device memory in discrete card, we don't need dma map which
> > > is the case here.
> >
> > How did we get to device memory on a card? Isn't range->pfns a CPU PFN
> > at this point?
> >
> > I'm confused.
>
> Device memory plugin is done through devm_memremap_pages() in patch 07 of
> this series. In that patch, we convert the CPU PFN to device PFN before
> building the sgl (this is similar to the nouveau driver).
But earlier just called hmm_range_fault(), it can return all kinds of
pages. If these are only allowed to be device pages here then that
must be checked (under lock)
And putting the cpu PFN of a ZONE_DEVICE device page into
sg_dma_address still looks very wrong to me
Jason
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[PATCH -next] drm/amd/display: remove set but not used variable 'msg_out'
drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c: In function mod_hdcp_hdcp2_enable_encryption: drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c:633:77: warning: variable msg_out set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c: In function mod_hdcp_hdcp2_enable_dp_stream_encryption: drivers/gpu/drm/amd/amdgpu/../display/modules/hdcp/hdcp_psp.c:710:77: warning: variable msg_out set but not used [-Wunused-but-set-variable] It is never used, so remove it. Reported-by: Hulk Robot Signed-off-by: YueHaibing --- drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c index 2dd5fee..468f5e6 100644 --- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c +++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c @@ -630,14 +630,12 @@ enum mod_hdcp_status mod_hdcp_hdcp2_enable_encryption(struct mod_hdcp *hdcp) struct psp_context *psp = hdcp->config.psp.handle; struct ta_hdcp_shared_memory *hdcp_cmd; struct ta_hdcp_cmd_hdcp2_process_prepare_authentication_message_input_v2 *msg_in; - struct ta_hdcp_cmd_hdcp2_process_prepare_authentication_message_output_v2 *msg_out; struct mod_hdcp_display *display = get_first_added_display(hdcp); hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.hdcp_shared_buf; memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory)); msg_in = _cmd->in_msg.hdcp2_prepare_process_authentication_message_v2; - msg_out = _cmd->out_msg.hdcp2_prepare_process_authentication_message_v2; hdcp2_message_init(hdcp, msg_in); @@ -707,14 +705,12 @@ enum mod_hdcp_status mod_hdcp_hdcp2_enable_dp_stream_encryption(struct mod_hdcp struct psp_context *psp = hdcp->config.psp.handle; struct ta_hdcp_shared_memory *hdcp_cmd; struct ta_hdcp_cmd_hdcp2_process_prepare_authentication_message_input_v2 *msg_in; - struct ta_hdcp_cmd_hdcp2_process_prepare_authentication_message_output_v2 *msg_out; uint8_t i; hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.hdcp_shared_buf; memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory)); msg_in = _cmd->in_msg.hdcp2_prepare_process_authentication_message_v2; - msg_out = _cmd->out_msg.hdcp2_prepare_process_authentication_message_v2; hdcp2_message_init(hdcp, msg_in); -- 2.7.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 2/4] msm:disp:dpu1: add support for display for SC7180 target
Add display hw catalog changes for SC7180 target.
Changes in v1:
- Configure register offsets and capabilities for the
display hw blocks.
Changes in v2:
- mdss_irq data type has changed in the dependent
patch, accommodate the necessary changes.
- Add co-developed-by tags in the commit msg (Stephen Boyd).
Changes in v3:
- fix kernel checkpatch errors in v2
Changes in v4:
- move documentation into seperate patch (Rob Herring).
This patch has dependency on the below series
https://patchwork.kernel.org/patch/11253647/
Co-developed-by: Shubhashree Dhar
Signed-off-by: Shubhashree Dhar
Co-developed-by: Raviteja Tamatam
Signed-off-by: Raviteja Tamatam
Signed-off-by: Kalyan Thota
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 189 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 3 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 1 +
drivers/gpu/drm/msm/msm_drv.c | 4 +-
5 files changed, 188 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 88f2664..1cf4509 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -11,11 +11,17 @@
#include "dpu_hw_catalog_format.h"
#include "dpu_kms.h"
-#define VIG_SDM845_MASK \
- (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_SCALER_QSEED3) | BIT(DPU_SSPP_QOS) |\
+#define VIG_MASK \
+ (BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) |\
BIT(DPU_SSPP_CSC_10BIT) | BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_QOS_8LVL) |\
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_EXCL_RECT))
+#define VIG_SDM845_MASK \
+ (VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3))
+
+#define VIG_SC7180_MASK \
+ (VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED4))
+
#define DMA_SDM845_MASK \
(BIT(DPU_SSPP_SRC) | BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_QOS_8LVL) |\
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
@@ -27,6 +33,9 @@
#define MIXER_SDM845_MASK \
(BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER))
+#define MIXER_SC7180_MASK \
+ (BIT(DPU_DIM_LAYER))
+
#define PINGPONG_SDM845_MASK BIT(DPU_PINGPONG_DITHER)
#define PINGPONG_SDM845_SPLIT_MASK \
@@ -60,6 +69,16 @@
.has_idle_pc = true,
};
+static const struct dpu_caps sc7180_dpu_caps = {
+ .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
+ .max_mixer_blendstages = 0x9,
+ .qseed_type = DPU_SSPP_SCALER_QSEED4,
+ .smart_dma_rev = DPU_SSPP_SMART_DMA_V2,
+ .ubwc_version = DPU_HW_UBWC_VER_20,
+ .has_dim_layer = true,
+ .has_idle_pc = true,
+};
+
static struct dpu_mdp_cfg sdm845_mdp[] = {
{
.name = "top_0", .id = MDP_TOP,
@@ -85,6 +104,23 @@
},
};
+static struct dpu_mdp_cfg sc7180_mdp[] = {
+ {
+ .name = "top_0", .id = MDP_TOP,
+ .base = 0x0, .len = 0x494,
+ .features = 0,
+ .highest_bank_bit = 0x3,
+ .clk_ctrls[DPU_CLK_CTRL_VIG0] = {
+ .reg_off = 0x2AC, .bit_off = 0},
+ .clk_ctrls[DPU_CLK_CTRL_DMA0] = {
+ .reg_off = 0x2AC, .bit_off = 8},
+ .clk_ctrls[DPU_CLK_CTRL_DMA1] = {
+ .reg_off = 0x2B4, .bit_off = 8},
+ .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = {
+ .reg_off = 0x2BC, .bit_off = 8},
+ },
+};
+
/*
* CTL sub blocks config
*/
@@ -116,6 +152,24 @@
},
};
+static struct dpu_ctl_cfg sc7180_ctl[] = {
+ {
+ .name = "ctl_0", .id = CTL_0,
+ .base = 0x1000, .len = 0xE4,
+ .features = BIT(DPU_CTL_ACTIVE_CFG)
+ },
+ {
+ .name = "ctl_1", .id = CTL_1,
+ .base = 0x1200, .len = 0xE4,
+ .features = BIT(DPU_CTL_ACTIVE_CFG)
+ },
+ {
+ .name = "ctl_2", .id = CTL_2,
+ .base = 0x1400, .len = 0xE4,
+ .features = BIT(DPU_CTL_ACTIVE_CFG)
+ },
+};
+
/*
* SSPP sub blocks config
*/
@@ -203,9 +257,23 @@
sdm845_dma_sblk_3, 13, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1),
};
+static struct dpu_sspp_cfg sc7180_sspp[] = {
+ SSPP_BLK("sspp_0", SSPP_VIG0, 0x4000, VIG_SC7180_MASK,
+ sdm845_vig_sblk_0, 0, SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0),
+ SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000, DMA_SDM845_MASK,
+ sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0),
+ SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000, DMA_SDM845_MASK,
+ sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1),
+ SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000, DMA_CURSOR_SDM845_MASK,
+ sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0),
+};
+
[PATCH 0/4] Add support for SC7180 display
SC7180 follows a newer architecture where in some flush controls have been re-organized to simplify programming and provide for future expandability. Specifically: 1) The TIMING_ bits that control flush of INTF_ have been replaced with a common INTF flush bit which flushes the programming in the MDP_CTL__INTF_ACTIVE register 2) Individual flush bits for MERGE_3D, DSC and CDWN have been added which flush the programming in the MDP_CTL__MERGE_3D_ACTIVE, ... etc respectively 3) PERIPH flush bit has been added to flush DSP packets for DisplayPort The complete datapath is described using the MDP_CTL__TOP and newly added ACTIVE registers to handle other sub blocks such as interface (INTF) resources, PingPong buffer / Layer Mixer, Display Stream Compression (DSC) resources, writeback (WB) and 3D Merge selections that are part of the datapath. Kalyan Thota (4): dt-bindings: msm:disp: add sc7180 DPU variant msm:disp:dpu1: add support for display for SC7180 target msm:disp:dpu1: setup display datapath for SC7180 target msm:disp:dpu1: add mixer selection for display topology .../devicetree/bindings/display/msm/dpu.txt| 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c| 21 ++- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 21 ++- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 191 +++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 6 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 84 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 24 +++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c| 28 +++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h| 6 + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c| 1 + drivers/gpu/drm/msm/msm_drv.c | 4 +- 12 files changed, 370 insertions(+), 23 deletions(-) -- 1.9.1 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
