Re: [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding

2019-12-19 Thread Laurent Pinchart
Hi Hsin-Yi,

On Fri, Dec 20, 2019 at 11:20:13AM +0800, Hsin-Yi Wang wrote:
> On Fri, Dec 20, 2019 at 4:45 AM Rob Herring wrote:
> > On Wed, Dec 11, 2019 at 02:19:08PM +0800, Hsin-Yi Wang wrote:
> > > From: Nicolas Boichat 
> > >
> > > Add support for analogix,anx7688
> > >
> > > Signed-off-by: Nicolas Boichat 
> > > Signed-off-by: Hsin-Yi Wang 
> > > ---
> > > Change from RFC to v1:
> > > - txt to yaml
> > > ---
> > >  .../bindings/display/bridge/anx7688.yaml  | 60 +++
> > >  1 file changed, 60 insertions(+)
> > >  create mode 100644 
> > > Documentation/devicetree/bindings/display/bridge/anx7688.yaml
> > >
> > > diff --git 
> > > a/Documentation/devicetree/bindings/display/bridge/anx7688.yaml 
> > > b/Documentation/devicetree/bindings/display/bridge/anx7688.yaml
> > > new file mode 100644
> > > index ..cf79f7cf8fdf
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/bridge/anx7688.yaml
> > > @@ -0,0 +1,60 @@
> > > +# SPDX-License-Identifier: GPL-2.0
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/display/bridge/anx7688.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Analogix ANX7688 SlimPort (Single-Chip Transmitter for DP over 
> > > USB-C)
> > > +
> > > +maintainers:
> > > +  - Nicolas Boichat 
> > > +
> > > +description: |
> > > +  The ANX7688 is a single-chip mobile transmitter to support 4K 60 
> > > frames per
> > > +  second (4096x2160p60) or FHD 120 frames per second (1920x1080p120) 
> > > video
> > > +  resolution from a smartphone or tablet with full function USB-C.
> > > +
> > > +  This binding only describes the HDMI to DP display bridge.
> > > +
> > > +properties:
> > > +  compatible:
> > > +const: analogix,anx7688
> > > +
> > > +  reg:
> > > +maxItems: 1
> > > +description: I2C address of the device
> > > +
> > > +  ports:
> > > +type: object
> > > +
> > > +properties:
> > > +  port@0:
> > > +type: object
> > > +description: |
> > > +  Video port for HDMI input
> > > +
> > > +  port@1:
> > > +type: object
> > > +description: |
> > > +  Video port for eDP output
> > > +
> > > +required:
> > > +  - port@0
> >
> > Sometimes you have no output?
>
> Yes, only input is required.

But what happens in that case ? What's the use of a bridge with a
non-connected output ? :-)

> > > +
> > > +required:
> > > +  - compatible
> > > +  - reg
> > > +  - ports
> >
> > The example will have errors because it is missing 'ports'. Run 'make
> > dt_binding_check'.
> >
> > Add:
> >
> > additionalProperties: false
> >
>
> Ack, will fix this. Thanks
>
> > > +
> > > +examples:
> > > +  - |
> > > +anx7688: anx7688@2c {
> > > +  compatible = "analogix,anx7688";
> > > +  reg = <0x2c>;
> > > +
> > > +  port {
> > > +anx7688_in: endpoint {
> > > +  remote-endpoint = <_out>;
> > > +};
> > > +  };
> > > +};

-- 
Regards,

Laurent Pinchart
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[PATCH] drm/hisilicon/hibmc: add DPMS on/off function

2019-12-19 Thread Zhihui Chen
add DPMS function to turn on/off signal of monitor

Signed-off-by: Zhihui Chen 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c   | 16 
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h |  6 ++
 2 files changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index 722e369f30d4..24de937c1cb1 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -189,6 +189,20 @@ static struct drm_plane *hibmc_plane_init(struct 
hibmc_drm_private *priv)
return plane;
 }
 
+static void hibmc_crtc_dpms(struct drm_crtc *crtc, int dpms)
+{
+   struct hibmc_drm_private *priv = crtc->dev->dev_private;
+   unsigned int reg;
+
+   reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
+   reg &= ~HIBMC_CRT_DISP_CTL_DPMS_MASK;
+   reg |= HIBMC_FIELD(HIBMC_CRT_DISP_CTL_DPMS, dpms);
+   reg &= ~HIBMC_CRT_DISP_CTL_TIMING_MASK;
+   if (dpms == HIBMC_CRT_DPMS_ON)
+   reg |= HIBMC_CRT_DISP_CTL_TIMING(1);
+   writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL);
+}
+
 static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc,
 struct drm_crtc_state *old_state)
 {
@@ -205,6 +219,7 @@ static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc,
reg |= HIBMC_CURR_GATE_DISPLAY(1);
hibmc_set_current_gate(priv, reg);
drm_crtc_vblank_on(crtc);
+   hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_ON);
 }
 
 static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc,
@@ -213,6 +228,7 @@ static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc,
unsigned int reg;
struct hibmc_drm_private *priv = crtc->dev->dev_private;
 
+   hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_OFF);
drm_crtc_vblank_off(crtc);
 
hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_SLEEP);
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
index b63a1ee15ceb..b9e20cfcfb5a 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
@@ -68,6 +68,12 @@
 
 #define HIBMC_CRT_DISP_CTL 0x80200
 
+#define HIBMC_CRT_DISP_CTL_DPMS(x) ((x) << 30)
+#define HIBMC_CRT_DISP_CTL_DPMS_MASK   0xc000
+
+#define HIBMC_CRT_DPMS_ON  0
+#define HIBMC_CRT_DPMS_OFF 3
+
 #define HIBMC_CRT_DISP_CTL_CRTSELECT(x)((x) << 25)
 #define HIBMC_CRT_DISP_CTL_CRTSELECT_MASK  0x200
 
-- 
2.20.1


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[PATCH] drm/hisilicon/hibmc: fix 'xset dpms force off' fail

2019-12-19 Thread Zhihui Chen
both crtc_state->adjusted_mode.hdisplay and
crtc_state->adjusted_mode.vdisplay are 0 when switch dpms off,
return -EINVAL cause switch dpms off fail.

Signed-off-by: Zhihui Chen 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index 6527a97f68a3..722e369f30d4 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -80,6 +80,9 @@ static int hibmc_plane_atomic_check(struct drm_plane *plane,
return -EINVAL;
}
 
+   if (!crtc_state->enable)
+   return 0;
+
if (state->crtc_x + state->crtc_w >
crtc_state->adjusted_mode.hdisplay ||
state->crtc_y + state->crtc_h >
-- 
2.20.1


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Re: [PATCH 4/4] drm/mediatek: config mipitx impedance with calibration data

2019-12-19 Thread CK Hu
Hi, Jitao:

On Mon, 2019-12-16 at 16:29 +0800, Jitao Shi wrote:
> Read calibration data from nvmem, and config mipitx impedance with
> calibration data to make sure their impedance are 100ohm.
> 
> Signed-off-by: Jitao Shi 
> ---
>  drivers/gpu/drm/mediatek/mtk_mipi_tx.h|  1 +
>  drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c | 63 +++
>  2 files changed, 64 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_mipi_tx.h 
> b/drivers/gpu/drm/mediatek/mtk_mipi_tx.h
> index eea44327fe9f..a1b6292145de 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mipi_tx.h
> +++ b/drivers/gpu/drm/mediatek/mtk_mipi_tx.h
> @@ -28,6 +28,7 @@ struct mtk_mipi_tx {
>   void __iomem *regs;
>   u32 data_rate;
>   u32 mipitx_drive;
> + u32 rt_code[5];
>   const struct mtk_mipitx_data *driver_data;
>   struct clk_hw pll_hw;
>   struct clk *pll;
> diff --git a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c 
> b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c
> index 124fdf95f1e5..f624516944bb 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c
> +++ b/drivers/gpu/drm/mediatek/mtk_mt8183_mipi_tx.c
> @@ -5,6 +5,8 @@
>   */
>  
>  #include "mtk_mipi_tx.h"
> +#include 
> +#include 
>  
>  #define MIPITX_LANE_CON  0x000c
>  #define RG_DSI_CPHY_T1DRV_EN BIT(0)
> @@ -28,6 +30,7 @@
>  #define MIPITX_PLL_CON4  0x003c
>  #define RG_DSI_PLL_IBIAS (3 << 10)
>  
> +#define MIPITX_D2P_RTCODE0x0100
>  #define MIPITX_D2_SW_CTL_EN  0x0144
>  #define MIPITX_D0_SW_CTL_EN  0x0244
>  #define MIPITX_CK_CKMODE_EN  0x0328
> @@ -108,6 +111,64 @@ static const struct clk_ops mtk_mipi_tx_pll_ops = {
>   .recalc_rate = mtk_mipi_tx_pll_recalc_rate,
>  };
>  
> +static int mtk_mipi_tx_config_calibration_data(struct mtk_mipi_tx *mipi_tx)
> +{
> + u32 *buf = NULL;

Need not to assign NULL to buf, it would be assigned some value later.

> + int i, j;
> + struct nvmem_cell *cell;
> + struct device *dev = mipi_tx->dev;
> + size_t len;
> +
> + cell = nvmem_cell_get(dev, "calibration-data");
> + if (IS_ERR(cell)) {
> + dev_warn(dev, "nvmem_cell_get fail\n");

In [1], nvmem is optional property, so I think you should use dev_dbg()
or dev_info().

[1]
http://lists.infradead.org/pipermail/linux-mediatek/2019-December/025640.html

> + return -EINVAL;

The caller does not process return value, so I think you don't need to
return value.

> + }
> +
> + buf = (u32 *)nvmem_cell_read(cell, );
> +
> + nvmem_cell_put(cell);
> +
> + if (IS_ERR(buf)) {
> + dev_warn(dev, "can't get data\n");
> + return -EINVAL;
> + }
> +
> + if (len < 3 * sizeof(u32)) {
> + dev_warn(dev, "invalid calibration data\n");
> + kfree(buf);
> + return -EINVAL;
> + }
> +
> + mipi_tx->rt_code[0] = ((buf[0] >> 6 & 0x1F) << 5) |

You don't access rt_code[] out of this function, so I think this could
be local variable.

> +   (buf[0] >> 11 & 0x1F);

Lower case 0x1f.

> + mipi_tx->rt_code[1] = ((buf[1] >> 27 & 0x1F) << 5) |
> +   (buf[0] >> 1 & 0x1F);
> + mipi_tx->rt_code[2] = ((buf[1] >> 17 & 0x1F) << 5) |
> +   (buf[1] >> 22 & 0x1F);
> + mipi_tx->rt_code[3] = ((buf[1] >> 7 & 0x1F) << 5) |
> +   (buf[1] >> 12 & 0x1F);
> + mipi_tx->rt_code[4] = ((buf[2] >> 27 & 0x1F) << 5) |
> +   (buf[1] >> 2 & 0x1F);

Why not just save rt_code in nvmem and you don't need to translate here?
If you need to do so, please add description for this.

> +
> + for (i = 0; i < 5; i++) {
> + if ((mipi_tx->rt_code[i] & 0x1F) == 0)
> + mipi_tx->rt_code[i] |= 0x10;
> +
> + if ((mipi_tx->rt_code[i] >> 5 & 0x1F) == 0)
> + mipi_tx->rt_code[i] |= 0x10 << 5;
> +
> + for (j = 0; j < 10; j++) {
> + mtk_mipi_tx_update_bits(mipi_tx,
> + MIPITX_D2P_RTCODE * (i + 1) + j * 4,
> + 1, mipi_tx->rt_code[i] >> j & 1);
> + }

There is only one statement in for-loop, so you could get rid of {}.

Regards,
CK

> + }
> +
> + kfree(buf);
> + return 0;
> +}
> +
>  static void mtk_mipi_tx_power_on_signal(struct phy *phy)
>  {
>   struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);
> @@ -130,6 +191,8 @@ static void mtk_mipi_tx_power_on_signal(struct phy *phy)
>   RG_DSI_HSTX_LDO_REF_SEL,
>   mipi_tx->mipitx_drive << 6);
>  
> + mtk_mipi_tx_config_calibration_data(mipi_tx);
> +
>   mtk_mipi_tx_set_bits(mipi_tx, MIPITX_CK_CKMODE_EN, DSI_CK_CKMODE_EN);
>  }
>  

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Re: [PATCH] drm/dp_mst: clear time slots for ports invalid

2019-12-19 Thread Lin, Wayne
[AMD Official Use Only - Internal Distribution Only]

Pinged.
Hi, can someone help to review please.

Thanks a lot.

Regards,
Wayne


From: Wayne Lin 
Sent: Friday, December 6, 2019 16:39
To: dri-devel@lists.freedesktop.org; amd-...@lists.freedesktop.org
Cc: Kazlauskas, Nicholas; Wentland, Harry; Zuo, Jerry; ly...@redhat.com; 
sta...@vger.kernel.org; Lin, Wayne
Subject: [PATCH] drm/dp_mst: clear time slots for ports invalid

[Why]
When change the connection status in a MST topology, mst device
which detect the event will send out CONNECTION_STATUS_NOTIFY messgae.

e.g. src-mst-mst-sst => src-mst (unplug) mst-sst

Currently, under the above case of unplugging device, ports which have
been allocated payloads and are no longer in the topology still occupy
time slots and recorded in proposed_vcpi[] of topology manager.

If we don't clean up the proposed_vcpi[], when code flow goes to try to
update payload table by calling drm_dp_update_payload_part1(), we will
fail at checking port validation due to there are ports with proposed
time slots but no longer in the mst topology. As the result of that, we
will also stop updating the DPCD payload table of down stream port.

[How]
While handling the CONNECTION_STATUS_NOTIFY message, add a detection to
see if the event indicates that a device is unplugged to an output port.
If the detection is true, then iterrate over all proposed_vcpi[] to
see whether a port of the proposed_vcpi[] is still in the topology or
not. If the port is invalid, set its num_slots to 0.

Thereafter, when try to update payload table by calling
drm_dp_update_payload_part1(), we can successfully update the DPCD
payload table of down stream port and clear the proposed_vcpi[] to NULL.

Signed-off-by: Wayne Lin 
Cc: sta...@vger.kernel.org
---
 drivers/gpu/drm/drm_dp_mst_topology.c | 24 +++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 5306c47dc820..2e236b6275c4 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2318,7 +2318,7 @@ drm_dp_mst_handle_conn_stat(struct drm_dp_mst_branch 
*mstb,
 {
struct drm_dp_mst_topology_mgr *mgr = mstb->mgr;
struct drm_dp_mst_port *port;
-   int old_ddps, ret;
+   int old_ddps, old_input, ret, i;
u8 new_pdt;
bool dowork = false, create_connector = false;

@@ -2349,6 +2349,7 @@ drm_dp_mst_handle_conn_stat(struct drm_dp_mst_branch 
*mstb,
}

old_ddps = port->ddps;
+   old_input = port->input;
port->input = conn_stat->input_port;
port->mcs = conn_stat->message_capability_status;
port->ldps = conn_stat->legacy_device_plug_status;
@@ -2373,6 +2374,27 @@ drm_dp_mst_handle_conn_stat(struct drm_dp_mst_branch 
*mstb,
dowork = false;
}

+   if (!old_input && old_ddps != port->ddps && !port->ddps) {
+   for (i = 0; i < mgr->max_payloads; i++) {
+   struct drm_dp_vcpi *vcpi = mgr->proposed_vcpis[i];
+   struct drm_dp_mst_port *port_validated;
+
+   if (vcpi) {
+   port_validated =
+   container_of(vcpi, struct 
drm_dp_mst_port, vcpi);
+   port_validated =
+   
drm_dp_mst_topology_get_port_validated(mgr, port_validated);
+   if (!port_validated) {
+   mutex_lock(>payload_lock);
+   vcpi->num_slots = 0;
+   mutex_unlock(>payload_lock);
+   } else {
+   
drm_dp_mst_topology_put_port(port_validated);
+   }
+   }
+   }
+   }
+
if (port->connector)
drm_modeset_unlock(>base.lock);
else if (create_connector)
--
2.17.1

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Re: [PATCH 1/2] dt-bindings: Add vendor prefix for Satoz

2019-12-19 Thread Rob Herring
On Fri, 13 Dec 2019 19:23:24 +0100, Miquel Raynal wrote:
> Satoz is a Chinese TFT manufacturer.
> Website: http://www.sat-sz.com/English/index.html
> 
> Signed-off-by: Miquel Raynal 
> ---
>  Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring 
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Re: [PATCH 01/12] dt-bindings: display: rockchip-lvds: Declare PX30 compatible

2019-12-19 Thread Rob Herring
On Fri, 13 Dec 2019 19:10:40 +0100, Miquel Raynal wrote:
> Document the PX30 LVDS compatible.
> 
> Signed-off-by: Miquel Raynal 
> ---
>  .../devicetree/bindings/display/rockchip/rockchip-lvds.txt   | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring 
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Re: [PATCH v11 00/25] mm/gup: track dma-pinned pages: FOLL_PIN

2019-12-19 Thread John Hubbard

On 12/19/19 1:07 PM, Jason Gunthorpe wrote:
...

3. It would be nice if I could reproduce this. I have a two-node mlx5 Infiniband
test setup, but I have done only the tiniest bit of user space IB coding, so
if you have any test programs that aren't too hard to deal with that could
possibly hit this, or be tweaked to hit it, I'd be grateful. Keeping in mind
that I'm not an advanced IB programmer. At all. :)


Clone this:

https://github.com/linux-rdma/rdma-core.git

Install all the required deps to build it (notably cython), see the README.md

$ ./build.sh
$ build/bin/run_tests.py

If you get things that far I think Leon can get a reproduction for you



Cool, it's up and running (1 failure, 3 skipped, out of 67 tests).

This is a great test suite to have running, I'll add it to my scripts. Here's 
the
full output in case the failure or skip cases are a problem:

$ sudo ./build/bin/run_tests.py --verbose

test_create_ah (tests.test_addr.AHTest) ... ok
test_create_ah_roce (tests.test_addr.AHTest) ... skipped "Can't run RoCE tests on IB 
link layer"
test_destroy_ah (tests.test_addr.AHTest) ... ok
test_create_comp_channel (tests.test_cq.CCTest) ... ok
test_destroy_comp_channel (tests.test_cq.CCTest) ... ok
test_create_cq_ex (tests.test_cq.CQEXTest) ... ok
test_create_cq_ex_bad_flow (tests.test_cq.CQEXTest) ... ok
test_destroy_cq_ex (tests.test_cq.CQEXTest) ... ok
test_create_cq (tests.test_cq.CQTest) ... ok
test_create_cq_bad_flow (tests.test_cq.CQTest) ... ok
test_destroy_cq (tests.test_cq.CQTest) ... ok
test_rc_traffic_cq_ex (tests.test_cqex.CqExTestCase) ... ok
test_ud_traffic_cq_ex (tests.test_cqex.CqExTestCase) ... ok
test_xrc_traffic_cq_ex (tests.test_cqex.CqExTestCase) ... ok
test_create_dm (tests.test_device.DMTest) ... ok
test_create_dm_bad_flow (tests.test_device.DMTest) ... ok
test_destroy_dm (tests.test_device.DMTest) ... ok
test_destroy_dm_bad_flow (tests.test_device.DMTest) ... ok
test_dm_read (tests.test_device.DMTest) ... ok
test_dm_write (tests.test_device.DMTest) ... ok
test_dm_write_bad_flow (tests.test_device.DMTest) ... ok
test_dev_list (tests.test_device.DeviceTest) ... ok
test_open_dev (tests.test_device.DeviceTest) ... ok
test_query_device (tests.test_device.DeviceTest) ... ok
test_query_device_ex (tests.test_device.DeviceTest) ... ok
test_query_gid (tests.test_device.DeviceTest) ... ok
test_query_port (tests.test_device.DeviceTest) ... FAIL
test_query_port_bad_flow (tests.test_device.DeviceTest) ... ok
test_create_dm_mr (tests.test_mr.DMMRTest) ... ok
test_destroy_dm_mr (tests.test_mr.DMMRTest) ... ok
test_buffer (tests.test_mr.MRTest) ... ok
test_dereg_mr (tests.test_mr.MRTest) ... ok
test_dereg_mr_twice (tests.test_mr.MRTest) ... ok
test_lkey (tests.test_mr.MRTest) ... ok
test_read (tests.test_mr.MRTest) ... ok
test_reg_mr (tests.test_mr.MRTest) ... ok
test_reg_mr_bad_flags (tests.test_mr.MRTest) ... ok
test_reg_mr_bad_flow (tests.test_mr.MRTest) ... ok
test_rkey (tests.test_mr.MRTest) ... ok
test_write (tests.test_mr.MRTest) ... ok
test_dereg_mw_type1 (tests.test_mr.MWTest) ... ok
test_dereg_mw_type2 (tests.test_mr.MWTest) ... ok
test_reg_mw_type1 (tests.test_mr.MWTest) ... ok
test_reg_mw_type2 (tests.test_mr.MWTest) ... ok
test_reg_mw_wrong_type (tests.test_mr.MWTest) ... ok
test_odp_rc_traffic (tests.test_odp.OdpTestCase) ... ok
test_odp_ud_traffic (tests.test_odp.OdpTestCase) ... skipped 'ODP is not 
supported - ODP recv not supported'
test_odp_xrc_traffic (tests.test_odp.OdpTestCase) ... ok
test_default_allocators (tests.test_parent_domain.ParentDomainTestCase) ... ok
test_mem_align_allocators (tests.test_parent_domain.ParentDomainTestCase) ... ok
test_without_allocators (tests.test_parent_domain.ParentDomainTestCase) ... ok
test_alloc_pd (tests.test_pd.PDTest) ... ok
test_create_pd_none_ctx (tests.test_pd.PDTest) ... ok
test_dealloc_pd (tests.test_pd.PDTest) ... ok
test_destroy_pd_twice (tests.test_pd.PDTest) ... ok
test_multiple_pd_creation (tests.test_pd.PDTest) ... ok
test_create_qp_ex_no_attr (tests.test_qp.QPTest) ... ok
test_create_qp_ex_no_attr_connected (tests.test_qp.QPTest) ... ok
test_create_qp_ex_with_attr (tests.test_qp.QPTest) ... ok
test_create_qp_ex_with_attr_connected (tests.test_qp.QPTest) ... ok
test_create_qp_no_attr (tests.test_qp.QPTest) ... ok
test_create_qp_no_attr_connected (tests.test_qp.QPTest) ... ok
test_create_qp_with_attr (tests.test_qp.QPTest) ... ok
test_create_qp_with_attr_connected (tests.test_qp.QPTest) ... ok
test_modify_qp (tests.test_qp.QPTest) ... ok
test_query_qp (tests.test_qp.QPTest) ... ok
test_rdmacm_sync_traffic (tests.test_rdmacm.CMTestCase) ... skipped 'No devices 
with net interface'

==
FAIL: test_query_port (tests.test_device.DeviceTest)
--
Traceback (most recent call last):
  File "/kernel_work/rdma-core/tests/test_device.py", line 129, in 
test_query_port

Re: [PATCH v11 00/25] mm/gup: track dma-pinned pages: FOLL_PIN

2019-12-19 Thread John Hubbard

On 12/19/19 1:07 PM, Jason Gunthorpe wrote:

On Thu, Dec 19, 2019 at 12:30:31PM -0800, John Hubbard wrote:

On 12/19/19 5:26 AM, Leon Romanovsky wrote:

On Mon, Dec 16, 2019 at 02:25:12PM -0800, John Hubbard wrote:

Hi,

This implements an API naming change (put_user_page*() -->
unpin_user_page*()), and also implements tracking of FOLL_PIN pages. It
extends that tracking to a few select subsystems. More subsystems will
be added in follow up work.


Hi John,

The patchset generates kernel panics in our IB testing. In our tests, we
allocated single memory block and registered multiple MRs using the single
block.

The possible bad flow is:
   ib_umem_geti() ->
pin_user_pages_fast(FOLL_WRITE) ->
 internal_get_user_pages_fast(FOLL_WRITE) ->
  gup_pgd_range() ->
   gup_huge_pd() ->
gup_hugepte() ->
 try_grab_compound_head() ->


Hi Leon,

Thanks very much for the detailed report! So we're overflowing...

At first look, this seems likely to be hitting a weak point in the
GUP_PIN_COUNTING_BIAS-based design, one that I believed could be deferred
(there's a writeup in Documentation/core-api/pin_user_page.rst, lines
99-121). Basically it's pretty easy to overflow the page->_refcount
with huge pages if the pages have a *lot* of subpages.

We can only do about 7 pins on 1GB huge pages that use 4KB subpages.


Considering that establishing these pins is entirely under user
control, we can't have a limit here.


There's already a limit, it's just a much larger one. :) What does "no limit"
really mean, numerically, to you in this case?



If the number of allowed pins are exhausted then the
pin_user_pages_fast() must fail back to the user.



I'll poke around the IB call stack and see how much of that return path
is in place, if any. Because it's the same situation for get_user_pages_fast().
This code just added a warning on overflow so we could spot it early.




3. It would be nice if I could reproduce this. I have a two-node mlx5 Infiniband
test setup, but I have done only the tiniest bit of user space IB coding, so
if you have any test programs that aren't too hard to deal with that could
possibly hit this, or be tweaked to hit it, I'd be grateful. Keeping in mind
that I'm not an advanced IB programmer. At all. :)


Clone this:

https://github.com/linux-rdma/rdma-core.git

Install all the required deps to build it (notably cython), see the README.md

$ ./build.sh
$ build/bin/run_tests.py

If you get things that far I think Leon can get a reproduction for you



OK, here goes.

thanks,
--
John Hubbard
NVIDIA
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Re: [PATCH] drm/todo: Updating logging todo

2019-12-19 Thread Daniel Vetter
On Thu, Dec 19, 2019 at 06:26:41PM +0200, Jani Nikula wrote:
> On Thu, 19 Dec 2019, Daniel Vetter  wrote:
> > Jani has merged a new set of logging functions, which we hope to be
> > the One True solution now, pinky promises:
> >
> > commit fb6c7ab8718eb2543695d77ad8302ff81e8e1e32
> > Author: Jani Nikula 
> > Date:   Tue Dec 10 14:30:43 2019 +0200
> >
> > drm/print: introduce new struct drm_device based logging macros
> >
> > Update the todo entry to match the new preference.
> >
> > Cc: Jani Nikula 
> > Cc: Sean Paul 
> > Cc: Wambui Karuga 
> > Signed-off-by: Daniel Vetter 
> 
> Might mention converting everything to the One True solution, but
> *shrug*.
> 
> Acked-by: Jani Nikula 

Patch applied. And thanks for wrangling this bikeshed into at least a less
yelling color :-)

Cheers, Daniel

> 
> > ---
> >  Documentation/gpu/todo.rst | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
> > index 2d85f37284a1..017f3090f8a1 100644
> > --- a/Documentation/gpu/todo.rst
> > +++ b/Documentation/gpu/todo.rst
> > @@ -142,13 +142,13 @@ Contact: Daniel Vetter, respective driver maintainers
> >  
> >  Level: Advanced
> >  
> > -Convert instances of dev_info/dev_err/dev_warn to their DRM_DEV_* 
> > equivalent
> > -
> > +Convert logging to drm_* functions with drm_device paramater
> > +
> >  
> >  For drivers which could have multiple instances, it is necessary to
> >  differentiate between which is which in the logs. Since DRM_INFO/WARN/ERROR
> >  don't do this, drivers used dev_info/warn/err to make this 
> > differentiation. We
> > -now have DRM_DEV_* variants of the drm print macros, so we can start to 
> > convert
> > +now have drm_* variants of the drm print functions, so we can start to 
> > convert
> >  those drivers back to using drm-formwatted specific log messages.
> >  
> >  Before you start this conversion please contact the relevant maintainers 
> > to make
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH RESEND 3/4] dt-bindings: drm/bridge: Add GPIO display mux binding

2019-12-19 Thread Rob Herring
On Mon, Dec 16, 2019 at 03:16:23PM +0800, Hsin-Yi Wang wrote:
> On Sat, Dec 14, 2019 at 5:29 AM Rob Herring  wrote:
> >
> > On Wed, Dec 11, 2019 at 12:19 AM Hsin-Yi Wang  wrote:
> > >
> > > From: Nicolas Boichat 
> > >
> > > Add bindings for Generic GPIO mux driver.
> > >
> > > Signed-off-by: Nicolas Boichat 
> > > Signed-off-by: Hsin-Yi Wang 
> > > ---
> > > Change from RFC to v1:
> > > - txt to yaml
> > > ---
> > >  .../bindings/display/bridge/gpio-mux.yaml | 89 +++
> > >  1 file changed, 89 insertions(+)
> > >  create mode 100644 
> > > Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml
> > >
> > > diff --git 
> > > a/Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml 
> > > b/Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml
> > > new file mode 100644
> > > index ..cef098749066
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/bridge/gpio-mux.yaml
> > > @@ -0,0 +1,89 @@
> > > +# SPDX-License-Identifier: GPL-2.0
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/display/bridge/gpio-mux.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Generic display mux (1 input, 2 outputs)
> >
> > What makes it generic? Doesn't the mux chip have power supply,
> > possibly a reset line or not, etc.? What about a mux where the GPIO
> > controls the mux?
> >
> > Generally, we avoid 'generic' bindings because h/w is rarely generic.
> > You can have a generic driver which works on multiple devices.
> >
> Then how about making it mt8173-oak-gpio-mux? Since this is currently
> only used in this board.

Isn't there an underlying part# you can use? Or if you can point me to 
multiple chips implementing the same thing, then maybe a generic binding 
is fine.

Rob
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Re: [PATCH RESEND 1/4] dt-bindings: drm/bridge: analogix-anx7688: Add ANX7688 transmitter binding

2019-12-19 Thread Rob Herring
On Wed, Dec 11, 2019 at 02:19:08PM +0800, Hsin-Yi Wang wrote:
> From: Nicolas Boichat 
> 
> Add support for analogix,anx7688
> 
> Signed-off-by: Nicolas Boichat 
> Signed-off-by: Hsin-Yi Wang 
> ---
> Change from RFC to v1:
> - txt to yaml
> ---
>  .../bindings/display/bridge/anx7688.yaml  | 60 +++
>  1 file changed, 60 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/bridge/anx7688.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/anx7688.yaml 
> b/Documentation/devicetree/bindings/display/bridge/anx7688.yaml
> new file mode 100644
> index ..cf79f7cf8fdf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/anx7688.yaml
> @@ -0,0 +1,60 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/anx7688.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analogix ANX7688 SlimPort (Single-Chip Transmitter for DP over USB-C)
> +
> +maintainers:
> +  - Nicolas Boichat 
> +
> +description: |
> +  The ANX7688 is a single-chip mobile transmitter to support 4K 60 frames per
> +  second (4096x2160p60) or FHD 120 frames per second (1920x1080p120) video
> +  resolution from a smartphone or tablet with full function USB-C.
> +
> +  This binding only describes the HDMI to DP display bridge.
> +
> +properties:
> +  compatible:
> +const: analogix,anx7688
> +
> +  reg:
> +maxItems: 1
> +description: I2C address of the device
> +
> +  ports:
> +type: object
> +
> +properties:
> +  port@0:
> +type: object
> +description: |
> +  Video port for HDMI input
> +
> +  port@1:
> +type: object
> +description: |
> +  Video port for eDP output
> +
> +required:
> +  - port@0

Sometimes you have no output?

> +
> +required:
> +  - compatible
> +  - reg
> +  - ports

The example will have errors because it is missing 'ports'. Run 'make 
dt_binding_check'.

Add:

additionalProperties: false

> +
> +examples:
> +  - |
> +anx7688: anx7688@2c {
> +  compatible = "analogix,anx7688";
> +  reg = <0x2c>;
> +
> +  port {
> +anx7688_in: endpoint {
> +  remote-endpoint = <_out>;
> +};
> +  };
> +};
> -- 
> 2.24.0.525.g8f36a354ae-goog
> 
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Re: [PATCH v11 00/25] mm/gup: track dma-pinned pages: FOLL_PIN

2019-12-19 Thread John Hubbard

On 12/19/19 5:26 AM, Leon Romanovsky wrote:

On Mon, Dec 16, 2019 at 02:25:12PM -0800, John Hubbard wrote:

Hi,

This implements an API naming change (put_user_page*() -->
unpin_user_page*()), and also implements tracking of FOLL_PIN pages. It
extends that tracking to a few select subsystems. More subsystems will
be added in follow up work.


Hi John,

The patchset generates kernel panics in our IB testing. In our tests, we
allocated single memory block and registered multiple MRs using the single
block.

The possible bad flow is:
  ib_umem_geti() ->
   pin_user_pages_fast(FOLL_WRITE) ->
internal_get_user_pages_fast(FOLL_WRITE) ->
 gup_pgd_range() ->
  gup_huge_pd() ->
   gup_hugepte() ->
try_grab_compound_head() ->


Hi Leon,

Thanks very much for the detailed report! So we're overflowing...

At first look, this seems likely to be hitting a weak point in the
GUP_PIN_COUNTING_BIAS-based design, one that I believed could be deferred
(there's a writeup in Documentation/core-api/pin_user_page.rst, lines
99-121). Basically it's pretty easy to overflow the page->_refcount
with huge pages if the pages have a *lot* of subpages.

We can only do about 7 pins on 1GB huge pages that use 4KB subpages.
Do you have any idea how many pins (repeated pins on the same page, which
it sounds like you have) might be involved in your test case,
and the huge page and system page sizes? That would allow calculating
if we're likely overflowing for that reason.

So, ideas and next steps:

1. Assuming that you *are* hitting this, I think I may have to fall back to
implementing the "deferred" part of this design, as part of this series, after
all. That means:

  For the pin/unpin calls at least, stop treating all pages as if they are
  a cluster of PAGE_SIZE pages; instead, retrieve a huge page as one page.
  That's not how it works now, and the need to hand back a huge array of
  subpages is part of the problem. This affects the callers too, so it's not
  a super quick change to make. (I was really hoping not to have to do this
  yet.)

2. OR, maybe if you're *close* the the overflow, I could buy some development
time by moving the boundary between pinned vs get_page() refcounts, by
reducing GUP_PIN_COUNTING_BIAS. That's less robust, but I don't want
to rule it out just yet. After all, 1024 is a big chunk to count up with,
and even if get_page() calls add up to, say, 512 refs on a page, it's still
just a false positive on page_dma_pinned(). And false positives, if transient,
are OK.

3. It would be nice if I could reproduce this. I have a two-node mlx5 Infiniband
test setup, but I have done only the tiniest bit of user space IB coding, so
if you have any test programs that aren't too hard to deal with that could
possibly hit this, or be tweaked to hit it, I'd be grateful. Keeping in mind
that I'm not an advanced IB programmer. At all. :)

4. (minor note to self) This also uncovers a minor weakness in diagnostics:
there's no page dump in these reports, because I chickened out and didn't
include my WARN_ONCE_PAGE() macro that would have provided it. Although,
even without it, it's obvious that this is a page overflow.


thanks,
--
John Hubbard
NVIDIA




  108 static __maybe_unused struct page *try_grab_compound_head(struct page 
*page,
  109   int refs,
  110   unsigned int 
flags)
  111 {
  112 if (flags & FOLL_GET)
  113 return try_get_compound_head(page, refs);
  114 else if (flags & FOLL_PIN)
  115 return try_pin_compound_head(page, refs);
  116
  117 WARN_ON_ONCE(1);
  118 return NULL;
  119 }

# (master) $ dmesg
[10924.70] mlx5_core :00:08.0 eth2: Link up
[10924.725383] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
[10960.902254] [ cut here ]
[10960.905614] WARNING: CPU: 3 PID: 8838 at mm/gup.c:61 
try_grab_compound_head+0x92/0xd0
[10960.907313] Modules linked in: nfsv3 nfs_acl rpcsec_gss_krb5 auth_rpcgss 
nfsv4 dns_resolver nfs lockd grace fscache ib_isert iscsi_target_mod ib_srpt 
target_core_mod ib_srp rpcrdma rdma_ucm ib_iser ib_umad rdma_cm ib_ipoib iw_cm 
ib_cm mlx5_ib ib_uverbs ib_core kvm_intel mlx5_core rfkill mlxfw sunrpc 
virtio_net pci_hyperv_intf kvm irqbypass net_failover crc32_pclmul i2c_piix4 
ptp crc32c_intel failover pcspkr ghash_clmulni_intel i2c_core pps_core 
sch_fq_codel ip_tables ata_generic pata_acpi serio_raw ata_piix floppy [last 
unloaded: mlxkvl]
[10960.917806] CPU: 3 PID: 8838 Comm: consume_mtts Tainted: G   OE 
5.5.0-rc2-for-upstream-perf-2019-12-18_10-06-50-78 #1
[10960.920530] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 
1.10.2-1ubuntu1 04/01/2014
[10960.923024] RIP: 0010:try_grab_compound_head+0x92/0xd0
[10960.924329] Code: e4 8d 14 06 48 8d 4f 34 f0 0f b1 57 34 0f 94 c2 84 d2 75 cb 85 
c0 74 cd 8d 14 06 f0 0f b1 11 0f 94 c2 84 

Re: [PATCH 5/5] drm/msm/a6xx: Add support for using system cache(LLC)

2019-12-19 Thread Jordan Crouse
On Thu, Dec 19, 2019 at 12:58:15PM -0700, Jordan Crouse wrote:
> On Thu, Dec 19, 2019 at 06:44:46PM +0530, Sharat Masetty wrote:




> > +
> > +   /*
> > +* CNTL1 is used to specify SCID for (CP, TP, VFD, CCU and UBWC
> > +* FLAG cache) GPU blocks. This value will be passed along with
> > +* the address for any memory transaction from GPU to identify
> > +* the sub-cache for that transaction.
> > +*/
> > +   if (!IS_ERR(llc->gpu_llc_slice)) {
> > +   u32 gpu_scid = llcc_get_slice_id(llc->gpu_llc_slice);
> > +   int i;
> > +
> > +   for (i = 0; i < A6XX_LLC_NUM_GPU_SCIDS; i++)
> > +   llc->cntl1_regval |=
> > +   gpu_scid << (A6XX_GPU_LLC_SCID_NUM_BITS * i);
> 
> As above, i'm not sure a loop is better than just:
> 
> gpu_scid &= 0x1f;
> 
> llc->cntl1_regval = (gpu_scid << 0) || (gpu_scid << 5) | (gpu_scid << 10)
>  | (gpu_scid << 15) | (gpu_scid << 20);
> 
> And I'm not even sure we need do this math here in the first place.

One more question - can you get a valid slice id before activation?



Jordan

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Re: [PATCH 5/5] drm/msm/a6xx: Add support for using system cache(LLC)

2019-12-19 Thread Jordan Crouse
On Thu, Dec 19, 2019 at 06:44:46PM +0530, Sharat Masetty wrote:
> The last level system cache can be partitioned to 32 different slices
> of which GPU has two slices preallocated. One slice is used for caching GPU
> buffers and the other slice is used for caching the GPU SMMU pagetables.
> This patch talks to the core system cache driver to acquire the slice handles,
> configure the SCID's to those slices and activates and deactivates the slices
> upon GPU power collapse and restore.
> 
> Some support from the IOMMU driver is also needed to make use of the
> system cache. IOMMU_QCOM_SYS_CACHE is a buffer protection flag which enables
> caching GPU data buffers in the system cache with memory attributes such
> as outer cacheable, read-allocate, write-allocate for buffers. The GPU
> then has the ability to override a few cacheability parameters which it
> does to override write-allocate to write-no-allocate as the GPU hardware
> does not benefit much from it.
> 
> Similarly DOMAIN_ATTR_QCOM_SYS_CACHE is another domain level attribute
> used by the IOMMU driver to set the right attributes to cache the hardware
> pagetables into the system cache.
> 
> Signed-off-by: Sharat Masetty 
> ---
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 122 
> +-
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.h |   9 +++
>  drivers/gpu/drm/msm/msm_iommu.c   |  13 
>  drivers/gpu/drm/msm/msm_mmu.h |   3 +
>  4 files changed, 146 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index faff6ff..0c7fdee 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -9,6 +9,7 @@
>  #include "a6xx_gmu.xml.h"
> 
>  #include 
> +#include 
> 
>  #define GPU_PAS_ID 13
> 
> @@ -781,6 +782,117 @@ static void a6xx_bus_clear_pending_transactions(struct 
> adreno_gpu *adreno_gpu)
>   gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0);
>  }
> 
> +#define A6XX_LLC_NUM_GPU_SCIDS   5
> +#define A6XX_GPU_LLC_SCID_NUM_BITS   5

As I mention below, I'm not sure if we need these 

> +#define A6XX_GPU_LLC_SCID_MASK \
> + ((1 << (A6XX_LLC_NUM_GPU_SCIDS * A6XX_GPU_LLC_SCID_NUM_BITS)) - 1)
> +
> +#define A6XX_GPUHTW_LLC_SCID_SHIFT   25
> +#define A6XX_GPUHTW_LLC_SCID_MASK \
> + (((1 << A6XX_GPU_LLC_SCID_NUM_BITS) - 1) << A6XX_GPUHTW_LLC_SCID_SHIFT)
> +

Normally these go into the envytools regmap but if we're going to do these guys
lets use the power of  for good.

#define A6XX_GPU_LLC_SCID GENMASK(24, 0)
#define A6XX_GPUHTW_LLC_SCID GENMASK(29, 25)

> +static inline void a6xx_gpu_cx_rmw(struct a6xx_llc *llc,

Don't mark C functions as inline - let the compiler figure it out for you.

> + u32 reg, u32 mask, u32 or)
> +{
> + msm_rmw(llc->mmio + (reg << 2), mask, or);
> +}
> +
> +static void a6xx_llc_deactivate(struct a6xx_llc *llc)
> +{
> + llcc_slice_deactivate(llc->gpu_llc_slice);
> + llcc_slice_deactivate(llc->gpuhtw_llc_slice);
> +}
> +
> +static void a6xx_llc_activate(struct a6xx_llc *llc)
> +{
> + if (!llc->mmio)
> + return;
> +
> + /* Program the sub-cache ID for all GPU blocks */
> + if (!llcc_slice_activate(llc->gpu_llc_slice))
> + a6xx_gpu_cx_rmw(llc,
> + REG_A6XX_CX_MISC_SYSTEM_CACHE_CNTL_1,
> + A6XX_GPU_LLC_SCID_MASK,
> + (llc->cntl1_regval &
> +  A6XX_GPU_LLC_SCID_MASK));

This is out of order with the comments below, but if we store the slice id then
you could calculate regval here and not have to store it.

> +
> + /* Program the sub-cache ID for the GPU pagetables */
> + if (!llcc_slice_activate(llc->gpuhtw_llc_slice))

val |= FIELD_SET(A6XX_GPUHTW_LLC_SCID, htw_llc_sliceid);

> + a6xx_gpu_cx_rmw(llc,
> + REG_A6XX_CX_MISC_SYSTEM_CACHE_CNTL_1,
> + A6XX_GPUHTW_LLC_SCID_MASK,
> + (llc->cntl1_regval &
> +  A6XX_GPUHTW_LLC_SCID_MASK));

And this could be FIELD_SET(A6XX_GPUHTW_LLC_SCID, sliceid);

In theory you could just calculate the u32 and write it directly without a rmw.
In fact, that might be preferable - if the slice activate failed, you don't want
to run the risk that the scid for htw is still populated.

> +
> + /* Program cacheability overrides */
> + a6xx_gpu_cx_rmw(llc, REG_A6XX_CX_MISC_SYSTEM_CACHE_CNTL_0, 0xF,
> + llc->cntl0_regval);

As below, this could easily be a constant.

> +}
> +
> +static void a6xx_llc_slices_destroy(struct a6xx_llc *llc)
> +{
> + if (llc->mmio)
> + iounmap(llc->mmio);

msm_ioremap returns a devm_ managed resource, so do not use iounmap() to free
it. Bets to just leave it and let the gpu device handle it when it goes boom.

> +
> + llcc_slice_putd(llc->gpu_llc_slice);
> + 

Re: [PATCH v4 3/5] dt-bindings: display: ti, j721e-dss: Add dt-schema yaml binding

2019-12-19 Thread Jyri Sarha
On 19/12/2019 16:01, Jyri Sarha wrote:
> On 19/12/2019 10:38, Maxime Ripard wrote:
>> Hi,
>>
>> On Thu, Dec 19, 2019 at 10:23:17AM +0200, Jyri Sarha wrote:
>>> Add dt-schema yaml bindig for J721E DSS, J721E version TI Keystone
>>> Display SubSystem.
>>>
>>> Version history:
>>>
>>> v2: no change
>>>
>>> v3: - reg-names: "wp" -> "wb"
>>> - Add ports node
>>> - Add includes to dts example
>>> - reindent dts example
>>>
>>> v4: - Add descriptions to reg, clocks, and interrups properties
>>> - Remove minItems when its value is the same as maxItems value
>>>
>>> Signed-off-by: Jyri Sarha 
>>> ---
>>>  .../bindings/display/ti/ti,j721e-dss.yaml | 209 ++
>>>  1 file changed, 209 insertions(+)
>>>  create mode 100644 
>>> Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml 
>>> b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
>>> new file mode 100644
>>> index ..cd68c4294f9a
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
>>> @@ -0,0 +1,209 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>> +# Copyright 2019 Texas Instruments Incorporated
>>> +%YAML 1.2
>>> +---
>>> +$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#;
>>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#;
>>> +
>>> +title: Texas Instruments J721E Display Subsystem
>>> +
>>> +maintainers:
>>> +  - Jyri Sarha 
>>> +  - Tomi Valkeinen 
>>> +
>>> +description: |
>>> +  The J721E TI Keystone Display SubSystem with four output ports and
>>> +  four video planes. There is two full video planes and two "lite
>>> +  planes" without scaling support. The video ports can be connected to
>>> +  the SoC's DPI pins or to integrated display bridges on the SoC.
>>> +
>>> +properties:
>>> +  compatible:
>>> +const: ti,j721e-dss
>>> +
>>> +  reg:
>>> +maxItems: 17
>>> +description: |
>>> +  Addresses to each DSS memory region described in the SoC's TRM.
>>> +  The reg-names refer to memory regions as follows:
>>> +  reg-names: Region Name in TRM: Description:
>>> +  common_m   DSS0_DISPC_0_COMMON_M   DSS Master common register area
>>> +  common_s0  DSS0_DISPC_0_COMMON_SO  DSS Shared common register area 0
>>> +  common_s1  DSS0_DISPC_0_COMMON_S1  DSS Shared common register area 1
>>> +  common_s2  DSS0_DISPC_0_COMMON_S2  DSS Shared common register area 2
>>> +  vidl1  DSS0_VIDL1  VIDL1 light video plane 1
>>> +  vidl2  DSS0_VIDL2  VIDL2 light video plane 2
>>> +  vid1   DSS0_VID1   VID1 video plane 1
>>> +  vid2   DSS0_VID2   VID1 video plane 2
>>> +  ovr1   DSS0_OVR1   OVR1 overlay manager for vp1
>>> +  ovr2   DSS0_OVR2   OVR2 overlay manager for vp2
>>> +  ovr3   DSS0_OVR3   OVR1 overlay manager for vp3
>>> +  ovr4   DSS0_OVR4   OVR2 overlay manager for vp4
>>> +  vp1DSS0_VP1VP1 video port 1
>>> +  vp2DSS0_VP2VP1 video port 2
>>> +  vp3DSS0_VP3VP1 video port 3
>>> +  vp4DSS0_VP4VP1 video port 4
>>> +  wp DSS0_WB Write Back registers
>> I guess it applies to all your schemas in that patch series, but you
>> could just do something like
>>
>> reg:
>>   items:
>> - description: DSS Master common register area
>> - description: DSS Shared common register area 0
>> - description: DSS Shared common register area 1
>>
> Ok, thanks. I was not sure if you can do that (still a newbie with
> yaml). What do you think about Peter Ujfalusi's suggestion of putting
> the descriptions to reg-names (and clock-names and  interrupt-names)?
> e.g. something like this:
> 
>   reg-names:
> items:
>   - const: common_m
>   - description: DSS Master common register area
>   - const: common_s0
>   - description: DSS Master common register area
> ...
> 
> Or is that even allowed?
> 

Hmmm, it looks like make dt_binding_check does not like that. I guess I
go with your suggestion, but with reg-name reference in the description.

Best regards,
Jyri

-- 
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Re: [PATCH][next] drm/i915: fix uninitialized pointer reads on pointers to and from

2019-12-19 Thread Chris Wilson
Quoting Colin King (2019-12-19 19:09:16)
> From: Colin Ian King 
> 
> Currently pointers to and from are not initialized and may contain
> garbage values. This will cause uninitialized pointer reads in the
> call to intel_frontbuffer_track and later checks to see if to and from
> are null.  Fix this by ensuring to and from are initialized to NULL.
> 
> Addresses-Coverity: ("Uninitialised pointer read)"
> Fixes: da42104f589d ("drm/i915: Hold reference to intel_frontbuffer as we 
> track activity")
> Signed-off-by: Colin Ian King 

"D'oh"
Reviewed-by: Chris Wilson 
-Chris
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Re: [PATCH AUTOSEL 5.4 143/350] drm/nouveau: Resume hotplug interrupts earlier

2019-12-19 Thread Sasha Levin

On Tue, Dec 10, 2019 at 04:29:54PM -0500, Lyude Paul wrote:

huh? Not sure how this got put in the stable queue, but this probably should
be dropped. this was prepatory work for some MST functionality that got added
recently, not a fix.


Dropped, thanks!

--
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Sasha
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Re: [PATCH v4 34/51] drm/omap: venc: Register a drm_bridge

2019-12-19 Thread Laurent Pinchart
Hi Tomi,

On Thu, Dec 19, 2019 at 01:41:47PM +0200, Tomi Valkeinen wrote:
> On 19/12/2019 12:45, Laurent Pinchart wrote:
> > In order to integrate with a chain of drm_bridge, the internal VENC
> > encoder has to expose the mode valid, fixup and set, the enable and
> > disable and the get modes operations through the drm_bridge API.
> > Register a bridge at initialisation time to do so.
> > 
> > Most of those operations are removed from the omap_dss_device as they
> > are now called through the drm_bridge API by the DRM atomic helpers. The
> > only exception is the .get_modes() operation that is still invoked
> > through the omap_dss_device-based pipeline.
> > 
> > For the time being make the next bridge in the chain optional as the
> > VENC output is still based on omap_dss_device. The create_connector
> > argument to the bridge attach function is also ignored for the same
> > reason. This will be changed later when removing the related
> > omapdrm-specific display drivers.
> > 
> > Signed-off-by: Laurent Pinchart 
> > Reviewed-by: Tomi Valkeinen 
> > ---
> 
> Something with venc is different than without your series.
> 
> I have beagleboard xm, with both DVI and s-video connected. With and without 
> your series, kmsprint shows:
> 
> Connector 0 (45) DVI-D-1 (connected)
>   Encoder 0 (44) TMDS
> Crtc 0 (47) 1920x1200 154.000 1920/48/32/80 1200/3/6/26 60 (59.95)
>   Plane 0 (32) fb-id: 51 (crtcs: 0 1) 0,0 1920x1200 -> 0,0 1920x1200 
> (RX12 AR12 RG16 XR24 RG24 AR24 RA24 RX24)
> FB 51 1920x1200
> Connector 1 (48) S-Video-1 (unknown)
>   Encoder 1 (46) TMDS
> 
> Without your series:
> 
> # ./kmstest -c s-video
> Connector 1/@48: S-Video-1
>   Crtc 1/@49: 720x574i@50.00 13.500 720/12/64/68/- 574/5/5/41/- 50 (50.00) 
> 0x1a 0x48
>   Plane 0/@32: 0,0-720x574
> Fb 53 720x574-XR24
> press enter to exit
> 
> and I have a picture on the display.
> 
> With your series:
> 
> # ./kmstest -c s-video
> terminate called after throwing an instance of 'std::invalid_argument'
>   what():  no modes available

:-S Do you plan to bisect this, or should I give it a go ?

> To be honest, I'm not quite sure how an unknown-connection output
> should work (maybe kmstest doesn't handle it right), but the behavior
> is different.

-- 
Regards,

Laurent Pinchart
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Re: [PATCH 4/5] drm/msm: Pass mmu features to generic layers

2019-12-19 Thread Jordan Crouse
On Thu, Dec 19, 2019 at 06:44:45PM +0530, Sharat Masetty wrote:
> Allow different Adreno targets the ability to pass
> specific mmu features to the generic layers. This will
> help conditionally configure certain iommu features for
> certain Adreno targets.
> 
> Also Add a few simple support functions to support a bitmask of
> features that a specific MMU implementation supports.

This whole change could benefit from [1] which makes the address space
creation target specific.

That would get rid of most of the blobs. Further more, if you took part of [2]
that set up the mmu inside of the target specific code (skipping over the
SPLIT_PAGETABLE stuff for now) you could set mmu->features directly and not need
a helper function to do it.

[1] https://patchwork.freedesktop.org/patch/342170/
[2] https://patchwork.freedesktop.org/patch/342173/

Jordan

> Signed-off-by: Sharat Masetty 
> ---
>  drivers/gpu/drm/msm/adreno/a2xx_gpu.c   |  2 +-
>  drivers/gpu/drm/msm/adreno/a3xx_gpu.c   |  2 +-
>  drivers/gpu/drm/msm/adreno/a4xx_gpu.c   |  2 +-
>  drivers/gpu/drm/msm/adreno/a5xx_gpu.c   |  2 +-
>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c   |  2 +-
>  drivers/gpu/drm/msm/adreno/adreno_gpu.c |  4 +++-
>  drivers/gpu/drm/msm/adreno/adreno_gpu.h |  2 +-
>  drivers/gpu/drm/msm/msm_gpu.c   |  6 --
>  drivers/gpu/drm/msm/msm_gpu.h   |  1 +
>  drivers/gpu/drm/msm/msm_mmu.h   | 11 +++
>  10 files changed, 25 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
> index 1f83bc1..bbac43c 100644
> --- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
> @@ -472,7 +472,7 @@ struct msm_gpu *a2xx_gpu_init(struct drm_device *dev)
>  
>   adreno_gpu->reg_offsets = a2xx_register_offsets;
>  
> - ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
> + ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
>   if (ret)
>   goto fail;
>  
> diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
> index 5f7e980..63448fb 100644
> --- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
> @@ -488,7 +488,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
>   adreno_gpu->registers = a3xx_registers;
>   adreno_gpu->reg_offsets = a3xx_register_offsets;
>  
> - ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
> + ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
>   if (ret)
>   goto fail;
>  
> diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
> index ab2b752..90ae26d 100644
> --- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
> @@ -572,7 +572,7 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
>   adreno_gpu->registers = a4xx_registers;
>   adreno_gpu->reg_offsets = a4xx_register_offsets;
>  
> - ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
> + ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
>   if (ret)
>   goto fail;
>  
> diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> index 99cd6e6..a51ed2e 100644
> --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
> @@ -1445,7 +1445,7 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
>  
>   check_speed_bin(>dev);
>  
> - ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 4);
> + ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 4, 0);
>   if (ret) {
>   a5xx_destroy(&(a5xx_gpu->base.base));
>   return ERR_PTR(ret);
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
> b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> index daf0780..faff6ff 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
> @@ -924,7 +924,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
>   adreno_gpu->registers = NULL;
>   adreno_gpu->reg_offsets = a6xx_register_offsets;
>  
> - ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
> + ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
>   if (ret) {
>   a6xx_destroy(&(a6xx_gpu->base.base));
>   return ERR_PTR(ret);
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
> b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> index 048c8be..7dade16 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> @@ -895,7 +895,8 @@ static int adreno_get_pwrlevels(struct device *dev,
>  
>  int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
>   struct adreno_gpu *adreno_gpu,
> - const struct adreno_gpu_funcs *funcs, int nr_rings)
> + const struct adreno_gpu_funcs *funcs, int nr_rings,
> + u32 mmu_features)
>  {
>   struct adreno_platform_config 

[PATCH][next] drm/i915: fix uninitialized pointer reads on pointers to and from

2019-12-19 Thread Colin King
From: Colin Ian King 

Currently pointers to and from are not initialized and may contain
garbage values. This will cause uninitialized pointer reads in the
call to intel_frontbuffer_track and later checks to see if to and from
are null.  Fix this by ensuring to and from are initialized to NULL.

Addresses-Coverity: ("Uninitialised pointer read)"
Fixes: da42104f589d ("drm/i915: Hold reference to intel_frontbuffer as we track 
activity")
Signed-off-by: Colin Ian King 
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c 
b/drivers/gpu/drm/i915/display/intel_overlay.c
index 6097594468a9..e869a3d86522 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -279,7 +279,7 @@ static void intel_overlay_flip_prepare(struct intel_overlay 
*overlay,
   struct i915_vma *vma)
 {
enum pipe pipe = overlay->crtc->pipe;
-   struct intel_frontbuffer *from, *to;
+   struct intel_frontbuffer *from = NULL, *to = NULL;
 
WARN_ON(overlay->old_vma);
 
-- 
2.24.0

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[PATCH 5.4 71/80] drm/dp_mst: Correct the bug in drm_dp_update_payload_part1()

2019-12-19 Thread Greg Kroah-Hartman
From: Wayne Lin 

commit e5a6ca27eb72c67533ddfc11c06df84beaa167fa upstream.

[Why]
If the payload_state is DP_PAYLOAD_DELETE_LOCAL in series, current
code doesn't delete the payload at current index and just move the
index to next one after shuffling payloads.

[How]
Drop the i++ increasing part in for loop head and decide whether
to increase the index or not according to payload_state of current
payload.

Changes since v1:
* Refine the code to have it easy reading
* Amend the commit message to meet the way code is modified now.

Signed-off-by: Wayne Lin 
Reviewed-by: Lyude Paul 
Fixes: 706246c761dd ("drm/dp_mst: Refactor drm_dp_update_payload_part1()")
Cc: Daniel Vetter 
Cc: Juston Li 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: Sean Paul 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.1+
[Added cc for stable]
Signed-off-by: Lyude Paul 
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191203042423.5961-1-wayne@amd.com
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/drm_dp_mst_topology.c |6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2465,9 +2465,11 @@ int drm_dp_update_payload_part1(struct d
drm_dp_mst_topology_put_port(port);
}
 
-   for (i = 0; i < mgr->max_payloads; i++) {
-   if (mgr->payloads[i].payload_state != DP_PAYLOAD_DELETE_LOCAL)
+   for (i = 0; i < mgr->max_payloads; /* do nothing */) {
+   if (mgr->payloads[i].payload_state != DP_PAYLOAD_DELETE_LOCAL) {
+   i++;
continue;
+   }
 
DRM_DEBUG_KMS("removing payload %d\n", i);
for (j = i; j < mgr->max_payloads - 1; j++) {


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[PATCH 5.4 46/80] drm/mgag200: Extract device type from flags

2019-12-19 Thread Greg Kroah-Hartman
From: Thomas Zimmermann 

commit 3a8a5aba142a44eaeba0cb0ec1b4a8f177b5e59a upstream.

Adds a conversion function that extracts the device type from the
PCI id-table flags. Allows for storing additional information in the
other flag bits.

Signed-off-by: Thomas Zimmermann 
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap + 
unpin")
Reviewed-by: Daniel Vetter 
Cc: John Donnelly 
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: Emil Velikov 
Cc: "Y.C. Chen" 
Cc: Laurent Pinchart 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191126101529.20356-2-tzimmerm...@suse.de
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |7 +++
 drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -159,6 +159,8 @@ enum mga_type {
G200_EW3,
 };
 
+#define MGAG200_TYPE_MASK  (0x00ff)
+
 #define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
 
 struct mga_device {
@@ -188,6 +190,11 @@ struct mga_device {
u32 unique_rev_id;
 };
 
+static inline enum mga_type
+mgag200_type_from_driver_data(kernel_ulong_t driver_data)
+{
+   return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
+}
/* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
 void mgag200_modeset_fini(struct mga_device *mdev);
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -94,7 +94,7 @@ static int mgag200_device_init(struct dr
struct mga_device *mdev = dev->dev_private;
int ret, option;
 
-   mdev->type = flags;
+   mdev->type = mgag200_type_from_driver_data(flags);
 
/* Hardcode the number of CRTCs to 1 */
mdev->num_crtc = 1;


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[PATCH 5.4 48/80] drm/mgag200: Add workaround for HW that does not support startadd

2019-12-19 Thread Greg Kroah-Hartman
From: Thomas Zimmermann 

commit 1591fadf857cdbaf2baa55e421af99a61354713c upstream.

There's at least one system that does not interpret the value of
the device's 'startadd' field correctly, which leads to incorrectly
displayed scanout buffers. Always placing the active scanout buffer
at offset 0 works around the problem.

Signed-off-by: Thomas Zimmermann 
Reported-by: John Donnelly 
Tested-by: John Donnelly 
Reviewed-by: Daniel Vetter 
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap + 
unpin")
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: "Y.C. Chen" 
Cc: Neil Armstrong 
Cc: Thomas Gleixner 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Link: https://gitlab.freedesktop.org/drm/misc/issues/7
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191126101529.20356-4-tzimmerm...@suse.de
[drop debugfs_init callback - gregkh]
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.c |   35 +-
 drivers/gpu/drm/mgag200/mgag200_drv.h |3 ++
 2 files changed, 37 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -30,6 +30,8 @@ module_param_named(modeset, mgag200_mode
 static struct drm_driver driver;
 
 static const struct pci_device_id pciidlist[] = {
+   { PCI_VENDOR_ID_MATROX, 0x522, PCI_VENDOR_ID_SUN, 0x4852, 0, 0,
+   G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
{ PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A 
},
{ PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B 
},
{ PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
@@ -63,6 +65,35 @@ static const struct file_operations mgag
DRM_VRAM_MM_FILE_OPERATIONS
 };
 
+static bool mgag200_pin_bo_at_0(const struct mga_device *mdev)
+{
+   return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD;
+}
+
+int mgag200_driver_dumb_create(struct drm_file *file,
+  struct drm_device *dev,
+  struct drm_mode_create_dumb *args)
+{
+   struct mga_device *mdev = dev->dev_private;
+   unsigned long pg_align;
+
+   if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
+   return -EINVAL;
+
+   pg_align = 0ul;
+
+   /*
+* Aligning scanout buffers to the size of the video ram forces
+* placement at offset 0. Works around a bug where HW does not
+* respect 'startadd' field.
+*/
+   if (mgag200_pin_bo_at_0(mdev))
+   pg_align = PFN_UP(mdev->mc.vram_size);
+
+   return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
+pg_align, false, args);
+}
+
 static struct drm_driver driver = {
.driver_features = DRIVER_GEM | DRIVER_MODESET,
.load = mgag200_driver_load,
@@ -74,7 +105,9 @@ static struct drm_driver driver = {
.major = DRIVER_MAJOR,
.minor = DRIVER_MINOR,
.patchlevel = DRIVER_PATCHLEVEL,
-   DRM_GEM_VRAM_DRIVER
+   .dumb_create = mgag200_driver_dumb_create,
+   .dumb_map_offset = drm_gem_vram_driver_dumb_mmap_offset,
+   .gem_prime_mmap = drm_gem_prime_mmap,
 };
 
 static struct pci_driver mgag200_pci_driver = {
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -159,6 +159,9 @@ enum mga_type {
G200_EW3,
 };
 
+/* HW does not handle 'startadd' field correct. */
+#define MGAG200_FLAG_HW_BUG_NO_STARTADD(1ul << 8)
+
 #define MGAG200_TYPE_MASK  (0x00ff)
 #define MGAG200_FLAG_MASK  (0x0000)
 


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[PATCH 5.4 47/80] drm/mgag200: Store flags from PCI driver data in device structure

2019-12-19 Thread Greg Kroah-Hartman
From: Thomas Zimmermann 

commit d6d437d97d54c85a1a93967b2745e31dff03365a upstream.

The flags field in struct mga_device has been unused so far. We now
use it to store flag bits from the PCI driver.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Daniel Vetter 
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap + 
unpin")
Cc: John Donnelly 
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: "Y.C. Chen" 
Cc: Neil Armstrong 
Cc: Thomas Gleixner 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191126101529.20356-3-tzimmerm...@suse.de
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |8 
 drivers/gpu/drm/mgag200/mgag200_main.c |1 +
 2 files changed, 9 insertions(+)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -160,6 +160,7 @@ enum mga_type {
 };
 
 #define MGAG200_TYPE_MASK  (0x00ff)
+#define MGAG200_FLAG_MASK  (0x0000)
 
 #define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
 
@@ -195,6 +196,13 @@ mgag200_type_from_driver_data(kernel_ulo
 {
return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
 }
+
+static inline unsigned long
+mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
+{
+   return driver_data & MGAG200_FLAG_MASK;
+}
+
/* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
 void mgag200_modeset_fini(struct mga_device *mdev);
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -94,6 +94,7 @@ static int mgag200_device_init(struct dr
struct mga_device *mdev = dev->dev_private;
int ret, option;
 
+   mdev->flags = mgag200_flags_from_driver_data(flags);
mdev->type = mgag200_type_from_driver_data(flags);
 
/* Hardcode the number of CRTCs to 1 */


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[PATCH 5.4 49/80] drm/mgag200: Flag all G200 SE A machines as broken wrt

2019-12-19 Thread Greg Kroah-Hartman
From: Thomas Zimmermann 

commit 4adf0b49eea926a55fd956ef7d86750f771435ff upstream.

Several MGA G200 SE machines don't respect the value of the startadd
register field. After more feedback on affected machines, neither PCI
subvendor ID nor the internal ID seem to hint towards the bug. All
affected machines have a PCI ID of 0x0522 (i.e., G200 SE A). It was
decided to flag all G200 SE A machines as broken.

Signed-off-by: Thomas Zimmermann 
Acked-by: Gerd Hoffmann 
Fixes: 1591fadf857c ("drm/mgag200: Add workaround for HW that does not support 
'startadd'")
Cc: Thomas Zimmermann 
Cc: John Donnelly 
Cc: Daniel Vetter 
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: "Y.C. Chen" 
Cc: Neil Armstrong 
Cc: Thomas Gleixner 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Cc: Greg Kroah-Hartman 
Cc: Allison Randal 
Cc: Alex Deucher 
Cc: "Noralf Trønnes" 
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191206081901.9938-1-tzimmerm...@suse.de
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -30,9 +30,8 @@ module_param_named(modeset, mgag200_mode
 static struct drm_driver driver;
 
 static const struct pci_device_id pciidlist[] = {
-   { PCI_VENDOR_ID_MATROX, 0x522, PCI_VENDOR_ID_SUN, 0x4852, 0, 0,
+   { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
-   { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A 
},
{ PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B 
},
{ PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
{ PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB },


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Re: [PATCH v2 1/2] dt-bindings: display: DT schema for rocktech,rk101ii01d-ct panel

2019-12-19 Thread Rob Herring
On Mon, 9 Dec 2019 17:45:40 +0200, Jyri Sarha wrote:
> Add DT schema binding for Rocktech Displays Limited RK101II01D-CT
> 10.1" TFT 1280x800 Pixels with LVDS interface, LED Backlight and
> capacitive touch panel.
> 
> Signed-off-by: Jyri Sarha 
> ---
>  .../display/panel/rocktech,rk101ii01d-ct.yaml | 48 +++
>  1 file changed, 48 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/panel/rocktech,rk101ii01d-ct.yaml
> 

Reviewed-by: Rob Herring 
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Re: [PATCH] drm/todo: Updating logging todo

2019-12-19 Thread Sam Ravnborg
Hi Daniel.

On Thu, Dec 19, 2019 at 05:17:22PM +0100, Daniel Vetter wrote:
> Jani has merged a new set of logging functions, which we hope to be
> the One True solution now, pinky promises:
> 
> commit fb6c7ab8718eb2543695d77ad8302ff81e8e1e32
> Author: Jani Nikula 
> Date:   Tue Dec 10 14:30:43 2019 +0200
> 
> drm/print: introduce new struct drm_device based logging macros
> 
> Update the todo entry to match the new preference.
> 
> Cc: Jani Nikula 
> Cc: Sean Paul 
> Cc: Wambui Karuga 
> Signed-off-by: Daniel Vetter 
> ---
>  Documentation/gpu/todo.rst | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
> index 2d85f37284a1..017f3090f8a1 100644
> --- a/Documentation/gpu/todo.rst
> +++ b/Documentation/gpu/todo.rst
> @@ -142,13 +142,13 @@ Contact: Daniel Vetter, respective driver maintainers
>  
>  Level: Advanced
>  
> -Convert instances of dev_info/dev_err/dev_warn to their DRM_DEV_* equivalent
> -
> +Convert logging to drm_* functions with drm_device paramater
> +
>  
>  For drivers which could have multiple instances, it is necessary to
>  differentiate between which is which in the logs. Since DRM_INFO/WARN/ERROR
>  don't do this, drivers used dev_info/warn/err to make this differentiation. 
> We
> -now have DRM_DEV_* variants of the drm print macros, so we can start to 
> convert
> +now have drm_* variants of the drm print functions, so we can start to 
> convert
>  those drivers back to using drm-formwatted specific log messages.
s/drm-formwatted/drm-formatted/?

Acked-by: Sam Ravnborg 

drm_print.h could use a rework so it is obvious what is legacy and what
is the right way to do things.
I will add that to my personal todo list for now.

Sam
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Re: [PATCH] drm/amd/display: replace BUG_ON with WARN_ON

2019-12-19 Thread Mikita Lipski




On 12/18/19 11:15 AM, Aditya Pakki wrote:

In skip_modeset label within dm_update_crtc_state(), the dc stream
cannot be NULL. Using BUG_ON as an assertion is not required and
can be removed. The patch replaces the check with a WARN_ON in case
dm_new_crtc_state->stream is NULL.

Signed-off-by: Aditya Pakki 
---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7aac9568d3be..03cb30913c20 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7012,7 +7012,7 @@ static int dm_update_crtc_state(struct 
amdgpu_display_manager *dm,
 * 3. Is currently active and enabled.
 * => The dc stream state currently exists.
 */
-   BUG_ON(dm_new_crtc_state->stream == NULL);
+   WARN_ON(!dm_new_crtc_state->stream);
  


Thanks for the patch, but this is NAK from me since it doesn't really do 
anything to prevent it or fix it.


If the stream is NULL and it passed this far in the function then 
something really wrong has happened and the process should be stopped.


I'm currently dealing with an issue where dm_new_crtc_state->stream is 
NULL. One of the scenarios could be that driver creates stream for a 
fake sink instead of failing, that is connected over MST, and calls 
dm_update_crtc_state to enable CRTC.



/* Scaling or underscan settings */
if (is_scaling_state_different(dm_old_conn_state, dm_new_conn_state))



--
Thanks,
Mikita Lipski
Software Engineer, AMD
mikita.lip...@amd.com
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Re: [PATCH] drm/todo: Updating logging todo

2019-12-19 Thread Jani Nikula
On Thu, 19 Dec 2019, Daniel Vetter  wrote:
> Jani has merged a new set of logging functions, which we hope to be
> the One True solution now, pinky promises:
>
> commit fb6c7ab8718eb2543695d77ad8302ff81e8e1e32
> Author: Jani Nikula 
> Date:   Tue Dec 10 14:30:43 2019 +0200
>
> drm/print: introduce new struct drm_device based logging macros
>
> Update the todo entry to match the new preference.
>
> Cc: Jani Nikula 
> Cc: Sean Paul 
> Cc: Wambui Karuga 
> Signed-off-by: Daniel Vetter 

Might mention converting everything to the One True solution, but
*shrug*.

Acked-by: Jani Nikula 

> ---
>  Documentation/gpu/todo.rst | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
> index 2d85f37284a1..017f3090f8a1 100644
> --- a/Documentation/gpu/todo.rst
> +++ b/Documentation/gpu/todo.rst
> @@ -142,13 +142,13 @@ Contact: Daniel Vetter, respective driver maintainers
>  
>  Level: Advanced
>  
> -Convert instances of dev_info/dev_err/dev_warn to their DRM_DEV_* equivalent
> -
> +Convert logging to drm_* functions with drm_device paramater
> +
>  
>  For drivers which could have multiple instances, it is necessary to
>  differentiate between which is which in the logs. Since DRM_INFO/WARN/ERROR
>  don't do this, drivers used dev_info/warn/err to make this differentiation. 
> We
> -now have DRM_DEV_* variants of the drm print macros, so we can start to 
> convert
> +now have drm_* variants of the drm print functions, so we can start to 
> convert
>  those drivers back to using drm-formwatted specific log messages.
>  
>  Before you start this conversion please contact the relevant maintainers to 
> make

-- 
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[radeon-alex:drm-next 488/534] htmldocs: include/drm/gpu_scheduler.h:102: warning: Function parameter or member 'num_sched_list' not described in 'drm_sched_entity'

2019-12-19 Thread kbuild test robot
tree:   git://people.freedesktop.org/~agd5f/linux.git drm-next
head:   2236fe71fb0b404a02c9451f4966c9b754a36c9e
commit: 353522e0be7cc524c17da80e4ed66e4100f339af [488/534] drm/scheduler: 
rework entity creation
reproduce: make htmldocs

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot 

All warnings (new ones prefixed by >>):

   drivers/usb/typec/bus.c:1: warning: 'typec_altmode_register_driver' not found
   drivers/usb/typec/bus.c:1: warning: 'typec_altmode_unregister_driver' not 
found
   drivers/usb/typec/class.c:1: warning: 'typec_altmode_register_notifier' not 
found
   drivers/usb/typec/class.c:1: warning: 'typec_altmode_unregister_notifier' 
not found
   fs/posix_acl.c:647: warning: Function parameter or member 'inode' not 
described in 'posix_acl_update_mode'
   fs/posix_acl.c:647: warning: Function parameter or member 'mode_p' not 
described in 'posix_acl_update_mode'
   fs/posix_acl.c:647: warning: Function parameter or member 'acl' not 
described in 'posix_acl_update_mode'
   include/linux/regulator/machine.h:196: warning: Function parameter or member 
'max_uV_step' not described in 'regulation_constraints'
   include/linux/regulator/driver.h:223: warning: Function parameter or member 
'resume' not described in 'regulator_ops'
   sound/soc/soc-core.c:2509: warning: Function parameter or member 
'legacy_dai_naming' not described in 'snd_soc_register_dai'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'dev_scratch' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 'list' not 
described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'ip_defrag_offset' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'skb_mstamp_ns' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'__cloned_offset' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'head_frag' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'__pkt_type_offset' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'encapsulation' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'encap_hdr_csum' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'csum_valid' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'__pkt_vlan_present_offset' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'vlan_present' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'csum_complete_sw' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'csum_level' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'inner_protocol_type' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'remcsum_offload' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'sender_cpu' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'reserved_tailroom' not described in 'sk_buff'
   include/linux/skbuff.h:888: warning: Function parameter or member 
'inner_ipproto' not described in 'sk_buff'
   include/net/sock.h:232: warning: Function parameter or member 'skc_addrpair' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 'skc_portpair' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 'skc_ipv6only' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 
'skc_net_refcnt' not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 'skc_v6_daddr' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 
'skc_v6_rcv_saddr' not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 'skc_cookie' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 'skc_listener' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 'skc_tw_dr' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 'skc_rcv_wnd' 
not described in 'sock_common'
   include/net/sock.h:232: warning: Function parameter or member 
'skc_tw_rcv_nxt' not described in 'sock_common'
   include/net/sock.h:514: warning: Function parameter or member 
'sk_rx_skb_cache' not described in 'sock'
   include/net/sock.h:514: warning: Function parameter or member 'sk_wq_raw' 
not 

[Bug 205915] AMDGPU: Screen flicker after resume from suspend

2019-12-19 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=205915

--- Comment #2 from onil (o...@pm.me) ---
Created attachment 286367
  --> https://bugzilla.kernel.org/attachment.cgi?id=286367=edit
dmesg after resume from suspend

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Re: Proposal to report GPU private memory allocations with sysfs nodes [plain text version]

2019-12-19 Thread Rohan Garg
Hey

> Is it reasonable to add another ioctl or something equivalent to label
> a BO with what PID makes the allocation? When the BO gets shared to
> other processes, this information also needs to be bookkept somewhere
> for tracking. Basically I wonder if it's possible for upstream to
> track BOs in a similar way Android tracks dmabuf. Then there's a node
> implemented by cgroup in proc listing all the BOs per process with
> information like label, refcount, etc. Then Android GPU vendors can
> implement the same nodes which is going to be compatible even if they
> later adopts drm subsystem.
> 
> So my sketch idea for the nodes are:
> (1) /proc/gpu0_meminfo, /proc/gpu1_meminfo
> This is a list of all BOs with pids holding a reference to it and the
> current label of each BO
> (2) /proc//gpu0_meminfo, /proc//gpu1_meminfo
> This is a list of all BOs this process holds a reference to.
> (3) Is it reasonable to implement another nodes for {total,
> total_unmapped} counters? or just surface through /proc/meminfo?
> 

This would be tricky to implement because:

(1) PID's are not unique, PID namespaces allow linux userspace to potentially 
share the same PID.

(2) Specifically in the case of mesa, there isn't a way to (AFAIK) associate a 
BO with a PID.

Cheers
Rohan Garg


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[PATCH] drm/todo: Updating logging todo

2019-12-19 Thread Daniel Vetter
Jani has merged a new set of logging functions, which we hope to be
the One True solution now, pinky promises:

commit fb6c7ab8718eb2543695d77ad8302ff81e8e1e32
Author: Jani Nikula 
Date:   Tue Dec 10 14:30:43 2019 +0200

drm/print: introduce new struct drm_device based logging macros

Update the todo entry to match the new preference.

Cc: Jani Nikula 
Cc: Sean Paul 
Cc: Wambui Karuga 
Signed-off-by: Daniel Vetter 
---
 Documentation/gpu/todo.rst | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
index 2d85f37284a1..017f3090f8a1 100644
--- a/Documentation/gpu/todo.rst
+++ b/Documentation/gpu/todo.rst
@@ -142,13 +142,13 @@ Contact: Daniel Vetter, respective driver maintainers
 
 Level: Advanced
 
-Convert instances of dev_info/dev_err/dev_warn to their DRM_DEV_* equivalent
-
+Convert logging to drm_* functions with drm_device paramater
+
 
 For drivers which could have multiple instances, it is necessary to
 differentiate between which is which in the logs. Since DRM_INFO/WARN/ERROR
 don't do this, drivers used dev_info/warn/err to make this differentiation. We
-now have DRM_DEV_* variants of the drm print macros, so we can start to convert
+now have drm_* variants of the drm print functions, so we can start to convert
 those drivers back to using drm-formwatted specific log messages.
 
 Before you start this conversion please contact the relevant maintainers to 
make
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[Bug 205915] AMDGPU: Screen flicker after resume from suspend

2019-12-19 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=205915

Alex Deucher (alexdeuc...@gmail.com) changed:

   What|Removed |Added

 CC||alexdeuc...@gmail.com

--- Comment #1 from Alex Deucher (alexdeuc...@gmail.com) ---
Please attach your xorg log (if using X) and dmesg output.

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[Bug 205915] New: AMDGPU: Screen flicker after resume from suspend

2019-12-19 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=205915

Bug ID: 205915
   Summary: AMDGPU: Screen flicker after resume from suspend
   Product: Drivers
   Version: 2.5
Kernel Version: 5.5.0-rc2
  Hardware: x86-64
OS: Linux
  Tree: Fedora
Status: NEW
  Severity: normal
  Priority: P1
 Component: Video(DRI - non Intel)
  Assignee: drivers_video-...@kernel-bugs.osdl.org
  Reporter: o...@pm.me
Regression: No

After resume from suspend screen flickers, flickering intensifies during mouse
movement. reverting to 5.4 fixes the issue.

workaround: changing dpm_force_performance_level to "high" (and optionally
afterwards to "low") resolves the issue while "auto" introduces it again.

OS: Fedora 31 on gnome wayland
GPU: 5700XT Pulse
Monitor: LG 27UK650W on DP 1.4
Mesa: 19.3

no info/error message on syslog.

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Re: [PATCH][next] drm/gma500: fix null dereference of pointer fb before null check

2019-12-19 Thread Patrik Jakobsson
On Mon, Dec 16, 2019 at 5:21 PM Colin King  wrote:
>
> From: Colin Ian King 
>
> Pointer fb is being dereferenced when assigning dev before it
> is null checked.  Fix this by only dereferencing dev after the
> null check.

Applied to drm-misc-next

Thanks
Patrik

>
> Fixes: 6b7ce2c4161a ("drm/gma500: Remove struct psb_fbdev")
> Signed-off-by: Colin Ian King 
> ---
>  drivers/gpu/drm/gma500/accel_2d.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/gma500/accel_2d.c 
> b/drivers/gpu/drm/gma500/accel_2d.c
> index b9e5a38632f7..adc0507545bf 100644
> --- a/drivers/gpu/drm/gma500/accel_2d.c
> +++ b/drivers/gpu/drm/gma500/accel_2d.c
> @@ -228,8 +228,8 @@ static void psbfb_copyarea_accel(struct fb_info *info,
>  {
> struct drm_fb_helper *fb_helper = info->par;
> struct drm_framebuffer *fb = fb_helper->fb;
> -   struct drm_device *dev = fb->dev;
> -   struct drm_psb_private *dev_priv = dev->dev_private;
> +   struct drm_device *dev;
> +   struct drm_psb_private *dev_priv;
> uint32_t offset;
> uint32_t stride;
> uint32_t src_format;
> @@ -238,6 +238,8 @@ static void psbfb_copyarea_accel(struct fb_info *info,
> if (!fb)
> return;
>
> +   dev = fb->dev;
> +   dev_priv = dev->dev_private;
> offset = to_gtt_range(fb->obj[0])->offset;
> stride = fb->pitches[0];
>
> --
> 2.24.0
>
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Re: [PATCH 4/8] drm/gem-fb-helper: convert to drm device based logging

2019-12-19 Thread Jani Nikula
On Tue, 17 Dec 2019, Sam Ravnborg  wrote:
> On Tue, Dec 10, 2019 at 02:30:46PM +0200, Jani Nikula wrote:
>> Prefer drm_dbg_kms() and drm_err() over all other logging.
>> 
>> Signed-off-by: Jani Nikula 
> Reviewed-by: Sam Ravnborg 

Thanks for the review, pushed up to this patch.

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/drm_gem_framebuffer_helper.c | 5 ++---
>>  1 file changed, 2 insertions(+), 3 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/drm_gem_framebuffer_helper.c 
>> b/drivers/gpu/drm/drm_gem_framebuffer_helper.c
>> index b9bcd310ca2d..3a7ace19a902 100644
>> --- a/drivers/gpu/drm/drm_gem_framebuffer_helper.c
>> +++ b/drivers/gpu/drm/drm_gem_framebuffer_helper.c
>> @@ -74,8 +74,7 @@ drm_gem_fb_alloc(struct drm_device *dev,
>>  
>>  ret = drm_framebuffer_init(dev, fb, funcs);
>>  if (ret) {
>> -DRM_DEV_ERROR(dev->dev, "Failed to init framebuffer: %d\n",
>> -  ret);
>> +drm_err(dev, "Failed to init framebuffer: %d\n", ret);
>>  kfree(fb);
>>  return ERR_PTR(ret);
>>  }
>> @@ -160,7 +159,7 @@ drm_gem_fb_create_with_funcs(struct drm_device *dev, 
>> struct drm_file *file,
>>  
>>  objs[i] = drm_gem_object_lookup(file, mode_cmd->handles[i]);
>>  if (!objs[i]) {
>> -DRM_DEBUG_KMS("Failed to lookup GEM object\n");
>> +drm_dbg_kms(dev, "Failed to lookup GEM object\n");
>>  ret = -ENOENT;
>>  goto err_gem_object_put;
>>  }
>> -- 
>> 2.20.1
>> 
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Re: [PATCH next] drm/amd/display: make non-global functions static

2019-12-19 Thread Harry Wentland
On 2019-12-19 6:55 a.m., Chen Zhou wrote:
> Fix sparse warning:
> 
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c:964:5:
>   warning: symbol 'shift_border_left_to_dst' was not declared. Should it 
> be static?
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c:975:6:
>   warning: symbol 'restore_border_left_from_dst' was not declared. Should 
> it be static?
> 
> Fixes: 89d07b662f5e (drm/amd/display: fix 270 degree rotation for mixed-SLS 
> mode)
> Reported-by: Hulk Robot 
> Signed-off-by: Chen Zhou 

Reviewed-by: Harry Wentland 

Harry

> ---
>  drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c 
> b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> index 64a0e08f..5843c16 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
> @@ -961,7 +961,7 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx 
> *pipe_ctx)
>   * We also need to make sure pipe_ctx->plane_res.scl_data.h_active uses the
>   * original h_border_left value in its calculation.
>   */
> -int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx)
> +static int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx)
>  {
>   int store_h_border_left = pipe_ctx->stream->timing.h_border_left;
>  
> @@ -972,7 +972,7 @@ int shift_border_left_to_dst(struct pipe_ctx *pipe_ctx)
>   return store_h_border_left;
>  }
>  
> -void restore_border_left_from_dst(struct pipe_ctx *pipe_ctx,
> +static void restore_border_left_from_dst(struct pipe_ctx *pipe_ctx,
>int store_h_border_left)
>  {
>   pipe_ctx->stream->dst.x -= store_h_border_left;
> 
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Re: [PATCH v4 3/5] dt-bindings: display: ti, j721e-dss: Add dt-schema yaml binding

2019-12-19 Thread Jyri Sarha
On 19/12/2019 10:38, Maxime Ripard wrote:
> Hi,
> 
> On Thu, Dec 19, 2019 at 10:23:17AM +0200, Jyri Sarha wrote:
>> Add dt-schema yaml bindig for J721E DSS, J721E version TI Keystone
>> Display SubSystem.
>>
>> Version history:
>>
>> v2: no change
>>
>> v3: - reg-names: "wp" -> "wb"
>> - Add ports node
>> - Add includes to dts example
>> - reindent dts example
>>
>> v4: - Add descriptions to reg, clocks, and interrups properties
>> - Remove minItems when its value is the same as maxItems value
>>
>> Signed-off-by: Jyri Sarha 
>> ---
>>  .../bindings/display/ti/ti,j721e-dss.yaml | 209 ++
>>  1 file changed, 209 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml 
>> b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
>> new file mode 100644
>> index ..cd68c4294f9a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
>> @@ -0,0 +1,209 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +# Copyright 2019 Texas Instruments Incorporated
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#;
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#;
>> +
>> +title: Texas Instruments J721E Display Subsystem
>> +
>> +maintainers:
>> +  - Jyri Sarha 
>> +  - Tomi Valkeinen 
>> +
>> +description: |
>> +  The J721E TI Keystone Display SubSystem with four output ports and
>> +  four video planes. There is two full video planes and two "lite
>> +  planes" without scaling support. The video ports can be connected to
>> +  the SoC's DPI pins or to integrated display bridges on the SoC.
>> +
>> +properties:
>> +  compatible:
>> +const: ti,j721e-dss
>> +
>> +  reg:
>> +maxItems: 17
>> +description: |
>> +  Addresses to each DSS memory region described in the SoC's TRM.
>> +  The reg-names refer to memory regions as follows:
>> +  reg-names: Region Name in TRM: Description:
>> +  common_m   DSS0_DISPC_0_COMMON_M   DSS Master common register area
>> +  common_s0  DSS0_DISPC_0_COMMON_SO  DSS Shared common register area 0
>> +  common_s1  DSS0_DISPC_0_COMMON_S1  DSS Shared common register area 1
>> +  common_s2  DSS0_DISPC_0_COMMON_S2  DSS Shared common register area 2
>> +  vidl1  DSS0_VIDL1  VIDL1 light video plane 1
>> +  vidl2  DSS0_VIDL2  VIDL2 light video plane 2
>> +  vid1   DSS0_VID1   VID1 video plane 1
>> +  vid2   DSS0_VID2   VID1 video plane 2
>> +  ovr1   DSS0_OVR1   OVR1 overlay manager for vp1
>> +  ovr2   DSS0_OVR2   OVR2 overlay manager for vp2
>> +  ovr3   DSS0_OVR3   OVR1 overlay manager for vp3
>> +  ovr4   DSS0_OVR4   OVR2 overlay manager for vp4
>> +  vp1DSS0_VP1VP1 video port 1
>> +  vp2DSS0_VP2VP1 video port 2
>> +  vp3DSS0_VP3VP1 video port 3
>> +  vp4DSS0_VP4VP1 video port 4
>> +  wp DSS0_WB Write Back registers
> 
> I guess it applies to all your schemas in that patch series, but you
> could just do something like
> 
> reg:
>   items:
> - description: DSS Master common register area
> - description: DSS Shared common register area 0
> - description: DSS Shared common register area 1
> 

Ok, thanks. I was not sure if you can do that (still a newbie with
yaml). What do you think about Peter Ujfalusi's suggestion of putting
the descriptions to reg-names (and clock-names and  interrupt-names)?
e.g. something like this:

  reg-names:
items:
  - const: common_m
  - description: DSS Master common register area
  - const: common_s0
  - description: DSS Master common register area
...

Or is that even allowed?


> ...
> 
> That way, you wouldn't have to worry about the maxItems, and you end
> up doing pretty much that already in the description
> 
>> +  reg-names:
>> +items:
>> +  - const: common_m
>> +  - const: common_s0
>> +  - const: common_s1
>> +  - const: common_s2
>> +  - const: vidl1
>> +  - const: vidl2
>> +  - const: vid1
>> +  - const: vid2
>> +  - const: ovr1
>> +  - const: ovr2
>> +  - const: ovr3
>> +  - const: ovr4
>> +  - const: vp1
>> +  - const: vp2
>> +  - const: vp3
>> +  - const: vp4
>> +  - const: wb
>> +
>> +  clocks:
>> +maxItems: 5
>> +description:
>> +  phandles to clock nodes for DSS functional clock (fck) and video
>> +  port 1, 2, 3 and 4 pixel clocks (vp1, vp2, vp3, vp4).
>> +
>> +  clock-names:
>> +items:
>> +  - const: fck
>> +  - const: vp1
>> +  - const: vp2
>> +  - const: vp3
>> +  - const: vp4
>> +
>> +  interrupts:

Re: [PATCH v4 3/5] dt-bindings: display: ti, j721e-dss: Add dt-schema yaml binding

2019-12-19 Thread Peter Ujfalusi
Hi Jyri,

On 19/12/2019 10.23, Jyri Sarha wrote:
> Add dt-schema yaml bindig for J721E DSS, J721E version TI Keystone
> Display SubSystem.
> 
> Version history:
> 
> v2: no change
> 
> v3: - reg-names: "wp" -> "wb"
> - Add ports node
> - Add includes to dts example
> - reindent dts example
> 
> v4: - Add descriptions to reg, clocks, and interrups properties
> - Remove minItems when its value is the same as maxItems value
> 
> Signed-off-by: Jyri Sarha 
> ---
>  .../bindings/display/ti/ti,j721e-dss.yaml | 209 ++
>  1 file changed, 209 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml 
> b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
> new file mode 100644
> index ..cd68c4294f9a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml
> @@ -0,0 +1,209 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2019 Texas Instruments Incorporated
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#;
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#;
> +
> +title: Texas Instruments J721E Display Subsystem
> +
> +maintainers:
> +  - Jyri Sarha 
> +  - Tomi Valkeinen 
> +
> +description: |
> +  The J721E TI Keystone Display SubSystem with four output ports and
> +  four video planes. There is two full video planes and two "lite
> +  planes" without scaling support. The video ports can be connected to
> +  the SoC's DPI pins or to integrated display bridges on the SoC.
> +
> +properties:
> +  compatible:
> +const: ti,j721e-dss
> +
> +  reg:
> +maxItems: 17
> +description: |
> +  Addresses to each DSS memory region described in the SoC's TRM.
> +  The reg-names refer to memory regions as follows:
> +  reg-names: Region Name in TRM: Description:
> +  common_m   DSS0_DISPC_0_COMMON_M   DSS Master common register area
> +  common_s0  DSS0_DISPC_0_COMMON_SO  DSS Shared common register area 0
> +  common_s1  DSS0_DISPC_0_COMMON_S1  DSS Shared common register area 1
> +  common_s2  DSS0_DISPC_0_COMMON_S2  DSS Shared common register area 2
> +  vidl1  DSS0_VIDL1  VIDL1 light video plane 1
> +  vidl2  DSS0_VIDL2  VIDL2 light video plane 2
> +  vid1   DSS0_VID1   VID1 video plane 1
> +  vid2   DSS0_VID2   VID1 video plane 2
> +  ovr1   DSS0_OVR1   OVR1 overlay manager for vp1
> +  ovr2   DSS0_OVR2   OVR2 overlay manager for vp2
> +  ovr3   DSS0_OVR3   OVR1 overlay manager for vp3
> +  ovr4   DSS0_OVR4   OVR2 overlay manager for vp4
> +  vp1DSS0_VP1VP1 video port 1
> +  vp2DSS0_VP2VP1 video port 2
> +  vp3DSS0_VP3VP1 video port 3
> +  vp4DSS0_VP4VP1 video port 4
> +  wp DSS0_WB Write Back registers

'wp' is back ;)

> +
> +  reg-names:
> +items:
> +  - const: common_m
> +  - const: common_s0
> +  - const: common_s1
> +  - const: common_s2
> +  - const: vidl1
> +  - const: vidl2
> +  - const: vid1
> +  - const: vid2
> +  - const: ovr1
> +  - const: ovr2
> +  - const: ovr3
> +  - const: ovr4
> +  - const: vp1
> +  - const: vp2
> +  - const: vp3
> +  - const: vp4
> +  - const: wb

imho the description you put under the 'reg' would be more natural here,
where you actually specifying the names of the register ranges.

> +
> +  clocks:
> +maxItems: 5
> +description:
> +  phandles to clock nodes for DSS functional clock (fck) and video
> +  port 1, 2, 3 and 4 pixel clocks (vp1, vp2, vp3, vp4).
> +
> +  clock-names:
> +items:
> +  - const: fck
> +  - const: vp1
> +  - const: vp2
> +  - const: vp3
> +  - const: vp4

Same comment, it is more natural to have the description coupled with
what you are describing.

> +
> +  interrupts:
> +maxItems: 4
> +description:
> +  Interrupt descriptions for common irq registers in common_m,
> +  common_m0, common_m1, and common_m2, sections.
> +
> +  interrupt-names:
> +items:
> +  - const: common_m
> +  - const: common_s0
> +  - const: common_s1
> +  - const: common_s2
> +
> +  power-domains:
> +maxItems: 1
> +description: phandle to the associated power domain
> +
> +  ports:
> +type: object
> +description:
> +  Ports as described in Documentation/devictree/bindings/graph.txt
> +properties:
> +  "#address-cells":
> +const: 1
> +
> +  "#size-cells":
> +const: 0
> +
> +  port@0:
> +type: object
> +description:
> +  The output port node form video port 1
> +

Re: [PATCH v2 2/9] drm/amd/display: Fix compilation issue.

2019-12-19 Thread Manna, Animesh



On 19-12-2019 05:23, Manasi Navare wrote:

On Wed, Dec 18, 2019 at 09:43:49PM +0530, Manna, Animesh wrote:

On 18-12-2019 21:12, Harry Wentland wrote:

On 2019-12-18 10:13 a.m., Animesh Manna wrote:

[Why]:
Aligh with DP spec wanted to follow same naming convention.

[How]:
Changed the macro name of the dpcd address used for getting requested
test-pattern.


Please roll this into your patch that renames the definition. All
patches should compile on their own.


Thanks Harry for review, wanted to follow similar commit-description format
followed in amd-driver compare to i915 and created a separate patch. Maybe
is it good idea to change the patch sequence and make it as first patch.

Regards,
Animesh

Like Harry said, all these changes should happen in the same patch that renames 
the DP_TEST_PHY_PATTERN
which is patch 1/9 because like you see the build still fails now since patch 1 
doesnt compile.

So the idea would be in patch 1 - rename, make changes in AMD and existing 
place where it gets used
Patch 2 - get/set PHY test paarams that use this renamed value


Thanks Manasi. Yes, I want to mean the same.

Regards,
Animesh



Manasi


Thanks,
Harry


Cc: Harry Wentland 
Cc: Alex Deucher 
Signed-off-by: Animesh Manna 
---
  drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 42aa889fd0f5..1a6109be2fce 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2491,7 +2491,7 @@ static void dp_test_send_phy_test_pattern(struct dc_link 
*link)
/* get phy test pattern and pattern parameters from DP receiver */
core_link_read_dpcd(
link,
-   DP_TEST_PHY_PATTERN,
+   DP_PHY_TEST_PATTERN,
_test_pattern.raw,
sizeof(dpcd_test_pattern));
core_link_read_dpcd(


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Re: [PATCH v2 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation

2019-12-19 Thread Manna, Animesh


On 19-12-2019 18:03, Ville Syrjälä wrote:

On Wed, Dec 18, 2019 at 08:43:44PM +0530, Animesh Manna wrote:

vswing/pre-emphasis adjustment calculation is needed in processing
of auto phy compliance request other than link training, so moved
the same function in intel_dp.c.

No functional change.

Signed-off-by: Animesh Manna 
---
  drivers/gpu/drm/i915/display/intel_dp.c   | 32 +++
  drivers/gpu/drm/i915/display/intel_dp.h   |  3 ++
  .../drm/i915/display/intel_dp_link_training.c | 32 ---
  3 files changed, 35 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 2f31d226c6eb..ca82835b6dcf 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4110,6 +4110,38 @@ ivb_cpu_edp_signal_levels(u8 train_set)
}
  }
  
+void

+intel_get_adjust_train(struct intel_dp *intel_dp,
+  const u8 *link_status)

I'd prefer to keep the arrayish notation so we have some idea how big
this is supposed to be. I guess that woukld mean including some
drm dp header in intel_dp.h?


Yes, will add.

Regards,
Animesh




+{
+   u8 v = 0;
+   u8 p = 0;
+   int lane;
+   u8 voltage_max;
+   u8 preemph_max;
+
+   for (lane = 0; lane < intel_dp->lane_count; lane++) {
+   u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
lane);
+   u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
lane);
+
+   if (this_v > v)
+   v = this_v;
+   if (this_p > p)
+   p = this_p;
+   }
+
+   voltage_max = intel_dp_voltage_max(intel_dp);
+   if (v >= voltage_max)
+   v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
+
+   preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
+   if (p >= preemph_max)
+   p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+   for (lane = 0; lane < 4; lane++)
+   intel_dp->train_set[lane] = v | p;
+}
+
  void
  intel_dp_set_signal_levels(struct intel_dp *intel_dp)
  {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
b/drivers/gpu/drm/i915/display/intel_dp.h
index 3da166054788..0d0cb692f701 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -91,6 +91,9 @@ void
  intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
   u8 dp_train_pat);
  void
+intel_get_adjust_train(struct intel_dp *intel_dp,
+  const u8 *link_status);
+void
  intel_dp_set_signal_levels(struct intel_dp *intel_dp);
  void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
  u8
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 2a1130dd1ad0..1e38584e7d56 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -34,38 +34,6 @@ intel_dp_dump_link_status(const u8 
link_status[DP_LINK_STATUS_SIZE])
  link_status[3], link_status[4], link_status[5]);
  }
  
-static void

-intel_get_adjust_train(struct intel_dp *intel_dp,
-  const u8 link_status[DP_LINK_STATUS_SIZE])
-{
-   u8 v = 0;
-   u8 p = 0;
-   int lane;
-   u8 voltage_max;
-   u8 preemph_max;
-
-   for (lane = 0; lane < intel_dp->lane_count; lane++) {
-   u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
lane);
-   u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
lane);
-
-   if (this_v > v)
-   v = this_v;
-   if (this_p > p)
-   p = this_p;
-   }
-
-   voltage_max = intel_dp_voltage_max(intel_dp);
-   if (v >= voltage_max)
-   v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
-
-   preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
-   if (p >= preemph_max)
-   p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
-
-   for (lane = 0; lane < 4; lane++)
-   intel_dp->train_set[lane] = v | p;
-}
-
  static bool
  intel_dp_set_link_train(struct intel_dp *intel_dp,
u8 dp_train_pat)
--
2.24.0

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Re: [PATCH v2 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation

2019-12-19 Thread Manna, Animesh



On 19-12-2019 16:21, Jani Nikula wrote:

On Wed, 18 Dec 2019, Animesh Manna  wrote:

vswing/pre-emphasis adjustment calculation is needed in processing
of auto phy compliance request other than link training, so moved
the same function in intel_dp.c.

No functional change.

Signed-off-by: Animesh Manna 
---
  drivers/gpu/drm/i915/display/intel_dp.c   | 32 +++
  drivers/gpu/drm/i915/display/intel_dp.h   |  3 ++
  .../drm/i915/display/intel_dp_link_training.c | 32 ---
  3 files changed, 35 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 2f31d226c6eb..ca82835b6dcf 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4110,6 +4110,38 @@ ivb_cpu_edp_signal_levels(u8 train_set)
}
  }
  
+void

+intel_get_adjust_train(struct intel_dp *intel_dp,

Please follow the naming convention of prefixing non-static functions in
foo.c with foo_. I.e. intel_dp_ here.


Sure, will do.

Regards,
Animesh



BR,
Jani.


+  const u8 *link_status)
+{
+   u8 v = 0;
+   u8 p = 0;
+   int lane;
+   u8 voltage_max;
+   u8 preemph_max;
+
+   for (lane = 0; lane < intel_dp->lane_count; lane++) {
+   u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
lane);
+   u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
lane);
+
+   if (this_v > v)
+   v = this_v;
+   if (this_p > p)
+   p = this_p;
+   }
+
+   voltage_max = intel_dp_voltage_max(intel_dp);
+   if (v >= voltage_max)
+   v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
+
+   preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
+   if (p >= preemph_max)
+   p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+   for (lane = 0; lane < 4; lane++)
+   intel_dp->train_set[lane] = v | p;
+}
+
  void
  intel_dp_set_signal_levels(struct intel_dp *intel_dp)
  {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
b/drivers/gpu/drm/i915/display/intel_dp.h
index 3da166054788..0d0cb692f701 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -91,6 +91,9 @@ void
  intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
   u8 dp_train_pat);
  void
+intel_get_adjust_train(struct intel_dp *intel_dp,
+  const u8 *link_status);
+void
  intel_dp_set_signal_levels(struct intel_dp *intel_dp);
  void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
  u8
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 2a1130dd1ad0..1e38584e7d56 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -34,38 +34,6 @@ intel_dp_dump_link_status(const u8 
link_status[DP_LINK_STATUS_SIZE])
  link_status[3], link_status[4], link_status[5]);
  }
  
-static void

-intel_get_adjust_train(struct intel_dp *intel_dp,
-  const u8 link_status[DP_LINK_STATUS_SIZE])
-{
-   u8 v = 0;
-   u8 p = 0;
-   int lane;
-   u8 voltage_max;
-   u8 preemph_max;
-
-   for (lane = 0; lane < intel_dp->lane_count; lane++) {
-   u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
lane);
-   u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
lane);
-
-   if (this_v > v)
-   v = this_v;
-   if (this_p > p)
-   p = this_p;
-   }
-
-   voltage_max = intel_dp_voltage_max(intel_dp);
-   if (v >= voltage_max)
-   v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
-
-   preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
-   if (p >= preemph_max)
-   p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
-
-   for (lane = 0; lane < 4; lane++)
-   intel_dp->train_set[lane] = v | p;
-}
-
  static bool
  intel_dp_set_link_train(struct intel_dp *intel_dp,
u8 dp_train_pat)

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Re: [PATCH v11 00/25] mm/gup: track dma-pinned pages: FOLL_PIN

2019-12-19 Thread Leon Romanovsky
On Mon, Dec 16, 2019 at 02:25:12PM -0800, John Hubbard wrote:
> Hi,
>
> This implements an API naming change (put_user_page*() -->
> unpin_user_page*()), and also implements tracking of FOLL_PIN pages. It
> extends that tracking to a few select subsystems. More subsystems will
> be added in follow up work.

Hi John,

The patchset generates kernel panics in our IB testing. In our tests, we
allocated single memory block and registered multiple MRs using the single
block.

The possible bad flow is:
 ib_umem_geti() ->
  pin_user_pages_fast(FOLL_WRITE) ->
   internal_get_user_pages_fast(FOLL_WRITE) ->
gup_pgd_range() ->
 gup_huge_pd() ->
  gup_hugepte() ->
   try_grab_compound_head() ->

 108 static __maybe_unused struct page *try_grab_compound_head(struct page 
*page,
 109   int refs,
 110   unsigned int 
flags)
 111 {
 112 if (flags & FOLL_GET)
 113 return try_get_compound_head(page, refs);
 114 else if (flags & FOLL_PIN)
 115 return try_pin_compound_head(page, refs);
 116
 117 WARN_ON_ONCE(1);
 118 return NULL;
 119 }

# (master) $ dmesg
[10924.70] mlx5_core :00:08.0 eth2: Link up
[10924.725383] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
[10960.902254] [ cut here ]
[10960.905614] WARNING: CPU: 3 PID: 8838 at mm/gup.c:61 
try_grab_compound_head+0x92/0xd0
[10960.907313] Modules linked in: nfsv3 nfs_acl rpcsec_gss_krb5 auth_rpcgss 
nfsv4 dns_resolver nfs lockd grace fscache ib_isert iscsi_target_mod ib_srpt 
target_core_mod ib_srp rpcrdma rdma_ucm ib_iser ib_umad rdma_cm ib_ipoib iw_cm 
ib_cm mlx5_ib ib_uverbs ib_core kvm_intel mlx5_core rfkill mlxfw sunrpc 
virtio_net pci_hyperv_intf kvm irqbypass net_failover crc32_pclmul i2c_piix4 
ptp crc32c_intel failover pcspkr ghash_clmulni_intel i2c_core pps_core 
sch_fq_codel ip_tables ata_generic pata_acpi serio_raw ata_piix floppy [last 
unloaded: mlxkvl]
[10960.917806] CPU: 3 PID: 8838 Comm: consume_mtts Tainted: G   OE 
5.5.0-rc2-for-upstream-perf-2019-12-18_10-06-50-78 #1
[10960.920530] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 
1.10.2-1ubuntu1 04/01/2014
[10960.923024] RIP: 0010:try_grab_compound_head+0x92/0xd0
[10960.924329] Code: e4 8d 14 06 48 8d 4f 34 f0 0f b1 57 34 0f 94 c2 84 d2 75 
cb 85 c0 74 cd 8d 14 06 f0 0f b1 11 0f 94 c2 84 d2 75 b9 66 90 eb ea <0f> 0b 31 
ff eb b7 85 c0 66 0f 1f 44 00 00 74 ab 8d 14 06 f0 0f b1
[10960.928512] RSP: 0018:c9000129f880 EFLAGS: 00010082
[10960.929831] RAX: 8001 RBX: 7f6397446000 RCX: 000fffe0
[10960.931422] RDX: 0004 RSI: 00011800 RDI: ea000f5d8000
[10960.933005] RBP: c9000129f93c R08: c9000129f93c R09: 0020
[10960.934584] R10: 88840774b200 R11: 88800230 R12: 7f6397446000
[10960.936212] R13: 0046 R14: 8003d76000e7 R15: 0080
[10960.937793] FS:  7f63a0590740() GS:88842f98() 
knlGS:
[10960.939962] CS:  0010 DS:  ES:  CR0: 80050033
[10960.941367] CR2: 023e9008 CR3: 000406d0a002 CR4: 007606e0
[10960.942975] DR0:  DR1:  DR2: 
[10960.944654] DR3:  DR6: fffe0ff0 DR7: 0400
[10960.946394] PKRU: 5554
[10960.947310] Call Trace:
[10960.948193]  gup_pgd_range+0x61e/0x950
[10960.949585]  internal_get_user_pages_fast+0x98/0x1c0
[10960.951313]  ib_umem_get+0x2b3/0x5a0 [ib_uverbs]
[10960.952929]  mr_umem_get+0xd8/0x280 [mlx5_ib]
[10960.954150]  ? xas_store+0x49/0x550
[10960.955187]  mlx5_ib_reg_user_mr+0x149/0x7a0 [mlx5_ib]
[10960.956478]  ? xas_load+0x9/0x80
[10960.957474]  ? xa_load+0x54/0x90
[10960.958465]  ? lookup_get_idr_uobject.part.10+0x12/0x80 [ib_uverbs]
[10960.959926]  ib_uverbs_reg_mr+0x138/0x2a0 [ib_uverbs]
[10960.961192]  ib_uverbs_handler_UVERBS_METHOD_INVOKE_WRITE+0xb1/0xf0 
[ib_uverbs]
[10960.963208]  ib_uverbs_cmd_verbs.isra.8+0x997/0xb30 [ib_uverbs]
[10960.964603]  ? uverbs_disassociate_api+0xd0/0xd0 [ib_uverbs]
[10960.965949]  ? mem_cgroup_commit_charge+0x6a/0x140
[10960.967177]  ? page_add_new_anon_rmap+0x58/0xc0
[10960.968360]  ib_uverbs_ioctl+0xbc/0x130 [ib_uverbs]
[10960.969595]  do_vfs_ioctl+0xa6/0x640
[10960.970631]  ? syscall_trace_enter+0x1f8/0x2e0
[10960.971829]  ksys_ioctl+0x60/0x90
[10960.972825]  __x64_sys_ioctl+0x16/0x20
[10960.973888]  do_syscall_64+0x48/0x130
[10960.974949]  entry_SYSCALL_64_after_hwframe+0x44/0xa9
[10960.976219] RIP: 0033:0x7f639fe9b267
[10960.977260] Code: b3 66 90 48 8b 05 19 3c 2c 00 64 c7 00 26 00 00 00 48 c7 
c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01 
f0 ff ff 73 01 c3 48 8b 0d e9 3b 2c 00 f7 d8 64 89 01 48
[10960.981413] RSP: 002b:7fff5335ca08 EFLAGS: 0246 ORIG_RAX: 
0010
[10960.983472] RAX: 

Re: [PATCH] drm/i915: Provide ddc symlink in hdmi connector sysfs directory

2019-12-19 Thread Jani Nikula
On Fri, 13 Dec 2019, Andrzej Pietrasiewicz  wrote:
> W dniu 28.11.2019 o 16:01, Andrzej Pietrasiewicz pisze:
>> Use the ddc pointer provided by the generic connector.
>> 
>
> A gentle ping.

Pushed, sorry for the delay.

BR,
Jani.

>
> Andrzej
>
>> Signed-off-by: Andrzej Pietrasiewicz 
>> Acked-by: Sam Ravnborg 
>> Reviewed-by: Emil Velikov 
>> ---
>> Rebased onto drm-intel-next-queued.
>> 
>>   drivers/gpu/drm/i915/display/intel_hdmi.c | 12 
>>   1 file changed, 8 insertions(+), 4 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
>> b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> index 29a174af5314..6ec8d14bccd7 100644
>> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> @@ -3134,6 +3134,7 @@ void intel_hdmi_init_connector(struct 
>> intel_digital_port *intel_dig_port,
>>  struct intel_encoder *intel_encoder = _dig_port->base;
>>  struct drm_device *dev = intel_encoder->base.dev;
>>  struct drm_i915_private *dev_priv = to_i915(dev);
>> +struct i2c_adapter *ddc;
>>  enum port port = intel_encoder->port;
>>  struct cec_connector_info conn_info;
>>   
>> @@ -3149,8 +3150,13 @@ void intel_hdmi_init_connector(struct 
>> intel_digital_port *intel_dig_port,
>>   intel_encoder->base.name))
>>  return;
>>   
>> -drm_connector_init(dev, connector, _hdmi_connector_funcs,
>> -   DRM_MODE_CONNECTOR_HDMIA);
>> +intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
>> +ddc = intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus);
>> +
>> +drm_connector_init_with_ddc(dev, connector,
>> +_hdmi_connector_funcs,
>> +DRM_MODE_CONNECTOR_HDMIA,
>> +ddc);
>>  drm_connector_helper_add(connector, _hdmi_connector_helper_funcs);
>>   
>>  connector->interlace_allowed = 1;
>> @@ -3160,8 +3166,6 @@ void intel_hdmi_init_connector(struct 
>> intel_digital_port *intel_dig_port,
>>  if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
>>  connector->ycbcr_420_allowed = true;
>>   
>> -intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
>> -
>>  intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
>>   
>>  if (HAS_DDI(dev_priv))
>> 
>

-- 
Jani Nikula, Intel Open Source Graphics Center
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[PATCH 4/5] drm/msm: Pass mmu features to generic layers

2019-12-19 Thread Sharat Masetty
Allow different Adreno targets the ability to pass
specific mmu features to the generic layers. This will
help conditionally configure certain iommu features for
certain Adreno targets.

Also Add a few simple support functions to support a bitmask of
features that a specific MMU implementation supports.

Signed-off-by: Sharat Masetty 
---
 drivers/gpu/drm/msm/adreno/a2xx_gpu.c   |  2 +-
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   |  2 +-
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   |  2 +-
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   |  2 +-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c   |  2 +-
 drivers/gpu/drm/msm/adreno/adreno_gpu.c |  4 +++-
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  2 +-
 drivers/gpu/drm/msm/msm_gpu.c   |  6 --
 drivers/gpu/drm/msm/msm_gpu.h   |  1 +
 drivers/gpu/drm/msm/msm_mmu.h   | 11 +++
 10 files changed, 25 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
index 1f83bc1..bbac43c 100644
--- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c
@@ -472,7 +472,7 @@ struct msm_gpu *a2xx_gpu_init(struct drm_device *dev)
 
adreno_gpu->reg_offsets = a2xx_register_offsets;
 
-   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
+   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
if (ret)
goto fail;
 
diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index 5f7e980..63448fb 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -488,7 +488,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
adreno_gpu->registers = a3xx_registers;
adreno_gpu->reg_offsets = a3xx_register_offsets;
 
-   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
+   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
if (ret)
goto fail;
 
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index ab2b752..90ae26d 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -572,7 +572,7 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
adreno_gpu->registers = a4xx_registers;
adreno_gpu->reg_offsets = a4xx_register_offsets;
 
-   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
+   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
if (ret)
goto fail;
 
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 99cd6e6..a51ed2e 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1445,7 +1445,7 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev)
 
check_speed_bin(>dev);
 
-   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 4);
+   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 4, 0);
if (ret) {
a5xx_destroy(&(a5xx_gpu->base.base));
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index daf0780..faff6ff 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -924,7 +924,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
adreno_gpu->registers = NULL;
adreno_gpu->reg_offsets = a6xx_register_offsets;
 
-   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1);
+   ret = adreno_gpu_init(dev, pdev, adreno_gpu, , 1, 0);
if (ret) {
a6xx_destroy(&(a6xx_gpu->base.base));
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 048c8be..7dade16 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -895,7 +895,8 @@ static int adreno_get_pwrlevels(struct device *dev,
 
 int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
struct adreno_gpu *adreno_gpu,
-   const struct adreno_gpu_funcs *funcs, int nr_rings)
+   const struct adreno_gpu_funcs *funcs, int nr_rings,
+   u32 mmu_features)
 {
struct adreno_platform_config *config = pdev->dev.platform_data;
struct msm_gpu_config adreno_gpu_config  = { 0 };
@@ -916,6 +917,7 @@ int adreno_gpu_init(struct drm_device *drm, struct 
platform_device *pdev,
adreno_gpu_config.va_end = SZ_16M + 0xfff * SZ_64K;
 
adreno_gpu_config.nr_rings = nr_rings;
+   adreno_gpu_config.mmu_features = mmu_features;
 
adreno_get_pwrlevels(>dev, gpu);
 
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h 
b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index e12d5a9..27716f6 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -248,7 +248,7 @@ void adreno_show(struct msm_gpu *gpu, 

[PATCH 5/5] drm/msm/a6xx: Add support for using system cache(LLC)

2019-12-19 Thread Sharat Masetty
The last level system cache can be partitioned to 32 different slices
of which GPU has two slices preallocated. One slice is used for caching GPU
buffers and the other slice is used for caching the GPU SMMU pagetables.
This patch talks to the core system cache driver to acquire the slice handles,
configure the SCID's to those slices and activates and deactivates the slices
upon GPU power collapse and restore.

Some support from the IOMMU driver is also needed to make use of the
system cache. IOMMU_QCOM_SYS_CACHE is a buffer protection flag which enables
caching GPU data buffers in the system cache with memory attributes such
as outer cacheable, read-allocate, write-allocate for buffers. The GPU
then has the ability to override a few cacheability parameters which it
does to override write-allocate to write-no-allocate as the GPU hardware
does not benefit much from it.

Similarly DOMAIN_ATTR_QCOM_SYS_CACHE is another domain level attribute
used by the IOMMU driver to set the right attributes to cache the hardware
pagetables into the system cache.

Signed-off-by: Sharat Masetty 
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 122 +-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.h |   9 +++
 drivers/gpu/drm/msm/msm_iommu.c   |  13 
 drivers/gpu/drm/msm/msm_mmu.h |   3 +
 4 files changed, 146 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index faff6ff..0c7fdee 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -9,6 +9,7 @@
 #include "a6xx_gmu.xml.h"

 #include 
+#include 

 #define GPU_PAS_ID 13

@@ -781,6 +782,117 @@ static void a6xx_bus_clear_pending_transactions(struct 
adreno_gpu *adreno_gpu)
gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0);
 }

+#define A6XX_LLC_NUM_GPU_SCIDS 5
+#define A6XX_GPU_LLC_SCID_NUM_BITS 5
+
+#define A6XX_GPU_LLC_SCID_MASK \
+   ((1 << (A6XX_LLC_NUM_GPU_SCIDS * A6XX_GPU_LLC_SCID_NUM_BITS)) - 1)
+
+#define A6XX_GPUHTW_LLC_SCID_SHIFT 25
+#define A6XX_GPUHTW_LLC_SCID_MASK \
+   (((1 << A6XX_GPU_LLC_SCID_NUM_BITS) - 1) << A6XX_GPUHTW_LLC_SCID_SHIFT)
+
+static inline void a6xx_gpu_cx_rmw(struct a6xx_llc *llc,
+   u32 reg, u32 mask, u32 or)
+{
+   msm_rmw(llc->mmio + (reg << 2), mask, or);
+}
+
+static void a6xx_llc_deactivate(struct a6xx_llc *llc)
+{
+   llcc_slice_deactivate(llc->gpu_llc_slice);
+   llcc_slice_deactivate(llc->gpuhtw_llc_slice);
+}
+
+static void a6xx_llc_activate(struct a6xx_llc *llc)
+{
+   if (!llc->mmio)
+   return;
+
+   /* Program the sub-cache ID for all GPU blocks */
+   if (!llcc_slice_activate(llc->gpu_llc_slice))
+   a6xx_gpu_cx_rmw(llc,
+   REG_A6XX_CX_MISC_SYSTEM_CACHE_CNTL_1,
+   A6XX_GPU_LLC_SCID_MASK,
+   (llc->cntl1_regval &
+A6XX_GPU_LLC_SCID_MASK));
+
+   /* Program the sub-cache ID for the GPU pagetables */
+   if (!llcc_slice_activate(llc->gpuhtw_llc_slice))
+   a6xx_gpu_cx_rmw(llc,
+   REG_A6XX_CX_MISC_SYSTEM_CACHE_CNTL_1,
+   A6XX_GPUHTW_LLC_SCID_MASK,
+   (llc->cntl1_regval &
+A6XX_GPUHTW_LLC_SCID_MASK));
+
+   /* Program cacheability overrides */
+   a6xx_gpu_cx_rmw(llc, REG_A6XX_CX_MISC_SYSTEM_CACHE_CNTL_0, 0xF,
+   llc->cntl0_regval);
+}
+
+static void a6xx_llc_slices_destroy(struct a6xx_llc *llc)
+{
+   if (llc->mmio)
+   iounmap(llc->mmio);
+
+   llcc_slice_putd(llc->gpu_llc_slice);
+   llcc_slice_putd(llc->gpuhtw_llc_slice);
+}
+
+static int a6xx_llc_slices_init(struct platform_device *pdev,
+   struct a6xx_llc *llc)
+{
+   llc->mmio = msm_ioremap(pdev, "cx_mem", "gpu_cx");
+   if (IS_ERR_OR_NULL(llc->mmio))
+   return -ENODEV;
+
+   llc->gpu_llc_slice = llcc_slice_getd(LLCC_GPU);
+   llc->gpuhtw_llc_slice = llcc_slice_getd(LLCC_GPUHTW);
+   if (IS_ERR(llc->gpu_llc_slice) && IS_ERR(llc->gpuhtw_llc_slice))
+   return -ENODEV;
+
+   /*
+* CNTL0 provides options to override the settings for the
+* read and write allocation policies for the LLC. These
+* overrides are global for all memory transactions from
+* the GPU.
+*
+* 0x3: read-no-alloc-overridden = 0
+*  read-no-alloc = 0 - Allocate lines on read miss
+*  write-no-alloc-overridden = 1
+*  write-no-alloc = 1 - Do not allocates lines on write miss
+*/
+   llc->cntl0_regval = 0x03;
+
+   /*
+* CNTL1 is used to specify SCID for (CP, TP, VFD, CCU and UBWC
+* FLAG cache) GPU blocks. This value will be passed along with
+* the address for any memory transaction from GPU to identify
+

[PATCH 1/5] iommu/arm-smmu: Pass io_pgtable_cfg to impl specific init_context

2019-12-19 Thread Sharat Masetty
From: Jordan Crouse 

Pass the propposed io_pgtable_cfg to the implementation specific
init_context() function to give the implementation an opportunity to
to modify it before it gets passed to io-pgtable.

Signed-off-by: Jordan Crouse 
Signed-off-by: Sai Prakash Ranjan 
---
 drivers/iommu/arm-smmu-impl.c |  3 ++-
 drivers/iommu/arm-smmu.c  | 11 ++-
 drivers/iommu/arm-smmu.h  |  3 ++-
 3 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c
index b2fe72a..33ed682 100644
--- a/drivers/iommu/arm-smmu-impl.c
+++ b/drivers/iommu/arm-smmu-impl.c
@@ -68,7 +68,8 @@ static int cavium_cfg_probe(struct arm_smmu_device *smmu)
return 0;
 }

-static int cavium_init_context(struct arm_smmu_domain *smmu_domain)
+static int cavium_init_context(struct arm_smmu_domain *smmu_domain,
+   struct io_pgtable_cfg *pgtbl_cfg)
 {
struct cavium_smmu *cs = container_of(smmu_domain->smmu,
  struct cavium_smmu, smmu);
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index eee48f9..4f7e0c0 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -758,11 +758,6 @@ static int arm_smmu_init_domain_context(struct 
iommu_domain *domain,
cfg->asid = cfg->cbndx;

smmu_domain->smmu = smmu;
-   if (smmu->impl && smmu->impl->init_context) {
-   ret = smmu->impl->init_context(smmu_domain);
-   if (ret)
-   goto out_unlock;
-   }

smmu_domain->pgtbl_cfg = (struct io_pgtable_cfg) {
.pgsize_bitmap  = smmu->pgsize_bitmap,
@@ -773,6 +768,12 @@ static int arm_smmu_init_domain_context(struct 
iommu_domain *domain,
.iommu_dev  = smmu->dev,
};

+   if (smmu->impl && smmu->impl->init_context) {
+   ret = smmu->impl->init_context(smmu_domain, 
_domain->pgtbl_cfg);
+   if (ret)
+   goto out_unlock;
+   }
+
if (smmu_domain->non_strict)
smmu_domain->pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;

diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
index b2df38c..f57cdbe 100644
--- a/drivers/iommu/arm-smmu.h
+++ b/drivers/iommu/arm-smmu.h
@@ -335,7 +335,8 @@ struct arm_smmu_impl {
u64 val);
int (*cfg_probe)(struct arm_smmu_device *smmu);
int (*reset)(struct arm_smmu_device *smmu);
-   int (*init_context)(struct arm_smmu_domain *smmu_domain);
+   int (*init_context)(struct arm_smmu_domain *smmu_domain,
+   struct io_pgtable_cfg *pgtbl_cfg);
 };

 static inline void __iomem *arm_smmu_page(struct arm_smmu_device *smmu, int n)
--
1.9.1
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[PATCH 0/5] drm/msm/a6xx: System Cache Support

2019-12-19 Thread Sharat Masetty
Some hardware variants contain a system level cache or the last level
cache(llc). This cache is typically a large block which is shared by multiple
clients on the SOC. GPU uses the system cache to cache both the GPU data
buffers(like textures) as well the SMMU pagetables. This helps with
improved render performance as well as lower power consumption by reducing
the bus traffic to the system memory.

The system cache architecture allows the cache to be split into slices which
then be used by multiple SOC clients. This patch series is an effort to enable
and use two of those slices perallocated for the GPU, one for the GPU data
buffers and another for the GPU SMMU hardware pagetables.

To enable the system cache driver, add [1] to your stack if not already
present. Please review.

[1] https://lore.kernel.org/patchwork/patch/1165298/

Jordan Crouse (1):
  iommu/arm-smmu: Pass io_pgtable_cfg to impl specific init_context

Sharat Masetty (3):
  drm/msm: rearrange the gpu_rmw() function
  drm/msm: Pass mmu features to generic layers
  drm/msm/a6xx: Add support for using system cache(LLC)

Vivek Gautam (1):
  iommu/arm-smmu: Add domain attribute for QCOM system cache

 drivers/gpu/drm/msm/adreno/a2xx_gpu.c   |   2 +-
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   |   2 +-
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   |   2 +-
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   |   2 +-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c   | 122 +++-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.h   |   9 +++
 drivers/gpu/drm/msm/adreno/adreno_gpu.c |   4 +-
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |   2 +-
 drivers/gpu/drm/msm/msm_drv.c   |   8 +++
 drivers/gpu/drm/msm/msm_drv.h   |   1 +
 drivers/gpu/drm/msm/msm_gpu.c   |   6 +-
 drivers/gpu/drm/msm/msm_gpu.h   |   6 +-
 drivers/gpu/drm/msm/msm_iommu.c |  13 
 drivers/gpu/drm/msm/msm_mmu.h   |  14 
 drivers/iommu/arm-smmu-impl.c   |   3 +-
 drivers/iommu/arm-smmu-qcom.c   |  10 +++
 drivers/iommu/arm-smmu.c|  25 +--
 drivers/iommu/arm-smmu.h|   4 +-
 include/linux/iommu.h   |   1 +
 19 files changed, 216 insertions(+), 20 deletions(-)

--
1.9.1
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[PATCH 3/5] drm/msm: rearrange the gpu_rmw() function

2019-12-19 Thread Sharat Masetty
The register read-modify-write construct is generic enough
that it can be used by other subsystems as needed, create
a more generic rmw() function and have the gpu_rmw() use
this new function.

Signed-off-by: Sharat Masetty 
Reviewed-by: Jordan Crouse 
---
 drivers/gpu/drm/msm/msm_drv.c | 8 
 drivers/gpu/drm/msm/msm_drv.h | 1 +
 drivers/gpu/drm/msm/msm_gpu.h | 5 +
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index f50fefb..4c4559f 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -165,6 +165,14 @@ u32 msm_readl(const void __iomem *addr)
return val;
 }
 
+void msm_rmw(void __iomem *addr, u32 mask, u32 or)
+{
+   u32 val = msm_readl(addr);
+
+   val &= ~mask;
+   msm_writel(val | or, addr);
+}
+
 struct msm_vblank_work {
struct work_struct work;
int crtc_id;
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 71547e7..997729e 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -409,6 +409,7 @@ void __iomem *msm_ioremap(struct platform_device *pdev, 
const char *name,
const char *dbgname);
 void msm_writel(u32 data, void __iomem *addr);
 u32 msm_readl(const void __iomem *addr);
+void msm_rmw(void __iomem *addr, u32 mask, u32 or);
 
 struct msm_gpu_submitqueue;
 int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index ab8f0f9c..a58ef16 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -223,10 +223,7 @@ static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg)
 
 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or)
 {
-   uint32_t val = gpu_read(gpu, reg);
-
-   val &= ~mask;
-   gpu_write(gpu, reg, val | or);
+   msm_rmw(gpu->mmio + (reg << 2), mask, or);
 }
 
 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 lo, u32 hi)
-- 
1.9.1
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[PATCH 2/5] iommu/arm-smmu: Add domain attribute for QCOM system cache

2019-12-19 Thread Sharat Masetty
From: Vivek Gautam 

Add iommu domain attribute for using system cache aka last level
cache on QCOM SoCs by client drivers like GPU to set right
attributes for caching the hardware pagetables into the system cache.

Signed-off-by: Vivek Gautam 
Co-developed-by: Sai Prakash Ranjan 
Signed-off-by: Sai Prakash Ranjan 
---
 drivers/iommu/arm-smmu-qcom.c | 10 ++
 drivers/iommu/arm-smmu.c  | 14 ++
 drivers/iommu/arm-smmu.h  |  1 +
 include/linux/iommu.h |  1 +
 4 files changed, 26 insertions(+)

diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c
index 24c071c..d1d22df 100644
--- a/drivers/iommu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm-smmu-qcom.c
@@ -30,7 +30,17 @@ static int qcom_sdm845_smmu500_reset(struct arm_smmu_device 
*smmu)
return ret;
 }
 
+static int qcom_smmu_init_context(struct arm_smmu_domain *smmu_domain,
+ struct io_pgtable_cfg *pgtbl_cfg)
+{
+   if (smmu_domain->sys_cache)
+   pgtbl_cfg->coherent_walk = false;
+
+   return 0;
+}
+
 static const struct arm_smmu_impl qcom_smmu_impl = {
+   .init_context = qcom_smmu_init_context,
.reset = qcom_sdm845_smmu500_reset,
 };
 
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 4f7e0c0..055b548 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1466,6 +1466,9 @@ static int arm_smmu_domain_get_attr(struct iommu_domain 
*domain,
case DOMAIN_ATTR_NESTING:
*(int *)data = (smmu_domain->stage == 
ARM_SMMU_DOMAIN_NESTED);
return 0;
+   case DOMAIN_ATTR_QCOM_SYS_CACHE:
+   *((int *)data) = smmu_domain->sys_cache;
+   return 0;
default:
return -ENODEV;
}
@@ -1506,6 +1509,17 @@ static int arm_smmu_domain_set_attr(struct iommu_domain 
*domain,
else
smmu_domain->stage = ARM_SMMU_DOMAIN_S1;
break;
+   case DOMAIN_ATTR_QCOM_SYS_CACHE:
+   if (smmu_domain->smmu) {
+   ret = -EPERM;
+   goto out_unlock;
+   }
+
+   if (*((int *)data))
+   smmu_domain->sys_cache = true;
+   else
+   smmu_domain->sys_cache = false;
+   break;
default:
ret = -ENODEV;
}
diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
index f57cdbe..8aeaaf0 100644
--- a/drivers/iommu/arm-smmu.h
+++ b/drivers/iommu/arm-smmu.h
@@ -322,6 +322,7 @@ struct arm_smmu_domain {
struct mutexinit_mutex; /* Protects smmu pointer */
spinlock_t  cb_lock; /* Serialises ATS1* ops and 
TLB syncs */
struct iommu_domain domain;
+   boolsys_cache;
 };
 
 
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 0c60e75..bd61c60 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -127,6 +127,7 @@ enum iommu_attr {
DOMAIN_ATTR_FSL_PAMUV1,
DOMAIN_ATTR_NESTING,/* two stages of translation */
DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE,
+   DOMAIN_ATTR_QCOM_SYS_CACHE,
DOMAIN_ATTR_MAX,
 };
 
-- 
1.9.1
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Re: linux-next: Signed-off-by missing for commits in the drm-intel-fixes tree

2019-12-19 Thread Joonas Lahtinen
Quoting Jani Nikula (2019-12-19 14:37:02)
> On Thu, 19 Dec 2019, Stephen Rothwell  wrote:
> > Hi all,
> >
> > Commits
> >
> >   987e379d7500 ("Revert "devtmpfs: use do_mount() instead of ksys_mount()"")
> >   9bd5ba4fe25a ("Revert "initrd: use do_mount() instead of ksys_mount()"")
> >   fa31001c96ad ("Revert "init: use do_mount() instead of ksys_mount()"")
> >
> > are missing a Signed-off-by from their author and committer.
> >
> > Reverts are commits too and should have reasonable commit messages.
> 
> Confused. I can't find said commits. And can't fathom why they'd be in
> any drm-intel tree.

Sorry. A glitch in the matrix, as our CI farm is hit by -rc2
regressions. I did the usual trick of pushing the reverts/fixes on top
of drm-intel-fixes to get CI pick them up for a run to get results, and
then proceeded to immediately remove them.

I imagine that if the commit messages got scanned, they get propagated
somewhere else too? Feel free to drop that HEAD completely.

If this is a big inconvenience, we can look into other ways of adding
the patches on top of drm-intel-fixes to get CI working when there
are regressions during -rc1/-rc2.

Regards, Joonas
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[PULL] drm-intel-fixes

2019-12-19 Thread Joonas Lahtinen
Hi Dave & Daniel,

Another -rc, another CI fire due to regressions elsewhere.

Our CI needed the following patches to get machines boot with -rc2:

Revert "devtmpfs: use do_mount() instead of ksys_mount()"
(commit 5e787dbf659fe77d56215be74044f85e01b3920f)

Revert "initrd: use do_mount() instead of ksys_mount()"
(commit d4440aac83d12f87df9bcc51e992b9c28c7f4fa5)

Revert "init: use do_mount() instead of ksys_mount()"
(commit cccaa5e33525fc07f4a2ce0518e50b9ddf435e47)

I have queued CI_DIF_433 with this PR contents + reverts to get any
CI results:

https://intel-gfx-ci.01.org/tree/drm-intel-fixes/CI_DIF_433/git-log.txt

Nothing appears in the UI for the failed-to-boot runs, so don't be
confused. CI_DIF_433 is equal to this PR + 3 reverts needed to mitigate
the -rc2 regressions.

Due to the CI fires, it may take a while to get the full results. Due to
my holidays, I'll defer to Chris to let you know if the results are good
or not. There have been some GEM bugs tackled in drm-tip, so have to make
sure they are under control.

Now on to the actual content of the PR:

Removal of a unused and harmful display W/A for Tigerlake, corrections
to powerwells of EHL compared to ICL, and MMIO offset fix for DSB. There
is a fix for uninitialized ops in dma_fence tracing and then fixes
for CI corner cases from CI.

Also includes GVT fixes: "fix for vGPU display dmabuf, one guest reset
warning and one locking issue."

Jani/Rodrigo promised to handle -fixes for next two weeks if there is
something urgent appearing.

Happy Holidays!

Regards, Joonas

***

drm-intel-fixes-2019-12-19:

- Fix to drop an unused and harmful display W/A
- Fix to define EHL power wells independent of ICL
- Fix for priority inversion on bonded requests
- Fix in mmio offset calculation of DSB instance
- Fix memory leak from get_task_pid when banning clients
- Fixes to avoid dereference of uninitialized ops in dma_fence tracing
  and keep reference to execbuf object until submitted.

- Includes gvt-fixes-2019-12-18

The following changes since commit d1eef1c619749b2a57e514a3fa67d9a516ffa919:

  Linux 5.5-rc2 (2019-12-15 15:16:08 -0800)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2019-12-19

for you to fetch changes up to 78d75f5739c457ff37cfe5adab1c01bc1f3375e2:

  Merge tag 'gvt-fixes-2019-12-18' of https://github.com/intel/gvt-linux into 
drm-intel-fixes (2019-12-18 11:01:41 +0200)


- Fix to drop an unused and harmful display W/A
- Fix to define EHL power wells independent of ICL
- Fix for priority inversion on bonded requests
- Fix in mmio offset calculation of DSB instance
- Fix memory leak from get_task_pid when banning clients
- Fixes to avoid dereference of uninitialized ops in dma_fence tracing
  and keep reference to execbuf object until submitted.

- Includes gvt-fixes-2019-12-18


Animesh Manna (1):
  drm/i915/dsb: Fix in mmio offset calculation of DSB instance

Chris Wilson (3):
  drm/i915: Copy across scheduler behaviour flags across submit fences
  drm/i915: Set fence_work.ops before dma_fence_init
  drm/i915/gem: Keep request alive while attaching fences

Gao Fred (1):
  drm/i915/gvt: Fix guest boot warning

Joonas Lahtinen (1):
  Merge tag 'gvt-fixes-2019-12-18' of https://github.com/intel/gvt-linux 
into drm-intel-fixes

Matt Roper (2):
  drm/i915/ehl: Define EHL powerwells independently of ICL
  drm/i915/tgl: Drop Wa#1178

Tina Zhang (1):
  drm/i915/gvt: Pin vgpu dma address before using

Tvrtko Ursulin (1):
  drm/i915: Fix pid leak with banned clients

Vandita Kulkarni (1):
  drm/i915: Fix WARN_ON condition for cursor plane ddb allocation

Zhenyu Wang (2):
  drm/i915/gvt: use vgpu lock for active state setting
  drm/i915/gvt: set guest display buffer as readonly

 drivers/gpu/drm/i915/display/intel_display_power.c | 153 -
 drivers/gpu/drm/i915/gem/i915_gem_context.c|   3 +-
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c |   2 +
 drivers/gpu/drm/i915/gvt/dmabuf.c  |  64 -
 drivers/gpu/drm/i915/gvt/handlers.c|  16 +++
 drivers/gpu/drm/i915/gvt/hypercall.h   |   2 +
 drivers/gpu/drm/i915/gvt/kvmgt.c   |  23 
 drivers/gpu/drm/i915/gvt/mpt.h |  15 ++
 drivers/gpu/drm/i915/gvt/vgpu.c|   4 +-
 drivers/gpu/drm/i915/i915_reg.h|   6 +-
 drivers/gpu/drm/i915/i915_request.c| 114 +++
 drivers/gpu/drm/i915/i915_scheduler.c  |   1 -
 drivers/gpu/drm/i915/i915_sw_fence_work.c  |   3 +-
 drivers/gpu/drm/i915/intel_pm.c|   4 +-
 14 files changed, 365 insertions(+), 45 deletions(-)
___

Re: Warnings in DRM code when removing/unbinding a driver

2019-12-19 Thread Daniel Vetter
On Thu, Dec 19, 2019 at 12:32 PM Gerd Hoffmann  wrote:
>
>   Hi,
>
> > >   Like I said, for most drivers
> > > > you can pretty much assume that their unload sequence has been broken
> > > > since forever. It's not often tested, and especially the hotunbind
> > > > from a device (as opposed to driver unload) stuff wasn't even possible
> > > > to get right until just recently.
> > >
> > > Do you think it's worth trying to fix this for 5.5 and earlier, or just
> > > switch to the device-managed interface for 5.6 and forget about 5.5 and
> > > earlier?
> >
> > I suspect it's going to be quite some trickery to fix this properly
> > and everywhere, even for just one driver. Lots of drm drivers
> > unfortunately use anti-patterns with wrong lifetimes (e.g. you can't
> > use devm_kmalloc for anything that hangs of a drm_device, like
> > plane/crtc/connector). Except when it's for a real hotunpluggable
> > device (usb) we've never bothered backporting these fixes. Too much
> > broken stuff unfortunately.
>
> While being at it:  How would a driver cleanup properly cleanup gem
> objects created by userspace on hotunbind?  Specifically a gem object
> pinned to vram?

Two things:
- the mmap needs to be torn down and replaced by something which will
sigbus. Probably should have that as a helper (plus vram fault code
should use drm_dev_enter/exit to plug races).
- otherwise all datastructures need to be properly refcounted.
drm_device now is (if your driver isn't broken), but any dma_fence or
dma_buf we create and export has an independent lifetime, and
currently the refcounting for is still wobbly I think.

So some work to do, both in helpers/core code and in drivers to get updated.
-Daniel
-- 
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Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: linux-next: Signed-off-by missing for commits in the drm-intel-fixes tree

2019-12-19 Thread Jani Nikula
On Thu, 19 Dec 2019, Stephen Rothwell  wrote:
> Hi all,
>
> Commits
>
>   987e379d7500 ("Revert "devtmpfs: use do_mount() instead of ksys_mount()"")
>   9bd5ba4fe25a ("Revert "initrd: use do_mount() instead of ksys_mount()"")
>   fa31001c96ad ("Revert "init: use do_mount() instead of ksys_mount()"")
>
> are missing a Signed-off-by from their author and committer.
>
> Reverts are commits too and should have reasonable commit messages.

Confused. I can't find said commits. And can't fathom why they'd be in
any drm-intel tree.

BR,
Jani.


-- 
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Re: [PATCH v2 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation

2019-12-19 Thread Ville Syrjälä
On Wed, Dec 18, 2019 at 08:43:44PM +0530, Animesh Manna wrote:
> vswing/pre-emphasis adjustment calculation is needed in processing
> of auto phy compliance request other than link training, so moved
> the same function in intel_dp.c.
> 
> No functional change.
> 
> Signed-off-by: Animesh Manna 
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c   | 32 +++
>  drivers/gpu/drm/i915/display/intel_dp.h   |  3 ++
>  .../drm/i915/display/intel_dp_link_training.c | 32 ---
>  3 files changed, 35 insertions(+), 32 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2f31d226c6eb..ca82835b6dcf 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4110,6 +4110,38 @@ ivb_cpu_edp_signal_levels(u8 train_set)
>   }
>  }
>  
> +void
> +intel_get_adjust_train(struct intel_dp *intel_dp,
> +const u8 *link_status)

I'd prefer to keep the arrayish notation so we have some idea how big
this is supposed to be. I guess that woukld mean including some
drm dp header in intel_dp.h?

> +{
> + u8 v = 0;
> + u8 p = 0;
> + int lane;
> + u8 voltage_max;
> + u8 preemph_max;
> +
> + for (lane = 0; lane < intel_dp->lane_count; lane++) {
> + u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
> lane);
> + u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
> lane);
> +
> + if (this_v > v)
> + v = this_v;
> + if (this_p > p)
> + p = this_p;
> + }
> +
> + voltage_max = intel_dp_voltage_max(intel_dp);
> + if (v >= voltage_max)
> + v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
> +
> + preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
> + if (p >= preemph_max)
> + p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
> +
> + for (lane = 0; lane < 4; lane++)
> + intel_dp->train_set[lane] = v | p;
> +}
> +
>  void
>  intel_dp_set_signal_levels(struct intel_dp *intel_dp)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 3da166054788..0d0cb692f701 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -91,6 +91,9 @@ void
>  intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
>  u8 dp_train_pat);
>  void
> +intel_get_adjust_train(struct intel_dp *intel_dp,
> +const u8 *link_status);
> +void
>  intel_dp_set_signal_levels(struct intel_dp *intel_dp);
>  void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
>  u8
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 2a1130dd1ad0..1e38584e7d56 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -34,38 +34,6 @@ intel_dp_dump_link_status(const u8 
> link_status[DP_LINK_STATUS_SIZE])
> link_status[3], link_status[4], link_status[5]);
>  }
>  
> -static void
> -intel_get_adjust_train(struct intel_dp *intel_dp,
> -const u8 link_status[DP_LINK_STATUS_SIZE])
> -{
> - u8 v = 0;
> - u8 p = 0;
> - int lane;
> - u8 voltage_max;
> - u8 preemph_max;
> -
> - for (lane = 0; lane < intel_dp->lane_count; lane++) {
> - u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
> lane);
> - u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
> lane);
> -
> - if (this_v > v)
> - v = this_v;
> - if (this_p > p)
> - p = this_p;
> - }
> -
> - voltage_max = intel_dp_voltage_max(intel_dp);
> - if (v >= voltage_max)
> - v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
> -
> - preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
> - if (p >= preemph_max)
> - p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
> -
> - for (lane = 0; lane < 4; lane++)
> - intel_dp->train_set[lane] = v | p;
> -}
> -
>  static bool
>  intel_dp_set_link_train(struct intel_dp *intel_dp,
>   u8 dp_train_pat)
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel
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Re: [PATCH v4 34/51] drm/omap: venc: Register a drm_bridge

2019-12-19 Thread Tomi Valkeinen
Hi Laurent,

On 19/12/2019 12:45, Laurent Pinchart wrote:
> In order to integrate with a chain of drm_bridge, the internal VENC
> encoder has to expose the mode valid, fixup and set, the enable and
> disable and the get modes operations through the drm_bridge API.
> Register a bridge at initialisation time to do so.
> 
> Most of those operations are removed from the omap_dss_device as they
> are now called through the drm_bridge API by the DRM atomic helpers. The
> only exception is the .get_modes() operation that is still invoked
> through the omap_dss_device-based pipeline.
> 
> For the time being make the next bridge in the chain optional as the
> VENC output is still based on omap_dss_device. The create_connector
> argument to the bridge attach function is also ignored for the same
> reason. This will be changed later when removing the related
> omapdrm-specific display drivers.
> 
> Signed-off-by: Laurent Pinchart 
> Reviewed-by: Tomi Valkeinen 
> ---

Something with venc is different than without your series.

I have beagleboard xm, with both DVI and s-video connected. With and without 
your series, kmsprint shows:

Connector 0 (45) DVI-D-1 (connected)
  Encoder 0 (44) TMDS
Crtc 0 (47) 1920x1200 154.000 1920/48/32/80 1200/3/6/26 60 (59.95)
  Plane 0 (32) fb-id: 51 (crtcs: 0 1) 0,0 1920x1200 -> 0,0 1920x1200 (RX12 
AR12 RG16 XR24 RG24 AR24 RA24 RX24)
FB 51 1920x1200
Connector 1 (48) S-Video-1 (unknown)
  Encoder 1 (46) TMDS

Without your series:

# ./kmstest -c s-video
Connector 1/@48: S-Video-1
  Crtc 1/@49: 720x574i@50.00 13.500 720/12/64/68/- 574/5/5/41/- 50 (50.00) 0x1a 
0x48
  Plane 0/@32: 0,0-720x574
Fb 53 720x574-XR24
press enter to exit

and I have a picture on the display.

With your series:

# ./kmstest -c s-video
terminate called after throwing an instance of 'std::invalid_argument'
  what():  no modes available

To be honest, I'm not quite sure how an unknown-connection output should work 
(maybe kmstest doesn't handle it right), but the behavior is different.

 Tomi

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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Patch "drm/mgag200: Store flags from PCI driver data in device structure" has been added to the 5.4-stable tree

2019-12-19 Thread gregkh

This is a note to let you know that I've just added the patch titled

drm/mgag200: Store flags from PCI driver data in device structure

to the 5.4-stable tree which can be found at:

http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
 drm-mgag200-store-flags-from-pci-driver-data-in-device-structure.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let  know about it.


From d6d437d97d54c85a1a93967b2745e31dff03365a Mon Sep 17 00:00:00 2001
From: Thomas Zimmermann 
Date: Tue, 26 Nov 2019 11:15:28 +0100
Subject: drm/mgag200: Store flags from PCI driver data in device structure
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Thomas Zimmermann 

commit d6d437d97d54c85a1a93967b2745e31dff03365a upstream.

The flags field in struct mga_device has been unused so far. We now
use it to store flag bits from the PCI driver.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Daniel Vetter 
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap + 
unpin")
Cc: John Donnelly 
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: "Y.C. Chen" 
Cc: Neil Armstrong 
Cc: Thomas Gleixner 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191126101529.20356-3-tzimmerm...@suse.de
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |8 
 drivers/gpu/drm/mgag200/mgag200_main.c |1 +
 2 files changed, 9 insertions(+)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -160,6 +160,7 @@ enum mga_type {
 };
 
 #define MGAG200_TYPE_MASK  (0x00ff)
+#define MGAG200_FLAG_MASK  (0x0000)
 
 #define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
 
@@ -195,6 +196,13 @@ mgag200_type_from_driver_data(kernel_ulo
 {
return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
 }
+
+static inline unsigned long
+mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
+{
+   return driver_data & MGAG200_FLAG_MASK;
+}
+
/* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
 void mgag200_modeset_fini(struct mga_device *mdev);
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -94,6 +94,7 @@ static int mgag200_device_init(struct dr
struct mga_device *mdev = dev->dev_private;
int ret, option;
 
+   mdev->flags = mgag200_flags_from_driver_data(flags);
mdev->type = mgag200_type_from_driver_data(flags);
 
/* Hardcode the number of CRTCs to 1 */


Patches currently in stable-queue which might be from tzimmerm...@suse.de are

queue-5.4/drm-mgag200-flag-all-g200-se-a-machines-as-broken-wrt-startadd.patch
queue-5.4/drm-mgag200-store-flags-from-pci-driver-data-in-device-structure.patch
queue-5.4/drm-mgag200-add-workaround-for-hw-that-does-not-support-startadd.patch
queue-5.4/drm-mgag200-extract-device-type-from-flags.patch
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Patch "drm/dp_mst: Correct the bug in drm_dp_update_payload_part1()" has been added to the 5.4-stable tree

2019-12-19 Thread gregkh


This is a note to let you know that I've just added the patch titled

drm/dp_mst: Correct the bug in drm_dp_update_payload_part1()

to the 5.4-stable tree which can be found at:

http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
 drm-dp_mst-correct-the-bug-in-drm_dp_update_payload_part1.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let  know about it.


>From e5a6ca27eb72c67533ddfc11c06df84beaa167fa Mon Sep 17 00:00:00 2001
From: Wayne Lin 
Date: Tue, 3 Dec 2019 12:24:23 +0800
Subject: drm/dp_mst: Correct the bug in drm_dp_update_payload_part1()

From: Wayne Lin 

commit e5a6ca27eb72c67533ddfc11c06df84beaa167fa upstream.

[Why]
If the payload_state is DP_PAYLOAD_DELETE_LOCAL in series, current
code doesn't delete the payload at current index and just move the
index to next one after shuffling payloads.

[How]
Drop the i++ increasing part in for loop head and decide whether
to increase the index or not according to payload_state of current
payload.

Changes since v1:
* Refine the code to have it easy reading
* Amend the commit message to meet the way code is modified now.

Signed-off-by: Wayne Lin 
Reviewed-by: Lyude Paul 
Fixes: 706246c761dd ("drm/dp_mst: Refactor drm_dp_update_payload_part1()")
Cc: Daniel Vetter 
Cc: Juston Li 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: Sean Paul 
Cc: David Airlie 
Cc: Daniel Vetter 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.1+
[Added cc for stable]
Signed-off-by: Lyude Paul 
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191203042423.5961-1-wayne@amd.com
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/drm_dp_mst_topology.c |6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2465,9 +2465,11 @@ int drm_dp_update_payload_part1(struct d
drm_dp_mst_topology_put_port(port);
}
 
-   for (i = 0; i < mgr->max_payloads; i++) {
-   if (mgr->payloads[i].payload_state != DP_PAYLOAD_DELETE_LOCAL)
+   for (i = 0; i < mgr->max_payloads; /* do nothing */) {
+   if (mgr->payloads[i].payload_state != DP_PAYLOAD_DELETE_LOCAL) {
+   i++;
continue;
+   }
 
DRM_DEBUG_KMS("removing payload %d\n", i);
for (j = i; j < mgr->max_payloads - 1; j++) {


Patches currently in stable-queue which might be from wayne@amd.com are

queue-5.4/drm-dp_mst-correct-the-bug-in-drm_dp_update_payload_part1.patch
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Patch "drm/mgag200: Extract device type from flags" has been added to the 5.4-stable tree

2019-12-19 Thread gregkh

This is a note to let you know that I've just added the patch titled

drm/mgag200: Extract device type from flags

to the 5.4-stable tree which can be found at:

http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
 drm-mgag200-extract-device-type-from-flags.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let  know about it.


From 3a8a5aba142a44eaeba0cb0ec1b4a8f177b5e59a Mon Sep 17 00:00:00 2001
From: Thomas Zimmermann 
Date: Tue, 26 Nov 2019 11:15:27 +0100
Subject: drm/mgag200: Extract device type from flags
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Thomas Zimmermann 

commit 3a8a5aba142a44eaeba0cb0ec1b4a8f177b5e59a upstream.

Adds a conversion function that extracts the device type from the
PCI id-table flags. Allows for storing additional information in the
other flag bits.

Signed-off-by: Thomas Zimmermann 
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap + 
unpin")
Reviewed-by: Daniel Vetter 
Cc: John Donnelly 
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: Emil Velikov 
Cc: "Y.C. Chen" 
Cc: Laurent Pinchart 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191126101529.20356-2-tzimmerm...@suse.de
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |7 +++
 drivers/gpu/drm/mgag200/mgag200_main.c |2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -159,6 +159,8 @@ enum mga_type {
G200_EW3,
 };
 
+#define MGAG200_TYPE_MASK  (0x00ff)
+
 #define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
 
 struct mga_device {
@@ -188,6 +190,11 @@ struct mga_device {
u32 unique_rev_id;
 };
 
+static inline enum mga_type
+mgag200_type_from_driver_data(kernel_ulong_t driver_data)
+{
+   return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
+}
/* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
 void mgag200_modeset_fini(struct mga_device *mdev);
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -94,7 +94,7 @@ static int mgag200_device_init(struct dr
struct mga_device *mdev = dev->dev_private;
int ret, option;
 
-   mdev->type = flags;
+   mdev->type = mgag200_type_from_driver_data(flags);
 
/* Hardcode the number of CRTCs to 1 */
mdev->num_crtc = 1;


Patches currently in stable-queue which might be from tzimmerm...@suse.de are

queue-5.4/drm-mgag200-flag-all-g200-se-a-machines-as-broken-wrt-startadd.patch
queue-5.4/drm-mgag200-store-flags-from-pci-driver-data-in-device-structure.patch
queue-5.4/drm-mgag200-add-workaround-for-hw-that-does-not-support-startadd.patch
queue-5.4/drm-mgag200-extract-device-type-from-flags.patch
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Patch "drm/mgag200: Flag all G200 SE A machines as broken wrt " has been added to the 5.4-stable tree

2019-12-19 Thread gregkh

This is a note to let you know that I've just added the patch titled

drm/mgag200: Flag all G200 SE A machines as broken wrt 

to the 5.4-stable tree which can be found at:

http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
 drm-mgag200-flag-all-g200-se-a-machines-as-broken-wrt-startadd.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let  know about it.


From 4adf0b49eea926a55fd956ef7d86750f771435ff Mon Sep 17 00:00:00 2001
From: Thomas Zimmermann 
Date: Fri, 6 Dec 2019 09:19:01 +0100
Subject: drm/mgag200: Flag all G200 SE A machines as broken wrt 
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Thomas Zimmermann 

commit 4adf0b49eea926a55fd956ef7d86750f771435ff upstream.

Several MGA G200 SE machines don't respect the value of the startadd
register field. After more feedback on affected machines, neither PCI
subvendor ID nor the internal ID seem to hint towards the bug. All
affected machines have a PCI ID of 0x0522 (i.e., G200 SE A). It was
decided to flag all G200 SE A machines as broken.

Signed-off-by: Thomas Zimmermann 
Acked-by: Gerd Hoffmann 
Fixes: 1591fadf857c ("drm/mgag200: Add workaround for HW that does not support 
'startadd'")
Cc: Thomas Zimmermann 
Cc: John Donnelly 
Cc: Daniel Vetter 
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: "Y.C. Chen" 
Cc: Neil Armstrong 
Cc: Thomas Gleixner 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Cc: Greg Kroah-Hartman 
Cc: Allison Randal 
Cc: Alex Deucher 
Cc: "Noralf Trønnes" 
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191206081901.9938-1-tzimmerm...@suse.de
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -30,9 +30,8 @@ module_param_named(modeset, mgag200_mode
 static struct drm_driver driver;
 
 static const struct pci_device_id pciidlist[] = {
-   { PCI_VENDOR_ID_MATROX, 0x522, PCI_VENDOR_ID_SUN, 0x4852, 0, 0,
+   { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
-   { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A 
},
{ PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B 
},
{ PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
{ PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB },


Patches currently in stable-queue which might be from tzimmerm...@suse.de are

queue-5.4/drm-mgag200-flag-all-g200-se-a-machines-as-broken-wrt-startadd.patch
queue-5.4/drm-mgag200-store-flags-from-pci-driver-data-in-device-structure.patch
queue-5.4/drm-mgag200-add-workaround-for-hw-that-does-not-support-startadd.patch
queue-5.4/drm-mgag200-extract-device-type-from-flags.patch
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Patch "drm/mgag200: Add workaround for HW that does not support 'startadd'" has been added to the 5.4-stable tree

2019-12-19 Thread gregkh

This is a note to let you know that I've just added the patch titled

drm/mgag200: Add workaround for HW that does not support 'startadd'

to the 5.4-stable tree which can be found at:

http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
 drm-mgag200-add-workaround-for-hw-that-does-not-support-startadd.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let  know about it.


From 1591fadf857cdbaf2baa55e421af99a61354713c Mon Sep 17 00:00:00 2001
From: Thomas Zimmermann 
Date: Tue, 26 Nov 2019 11:15:29 +0100
Subject: drm/mgag200: Add workaround for HW that does not support 'startadd'
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Thomas Zimmermann 

commit 1591fadf857cdbaf2baa55e421af99a61354713c upstream.

There's at least one system that does not interpret the value of
the device's 'startadd' field correctly, which leads to incorrectly
displayed scanout buffers. Always placing the active scanout buffer
at offset 0 works around the problem.

Signed-off-by: Thomas Zimmermann 
Reported-by: John Donnelly 
Tested-by: John Donnelly 
Reviewed-by: Daniel Vetter 
Fixes: 81da87f63a1e ("drm: Replace drm_gem_vram_push_to_system() with kunmap + 
unpin")
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: David Airlie 
Cc: Sam Ravnborg 
Cc: "Y.C. Chen" 
Cc: Neil Armstrong 
Cc: Thomas Gleixner 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.3+
Link: https://gitlab.freedesktop.org/drm/misc/issues/7
Link: 
https://patchwork.freedesktop.org/patch/msgid/20191126101529.20356-4-tzimmerm...@suse.de
[drop debugfs_init callback - gregkh]
Signed-off-by: Greg Kroah-Hartman 

---
 drivers/gpu/drm/mgag200/mgag200_drv.c |   35 +-
 drivers/gpu/drm/mgag200/mgag200_drv.h |3 ++
 2 files changed, 37 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -30,6 +30,8 @@ module_param_named(modeset, mgag200_mode
 static struct drm_driver driver;
 
 static const struct pci_device_id pciidlist[] = {
+   { PCI_VENDOR_ID_MATROX, 0x522, PCI_VENDOR_ID_SUN, 0x4852, 0, 0,
+   G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
{ PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_A 
},
{ PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B 
},
{ PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
@@ -63,6 +65,35 @@ static const struct file_operations mgag
DRM_VRAM_MM_FILE_OPERATIONS
 };
 
+static bool mgag200_pin_bo_at_0(const struct mga_device *mdev)
+{
+   return mdev->flags & MGAG200_FLAG_HW_BUG_NO_STARTADD;
+}
+
+int mgag200_driver_dumb_create(struct drm_file *file,
+  struct drm_device *dev,
+  struct drm_mode_create_dumb *args)
+{
+   struct mga_device *mdev = dev->dev_private;
+   unsigned long pg_align;
+
+   if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
+   return -EINVAL;
+
+   pg_align = 0ul;
+
+   /*
+* Aligning scanout buffers to the size of the video ram forces
+* placement at offset 0. Works around a bug where HW does not
+* respect 'startadd' field.
+*/
+   if (mgag200_pin_bo_at_0(mdev))
+   pg_align = PFN_UP(mdev->mc.vram_size);
+
+   return drm_gem_vram_fill_create_dumb(file, dev, >vram_mm->bdev,
+pg_align, false, args);
+}
+
 static struct drm_driver driver = {
.driver_features = DRIVER_GEM | DRIVER_MODESET,
.load = mgag200_driver_load,
@@ -74,7 +105,9 @@ static struct drm_driver driver = {
.major = DRIVER_MAJOR,
.minor = DRIVER_MINOR,
.patchlevel = DRIVER_PATCHLEVEL,
-   DRM_GEM_VRAM_DRIVER
+   .dumb_create = mgag200_driver_dumb_create,
+   .dumb_map_offset = drm_gem_vram_driver_dumb_mmap_offset,
+   .gem_prime_mmap = drm_gem_prime_mmap,
 };
 
 static struct pci_driver mgag200_pci_driver = {
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -159,6 +159,9 @@ enum mga_type {
G200_EW3,
 };
 
+/* HW does not handle 'startadd' field correct. */
+#define MGAG200_FLAG_HW_BUG_NO_STARTADD(1ul << 8)
+
 #define MGAG200_TYPE_MASK  (0x00ff)
 #define MGAG200_FLAG_MASK  (0x0000)
 


Patches currently in stable-queue which might be from tzimmerm...@suse.de are

queue-5.4/drm-mgag200-flag-all-g200-se-a-machines-as-broken-wrt-startadd.patch
queue-5.4/drm-mgag200-store-flags-from-pci-driver-data-in-device-structure.patch
queue-5.4/drm-mgag200-add-workaround-for-hw-that-does-not-support-startadd.patch

Re: Warnings in DRM code when removing/unbinding a driver

2019-12-19 Thread Gerd Hoffmann
  Hi,

> >   Like I said, for most drivers
> > > you can pretty much assume that their unload sequence has been broken
> > > since forever. It's not often tested, and especially the hotunbind
> > > from a device (as opposed to driver unload) stuff wasn't even possible
> > > to get right until just recently.
> >
> > Do you think it's worth trying to fix this for 5.5 and earlier, or just
> > switch to the device-managed interface for 5.6 and forget about 5.5 and
> > earlier?
> 
> I suspect it's going to be quite some trickery to fix this properly
> and everywhere, even for just one driver. Lots of drm drivers
> unfortunately use anti-patterns with wrong lifetimes (e.g. you can't
> use devm_kmalloc for anything that hangs of a drm_device, like
> plane/crtc/connector). Except when it's for a real hotunpluggable
> device (usb) we've never bothered backporting these fixes. Too much
> broken stuff unfortunately.

While being at it:  How would a driver cleanup properly cleanup gem
objects created by userspace on hotunbind?  Specifically a gem object
pinned to vram?

cheers,
  Gerd

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linux-next: Signed-off-by missing for commits in the drm-intel-fixes tree

2019-12-19 Thread Stephen Rothwell
Hi all,

Commits

  987e379d7500 ("Revert "devtmpfs: use do_mount() instead of ksys_mount()"")
  9bd5ba4fe25a ("Revert "initrd: use do_mount() instead of ksys_mount()"")
  fa31001c96ad ("Revert "init: use do_mount() instead of ksys_mount()"")

are missing a Signed-off-by from their author and committer.

Reverts are commits too and should have reasonable commit messages.

-- 
Cheers,
Stephen Rothwell


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Re: [PATCH v2 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation

2019-12-19 Thread Jani Nikula
On Wed, 18 Dec 2019, Animesh Manna  wrote:
> vswing/pre-emphasis adjustment calculation is needed in processing
> of auto phy compliance request other than link training, so moved
> the same function in intel_dp.c.
>
> No functional change.
>
> Signed-off-by: Animesh Manna 
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c   | 32 +++
>  drivers/gpu/drm/i915/display/intel_dp.h   |  3 ++
>  .../drm/i915/display/intel_dp_link_training.c | 32 ---
>  3 files changed, 35 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2f31d226c6eb..ca82835b6dcf 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4110,6 +4110,38 @@ ivb_cpu_edp_signal_levels(u8 train_set)
>   }
>  }
>  
> +void
> +intel_get_adjust_train(struct intel_dp *intel_dp,

Please follow the naming convention of prefixing non-static functions in
foo.c with foo_. I.e. intel_dp_ here.

BR,
Jani.

> +const u8 *link_status)
> +{
> + u8 v = 0;
> + u8 p = 0;
> + int lane;
> + u8 voltage_max;
> + u8 preemph_max;
> +
> + for (lane = 0; lane < intel_dp->lane_count; lane++) {
> + u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
> lane);
> + u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
> lane);
> +
> + if (this_v > v)
> + v = this_v;
> + if (this_p > p)
> + p = this_p;
> + }
> +
> + voltage_max = intel_dp_voltage_max(intel_dp);
> + if (v >= voltage_max)
> + v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
> +
> + preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
> + if (p >= preemph_max)
> + p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
> +
> + for (lane = 0; lane < 4; lane++)
> + intel_dp->train_set[lane] = v | p;
> +}
> +
>  void
>  intel_dp_set_signal_levels(struct intel_dp *intel_dp)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 3da166054788..0d0cb692f701 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -91,6 +91,9 @@ void
>  intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
>  u8 dp_train_pat);
>  void
> +intel_get_adjust_train(struct intel_dp *intel_dp,
> +const u8 *link_status);
> +void
>  intel_dp_set_signal_levels(struct intel_dp *intel_dp);
>  void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
>  u8
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 2a1130dd1ad0..1e38584e7d56 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -34,38 +34,6 @@ intel_dp_dump_link_status(const u8 
> link_status[DP_LINK_STATUS_SIZE])
> link_status[3], link_status[4], link_status[5]);
>  }
>  
> -static void
> -intel_get_adjust_train(struct intel_dp *intel_dp,
> -const u8 link_status[DP_LINK_STATUS_SIZE])
> -{
> - u8 v = 0;
> - u8 p = 0;
> - int lane;
> - u8 voltage_max;
> - u8 preemph_max;
> -
> - for (lane = 0; lane < intel_dp->lane_count; lane++) {
> - u8 this_v = drm_dp_get_adjust_request_voltage(link_status, 
> lane);
> - u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, 
> lane);
> -
> - if (this_v > v)
> - v = this_v;
> - if (this_p > p)
> - p = this_p;
> - }
> -
> - voltage_max = intel_dp_voltage_max(intel_dp);
> - if (v >= voltage_max)
> - v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
> -
> - preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
> - if (p >= preemph_max)
> - p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
> -
> - for (lane = 0; lane < 4; lane++)
> - intel_dp->train_set[lane] = v | p;
> -}
> -
>  static bool
>  intel_dp_set_link_train(struct intel_dp *intel_dp,
>   u8 dp_train_pat)

-- 
Jani Nikula, Intel Open Source Graphics Center
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[PATCH v4 45/51] drm/omap: dpi: Register a drm_bridge

2019-12-19 Thread Laurent Pinchart
In order to integrate with a chain of drm_bridge, the internal DPI
output has to expose its operations through the drm_bridge API.
Register a bridge at initialisation time to do so and remove the
omap_dss_device operations that are now unused.

Signed-off-by: Laurent Pinchart 
---
Changes since v3:

- Drop unneeded lock

Changes since v2:

- Unregister bridge if port initialisation fails
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 211 +-
 1 file changed, 118 insertions(+), 93 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index c167bd1116ec..f1b2d1c5bfa6 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -21,6 +21,8 @@
 #include 
 #include 
 
+#include 
+
 #include "dss.h"
 #include "omapdss.h"
 
@@ -34,19 +36,15 @@ struct dpi_data {
enum dss_clk_source clk_src;
struct dss_pll *pll;
 
-   struct mutex lock;
-
struct dss_lcd_mgr_config mgr_config;
unsigned long pixelclock;
int data_lines;
 
struct omap_dss_device output;
+   struct drm_bridge bridge;
 };
 
-static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device 
*dssdev)
-{
-   return container_of(dssdev, struct dpi_data, output);
-}
+#define drm_bridge_to_dpi(bridge) container_of(bridge, struct dpi_data, bridge)
 
 /* 
-
  * Clock Handling and PLL
@@ -354,6 +352,32 @@ static void dpi_config_lcd_manager(struct dpi_data *dpi)
dss_mgr_set_lcd_config(>output, >mgr_config);
 }
 
+static int dpi_clock_update(struct dpi_data *dpi, unsigned long *clock)
+{
+   int lck_div, pck_div;
+   unsigned long fck;
+   struct dpi_clk_calc_ctx ctx;
+
+   if (dpi->pll) {
+   if (!dpi_pll_clk_calc(dpi, *clock, ))
+   return -EINVAL;
+
+   fck = ctx.pll_cinfo.clkout[ctx.clkout_idx];
+   } else {
+   if (!dpi_dss_clk_calc(dpi, *clock, ))
+   return -EINVAL;
+
+   fck = ctx.fck;
+   }
+
+   lck_div = ctx.dispc_cinfo.lck_div;
+   pck_div = ctx.dispc_cinfo.pck_div;
+
+   *clock = fck / lck_div / pck_div;
+
+   return 0;
+}
+
 static int dpi_verify_pll(struct dss_pll *pll)
 {
int r;
@@ -391,44 +415,87 @@ static void dpi_init_pll(struct dpi_data *dpi)
 }
 
 /* 
-
- * omap_dss_device Operations
+ * DRM Bridge Operations
  */
 
-static int dpi_connect(struct omap_dss_device *src,
-  struct omap_dss_device *dst)
+static int dpi_bridge_attach(struct drm_bridge *bridge,
+enum drm_bridge_attach_flags flags)
 {
-   struct dpi_data *dpi = dpi_get_data_from_dssdev(dst);
+   struct dpi_data *dpi = drm_bridge_to_dpi(bridge);
+
+   if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
+   return -EINVAL;
 
dpi_init_pll(dpi);
 
-   return omapdss_device_connect(dst->dss, dst, dst->next);
+   return drm_bridge_attach(bridge->encoder, dpi->output.next_bridge,
+bridge, flags);
 }
 
-static void dpi_disconnect(struct omap_dss_device *src,
-  struct omap_dss_device *dst)
+static enum drm_mode_status
+dpi_bridge_mode_valid(struct drm_bridge *bridge,
+  const struct drm_display_mode *mode)
 {
-   omapdss_device_disconnect(dst, dst->next);
+   struct dpi_data *dpi = drm_bridge_to_dpi(bridge);
+   unsigned long clock = mode->clock * 1000;
+   int ret;
+
+   if (mode->hdisplay % 8 != 0)
+   return MODE_BAD_WIDTH;
+
+   if (mode->clock == 0)
+   return MODE_NOCLOCK;
+
+   ret = dpi_clock_update(dpi, );
+   if (ret < 0)
+   return MODE_CLOCK_RANGE;
+
+   return MODE_OK;
 }
 
-static void dpi_display_enable(struct omap_dss_device *dssdev)
+static bool dpi_bridge_mode_fixup(struct drm_bridge *bridge,
+  const struct drm_display_mode *mode,
+  struct drm_display_mode *adjusted_mode)
 {
-   struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
-   struct omap_dss_device *out = >output;
-   int r;
+   struct dpi_data *dpi = drm_bridge_to_dpi(bridge);
+   unsigned long clock = mode->clock * 1000;
+   int ret;
+
+   ret = dpi_clock_update(dpi, );
+   if (ret < 0)
+   return false;
+
+   adjusted_mode->clock = clock / 1000;
+
+   return true;
+}
 
-   mutex_lock(>lock);
+static void dpi_bridge_mode_set(struct drm_bridge *bridge,
+const struct drm_display_mode *mode,
+const struct drm_display_mode *adjusted_mode)
+{
+   struct dpi_data *dpi = drm_bridge_to_dpi(bridge);
+
+   dpi->pixelclock = adjusted_mode->clock * 1000;

[PATCH v4 40/51] drm/omap: hdmi4: Simplify EDID read

2019-12-19 Thread Laurent Pinchart
Now that the omap_dss_device EDID read operation has been removed,
simplify the bridge-based EDID access by merging multiple functions
together.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/hdmi4.c | 96 -
 1 file changed, 40 insertions(+), 56 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index 34db86ba6193..aa253d4902fe 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -308,55 +308,6 @@ void hdmi4_core_disable(struct hdmi_core_data *core)
mutex_unlock(>lock);
 }
 
-static struct edid *
-hdmi_do_read_edid(struct omap_hdmi *hdmi,
- struct edid *(*read)(struct omap_hdmi *hdmi,
-  struct drm_connector *connector),
- struct drm_connector *connector)
-{
-   struct edid *edid = NULL;
-   unsigned int cec_addr;
-   bool need_enable;
-   int r;
-
-   need_enable = hdmi->core_enabled == false;
-
-   if (need_enable) {
-   r = hdmi4_core_enable(>core);
-   if (r)
-   return NULL;
-   }
-
-   mutex_lock(>lock);
-   r = hdmi_runtime_get(hdmi);
-   BUG_ON(r);
-
-   r = hdmi4_core_ddc_init(>core);
-   if (r)
-   goto done;
-
-   edid = read(hdmi, connector);
-
-done:
-   hdmi_runtime_put(hdmi);
-   mutex_unlock(>lock);
-
-   if (edid && edid->extensions) {
-   unsigned int len = (edid->extensions + 1) * EDID_LENGTH;
-
-   cec_addr = cec_get_edid_phys_addr((u8 *)edid, len, NULL);
-   } else {
-   cec_addr = CEC_PHYS_ADDR_INVALID;
-   }
-
-   hdmi4_cec_set_phys_addr(>core, cec_addr);
-
-   if (need_enable)
-   hdmi4_core_disable(>core);
-
-   return edid;
-}
-
 /* 
-
  * DRM Bridge Operations
  */
@@ -483,18 +434,51 @@ static void hdmi4_bridge_hpd_notify(struct drm_bridge 
*bridge,
hdmi4_cec_set_phys_addr(>core, CEC_PHYS_ADDR_INVALID);
 }
 
-static struct edid *hdmi4_bridge_read_edid(struct omap_hdmi *hdmi,
-  struct drm_connector *connector)
-{
-   return drm_do_get_edid(connector, hdmi4_core_ddc_read, >core);
-}
-
 static struct edid *hdmi4_bridge_get_edid(struct drm_bridge *bridge,
  struct drm_connector *connector)
 {
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
+   struct edid *edid = NULL;
+   unsigned int cec_addr;
+   bool need_enable;
+   int r;
+
+   need_enable = hdmi->core_enabled == false;
+
+   if (need_enable) {
+   r = hdmi4_core_enable(>core);
+   if (r)
+   return NULL;
+   }
+
+   mutex_lock(>lock);
+   r = hdmi_runtime_get(hdmi);
+   BUG_ON(r);
+
+   r = hdmi4_core_ddc_init(>core);
+   if (r)
+   goto done;
+
+   edid = drm_do_get_edid(connector, hdmi4_core_ddc_read, >core);
 
-   return hdmi_do_read_edid(hdmi, hdmi4_bridge_read_edid, connector);
+done:
+   hdmi_runtime_put(hdmi);
+   mutex_unlock(>lock);
+
+   if (edid && edid->extensions) {
+   unsigned int len = (edid->extensions + 1) * EDID_LENGTH;
+
+   cec_addr = cec_get_edid_phys_addr((u8 *)edid, len, NULL);
+   } else {
+   cec_addr = CEC_PHYS_ADDR_INVALID;
+   }
+
+   hdmi4_cec_set_phys_addr(>core, cec_addr);
+
+   if (need_enable)
+   hdmi4_core_disable(>core);
+
+   return edid;
 }
 
 static const struct drm_bridge_funcs hdmi4_bridge_funcs = {
-- 
Regards,

Laurent Pinchart

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[PATCH v4 50/51] drm/omap: dss: Inline the omapdss_display_get() function

2019-12-19 Thread Laurent Pinchart
Inline the omapdss_display_get() in its only caller to simplify the
code.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/display.c | 9 -
 drivers/gpu/drm/omapdrm/dss/omapdss.h | 1 -
 drivers/gpu/drm/omapdrm/omap_drv.c| 7 ---
 3 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/display.c 
b/drivers/gpu/drm/omapdrm/dss/display.c
index 8a3f61f5825f..3b82158b1bfd 100644
--- a/drivers/gpu/drm/omapdrm/dss/display.c
+++ b/drivers/gpu/drm/omapdrm/dss/display.c
@@ -40,15 +40,6 @@ void omapdss_display_init(struct omap_dss_device *dssdev)
 }
 EXPORT_SYMBOL_GPL(omapdss_display_init);
 
-struct omap_dss_device *omapdss_display_get(struct omap_dss_device *output)
-{
-   while (output->next)
-   output = output->next;
-
-   return omapdss_device_get(output);
-}
-EXPORT_SYMBOL_GPL(omapdss_display_get);
-
 int omapdss_display_get_modes(struct drm_connector *connector,
  const struct videomode *vm)
 {
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 64aedc50cb0b..6ecbc7273032 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -432,7 +432,6 @@ static inline bool omapdss_is_initialized(void)
 }
 
 void omapdss_display_init(struct omap_dss_device *dssdev);
-struct omap_dss_device *omapdss_display_get(struct omap_dss_device *output);
 int omapdss_display_get_modes(struct drm_connector *connector,
  const struct videomode *vm);
 
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c 
b/drivers/gpu/drm/omapdrm/omap_drv.c
index e6a065030523..cdafd7ef1c32 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -207,11 +207,12 @@ static int omap_display_id(struct omap_dss_device *output)
struct device_node *node = NULL;
 
if (output->next) {
-   struct omap_dss_device *display;
+   struct omap_dss_device *display = output;
+
+   while (display->next)
+   display = display->next;
 
-   display = omapdss_display_get(output);
node = display->dev->of_node;
-   omapdss_device_put(display);
} else if (output->bridge) {
struct drm_bridge *bridge = output->bridge;
 
-- 
Regards,

Laurent Pinchart

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[PATCH v4 23/51] drm/omap: Add infrastructure to support drm_bridge local to DSS outputs

2019-12-19 Thread Laurent Pinchart
In order to support drm_bridge-based pipeline, the internal HDMI
encoders will need to expose the EDID read operation through the
drm_bridge API, and thus to expose a drm_bridge instance corresponding
to the encoder. The HDMI encoders are however handled as omap_dss_device
instances, which conflicts with this requirement.

In order to move forward with the drm_bridge transition, add support for
creating drm_bridge instances local to DSS outputs. If a local bridge is
passed to the omapdss_device_init_output() function, it is used as the
first bridge in the chain, and the omap_dss_device.next_bridge field is
set to the next bridge for the use of the internal encoders' bridges.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/dsi.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi4.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c   |  2 +-
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  4 +++-
 drivers/gpu/drm/omapdrm/dss/output.c  | 20 
 drivers/gpu/drm/omapdrm/dss/sdi.c |  2 +-
 drivers/gpu/drm/omapdrm/dss/venc.c|  2 +-
 drivers/gpu/drm/omapdrm/omap_drv.c|  2 +-
 9 files changed, 26 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index 462ed6f3118a..2d0eb5fcbb5b 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -629,7 +629,7 @@ static int dpi_init_output_port(struct dpi_data *dpi, 
struct device_node *port)
out->ops = _ops;
out->owner = THIS_MODULE;
 
-   r = omapdss_device_init_output(out);
+   r = omapdss_device_init_output(out, NULL);
if (r < 0)
return r;
 
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c 
b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 6379eea124d1..79ddfbfd1b58 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -5121,7 +5121,7 @@ static int dsi_init_output(struct dsi_data *dsi)
   | DRM_BUS_FLAG_DE_HIGH
   | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE;
 
-   r = omapdss_device_init_output(out);
+   r = omapdss_device_init_output(out, NULL);
if (r < 0)
return r;
 
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index 44075718407b..dd4a14fe7e59 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -676,7 +676,7 @@ static int hdmi4_init_output(struct omap_hdmi *hdmi)
out->of_port = 0;
out->ops_flags = OMAP_DSS_DEVICE_OP_EDID;
 
-   r = omapdss_device_init_output(out);
+   r = omapdss_device_init_output(out, NULL);
if (r < 0)
return r;
 
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 1b5bd44ee09d..8e3790dd8b98 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -660,7 +660,7 @@ static int hdmi5_init_output(struct omap_hdmi *hdmi)
out->of_port = 0;
out->ops_flags = OMAP_DSS_DEVICE_OP_EDID;
 
-   r = omapdss_device_init_output(out);
+   r = omapdss_device_init_output(out, NULL);
if (r < 0)
return r;
 
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index b48a51d11310..82e9bfa5530a 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -400,6 +400,7 @@ struct omap_dss_device {
struct dss_device *dss;
struct omap_dss_device *next;
struct drm_bridge *bridge;
+   struct drm_bridge *next_bridge;
struct drm_panel *panel;
 
struct list_head list;
@@ -488,7 +489,8 @@ int omap_dss_get_num_overlays(void);
 #define for_each_dss_output(d) \
while ((d = omapdss_device_next_output(d)) != NULL)
 struct omap_dss_device *omapdss_device_next_output(struct omap_dss_device 
*from);
-int omapdss_device_init_output(struct omap_dss_device *out);
+int omapdss_device_init_output(struct omap_dss_device *out,
+  struct drm_bridge *local_bridge);
 void omapdss_device_cleanup_output(struct omap_dss_device *out);
 
 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
diff --git a/drivers/gpu/drm/omapdrm/dss/output.c 
b/drivers/gpu/drm/omapdrm/dss/output.c
index c1ec9d343e53..9ba7cc8539a1 100644
--- a/drivers/gpu/drm/omapdrm/dss/output.c
+++ b/drivers/gpu/drm/omapdrm/dss/output.c
@@ -17,7 +17,8 @@
 #include "dss.h"
 #include "omapdss.h"
 
-int omapdss_device_init_output(struct omap_dss_device *out)
+int omapdss_device_init_output(struct omap_dss_device *out,
+  struct drm_bridge *local_bridge)
 {
struct device_node *remote_node;
int ret;
@@ -58,10 +59,20 @@ int omapdss_device_init_output(struct omap_dss_device *out)
out->bridge = bridge;
}
 
-   return out->next || 

[PATCH v4 47/51] drm/omap: sdi: Register a drm_bridge

2019-12-19 Thread Laurent Pinchart
In order to integrate with a chain of drm_bridge, the internal SDI
output has to expose its operations through the drm_bridge API.
Register a bridge at initialisation time to do so and remove the
omap_dss_device operations that are now unused.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v3:

- Split dss/base.h and omap_connector.c cleanups to a separate patch

Changes since v2:

- Remove unused omapdss_device_connector_type() function
- Unregister bridge if port initialisation fails

wip
---
 drivers/gpu/drm/omapdrm/dss/sdi.c | 168 +++---
 1 file changed, 109 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/sdi.c 
b/drivers/gpu/drm/omapdrm/dss/sdi.c
index 7dedfcc86922..6ad9d1b94ec0 100644
--- a/drivers/gpu/drm/omapdrm/dss/sdi.c
+++ b/drivers/gpu/drm/omapdrm/dss/sdi.c
@@ -15,6 +15,8 @@
 #include 
 #include 
 
+#include 
+
 #include "dss.h"
 #include "omapdss.h"
 
@@ -30,9 +32,11 @@ struct sdi_device {
int datapairs;
 
struct omap_dss_device output;
+   struct drm_bridge bridge;
 };
 
-#define dssdev_to_sdi(dssdev) container_of(dssdev, struct sdi_device, output)
+#define drm_bridge_to_sdi(bridge) \
+   container_of(bridge, struct sdi_device, bridge)
 
 struct sdi_clk_calc_ctx {
struct sdi_device *sdi;
@@ -118,9 +122,82 @@ static void sdi_config_lcd_manager(struct sdi_device *sdi)
dss_mgr_set_lcd_config(>output, >mgr_config);
 }
 
-static void sdi_display_enable(struct omap_dss_device *dssdev)
+/* 
-
+ * DRM Bridge Operations
+ */
+
+static int sdi_bridge_attach(struct drm_bridge *bridge,
+enum drm_bridge_attach_flags flags)
+{
+   struct sdi_device *sdi = drm_bridge_to_sdi(bridge);
+
+   if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
+   return -EINVAL;
+
+   return drm_bridge_attach(bridge->encoder, sdi->output.next_bridge,
+bridge, flags);
+}
+
+static enum drm_mode_status
+sdi_bridge_mode_valid(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode)
+{
+   struct sdi_device *sdi = drm_bridge_to_sdi(bridge);
+   unsigned long pixelclock = mode->clock * 1000;
+   struct dispc_clock_info dispc_cinfo;
+   unsigned long fck;
+   int ret;
+
+   if (pixelclock == 0)
+   return MODE_NOCLOCK;
+
+   ret = sdi_calc_clock_div(sdi, pixelclock, , _cinfo);
+   if (ret < 0)
+   return MODE_CLOCK_RANGE;
+
+   return MODE_OK;
+}
+
+static bool sdi_bridge_mode_fixup(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+   struct sdi_device *sdi = drm_bridge_to_sdi(bridge);
+   unsigned long pixelclock = mode->clock * 1000;
+   struct dispc_clock_info dispc_cinfo;
+   unsigned long fck;
+   unsigned long pck;
+   int ret;
+
+   ret = sdi_calc_clock_div(sdi, pixelclock, , _cinfo);
+   if (ret < 0)
+   return false;
+
+   pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div;
+
+   if (pck != pixelclock)
+   dev_dbg(>pdev->dev,
+   "pixel clock adjusted from %lu Hz to %lu Hz\n",
+   pixelclock, pck);
+
+   adjusted_mode->clock = pck / 1000;
+
+   return true;
+}
+
+static void sdi_bridge_mode_set(struct drm_bridge *bridge,
+   const struct drm_display_mode *mode,
+   const struct drm_display_mode *adjusted_mode)
+{
+   struct sdi_device *sdi = drm_bridge_to_sdi(bridge);
+
+   sdi->pixelclock = adjusted_mode->clock * 1000;
+}
+
+static void sdi_bridge_enable(struct drm_bridge *bridge,
+ struct drm_atomic_state *state)
 {
-   struct sdi_device *sdi = dssdev_to_sdi(dssdev);
+   struct sdi_device *sdi = drm_bridge_to_sdi(bridge);
struct dispc_clock_info dispc_cinfo;
unsigned long fck;
int r;
@@ -181,9 +258,10 @@ static void sdi_display_enable(struct omap_dss_device 
*dssdev)
regulator_disable(sdi->vdds_sdi_reg);
 }
 
-static void sdi_display_disable(struct omap_dss_device *dssdev)
+static void sdi_bridge_disable(struct drm_bridge *bridge,
+  struct drm_atomic_state *state)
 {
-   struct sdi_device *sdi = dssdev_to_sdi(dssdev);
+   struct sdi_device *sdi = drm_bridge_to_sdi(bridge);
 
dss_mgr_disable(>output);
 
@@ -194,71 +272,40 @@ static void sdi_display_disable(struct omap_dss_device 
*dssdev)
regulator_disable(sdi->vdds_sdi_reg);
 }
 
-static void sdi_set_timings(struct omap_dss_device *dssdev,
-   const struct drm_display_mode *mode)
-{
-   struct sdi_device *sdi = dssdev_to_sdi(dssdev);
-
-   sdi->pixelclock = 

[PATCH v4 49/51] drm/omap: dss: Remove unused omap_dss_device operations

2019-12-19 Thread Laurent Pinchart
The omap_dss_device .pre_enable(), .post_disable() and .set_timings()
are not used anymore. Remove them.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/base.c | 26 ---
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  6 
 drivers/gpu/drm/omapdrm/omap_encoder.c | 44 +++---
 3 files changed, 5 insertions(+), 71 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/base.c 
b/drivers/gpu/drm/omapdrm/dss/base.c
index 455b410f7401..c7650a7c155d 100644
--- a/drivers/gpu/drm/omapdrm/dss/base.c
+++ b/drivers/gpu/drm/omapdrm/dss/base.c
@@ -234,18 +234,6 @@ void omapdss_device_disconnect(struct omap_dss_device *src,
 }
 EXPORT_SYMBOL_GPL(omapdss_device_disconnect);
 
-void omapdss_device_pre_enable(struct omap_dss_device *dssdev)
-{
-   if (!dssdev)
-   return;
-
-   omapdss_device_pre_enable(dssdev->next);
-
-   if (dssdev->ops && dssdev->ops->pre_enable)
-   dssdev->ops->pre_enable(dssdev);
-}
-EXPORT_SYMBOL_GPL(omapdss_device_pre_enable);
-
 void omapdss_device_enable(struct omap_dss_device *dssdev)
 {
if (!dssdev)
@@ -272,20 +260,6 @@ void omapdss_device_disable(struct omap_dss_device *dssdev)
 }
 EXPORT_SYMBOL_GPL(omapdss_device_disable);
 
-void omapdss_device_post_disable(struct omap_dss_device *dssdev)
-{
-   if (!dssdev)
-   return;
-
-   if (dssdev->ops && dssdev->ops->post_disable)
-   dssdev->ops->post_disable(dssdev);
-
-   omapdss_device_post_disable(dssdev->next);
-
-   dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
-}
-EXPORT_SYMBOL_GPL(omapdss_device_post_disable);
-
 /* 
-
  * Components Handling
  */
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 2e5453df2293..64aedc50cb0b 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -342,15 +342,11 @@ struct omap_dss_device_ops {
void (*disconnect)(struct omap_dss_device *dssdev,
struct omap_dss_device *dst);
 
-   void (*pre_enable)(struct omap_dss_device *dssdev);
void (*enable)(struct omap_dss_device *dssdev);
void (*disable)(struct omap_dss_device *dssdev);
-   void (*post_disable)(struct omap_dss_device *dssdev);
 
int (*check_timings)(struct omap_dss_device *dssdev,
 struct drm_display_mode *mode);
-   void (*set_timings)(struct omap_dss_device *dssdev,
-   const struct drm_display_mode *mode);
 
int (*get_modes)(struct omap_dss_device *dssdev,
 struct drm_connector *connector);
@@ -450,10 +446,8 @@ int omapdss_device_connect(struct dss_device *dss,
   struct omap_dss_device *dst);
 void omapdss_device_disconnect(struct omap_dss_device *src,
   struct omap_dss_device *dst);
-void omapdss_device_pre_enable(struct omap_dss_device *dssdev);
 void omapdss_device_enable(struct omap_dss_device *dssdev);
 void omapdss_device_disable(struct omap_dss_device *dssdev);
-void omapdss_device_post_disable(struct omap_dss_device *dssdev);
 
 int omap_dss_get_num_overlay_managers(void);
 
diff --git a/drivers/gpu/drm/omapdrm/omap_encoder.c 
b/drivers/gpu/drm/omapdrm/omap_encoder.c
index 18a79dde6815..ae4b867a67a3 100644
--- a/drivers/gpu/drm/omapdrm/omap_encoder.c
+++ b/drivers/gpu/drm/omapdrm/omap_encoder.c
@@ -113,13 +113,8 @@ static void omap_encoder_mode_set(struct drm_encoder 
*encoder,
bus_flags = connector->display_info.bus_flags;
omap_encoder_update_videomode_flags(, bus_flags);
 
-   /* Set timings for all devices in the display pipeline. */
+   /* Set timings for the dss manager. */
dss_mgr_set_timings(output, );
-
-   for (dssdev = output; dssdev; dssdev = dssdev->next) {
-   if (dssdev->ops && dssdev->ops->set_timings)
-   dssdev->ops->set_timings(dssdev, adjusted_mode);
-   }
 }
 
 static void omap_encoder_disable(struct drm_encoder *encoder)
@@ -132,26 +127,10 @@ static void omap_encoder_disable(struct drm_encoder 
*encoder)
 
/*
 * Disable the chain of external devices, starting at the one at the
-* internal encoder's output.
+* internal encoder's output. This is used for DSI outputs only, as
+* dssdev->next is NULL for all other outputs.
 */
omapdss_device_disable(dssdev->next);
-
-   /*
-* Disable the internal encoder. This will disable the DSS output. The
-* DSI is treated as an exception as DSI pipelines still use the legacy
-* flow where the pipeline output controls the encoder.
-*/
-   if (dssdev->type != OMAP_DISPLAY_TYPE_DSI) {
-   if (dssdev->ops && dssdev->ops->disable)
-   dssdev->ops->disable(dssdev);
-

[PATCH v4 39/51] drm/omap: venc: Remove omap_dss_device operations

2019-12-19 Thread Laurent Pinchart
Now that the VENC output is driven fully through the drm_bridge API its
omap_dss_device operations are not used anymore. Remove them.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/venc.c | 45 --
 1 file changed, 45 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c 
b/drivers/gpu/drm/omapdrm/dss/venc.c
index 2d7a03f52c0d..fe3330e31710 100644
--- a/drivers/gpu/drm/omapdrm/dss/venc.c
+++ b/drivers/gpu/drm/omapdrm/dss/venc.c
@@ -306,7 +306,6 @@ struct venc_device {
struct drm_bridge bridge;
 };
 
-#define dssdev_to_venc(dssdev) container_of(dssdev, struct venc_device, output)
 #define drm_bridge_to_venc(b) container_of(b, struct venc_device, bridge)
 
 static inline void venc_write_reg(struct venc_device *venc, int idx, u32 val)
@@ -479,30 +478,6 @@ static void venc_power_off(struct venc_device *venc)
venc_runtime_put(venc);
 }
 
-static int venc_get_modes(struct omap_dss_device *dssdev,
- struct drm_connector *connector)
-{
-   static const struct drm_display_mode *modes[] = {
-   _dss_pal_mode,
-   _dss_ntsc_mode,
-   };
-   unsigned int i;
-
-   for (i = 0; i < ARRAY_SIZE(modes); ++i) {
-   struct drm_display_mode *mode;
-
-   mode = drm_mode_duplicate(connector->dev, modes[i]);
-   if (!mode)
-   return i;
-
-   mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
-   drm_mode_set_name(mode);
-   drm_mode_probed_add(connector, mode);
-   }
-
-   return ARRAY_SIZE(modes);
-}
-
 static enum venc_videomode venc_get_videomode(const struct drm_display_mode 
*mode)
 {
if (!(mode->flags & DRM_MODE_FLAG_INTERLACE))
@@ -598,25 +573,6 @@ static int venc_get_clocks(struct venc_device *venc)
return 0;
 }
 
-static int venc_connect(struct omap_dss_device *src,
-   struct omap_dss_device *dst)
-{
-   return omapdss_device_connect(dst->dss, dst, dst->next);
-}
-
-static void venc_disconnect(struct omap_dss_device *src,
-   struct omap_dss_device *dst)
-{
-   omapdss_device_disconnect(dst, dst->next);
-}
-
-static const struct omap_dss_device_ops venc_ops = {
-   .connect = venc_connect,
-   .disconnect = venc_disconnect,
-
-   .get_modes = venc_get_modes,
-};
-
 /* 
-
  * DRM Bridge Operations
  */
@@ -817,7 +773,6 @@ static int venc_init_output(struct venc_device *venc)
out->type = OMAP_DISPLAY_TYPE_VENC;
out->name = "venc.0";
out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
-   out->ops = _ops;
out->owner = THIS_MODULE;
out->of_port = 0;
out->ops_flags = OMAP_DSS_DEVICE_OP_MODES;
-- 
Regards,

Laurent Pinchart

___
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel


[PATCH v4 36/51] drm/omap: Switch the HDMI and VENC outputs to drm_bridge

2019-12-19 Thread Laurent Pinchart
The TPD12S015, OPA362 and analog and HDMI connectors are now supported
by DRM bridge drivers, and the omapdrm HDMI and VENC outputs can be
handled through the drm_bridge API. Switch the outputs to drm_bridge by
making the next bridge mandatory and removing the related
omapdrm-specific display drivers.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v3:

- Update arch/arm/configs/omap2plus_defconfig
---
 arch/arm/configs/omap2plus_defconfig  |   7 +-
 drivers/gpu/drm/omapdrm/displays/Kconfig  |  22 --
 drivers/gpu/drm/omapdrm/displays/Makefile |   4 -
 .../omapdrm/displays/connector-analog-tv.c|  97 
 .../gpu/drm/omapdrm/displays/connector-hdmi.c | 183 ---
 .../gpu/drm/omapdrm/displays/encoder-opa362.c | 137 ---
 .../drm/omapdrm/displays/encoder-tpd12s015.c  | 217 --
 drivers/gpu/drm/omapdrm/dss/hdmi4.c   |   4 +-
 drivers/gpu/drm/omapdrm/dss/hdmi5.c   |   4 +-
 .../gpu/drm/omapdrm/dss/omapdss-boot-init.c   |   5 -
 drivers/gpu/drm/omapdrm/dss/output.c  |   5 +
 drivers/gpu/drm/omapdrm/dss/venc.c|   4 +-
 12 files changed, 14 insertions(+), 675 deletions(-)
 delete mode 100644 drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
 delete mode 100644 drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
 delete mode 100644 drivers/gpu/drm/omapdrm/displays/encoder-opa362.c
 delete mode 100644 drivers/gpu/drm/omapdrm/displays/encoder-tpd12s015.c

diff --git a/arch/arm/configs/omap2plus_defconfig 
b/arch/arm/configs/omap2plus_defconfig
index 8c37cc8ab6f2..a74abf4ac468 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -348,14 +348,13 @@ CONFIG_DRM_OMAP=m
 CONFIG_OMAP5_DSS_HDMI=y
 CONFIG_OMAP2_DSS_SDI=y
 CONFIG_OMAP2_DSS_DSI=y
-CONFIG_DRM_OMAP_ENCODER_OPA362=m
-CONFIG_DRM_OMAP_ENCODER_TPD12S015=m
-CONFIG_DRM_OMAP_CONNECTOR_HDMI=m
-CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=m
 CONFIG_DRM_OMAP_PANEL_DSI_CM=m
 CONFIG_DRM_TILCDC=m
 CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_DISPLAY_CONNECTOR=m
+CONFIG_DRM_SIMPLE_BRIDGE=m
 CONFIG_DRM_TI_TFP410=m
+CONFIG_DRM_TI_TPD12S015=m
 CONFIG_DRM_PANEL_LG_LB035Q02=m
 CONFIG_DRM_PANEL_NEC_NL8048HL11=m
 CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
diff --git a/drivers/gpu/drm/omapdrm/displays/Kconfig 
b/drivers/gpu/drm/omapdrm/displays/Kconfig
index b562a8cd61bf..f2be594c7eff 100644
--- a/drivers/gpu/drm/omapdrm/displays/Kconfig
+++ b/drivers/gpu/drm/omapdrm/displays/Kconfig
@@ -1,28 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
 menu "OMAPDRM External Display Device Drivers"
 
-config DRM_OMAP_ENCODER_OPA362
-   tristate "OPA362 external analog amplifier"
-   help
- Driver for OPA362 external analog TV amplifier controlled
- through a GPIO.
-
-config DRM_OMAP_ENCODER_TPD12S015
-   tristate "TPD12S015 HDMI ESD protection and level shifter"
-   help
- Driver for TPD12S015, which offers HDMI ESD protection and level
- shifting.
-
-config DRM_OMAP_CONNECTOR_HDMI
-   tristate "HDMI Connector"
-   help
- Driver for a generic HDMI connector.
-
-config DRM_OMAP_CONNECTOR_ANALOG_TV
-   tristate "Analog TV Connector"
-   help
- Driver for a generic analog TV connector.
-
 config DRM_OMAP_PANEL_DSI_CM
tristate "Generic DSI Command Mode Panel"
depends on BACKLIGHT_CLASS_DEVICE
diff --git a/drivers/gpu/drm/omapdrm/displays/Makefile 
b/drivers/gpu/drm/omapdrm/displays/Makefile
index cb76859dc574..488ddf153613 100644
--- a/drivers/gpu/drm/omapdrm/displays/Makefile
+++ b/drivers/gpu/drm/omapdrm/displays/Makefile
@@ -1,6 +1,2 @@
 # SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_DRM_OMAP_ENCODER_OPA362) += encoder-opa362.o
-obj-$(CONFIG_DRM_OMAP_ENCODER_TPD12S015) += encoder-tpd12s015.o
-obj-$(CONFIG_DRM_OMAP_CONNECTOR_HDMI) += connector-hdmi.o
-obj-$(CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV) += connector-analog-tv.o
 obj-$(CONFIG_DRM_OMAP_PANEL_DSI_CM) += panel-dsi-cm.o
diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c 
b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
deleted file mode 100644
index f36aa1885d39..
--- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Analog TV Connector driver
- *
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
- * Author: Tomi Valkeinen 
- */
-
-#include 
-#include 
-#include 
-#include 
-
-#include "../dss/omapdss.h"
-
-struct panel_drv_data {
-   struct omap_dss_device dssdev;
-
-   struct device *dev;
-};
-
-#define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev)
-
-static int tvc_connect(struct omap_dss_device *src,
-  struct omap_dss_device *dst)
-{
-   return 0;
-}
-
-static void tvc_disconnect(struct omap_dss_device *src,
-  struct omap_dss_device *dst)
-{
-}
-
-static const struct 

[PATCH v4 43/51] drm/omap: dpi: Reorder functions in sections

2019-12-19 Thread Laurent Pinchart
Group functions based on their purpose and split them in sections to
make the source code easier to navigate.

No functional change is included.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 146 --
 1 file changed, 79 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index f8354271ce6f..dccf81e4ce64 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -48,6 +48,10 @@ static struct dpi_data *dpi_get_data_from_dssdev(struct 
omap_dss_device *dssdev)
return container_of(dssdev, struct dpi_data, output);
 }
 
+/* 
-
+ * Clock Handling and PLL
+ */
+
 static enum dss_clk_source dpi_get_clk_src_dra7xx(struct dpi_data *dpi,
  enum omap_channel channel)
 {
@@ -366,6 +370,62 @@ static void dpi_config_lcd_manager(struct dpi_data *dpi)
dss_mgr_set_lcd_config(>output, >mgr_config);
 }
 
+static int dpi_verify_pll(struct dss_pll *pll)
+{
+   int r;
+
+   /* do initial setup with the PLL to see if it is operational */
+
+   r = dss_pll_enable(pll);
+   if (r)
+   return r;
+
+   dss_pll_disable(pll);
+
+   return 0;
+}
+
+static void dpi_init_pll(struct dpi_data *dpi)
+{
+   struct dss_pll *pll;
+
+   if (dpi->pll)
+   return;
+
+   dpi->clk_src = dpi_get_clk_src(dpi);
+
+   pll = dss_pll_find_by_src(dpi->dss, dpi->clk_src);
+   if (!pll)
+   return;
+
+   if (dpi_verify_pll(pll)) {
+   DSSWARN("PLL not operational\n");
+   return;
+   }
+
+   dpi->pll = pll;
+}
+
+/* 
-
+ * omap_dss_device Operations
+ */
+
+static int dpi_connect(struct omap_dss_device *src,
+  struct omap_dss_device *dst)
+{
+   struct dpi_data *dpi = dpi_get_data_from_dssdev(dst);
+
+   dpi_init_pll(dpi);
+
+   return omapdss_device_connect(dst->dss, dst, dst->next);
+}
+
+static void dpi_disconnect(struct omap_dss_device *src,
+  struct omap_dss_device *dst)
+{
+   omapdss_device_disconnect(dst, dst->next);
+}
+
 static void dpi_display_enable(struct omap_dss_device *dssdev)
 {
struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
@@ -446,20 +506,6 @@ static void dpi_display_disable(struct omap_dss_device 
*dssdev)
mutex_unlock(>lock);
 }
 
-static void dpi_set_timings(struct omap_dss_device *dssdev,
-   const struct drm_display_mode *mode)
-{
-   struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
-
-   DSSDBG("dpi_set_timings\n");
-
-   mutex_lock(>lock);
-
-   dpi->pixelclock = mode->clock * 1000;
-
-   mutex_unlock(>lock);
-}
-
 static int dpi_check_timings(struct omap_dss_device *dssdev,
 struct drm_display_mode *mode)
 {
@@ -500,41 +546,30 @@ static int dpi_check_timings(struct omap_dss_device 
*dssdev,
return 0;
 }
 
-static int dpi_verify_pll(struct dss_pll *pll)
+static void dpi_set_timings(struct omap_dss_device *dssdev,
+   const struct drm_display_mode *mode)
 {
-   int r;
+   struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
 
-   /* do initial setup with the PLL to see if it is operational */
+   DSSDBG("dpi_set_timings\n");
 
-   r = dss_pll_enable(pll);
-   if (r)
-   return r;
+   mutex_lock(>lock);
 
-   dss_pll_disable(pll);
+   dpi->pixelclock = mode->clock * 1000;
 
-   return 0;
+   mutex_unlock(>lock);
 }
 
-static void dpi_init_pll(struct dpi_data *dpi)
-{
-   struct dss_pll *pll;
-
-   if (dpi->pll)
-   return;
-
-   dpi->clk_src = dpi_get_clk_src(dpi);
-
-   pll = dss_pll_find_by_src(dpi->dss, dpi->clk_src);
-   if (!pll)
-   return;
+static const struct omap_dss_device_ops dpi_ops = {
+   .connect = dpi_connect,
+   .disconnect = dpi_disconnect,
 
-   if (dpi_verify_pll(pll)) {
-   DSSWARN("PLL not operational\n");
-   return;
-   }
+   .enable = dpi_display_enable,
+   .disable = dpi_display_disable,
 
-   dpi->pll = pll;
-}
+   .check_timings = dpi_check_timings,
+   .set_timings = dpi_set_timings,
+};
 
 /*
  * Return a hardcoded channel for the DPI output. This should work for
@@ -572,33 +607,6 @@ static enum omap_channel dpi_get_channel(struct dpi_data 
*dpi)
}
 }
 
-static int dpi_connect(struct omap_dss_device *src,
-  struct omap_dss_device *dst)
-{
-   struct dpi_data *dpi = dpi_get_data_from_dssdev(dst);
-
-   dpi_init_pll(dpi);
-
-   return omapdss_device_connect(dst->dss, dst, dst->next);
-}
-
-static void 

[PATCH v4 25/51] drm/omap: hdmi: Allocate EDID in the .read_edid() operation

2019-12-19 Thread Laurent Pinchart
Bring the omapdss-specific .read_edid() operation in sync with the
drm_bridge .get_edid() operation to ease code reuse.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v1:

- Keep MAX_EDID macro
---
 drivers/gpu/drm/omapdrm/dss/hdmi4.c  | 36 
 drivers/gpu/drm/omapdrm/dss/hdmi5.c  | 24 
 drivers/gpu/drm/omapdrm/dss/omapdss.h|  2 +-
 drivers/gpu/drm/omapdrm/omap_connector.c | 12 ++--
 4 files changed, 47 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index dd4a14fe7e59..e15fa3862922 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -405,31 +405,45 @@ static void hdmi_disconnect(struct omap_dss_device *src,
omapdss_device_disconnect(dst, dst->next);
 }
 
-static int hdmi_read_edid(struct omap_dss_device *dssdev,
-   u8 *edid, int len)
+#define MAX_EDID   512
+
+static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
 {
struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
bool need_enable;
+   u8 *edid;
int r;
 
+   edid = kzalloc(MAX_EDID, GFP_KERNEL);
+   if (!edid)
+   return NULL;
+
need_enable = hdmi->core_enabled == false;
 
if (need_enable) {
r = hdmi4_core_enable(>core);
-   if (r)
-   return r;
+   if (r) {
+   kfree(edid);
+   return NULL;
+   }
+   }
+
+   r = read_edid(hdmi, edid, MAX_EDID);
+   if (r < 0) {
+   kfree(edid);
+   edid = NULL;
+   } else {
+   unsigned int cec_addr;
+
+   cec_addr = r >= 256 ? cec_get_edid_phys_addr(edid, r, NULL)
+: CEC_PHYS_ADDR_INVALID;
+   hdmi4_cec_set_phys_addr(>core, cec_addr);
}
 
-   r = read_edid(hdmi, edid, len);
-   if (r >= 256)
-   hdmi4_cec_set_phys_addr(>core,
-   cec_get_edid_phys_addr(edid, r, NULL));
-   else
-   hdmi4_cec_set_phys_addr(>core, CEC_PHYS_ADDR_INVALID);
if (need_enable)
hdmi4_core_disable(>core);
 
-   return r;
+   return (struct edid *)edid;
 }
 
 static void hdmi_lost_hotplug(struct omap_dss_device *dssdev)
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 8e3790dd8b98..99720dfc5769 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -410,27 +410,39 @@ static void hdmi_disconnect(struct omap_dss_device *src,
omapdss_device_disconnect(dst, dst->next);
 }
 
-static int hdmi_read_edid(struct omap_dss_device *dssdev,
-   u8 *edid, int len)
+#define MAX_EDID   512
+
+static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
 {
struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
bool need_enable;
+   u8 *edid;
int r;
 
+   edid = kzalloc(MAX_EDID, GFP_KERNEL);
+   if (!edid)
+   return NULL;
+
need_enable = hdmi->core_enabled == false;
 
if (need_enable) {
r = hdmi_core_enable(hdmi);
-   if (r)
-   return r;
+   if (r) {
+   kfree(edid);
+   return NULL;
+   }
}
 
-   r = read_edid(hdmi, edid, len);
+   r = read_edid(hdmi, edid, MAX_EDID);
+   if (r < 0) {
+   kfree(edid);
+   edid = NULL;
+   }
 
if (need_enable)
hdmi_core_disable(hdmi);
 
-   return r;
+   return (struct edid *)edid;
 }
 
 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 82e9bfa5530a..269e143d57be 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -367,7 +367,7 @@ struct omap_dss_device_ops {
void *cb_data);
void (*unregister_hpd_cb)(struct omap_dss_device *dssdev);
 
-   int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
+   struct edid *(*read_edid)(struct omap_dss_device *dssdev);
 
int (*get_modes)(struct omap_dss_device *dssdev,
 struct drm_connector *connector);
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c 
b/drivers/gpu/drm/omapdrm/omap_connector.c
index a24cec4b0bb9..c636ae228130 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -153,25 +153,19 @@ static void omap_connector_destroy(struct drm_connector 
*connector)
kfree(omap_connector);
 }
 
-#define MAX_EDID  512
-
 static int omap_connector_get_modes_edid(struct drm_connector *connector,
   

[PATCH v4 18/51] drm/omap: dss: Cleanup DSS ports on initialisation failure

2019-12-19 Thread Laurent Pinchart
When the DSS initialises its output DPI and SDI ports, failures don't
clean up previous successfully initialised ports. This can lead to
resource leak or memory corruption. Fix it.

Reported-by: Hans Verkuil 
Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
Acked-by: Sam Ravnborg 
---
 drivers/gpu/drm/omapdrm/dss/dss.c | 43 +++
 1 file changed, 26 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c 
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 225ec808b01a..67b92b5d8dd7 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -1151,46 +1151,38 @@ static const struct dss_features dra7xx_dss_feats = {
.has_lcd_clk_src=   true,
 };
 
-static int dss_init_ports(struct dss_device *dss)
+static void __dss_uninit_ports(struct dss_device *dss, unsigned int num_ports)
 {
struct platform_device *pdev = dss->pdev;
struct device_node *parent = pdev->dev.of_node;
struct device_node *port;
unsigned int i;
-   int r;
 
-   for (i = 0; i < dss->feat->num_ports; i++) {
+   for (i = 0; i < num_ports; i++) {
port = of_graph_get_port_by_id(parent, i);
if (!port)
continue;
 
switch (dss->feat->ports[i]) {
case OMAP_DISPLAY_TYPE_DPI:
-   r = dpi_init_port(dss, pdev, port, dss->feat->model);
-   if (r)
-   return r;
+   dpi_uninit_port(port);
break;
-
case OMAP_DISPLAY_TYPE_SDI:
-   r = sdi_init_port(dss, pdev, port);
-   if (r)
-   return r;
+   sdi_uninit_port(port);
break;
-
default:
break;
}
}
-
-   return 0;
 }
 
-static void dss_uninit_ports(struct dss_device *dss)
+static int dss_init_ports(struct dss_device *dss)
 {
struct platform_device *pdev = dss->pdev;
struct device_node *parent = pdev->dev.of_node;
struct device_node *port;
-   int i;
+   unsigned int i;
+   int r;
 
for (i = 0; i < dss->feat->num_ports; i++) {
port = of_graph_get_port_by_id(parent, i);
@@ -1199,15 +1191,32 @@ static void dss_uninit_ports(struct dss_device *dss)
 
switch (dss->feat->ports[i]) {
case OMAP_DISPLAY_TYPE_DPI:
-   dpi_uninit_port(port);
+   r = dpi_init_port(dss, pdev, port, dss->feat->model);
+   if (r)
+   goto error;
break;
+
case OMAP_DISPLAY_TYPE_SDI:
-   sdi_uninit_port(port);
+   r = sdi_init_port(dss, pdev, port);
+   if (r)
+   goto error;
break;
+
default:
break;
}
}
+
+   return 0;
+
+error:
+   __dss_uninit_ports(dss, i);
+   return r;
+}
+
+static void dss_uninit_ports(struct dss_device *dss)
+{
+   __dss_uninit_ports(dss, dss->feat->num_ports);
 }
 
 static int dss_video_pll_probe(struct dss_device *dss)
-- 
Regards,

Laurent Pinchart

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[PATCH v4 21/51] drm/omap: Use the drm_panel_bridge API

2019-12-19 Thread Laurent Pinchart
Replace the manual panel handling code by a drm_panel_bridge. This
simplifies the driver and allows all components in the display pipeline
to be treated as bridges, paving the way to generic connector handling.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v1:

- Keep #include 
---
 drivers/gpu/drm/omapdrm/dss/base.c   | 12 -
 drivers/gpu/drm/omapdrm/dss/output.c | 31 +---
 drivers/gpu/drm/omapdrm/omap_connector.c | 10 
 drivers/gpu/drm/omapdrm/omap_drv.c   | 13 --
 drivers/gpu/drm/omapdrm/omap_encoder.c   | 13 --
 5 files changed, 32 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/base.c 
b/drivers/gpu/drm/omapdrm/dss/base.c
index cae5687822e2..80d48936d177 100644
--- a/drivers/gpu/drm/omapdrm/dss/base.c
+++ b/drivers/gpu/drm/omapdrm/dss/base.c
@@ -149,8 +149,7 @@ struct omap_dss_device *omapdss_device_next_output(struct 
omap_dss_device *from)
goto done;
}
 
-   if (dssdev->id &&
-   (dssdev->next || dssdev->bridge || dssdev->panel))
+   if (dssdev->id && (dssdev->next || dssdev->bridge))
goto done;
}
 
@@ -185,11 +184,10 @@ int omapdss_device_connect(struct dss_device *dss,
if (!dst) {
/*
 * The destination is NULL when the source is connected to a
-* bridge or panel instead of a DSS device. Stop here, we will
-* attach the bridge or panel later when we will have a DRM
-* encoder.
+* bridge instead of a DSS device. Stop here, we will attach
+* the bridge later when we will have a DRM encoder.
 */
-   return src && (src->bridge || src->panel) ? 0 : -EINVAL;
+   return src && src->bridge ? 0 : -EINVAL;
}
 
if (omapdss_device_is_connected(dst))
@@ -217,7 +215,7 @@ void omapdss_device_disconnect(struct omap_dss_device *src,
dst ? dev_name(dst->dev) : "NULL");
 
if (!dst) {
-   WARN_ON(!src->bridge && !src->panel);
+   WARN_ON(!src->bridge);
return;
}
 
diff --git a/drivers/gpu/drm/omapdrm/dss/output.c 
b/drivers/gpu/drm/omapdrm/dss/output.c
index 0693d34fca1b..99a253a424c1 100644
--- a/drivers/gpu/drm/omapdrm/dss/output.c
+++ b/drivers/gpu/drm/omapdrm/dss/output.c
@@ -21,6 +21,7 @@
 int omapdss_device_init_output(struct omap_dss_device *out)
 {
struct device_node *remote_node;
+   int ret;
 
remote_node = of_graph_get_remote_node(out->dev->of_node,
   ffs(out->of_ports) - 1, 0);
@@ -39,17 +40,39 @@ int omapdss_device_init_output(struct omap_dss_device *out)
 
if (out->next && out->type != out->next->type) {
dev_err(out->dev, "output type and display type don't match\n");
-   omapdss_device_put(out->next);
-   out->next = NULL;
-   return -EINVAL;
+   ret = -EINVAL;
+   goto error;
}
 
-   return out->next || out->bridge || out->panel ? 0 : -EPROBE_DEFER;
+   if (out->panel) {
+   struct drm_bridge *bridge;
+
+   bridge = drm_panel_bridge_add(out->panel);
+   if (IS_ERR(bridge)) {
+   dev_err(out->dev,
+   "unable to create panel bridge (%ld)\n",
+   PTR_ERR(bridge));
+   ret = PTR_ERR(bridge);
+   goto error;
+   }
+
+   out->bridge = bridge;
+   }
+
+   return out->next || out->bridge ? 0 : -EPROBE_DEFER;
+
+error:
+   omapdss_device_put(out->next);
+   out->next = NULL;
+   return ret;
 }
 EXPORT_SYMBOL(omapdss_device_init_output);
 
 void omapdss_device_cleanup_output(struct omap_dss_device *out)
 {
+   if (out->bridge && out->panel)
+   drm_panel_bridge_remove(out->bridge);
+
if (out->next)
omapdss_device_put(out->next);
 }
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c 
b/drivers/gpu/drm/omapdrm/omap_connector.c
index 38c7a79c5d4a..b0cb2ecb30ab 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -6,7 +6,6 @@
 
 #include 
 #include 
-#include 
 #include 
 
 #include "omap_drv.h"
@@ -190,7 +189,6 @@ static int omap_connector_get_modes_edid(struct 
drm_connector *connector,
 
 static int omap_connector_get_modes(struct drm_connector *connector)
 {
-   struct omap_connector *omap_connector = to_omap_connector(connector);
struct omap_dss_device *dssdev;
 
DBG("%s", connector->name);
@@ -213,14 +211,6 @@ static int omap_connector_get_modes(struct drm_connector 
*connector)
if (dssdev)
return dssdev->ops->get_modes(dssdev, connector);
 
-   

[PATCH v4 33/51] drm/omap: dss: Remove .set_hdmi_mode() and .set_infoframe() operations

2019-12-19 Thread Laurent Pinchart
The omapdss_hdmi_ops .set_hdmi_mode() and .set_infoframe() operations
operations are not used anymore, remove them.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/omapdss.h  |  3 ---
 drivers/gpu/drm/omapdrm/omap_encoder.c | 26 --
 2 files changed, 29 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 269e143d57be..30a12cf91cbb 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -287,9 +287,6 @@ struct omap_dss_writeback_info {
 
 struct omapdss_hdmi_ops {
void (*lost_hotplug)(struct omap_dss_device *dssdev);
-   int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
-   int (*set_infoframe)(struct omap_dss_device *dssdev,
-   const struct hdmi_avi_infoframe *avi);
 };
 
 struct omapdss_dsi_ops {
diff --git a/drivers/gpu/drm/omapdrm/omap_encoder.c 
b/drivers/gpu/drm/omapdrm/omap_encoder.c
index b232acd3bc3d..18a79dde6815 100644
--- a/drivers/gpu/drm/omapdrm/omap_encoder.c
+++ b/drivers/gpu/drm/omapdrm/omap_encoder.c
@@ -69,28 +69,6 @@ static void omap_encoder_update_videomode_flags(struct 
videomode *vm,
}
 }
 
-static void omap_encoder_hdmi_mode_set(struct drm_connector *connector,
-  struct drm_encoder *encoder,
-  struct drm_display_mode *adjusted_mode)
-{
-   struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
-   struct omap_dss_device *dssdev = omap_encoder->output;
-   bool hdmi_mode = connector->display_info.is_hdmi;
-
-   if (dssdev->ops && dssdev->ops->hdmi.set_hdmi_mode)
-   dssdev->ops->hdmi.set_hdmi_mode(dssdev, hdmi_mode);
-
-   if (hdmi_mode && dssdev->ops && dssdev->ops->hdmi.set_infoframe) {
-   struct hdmi_avi_infoframe avi;
-   int r;
-
-   r = drm_hdmi_avi_infoframe_from_display_mode(, connector,
-adjusted_mode);
-   if (r == 0)
-   dssdev->ops->hdmi.set_infoframe(dssdev, );
-   }
-}
-
 static void omap_encoder_mode_set(struct drm_encoder *encoder,
  struct drm_display_mode *mode,
  struct drm_display_mode *adjusted_mode)
@@ -142,10 +120,6 @@ static void omap_encoder_mode_set(struct drm_encoder 
*encoder,
if (dssdev->ops && dssdev->ops->set_timings)
dssdev->ops->set_timings(dssdev, adjusted_mode);
}
-
-   /* Set the HDMI mode and HDMI infoframe if applicable. */
-   if (output->type == OMAP_DISPLAY_TYPE_HDMI)
-   omap_encoder_hdmi_mode_set(connector, encoder, adjusted_mode);
 }
 
 static void omap_encoder_disable(struct drm_encoder *encoder)
-- 
Regards,

Laurent Pinchart

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[PATCH v4 16/51] drm: Add helper to create a connector for a chain of bridges

2019-12-19 Thread Laurent Pinchart
Most bridge drivers create a DRM connector to model the connector at the
output of the bridge. This model is historical and has worked pretty
well so far, but causes several issues:

- It prevents supporting more complex display pipelines where DRM
connector operations are split over multiple components. For instance a
pipeline with a bridge connected to the DDC signals to read EDID data,
and another one connected to the HPD signal to detect connection and
disconnection, will not be possible to support through this model.

- It requires every bridge driver to implement similar connector
handling code, resulting in code duplication.

- It assumes that a bridge will either be wired to a connector or to
another bridge, but doesn't support bridges that can be used in both
positions very well (although there is some ad-hoc support for this in
the analogix_dp bridge driver).

In order to solve these issues, ownership of the connector needs to be
moved to the display controller driver.

To avoid code duplication in display controller drivers, add a new
helper to create and manage a DRM connector backed by a chain of
bridges. All connector operations are delegating to the appropriate
bridge in the chain.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Boris Brezillon 
Acked-by: Sam Ravnborg 
---
Changes since v2:

- Fixed typo in documentation
- Rebased on top of Boris' drm_bridge chaining rework
- Pass drm_encoder instead of brm_bridge to drm_bridge_connector_init()

Changes since v1:

- Removed the unused MAX_EDID macro
- Removed the unused drm_bridge_connector.hdmi_mode field
- Use drm_connector_init_with_ddc()
---
 drivers/gpu/drm/Makefile   |   3 +-
 drivers/gpu/drm/drm_bridge_connector.c | 373 +
 include/drm/drm_bridge_connector.h |  18 ++
 3 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/drm_bridge_connector.c
 create mode 100644 include/drm/drm_bridge_connector.h

diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 6493088a0fdd..ec946856a27f 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -39,7 +39,8 @@ obj-$(CONFIG_DRM_VRAM_HELPER) += drm_vram_helper.o
 drm_ttm_helper-y := drm_gem_ttm_helper.o
 obj-$(CONFIG_DRM_TTM_HELPER) += drm_ttm_helper.o
 
-drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o drm_dsc.o 
drm_probe_helper.o \
+drm_kms_helper-y := drm_bridge_connector.o drm_crtc_helper.o drm_dp_helper.o \
+   drm_dsc.o drm_probe_helper.o \
drm_plane_helper.o drm_dp_mst_topology.o drm_atomic_helper.o \
drm_kms_helper_common.o drm_dp_dual_mode_helper.o \
drm_simple_kms_helper.o drm_modeset_helper.o \
diff --git a/drivers/gpu/drm/drm_bridge_connector.c 
b/drivers/gpu/drm/drm_bridge_connector.c
new file mode 100644
index ..c033a343844f
--- /dev/null
+++ b/drivers/gpu/drm/drm_bridge_connector.c
@@ -0,0 +1,373 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Laurent Pinchart 
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * DOC: overview
+ *
+ * The DRM bridge connector helper object provides a DRM connector
+ * implementation that wraps a chain of  drm_bridge. The connector
+ * operations are fully implemented based on the operations of the bridges in
+ * the chain, and don't require any intervention from the display controller
+ * driver at runtime.
+ *
+ * To use the helper, display controller drivers create a bridge connector with
+ * a call to drm_bridge_connector_init(). This associates the newly created
+ * connector with the chain of bridges passed to the function and registers it
+ * with the DRM device. At that point the connector becomes fully usable, no
+ * further operation is needed.
+ *
+ * The DRM bridge connector operations are implemented based on the operations
+ * provided by the bridges in the chain. Each connector operation is delegated
+ * to the bridge closest to the connector (at the end of the chain) that
+ * provides the relevant functionality.
+ *
+ * To make use of this helper, all bridges in the chain shall report bridge
+ * operation flags (_bridge->ops) and bridge output type
+ * (_bridge->type), and none of them may create a DRM connector directly.
+ */
+
+/**
+ * struct drm_bridge_connector - A connector backed by a chain of bridges
+ */
+struct drm_bridge_connector {
+   /**
+* @base: The base DRM connector
+*/
+   struct drm_connector base;
+   /**
+* @encoder:
+*
+* The encoder at the start of the bridges chain.
+*/
+   struct drm_encoder *encoder;
+   /**
+* @bridge_edid:
+*
+* The last bridge in the chain (closest to the connector) that provides
+* EDID read support, if any (see _BRIDGE_OP_EDID).
+*/
+   struct drm_bridge *bridge_edid;
+   /**
+* 

[PATCH v4 12/51] drm/bridge: Add driver for the TI TPD12S015 HDMI level shifter

2019-12-19 Thread Laurent Pinchart
The TI TPD12S015 is an HDMI level shifter and ESD protector controlled
through GPIOs. Add a DRM bridge driver for the device.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
Acked-by: Sam Ravnborg 
---
Changes since v2:

- Control CT_CP_HPD GPIO from .hpd_enable() and .hpd_disable()
- Remove unneeded hpd_gpio zero check
- Update copyright notice

Changes since v1:

- Remove empty .hpd_enable() and .hpd_disable() operations
---
 drivers/gpu/drm/bridge/Kconfig|   8 +
 drivers/gpu/drm/bridge/Makefile   |   1 +
 drivers/gpu/drm/bridge/ti-tpd12s015.c | 211 ++
 3 files changed, 220 insertions(+)
 create mode 100644 drivers/gpu/drm/bridge/ti-tpd12s015.c

diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index f14f63e0f6df..d020f120cf21 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -150,6 +150,14 @@ config DRM_TI_SN65DSI86
help
  Texas Instruments SN65DSI86 DSI to eDP Bridge driver
 
+config DRM_TI_TPD12S015
+   tristate "TI TPD12S015 HDMI level shifter and ESD protection"
+   depends on OF
+   select DRM_KMS_HELPER
+   help
+ Texas Instruments TPD12S015 HDMI level shifter and ESD protection
+ driver.
+
 source "drivers/gpu/drm/bridge/analogix/Kconfig"
 
 source "drivers/gpu/drm/bridge/adv7511/Kconfig"
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index bef919d3bca6..4fa7786dcc8f 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o
 obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511/
 obj-$(CONFIG_DRM_TI_SN65DSI86) += ti-sn65dsi86.o
 obj-$(CONFIG_DRM_TI_TFP410) += ti-tfp410.o
+obj-$(CONFIG_DRM_TI_TPD12S015) += ti-tpd12s015.o
 
 obj-y += analogix/
 obj-y += synopsys/
diff --git a/drivers/gpu/drm/bridge/ti-tpd12s015.c 
b/drivers/gpu/drm/bridge/ti-tpd12s015.c
new file mode 100644
index ..514cbf0eac75
--- /dev/null
+++ b/drivers/gpu/drm/bridge/ti-tpd12s015.c
@@ -0,0 +1,211 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * TPD12S015 HDMI ESD protection & level shifter chip driver
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated
+ *
+ * Based on the omapdrm-specific encoder-opa362 driver
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated
+ * Author: Tomi Valkeinen 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+struct tpd12s015_device {
+   struct drm_bridge bridge;
+
+   struct gpio_desc *ct_cp_hpd_gpio;
+   struct gpio_desc *ls_oe_gpio;
+   struct gpio_desc *hpd_gpio;
+   int hpd_irq;
+
+   struct drm_bridge *next_bridge;
+};
+
+static inline struct tpd12s015_device *to_tpd12s015(struct drm_bridge *bridge)
+{
+   return container_of(bridge, struct tpd12s015_device, bridge);
+}
+
+static int tpd12s015_attach(struct drm_bridge *bridge,
+   enum drm_bridge_attach_flags flags)
+{
+   struct tpd12s015_device *tpd = to_tpd12s015(bridge);
+   int ret;
+
+   if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
+   return -EINVAL;
+
+   ret = drm_bridge_attach(bridge->encoder, tpd->next_bridge,
+   bridge, flags);
+   if (ret < 0)
+   return ret;
+
+   gpiod_set_value_cansleep(tpd->ls_oe_gpio, 1);
+
+   /* DC-DC converter needs at max 300us to get to 90% of 5V. */
+   usleep_range(300, 1000);
+
+   return 0;
+}
+
+static void tpd12s015_detach(struct drm_bridge *bridge)
+{
+   struct tpd12s015_device *tpd = to_tpd12s015(bridge);
+
+   gpiod_set_value_cansleep(tpd->ls_oe_gpio, 0);
+}
+
+static enum drm_connector_status tpd12s015_detect(struct drm_bridge *bridge)
+{
+   struct tpd12s015_device *tpd = to_tpd12s015(bridge);
+
+   if (gpiod_get_value_cansleep(tpd->hpd_gpio))
+   return connector_status_connected;
+   else
+   return connector_status_disconnected;
+}
+
+static void tpd12s015_hpd_enable(struct drm_bridge *bridge)
+{
+   struct tpd12s015_device *tpd = to_tpd12s015(bridge);
+
+   gpiod_set_value_cansleep(tpd->ct_cp_hpd_gpio, 1);
+}
+
+static void tpd12s015_hpd_disable(struct drm_bridge *bridge)
+{
+   struct tpd12s015_device *tpd = to_tpd12s015(bridge);
+
+   gpiod_set_value_cansleep(tpd->ct_cp_hpd_gpio, 0);
+}
+
+static const struct drm_bridge_funcs tpd12s015_bridge_funcs = {
+   .attach = tpd12s015_attach,
+   .detach = tpd12s015_detach,
+   .detect = tpd12s015_detect,
+   .hpd_enable = tpd12s015_hpd_enable,
+   .hpd_disable= tpd12s015_hpd_disable,
+};
+
+static irqreturn_t tpd12s015_hpd_isr(int irq, void *data)
+{
+   struct tpd12s015_device *tpd = data;
+   struct drm_bridge *bridge = >bridge;
+
+   drm_bridge_hpd_notify(bridge, tpd12s015_detect(bridge));

[PATCH v4 32/51] drm/omap: hdmi4: Implement drm_bridge .hpd_notify() operation

2019-12-19 Thread Laurent Pinchart
The HDMI4 encoder is transitioning to the drm_bridge API, implement the
last missing operation.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/hdmi4.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index a5c6054158eb..17759b6a191a 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -551,6 +551,15 @@ static void hdmi4_bridge_disable(struct drm_bridge *bridge,
mutex_unlock(>lock);
 }
 
+static void hdmi4_bridge_hpd_notify(struct drm_bridge *bridge,
+   enum drm_connector_status status)
+{
+   struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
+
+   if (status == connector_status_disconnected)
+   hdmi4_cec_set_phys_addr(>core, CEC_PHYS_ADDR_INVALID);
+}
+
 static struct edid *hdmi4_bridge_read_edid(struct omap_hdmi *hdmi,
   struct drm_connector *connector)
 {
@@ -570,6 +579,7 @@ static const struct drm_bridge_funcs hdmi4_bridge_funcs = {
.mode_set = hdmi4_bridge_mode_set,
.atomic_enable = hdmi4_bridge_enable,
.atomic_disable = hdmi4_bridge_disable,
+   .hpd_notify = hdmi4_bridge_hpd_notify,
.get_edid = hdmi4_bridge_get_edid,
 };
 
-- 
Regards,

Laurent Pinchart

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[PATCH v4 24/51] drm/omap: dss: Make omap_dss_device_ops optional

2019-12-19 Thread Laurent Pinchart
As part of the move to drm_bridge ops, the dssdev ops will become empty
for some of the internal encoders. Make them optional in the driver to
allow them to be removed completely, easing the transition.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/base.c   | 21 -
 drivers/gpu/drm/omapdrm/dss/dss.c|  3 ++-
 drivers/gpu/drm/omapdrm/omap_connector.c |  2 +-
 drivers/gpu/drm/omapdrm/omap_encoder.c   | 12 +++-
 4 files changed, 22 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/base.c 
b/drivers/gpu/drm/omapdrm/dss/base.c
index 80d48936d177..2db3bd2f19db 100644
--- a/drivers/gpu/drm/omapdrm/dss/base.c
+++ b/drivers/gpu/drm/omapdrm/dss/base.c
@@ -195,10 +195,12 @@ int omapdss_device_connect(struct dss_device *dss,
 
dst->dss = dss;
 
-   ret = dst->ops->connect(src, dst);
-   if (ret < 0) {
-   dst->dss = NULL;
-   return ret;
+   if (dst->ops && dst->ops->connect) {
+   ret = dst->ops->connect(src, dst);
+   if (ret < 0) {
+   dst->dss = NULL;
+   return ret;
+   }
}
 
return 0;
@@ -226,7 +228,8 @@ void omapdss_device_disconnect(struct omap_dss_device *src,
 
WARN_ON(dst->state != OMAP_DSS_DISPLAY_DISABLED);
 
-   dst->ops->disconnect(src, dst);
+   if (dst->ops && dst->ops->disconnect)
+   dst->ops->disconnect(src, dst);
dst->dss = NULL;
 }
 EXPORT_SYMBOL_GPL(omapdss_device_disconnect);
@@ -238,7 +241,7 @@ void omapdss_device_pre_enable(struct omap_dss_device 
*dssdev)
 
omapdss_device_pre_enable(dssdev->next);
 
-   if (dssdev->ops->pre_enable)
+   if (dssdev->ops && dssdev->ops->pre_enable)
dssdev->ops->pre_enable(dssdev);
 }
 EXPORT_SYMBOL_GPL(omapdss_device_pre_enable);
@@ -248,7 +251,7 @@ void omapdss_device_enable(struct omap_dss_device *dssdev)
if (!dssdev)
return;
 
-   if (dssdev->ops->enable)
+   if (dssdev->ops && dssdev->ops->enable)
dssdev->ops->enable(dssdev);
 
omapdss_device_enable(dssdev->next);
@@ -264,7 +267,7 @@ void omapdss_device_disable(struct omap_dss_device *dssdev)
 
omapdss_device_disable(dssdev->next);
 
-   if (dssdev->ops->disable)
+   if (dssdev->ops && dssdev->ops->disable)
dssdev->ops->disable(dssdev);
 }
 EXPORT_SYMBOL_GPL(omapdss_device_disable);
@@ -274,7 +277,7 @@ void omapdss_device_post_disable(struct omap_dss_device 
*dssdev)
if (!dssdev)
return;
 
-   if (dssdev->ops->post_disable)
+   if (dssdev->ops && dssdev->ops->post_disable)
dssdev->ops->post_disable(dssdev);
 
omapdss_device_post_disable(dssdev->next);
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c 
b/drivers/gpu/drm/omapdrm/dss/dss.c
index 67b92b5d8dd7..b76fc2b56227 100644
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -1552,7 +1552,8 @@ static void dss_shutdown(struct platform_device *pdev)
DSSDBG("shutdown\n");
 
for_each_dss_output(dssdev) {
-   if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
+   if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE &&
+   dssdev->ops && dssdev->ops->disable)
dssdev->ops->disable(dssdev);
}
 }
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c 
b/drivers/gpu/drm/omapdrm/omap_connector.c
index b0cb2ecb30ab..a24cec4b0bb9 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -228,7 +228,7 @@ enum drm_mode_status omap_connector_mode_fixup(struct 
omap_dss_device *dssdev,
drm_mode_copy(adjusted_mode, mode);
 
for (; dssdev; dssdev = dssdev->next) {
-   if (!dssdev->ops->check_timings)
+   if (!dssdev->ops || !dssdev->ops->check_timings)
continue;
 
ret = dssdev->ops->check_timings(dssdev, adjusted_mode);
diff --git a/drivers/gpu/drm/omapdrm/omap_encoder.c 
b/drivers/gpu/drm/omapdrm/omap_encoder.c
index a270173a2411..b232acd3bc3d 100644
--- a/drivers/gpu/drm/omapdrm/omap_encoder.c
+++ b/drivers/gpu/drm/omapdrm/omap_encoder.c
@@ -77,10 +77,10 @@ static void omap_encoder_hdmi_mode_set(struct drm_connector 
*connector,
struct omap_dss_device *dssdev = omap_encoder->output;
bool hdmi_mode = connector->display_info.is_hdmi;
 
-   if (dssdev->ops->hdmi.set_hdmi_mode)
+   if (dssdev->ops && dssdev->ops->hdmi.set_hdmi_mode)
dssdev->ops->hdmi.set_hdmi_mode(dssdev, hdmi_mode);
 
-   if (hdmi_mode && dssdev->ops->hdmi.set_infoframe) {
+   if (hdmi_mode && dssdev->ops && dssdev->ops->hdmi.set_infoframe) {
struct hdmi_avi_infoframe avi;
int r;
 
@@ -139,7 +139,7 @@ static void omap_encoder_mode_set(struct drm_encoder 

[PATCH v4 41/51] drm/omap: hdmi5: Simplify EDID read

2019-12-19 Thread Laurent Pinchart
Now that the omap_dss_device EDID read operation has been removed,
simplify the bridge-based EDID access by merging multiple functions
together.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/hdmi5.c | 86 -
 1 file changed, 35 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 69b0d0cc7593..6f284581d35c 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -306,50 +306,6 @@ static void hdmi_core_disable(struct omap_hdmi *hdmi)
mutex_unlock(>lock);
 }
 
-static struct edid *
-hdmi_do_read_edid(struct omap_hdmi *hdmi,
- struct edid *(*read)(struct omap_hdmi *hdmi,
-  struct drm_connector *connector),
- struct drm_connector *connector)
-{
-   struct edid *edid;
-   bool need_enable;
-   int idlemode;
-   int r;
-
-   need_enable = hdmi->core_enabled == false;
-
-   if (need_enable) {
-   r = hdmi_core_enable(hdmi);
-   if (r)
-   return NULL;
-   }
-
-   mutex_lock(>lock);
-   r = hdmi_runtime_get(hdmi);
-   BUG_ON(r);
-
-   idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
-   /* No-idle mode */
-   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
-
-   hdmi5_core_ddc_init(>core);
-
-   edid = read(hdmi, connector);
-
-   hdmi5_core_ddc_uninit(>core);
-
-   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
-
-   hdmi_runtime_put(hdmi);
-   mutex_unlock(>lock);
-
-   if (need_enable)
-   hdmi_core_disable(hdmi);
-
-   return (struct edid *)edid;
-}
-
 /* 
-
  * DRM Bridge Operations
  */
@@ -467,18 +423,46 @@ static void hdmi5_bridge_disable(struct drm_bridge 
*bridge,
mutex_unlock(>lock);
 }
 
-static struct edid *hdmi5_bridge_read_edid(struct omap_hdmi *hdmi,
-  struct drm_connector *connector)
-{
-   return drm_do_get_edid(connector, hdmi5_core_ddc_read, >core);
-}
-
 static struct edid *hdmi5_bridge_get_edid(struct drm_bridge *bridge,
  struct drm_connector *connector)
 {
struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
+   struct edid *edid;
+   bool need_enable;
+   int idlemode;
+   int r;
+
+   need_enable = hdmi->core_enabled == false;
+
+   if (need_enable) {
+   r = hdmi_core_enable(hdmi);
+   if (r)
+   return NULL;
+   }
+
+   mutex_lock(>lock);
+   r = hdmi_runtime_get(hdmi);
+   BUG_ON(r);
 
-   return hdmi_do_read_edid(hdmi, hdmi5_bridge_read_edid, connector);
+   idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
+   /* No-idle mode */
+   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
+
+   hdmi5_core_ddc_init(>core);
+
+   edid = drm_do_get_edid(connector, hdmi5_core_ddc_read, >core);
+
+   hdmi5_core_ddc_uninit(>core);
+
+   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
+
+   hdmi_runtime_put(hdmi);
+   mutex_unlock(>lock);
+
+   if (need_enable)
+   hdmi_core_disable(hdmi);
+
+   return (struct edid *)edid;
 }
 
 static const struct drm_bridge_funcs hdmi5_bridge_funcs = {
-- 
Regards,

Laurent Pinchart

___
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[PATCH v4 27/51] drm/omap: hdmi5: Rework EDID read to isolate data read

2019-12-19 Thread Laurent Pinchart
In preparation of adding DRM bridge support to the hdmi5 encoder code,
rework the EDID read to isolate data read.

The hdmi_read_edid() function is the main entry point. It performs all
initialisation steps required prior to reading the EDID (such as
ensuring the device is powered on), as well as corresponding cleanup
steps afterwards. EDID read itself is handled by hdmi_read_edid_data()
that calls the hdmi5_core_ddc_read() function to read individual blocks.

This new code architecture will allow reusing hdmi_read_edid() and
hdmi5_core_ddc_read() for the drm_bridge EDID read implementation, while
swapping out hdmi_read_edid_data() for the DRM drm_do_get_edid()
function.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v2:

- Expand commit message
---
 drivers/gpu/drm/omapdrm/dss/hdmi5.c  | 89 ++--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 48 +++--
 drivers/gpu/drm/omapdrm/dss/hdmi5_core.h |  5 +-
 3 files changed, 65 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 99720dfc5769..2b02b0a11696 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -271,30 +271,6 @@ static int hdmi_dump_regs(struct seq_file *s, void *p)
return 0;
 }
 
-static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len)
-{
-   int r;
-   int idlemode;
-
-   mutex_lock(>lock);
-
-   r = hdmi_runtime_get(hdmi);
-   BUG_ON(r);
-
-   idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
-   /* No-idle mode */
-   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
-
-   r = hdmi5_read_edid(>core,  buf, len);
-
-   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
-
-   hdmi_runtime_put(hdmi);
-   mutex_unlock(>lock);
-
-   return r;
-}
-
 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
 {
REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
@@ -412,32 +388,73 @@ static void hdmi_disconnect(struct omap_dss_device *src,
 
 #define MAX_EDID   512
 
-static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
+static struct edid *hdmi_read_edid_data(struct hdmi_core_data *core)
 {
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-   bool need_enable;
+   int max_ext_blocks = 3;
+   int r, n, i;
u8 *edid;
-   int r;
 
edid = kzalloc(MAX_EDID, GFP_KERNEL);
if (!edid)
return NULL;
 
+   r = hdmi5_core_ddc_read(core, edid, 0, EDID_LENGTH);
+   if (r)
+   goto error;
+
+   n = edid[0x7e];
+
+   if (n > max_ext_blocks)
+   n = max_ext_blocks;
+
+   for (i = 1; i <= n; i++) {
+   r = hdmi5_core_ddc_read(core, edid + i * EDID_LENGTH, i,
+   EDID_LENGTH);
+   if (r)
+   goto error;
+   }
+
+   return (struct edid *)edid;
+
+error:
+   kfree(edid);
+   return NULL;
+}
+
+static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
+{
+   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
+   struct edid *edid;
+   bool need_enable;
+   int idlemode;
+   int r;
+
need_enable = hdmi->core_enabled == false;
 
if (need_enable) {
r = hdmi_core_enable(hdmi);
-   if (r) {
-   kfree(edid);
+   if (r)
return NULL;
-   }
}
 
-   r = read_edid(hdmi, edid, MAX_EDID);
-   if (r < 0) {
-   kfree(edid);
-   edid = NULL;
-   }
+   mutex_lock(>lock);
+   r = hdmi_runtime_get(hdmi);
+   BUG_ON(r);
+
+   idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
+   /* No-idle mode */
+   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
+
+   hdmi5_core_ddc_init(>core);
+
+   edid = hdmi_read_edid_data(>core);
+
+   hdmi5_core_ddc_uninit(>core);
+
+   REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
+
+   hdmi_runtime_put(hdmi);
+   mutex_unlock(>lock);
 
if (need_enable)
hdmi_core_disable(hdmi);
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
index ff4d35c8771f..7dd587035160 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -23,7 +23,7 @@
 
 #include "hdmi5_core.h"
 
-static void hdmi_core_ddc_init(struct hdmi_core_data *core)
+void hdmi5_core_ddc_init(struct hdmi_core_data *core)
 {
void __iomem *base = core->base;
const unsigned long long iclk = 26600;  /* DSS L3 ICLK */
@@ -102,7 +102,7 @@ static void hdmi_core_ddc_init(struct hdmi_core_data *core)
REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x0, 2, 2);
 }
 
-static void hdmi_core_ddc_uninit(struct hdmi_core_data *core)
+void 

[PATCH v4 29/51] drm/omap: hdmi5: Register a drm_bridge for EDID read

2019-12-19 Thread Laurent Pinchart
In order to integrate with a chain of drm_bridge, the internal HDMI5
encoder has to expose the EDID read operation through the drm_bridge
API. Register a bridge at initialisation time to do so.

For the time being make the next bridge in the chain optional as the
HDMI output is still based on omap_dss_device. The create_connector
argument to the bridge attach function is also ignored for the same
reason. This will be changed later when removing the related
omapdrm-specific display drivers.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v2:

- Unregister bridge if output initialisation fails
---
 drivers/gpu/drm/omapdrm/dss/hdmi5.c | 79 ++---
 1 file changed, 73 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 2b02b0a11696..e7fe2a24a3e1 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -388,8 +388,10 @@ static void hdmi_disconnect(struct omap_dss_device *src,
 
 #define MAX_EDID   512
 
-static struct edid *hdmi_read_edid_data(struct hdmi_core_data *core)
+static struct edid *hdmi_read_edid_data(struct omap_hdmi *hdmi,
+   struct drm_connector *connector)
 {
+   struct hdmi_core_data *core = >core;
int max_ext_blocks = 3;
int r, n, i;
u8 *edid;
@@ -421,9 +423,12 @@ static struct edid *hdmi_read_edid_data(struct 
hdmi_core_data *core)
return NULL;
 }
 
-static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
+static struct edid *
+hdmi_do_read_edid(struct omap_hdmi *hdmi,
+ struct edid *(*read)(struct omap_hdmi *hdmi,
+  struct drm_connector *connector),
+ struct drm_connector *connector)
 {
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
struct edid *edid;
bool need_enable;
int idlemode;
@@ -447,7 +452,7 @@ static struct edid *hdmi_read_edid(struct omap_dss_device 
*dssdev)
 
hdmi5_core_ddc_init(>core);
 
-   edid = hdmi_read_edid_data(>core);
+   edid = read(hdmi, connector);
 
hdmi5_core_ddc_uninit(>core);
 
@@ -462,6 +467,12 @@ static struct edid *hdmi_read_edid(struct omap_dss_device 
*dssdev)
return (struct edid *)edid;
 }
 
+static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
+{
+   return hdmi_do_read_edid(dssdev_to_hdmi(dssdev), hdmi_read_edid_data,
+NULL);
+}
+
 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
const struct hdmi_avi_infoframe *avi)
 {
@@ -497,6 +508,56 @@ static const struct omap_dss_device_ops hdmi_ops = {
},
 };
 
+/* 
-
+ * DRM Bridge Operations
+ */
+
+static int hdmi5_bridge_attach(struct drm_bridge *bridge,
+  enum drm_bridge_attach_flags flags)
+{
+   struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
+
+   if (!hdmi->output.next_bridge)
+   return 0;
+
+   return drm_bridge_attach(bridge->encoder, hdmi->output.next_bridge,
+bridge, flags);
+}
+
+static struct edid *hdmi5_bridge_read_edid(struct omap_hdmi *hdmi,
+  struct drm_connector *connector)
+{
+   return drm_do_get_edid(connector, hdmi5_core_ddc_read, >core);
+}
+
+static struct edid *hdmi5_bridge_get_edid(struct drm_bridge *bridge,
+ struct drm_connector *connector)
+{
+   struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
+
+   return hdmi_do_read_edid(hdmi, hdmi5_bridge_read_edid, connector);
+}
+
+static const struct drm_bridge_funcs hdmi5_bridge_funcs = {
+   .attach = hdmi5_bridge_attach,
+   .get_edid = hdmi5_bridge_get_edid,
+};
+
+static void hdmi5_bridge_init(struct omap_hdmi *hdmi)
+{
+   hdmi->bridge.funcs = _bridge_funcs;
+   hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
+   hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
+   hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
+
+   drm_bridge_add(>bridge);
+}
+
+static void hdmi5_bridge_cleanup(struct omap_hdmi *hdmi)
+{
+   drm_bridge_remove(>bridge);
+}
+
 /* 
-
  * Audio Callbacks
  */
@@ -679,6 +740,8 @@ static int hdmi5_init_output(struct omap_hdmi *hdmi)
struct omap_dss_device *out = >output;
int r;
 
+   hdmi5_bridge_init(hdmi);
+
out->dev = >pdev->dev;
out->id = OMAP_DSS_OUTPUT_HDMI;
out->type = OMAP_DISPLAY_TYPE_HDMI;
@@ -689,9 +752,11 @@ static int hdmi5_init_output(struct omap_hdmi *hdmi)
out->of_port = 0;
out->ops_flags = OMAP_DSS_DEVICE_OP_EDID;
 
-   r = omapdss_device_init_output(out, NULL);
-   if (r < 0)
+   r = omapdss_device_init_output(out, 

[PATCH v4 34/51] drm/omap: venc: Register a drm_bridge

2019-12-19 Thread Laurent Pinchart
In order to integrate with a chain of drm_bridge, the internal VENC
encoder has to expose the mode valid, fixup and set, the enable and
disable and the get modes operations through the drm_bridge API.
Register a bridge at initialisation time to do so.

Most of those operations are removed from the omap_dss_device as they
are now called through the drm_bridge API by the DRM atomic helpers. The
only exception is the .get_modes() operation that is still invoked
through the omap_dss_device-based pipeline.

For the time being make the next bridge in the chain optional as the
VENC output is still based on omap_dss_device. The create_connector
argument to the bridge attach function is also ignored for the same
reason. This will be changed later when removing the related
omapdrm-specific display drivers.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v3:

- Drop unneeded venc_lock

Changes since v2:

- Unregister bridge if output initialisation fails
---
 drivers/gpu/drm/omapdrm/dss/venc.c | 243 ++---
 1 file changed, 155 insertions(+), 88 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c 
b/drivers/gpu/drm/omapdrm/dss/venc.c
index 977d8d525b43..ae639a051826 100644
--- a/drivers/gpu/drm/omapdrm/dss/venc.c
+++ b/drivers/gpu/drm/omapdrm/dss/venc.c
@@ -13,7 +13,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -26,6 +25,8 @@
 #include 
 #include 
 
+#include 
+
 #include "omapdss.h"
 #include "dss.h"
 
@@ -289,7 +290,6 @@ static const struct drm_display_mode omap_dss_ntsc_mode = {
 struct venc_device {
struct platform_device *pdev;
void __iomem *base;
-   struct mutex venc_lock;
struct regulator *vdda_dac_reg;
struct dss_device *dss;
 
@@ -303,9 +303,11 @@ struct venc_device {
bool requires_tv_dac_clk;
 
struct omap_dss_device output;
+   struct drm_bridge bridge;
 };
 
 #define dssdev_to_venc(dssdev) container_of(dssdev, struct venc_device, output)
+#define drm_bridge_to_venc(b) container_of(b, struct venc_device, bridge)
 
 static inline void venc_write_reg(struct venc_device *venc, int idx, u32 val)
 {
@@ -477,32 +479,6 @@ static void venc_power_off(struct venc_device *venc)
venc_runtime_put(venc);
 }
 
-static void venc_display_enable(struct omap_dss_device *dssdev)
-{
-   struct venc_device *venc = dssdev_to_venc(dssdev);
-
-   DSSDBG("venc_display_enable\n");
-
-   mutex_lock(>venc_lock);
-
-   venc_power_on(venc);
-
-   mutex_unlock(>venc_lock);
-}
-
-static void venc_display_disable(struct omap_dss_device *dssdev)
-{
-   struct venc_device *venc = dssdev_to_venc(dssdev);
-
-   DSSDBG("venc_display_disable\n");
-
-   mutex_lock(>venc_lock);
-
-   venc_power_off(venc);
-
-   mutex_unlock(>venc_lock);
-}
-
 static int venc_get_modes(struct omap_dss_device *dssdev,
  struct drm_connector *connector)
 {
@@ -545,57 +521,6 @@ static enum venc_videomode venc_get_videomode(const struct 
drm_display_mode *mod
return VENC_MODE_UNKNOWN;
 }
 
-static void venc_set_timings(struct omap_dss_device *dssdev,
-const struct drm_display_mode *mode)
-{
-   struct venc_device *venc = dssdev_to_venc(dssdev);
-   enum venc_videomode venc_mode = venc_get_videomode(mode);
-
-   DSSDBG("venc_set_timings\n");
-
-   mutex_lock(>venc_lock);
-
-   switch (venc_mode) {
-   default:
-   WARN_ON_ONCE(1);
-   /* Fall-through */
-   case VENC_MODE_PAL:
-   venc->config = _config_pal_trm;
-   break;
-
-   case VENC_MODE_NTSC:
-   venc->config = _config_ntsc_trm;
-   break;
-   }
-
-   dispc_set_tv_pclk(venc->dss->dispc, 1350);
-
-   mutex_unlock(>venc_lock);
-}
-
-static int venc_check_timings(struct omap_dss_device *dssdev,
- struct drm_display_mode *mode)
-{
-   DSSDBG("venc_check_timings\n");
-
-   switch (venc_get_videomode(mode)) {
-   case VENC_MODE_PAL:
-   drm_mode_copy(mode, _dss_pal_mode);
-   break;
-
-   case VENC_MODE_NTSC:
-   drm_mode_copy(mode, _dss_ntsc_mode);
-   break;
-
-   default:
-   return -EINVAL;
-   }
-
-   drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
-   drm_mode_set_name(mode);
-   return 0;
-}
-
 static int venc_dump_regs(struct seq_file *s, void *p)
 {
struct venc_device *venc = s->private;
@@ -689,15 +614,153 @@ static const struct omap_dss_device_ops venc_ops = {
.connect = venc_connect,
.disconnect = venc_disconnect,
 
-   .enable = venc_display_enable,
-   .disable = venc_display_disable,
+   .get_modes = venc_get_modes,
+};
 
-   .check_timings = venc_check_timings,
-   .set_timings = venc_set_timings,
+/* 

[PATCH v4 42/51] drm/omap: dpi: Sort includes alphabetically

2019-12-19 Thread Laurent Pinchart
This makes it easier to quickly locate duplicate includes.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index 2d0eb5fcbb5b..f8354271ce6f 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -9,20 +9,20 @@
 
 #define DSS_SUBSYS_NAME "DPI"
 
-#include 
+#include 
 #include 
-#include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 
-#include "omapdss.h"
 #include "dss.h"
+#include "omapdss.h"
 
 struct dpi_data {
struct platform_device *pdev;
-- 
Regards,

Laurent Pinchart

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[PATCH v4 17/51] drm/omap: Fix possible object reference leak

2019-12-19 Thread Laurent Pinchart
From: Wen Yang 

The call to of_find_matching_node returns a node pointer with refcount
incremented thus it must be explicitly decremented after the last
usage.

Detected by coccinelle with the following warnings:
drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c:212:2-8: ERROR: missing 
of_node_put; acquired a node pointer with refcount incremented on line 209, but 
without a corresponding object release within this function.
drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c:237:1-7: ERROR: missing 
of_node_put; acquired a node pointer with refcount incremented on line 209, but 
without a corresponding object release within this function.

Signed-off-by: Wen Yang 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Mukesh Ojha 
Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
Acked-by: Sam Ravnborg 
---
 drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c 
b/drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c
index 31502857f013..ce67891eedd4 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c
@@ -192,7 +192,7 @@ static int __init omapdss_boot_init(void)
dss = of_find_matching_node(NULL, omapdss_of_match);
 
if (dss == NULL || !of_device_is_available(dss))
-   return 0;
+   goto put_node;
 
omapdss_walk_device(dss, true);
 
@@ -217,6 +217,8 @@ static int __init omapdss_boot_init(void)
kfree(n);
}
 
+put_node:
+   of_node_put(dss);
return 0;
 }
 
-- 
Regards,

Laurent Pinchart

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[PATCH v4 38/51] drm/omap: hdmi: Remove omap_dss_device operations

2019-12-19 Thread Laurent Pinchart
Now that the HDMI outputs are driven fully through the drm_bridge API
their omap_dss_device operations are not used anymore. Remove them.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/hdmi.h  |  1 -
 drivers/gpu/drm/omapdrm/dss/hdmi4.c | 18 --
 drivers/gpu/drm/omapdrm/dss/hdmi5.c | 18 --
 3 files changed, 37 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi.h 
b/drivers/gpu/drm/omapdrm/dss/hdmi.h
index bd43f6abf27b..3a40833d3368 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi.h
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi.h
@@ -380,7 +380,6 @@ struct omap_hdmi {
bool display_enabled;
 };
 
-#define dssdev_to_hdmi(dssdev) container_of(dssdev, struct omap_hdmi, output)
 #define drm_bridge_to_hdmi(b) container_of(b, struct omap_hdmi, bridge)
 
 #endif
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index 7d411f5c4193..34db86ba6193 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -308,18 +308,6 @@ void hdmi4_core_disable(struct hdmi_core_data *core)
mutex_unlock(>lock);
 }
 
-static int hdmi_connect(struct omap_dss_device *src,
-   struct omap_dss_device *dst)
-{
-   return omapdss_device_connect(dst->dss, dst, dst->next);
-}
-
-static void hdmi_disconnect(struct omap_dss_device *src,
-   struct omap_dss_device *dst)
-{
-   omapdss_device_disconnect(dst, dst->next);
-}
-
 static struct edid *
 hdmi_do_read_edid(struct omap_hdmi *hdmi,
  struct edid *(*read)(struct omap_hdmi *hdmi,
@@ -369,11 +357,6 @@ hdmi_do_read_edid(struct omap_hdmi *hdmi,
return edid;
 }
 
-static const struct omap_dss_device_ops hdmi_ops = {
-   .connect= hdmi_connect,
-   .disconnect = hdmi_disconnect,
-};
-
 /* 
-
  * DRM Bridge Operations
  */
@@ -736,7 +719,6 @@ static int hdmi4_init_output(struct omap_hdmi *hdmi)
out->type = OMAP_DISPLAY_TYPE_HDMI;
out->name = "hdmi.0";
out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
-   out->ops = _ops;
out->owner = THIS_MODULE;
out->of_port = 0;
 
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index 0490393101fd..69b0d0cc7593 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -306,18 +306,6 @@ static void hdmi_core_disable(struct omap_hdmi *hdmi)
mutex_unlock(>lock);
 }
 
-static int hdmi_connect(struct omap_dss_device *src,
-   struct omap_dss_device *dst)
-{
-   return omapdss_device_connect(dst->dss, dst, dst->next);
-}
-
-static void hdmi_disconnect(struct omap_dss_device *src,
-   struct omap_dss_device *dst)
-{
-   omapdss_device_disconnect(dst, dst->next);
-}
-
 static struct edid *
 hdmi_do_read_edid(struct omap_hdmi *hdmi,
  struct edid *(*read)(struct omap_hdmi *hdmi,
@@ -362,11 +350,6 @@ hdmi_do_read_edid(struct omap_hdmi *hdmi,
return (struct edid *)edid;
 }
 
-static const struct omap_dss_device_ops hdmi_ops = {
-   .connect= hdmi_connect,
-   .disconnect = hdmi_disconnect,
-};
-
 /* 
-
  * DRM Bridge Operations
  */
@@ -710,7 +693,6 @@ static int hdmi5_init_output(struct omap_hdmi *hdmi)
out->type = OMAP_DISPLAY_TYPE_HDMI;
out->name = "hdmi.0";
out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
-   out->ops = _ops;
out->owner = THIS_MODULE;
out->of_port = 0;
 
-- 
Regards,

Laurent Pinchart

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[PATCH v4 28/51] drm/omap: hdmi4: Register a drm_bridge for EDID read

2019-12-19 Thread Laurent Pinchart
In order to integrate with a chain of drm_bridge, the internal HDMI4
encoder has to expose the EDID read operation through the drm_bridge
API. Register a bridge at initialisation time to do so.

For the time being make the next bridge in the chain optional as the
HDMI output is still based on omap_dss_device. The create_connector
argument to the bridge attach function is also ignored for the same
reason. This will be changed later when removing the related
omapdrm-specific display drivers.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v2:

- Unregister bridge if output initialisation fails
---
 drivers/gpu/drm/omapdrm/dss/hdmi.h  |  3 ++
 drivers/gpu/drm/omapdrm/dss/hdmi4.c | 78 ++---
 2 files changed, 75 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi.h 
b/drivers/gpu/drm/omapdrm/dss/hdmi.h
index c867552c925c..bd43f6abf27b 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi.h
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi.h
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "omapdss.h"
 #include "dss.h"
@@ -364,6 +365,7 @@ struct omap_hdmi {
bool core_enabled;
 
struct omap_dss_device output;
+   struct drm_bridge bridge;
 
struct platform_device *audio_pdev;
void (*audio_abort_cb)(struct device *dev);
@@ -379,5 +381,6 @@ struct omap_hdmi {
 };
 
 #define dssdev_to_hdmi(dssdev) container_of(dssdev, struct omap_hdmi, output)
+#define drm_bridge_to_hdmi(b) container_of(b, struct omap_hdmi, bridge)
 
 #endif
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index 37536b9f3114..67994287447b 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -390,7 +390,8 @@ static void hdmi_disconnect(struct omap_dss_device *src,
 
 #define MAX_EDID   512
 
-static struct edid *hdmi_read_edid_data(struct omap_hdmi *hdmi)
+static struct edid *hdmi_read_edid_data(struct omap_hdmi *hdmi,
+   struct drm_connector *connector)
 {
u8 *edid;
int r;
@@ -428,9 +429,12 @@ static struct edid *hdmi_read_edid_data(struct omap_hdmi 
*hdmi)
return NULL;
 }
 
-static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
+static struct edid *
+hdmi_do_read_edid(struct omap_hdmi *hdmi,
+ struct edid *(*read)(struct omap_hdmi *hdmi,
+  struct drm_connector *connector),
+ struct drm_connector *connector)
 {
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
struct edid *edid = NULL;
unsigned int cec_addr;
bool need_enable;
@@ -452,7 +456,7 @@ static struct edid *hdmi_read_edid(struct omap_dss_device 
*dssdev)
if (r)
goto done;
 
-   edid = hdmi_read_edid_data(hdmi);
+   edid = read(hdmi, connector);
 
 done:
hdmi_runtime_put(hdmi);
@@ -474,6 +478,12 @@ static struct edid *hdmi_read_edid(struct omap_dss_device 
*dssdev)
return edid;
 }
 
+static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev)
+{
+   return hdmi_do_read_edid(dssdev_to_hdmi(dssdev), hdmi_read_edid_data,
+NULL);
+}
+
 static void hdmi_lost_hotplug(struct omap_dss_device *dssdev)
 {
struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
@@ -517,6 +527,56 @@ static const struct omap_dss_device_ops hdmi_ops = {
},
 };
 
+/* 
-
+ * DRM Bridge Operations
+ */
+
+static int hdmi4_bridge_attach(struct drm_bridge *bridge,
+  enum drm_bridge_attach_flags flags)
+{
+   struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
+
+   if (!hdmi->output.next_bridge)
+   return 0;
+
+   return drm_bridge_attach(bridge->encoder, hdmi->output.next_bridge,
+bridge, flags);
+}
+
+static struct edid *hdmi4_bridge_read_edid(struct omap_hdmi *hdmi,
+  struct drm_connector *connector)
+{
+   return drm_do_get_edid(connector, hdmi4_core_ddc_read, >core);
+}
+
+static struct edid *hdmi4_bridge_get_edid(struct drm_bridge *bridge,
+ struct drm_connector *connector)
+{
+   struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
+
+   return hdmi_do_read_edid(hdmi, hdmi4_bridge_read_edid, connector);
+}
+
+static const struct drm_bridge_funcs hdmi4_bridge_funcs = {
+   .attach = hdmi4_bridge_attach,
+   .get_edid = hdmi4_bridge_get_edid,
+};
+
+static void hdmi4_bridge_init(struct omap_hdmi *hdmi)
+{
+   hdmi->bridge.funcs = _bridge_funcs;
+   hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
+   hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
+   hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
+
+   drm_bridge_add(>bridge);
+}
+
+static void hdmi4_bridge_cleanup(struct 

[PATCH v4 30/51] drm/omap: hdmi4: Move mode set, enable and disable operations to bridge

2019-12-19 Thread Laurent Pinchart
Move the omap_dss_device .set_timings(), .enable() and .disable()
operations to the drm_bridge functions. As the drm_bridge for the HDMI
encoder is unconditionally registered and attached, those operations
will be called at the appropriate time.

The omapdss device .set_infoframe() and .set_hdmi_mode() operations have
no equivalent in drm_bridge. Thir content is thus moved to the bridge
.enable() operation as the data they store is not needed before the HDMI
encoder gets enabled.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v2:

- Detail .set_infoframe() and .set_hdmi_mode() handling in the commit
  message
---
 drivers/gpu/drm/omapdrm/dss/hdmi4.c | 201 +++-
 1 file changed, 106 insertions(+), 95 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi4.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
index 67994287447b..a5c6054158eb 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -28,6 +28,8 @@
 #include 
 #include 
 
+#include 
+
 #include "omapdss.h"
 #include "hdmi4_core.h"
 #include "hdmi4_cec.h"
@@ -237,20 +239,6 @@ static void hdmi_power_off_full(struct omap_hdmi *hdmi)
hdmi_power_off_core(hdmi);
 }
 
-static void hdmi_display_set_timings(struct omap_dss_device *dssdev,
-const struct drm_display_mode *mode)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-
-   mutex_lock(>lock);
-
-   drm_display_mode_to_videomode(mode, >cfg.vm);
-
-   dispc_set_tv_pclk(hdmi->dss->dispc, mode->clock * 1000);
-
-   mutex_unlock(>lock);
-}
-
 static int hdmi_dump_regs(struct seq_file *s, void *p)
 {
struct omap_hdmi *hdmi = s->private;
@@ -284,62 +272,6 @@ static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
hdmi_wp_audio_enable(>wp, false);
 }
 
-static void hdmi_display_enable(struct omap_dss_device *dssdev)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-   unsigned long flags;
-   int r;
-
-   DSSDBG("ENTER hdmi_display_enable\n");
-
-   mutex_lock(>lock);
-
-   r = hdmi_power_on_full(hdmi);
-   if (r) {
-   DSSERR("failed to power on device\n");
-   goto done;
-   }
-
-   if (hdmi->audio_configured) {
-   r = hdmi4_audio_config(>core, >wp,
-  >audio_config,
-  hdmi->cfg.vm.pixelclock);
-   if (r) {
-   DSSERR("Error restoring audio configuration: %d", r);
-   hdmi->audio_abort_cb(>pdev->dev);
-   hdmi->audio_configured = false;
-   }
-   }
-
-   spin_lock_irqsave(>audio_playing_lock, flags);
-   if (hdmi->audio_configured && hdmi->audio_playing)
-   hdmi_start_audio_stream(hdmi);
-   hdmi->display_enabled = true;
-   spin_unlock_irqrestore(>audio_playing_lock, flags);
-
-done:
-   mutex_unlock(>lock);
-}
-
-static void hdmi_display_disable(struct omap_dss_device *dssdev)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-   unsigned long flags;
-
-   DSSDBG("Enter hdmi_display_disable\n");
-
-   mutex_lock(>lock);
-
-   spin_lock_irqsave(>audio_playing_lock, flags);
-   hdmi_stop_audio_stream(hdmi);
-   hdmi->display_enabled = false;
-   spin_unlock_irqrestore(>audio_playing_lock, flags);
-
-   hdmi_power_off_full(hdmi);
-
-   mutex_unlock(>lock);
-}
-
 int hdmi4_core_enable(struct hdmi_core_data *core)
 {
struct omap_hdmi *hdmi = container_of(core, struct omap_hdmi, core);
@@ -491,39 +423,14 @@ static void hdmi_lost_hotplug(struct omap_dss_device 
*dssdev)
hdmi4_cec_set_phys_addr(>core, CEC_PHYS_ADDR_INVALID);
 }
 
-static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
-   const struct hdmi_avi_infoframe *avi)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-
-   hdmi->cfg.infoframe = *avi;
-   return 0;
-}
-
-static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
-   bool hdmi_mode)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-
-   hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
-   return 0;
-}
-
 static const struct omap_dss_device_ops hdmi_ops = {
.connect= hdmi_connect,
.disconnect = hdmi_disconnect,
 
-   .enable = hdmi_display_enable,
-   .disable= hdmi_display_disable,
-
-   .set_timings= hdmi_display_set_timings,
-
.read_edid  = hdmi_read_edid,
 
.hdmi = {
.lost_hotplug   = hdmi_lost_hotplug,
-   .set_infoframe  = hdmi_set_infoframe,
-   .set_hdmi_mode  = hdmi_set_hdmi_mode,
},
 };
 
@@ -543,6 +450,107 @@ static int hdmi4_bridge_attach(struct drm_bridge *bridge,
 

[PATCH v4 51/51] drm/omap: dss: Remove unused omapdss_of_find_connected_device() function

2019-12-19 Thread Laurent Pinchart
The omapdss_of_find_connected_device() function isn't used anymore,
remove it.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/Makefile  |  2 +-
 drivers/gpu/drm/omapdrm/dss/dss-of.c  | 28 ---
 drivers/gpu/drm/omapdrm/dss/omapdss.h |  3 ---
 3 files changed, 1 insertion(+), 32 deletions(-)
 delete mode 100644 drivers/gpu/drm/omapdrm/dss/dss-of.c

diff --git a/drivers/gpu/drm/omapdrm/dss/Makefile 
b/drivers/gpu/drm/omapdrm/dss/Makefile
index 5950c3f52c2e..f967e6948f2e 100644
--- a/drivers/gpu/drm/omapdrm/dss/Makefile
+++ b/drivers/gpu/drm/omapdrm/dss/Makefile
@@ -2,7 +2,7 @@
 obj-$(CONFIG_OMAP2_DSS_INIT) += omapdss-boot-init.o
 
 obj-$(CONFIG_OMAP_DSS_BASE) += omapdss-base.o
-omapdss-base-y := base.o display.o dss-of.o output.o
+omapdss-base-y := base.o display.o output.o
 
 obj-$(CONFIG_OMAP2_DSS) += omapdss.o
 # Core DSS files
diff --git a/drivers/gpu/drm/omapdrm/dss/dss-of.c 
b/drivers/gpu/drm/omapdrm/dss/dss-of.c
deleted file mode 100644
index b7981f3b80ad..
--- a/drivers/gpu/drm/omapdrm/dss/dss-of.c
+++ /dev/null
@@ -1,28 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
- * Author: Tomi Valkeinen 
- */
-
-#include 
-#include 
-#include 
-
-#include "omapdss.h"
-
-struct omap_dss_device *
-omapdss_of_find_connected_device(struct device_node *node, unsigned int port)
-{
-   struct device_node *remote_node;
-   struct omap_dss_device *dssdev;
-
-   remote_node = of_graph_get_remote_node(node, port, 0);
-   if (!remote_node)
-   return NULL;
-
-   dssdev = omapdss_find_device_by_node(remote_node);
-   of_node_put(remote_node);
-
-   return dssdev ? dssdev : ERR_PTR(-EPROBE_DEFER);
-}
-EXPORT_SYMBOL_GPL(omapdss_of_find_connected_device);
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 6ecbc7273032..ab19d4af8de7 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -471,9 +471,6 @@ static inline bool omapdss_device_is_enabled(struct 
omap_dss_device *dssdev)
return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
 }
 
-struct omap_dss_device *
-omapdss_of_find_connected_device(struct device_node *node, unsigned int port);
-
 enum dss_writeback_channel {
DSS_WB_LCD1_MGR =   0,
DSS_WB_LCD2_MGR =   1,
-- 
Regards,

Laurent Pinchart

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[PATCH v4 48/51] drm/omap: Hardcode omap_connector type to DSI

2019-12-19 Thread Laurent Pinchart
The omap_connector implementation is now used for DSI only. Hardcode its
type and drop unused code.

Signed-off-by: Laurent Pinchart 
---
 drivers/gpu/drm/omapdrm/dss/base.c   | 23 --
 drivers/gpu/drm/omapdrm/dss/omapdss.h|  1 -
 drivers/gpu/drm/omapdrm/omap_connector.c | 31 ++--
 3 files changed, 2 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/base.c 
b/drivers/gpu/drm/omapdrm/dss/base.c
index 2db3bd2f19db..455b410f7401 100644
--- a/drivers/gpu/drm/omapdrm/dss/base.c
+++ b/drivers/gpu/drm/omapdrm/dss/base.c
@@ -286,29 +286,6 @@ void omapdss_device_post_disable(struct omap_dss_device 
*dssdev)
 }
 EXPORT_SYMBOL_GPL(omapdss_device_post_disable);
 
-unsigned int omapdss_device_connector_type(enum omap_display_type type)
-{
-   switch (type) {
-   case OMAP_DISPLAY_TYPE_HDMI:
-   return DRM_MODE_CONNECTOR_HDMIA;
-   case OMAP_DISPLAY_TYPE_DVI:
-   return DRM_MODE_CONNECTOR_DVID;
-   case OMAP_DISPLAY_TYPE_DSI:
-   return DRM_MODE_CONNECTOR_DSI;
-   case OMAP_DISPLAY_TYPE_DPI:
-   case OMAP_DISPLAY_TYPE_DBI:
-   return DRM_MODE_CONNECTOR_DPI;
-   case OMAP_DISPLAY_TYPE_VENC:
-   /* TODO: This could also be composite */
-   return DRM_MODE_CONNECTOR_SVIDEO;
-   case OMAP_DISPLAY_TYPE_SDI:
-   return DRM_MODE_CONNECTOR_LVDS;
-   default:
-   return DRM_MODE_CONNECTOR_Unknown;
-   }
-}
-EXPORT_SYMBOL_GPL(omapdss_device_connector_type);
-
 /* 
-
  * Components Handling
  */
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index cb79e05c902d..2e5453df2293 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -454,7 +454,6 @@ void omapdss_device_pre_enable(struct omap_dss_device 
*dssdev);
 void omapdss_device_enable(struct omap_dss_device *dssdev);
 void omapdss_device_disable(struct omap_dss_device *dssdev);
 void omapdss_device_post_disable(struct omap_dss_device *dssdev);
-unsigned int omapdss_device_connector_type(enum omap_display_type type);
 
 int omap_dss_get_num_overlay_managers(void);
 
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c 
b/drivers/gpu/drm/omapdrm/omap_connector.c
index baa31ed1f993..528764566b17 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -24,22 +24,7 @@ struct omap_connector {
 static enum drm_connector_status omap_connector_detect(
struct drm_connector *connector, bool force)
 {
-   enum drm_connector_status status;
-
-   switch (connector->connector_type) {
-   case DRM_MODE_CONNECTOR_DPI:
-   case DRM_MODE_CONNECTOR_LVDS:
-   case DRM_MODE_CONNECTOR_DSI:
-   status = connector_status_connected;
-   break;
-   default:
-   status = connector_status_unknown;
-   break;
-   }
-
-   VERB("%s: %d (force=%d)", connector->name, status, force);
-
-   return status;
+   return connector_status_connected;
 }
 
 static void omap_connector_destroy(struct drm_connector *connector)
@@ -138,18 +123,6 @@ static const struct drm_connector_helper_funcs 
omap_connector_helper_funcs = {
.mode_valid = omap_connector_mode_valid,
 };
 
-static int omap_connector_get_type(struct omap_dss_device *output)
-{
-   struct omap_dss_device *display;
-   enum omap_display_type type;
-
-   display = omapdss_display_get(output);
-   type = display->type;
-   omapdss_device_put(display);
-
-   return omapdss_device_connector_type(type);
-}
-
 /* initialize connector */
 struct drm_connector *omap_connector_init(struct drm_device *dev,
  struct omap_dss_device *output,
@@ -171,7 +144,7 @@ struct drm_connector *omap_connector_init(struct drm_device 
*dev,
connector->doublescan_allowed = 0;
 
drm_connector_init(dev, connector, _connector_funcs,
-  omap_connector_get_type(output));
+  DRM_MODE_CONNECTOR_DSI);
drm_connector_helper_add(connector, _connector_helper_funcs);
 
return connector;
-- 
Regards,

Laurent Pinchart

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[PATCH v4 13/51] drm/bridge: panel: Implement bridge connector operations

2019-12-19 Thread Laurent Pinchart
Implement the newly added bridge connector operations, allowing the
usage of drm_bridge_panel with drm_bridge_connector.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Boris Brezillon 
Reviewed-by: Sam Ravnborg 
---
Changes since v2:

- Use the connector type from the panel instead of hardcoding it to DPI
- Rebased on top top of Sam's panel .get_modes() rework
---
 drivers/gpu/drm/bridge/panel.c | 17 +
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/panel.c b/drivers/gpu/drm/bridge/panel.c
index 49bf5592c6f7..cf4be369d75e 100644
--- a/drivers/gpu/drm/bridge/panel.c
+++ b/drivers/gpu/drm/bridge/panel.c
@@ -60,10 +60,8 @@ static int panel_bridge_attach(struct drm_bridge *bridge,
struct drm_connector *connector = _bridge->connector;
int ret;
 
-   if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) {
-   DRM_ERROR("Fix bridge driver to make connector optional!");
-   return -EINVAL;
-   }
+   if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
+   return 0;
 
if (!bridge->encoder) {
DRM_ERROR("Missing encoder\n");
@@ -126,6 +124,14 @@ static void panel_bridge_post_disable(struct drm_bridge 
*bridge)
drm_panel_unprepare(panel_bridge->panel);
 }
 
+static int panel_bridge_get_modes(struct drm_bridge *bridge,
+ struct drm_connector *connector)
+{
+   struct panel_bridge *panel_bridge = drm_bridge_to_panel_bridge(bridge);
+
+   return drm_panel_get_modes(panel_bridge->panel, connector);
+}
+
 static const struct drm_bridge_funcs panel_bridge_bridge_funcs = {
.attach = panel_bridge_attach,
.detach = panel_bridge_detach,
@@ -133,6 +139,7 @@ static const struct drm_bridge_funcs 
panel_bridge_bridge_funcs = {
.enable = panel_bridge_enable,
.disable = panel_bridge_disable,
.post_disable = panel_bridge_post_disable,
+   .get_modes = panel_bridge_get_modes,
 };
 
 /**
@@ -202,6 +209,8 @@ struct drm_bridge *drm_panel_bridge_add_typed(struct 
drm_panel *panel,
 #ifdef CONFIG_OF
panel_bridge->bridge.of_node = panel->dev->of_node;
 #endif
+   panel_bridge->bridge.ops = DRM_BRIDGE_OP_MODES;
+   panel_bridge->bridge.type = connector_type;
 
drm_bridge_add(_bridge->bridge);
 
-- 
Regards,

Laurent Pinchart

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[PATCH v4 44/51] drm/omap: dpi: Simplify clock setting API

2019-12-19 Thread Laurent Pinchart
The dpi_set_pll_clk() and dpi_set_dispc_clk() return various information
through pointer arguments that are never used by the callers. Remove
them to simplify the clock setting API.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/dpi.c | 32 ---
 1 file changed, 8 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c 
b/drivers/gpu/drm/omapdrm/dss/dpi.c
index dccf81e4ce64..c167bd1116ec 100644
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -287,9 +287,7 @@ static bool dpi_dss_clk_calc(struct dpi_data *dpi, unsigned 
long pck,
 
 
 
-static int dpi_set_pll_clk(struct dpi_data *dpi, enum omap_channel channel,
-   unsigned long pck_req, unsigned long *fck, int *lck_div,
-   int *pck_div)
+static int dpi_set_pll_clk(struct dpi_data *dpi, unsigned long pck_req)
 {
struct dpi_clk_calc_ctx ctx;
int r;
@@ -303,19 +301,15 @@ static int dpi_set_pll_clk(struct dpi_data *dpi, enum 
omap_channel channel,
if (r)
return r;
 
-   dss_select_lcd_clk_source(dpi->dss, channel, dpi->clk_src);
+   dss_select_lcd_clk_source(dpi->dss, dpi->output.dispc_channel,
+ dpi->clk_src);
 
dpi->mgr_config.clock_info = ctx.dispc_cinfo;
 
-   *fck = ctx.pll_cinfo.clkout[ctx.clkout_idx];
-   *lck_div = ctx.dispc_cinfo.lck_div;
-   *pck_div = ctx.dispc_cinfo.pck_div;
-
return 0;
 }
 
-static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req,
-   unsigned long *fck, int *lck_div, int *pck_div)
+static int dpi_set_dispc_clk(struct dpi_data *dpi, unsigned long pck_req)
 {
struct dpi_clk_calc_ctx ctx;
int r;
@@ -331,29 +325,19 @@ static int dpi_set_dispc_clk(struct dpi_data *dpi, 
unsigned long pck_req,
 
dpi->mgr_config.clock_info = ctx.dispc_cinfo;
 
-   *fck = ctx.fck;
-   *lck_div = ctx.dispc_cinfo.lck_div;
-   *pck_div = ctx.dispc_cinfo.pck_div;
-
return 0;
 }
 
 static int dpi_set_mode(struct dpi_data *dpi)
 {
-   int lck_div = 0, pck_div = 0;
-   unsigned long fck = 0;
-   int r = 0;
+   int r;
 
if (dpi->pll)
-   r = dpi_set_pll_clk(dpi, dpi->output.dispc_channel,
-   dpi->pixelclock, , _div, _div);
+   r = dpi_set_pll_clk(dpi, dpi->pixelclock);
else
-   r = dpi_set_dispc_clk(dpi, dpi->pixelclock, ,
-   _div, _div);
-   if (r)
-   return r;
+   r = dpi_set_dispc_clk(dpi, dpi->pixelclock);
 
-   return 0;
+   return r;
 }
 
 static void dpi_config_lcd_manager(struct dpi_data *dpi)
-- 
Regards,

Laurent Pinchart

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[PATCH v4 20/51] drm/omap: Factor out display type to connector type conversion

2019-12-19 Thread Laurent Pinchart
Move the code that computes the DRM connector type for the
omapdss_device display type to a new omapdss_device_connector_type()
function for later reuse.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
Acked-by: Sam Ravnborg 
---
 drivers/gpu/drm/omapdrm/dss/base.c   | 23 +++
 drivers/gpu/drm/omapdrm/dss/omapdss.h|  1 +
 drivers/gpu/drm/omapdrm/omap_connector.c | 19 +--
 3 files changed, 25 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/base.c 
b/drivers/gpu/drm/omapdrm/dss/base.c
index a1970b9db6ab..cae5687822e2 100644
--- a/drivers/gpu/drm/omapdrm/dss/base.c
+++ b/drivers/gpu/drm/omapdrm/dss/base.c
@@ -285,6 +285,29 @@ void omapdss_device_post_disable(struct omap_dss_device 
*dssdev)
 }
 EXPORT_SYMBOL_GPL(omapdss_device_post_disable);
 
+unsigned int omapdss_device_connector_type(enum omap_display_type type)
+{
+   switch (type) {
+   case OMAP_DISPLAY_TYPE_HDMI:
+   return DRM_MODE_CONNECTOR_HDMIA;
+   case OMAP_DISPLAY_TYPE_DVI:
+   return DRM_MODE_CONNECTOR_DVID;
+   case OMAP_DISPLAY_TYPE_DSI:
+   return DRM_MODE_CONNECTOR_DSI;
+   case OMAP_DISPLAY_TYPE_DPI:
+   case OMAP_DISPLAY_TYPE_DBI:
+   return DRM_MODE_CONNECTOR_DPI;
+   case OMAP_DISPLAY_TYPE_VENC:
+   /* TODO: This could also be composite */
+   return DRM_MODE_CONNECTOR_SVIDEO;
+   case OMAP_DISPLAY_TYPE_SDI:
+   return DRM_MODE_CONNECTOR_LVDS;
+   default:
+   return DRM_MODE_CONNECTOR_Unknown;
+   }
+}
+EXPORT_SYMBOL_GPL(omapdss_device_connector_type);
+
 /* 
-
  * Components Handling
  */
diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h 
b/drivers/gpu/drm/omapdrm/dss/omapdss.h
index 79f6b195c7cf..c5672e5174c5 100644
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -479,6 +479,7 @@ void omapdss_device_pre_enable(struct omap_dss_device 
*dssdev);
 void omapdss_device_enable(struct omap_dss_device *dssdev);
 void omapdss_device_disable(struct omap_dss_device *dssdev);
 void omapdss_device_post_disable(struct omap_dss_device *dssdev);
+unsigned int omapdss_device_connector_type(enum omap_display_type type);
 
 int omap_dss_get_num_overlay_managers(void);
 
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c 
b/drivers/gpu/drm/omapdrm/omap_connector.c
index 88dbf3fa473f..38c7a79c5d4a 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -296,24 +296,7 @@ static int omap_connector_get_type(struct omap_dss_device 
*output)
type = display->type;
omapdss_device_put(display);
 
-   switch (type) {
-   case OMAP_DISPLAY_TYPE_HDMI:
-   return DRM_MODE_CONNECTOR_HDMIA;
-   case OMAP_DISPLAY_TYPE_DVI:
-   return DRM_MODE_CONNECTOR_DVID;
-   case OMAP_DISPLAY_TYPE_DSI:
-   return DRM_MODE_CONNECTOR_DSI;
-   case OMAP_DISPLAY_TYPE_DPI:
-   case OMAP_DISPLAY_TYPE_DBI:
-   return DRM_MODE_CONNECTOR_DPI;
-   case OMAP_DISPLAY_TYPE_VENC:
-   /* TODO: This could also be composite */
-   return DRM_MODE_CONNECTOR_SVIDEO;
-   case OMAP_DISPLAY_TYPE_SDI:
-   return DRM_MODE_CONNECTOR_LVDS;
-   default:
-   return DRM_MODE_CONNECTOR_Unknown;
-   }
+   return omapdss_device_connector_type(type);
 }
 
 /* initialize connector */
-- 
Regards,

Laurent Pinchart

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[PATCH v4 46/51] drm/omap: sdi: Sort includes alphabetically

2019-12-19 Thread Laurent Pinchart
This makes it easier to quickly locate duplicate includes.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/dss/sdi.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/sdi.c 
b/drivers/gpu/drm/omapdrm/dss/sdi.c
index 11aa2f712ff4..7dedfcc86922 100644
--- a/drivers/gpu/drm/omapdrm/dss/sdi.c
+++ b/drivers/gpu/drm/omapdrm/dss/sdi.c
@@ -6,17 +6,17 @@
 
 #define DSS_SUBSYS_NAME "SDI"
 
-#include 
 #include 
 #include 
-#include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
-#include 
 
-#include "omapdss.h"
 #include "dss.h"
+#include "omapdss.h"
 
 struct sdi_device {
struct platform_device *pdev;
-- 
Regards,

Laurent Pinchart

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[PATCH v4 31/51] drm/omap: hdmi5: Move mode set, enable and disable operations to bridge

2019-12-19 Thread Laurent Pinchart
Move the omap_dss_device .set_timings(), .enable() and .disable()
operations to the drm_bridge functions. As the drm_bridge for the HDMI
encoder is unconditionally registered and attached, those operations
will be called at the appropriate time.

The omapdss device .set_infoframe() and .set_hdmi_mode() operations have
no equivalent in drm_bridge. Thir content is thus moved to the bridge
.enable() operation as the data they store is not needed before the HDMI
encoder gets enabled.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v2:

- Detail .set_infoframe() and .set_hdmi_mode() handling in the commit
  message
---
 drivers/gpu/drm/omapdrm/dss/hdmi5.c | 204 +++-
 1 file changed, 106 insertions(+), 98 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c 
b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
index e7fe2a24a3e1..88b637e894fa 100644
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -31,6 +31,8 @@
 #include 
 #include 
 
+#include 
+
 #include "omapdss.h"
 #include "hdmi5_core.h"
 #include "dss.h"
@@ -236,20 +238,6 @@ static void hdmi_power_off_full(struct omap_hdmi *hdmi)
hdmi_power_off_core(hdmi);
 }
 
-static void hdmi_display_set_timings(struct omap_dss_device *dssdev,
-const struct drm_display_mode *mode)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-
-   mutex_lock(>lock);
-
-   drm_display_mode_to_videomode(mode, >cfg.vm);
-
-   dispc_set_tv_pclk(hdmi->dss->dispc, mode->clock * 1000);
-
-   mutex_unlock(>lock);
-}
-
 static int hdmi_dump_regs(struct seq_file *s, void *p)
 {
struct omap_hdmi *hdmi = s->private;
@@ -285,62 +273,6 @@ static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
 }
 
-static void hdmi_display_enable(struct omap_dss_device *dssdev)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-   unsigned long flags;
-   int r;
-
-   DSSDBG("ENTER hdmi_display_enable\n");
-
-   mutex_lock(>lock);
-
-   r = hdmi_power_on_full(hdmi);
-   if (r) {
-   DSSERR("failed to power on device\n");
-   goto done;
-   }
-
-   if (hdmi->audio_configured) {
-   r = hdmi5_audio_config(>core, >wp,
-  >audio_config,
-  hdmi->cfg.vm.pixelclock);
-   if (r) {
-   DSSERR("Error restoring audio configuration: %d", r);
-   hdmi->audio_abort_cb(>pdev->dev);
-   hdmi->audio_configured = false;
-   }
-   }
-
-   spin_lock_irqsave(>audio_playing_lock, flags);
-   if (hdmi->audio_configured && hdmi->audio_playing)
-   hdmi_start_audio_stream(hdmi);
-   hdmi->display_enabled = true;
-   spin_unlock_irqrestore(>audio_playing_lock, flags);
-
-done:
-   mutex_unlock(>lock);
-}
-
-static void hdmi_display_disable(struct omap_dss_device *dssdev)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-   unsigned long flags;
-
-   DSSDBG("Enter hdmi_display_disable\n");
-
-   mutex_lock(>lock);
-
-   spin_lock_irqsave(>audio_playing_lock, flags);
-   hdmi_stop_audio_stream(hdmi);
-   hdmi->display_enabled = false;
-   spin_unlock_irqrestore(>audio_playing_lock, flags);
-
-   hdmi_power_off_full(hdmi);
-
-   mutex_unlock(>lock);
-}
-
 static int hdmi_core_enable(struct omap_hdmi *hdmi)
 {
int r = 0;
@@ -473,39 +405,11 @@ static struct edid *hdmi_read_edid(struct omap_dss_device 
*dssdev)
 NULL);
 }
 
-static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
-   const struct hdmi_avi_infoframe *avi)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-
-   hdmi->cfg.infoframe = *avi;
-   return 0;
-}
-
-static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
-   bool hdmi_mode)
-{
-   struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev);
-
-   hdmi->cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
-   return 0;
-}
-
 static const struct omap_dss_device_ops hdmi_ops = {
.connect= hdmi_connect,
.disconnect = hdmi_disconnect,
 
-   .enable = hdmi_display_enable,
-   .disable= hdmi_display_disable,
-
-   .set_timings= hdmi_display_set_timings,
-
.read_edid  = hdmi_read_edid,
-
-   .hdmi = {
-   .set_infoframe  = hdmi_set_infoframe,
-   .set_hdmi_mode  = hdmi_set_hdmi_mode,
-   },
 };
 
 /* 
-
@@ -524,6 +428,107 @@ static int hdmi5_bridge_attach(struct drm_bridge *bridge,
 bridge, flags);
 }
 

[PATCH v4 35/51] drm/omap: Create connector for bridges

2019-12-19 Thread Laurent Pinchart
Use the drm_bridge_connector helper to create a connector for pipelines
that use drm_bridge. This allows splitting connector operations across
multiple bridges when necessary, instead of having the last bridge in
the chain creating the connector and handling all connector operations
internally.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Tomi Valkeinen 
---
Changes since v3:

- Remove outdated comment

Changes since v1:

- Squash with patch "drm/omap: Detach from panels at remove time"
---
 drivers/gpu/drm/omapdrm/omap_drv.c | 74 +-
 1 file changed, 62 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c 
b/drivers/gpu/drm/omapdrm/omap_drv.c
index 1df509342b5d..47afa37055b3 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -12,10 +12,12 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -291,9 +293,14 @@ static int omap_modeset_init(struct drm_device *dev)
 
if (pipe->output->bridge) {
ret = drm_bridge_attach(pipe->encoder,
-   pipe->output->bridge, NULL, 0);
-   if (ret < 0)
+   pipe->output->bridge, NULL,
+   DRM_BRIDGE_ATTACH_NO_CONNECTOR);
+   if (ret < 0) {
+   dev_err(priv->dev,
+   "unable to attach bridge %pOF\n",
+   pipe->output->bridge->of_node);
return ret;
+   }
}
 
id = omap_display_id(pipe->output);
@@ -329,8 +336,23 @@ static int omap_modeset_init(struct drm_device *dev)
  encoder);
if (!pipe->connector)
return -ENOMEM;
+   } else {
+   pipe->connector = drm_bridge_connector_init(dev, 
encoder);
+   if (IS_ERR(pipe->connector)) {
+   dev_err(priv->dev,
+   "unable to create bridge connector for 
%s\n",
+   pipe->output->name);
+   return PTR_ERR(pipe->connector);
+   }
+   }
 
-   drm_connector_attach_encoder(pipe->connector, encoder);
+   drm_connector_attach_encoder(pipe->connector, encoder);
+
+   if (pipe->output->panel) {
+   ret = drm_panel_attach(pipe->output->panel,
+  pipe->connector);
+   if (ret < 0)
+   return ret;
}
 
crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
@@ -369,6 +391,23 @@ static int omap_modeset_init(struct drm_device *dev)
return 0;
 }
 
+static void omap_modeset_fini(struct drm_device *ddev)
+{
+   struct omap_drm_private *priv = ddev->dev_private;
+   unsigned int i;
+
+   omap_drm_irq_uninstall(ddev);
+
+   for (i = 0; i < priv->num_pipes; i++) {
+   struct omap_drm_pipeline *pipe = >pipes[i];
+
+   if (pipe->output->panel)
+   drm_panel_detach(pipe->output->panel);
+   }
+
+   drm_mode_config_cleanup(ddev);
+}
+
 /*
  * Enable the HPD in external components if supported
  */
@@ -378,8 +417,15 @@ static void omap_modeset_enable_external_hpd(struct 
drm_device *ddev)
unsigned int i;
 
for (i = 0; i < priv->num_pipes; i++) {
-   if (priv->pipes[i].connector)
-   omap_connector_enable_hpd(priv->pipes[i].connector);
+   struct drm_connector *connector = priv->pipes[i].connector;
+
+   if (!connector)
+   continue;
+
+   if (priv->pipes[i].output->next)
+   omap_connector_enable_hpd(connector);
+   else
+   drm_bridge_connector_enable_hpd(connector);
}
 }
 
@@ -392,8 +438,15 @@ static void omap_modeset_disable_external_hpd(struct 
drm_device *ddev)
unsigned int i;
 
for (i = 0; i < priv->num_pipes; i++) {
-   if (priv->pipes[i].connector)
-   omap_connector_disable_hpd(priv->pipes[i].connector);
+   struct drm_connector *connector = priv->pipes[i].connector;
+
+   if (!connector)
+   continue;
+
+   if (priv->pipes[i].output->next)
+   omap_connector_disable_hpd(connector);
+   else
+   drm_bridge_connector_disable_hpd(connector);
}
 }
 
@@ -616,8 +669,7 @@ static int omapdrm_init(struct 

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