Re: [PATCH v11 00/25] mm/gup: track dma-pinned pages: FOLL_PIN

2019-12-28 Thread John Hubbard
On 12/27/19 1:56 PM, John Hubbard wrote:
...
>> It is ancient verification test (~10y) which is not an easy task to
>> make it understandable and standalone :).
>>
> 
> Is this the only test that fails, btw? No other test failures or hints of
> problems?
> 
> (Also, maybe hopeless, but can *anyone* on the RDMA list provide some
> characterization of the test, such as how many pins per page, what page
> sizes are used? I'm still hoping to write a test to trigger something
> close to this...)
> 
> I do have a couple more ideas for test runs:
> 
> 1. Reduce GUP_PIN_COUNTING_BIAS to 1. That would turn the whole override of
> page->_refcount into a no-op, and so if all is well (it may not be!) with the
> rest of the patch, then we'd expect this problem to not reappear.
> 
> 2. Active /proc/vmstat *foll_pin* statistics unconditionally (just for these
> tests, of course), so we can see if there is a get/put mismatch. However, that
> will change the timing, and so it must be attempted independently of (1), in
> order to see if it ends up hiding the repro.
> 
> I've updated this branch to implement (1), but not (2), hoping you can give
> this one a spin?
> 
>     g...@github.com:johnhubbard/linux.git  
> pin_user_pages_tracking_v11_with_diags
> 
> 

Also, looking ahead:

a) if the problem disappears with the latest above test, then we likely have
   a huge page refcount overflow, and there are a couple of different ways to
   fix it. 

b) if it still reproduces with the above, then it's some other random mistake,
   and in that case I'd be inclined to do a sort of guided (or classic, 
unguided)
   git bisect of the series. Because it could be any of several patches.

   If that's too much trouble, then I'd have to fall back to submitting a few
   patches at a time and working my way up to the tracking patch...


thanks,
-- 
John Hubbard
NVIDIA
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[Bug 205649] Daisy Chain (MST) Session Crash after Screen Lock Resume

2019-12-28 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=205649

--- Comment #2 from Michael Rauch (mich...@rauch.be) ---
Same behavior with Kernel 5.5-rc3 and Mesa 19.2.1.

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[Bug 205649] Daisy Chain (MST) Session Crash after Screen Lock Resume

2019-12-28 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=205649

Michael Rauch (mich...@rauch.be) changed:

   What|Removed |Added

 Kernel Version|5.3, 5.4|5.3, 5.4, 5.5-rc3

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[RFC v2 0/1] drm: lima: devfreq and cooling device support

2019-12-28 Thread Martin Blumenstingl
This is my attempt at adding devfreq (and cooling device) support to
the lima driver.

I am seeking comments in two general areas:
- regarding the integration into the existing lima code
- for the actual devfreq code (I had to adapt the panfrost code
  slightly, because lima uses a bus and a GPU/core clock)

My own TODO list includes "more" testing on various Amlogic SoCs.
So far I have tested this on Meson8b and Meson8m2 (which both have a
GPU OPP table defined). However, I still need to test this on a GXL
board (which is currently missing the GPU OPP table).

Test results from a Meson8m2 board:
TEST #1: glmark2-es2-drm --off-screen in an infinite loop while cycling
 through all available frequencies using the userspace governor

 From  :   To
   : 182142857 31875 42500 51000 63750   time(ms)
  182142857: 0  1274  1274  1273  1279   5399468
  31875:  1274 0  1274  1273  1272   5114700
  42500:  1276  1274 0  1272  1271   5122008
  51000:  1909  1273  1273 0   636   5274292
* 63750:   640  1272  1272  1273 0   5186796
Total transition : 24834

TEST #2: glmark2-es2-drm --off-screen in an infinite loop with the
 simple_ondemand governor
 From  :   To
   : 182142857 31875 42500 51000 63750   time(ms)
  182142857: 0 0 0 0   203318328
  31875:53 0 0 021 56044
  42500:2718 0 0 2 34172
  51000:27 614 0 1 41348
* 63750:95503348 0   2085312


Changes since RFC v1 at [0]:
- added lock to protect the statistics as these can be written 
  concurrently for example when the GP and PP IRQ are firing at the
  same time. Thanks to Qiang Yu for the suggestion!
- updated the copyright notice of lima_devfreq.c to indicate that the
  code is derived from panfrost_devfreq.c. Thanks to  Chen-Yu Tsai  for
  the suggestion!
- I did not unify the code with panfrost yet because I don't know where
  to put the result. any suggestion is welcome though!


[0] https://patchwork.freedesktop.org/series/70967/


Martin Blumenstingl (1):
  drm/lima: Add optional devfreq support

 drivers/gpu/drm/lima/Kconfig|   1 +
 drivers/gpu/drm/lima/Makefile   |   3 +-
 drivers/gpu/drm/lima/lima_devfreq.c | 183 
 drivers/gpu/drm/lima/lima_devfreq.h |  15 +++
 drivers/gpu/drm/lima/lima_device.c  |   4 +
 drivers/gpu/drm/lima/lima_device.h  |  17 +++
 drivers/gpu/drm/lima/lima_drv.c |  14 ++-
 drivers/gpu/drm/lima/lima_sched.c   |   7 ++
 drivers/gpu/drm/lima/lima_sched.h   |   3 +
 9 files changed, 244 insertions(+), 3 deletions(-)
 create mode 100644 drivers/gpu/drm/lima/lima_devfreq.c
 create mode 100644 drivers/gpu/drm/lima/lima_devfreq.h

-- 
2.24.1

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[PATCH] drm/hisilicon: Checked the resolution is valid before connector

2019-12-28 Thread Tian Tao
In the previous version, the callback function mode_valid of
drm_connector_helper_funcs directly returned MODE_OK. Now we will
ensure that the resolution is correct and return MODE_OK, otherwise
return MODE_NOMODE.

Signed-off-by: Tian Tao 
Signed-off-by: Gong junjie 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 41 ++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
index 6d98fdc..3d08210 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
@@ -11,22 +11,59 @@
  * Jianhua Li 
  */
 
+#include 
 #include 
 #include 
+#include 
 #include 
 
 #include "hibmc_drm_drv.h"
 #include "hibmc_drm_regs.h"
 
+static const struct hibmc_resolution {
+   int w;
+   int h;
+} hibmc_modetables[] = {
+   {640, 480}, {800, 600}, {1024, 768}, {1152, 864}, {1280, 768},
+   {1280, 720}, {1280, 960}, {1280, 1024}, {1440, 900}, {1600, 900},
+   {1600, 1200}, {1920, 1080}, {1920, 1200}
+};
+
+static int hibmc_valid_mode(int w, int h)
+{
+   int size = sizeof(hibmc_modetables) / sizeof(struct hibmc_resolution);
+   int i;
+
+   for (i = 0; i < size; i++) {
+   if (hibmc_modetables[i].w == w && hibmc_modetables[i].h == h)
+   return 0;
+   }
+
+   return -1;
+}
+
 static int hibmc_connector_get_modes(struct drm_connector *connector)
 {
-   return drm_add_modes_noedid(connector, 800, 600);
+   int count;
+
+   drm_connector_update_edid_property(connector, NULL);
+   count = drm_add_modes_noedid(connector, 1920, 1200);
+   drm_set_preferred_mode(connector, 1024, 768);
+
+   return count;
 }
 
 static enum drm_mode_status hibmc_connector_mode_valid(struct drm_connector 
*connector,
  struct drm_display_mode *mode)
 {
-   return MODE_OK;
+   int vrefresh = drm_mode_vrefresh(mode);
+
+   if (vrefresh < 59 || vrefresh > 61)
+   return MODE_NOMODE;
+   else if (hibmc_valid_mode(mode->hdisplay, mode->vdisplay) != 0)
+   return MODE_NOMODE;
+   else
+   return MODE_OK;
 }
 
 static const struct drm_connector_helper_funcs
-- 
2.7.4

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[PATCH next] drm/gma500: remove set but not used variables 'hist_reg'

2019-12-28 Thread Chen Zhou
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/gma500/psb_irq.c: In function psb_irq_turn_off_dpst:
drivers/gpu/drm/gma500/psb_irq.c:473:6:
warning: variable hist_reg set but not used [-Wunused-but-set-variable]

Reported-by: Hulk Robot 
Signed-off-by: Chen Zhou 
---
 drivers/gpu/drm/gma500/psb_irq.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c
index 40a37e4..91f9001 100644
--- a/drivers/gpu/drm/gma500/psb_irq.c
+++ b/drivers/gpu/drm/gma500/psb_irq.c
@@ -470,12 +470,11 @@ void psb_irq_turn_off_dpst(struct drm_device *dev)
 {
struct drm_psb_private *dev_priv =
(struct drm_psb_private *) dev->dev_private;
-   u32 hist_reg;
u32 pwm_reg;
 
if (gma_power_begin(dev, false)) {
PSB_WVDC32(0x, HISTOGRAM_INT_CONTROL);
-   hist_reg = PSB_RVDC32(HISTOGRAM_INT_CONTROL);
+   PSB_RVDC32(HISTOGRAM_INT_CONTROL);
 
psb_disable_pipestat(dev_priv, 0, PIPE_DPST_EVENT_ENABLE);
 
-- 
2.7.4

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[RFC v2 1/1] drm/lima: Add optional devfreq support

2019-12-28 Thread Martin Blumenstingl
Most platforms with a Mali-400 or Mali-450 GPU also have support for
changing the GPU clock frequency. Add devfreq support so the GPU clock
rate is updated based on the actual GPU usage when the
"operating-points-v2" property is present in the board.dts.

The actual devfreq code is taken from panfrost_devfreq.c and modified so
it matches what the lima hardware needs:
- a call to dev_pm_opp_set_clkname() during initialization because there
  are two clocks on Mali-4x0 IPs. "core" is the one that actually clocks
  the GPU so we need to control it using devfreq.
- locking when reading or writing the devfreq statistics because (unlike
  than panfrost) we have multiple PP and GP IRQs which may finish jobs
  concurrently.

Signed-off-by: Martin Blumenstingl 
---
 drivers/gpu/drm/lima/Kconfig|   1 +
 drivers/gpu/drm/lima/Makefile   |   3 +-
 drivers/gpu/drm/lima/lima_devfreq.c | 183 
 drivers/gpu/drm/lima/lima_devfreq.h |  15 +++
 drivers/gpu/drm/lima/lima_device.c  |   4 +
 drivers/gpu/drm/lima/lima_device.h  |  17 +++
 drivers/gpu/drm/lima/lima_drv.c |  14 ++-
 drivers/gpu/drm/lima/lima_sched.c   |   7 ++
 drivers/gpu/drm/lima/lima_sched.h   |   3 +
 9 files changed, 244 insertions(+), 3 deletions(-)
 create mode 100644 drivers/gpu/drm/lima/lima_devfreq.c
 create mode 100644 drivers/gpu/drm/lima/lima_devfreq.h

diff --git a/drivers/gpu/drm/lima/Kconfig b/drivers/gpu/drm/lima/Kconfig
index 571dc369a7e9..cdd24b68b5d4 100644
--- a/drivers/gpu/drm/lima/Kconfig
+++ b/drivers/gpu/drm/lima/Kconfig
@@ -10,5 +10,6 @@ config DRM_LIMA
depends on OF
select DRM_SCHED
select DRM_GEM_SHMEM_HELPER
+   select PM_DEVFREQ
help
  DRM driver for ARM Mali 400/450 GPUs.
diff --git a/drivers/gpu/drm/lima/Makefile b/drivers/gpu/drm/lima/Makefile
index a85444b0a1d4..5e5c29875e9c 100644
--- a/drivers/gpu/drm/lima/Makefile
+++ b/drivers/gpu/drm/lima/Makefile
@@ -14,6 +14,7 @@ lima-y := \
lima_sched.o \
lima_ctx.o \
lima_dlbu.o \
-   lima_bcast.o
+   lima_bcast.o \
+   lima_devfreq.o
 
 obj-$(CONFIG_DRM_LIMA) += lima.o
diff --git a/drivers/gpu/drm/lima/lima_devfreq.c 
b/drivers/gpu/drm/lima/lima_devfreq.c
new file mode 100644
index ..a5fd6b8faa77
--- /dev/null
+++ b/drivers/gpu/drm/lima/lima_devfreq.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 Martin Blumenstingl 
+ *
+ * Based on panfrost_devfreq.c:
+ *   Copyright 2019 Collabora ltd.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "lima_device.h"
+#include "lima_devfreq.h"
+
+static void lima_devfreq_update_utilization(struct lima_device *ldev)
+{
+   unsigned long irqflags;
+   ktime_t now, last;
+
+   if (!ldev->devfreq.devfreq)
+   return;
+
+   spin_lock_irqsave(>devfreq.lock, irqflags);
+
+   now = ktime_get();
+   last = ldev->devfreq.time_last_update;
+
+   if (atomic_read(>devfreq.busy_count) > 0)
+   ldev->devfreq.busy_time += ktime_sub(now, last);
+   else
+   ldev->devfreq.idle_time += ktime_sub(now, last);
+
+   ldev->devfreq.time_last_update = now;
+
+   spin_unlock_irqrestore(>devfreq.lock, irqflags);
+}
+
+static int lima_devfreq_target(struct device *dev, unsigned long *freq,
+  u32 flags)
+{
+   struct dev_pm_opp *opp;
+   int err;
+
+   opp = devfreq_recommended_opp(dev, freq, flags);
+   if (IS_ERR(opp))
+   return PTR_ERR(opp);
+   dev_pm_opp_put(opp);
+
+   err = dev_pm_opp_set_rate(dev, *freq);
+   if (err)
+   return err;
+
+   return 0;
+}
+
+static void lima_devfreq_reset(struct lima_device *ldev)
+{
+   unsigned long irqflags;
+
+   spin_lock_irqsave(>devfreq.lock, irqflags);
+
+   ldev->devfreq.busy_time = 0;
+   ldev->devfreq.idle_time = 0;
+   ldev->devfreq.time_last_update = ktime_get();
+
+   spin_unlock_irqrestore(>devfreq.lock, irqflags);
+}
+
+static int lima_devfreq_get_dev_status(struct device *dev,
+  struct devfreq_dev_status *status)
+{
+   struct lima_device *ldev = dev_get_drvdata(dev);
+   unsigned long irqflags;
+
+   lima_devfreq_update_utilization(ldev);
+
+   status->current_frequency = clk_get_rate(ldev->clk_gpu);
+
+   spin_lock_irqsave(>devfreq.lock, irqflags);
+
+   status->total_time = ktime_to_ns(ktime_add(ldev->devfreq.busy_time,
+  ldev->devfreq.idle_time));
+   status->busy_time = ktime_to_ns(ldev->devfreq.busy_time);
+
+   spin_unlock_irqrestore(>devfreq.lock, irqflags);
+
+   lima_devfreq_reset(ldev);
+
+   dev_dbg(ldev->dev, "busy %lu total %lu %lu %% freq %lu MHz\n",
+   status->busy_time, status->total_time,
+   status->busy_time / (status->total_time / 100),
+   status->current_frequency 

[PATCH] drm/hisilicon: Checked the resolution is valid before connector

2019-12-28 Thread Tian Tao
In the previous version, the callback function mode_valid of
drm_connector_helper_funcs directly returned MODE_OK. Now we will
ensure that the resolution is correct and return MODE_OK, otherwise
return MODE_NOMODE.

Signed-off-by: Tian Tao 
Signed-off-by: Gong junjie 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 41 ++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
index 6d98fdc..3d08210 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
@@ -11,22 +11,59 @@
  * Jianhua Li 
  */
 
+#include 
 #include 
 #include 
+#include 
 #include 
 
 #include "hibmc_drm_drv.h"
 #include "hibmc_drm_regs.h"
 
+static const struct hibmc_resolution {
+   int w;
+   int h;
+} hibmc_modetables[] = {
+   {640, 480}, {800, 600}, {1024, 768}, {1152, 864}, {1280, 768},
+   {1280, 720}, {1280, 960}, {1280, 1024}, {1440, 900}, {1600, 900},
+   {1600, 1200}, {1920, 1080}, {1920, 1200}
+};
+
+static int hibmc_valid_mode(int w, int h)
+{
+   int size = sizeof(hibmc_modetables) / sizeof(struct hibmc_resolution);
+   int i;
+
+   for (i = 0; i < size; i++) {
+   if (hibmc_modetables[i].w == w && hibmc_modetables[i].h == h)
+   return 0;
+   }
+
+   return -1;
+}
+
 static int hibmc_connector_get_modes(struct drm_connector *connector)
 {
-   return drm_add_modes_noedid(connector, 800, 600);
+   int count;
+
+   drm_connector_update_edid_property(connector, NULL);
+   count = drm_add_modes_noedid(connector, 1920, 1200);
+   drm_set_preferred_mode(connector, 1024, 768);
+
+   return count;
 }
 
 static enum drm_mode_status hibmc_connector_mode_valid(struct drm_connector 
*connector,
  struct drm_display_mode *mode)
 {
-   return MODE_OK;
+   int vrefresh = drm_mode_vrefresh(mode);
+
+   if (vrefresh < 59 || vrefresh > 61)
+   return MODE_NOMODE;
+   else if (hibmc_valid_mode(mode->hdisplay, mode->vdisplay) != 0)
+   return MODE_NOMODE;
+   else
+   return MODE_OK;
 }
 
 static const struct drm_connector_helper_funcs
-- 
2.7.4

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[PATCH] drm/hisilicon: Added three new resolutions and changed the alignment to 128 Bytes

2019-12-28 Thread Tian Tao
Add the three new resolution 1440x900 and 1600x900, 640x480 for hibmc
and Set the FB Offset of the display hardware to 128 Byte alignment

Signed-off-by: Tian Tao 
Signed-off-by: Gong junjie 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c   | 11 +--
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h |  2 ++
 2 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
index f1ce6cb..69389b0 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
@@ -40,6 +40,7 @@ struct hibmc_dislay_pll_config {
 };
 
 static const struct hibmc_dislay_pll_config hibmc_pll_table[] = {
+   {640, 480, CRT_PLL1_HS_25MHZ, CRT_PLL2_HS_25MHZ},
{800, 600, CRT_PLL1_HS_40MHZ, CRT_PLL2_HS_40MHZ},
{1024, 768, CRT_PLL1_HS_65MHZ, CRT_PLL2_HS_65MHZ},
{1152, 864, CRT_PLL1_HS_80MHZ_1152, CRT_PLL2_HS_80MHZ},
@@ -47,6 +48,8 @@ static const struct hibmc_dislay_pll_config hibmc_pll_table[] 
= {
{1280, 720, CRT_PLL1_HS_74MHZ, CRT_PLL2_HS_74MHZ},
{1280, 960, CRT_PLL1_HS_108MHZ, CRT_PLL2_HS_108MHZ},
{1280, 1024, CRT_PLL1_HS_108MHZ, CRT_PLL2_HS_108MHZ},
+   {1440, 900, CRT_PLL1_HS_106MHZ, CRT_PLL2_HS_106MHZ},
+   {1600, 900, CRT_PLL1_HS_108MHZ, CRT_PLL2_HS_108MHZ},
{1600, 1200, CRT_PLL1_HS_162MHZ, CRT_PLL2_HS_162MHZ},
{1920, 1080, CRT_PLL1_HS_148MHZ, CRT_PLL2_HS_148MHZ},
{1920, 1200, CRT_PLL1_HS_193MHZ, CRT_PLL2_HS_193MHZ},
@@ -102,14 +105,12 @@ static void hibmc_plane_atomic_update(struct drm_plane 
*plane,
s64 gpu_addr = 0;
unsigned int line_l;
struct hibmc_drm_private *priv = plane->dev->dev_private;
-   struct hibmc_framebuffer *hibmc_fb;
struct drm_gem_vram_object *gbo;
 
if (!state->fb)
return;
 
-   hibmc_fb = to_hibmc_framebuffer(state->fb);
-   gbo = drm_gem_vram_of_gem(hibmc_fb->obj);
+   gbo = drm_gem_vram_of_gem(state->fb->obj[0]);
 
gpu_addr = drm_gem_vram_offset(gbo);
if (WARN_ON_ONCE(gpu_addr < 0))
@@ -118,11 +119,9 @@ static void hibmc_plane_atomic_update(struct drm_plane 
*plane,
writel(gpu_addr, priv->mmio + HIBMC_CRT_FB_ADDRESS);
 
reg = state->fb->width * (state->fb->format->cpp[0]);
-   /* now line_pad is 16 */
-   reg = PADDING(16, reg);
 
line_l = state->fb->width * state->fb->format->cpp[0];
-   line_l = PADDING(16, line_l);
+   line_l = PADDING(128, line_l);
writel(HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_WIDTH, reg) |
   HIBMC_FIELD(HIBMC_CRT_FB_WIDTH_OFFS, line_l),
   priv->mmio + HIBMC_CRT_FB_WIDTH);
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
index 9b7e859..17b30c3 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h
@@ -179,6 +179,7 @@
 #define CRT_PLL1_HS_74MHZ  0x23941dc2
 #define CRT_PLL1_HS_80MHZ  0x23941001
 #define CRT_PLL1_HS_80MHZ_1152 0x23540fc2
+#define CRT_PLL1_HS_106MHZ 0x237C1641
 #define CRT_PLL1_HS_108MHZ 0x23b41b01
 #define CRT_PLL1_HS_162MHZ 0x23480681
 #define CRT_PLL1_HS_148MHZ 0x23541dc2
@@ -191,6 +192,7 @@
 #define CRT_PLL2_HS_78MHZ  0x50E147AE
 #define CRT_PLL2_HS_74MHZ  0x602B6AE7
 #define CRT_PLL2_HS_80MHZ  0x7000
+#define CRT_PLL2_HS_106MHZ 0x0075c28f
 #define CRT_PLL2_HS_108MHZ 0x8000
 #define CRT_PLL2_HS_162MHZ 0xA000
 #define CRT_PLL2_HS_148MHZ 0xB0CD
-- 
2.7.4

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