Re: [PATCH 00/30] DMA: Mundane typo fixes
On 07:29 Mon 29 Mar 2021, Christoph Hellwig wrote: I really don't think these typo patchbomb are that useful. I'm all for fixing typos when working with a subsystem, but I'm not sure these patchbombs help anything. I am sure you are holding the wrong end of the wand and grossly failing to understand. Anyway, I hope I give a heads up ...find "your way" to fix those damn thing...it's glaring On Mon, Mar 29, 2021 at 05:22:56AM +0530, Bhaskar Chowdhury wrote: This patch series fixes some trivial and rudimentary spellings in the COMMENT sections. Bhaskar Chowdhury (30): acpi-dma.c: Fix couple of typos altera-msgdma.c: Couple of typos fixed amba-pl08x.c: Fixed couple of typos bcm-sba-raid.c: Few typos fixed bcm2835-dma.c: Fix a typo idma64.c: Fix couple of typos iop-adma.c: Few typos fixed mv_xor.c: Fix a typo mv_xor.h: Fixed a typo mv_xor_v2.c: Fix a typo nbpfaxi.c: Fixed a typo of-dma.c: Fixed a typo s3c24xx-dma.c: Fix a typo Revert "s3c24xx-dma.c: Fix a typo" s3c24xx-dma.c: Few typos fixed st_fdma.h: Fix couple of typos ste_dma40_ll.h: Fix a typo tegra20-apb-dma.c: Fixed a typo xgene-dma.c: Few spello fixes at_hdmac.c: Quite a few spello fixes owl-dma.c: Fix a typo at_hdmac_regs.h: Couple of typo fixes dma-jz4780.c: Fix a typo Kconfig: Change Synopsys to Synopsis ste_dma40.c: Few spello fixes dw-axi-dmac-platform.c: Few typos fixed dpaa2-qdma.c: Fix a typo usb-dmac.c: Fix a typo edma.c: Fix a typo xilinx_dma.c: Fix a typo drivers/dma/Kconfig| 8 drivers/dma/acpi-dma.c | 4 ++-- drivers/dma/altera-msgdma.c| 4 ++-- drivers/dma/amba-pl08x.c | 4 ++-- drivers/dma/at_hdmac.c | 14 +++--- drivers/dma/at_hdmac_regs.h| 4 ++-- drivers/dma/bcm-sba-raid.c | 8 drivers/dma/bcm2835-dma.c | 2 +- drivers/dma/dma-jz4780.c | 2 +- drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8 drivers/dma/idma64.c | 4 ++-- drivers/dma/iop-adma.c | 6 +++--- drivers/dma/mv_xor.c | 2 +- drivers/dma/mv_xor.h | 2 +- drivers/dma/mv_xor_v2.c| 2 +- drivers/dma/nbpfaxi.c | 2 +- drivers/dma/of-dma.c | 2 +- drivers/dma/owl-dma.c | 2 +- drivers/dma/s3c24xx-dma.c | 6 +++--- drivers/dma/sh/shdmac.c| 2 +- drivers/dma/sh/usb-dmac.c | 2 +- drivers/dma/st_fdma.h | 4 ++-- drivers/dma/ste_dma40.c| 10 +- drivers/dma/ste_dma40_ll.h | 2 +- drivers/dma/tegra20-apb-dma.c | 2 +- drivers/dma/ti/edma.c | 2 +- drivers/dma/xgene-dma.c| 6 +++--- drivers/dma/xilinx/xilinx_dma.c| 2 +- 28 files changed, 59 insertions(+), 59 deletions(-) -- 2.26.3 ---end quoted text--- signature.asc Description: PGP signature ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v6 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs
Hi Liu On Tue, 2021-03-23 at 17:09 +0800, Liu Ying wrote: > On Tue, 2021-03-23 at 01:03 +, Marcel Ziswiler wrote: > > Hi Liu > > > > Some further discrepancy with them binding examples: > > > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format): > > /dpu@5618:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning (reg_format): > > /syscon@56221000:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:601.9-34: Warning (reg_format): > > /phy@56228300:reg: property has > > invalid length (8 bytes) (#address-cells == 2, #size-cells == 2) > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:613.9-36: Warning (reg_format): > > /pixel-combiner@5602:reg: > > property has invalid length (8 bytes) (#address-cells == 2, #size-cells == > > 2) > > > > And with that I am unable to bring it up: > > > > [ 1.714498] imx8qxp-ldb 562210001000.syscon:ldb: > > [drm:ldb_init_helper] *ERROR* failed to get regmap: - > > 12 > > [ 1.724441] imx8qxp-ldb: probe of 562210001000.syscon:ldb failed > > with error -12 > > [ 1.734983] imx8qxp-pixel-combiner 56020001.pixel-combiner: > > invalid resource > > [ 1.742830] imx8qxp-pixel-combiner: probe of > > 56020001.pixel-combiner failed with error -22 > > [ 1.754040] imx8qxp-display-pixel-link dc0-pixel-link0: > > [drm:imx8qxp_pixel_link_bridge_probe] *ERROR* > > failed > > to get pixel link node alias id: -19 > > [ 1.769626] imx8qxp-pxl2dpi 562210001000.syscon:pxl2dpi: > > [drm:imx8qxp_pxl2dpi_bridge_probe] *ERROR* > > failed to get regmap: -12 > > [ 1.781397] imx8qxp-pxl2dpi: probe of 562210001000.syscon:pxl2dpi > > failed with error -12 > > [ 1.840547] imx8qxp-lpcg-clk 5958.clock-controller: deferred probe > > timeout, ignoring dependency > > [ 1.840571] imx8qxp-lpcg-clk: probe of 5958.clock-controller failed > > with error -110 > > > > Any suggestions welcome. Thanks! > > Please reference the patch set I shared in my last reply and see how it > goes. Thanks. Thank you very much. After a little bit of fiddling I can confirm that this also works fine on a Toradex Colibri iMX8X [1] with either a Capacitive Touch Display 10.1" LVDS which has a Logic Technologies LT170410- 2WHC [2] single-channel panel inside or a dual-channel LG LP156WF1 full HD panel. During boot I noticed quite some clocking/power domain related messages: [0.537965] gpt0_clk: failed to attached the power domain -2 [0.562372] dc1_disp0_clk: failed to attached the power domain -2 [0.562800] dc1_disp0_clk: failed to get clock parent -22 [0.562858] dc1_disp0_clk: failed to get clock rate -22 [0.563059] dc1_disp1_clk: failed to attached the power domain -2 [0.563463] dc1_disp1_clk: failed to get clock parent -22 [0.563514] dc1_disp1_clk: failed to get clock rate -22 [0.563773] dc1_pll0_clk: failed to attached the power domain -2 [0.564174] dc1_pll0_clk: failed to get clock rate -22 [0.564413] dc1_pll1_clk: failed to attached the power domain -2 [0.564838] dc1_pll1_clk: failed to get clock rate -22 [0.565099] dc1_bypass0_clk: failed to attached the power domain -2 [0.565516] dc1_bypass0_clk: failed to get clock rate -22 [0.565755] dc1_bypass1_clk: failed to attached the power domain -2 [0.566159] dc1_bypass1_clk: failed to get clock rate -22 [0.574493] lvds0_i2c0_clk: failed to attached the power domain -2 [0.574894] lvds0_i2c0_clk: failed to get clock rate -22 [0.575134] lvds0_i2c1_clk: failed to attached the power domain -2 [0.575526] lvds0_i2c1_clk: failed to get clock rate -22 [0.575785] lvds0_pwm0_clk: failed to attached the power domain -2 [0.576189] lvds0_pwm0_clk: failed to get clock rate -22 [0.576417] lvds1_i2c0_clk: failed to attached the power domain -2 [0.576854] lvds1_i2c0_clk: failed to get clock rate -22 [0.577129] lvds1_i2c1_clk: failed to attached the power domain -2 [0.577554] lvds1_i2c1_clk: failed to get clock rate -22 [0.577787] lvds1_pwm0_clk: failed to attached the power domain -2 [0.578198] lvds1_pwm0_clk: failed to get clock rate -22 [0.578464] mipi_csi0_core_clk: failed to attached the power domain -2 [0.579104] mipi_csi0_esc_clk: failed to attached the power domain -2 [0.579738] mipi_csi0_i2c0_clk: failed to attached the power domain -2 [0.580368] mipi_csi0_pwm0_clk: failed to attached the power domain -2 And the following repeats a couple dozens of times: [4.391495] dc1_disp0_clk: failed to get clock parent -22 [4.398532] dc1_disp1_clk: failed to get clock parent -22 And finally it spits the following: [4.670303] imx8qxp-lpcg-clk 5958.clock-controller: deferred probe timeout, ignoring dependency [4.679629] imx8qxp-lpcg-clk: probe of
linux-next: manual merge of the drm tree with Linus' tree
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
between commits:
9adb125dde69 ("drm/amdgpu: re-enable suspend phase 2 for S0ix")
4021229e32bd ("drm/amdgpu/swsmu: skip gfx cgpg on s0ix suspend")
9bb735abcbd8 ("drm/amdgpu: update comments about s0ix suspend/resume")
from Linus' tree and commit:
e3c1b0712fdb ("drm/amdgpu: Reset the devices in the XGMI hive duirng probe")
from the drm tree.
I fixed it up (I think - see below) and can carry the fix as necessary.
This is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8a5a8ff5d362,0f82c5d21237..
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@@ -2743,16 -2712,15 +2720,25 @@@ static int amdgpu_device_ip_suspend_pha
continue;
}
+ /* skip suspend of gfx and psp for S0ix
+ * gfx is in gfxoff state, so on resume it will exit gfxoff just
+ * like at runtime. PSP is also part of the always on hardware
+ * so no need to suspend it.
+ */
+ if (adev->in_s0ix &&
+ (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP
||
+ adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX))
+ continue;
+
+ /* skip unnecessary suspend if we do not initialize them yet */
+ if (adev->gmc.xgmi.pending_reset &&
+ !(adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC
||
+ adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC
||
+ adev->ip_blocks[i].version->type ==
AMD_IP_BLOCK_TYPE_COMMON ||
+ adev->ip_blocks[i].version->type ==
AMD_IP_BLOCK_TYPE_IH)) {
+ adev->ip_blocks[i].status.hw = false;
+ continue;
+ }
/* XXX handle errors */
r = adev->ip_blocks[i].version->funcs->suspend(adev);
/* XXX handle errors */
pgpSHybOFSBOI.pgp
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[PATCH 30/30] xilinx_dma.c: Fix a typo
s/interace/interface/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/xilinx/xilinx_dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 3aded7861fef..63d2f447ad79 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -483,7 +483,7 @@ struct xilinx_dma_config {
* @ext_addr: Indicates 64 bit addressing is supported by dma device
* @pdev: Platform device structure pointer
* @dma_config: DMA config structure
- * @axi_clk: DMA Axi4-lite interace clock
+ * @axi_clk: DMA Axi4-lite interface clock
* @tx_clk: DMA mm2s clock
* @txs_clk: DMA mm2s stream clock
* @rx_clk: DMA s2mm clock
--
2.26.3
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[PATCH 29/30] edma.c: Fix a typo
s/transfering/transferring/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/ti/edma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/ti/edma.c b/drivers/dma/ti/edma.c index 35d81bd857f1..5ad771e34457 100644 --- a/drivers/dma/ti/edma.c +++ b/drivers/dma/ti/edma.c @@ -1815,7 +1815,7 @@ static void edma_issue_pending(struct dma_chan *chan) * This limit exists to avoid a possible infinite loop when waiting for proof * that a particular transfer is completed. This limit can be hit if there * are large bursts to/from slow devices or the CPU is never able to catch - * the DMA hardware idle. On an AM335x transfering 48 bytes from the UART + * the DMA hardware idle. On an AM335x transferring 48 bytes from the UART * RX-FIFO, as many as 55 loops have been seen. */ #define EDMA_MAX_TR_WAIT_LOOPS 1000 -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 28/30] usb-dmac.c: Fix a typo
s/descritpor/descriptor/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/sh/usb-dmac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/sh/usb-dmac.c b/drivers/dma/sh/usb-dmac.c
index 8f7ceb698226..7092a657932b 100644
--- a/drivers/dma/sh/usb-dmac.c
+++ b/drivers/dma/sh/usb-dmac.c
@@ -301,7 +301,7 @@ static struct usb_dmac_desc *usb_dmac_desc_get(struct
usb_dmac_chan *chan,
struct usb_dmac_desc *desc = NULL;
unsigned long flags;
- /* Get a freed descritpor */
+ /* Get a freed descriptor */
spin_lock_irqsave(>vc.lock, flags);
list_for_each_entry(desc, >desc_freed, node) {
if (sg_len <= desc->sg_allocated_len) {
--
2.26.3
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[PATCH 27/30] dpaa2-qdma.c: Fix a typo
s/contoller/controller/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/sh/shdmac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c index 5aafe548ca5f..7b51b15b45b1 100644 --- a/drivers/dma/sh/shdmac.c +++ b/drivers/dma/sh/shdmac.c @@ -319,7 +319,7 @@ static void sh_dmae_setup_xfer(struct shdma_chan *schan, } /* - * Find a slave channel configuration from the contoller list by either a slave + * Find a slave channel configuration from the controller list by either a slave * ID in the non-DT case, or by a MID/RID value in the DT case */ static const struct sh_dmae_slave_config *dmae_find_slave( -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 24/30] Kconfig: Change Synopsys to Synopsis
s/Synopsys/Synopsis/ .two different places. ..and for some unknown reason it introduce a empty line deleted and added back. Signed-off-by: Bhaskar Chowdhury --- drivers/dma/Kconfig | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 0c2827fd8c19..30e8cc26f43b 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -170,15 +170,15 @@ config DMA_SUN6I Support for the DMA engine first found in Allwinner A31 SoCs. config DW_AXI_DMAC - tristate "Synopsys DesignWare AXI DMA support" + tristate "Synopsis DesignWare AXI DMA support" depends on OF || COMPILE_TEST depends on HAS_IOMEM select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help - Enable support for Synopsys DesignWare AXI DMA controller. + Enable support for Synopsis DesignWare AXI DMA controller. NOTE: This driver wasn't tested on 64 bit platform because - of lack 64 bit platform with Synopsys DW AXI DMAC. + of lack 64 bit platform with Synopsis DW AXI DMAC. config EP93XX_DMA bool "Cirrus Logic EP93xx DMA support" @@ -394,7 +394,7 @@ config MOXART_DMA select DMA_VIRTUAL_CHANNELS help Enable support for the MOXA ART SoC DMA controller. - + Say Y here if you enabled MMP ADMA, otherwise say N. config MPC512X_DMA -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 26/30] dw-axi-dmac-platform.c: Few typos fixed
s/configurarion/configuration/
s/inerrupts/interrupts/
s/chanels/channels/ two different places.
s/Synopsys/Synopsis/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index d9e4ac3edb4e..ef4da10361a7 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
@@ -35,7 +35,7 @@
/*
* The set of bus widths supported by the DMA controller. DW AXI DMAC supports
* master data bus width up to 512 bits (for both AXI master interfaces), but
- * it depends on IP block configurarion.
+ * it depends on IP block configuration.
*/
#define AXI_DMA_BUSWIDTHS\
(DMA_SLAVE_BUSWIDTH_1_BYTE | \
@@ -1056,10 +1056,10 @@ static irqreturn_t dw_axi_dma_interrupt(int irq, void
*dev_id)
u32 status, i;
- /* Disable DMAC inerrupts. We'll enable them after processing chanels */
+ /* Disable DMAC interrupts. We'll enable them after processing channels
*/
axi_dma_irq_disable(chip);
- /* Poll, clear and process every chanel interrupt status */
+ /* Poll, clear and process every channel interrupt status */
for (i = 0; i < dw->hdata->nr_channels; i++) {
chan = >chan[i];
status = axi_chan_irq_read(chan);
@@ -1511,5 +1511,5 @@ static struct platform_driver dw_driver = {
module_platform_driver(dw_driver);
MODULE_LICENSE("GPL v2");
-MODULE_DESCRIPTION("Synopsys DesignWare AXI DMA Controller platform driver");
+MODULE_DESCRIPTION("Synopsis DesignWare AXI DMA Controller platform driver");
MODULE_AUTHOR("Eugeniy Paltsev ");
--
2.26.3
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[PATCH 25/30] ste_dma40.c: Few spello fixes
s/ealier/earlier/
s/orignal/original/
s/manouver/maneuver/
s/transfer/transfer/
s/succees/success/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/ste_dma40.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 265d7c07b348..39fa2fb74057 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -155,7 +155,7 @@ static __maybe_unused u32 d40_backup_regs[] = {
/*
* since 9540 and 8540 has the same HW revision
- * use v4a for 9540 or ealier
+ * use v4a for 9540 or earlier
* use v4b for 8540 or later
* HW revision:
* DB8500ed has revision 0
@@ -382,7 +382,7 @@ struct d40_desc {
*
* @base: The virtual address of LCLA. 18 bit aligned.
* @dma_addr: DMA address, if mapped
- * @base_unaligned: The orignal kmalloc pointer, if kmalloc is used.
+ * @base_unaligned: The original kmalloc pointer, if kmalloc is used.
* This pointer is only there for clean-up on error.
* @pages: The number of pages needed for all physical channels.
* Only used later for clean-up on error
@@ -1630,7 +1630,7 @@ static void dma_tasklet(struct tasklet_struct *t)
return;
check_pending_tx:
- /* Rescue manouver if receiving double interrupts */
+ /* Rescue maneuver if receiving double interrupts */
if (d40c->pending_tx > 0)
d40c->pending_tx--;
spin_unlock_irqrestore(>lock, flags);
@@ -1970,7 +1970,7 @@ static int d40_config_memcpy(struct d40_chan *d40c)
dma_has_cap(DMA_SLAVE, cap)) {
d40c->dma_cfg = dma40_memcpy_conf_phy;
- /* Generate interrrupt at end of transfer or relink. */
+ /* Generate interrupt at end of transfer or relink. */
d40c->dst_def_cfg |= BIT(D40_SREG_CFG_TIM_POS);
/* Generate interrupt on error. */
@@ -3415,7 +3415,7 @@ static int __init d40_lcla_allocate(struct d40_base *base)
base->lcla_pool.base = (void *)page_list[i];
} else {
/*
-* After many attempts and no succees with finding the correct
+* After many attempts and no success with finding the correct
* alignment, try with allocating a big buffer.
*/
dev_warn(base->dev,
--
2.26.3
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[PATCH 23/30] dma-jz4780.c: Fix a typo
s/proceeed/proceed/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/dma-jz4780.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index ebee94dbd630..451bc754b609 100644
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -379,7 +379,7 @@ static struct dma_async_tx_descriptor
*jz4780_dma_prep_slave_sg(
if (i != (sg_len - 1) &&
!(jzdma->soc_data->flags & JZ_SOC_DATA_BREAK_LINKS)) {
- /* Automatically proceeed to the next descriptor. */
+ /* Automatically proceed to the next descriptor. */
desc->desc[i].dcm |= JZ_DMA_DCM_LINK;
/*
--
2.26.3
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[PATCH 20/30] at_hdmac.c: Quite a few spello fixes
s/tranfers/transfers/ s/maxium/maximum/ s/previouly/previously/ s/broked/broken/ s/embedds/embeds/ three different places. Signed-off-by: Bhaskar Chowdhury --- drivers/dma/at_hdmac.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index 30ae36124b1d..02c09532a9e4 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -374,11 +374,11 @@ static int atc_get_bytes_left(struct dma_chan *chan, dma_cookie_t cookie) * a second time. If the two consecutive read values of the DSCR * are the same then we assume both refers to the very same * child descriptor as well as the CTRLA value read inbetween -* does. For cyclic tranfers, the assumption is that a full loop +* does. For cyclic transfers, the assumption is that a full loop * is "not so fast". * If the two DSCR values are different, we read again the CTRLA * then the DSCR till two consecutive read values from DSCR are -* equal or till the maxium trials is reach. +* equal or till the maximum trials is reach. * This algorithm is very unlikely not to find a stable value for * DSCR. */ @@ -403,7 +403,7 @@ static int atc_get_bytes_left(struct dma_chan *chan, dma_cookie_t cookie) /* * DSCR has changed inside the DMA controller, so the -* previouly read value of CTRLA may refer to an already +* previously read value of CTRLA may refer to an already * processed descriptor hence could be outdated. * We need to update ctrla to match the current * descriptor. @@ -564,7 +564,7 @@ static void atc_handle_error(struct at_dma_chan *atchan) spin_lock_irqsave(>lock, flags); /* * The descriptor currently at the head of the active list is -* broked. Since we don't have any way to report errors, we'll +* broken. Since we don't have any way to report errors, we'll * just have to scream loudly and try to carry on. */ bad_desc = atc_first_active(atchan); @@ -870,7 +870,7 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, atc_desc_chain(, , desc); } - /* First descriptor of the chain embedds additional information */ + /* First descriptor of the chain embeds additional information */ first->txd.cookie = -EBUSY; first->total_len = len; @@ -1199,7 +1199,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, /* set end-of-link to the last link descriptor of list*/ set_desc_eol(prev); - /* First descriptor of the chain embedds additional information */ + /* First descriptor of the chain embeds additional information */ first->txd.cookie = -EBUSY; first->total_len = total_len; @@ -1358,7 +1358,7 @@ atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, /* lets make a cyclic list */ prev->lli.dscr = first->txd.phys; - /* First descriptor of the chain embedds additional information */ + /* First descriptor of the chain embeds additional information */ first->txd.cookie = -EBUSY; first->total_len = buf_len; -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 17/30] ste_dma40_ll.h: Fix a typo
s/directy/directly/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/ste_dma40_ll.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/ste_dma40_ll.h b/drivers/dma/ste_dma40_ll.h
index c504e855eb02..2e30e9a94a1e 100644
--- a/drivers/dma/ste_dma40_ll.h
+++ b/drivers/dma/ste_dma40_ll.h
@@ -369,7 +369,7 @@ struct d40_phy_lli_bidir {
* @lcsp02: Either maps to register lcsp0 if src or lcsp2 if dst.
* @lcsp13: Either maps to register lcsp1 if src or lcsp3 if dst.
*
- * This struct must be 8 bytes aligned since it will be accessed directy by
+ * This struct must be 8 bytes aligned since it will be accessed directly by
* the DMA. Never add any none hw mapped registers to this struct.
*/
--
2.26.3
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[PATCH 22/30] at_hdmac_regs.h: Couple of typo fixes
s/availlable/available/
s/signle/single/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/at_hdmac_regs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
index 4d1ebc040031..46ecc40edaa8 100644
--- a/drivers/dma/at_hdmac_regs.h
+++ b/drivers/dma/at_hdmac_regs.h
@@ -338,7 +338,7 @@ static inline u8 convert_buswidth(enum dma_slave_buswidth
addr_width)
* @ch_regs: memory mapped register base
* @clk: dma controller clock
* @save_imr: interrupt mask register that is saved on suspend/resume cycle
- * @all_chan_mask: all channels availlable in a mask
+ * @all_chan_mask: all channels available in a mask
* @dma_desc_pool: base of DMA descriptor region (DMA address)
* @chan: channels table to store at_dma_chan structures
*/
@@ -462,7 +462,7 @@ static inline int atc_chan_is_cyclic(struct at_dma_chan
*atchan)
/**
* set_desc_eol - set end-of-link to descriptor so it will end transfer
- * @desc: descriptor, signle or at the end of a chain, to end chain on
+ * @desc: descriptor, single or at the end of a chain, to end chain on
*/
static void set_desc_eol(struct at_desc *desc)
{
--
2.26.3
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[PATCH 21/30] owl-dma.c: Fix a typo
s/Eventhough/"Even though"/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/owl-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c index 1f0bbaed4643..3c7283afa443 100644 --- a/drivers/dma/owl-dma.c +++ b/drivers/dma/owl-dma.c @@ -1155,7 +1155,7 @@ static int owl_dma_probe(struct platform_device *pdev) } /* -* Eventhough the DMA controller is capable of generating 4 +* Even though the DMA controller is capable of generating 4 * IRQ's for DMA priority feature, we only use 1 IRQ for * simplification. */ -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 19/30] xgene-dma.c: Few spello fixes
s/definations/definitions/ two different places. s/Configue/Configure/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/xgene-dma.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c index 3589b4ef50b8..9b0010b6e033 100644 --- a/drivers/dma/xgene-dma.c +++ b/drivers/dma/xgene-dma.c @@ -23,7 +23,7 @@ #include "dmaengine.h" -/* X-Gene DMA ring csr registers and bit definations */ +/* X-Gene DMA ring csr registers and bit definitions */ #define XGENE_DMA_RING_CONFIG 0x04 #define XGENE_DMA_RING_ENABLE BIT(31) #define XGENE_DMA_RING_ID 0x08 @@ -102,7 +102,7 @@ #define XGENE_DMA_BLK_MEM_RDY_VAL 0x #define XGENE_DMA_RING_CMD_SM_OFFSET 0x8000 -/* X-Gene SoC EFUSE csr register and bit defination */ +/* X-Gene SoC EFUSE csr register and bit definition */ #define XGENE_SOC_JTAG1_SHADOW 0x18 #define XGENE_DMA_PQ_DISABLE_MASK BIT(13) @@ -1741,7 +1741,7 @@ static int xgene_dma_probe(struct platform_device *pdev) /* Initialize DMA channels software state */ xgene_dma_init_channels(pdma); - /* Configue DMA rings */ + /* Configure DMA rings */ ret = xgene_dma_init_rings(pdma); if (ret) goto err_clk_enable; -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 18/30] tegra20-apb-dma.c: Fixed a typo
s/programing/programming/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/tegra20-apb-dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 71827d9b0aa1..e64789432587 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -475,7 +475,7 @@ static void tegra_dma_configure_for_next(struct
tegra_dma_channel *tdc,
/*
* If interrupt is pending then do nothing as the ISR will handle
-* the programing for new request.
+* the programming for new request.
*/
if (status & TEGRA_APBDMA_STATUS_ISE_EOC) {
dev_err(tdc2dev(tdc),
--
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[PATCH 16/30] st_fdma.h: Fix couple of typos
s/transfert/transfer/ ...two different places.
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/st_fdma.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/st_fdma.h b/drivers/dma/st_fdma.h
index fa15b97a3bab..702b21021124 100644
--- a/drivers/dma/st_fdma.h
+++ b/drivers/dma/st_fdma.h
@@ -41,8 +41,8 @@ struct st_fdma_generic_node {
* @saddr: Source address
* @daddr: Destination address
*
- * @generic: generic node for free running/paced transfert type
- * 2 others transfert type are possible, but not yet implemented
+ * @generic: generic node for free running/paced transfer type
+ * 2 others transfer type are possible, but not yet implemented
*
* The NODE structures must be aligned to a 32 byte boundary
*/
--
2.26.3
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[PATCH 15/30] s3c24xx-dma.c: Few typos fixed
s/transfered/transferred/
s/desintation/destination/ ...two different places.
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/s3c24xx-dma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
index 8e14c72d03f0..045f2f531876 100644
--- a/drivers/dma/s3c24xx-dma.c
+++ b/drivers/dma/s3c24xx-dma.c
@@ -156,7 +156,7 @@ struct s3c24xx_sg {
* struct s3c24xx_txd - wrapper for struct dma_async_tx_descriptor
* @vd: virtual DMA descriptor
* @dsg_list: list of children sg's
- * @at: sg currently being transfered
+ * @at: sg currently being transferred
* @width: transfer width
* @disrcc: value for source control register
* @didstc: value for destination control register
@@ -920,7 +920,7 @@ static struct dma_async_tx_descriptor
*s3c24xx_dma_prep_dma_cyclic(
}
/*
-* Always assume our peripheral desintation is a fixed
+* Always assume our peripheral destination is a fixed
* address in memory.
*/
hwcfg |= S3C24XX_DISRCC_INC_FIXED;
@@ -1009,7 +1009,7 @@ static struct dma_async_tx_descriptor
*s3c24xx_dma_prep_slave_sg(
}
/*
-* Always assume our peripheral desintation is a fixed
+* Always assume our peripheral destination is a fixed
* address in memory.
*/
hwcfg |= S3C24XX_DISRCC_INC_FIXED;
--
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[PATCH 14/30] Revert "s3c24xx-dma.c: Fix a typo"
s/transferred/transfered/
This reverts commit a2ddb8aea8106bd5552f8516ad7a8a26b9282a8f.
---
drivers/dma/s3c24xx-dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
index c98ae73cdcc3..8e14c72d03f0 100644
--- a/drivers/dma/s3c24xx-dma.c
+++ b/drivers/dma/s3c24xx-dma.c
@@ -156,7 +156,7 @@ struct s3c24xx_sg {
* struct s3c24xx_txd - wrapper for struct dma_async_tx_descriptor
* @vd: virtual DMA descriptor
* @dsg_list: list of children sg's
- * @at: sg currently being transferred
+ * @at: sg currently being transfered
* @width: transfer width
* @disrcc: value for source control register
* @didstc: value for destination control register
--
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[PATCH 13/30] s3c24xx-dma.c: Fix a typo
s/transfered/transferred/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/s3c24xx-dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c
index 8e14c72d03f0..c98ae73cdcc3 100644
--- a/drivers/dma/s3c24xx-dma.c
+++ b/drivers/dma/s3c24xx-dma.c
@@ -156,7 +156,7 @@ struct s3c24xx_sg {
* struct s3c24xx_txd - wrapper for struct dma_async_tx_descriptor
* @vd: virtual DMA descriptor
* @dsg_list: list of children sg's
- * @at: sg currently being transfered
+ * @at: sg currently being transferred
* @width: transfer width
* @disrcc: value for source control register
* @didstc: value for destination control register
--
2.26.3
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[PATCH 12/30] of-dma.c: Fixed a typo
s/propety/properly/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/of-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/of-dma.c b/drivers/dma/of-dma.c index ec00b20ae8e4..e028acff7fe8 100644 --- a/drivers/dma/of-dma.c +++ b/drivers/dma/of-dma.c @@ -337,7 +337,7 @@ EXPORT_SYMBOL_GPL(of_dma_simple_xlate); * * This function can be used as the of xlate callback for DMA driver which wants * to match the channel based on the channel id. When using this xlate function - * the #dma-cells propety of the DMA controller dt node needs to be set to 1. + * the #dma-cells properly of the DMA controller dt node needs to be set to 1. * The data parameter of of_dma_controller_register must be a pointer to the * dma_device struct the function should match upon. * -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 11/30] nbpfaxi.c: Fixed a typo
s/superflous/superfluous/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/nbpfaxi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/nbpfaxi.c b/drivers/dma/nbpfaxi.c index 9c52c57919c6..9eacaa20ddb3 100644 --- a/drivers/dma/nbpfaxi.c +++ b/drivers/dma/nbpfaxi.c @@ -898,7 +898,7 @@ static int nbpf_config(struct dma_chan *dchan, /* * We could check config->slave_id to match chan->terminal here, * but with DT they would be coming from the same source, so -* such a check would be superflous +* such a check would be superfluous */ chan->slave_dst_addr = config->dst_addr; -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 10/30] mv_xor_v2.c: Fix a typo
s/assosiated/associated/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/mv_xor_v2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/mv_xor_v2.c b/drivers/dma/mv_xor_v2.c
index 9b0d463f89bb..8a45861299a0 100644
--- a/drivers/dma/mv_xor_v2.c
+++ b/drivers/dma/mv_xor_v2.c
@@ -175,7 +175,7 @@ struct mv_xor_v2_device {
* struct mv_xor_v2_sw_desc - implements a xor SW descriptor
* @idx: descriptor index
* @async_tx: support for the async_tx api
- * @hw_desc: assosiated HW descriptor
+ * @hw_desc: associated HW descriptor
* @free_list: node of the free SW descriprots list
*/
struct mv_xor_v2_sw_desc {
--
2.26.3
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[PATCH 09/30] mv_xor.h: Fixed a typo
s/writen/written/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/mv_xor.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h
index d86086b05b0e..c87cefd38a07 100644
--- a/drivers/dma/mv_xor.h
+++ b/drivers/dma/mv_xor.h
@@ -99,7 +99,7 @@ struct mv_xor_device {
* @common: common dmaengine channel object members
* @slots_allocated: records the actual size of the descriptor slot pool
* @irq_tasklet: bottom half where mv_xor_slot_cleanup runs
- * @op_in_desc: new mode of driver, each op is writen to descriptor.
+ * @op_in_desc: new mode of driver, each op is written to descriptor.
*/
struct mv_xor_chan {
int pending;
--
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[PATCH 08/30] mv_xor.c: Fix a typo
s/capabilites/capabilities/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/mv_xor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c index 23b232b57518..a43388b6a30d 100644 --- a/drivers/dma/mv_xor.c +++ b/drivers/dma/mv_xor.c @@ -1074,7 +1074,7 @@ mv_xor_channel_add(struct mv_xor_device *xordev, if (!mv_chan->dma_desc_pool_virt) return ERR_PTR(-ENOMEM); - /* discover transaction capabilites from the platform data */ + /* discover transaction capabilities from the platform data */ dma_dev->cap_mask = cap_mask; INIT_LIST_HEAD(_dev->channels); -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 07/30] iop-adma.c: Few typos fixed
s/asynchrounous/asynchronous/ s/depedency/dependency/ s/capabilites/capabilities/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/iop-adma.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c index 310b899d581f..81f32dc964e2 100644 --- a/drivers/dma/iop-adma.c +++ b/drivers/dma/iop-adma.c @@ -5,7 +5,7 @@ */ /* - * This driver supports the asynchrounous DMA copy and RAID engines available + * This driver supports the asynchronous DMA copy and RAID engines available * on the Intel Xscale(R) family of I/O Processors (IOP 32x, 33x, 134x) */ @@ -243,7 +243,7 @@ static void iop_adma_tasklet(struct tasklet_struct *t) struct iop_adma_chan *iop_chan = from_tasklet(iop_chan, t, irq_tasklet); - /* lockdep will flag depedency submissions as potentially + /* lockdep will flag dependency submissions as potentially * recursive locking, this is not the case as a dependency * submission will never recurse a channels submit routine. * There are checks in async_tx.c to prevent this. @@ -1302,7 +1302,7 @@ static int iop_adma_probe(struct platform_device *pdev) adev->id = plat_data->hw_id; - /* discover transaction capabilites from the platform data */ + /* discover transaction capabilities from the platform data */ dma_dev->cap_mask = plat_data->cap_mask; adev->pdev = pdev; -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 06/30] idma64.c: Fix couple of typos
s/transfered/transferred/ ...two different places Signed-off-by: Bhaskar Chowdhury --- drivers/dma/idma64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/idma64.c b/drivers/dma/idma64.c index f4c07ad3be15..3d0d48b12e28 100644 --- a/drivers/dma/idma64.c +++ b/drivers/dma/idma64.c @@ -282,7 +282,7 @@ static void idma64_desc_fill(struct idma64_chan *idma64c, desc->length += hw->len; } while (i); - /* Trigger an interrupt after the last block is transfered */ + /* Trigger an interrupt after the last block is transferred */ lli->ctllo |= IDMA64C_CTLL_INT_EN; /* Disable LLP transfer in the last block */ @@ -356,7 +356,7 @@ static size_t idma64_active_desc_size(struct idma64_chan *idma64c) if (!i) return bytes; - /* The current chunk is not fully transfered yet */ + /* The current chunk is not fully transferred yet */ bytes += desc->hw[--i].len; return bytes - IDMA64C_CTLH_BLOCK_TS(ctlhi); -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 05/30] bcm2835-dma.c: Fix a typo
s/missmatch/mismatch/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/bcm2835-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c index 630dfbb01a40..e6baf17b0434 100644 --- a/drivers/dma/bcm2835-dma.c +++ b/drivers/dma/bcm2835-dma.c @@ -369,7 +369,7 @@ static struct bcm2835_desc *bcm2835_dma_create_cb_chain( /* the last frame requires extra flags */ d->cb_list[d->frames - 1].cb->info |= finalextrainfo; - /* detect a size missmatch */ + /* detect a size mismatch */ if (buf_len && (d->size != buf_len)) goto error_cb; -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 04/30] bcm-sba-raid.c: Few typos fixed
s/Maibox/Mailbox/
s/alloced/allocated/
s/atleast/"at least"/
s/parallely/parallel/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/bcm-sba-raid.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/bcm-sba-raid.c b/drivers/dma/bcm-sba-raid.c
index 64239da02e74..fba1585eb7ad 100644
--- a/drivers/dma/bcm-sba-raid.c
+++ b/drivers/dma/bcm-sba-raid.c
@@ -25,7 +25,7 @@
* number of hardware rings over one or more SBA hardware devices. By
* design, the internal buffer size of SBA hardware device is limited
* but all offload operations supported by SBA can be broken down into
- * multiple small size requests and executed parallely on multiple SBA
+ * multiple small size requests and executed parallel on multiple SBA
* hardware devices for achieving high through-put.
*
* The Broadcom SBA RAID driver does not require any register programming
@@ -143,7 +143,7 @@ struct sba_device {
u32 max_xor_srcs;
u32 max_resp_pool_size;
u32 max_cmds_pool_size;
- /* Maibox client and Mailbox channels */
+ /* Mailbox client and Mailbox channels */
struct mbox_client client;
struct mbox_chan *mchan;
struct device *mbox_dev;
@@ -328,7 +328,7 @@ static void sba_cleanup_nonpending_requests(struct
sba_device *sba)
spin_lock_irqsave(>reqs_lock, flags);
- /* Freeup all alloced request */
+ /* Freeup all allocated request */
list_for_each_entry_safe(req, req1, >reqs_alloc_list, node)
_sba_free_request(sba, req);
@@ -1633,7 +1633,7 @@ static int sba_probe(struct platform_device *pdev)
sba->dev = >dev;
platform_set_drvdata(pdev, sba);
- /* Number of mailbox channels should be atleast 1 */
+ /* Number of mailbox channels should be at least 1 */
ret = of_count_phandle_with_args(pdev->dev.of_node,
"mboxes", "#mbox-cells");
if (ret <= 0)
--
2.26.3
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[PATCH 03/30] amba-pl08x.c: Fixed couple of typos
s/busses/buses/
s/accound/account/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/amba-pl08x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index a24882ba3764..d15182634789 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -121,7 +121,7 @@ struct vendor_data {
/**
* struct pl08x_bus_data - information of source or destination
- * busses for a transfer
+ * buses for a transfer
* @addr: current address
* @maxwidth: the maximum width of a transfer on this bus
* @buswidth: the width of this bus in bytes: 1, 2 or 4
@@ -1010,7 +1010,7 @@ static inline u32 pl08x_lli_control_bits(struct
pl08x_driver_data *pl08x,
/*
* Remove all src, dst and transfer size bits, then set the
* width and size according to the parameters. The bit offsets
-* are different in the FTDMAC020 so we need to accound for this.
+* are different in the FTDMAC020 so we need to account for this.
*/
if (pl08x->vd->ftdmac020) {
retbits &= ~FTDMAC020_LLI_DST_WIDTH_MSK;
--
2.26.3
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[PATCH 02/30] altera-msgdma.c: Couple of typos fixed
s/assosiated/associated/
s/oder/order/
Signed-off-by: Bhaskar Chowdhury
---
drivers/dma/altera-msgdma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/altera-msgdma.c b/drivers/dma/altera-msgdma.c
index 9a841ce5f0c5..c3483bf2aaa7 100644
--- a/drivers/dma/altera-msgdma.c
+++ b/drivers/dma/altera-msgdma.c
@@ -152,7 +152,7 @@ struct msgdma_extended_desc {
/**
* struct msgdma_sw_desc - implements a sw descriptor
* @async_tx: support for the async_tx api
- * @hw_desc: assosiated HW descriptor
+ * @hw_desc: associated HW descriptor
* @node: node to move from the free list to the tx list
* @tx_list: transmit list node
*/
@@ -510,7 +510,7 @@ static void msgdma_copy_one(struct msgdma_device *mdev,
* of the DMA controller. The descriptor will get flushed to the
* FIFO, once the last word (control word) is written. Since we
* are not 100% sure that memcpy() writes all word in the "correct"
-* oder (address from low to high) on all architectures, we make
+* order (address from low to high) on all architectures, we make
* sure this control word is written last by single coding it and
* adding some write-barriers here.
*/
--
2.26.3
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[PATCH 01/30] acpi-dma.c: Fix couple of typos
s/exctract/extract/ s/avaiable/available/ Signed-off-by: Bhaskar Chowdhury --- drivers/dma/acpi-dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dma/acpi-dma.c b/drivers/dma/acpi-dma.c index 235f1396f968..4b1d5183bf64 100644 --- a/drivers/dma/acpi-dma.c +++ b/drivers/dma/acpi-dma.c @@ -100,7 +100,7 @@ static int acpi_dma_parse_resource_group(const struct acpi_csrt_group *grp, } /** - * acpi_dma_parse_csrt - parse CSRT to exctract additional DMA resources + * acpi_dma_parse_csrt - parse CSRT to extract additional DMA resources * @adev: ACPI device to match with * @adma: struct acpi_dma of the given DMA controller * @@ -293,7 +293,7 @@ EXPORT_SYMBOL_GPL(devm_acpi_dma_controller_free); * found. * * Return: - * 0, if no information is avaiable, -1 on mismatch, and 1 otherwise. + * 0, if no information is available, -1 on mismatch, and 1 otherwise. */ static int acpi_dma_update_dma_spec(struct acpi_dma *adma, struct acpi_dma_spec *dma_spec) -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 00/30] DMA: Mundane typo fixes
This patch series fixes some trivial and rudimentary spellings in the COMMENT sections. Bhaskar Chowdhury (30): acpi-dma.c: Fix couple of typos altera-msgdma.c: Couple of typos fixed amba-pl08x.c: Fixed couple of typos bcm-sba-raid.c: Few typos fixed bcm2835-dma.c: Fix a typo idma64.c: Fix couple of typos iop-adma.c: Few typos fixed mv_xor.c: Fix a typo mv_xor.h: Fixed a typo mv_xor_v2.c: Fix a typo nbpfaxi.c: Fixed a typo of-dma.c: Fixed a typo s3c24xx-dma.c: Fix a typo Revert "s3c24xx-dma.c: Fix a typo" s3c24xx-dma.c: Few typos fixed st_fdma.h: Fix couple of typos ste_dma40_ll.h: Fix a typo tegra20-apb-dma.c: Fixed a typo xgene-dma.c: Few spello fixes at_hdmac.c: Quite a few spello fixes owl-dma.c: Fix a typo at_hdmac_regs.h: Couple of typo fixes dma-jz4780.c: Fix a typo Kconfig: Change Synopsys to Synopsis ste_dma40.c: Few spello fixes dw-axi-dmac-platform.c: Few typos fixed dpaa2-qdma.c: Fix a typo usb-dmac.c: Fix a typo edma.c: Fix a typo xilinx_dma.c: Fix a typo drivers/dma/Kconfig| 8 drivers/dma/acpi-dma.c | 4 ++-- drivers/dma/altera-msgdma.c| 4 ++-- drivers/dma/amba-pl08x.c | 4 ++-- drivers/dma/at_hdmac.c | 14 +++--- drivers/dma/at_hdmac_regs.h| 4 ++-- drivers/dma/bcm-sba-raid.c | 8 drivers/dma/bcm2835-dma.c | 2 +- drivers/dma/dma-jz4780.c | 2 +- drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 8 drivers/dma/idma64.c | 4 ++-- drivers/dma/iop-adma.c | 6 +++--- drivers/dma/mv_xor.c | 2 +- drivers/dma/mv_xor.h | 2 +- drivers/dma/mv_xor_v2.c| 2 +- drivers/dma/nbpfaxi.c | 2 +- drivers/dma/of-dma.c | 2 +- drivers/dma/owl-dma.c | 2 +- drivers/dma/s3c24xx-dma.c | 6 +++--- drivers/dma/sh/shdmac.c| 2 +- drivers/dma/sh/usb-dmac.c | 2 +- drivers/dma/st_fdma.h | 4 ++-- drivers/dma/ste_dma40.c| 10 +- drivers/dma/ste_dma40_ll.h | 2 +- drivers/dma/tegra20-apb-dma.c | 2 +- drivers/dma/ti/edma.c | 2 +- drivers/dma/xgene-dma.c| 6 +++--- drivers/dma/xilinx/xilinx_dma.c| 2 +- 28 files changed, 59 insertions(+), 59 deletions(-) -- 2.26.3 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v1 1/2] gpu: host1x: Add back arm_iommu_detach_device()
The case of CONFIG_ARM_DMA_USE_IOMMU=y was found to be broken for
host1x driver. Add back the workaround using arm_iommu_detach_device()
as a temporary solution.
Cc: sta...@vger.kernel.org
Fixes: af1cbfb9bf0f ("gpu: host1x: Support DMA mapping of buffers"
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/dev.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index d0ebb70e2fdd..a2c09dca4eef 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -18,6 +18,10 @@
#include
#undef CREATE_TRACE_POINTS
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+#include
+#endif
+
#include "bus.h"
#include "channel.h"
#include "debug.h"
@@ -232,6 +236,17 @@ static struct iommu_domain *host1x_iommu_attach(struct
host1x *host)
struct iommu_domain *domain = iommu_get_domain_for_dev(host->dev);
int err;
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+ if (host->dev->archdata.mapping) {
+ struct dma_iommu_mapping *mapping =
+ to_dma_iommu_mapping(host->dev);
+ arm_iommu_detach_device(host->dev);
+ arm_iommu_release_mapping(mapping);
+
+ domain = iommu_get_domain_for_dev(host->dev);
+ }
+#endif
+
/*
* We may not always want to enable IOMMU support (for example if the
* host1x firewall is already enabled and we don't support addressing
--
2.30.2
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[PATCH v1 2/2] drm/tegra: Add back arm_iommu_detach_device()
The case of CONFIG_ARM_DMA_USE_IOMMU=y was found to be broken for
DRM driver. Add back the workaround using arm_iommu_detach_device()
as a temporary solution.
Cc: sta...@vger.kernel.org
Fixes: fa6661b7aa0b ("drm/tegra: Optionally attach clients to the IOMMU")
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/drm.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 90709c38c993..a949cb678e08 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -20,6 +20,10 @@
#include
#include
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+#include
+#endif
+
#include "drm.h"
#include "gem.h"
@@ -909,6 +913,17 @@ int host1x_client_iommu_attach(struct host1x_client
*client)
struct iommu_group *group = NULL;
int err;
+#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
+ if (client->dev->archdata.mapping) {
+ struct dma_iommu_mapping *mapping =
+ to_dma_iommu_mapping(client->dev);
+ arm_iommu_detach_device(client->dev);
+ arm_iommu_release_mapping(mapping);
+
+ domain = iommu_get_domain_for_dev(client->dev);
+ }
+#endif
+
/*
* If the host1x client is already attached to an IOMMU domain that is
* not the shared IOMMU domain, don't try to attach it to a different
--
2.30.2
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Re: linux-next: build warning after merge of the drm-intel-fixes tree
Hi all,
On Fri, 26 Mar 2021 19:58:38 +1100 Stephen Rothwell
wrote:
>
> After merging the drm-intel-fixes tree, today's linux-next build
> (htmldocs) produced this warning:
>
> Documentation/gpu/i915:22: /drivers/gpu/drm/i915/intel_runtime_pm.c:423:
> WARNING: Inline strong start-string without end-string.
>
> Introduced by commit
>
> 8840e3bd981f ("drm/i915: Fix the GT fence revocation runtime PM logic")
This warning now exists in Linus' tree.
--
Cheers,
Stephen Rothwell
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[Bug 212469] plymouth animation freezes during shutdown
https://bugzilla.kernel.org/show_bug.cgi?id=212469 Amir (amirg...@criptext.com) changed: What|Removed |Added CC||amirg...@criptext.com --- Comment #1 from Amir (amirg...@criptext.com) --- Created attachment 296127 --> https://bugzilla.kernel.org/attachment.cgi?id=296127=edit cat /etc/X11/xorg.conf.d/20-intel.conf I use a xorg.conf for my intel GPU. thought it might help reproducing the bug. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212469] New: plymouth animation freezes during shutdown
https://bugzilla.kernel.org/show_bug.cgi?id=212469 Bug ID: 212469 Summary: plymouth animation freezes during shutdown Product: Drivers Version: 2.5 Kernel Version: 5.11.6 Hardware: Intel OS: Linux Tree: Mainline Status: NEW Severity: low Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-...@kernel-bugs.osdl.org Reporter: amirg...@criptext.com Regression: No Created attachment 296125 --> https://bugzilla.kernel.org/attachment.cgi?id=296125=edit plymouth animation freezes during shutdown Overview: plymouth animation during shutdown freezes. the system would shutdown without any problem. Steps to reproduce: with plymouth installed and lightdm-plymouth/sddm-plymouth.service enabled, after pressing restart or shutdown button, plymouth animation appears normally then the screen would turn off and then it turn on again, this time it shows a frozen plymouth animation. after about 5sec the system would shutdown/restart normally. Expected Results: plymouth animation will work during shutdown and won't freeze. Build Date & Hardware: archlinux-kernel 5.11.6 build 1 CPU: intel i5 7200u GPU: Intel HD 620 + Nivida 940mx Video Driver: modsettings driver for Intel HD + Nvidia-proprietary 460.67 in prime render offloading mode DE: KDE Plasma 5.21.3 plymouth: latest git build Additional Builds and Platforms: this problem doesn't occur with kernel 5.10.16. Additional Information: see attached video bellow -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v5 0/2] gpu: drm: add driver for ili9361 panel
This is v3 of the series. Changelog: v2 -> v3: * Turn Documentation into yaml format v3 -> v4: * Fix reference error in yaml file v4 -> v5: * More yaml file documentation fixes Daniel Mack (2): dt-bindings: display: add bindings for newhaven,1.8-128160EF drm/tiny: add driver for newhaven,1.8-128160EF .../display/panel/ilitek,ili9163.yaml | 69 +++ drivers/gpu/drm/tiny/Kconfig | 13 + drivers/gpu/drm/tiny/Makefile | 1 + drivers/gpu/drm/tiny/ili9163.c| 224 ++ 4 files changed, 307 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ilitek,ili9163.yaml create mode 100644 drivers/gpu/drm/tiny/ili9163.c -- 2.29.2 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v5 2/2] drm/tiny: add driver for newhaven,1.8-128160EF
This patch adds support for Newhaven's NHD-1.8-128160EF display, featuring
an Ilitek ILI9163 controller.
Signed-off-by: Daniel Mack
Acked-by: Daniel Vetter
---
drivers/gpu/drm/tiny/Kconfig | 13 ++
drivers/gpu/drm/tiny/Makefile | 1 +
drivers/gpu/drm/tiny/ili9163.c | 224 +
3 files changed, 238 insertions(+)
create mode 100644 drivers/gpu/drm/tiny/ili9163.c
diff --git a/drivers/gpu/drm/tiny/Kconfig b/drivers/gpu/drm/tiny/Kconfig
index 2b6414f0fa759..9de0c0eeea6f5 100644
--- a/drivers/gpu/drm/tiny/Kconfig
+++ b/drivers/gpu/drm/tiny/Kconfig
@@ -41,6 +41,19 @@ config TINYDRM_HX8357D
If M is selected the module will be called hx8357d.
+config TINYDRM_ILI9163
+ tristate "DRM support for ILI9163 display panels"
+ depends on DRM && SPI
+ select DRM_KMS_HELPER
+ select DRM_KMS_CMA_HELPER
+ select DRM_MIPI_DBI
+ select BACKLIGHT_CLASS_DEVICE
+ help
+ DRM driver for the following Ilitek ILI9163 panels:
+ * NHD-1.8-128160EF 128x160 TFT
+
+ If M is selected the module will be called ili9163.
+
config TINYDRM_ILI9225
tristate "DRM support for ILI9225 display panels"
depends on DRM && SPI
diff --git a/drivers/gpu/drm/tiny/Makefile b/drivers/gpu/drm/tiny/Makefile
index 6ae4e9e5a35fb..78016b2ed11b5 100644
--- a/drivers/gpu/drm/tiny/Makefile
+++ b/drivers/gpu/drm/tiny/Makefile
@@ -3,6 +3,7 @@
obj-$(CONFIG_DRM_CIRRUS_QEMU) += cirrus.o
obj-$(CONFIG_DRM_GM12U320) += gm12u320.o
obj-$(CONFIG_TINYDRM_HX8357D) += hx8357d.o
+obj-$(CONFIG_TINYDRM_ILI9163) += ili9163.o
obj-$(CONFIG_TINYDRM_ILI9225) += ili9225.o
obj-$(CONFIG_TINYDRM_ILI9341) += ili9341.o
obj-$(CONFIG_TINYDRM_ILI9486) += ili9486.o
diff --git a/drivers/gpu/drm/tiny/ili9163.c b/drivers/gpu/drm/tiny/ili9163.c
new file mode 100644
index 0..6fa9e59b69321
--- /dev/null
+++ b/drivers/gpu/drm/tiny/ili9163.c
@@ -0,0 +1,224 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define ILI9163_FRMCTR10xb1
+
+#define ILI9163_PWCTRL10xc0
+#define ILI9163_PWCTRL20xc1
+#define ILI9163_VMCTRL10xc5
+#define ILI9163_VMCTRL20xc7
+#define ILI9163_PWCTRLA0xcb
+#define ILI9163_PWCTRLB0xcf
+
+#define ILI9163_EN3GAM 0xf2
+
+#define ILI9163_MADCTL_BGR BIT(3)
+#define ILI9163_MADCTL_MV BIT(5)
+#define ILI9163_MADCTL_MX BIT(6)
+#define ILI9163_MADCTL_MY BIT(7)
+
+static void yx240qv29_enable(struct drm_simple_display_pipe *pipe,
+struct drm_crtc_state *crtc_state,
+struct drm_plane_state *plane_state)
+{
+ struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
+ struct mipi_dbi *dbi = >dbi;
+ u8 addr_mode;
+ int ret, idx;
+
+ if (!drm_dev_enter(pipe->crtc.dev, ))
+ return;
+
+ drm_dbg_kms(>drm, "\n");
+
+ ret = mipi_dbi_poweron_conditional_reset(dbidev);
+ if (ret < 0)
+ goto out_exit;
+ if (ret == 1)
+ goto out_enable;
+
+ /* Gamma */
+ mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x04);
+ mipi_dbi_command(dbi, ILI9163_EN3GAM, 0x00);
+
+ /* Frame Rate */
+ mipi_dbi_command(dbi, ILI9163_FRMCTR1, 0x0a, 0x14);
+
+ /* Power Control */
+ mipi_dbi_command(dbi, ILI9163_PWCTRL1, 0x0a, 0x00);
+ mipi_dbi_command(dbi, ILI9163_PWCTRL2, 0x02);
+
+ /* VCOM */
+ mipi_dbi_command(dbi, ILI9163_VMCTRL1, 0x2f, 0x3e);
+ mipi_dbi_command(dbi, ILI9163_VMCTRL2, 0x40);
+
+ /* Memory Access Control */
+ mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,
MIPI_DCS_PIXEL_FMT_16BIT);
+
+ mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
+ msleep(100);
+
+ mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
+ msleep(100);
+
+out_enable:
+ switch (dbidev->rotation) {
+ default:
+ addr_mode = 0;
+ break;
+ case 90:
+ addr_mode = ILI9163_MADCTL_MV | ILI9163_MADCTL_MX;
+ break;
+ case 180:
+ addr_mode = ILI9163_MADCTL_MX | ILI9163_MADCTL_MY;
+ break;
+ case 270:
+ addr_mode = ILI9163_MADCTL_MV | ILI9163_MADCTL_MY;
+ break;
+ }
+ addr_mode |= ILI9163_MADCTL_BGR;
+ mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
+ mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
+out_exit:
+ drm_dev_exit(idx);
+}
+
+static const struct drm_simple_display_pipe_funcs ili9163_pipe_funcs = {
+ .enable = yx240qv29_enable,
+ .disable = mipi_dbi_pipe_disable,
+ .update =
[PATCH v5 1/2] dt-bindings: display: add bindings for newhaven, 1.8-128160EF
This adds documentation for a new ILI9163 based, SPI connected display.
Signed-off-by: Daniel Mack
---
.../display/panel/ilitek,ili9163.yaml | 69 +++
1 file changed, 69 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml
diff --git
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml
new file mode 100644
index 0..fbb12e46493b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/ilitek,ili9163.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek ILI9163 display panels device tree bindings
+
+maintainers:
+ - Daniel Mack
+
+description:
+ This binding is for display panels using an Ilitek ILI9163 controller in SPI
+ mode.
+
+allOf:
+ - $ref: panel/panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - enum:
+ - newhaven,1.8-128160EF
+ - const: ilitek,ili9163
+
+ spi-max-frequency:
+maximum: 3200
+
+ dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX)
+
+ backlight: true
+ reg: true
+ reset-gpios: true
+ rotation: true
+
+required:
+ - compatible
+ - reg
+ - dc-gpios
+ - reset-gpios
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+
+backlight: backlight {
+compatible = "gpio-backlight";
+gpios = < 22 GPIO_ACTIVE_HIGH>;
+};
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+
+display@0 {
+compatible = "newhaven,1.8-128160EF", "ilitek,ili9163";
+reg = <0>;
+spi-max-frequency = <3200>;
+dc-gpios = < 24 GPIO_ACTIVE_HIGH>;
+reset-gpios = < 25 GPIO_ACTIVE_HIGH>;
+rotation = <180>;
+backlight = <>;
+};
+};
+
+...
--
2.30.2
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[Bug 212467] AMDGPU -- amdgpu: Unsupported power profile mode 0 on RENOIR (AMD Ryzen 4600H, iGPU rev c7)
https://bugzilla.kernel.org/show_bug.cgi?id=212467 Alex Deucher (alexdeuc...@gmail.com) changed: What|Removed |Added CC||alexdeuc...@gmail.com --- Comment #3 from Alex Deucher (alexdeuc...@gmail.com) --- (In reply to Bogdan from comment #0) > Created attachment 296121 [details] > dmesg with amdgpu errors > > I have errors in dmesg: > > [ 11.850726] UBSAN: shift-out-of-bounds in > drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:1140:32 > [ 11.850728] shift exponent 64 is too large for 64-bit type 'long long > unsigned int' > Fixed in: https://cgit.freedesktop.org/drm/drm/commit/?id=50e2fc36e72d4ad672032ebf646cecb48656efe0 > [ 12.876987] amdgpu :05:00.0: amdgpu: Unsupported power profile mode 0 > on RENOIR > Harmless; fixed in: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e3746696e78f2185633ae9b47c40fabf88bdcf99 > [ 29.314776] UBSAN: shift-out-of-bounds in > drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_rq_dlg_calc_21.c: > 288:38 > [ 29.314782] shift exponent 4294966273 is too large for 32-bit type 'int' Fixed in: https://gitlab.freedesktop.org/agd5f/linux/-/commit/f773d381629efade8247a5b25ca1d00d77bc1c1b -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212467] AMDGPU -- amdgpu: Unsupported power profile mode 0 on RENOIR (AMD Ryzen 4600H, iGPU rev c7)
https://bugzilla.kernel.org/show_bug.cgi?id=212467 Bogdan (bogdan.pylypenko...@gmail.com) changed: What|Removed |Added Summary|AMDGPU -- amdgpu: |AMDGPU -- amdgpu: |Unsupported power profile |Unsupported power profile |mode 0 on RENOIR|mode 0 on RENOIR (AMD Ryzen ||4600H, iGPU rev c7) -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212467] AMDGPU -- amdgpu: Unsupported power profile mode 0 on RENOIR
https://bugzilla.kernel.org/show_bug.cgi?id=212467 --- Comment #2 from Bogdan (bogdan.pylypenko...@gmail.com) --- My VGA adapter is: 05:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Renoir (rev c7) Which integrated into CPU - AMD Ryzen 4600H. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212467] AMDGPU -- amdgpu: Unsupported power profile mode 0 on RENOIR
https://bugzilla.kernel.org/show_bug.cgi?id=212467 --- Comment #1 from Bogdan (bogdan.pylypenko...@gmail.com) --- Created attachment 296123 --> https://bugzilla.kernel.org/attachment.cgi?id=296123=edit kernel config -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212467] New: AMDGPU -- amdgpu: Unsupported power profile mode 0 on RENOIR
https://bugzilla.kernel.org/show_bug.cgi?id=212467 Bug ID: 212467 Summary: AMDGPU -- amdgpu: Unsupported power profile mode 0 on RENOIR Product: Drivers Version: 2.5 Kernel Version: 5.11.10 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-...@kernel-bugs.osdl.org Reporter: bogdan.pylypenko...@gmail.com Regression: No Created attachment 296121 --> https://bugzilla.kernel.org/attachment.cgi?id=296121=edit dmesg with amdgpu errors I have errors in dmesg: [ 11.850726] UBSAN: shift-out-of-bounds in drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:1140:32 [ 11.850728] shift exponent 64 is too large for 64-bit type 'long long unsigned int' [ 12.876987] amdgpu :05:00.0: amdgpu: Unsupported power profile mode 0 on RENOIR [ 29.314776] UBSAN: shift-out-of-bounds in drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_rq_dlg_calc_21.c:288:38 [ 29.314782] shift exponent 4294966273 is too large for 32-bit type 'int' -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v6 4/4] backlight: rt4831: Adds support for Richtek RT4831 backlight
From: ChiYuan Huang
Adds support for Richtek RT4831 backlight.
Signed-off-by: ChiYuan Huang
---
since v6
- Fix Kconfig typo.
- Remove internal mutex lock.
- Add the prefix for max brightness.
- rename init_device_properties to parse_backlight_properties.
- Remove some warning message if default value is adopted.
- Add backlight property scale to LINEAR mapping.
- Fix regmap get to check NULL not IS_ERR.
---
drivers/video/backlight/Kconfig| 8 ++
drivers/video/backlight/Makefile | 1 +
drivers/video/backlight/rt4831-backlight.c | 203 +
3 files changed, 212 insertions(+)
create mode 100644 drivers/video/backlight/rt4831-backlight.c
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index d83c87b..de96441 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -289,6 +289,14 @@ config BACKLIGHT_QCOM_WLED
If you have the Qualcomm PMIC, say Y to enable a driver for the
WLED block. Currently it supports PM8941 and PMI8998.
+config BACKLIGHT_RT4831
+ tristate "Richtek RT4831 Backlight Driver"
+ depends on MFD_RT4831
+ help
+ This enables support for Richtek RT4831 Backlight driver.
+ It's common used to drive the display WLED. There're four channels
+ inisde, and each channel can provide up to 30mA current.
+
config BACKLIGHT_SAHARA
tristate "Tabletkiosk Sahara Touch-iT Backlight Driver"
depends on X86
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index 685f3f1..cae2c83 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_BACKLIGHT_PANDORA) += pandora_bl.o
obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o
obj-$(CONFIG_BACKLIGHT_PWM)+= pwm_bl.o
obj-$(CONFIG_BACKLIGHT_QCOM_WLED) += qcom-wled.o
+obj-$(CONFIG_BACKLIGHT_RT4831) += rt4831-backlight.o
obj-$(CONFIG_BACKLIGHT_SAHARA) += kb3886_bl.o
obj-$(CONFIG_BACKLIGHT_SKY81452) += sky81452-backlight.o
obj-$(CONFIG_BACKLIGHT_TOSA) += tosa_bl.o
diff --git a/drivers/video/backlight/rt4831-backlight.c
b/drivers/video/backlight/rt4831-backlight.c
new file mode 100644
index ..42155c7
--- /dev/null
+++ b/drivers/video/backlight/rt4831-backlight.c
@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RT4831_REG_BLCFG 0x02
+#define RT4831_REG_BLDIML 0x04
+#define RT4831_REG_ENABLE 0x08
+
+#define RT4831_BLMAX_BRIGHTNESS2048
+
+#define RT4831_BLOVP_MASK GENMASK(7, 5)
+#define RT4831_BLOVP_SHIFT 5
+#define RT4831_BLPWMEN_MASKBIT(0)
+#define RT4831_BLEN_MASK BIT(4)
+#define RT4831_BLCH_MASK GENMASK(3, 0)
+#define RT4831_BLDIML_MASK GENMASK(2, 0)
+#define RT4831_BLDIMH_MASK GENMASK(10, 3)
+#define RT4831_BLDIMH_SHIFT3
+
+struct rt4831_priv {
+ struct device *dev;
+ struct regmap *regmap;
+ struct backlight_device *bl;
+};
+
+static int rt4831_bl_update_status(struct backlight_device *bl_dev)
+{
+ struct rt4831_priv *priv = bl_get_data(bl_dev);
+ int brightness = backlight_get_brightness(bl_dev);
+ unsigned int enable = brightness ? RT4831_BLEN_MASK : 0;
+ u8 v[2];
+ int ret;
+
+ if (brightness) {
+ v[0] = (brightness - 1) & RT4831_BLDIML_MASK;
+ v[1] = ((brightness - 1) & RT4831_BLDIMH_MASK) >>
RT4831_BLDIMH_SHIFT;
+
+ ret = regmap_raw_write(priv->regmap, RT4831_REG_BLDIML, v,
sizeof(v));
+ if (ret)
+ return ret;
+ }
+
+ return regmap_update_bits(priv->regmap, RT4831_REG_ENABLE,
RT4831_BLEN_MASK, enable);
+
+}
+
+static int rt4831_bl_get_brightness(struct backlight_device *bl_dev)
+{
+ struct rt4831_priv *priv = bl_get_data(bl_dev);
+ unsigned int val;
+ u8 v[2];
+ int ret;
+
+ ret = regmap_read(priv->regmap, RT4831_REG_ENABLE, );
+ if (ret)
+ return ret;
+
+ if (!(val & RT4831_BLEN_MASK))
+ return 0;
+
+ ret = regmap_raw_read(priv->regmap, RT4831_REG_BLDIML, v, sizeof(v));
+ if (ret)
+ return ret;
+
+ ret = (v[1] << RT4831_BLDIMH_SHIFT) + (v[0] & RT4831_BLDIML_MASK) + 1;
+
+ return ret;
+}
+
+static const struct backlight_ops rt4831_bl_ops = {
+ .options = BL_CORE_SUSPENDRESUME,
+ .update_status = rt4831_bl_update_status,
+ .get_brightness = rt4831_bl_get_brightness,
+};
+
+static int rt4831_parse_backlight_properties(struct rt4831_priv *priv,
+struct backlight_properties
*bl_props)
+{
+ struct device *dev = priv->dev;
+ u8 propval;
+ u32 brightness;
+ unsigned int val = 0;
+ int ret;
+
+
[PATCH v6 2/4] backlight: rt4831: Adds DT binding document for Richtek RT4831 backlight
From: ChiYuan Huang Adds DT binding document for Richtek RT4831 backlight. Signed-off-by: ChiYuan Huang --- .../leds/backlight/richtek,rt4831-backlight.yaml | 65 ++ include/dt-bindings/leds/rt4831-backlight.h| 23 2 files changed, 88 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml create mode 100644 include/dt-bindings/leds/rt4831-backlight.h diff --git a/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml new file mode 100644 index ..4da6a66 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/richtek,rt4831-backlight.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT4831 Backlight + +maintainers: + - ChiYuan Huang + +description: | + RT4831 is a mutifunctional device that can provide power to the LCD display + and LCD backlight. + + For the LCD backlight, it can provide four channel WLED driving capability. + Each channel driving current is up to 30mA + + Datasheet is available at + https://www.richtek.com/assets/product_file/RT4831A/DS4831A-05.pdf + +properties: + compatible: +const: richtek,rt4831-backlight + + default-brightness: +description: | + The default brightness that applied to the system on start-up. +$ref: /schemas/types.yaml#/definitions/uint32 +minimum: 0 +maximum: 2048 + + max-brightness: +description: | + The max brightness for the H/W limit +$ref: /schemas/types.yaml#/definitions/uint32 +minimum: 0 +maximum: 2048 + + richtek,pwm-enable: +description: | + Specify the backlight dimming following by PWM duty or by SW control. +type: boolean + + richtek,bled-ovp-sel: +description: | + Backlight OVP level selection, currently support 17V/21V/25V/29V. +$ref: /schemas/types.yaml#/definitions/uint8 +default: 1 +minimum: 0 +maximum: 3 + + richtek,channel-use: +description: | + Backlight LED channel to be used. + BIT 0/1/2/3 is used to indicate led channel 1/2/3/4 enable or disable. +$ref: /schemas/types.yaml#/definitions/uint8 +minimum: 1 +maximum: 15 + +required: + - compatible + - richtek,channel-use + +additionalProperties: false diff --git a/include/dt-bindings/leds/rt4831-backlight.h b/include/dt-bindings/leds/rt4831-backlight.h new file mode 100644 index ..125c635 --- /dev/null +++ b/include/dt-bindings/leds/rt4831-backlight.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * This header provides constants for rt4831 backlight bindings. + * + * Copyright (C) 2020, Richtek Technology Corp. + * Author: ChiYuan Huang + */ + +#ifndef _DT_BINDINGS_RT4831_BACKLIGHT_H +#define _DT_BINDINGS_RT4831_BACKLIGHT_H + +#define RT4831_BLOVPLVL_17V0 +#define RT4831_BLOVPLVL_21V1 +#define RT4831_BLOVPLVL_25V2 +#define RT4831_BLOVPLVL_29V3 + +#define RT4831_BLED_CH1EN (1 << 0) +#define RT4831_BLED_CH2EN (1 << 1) +#define RT4831_BLED_CH3EN (1 << 2) +#define RT4831_BLED_CH4EN (1 << 3) +#define RT4831_BLED_ALLCHEN((1 << 4) - 1) + +#endif /* _DT_BINDINGS_RT4831_BACKLIGHT_H */ -- 2.7.4 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v6 3/4] mfd: rt4831: Adds DT binding document for Richtek RT4831
From: ChiYuan Huang
Adds DT binding document for Richtek RT4831.
Signed-off-by: ChiYuan Huang
---
.../devicetree/bindings/mfd/richtek,rt4831.yaml| 90 ++
1 file changed, 90 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
diff --git a/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
new file mode 100644
index ..4762eb1
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/richtek,rt4831.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Richtek RT4831 DSV and Backlight Integrated IC
+
+maintainers:
+ - ChiYuan Huang
+
+description: |
+ RT4831 is a multifunctional device that can provide power to the LCD display
+ and LCD backlight.
+
+ For Display Bias Voltage DSVP and DSVN, the output range is about 4V to 6.5V.
+ It's sufficient to meet the current LCD power requirement.
+
+ For the LCD backlight, it can provide four channel WLED driving capability.
+ Each channel driving current is up to 30mA
+
+ Datasheet is available at
+ https://www.richtek.com/assets/product_file/RT4831A/DS4831A-05.pdf
+
+properties:
+ compatible:
+const: richtek,rt4831
+
+ reg:
+description: I2C device address.
+maxItems: 1
+
+ enable-gpios:
+description: |
+ GPIO to enable/disable the chip. It is optional.
+ Some usage directly tied this pin to follow VIO 1.8V power on sequence.
+maxItems: 1
+
+ regulators:
+$ref: ../regulator/richtek,rt4831-regulator.yaml
+
+ backlight:
+$ref: ../leds/backlight/richtek,rt4831-backlight.yaml
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rt4831@11 {
+compatible = "richtek,rt4831";
+reg = <0x11>;
+
+regulators {
+ DSVLCM {
+regulator-min-microvolt = <400>;
+regulator-max-microvolt = <715>;
+regulator-allow-bypass;
+ };
+ DSVP {
+regulator-name = "rt4831-dsvp";
+regulator-min-microvolt = <400>;
+regulator-max-microvolt = <650>;
+regulator-boot-on;
+ };
+ DSVN {
+regulator-name = "rt4831-dsvn";
+regulator-min-microvolt = <400>;
+regulator-max-microvolt = <650>;
+regulator-boot-on;
+ };
+};
+
+backlight {
+ compatible = "richtek,rt4831-backlight";
+ default-brightness = <1024>;
+ max-brightness = <2048>;
+ richtek,bled-ovp-sel = /bits/ 8 ;
+ richtek,channel-use = /bits/ 8 ;
+};
+ };
+};
--
2.7.4
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[PATCH v6 1/4] mfd: rt4831: Adds support for Richtek RT4831
From: ChiYuan Huang
This adds support Richtek RT4831 core. It includes four channel WLED driver
and Display Bias Voltage outputs.
Signed-off-by: ChiYuan Huang
---
The RT4831 regulator patches are already on main stream, and can be referred to
9351ab8b0cb6 regulator: rt4831: Adds support for Richtek RT4831 DSV regulator
934b05e81862 regulator: rt4831: Adds DT binding document for Richtek RT4831 DSV
regulator
since v6
- Respin the date from 2020 to 2021.
- Rmove the shutdown routine.
- Change the macro OF_MFD_CELL to MFD_CELL_OF.
since v5
- Rename file name from rt4831-core.c to rt4831.c
- Change RICHTEK_VID to RICHTEK_VENDOR_ID.
- Change gpio_desc nameing from 'enable' to 'enable_gpio' in probe.
- Change variable 'val' to the meaningful name 'chip_id'.
- Refine the error log when vendor id is not matched.
- Remove of_match_ptr.
since v2
- Refine Kconfig descriptions.
- Add copyright.
- Refine error logs in probe.
- Refine comment lines in remove and shutdown.
---
drivers/mfd/Kconfig | 10 +
drivers/mfd/Makefile | 1 +
drivers/mfd/rt4831.c | 115 +++
3 files changed, 126 insertions(+)
create mode 100644 drivers/mfd/rt4831.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index b74efa4..3f43834 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1065,6 +1065,16 @@ config MFD_RDC321X
southbridge which provides access to GPIOs and Watchdog using the
southbridge PCI device configuration space.
+config MFD_RT4831
+ tristate "Richtek RT4831 four channel WLED and Display Bias Voltage"
+ depends on I2C
+ select MFD_CORE
+ select REGMAP_I2C
+ help
+ This enables support for the Richtek RT4831 that includes 4 channel
+ WLED driving and Display Bias Voltage. It's commonly used to provide
+ power to the LCD display and LCD backlight.
+
config MFD_RT5033
tristate "Richtek RT5033 Power Management IC"
depends on I2C
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 834f546..5986914 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -235,6 +235,7 @@ obj-$(CONFIG_MFD_MENF21BMC) += menf21bmc.o
obj-$(CONFIG_MFD_HI6421_PMIC) += hi6421-pmic-core.o
obj-$(CONFIG_MFD_HI655X_PMIC) += hi655x-pmic.o
obj-$(CONFIG_MFD_DLN2) += dln2.o
+obj-$(CONFIG_MFD_RT4831) += rt4831.o
obj-$(CONFIG_MFD_RT5033) += rt5033.o
obj-$(CONFIG_MFD_SKY81452) += sky81452.o
diff --git a/drivers/mfd/rt4831.c b/drivers/mfd/rt4831.c
new file mode 100644
index ..b169781
--- /dev/null
+++ b/drivers/mfd/rt4831.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Richtek Technology Corp.
+ *
+ * Author: ChiYuan Huang
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define RT4831_REG_REVISION0x01
+#define RT4831_REG_ENABLE 0x08
+#define RT4831_REG_I2CPROT 0x15
+
+#define RICHTEK_VENDOR_ID 0x03
+#define RT4831_VID_MASKGENMASK(1, 0)
+#define RT4831_RESET_MASK BIT(7)
+#define RT4831_I2CSAFETMR_MASK BIT(0)
+
+static const struct mfd_cell rt4831_subdevs[] = {
+ MFD_CELL_OF("rt4831-backlight", NULL, NULL, 0, 0,
"richtek,rt4831-backlight"),
+ MFD_CELL_NAME("rt4831-regulator")
+};
+
+static bool rt4831_is_accessible_reg(struct device *dev, unsigned int reg)
+{
+ if (reg >= RT4831_REG_REVISION && reg <= RT4831_REG_I2CPROT)
+ return true;
+ return false;
+}
+
+static const struct regmap_config rt4831_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = RT4831_REG_I2CPROT,
+
+ .readable_reg = rt4831_is_accessible_reg,
+ .writeable_reg = rt4831_is_accessible_reg,
+};
+
+static int rt4831_probe(struct i2c_client *client)
+{
+ struct gpio_desc *enable_gpio;
+ struct regmap *regmap;
+ unsigned int chip_id;
+ int ret;
+
+ enable_gpio = devm_gpiod_get_optional(>dev, "enable",
GPIOD_OUT_HIGH);
+ if (IS_ERR(enable_gpio)) {
+ dev_err(>dev, "Failed to get 'enable' GPIO\n");
+ return PTR_ERR(enable_gpio);
+ }
+
+ regmap = devm_regmap_init_i2c(client, _regmap_config);
+ if (IS_ERR(regmap)) {
+ dev_err(>dev, "Failed to initialize regmap\n");
+ return PTR_ERR(regmap);
+ }
+
+ ret = regmap_read(regmap, RT4831_REG_REVISION, _id);
+ if (ret) {
+ dev_err(>dev, "Failed to get H/W revision\n");
+ return ret;
+ }
+
+ if ((chip_id & RT4831_VID_MASK) != RICHTEK_VENDOR_ID) {
+ dev_err(>dev, "Chip vendor ID 0x%02x not matched\n",
chip_id);
+ return -ENODEV;
+ }
+
+ /*
+* Used to prevent the abnormal shutdown.
+* If SCL/SDA both keep low for one second to reset HW.
+*/
+ ret = regmap_update_bits(regmap, RT4831_REG_I2CPROT,
Re: [PATCH 6/9] drm/tegra: gem: Add a clarifying comment
26.03.2021 19:37, Thierry Reding пишет: > On Wed, Mar 24, 2021 at 07:50:01PM +0300, Dmitry Osipenko wrote: >> 24.03.2021 19:42, Thierry Reding пишет: >>> On Wed, Mar 24, 2021 at 06:45:30PM +0300, Dmitry Osipenko wrote: 24.03.2021 18:02, Thierry Reding пишет: > On Wed, Mar 24, 2021 at 05:41:08PM +0300, Dmitry Osipenko wrote: >> 23.03.2021 18:54, Thierry Reding пишет: >>> From: Thierry Reding >>> >>> Clarify when a fixed IOV address can be used and when a buffer has to >>> be mapped before the IOVA can be used. >>> >>> Signed-off-by: Thierry Reding >>> --- >>> drivers/gpu/drm/tegra/plane.c | 8 >>> 1 file changed, 8 insertions(+) >>> >>> diff --git a/drivers/gpu/drm/tegra/plane.c >>> b/drivers/gpu/drm/tegra/plane.c >>> index 19e8847a164b..793da5d675d2 100644 >>> --- a/drivers/gpu/drm/tegra/plane.c >>> +++ b/drivers/gpu/drm/tegra/plane.c >>> @@ -119,6 +119,14 @@ static int tegra_dc_pin(struct tegra_dc *dc, >>> struct tegra_plane_state *state) >>> dma_addr_t phys_addr, *phys; >>> struct sg_table *sgt; >>> >>> + /* >>> +* If we're not attached to a domain, we already stored >>> the >>> +* physical address when the buffer was allocated. If >>> we're >>> +* part of a group that's shared between all display >>> +* controllers, we've also already mapped the >>> framebuffer >>> +* through the SMMU. In both cases we can short-circuit >>> the >>> +* code below and retrieve the stored IOV address. >>> +*/ >>> if (!domain || dc->client.group) >>> phys = _addr; >>> else >>> >> >> This comment is correct, but the logic feels a bit lame because it >> should be wasteful to re-map DMA on each FB flip. Personally I don't >> care much about this since older Tegras use pinned buffers by default, >> but this shouldn't be good for T124+ users. > > I'm not terribly thrilled by this either, but it's the only way to do > this when using the DMA API because we don't know at allocation time (or > import time for that matter) which of the (up to) 4 display controllers > a framebuffer will be shown on. tegra_dc_pin() is the earliest where > this is known and worst case that's called once per flip. > > When the IOMMU API is used explicitly, we always map framebuffers into > the IOMMU domain shared by all display controllers at allocation or > import time and then we don't need to pin at flip time anymore. > > I do have a work-in-progress patch somewhere that creates a mapping > cache to mitigate this problem to some degree. I need to dig that up and > do a few measurements because I vaguely recall this speeding up flips by > quite a bit (well, except for the very first mapping, obviously). > >> Perhaps dumb buffers should be pinned to display by default and then we >> should extend the Tegra UAPI to support BO mapping to display client(?). > > That would kind of defeat the purpose of a generic KMS UAPI. Couldn't the BOs be mapped when FB is created, i.e. by tegra_fb_create? >>> >>> I suppose that would be possible. However, tegra_fb_create() doesn't >>> know a thing about display controllers, so we'd have to add extra code >>> to it to iterate over all display controllers and do a dma_map_sg() of >>> the GEM object for each of them. >>> >>> It's also somewhat wasteful because now we get a mapping for each >>> framebuffer for each display controller. So if you've got, say, a four >>> UHD screen setup (which is something that Tegra194 supports), you could >>> end up with 8 UHD framebuffers (two for each display, for double- >>> buffering) at 32 MiB each for a whopping 256 MiB of memory that needs to >>> be mapped for each of the four display controllers. That 1 GiB worth of >>> page table updates, whereas you really only need one fourth of that. >>> >>> Granted, this will make flipping a bit faster, and IOVA space isn't >>> really a problem on Tegra194. It would still waste a bit of RAM for all >>> those page table entries that we don't really need, though. >>> >>> A mapping cache seems like a much better compromise because the cache >>> lookup should be quite fast compared to a mapping operation and we waste >>> just a couple dozen bytes per mapping perhaps as opposed to a few >>> megabytes for the gratuitous, preemptive mappings. >> >> Isn't it really possible to put displays into the same IOMMU group on >> T194? It doesn't make much sense to have them in a separate groups on Linux. > > It is possible and in fact that's what's already happening. However, the > problem isn't that these devices are not in the same group, the problem > is that the
[Bug 201957] amdgpu: ring gfx timeout
https://bugzilla.kernel.org/show_bug.cgi?id=201957 Csaba Tímár (csaba.tima...@gmail.com) changed: What|Removed |Added CC||csaba.tima...@gmail.com --- Comment #47 from Csaba Tímár (csaba.tima...@gmail.com) --- I have something very similar with my Vega56. I can reproduce it with Win10 too. I think it's an AMD Hw issue. march 28 15:07:35 PC-home kernel: [drm:amdgpu_dm_atomic_commit_tail [amdgpu]] *ERROR* Waiting for fences timed out! march 28 15:07:35 PC-home kernel: qcm fence wait loop timeout expired march 28 15:07:35 PC-home kernel: The cp might be in an unrecoverable state due to an unsuccessful queues preemption march 28 15:07:35 PC-home kernel: amdgpu: Failed to evict process queues march 28 15:07:35 PC-home kernel: amdgpu :0a:00.0: amdgpu: GPU reset begin! march 28 15:07:35 PC-home kernel: amdgpu: Failed to quiesce KFD march 28 15:07:35 PC-home kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx timeout, signaled seq=567492, emitted seq=567494 march 28 15:07:35 PC-home kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR* Process information: process vkcube pid 7677 thread vkcube pid 7677 march 28 15:07:35 PC-home kernel: amdgpu :0a:00.0: amdgpu: GPU reset begin! march 28 15:07:35 PC-home kernel: amdgpu :0a:00.0: amdgpu: Bailing on TDR for s_job:869c2, as another already in progress march 28 15:07:36 PC-home kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring page1 timeout, signaled seq=20352, emitted seq=20353 march 28 15:07:36 PC-home kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR* Process information: process pid 0 thread pid 0 march 28 15:07:36 PC-home kernel: amdgpu :0a:00.0: amdgpu: GPU reset begin! march 28 15:07:36 PC-home kernel: amdgpu :0a:00.0: amdgpu: Bailing on TDR for s_job:4f80, as another already in progress march 28 15:07:39 PC-home kernel: amdgpu :0a:00.0: amdgpu: failed to suspend display audio march 28 15:07:39 PC-home kernel: BUG: unable to handle page fault for address: a9c54bb4f910 march 28 15:07:39 PC-home kernel: #PF: supervisor write access in kernel mode march 28 15:07:39 PC-home kernel: #PF: error_code(0x0002) - not-present page march 28 15:07:39 PC-home kernel: PGD 10067 P4D 10067 PUD 1001b9067 PMD 1cdabb067 PTE 0 march 28 15:07:39 PC-home kernel: Oops: 0002 [#1] PREEMPT SMP NOPTI march 28 15:07:39 PC-home kernel: CPU: 9 PID: 8586 Comm: kworker/9:0 Tainted: G OE 5.11.6-1-MANJARO #1 march 28 15:07:39 PC-home kernel: Hardware name: System manufacturer System Product Name/PRIME A320M-K, BIOS 5603 10/14/2020 march 28 15:07:39 PC-home kernel: Workqueue: events kfd_process_hw_exception [amdgpu] march 28 15:07:39 PC-home kernel: RIP: 0010:amdgpu_device_lock_adev+0x2b/0x83 [amdgpu] march 28 15:07:39 PC-home kernel: Code: 1f 44 00 00 31 c0 ba 01 00 00 00 f0 0f b1 97 f4 77 01 00 45 31 c0 85 c0 75 64 53 48 89 fb 48 8d bf 00 78 01 00 e8 e7 16 27 c9 ff 83 40 > march 28 15:07:39 PC-home kernel: RSP: 0018:a9c54c73be00 EFLAGS: 00010246 march 28 15:07:39 PC-home kernel: RAX: 951f0c155dc0 RBX: a9c54bb495d0 RCX: 0001 march 28 15:07:39 PC-home kernel: RDX: 0001 RSI: RDI: a9c54bb60dd0 march 28 15:07:39 PC-home kernel: RBP: R08: R09: march 28 15:07:39 PC-home kernel: R10: 0003 R11: R12: a9c54bb495d0 march 28 15:07:39 PC-home kernel: R13: 951e1916 R14: 951e19170e30 R15: 00e0 march 28 15:07:39 PC-home kernel: FS: () GS:95210ea4() knlGS: march 28 15:07:39 PC-home kernel: CS: 0010 DS: ES: CR0: 80050033 march 28 15:07:39 PC-home kernel: CR2: a9c54bb4f910 CR3: 00038541 CR4: 003506e0 march 28 15:07:39 PC-home kernel: Call Trace: march 28 15:07:39 PC-home kernel: amdgpu_device_gpu_recover.cold+0x180/0x95d [amdgpu] march 28 15:07:39 PC-home kernel: ? amdgpu_device_doorbell_init.part.0+0x71/0xc0 [amdgpu] march 28 15:07:39 PC-home kernel: process_one_work+0x214/0x3e0 march 28 15:07:39 PC-home kernel: worker_thread+0x4d/0x3d0 march 28 15:07:39 PC-home kernel: ? rescuer_thread+0x3c0/0x3c0 march 28 15:07:39 PC-home kernel: kthread+0x142/0x160 march 28 15:07:39 PC-home kernel: ? __kthread_bind_mask+0x60/0x60 march 28 15:07:39 PC-home kernel: ret_from_fork+0x22/0x30 march 28 15:07:39 PC-home kernel: Modules linked in: rfcomm cmac algif_hash algif_skcipher af_alg bnep btusb btrtl btbcm btintel bluetooth ecdh_generic ecc uas usb_storage mousedev> march 28 15:07:39 PC-home kernel: gpio_amdpt acpi_cpufreq drm uinput sg fuse crypto_user agpgart ip_tables x_tables ext4 crc32c_generic crc16 mbcache jbd2 crc32c_intel xhci_pci march 28 15:07:39 PC-home kernel: CR2: a9c54bb4f910 march 28 15:07:39 PC-home kernel: ---[ end trace
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #10 from Vyacheslav Dikonov (sdico...@mail.ru) --- Excuse me for mistypes in the attachment notes. DDC works ONLY with dc=0 and hw_i2c=0. Everything else leads to errors, Each file contains a correct description. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #9 from Vyacheslav Dikonov (sdico...@mail.ru) --- Created attachment 296111 --> https://bugzilla.kernel.org/attachment.cgi?id=296111=edit Reference logs from a different computer attached to the same display -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #8 from Vyacheslav Dikonov (sdico...@mail.ru) --- Comment on attachment 296109 --> https://bugzilla.kernel.org/attachment.cgi?id=296109 dc=0, hw_i2c=1, DDC works no sound DDC FAILS -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #7 from Vyacheslav Dikonov (sdico...@mail.ru) --- Created attachment 296109 --> https://bugzilla.kernel.org/attachment.cgi?id=296109=edit dc=0, hw_i2c=1, DDC works no sound -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #6 from Vyacheslav Dikonov (sdico...@mail.ru) --- Comment on attachment 296107 --> https://bugzilla.kernel.org/attachment.cgi?id=296107 dc=0, hw_i2c=1, DDC fails Sorry, misprint. dc=1, hw_i2c=1, DDC fails -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #5 from Vyacheslav Dikonov (sdico...@mail.ru) --- Created attachment 296107 --> https://bugzilla.kernel.org/attachment.cgi?id=296107=edit dc=0, hw_i2c=1, DDC fails -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #4 from Vyacheslav Dikonov (sdico...@mail.ru) --- Created attachment 296105 --> https://bugzilla.kernel.org/attachment.cgi?id=296105=edit dc=1, hw_i2c=0, DDC fails -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #3 from Vyacheslav Dikonov (sdico...@mail.ru) --- Created attachment 296103 --> https://bugzilla.kernel.org/attachment.cgi?id=296103=edit dc=0, hw_i2c=0, DDC works no sound -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[Bug 212449] DDC requires amdgpu.dc=0, HDMI sound requires amdgpu.dc=1. Make them work together!
https://bugzilla.kernel.org/show_bug.cgi?id=212449 --- Comment #2 from Vyacheslav Dikonov (sdico...@mail.ru) --- I doubt that. Please, see my ddccontrol logs with different settings. It shows that ddccontrol cannot access the controls unless the options are set as dc=0, hw_itc=0. All logs are taken under root and with POSIX locale. I also add a reference log drom a different machine attached to the same display. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug. ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
