[RFC 1/2] drm/doc/rfc: VM_BIND feature design document
VM_BIND design document with description of intended use cases. Signed-off-by: Niranjana Vishwanathapura --- Documentation/gpu/rfc/i915_vm_bind.rst | 126 + Documentation/gpu/rfc/index.rst| 4 + 2 files changed, 130 insertions(+) create mode 100644 Documentation/gpu/rfc/i915_vm_bind.rst diff --git a/Documentation/gpu/rfc/i915_vm_bind.rst b/Documentation/gpu/rfc/i915_vm_bind.rst new file mode 100644 index ..dbc35262a554 --- /dev/null +++ b/Documentation/gpu/rfc/i915_vm_bind.rst @@ -0,0 +1,126 @@ +== +I915 VM_BIND feature design and use cases +== + +VM_BIND feature + +DRM_I915_GEM_VM_BIND/UNBIND ioctls allows UMD to bind/unbind GEM buffer +objects (BOs) or sections of a BOs at specified GPU virtual addresses on +a specified address space (VM). + +These mappings (also referred to as persistent mappings) will be persistent +across multiple GPU submissions (execbuff) issued by the UMD, making execbuff +path leaner with fast path submission latency of O(1) w.r.t the number of +objects required for that submission. + +UMDs can still send BOs of these persistent mappings in execlist of execbuff +for specifying BO dependencies (implicit fencing) and to use BO as a batch. + +The persistent mappings are not individually tracked, instead the address +space (VM) they are mapped in is tracked to determine if the mappings are +being referred by GPU job (active) or not. + +VM_BIND features include: +- Different VA mappings can map to the same physical pages of an object + (aliasing). +- VA mapping can map to a partial section of the BO (partial binding). +- Support capture of mapping in the dump upon GPU error. +- TLB is flushed upon unbind completion. +- Asynchronous vm_bind and vm_unbind support. +- VM_BIND uses user/memory fence mechanism (explained below) for signaling + bind completion. + + +User/Memory Fence +== +The idea is to take a user process virtual address and install an interrupt +handler to wake up the current task when the memory location passes the user +supplied filter. + +It also allows the user to emit their own MI_FLUSH/PIPE_CONTROL notify +interrupt within their batches after updating the value on the GPU to +have sub-batch precision on the wakeup. + +User/Memory fence can also be supplied to the +kernel driver to signal/wake up the user process after completion of an +asynchronous operation. + +This feature will be derived from the below original work: +https://patchwork.freedesktop.org/patch/349417/ + +When VM_BIND ioctl was provided with a user/memory fence via SYNC_FENCE +extension, it will be signaled upon the completion of binding of that +mapping. All async binds/unbinds are serialized, hence signaling of +user/memory fence also indicate the completion of all previous binds/unbinds. + + +TODOs +== +- Rebase VM_BIND on top of ongoing i915 TTM adoption changes including + eviction support. +- Various optimizations like around LRU ordering of persistent mappings, + batching of TLB flushes etc. + + +Intended use cases +=== + +Debugger +- +With debug event interface user space process (debugger) is able to keep track +of and act upon resources created by another process (debuggee) and attached +to GPU via vm_bind interface. + +Mesa/Valkun + +VM_BIND can potentially reduce the CPU-overhead in Mesa thus improving +performance. For Vulkan it should be straightforward to use VM_BIND. +For Iris implicit buffer tracking must be implemented before we can harness +VM_BIND benefits. With increasing GPU hardware performance reducing CPU +overhead becomes more important. + +Page level hints settings +-- +VM_BIND allows any hints setting per mapping instead of per BO. +Possible hints include read-only, placement and atomicity. +Sub-BO level placement hint will be even more relevant with +upcoming GPU on-demand page fault support. + +Page level Cache/CLOS settings +--- +VM_BIND allows cache/CLOS settings per mapping instead of per BO. + +Compute + +Usage of dma-fence expects that they complete in reasonable amount of time. +Compute on the other hand can be long running. Hence it is appropriate for +compute to use user/memory fence (explained above) and dma-fence usage will +be limited to in kernel consumption only. Compute must opt-in for this +mechanism during context creation time with a 'compute_ctx' flag. + +Where GPU page faults are not available, kernel driver upon buffer invalidation +must initiate a compute context suspend with a dma-fence attached to it. +And upon completion of that suspend fence, finish the invalidation and then +resume the compute context. + +This is much easier to support with VM_BIND instead of the current heavier +execbuff path resource attachment. + +Low Latency Submission +--- +Allow compute
[RFC 0/2] drm/doc/rfc: i915 VM_BIND feature design + uapi
This is the i915 driver VM_BIND feature design RFC patch series along with the required uapi definition and description of intended use cases. Signed-off-by: Niranjana Vishwanathapura Niranjana Vishwanathapura (2): drm/doc/rfc: VM_BIND feature design document drm/doc/rfc: VM_BIND uapi definition Documentation/gpu/rfc/i915_vm_bind.h | 113 + Documentation/gpu/rfc/i915_vm_bind.rst | 132 + Documentation/gpu/rfc/index.rst| 4 + 3 files changed, 249 insertions(+) create mode 100644 Documentation/gpu/rfc/i915_vm_bind.h create mode 100644 Documentation/gpu/rfc/i915_vm_bind.rst -- 2.21.0.rc0.32.g243a4c7e27
[RFC 2/2] drm/doc/rfc: VM_BIND uapi definition
VM_BIND and GEM_WAIT_USER_FENCE uapi document
Signed-off-by: Niranjana Vishwanathapura
---
Documentation/gpu/rfc/i915_vm_bind.h | 113 +
Documentation/gpu/rfc/i915_vm_bind.rst | 6 ++
2 files changed, 119 insertions(+)
create mode 100644 Documentation/gpu/rfc/i915_vm_bind.h
diff --git a/Documentation/gpu/rfc/i915_vm_bind.h
b/Documentation/gpu/rfc/i915_vm_bind.h
new file mode 100644
index ..3aaf66e62aa0
--- /dev/null
+++ b/Documentation/gpu/rfc/i915_vm_bind.h
@@ -0,0 +1,113 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+/* VM_BIND feature availability through drm_i915_getparam */
+#define I915_PARAM_HAS_VM_BIND 59
+
+/**
+ * struct drm_i915_gem_vm_bind - VA to object/buffer mapping to [un]bind.
+ */
+struct drm_i915_gem_vm_bind {
+ /** vm to [un]bind **/
+ __u32 vm_id;
+
+ /** BO handle or file descriptor. 'fd' to -1 for system pages (SVM) **/
+ union {
+ __u32 handle;
+ __s32 fd;
+ }
+
+ /** VA start to [un]bind **/
+ __u64 start;
+
+ /** Offset in object to [un]bind **/
+ __u64 offset;
+
+ /** VA length to [un]bind **/
+ __u64 length;
+
+ /** Flags **/
+ __u64 flags;
+ /** Bind the mapping immediately instead of during next submission */
+#define I915_GEM_VM_BIND_IMMEDIATE (1 << 0)
+ /** Read-only mapping */
+#define I915_GEM_VM_BIND_READONLY(1 << 1)
+ /** Capture this mapping in the dump upon GPU error */
+#define I915_GEM_VM_BIND_CAPTURE (1 << 2)
+
+ /**
+* Zero-terminated chain of extensions.
+*
+* No current extensions defined; mbz.
+*/
+ __u64 extensions;
+};
+
+/**
+ * struct drm_i915_vm_bind_ext_sync_fence - Bind completion signaling
extension.
+ */
+struct drm_i915_vm_bind_ext_sync_fence {
+#define I915_VM_BIND_EXT_SYNC_FENCE 0
+ /** @base: Extension link. See struct i915_user_extension. */
+ struct i915_user_extension base;
+
+ /** User/Memory fence address */
+ __u64 addr;
+
+ /** User/Memory fence value to be written after bind completion */
+ __u64 val;
+};
+
+/**
+ * struct drm_i915_gem_wait_user_fence
+ *
+ * Wait on user/memory fence. User/Memory fence can be woken up either by,
+ *1. GPU context indicated by 'ctx_id', or,
+ *2. Kerrnel driver async worker upon I915_UFENCE_WAIT_SOFT.
+ * 'ctx_id' is ignored when this flag is set.
+ *
+ * Wakeup when below condition is true.
+ * (*addr & MASK) OP (VALUE & MASK)
+ *
+ */
+struct drm_i915_gem_wait_user_fence {
+ /** @base: Extension link. See struct i915_user_extension. */
+ __u64 extensions;
+
+ /** User/Memory fence address */
+ __u64 addr;
+
+ /** Id of the Context which will signal the fence. */
+ __u32 ctx_id;
+
+ /** Wakeup condition operator */
+ __u16 op;
+#define I915_UFENCE_WAIT_EQ 0
+#define I915_UFENCE_WAIT_NEQ 1
+#define I915_UFENCE_WAIT_GT 2
+#define I915_UFENCE_WAIT_GTE 3
+#define I915_UFENCE_WAIT_LT 4
+#define I915_UFENCE_WAIT_LTE 5
+#define I915_UFENCE_WAIT_BEFORE 6
+#define I915_UFENCE_WAIT_AFTER 7
+
+ /** Flags */
+ __u16 flags;
+#define I915_UFENCE_WAIT_SOFT0x1
+#define I915_UFENCE_WAIT_ABSTIME 0x2
+
+ /** Wakeup value */
+ __u64 value;
+
+ /** Wakeup mask */
+ __u64 mask;
+#define I915_UFENCE_WAIT_U8 0xffu
+#define I915_UFENCE_WAIT_U160xu
+#define I915_UFENCE_WAIT_U320xul
+#define I915_UFENCE_WAIT_U640xull
+
+ /** Timeout */
+ __s64 timeout;
+};
diff --git a/Documentation/gpu/rfc/i915_vm_bind.rst
b/Documentation/gpu/rfc/i915_vm_bind.rst
index dbc35262a554..dc843e32a1cd 100644
--- a/Documentation/gpu/rfc/i915_vm_bind.rst
+++ b/Documentation/gpu/rfc/i915_vm_bind.rst
@@ -117,6 +117,12 @@ VM_BIND interface can be used to map system memory
directly (without gem BO
abstraction) using the HMM interface.
+UAPI
+=
+Uapi definiton can be found here:
+.. kernel-doc:: Documentation/gpu/rfc/i915_vm_bind.h
+
+
Links:
==
- Reference WIP VM_BIND implementation can be found here.
--
2.21.0.rc0.32.g243a4c7e27
[PATCH v4 12/14] vfio/ap, ccw: Fix open/close when multiple device FDs are open
The user can open multiple device FDs if it likes, however these open()
functions call vfio_register_notifier() on some device global
state. Calling vfio_register_notifier() twice in will trigger a WARN_ON
from notifier_chain_register() and the first close will wrongly delete the
notifier and more.
Since these really want the new open/close_device() semantics just change
the functions over.
Reviewed-by: Cornelia Huck
Signed-off-by: Jason Gunthorpe
---
drivers/s390/cio/vfio_ccw_ops.c | 8
drivers/s390/crypto/vfio_ap_ops.c | 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/s390/cio/vfio_ccw_ops.c b/drivers/s390/cio/vfio_ccw_ops.c
index c57d2a7f091975..7f540ad0b568bc 100644
--- a/drivers/s390/cio/vfio_ccw_ops.c
+++ b/drivers/s390/cio/vfio_ccw_ops.c
@@ -159,7 +159,7 @@ static int vfio_ccw_mdev_remove(struct mdev_device *mdev)
return 0;
}
-static int vfio_ccw_mdev_open(struct mdev_device *mdev)
+static int vfio_ccw_mdev_open_device(struct mdev_device *mdev)
{
struct vfio_ccw_private *private =
dev_get_drvdata(mdev_parent_dev(mdev));
@@ -194,7 +194,7 @@ static int vfio_ccw_mdev_open(struct mdev_device *mdev)
return ret;
}
-static void vfio_ccw_mdev_release(struct mdev_device *mdev)
+static void vfio_ccw_mdev_close_device(struct mdev_device *mdev)
{
struct vfio_ccw_private *private =
dev_get_drvdata(mdev_parent_dev(mdev));
@@ -638,8 +638,8 @@ static const struct mdev_parent_ops vfio_ccw_mdev_ops = {
.supported_type_groups = mdev_type_groups,
.create = vfio_ccw_mdev_create,
.remove = vfio_ccw_mdev_remove,
- .open = vfio_ccw_mdev_open,
- .release= vfio_ccw_mdev_release,
+ .open_device= vfio_ccw_mdev_open_device,
+ .close_device = vfio_ccw_mdev_close_device,
.read = vfio_ccw_mdev_read,
.write = vfio_ccw_mdev_write,
.ioctl = vfio_ccw_mdev_ioctl,
diff --git a/drivers/s390/crypto/vfio_ap_ops.c
b/drivers/s390/crypto/vfio_ap_ops.c
index 122c85c224695e..cee5626fe0a4ef 100644
--- a/drivers/s390/crypto/vfio_ap_ops.c
+++ b/drivers/s390/crypto/vfio_ap_ops.c
@@ -1315,7 +1315,7 @@ static int vfio_ap_mdev_reset_queues(struct mdev_device
*mdev)
return rc;
}
-static int vfio_ap_mdev_open(struct mdev_device *mdev)
+static int vfio_ap_mdev_open_device(struct mdev_device *mdev)
{
struct ap_matrix_mdev *matrix_mdev = mdev_get_drvdata(mdev);
unsigned long events;
@@ -1348,7 +1348,7 @@ static int vfio_ap_mdev_open(struct mdev_device *mdev)
return ret;
}
-static void vfio_ap_mdev_release(struct mdev_device *mdev)
+static void vfio_ap_mdev_close_device(struct mdev_device *mdev)
{
struct ap_matrix_mdev *matrix_mdev = mdev_get_drvdata(mdev);
@@ -1427,8 +1427,8 @@ static const struct mdev_parent_ops vfio_ap_matrix_ops = {
.mdev_attr_groups = vfio_ap_mdev_attr_groups,
.create = vfio_ap_mdev_create,
.remove = vfio_ap_mdev_remove,
- .open = vfio_ap_mdev_open,
- .release= vfio_ap_mdev_release,
+ .open_device= vfio_ap_mdev_open_device,
+ .close_device = vfio_ap_mdev_close_device,
.ioctl = vfio_ap_mdev_ioctl,
};
--
2.32.0
[PATCH] drm/rockchip: dsi: make hstt_table static
This symbol is not used outside of dw-mipi-dsi-rockchip.c, so marks
it static.
Fix the following sparse warning:
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c:646:13: warning: symbol
'hstt_table' was not declared. Should it be static?
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index a2262be..12fa3db 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -643,7 +643,7 @@ struct hstt {
}
/* Table A-3 High-Speed Transition Times */
-struct hstt hstt_table[] = {
+static struct hstt hstt_table[] = {
HSTT( 90, 32, 20, 26, 13),
HSTT( 100, 35, 23, 28, 14),
HSTT( 110, 32, 22, 26, 13),
--
1.8.3.1
[PATCH v2] drm/drv: Remove initialization of static variables
Address the following checkpatch errors:
ERROR: do not initialise statics to false
FILE: :drivers/gpu/drm/msm/msm_drv.c:21:
-static bool reglog = false;
FILE: :drivers/gpu/drm/msm/msm_drv.c:31:
-bool dumpstate = false;
Signed-off-by: zhaoxiao
---
v2: change the patch description
drivers/gpu/drm/msm/msm_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 9b8fa2ad0d84..d9ca4bc9620b 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -59,7 +59,7 @@ static const struct drm_mode_config_helper_funcs
mode_config_helper_funcs = {
};
#ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
-static bool reglog = false;
+static bool reglog;
MODULE_PARM_DESC(reglog, "Enable register read/write logging");
module_param(reglog, bool, 0600);
#else
@@ -76,7 +76,7 @@ static char *vram = "16m";
MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without
IOMMU/GPUMMU)");
module_param(vram, charp, 0);
-bool dumpstate = false;
+bool dumpstate;
MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
module_param(dumpstate, bool, 0600);
--
2.20.1
[PATCH v4 13/14] vfio/gvt: Fix open/close when multiple device FDs are open
The user can open multiple device FDs if it likes, however the open
function calls vfio_register_notifier() on device global state. Calling
vfio_register_notifier() twice will trigger a WARN_ON from
notifier_chain_register() and the first close will wrongly delete the
notifier and more.
Since these really want the new open/close_device() semantics just change
the function over.
Reviewed-by: Zhenyu Wang
Reviewed-by: Cornelia Huck
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
drivers/gpu/drm/i915/gvt/kvmgt.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index 1ac98f8aba31e6..7efa386449d104 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -885,7 +885,7 @@ static int intel_vgpu_group_notifier(struct notifier_block
*nb,
return NOTIFY_OK;
}
-static int intel_vgpu_open(struct mdev_device *mdev)
+static int intel_vgpu_open_device(struct mdev_device *mdev)
{
struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
struct kvmgt_vdev *vdev = kvmgt_vdev(vgpu);
@@ -1004,7 +1004,7 @@ static void __intel_vgpu_release(struct intel_vgpu *vgpu)
vgpu->handle = 0;
}
-static void intel_vgpu_release(struct mdev_device *mdev)
+static void intel_vgpu_close_device(struct mdev_device *mdev)
{
struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
@@ -1753,8 +1753,8 @@ static struct mdev_parent_ops intel_vgpu_ops = {
.create = intel_vgpu_create,
.remove = intel_vgpu_remove,
- .open = intel_vgpu_open,
- .release= intel_vgpu_release,
+ .open_device= intel_vgpu_open_device,
+ .close_device = intel_vgpu_close_device,
.read = intel_vgpu_read,
.write = intel_vgpu_write,
--
2.32.0
[PATCH v4 01/14] vfio/samples: Remove module get/put
The patch to move the get/put to core and the patch to convert the samples
to use vfio_device crossed in a way that this was missed. When both
patches are together the samples do not need their own get/put.
Fixes: 437e41368c01 ("vfio/mdpy: Convert to use vfio_register_group_dev()")
Fixes: 681c1615f891 ("vfio/mbochs: Convert to use vfio_register_group_dev()")
Reviewed-by: Cornelia Huck
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
samples/vfio-mdev/mbochs.c | 4
samples/vfio-mdev/mdpy.c | 4
2 files changed, 8 deletions(-)
diff --git a/samples/vfio-mdev/mbochs.c b/samples/vfio-mdev/mbochs.c
index 6c0f229db36a1a..e81b875b4d87b4 100644
--- a/samples/vfio-mdev/mbochs.c
+++ b/samples/vfio-mdev/mbochs.c
@@ -1274,9 +1274,6 @@ static long mbochs_ioctl(struct vfio_device *vdev,
unsigned int cmd,
static int mbochs_open(struct vfio_device *vdev)
{
- if (!try_module_get(THIS_MODULE))
- return -ENODEV;
-
return 0;
}
@@ -1300,7 +1297,6 @@ static void mbochs_close(struct vfio_device *vdev)
mbochs_put_pages(mdev_state);
mutex_unlock(_state->ops_lock);
- module_put(THIS_MODULE);
}
static ssize_t
diff --git a/samples/vfio-mdev/mdpy.c b/samples/vfio-mdev/mdpy.c
index 393c9df6f6a010..a7d4ed28d66411 100644
--- a/samples/vfio-mdev/mdpy.c
+++ b/samples/vfio-mdev/mdpy.c
@@ -611,15 +611,11 @@ static long mdpy_ioctl(struct vfio_device *vdev, unsigned
int cmd,
static int mdpy_open(struct vfio_device *vdev)
{
- if (!try_module_get(THIS_MODULE))
- return -ENODEV;
-
return 0;
}
static void mdpy_close(struct vfio_device *vdev)
{
- module_put(THIS_MODULE);
}
static ssize_t
--
2.32.0
[PATCH v4 07/14] vfio/platform: Use open_device() instead of open coding a refcnt scheme
Platform simply wants to run some code when the device is first
opened/last closed. Use the core framework and locking for this. Aside
from removing a bit of code this narrows the locking scope from a global
lock.
Reviewed-by: Cornelia Huck
Reviewed-by: Eric Auger
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
Signed-off-by: Yishai Hadas
---
drivers/vfio/platform/vfio_platform_common.c | 95 ---
drivers/vfio/platform/vfio_platform_private.h | 1 -
2 files changed, 40 insertions(+), 56 deletions(-)
diff --git a/drivers/vfio/platform/vfio_platform_common.c
b/drivers/vfio/platform/vfio_platform_common.c
index bdde8605178cd2..6af7ce7d619c25 100644
--- a/drivers/vfio/platform/vfio_platform_common.c
+++ b/drivers/vfio/platform/vfio_platform_common.c
@@ -218,65 +218,52 @@ static int vfio_platform_call_reset(struct
vfio_platform_device *vdev,
return -EINVAL;
}
-static void vfio_platform_release(struct vfio_device *core_vdev)
-{
- struct vfio_platform_device *vdev =
- container_of(core_vdev, struct vfio_platform_device, vdev);
-
- mutex_lock(_lock);
-
- if (!(--vdev->refcnt)) {
- const char *extra_dbg = NULL;
- int ret;
-
- ret = vfio_platform_call_reset(vdev, _dbg);
- if (ret && vdev->reset_required) {
- dev_warn(vdev->device, "reset driver is required and
reset call failed in release (%d) %s\n",
-ret, extra_dbg ? extra_dbg : "");
- WARN_ON(1);
- }
- pm_runtime_put(vdev->device);
- vfio_platform_regions_cleanup(vdev);
- vfio_platform_irq_cleanup(vdev);
- }
-
- mutex_unlock(_lock);
-}
-
-static int vfio_platform_open(struct vfio_device *core_vdev)
+static void vfio_platform_close_device(struct vfio_device *core_vdev)
{
struct vfio_platform_device *vdev =
container_of(core_vdev, struct vfio_platform_device, vdev);
+ const char *extra_dbg = NULL;
int ret;
- mutex_lock(_lock);
-
- if (!vdev->refcnt) {
- const char *extra_dbg = NULL;
-
- ret = vfio_platform_regions_init(vdev);
- if (ret)
- goto err_reg;
-
- ret = vfio_platform_irq_init(vdev);
- if (ret)
- goto err_irq;
-
- ret = pm_runtime_get_sync(vdev->device);
- if (ret < 0)
- goto err_rst;
-
- ret = vfio_platform_call_reset(vdev, _dbg);
- if (ret && vdev->reset_required) {
- dev_warn(vdev->device, "reset driver is required and
reset call failed in open (%d) %s\n",
-ret, extra_dbg ? extra_dbg : "");
- goto err_rst;
- }
+ ret = vfio_platform_call_reset(vdev, _dbg);
+ if (WARN_ON(ret && vdev->reset_required)) {
+ dev_warn(
+ vdev->device,
+ "reset driver is required and reset call failed in
release (%d) %s\n",
+ ret, extra_dbg ? extra_dbg : "");
}
+ pm_runtime_put(vdev->device);
+ vfio_platform_regions_cleanup(vdev);
+ vfio_platform_irq_cleanup(vdev);
+}
- vdev->refcnt++;
+static int vfio_platform_open_device(struct vfio_device *core_vdev)
+{
+ struct vfio_platform_device *vdev =
+ container_of(core_vdev, struct vfio_platform_device, vdev);
+ const char *extra_dbg = NULL;
+ int ret;
- mutex_unlock(_lock);
+ ret = vfio_platform_regions_init(vdev);
+ if (ret)
+ return ret;
+
+ ret = vfio_platform_irq_init(vdev);
+ if (ret)
+ goto err_irq;
+
+ ret = pm_runtime_get_sync(vdev->device);
+ if (ret < 0)
+ goto err_rst;
+
+ ret = vfio_platform_call_reset(vdev, _dbg);
+ if (ret && vdev->reset_required) {
+ dev_warn(
+ vdev->device,
+ "reset driver is required and reset call failed in open
(%d) %s\n",
+ ret, extra_dbg ? extra_dbg : "");
+ goto err_rst;
+ }
return 0;
err_rst:
@@ -284,8 +271,6 @@ static int vfio_platform_open(struct vfio_device *core_vdev)
vfio_platform_irq_cleanup(vdev);
err_irq:
vfio_platform_regions_cleanup(vdev);
-err_reg:
- mutex_unlock(_lock);
return ret;
}
@@ -616,8 +601,8 @@ static int vfio_platform_mmap(struct vfio_device
*core_vdev, struct vm_area_stru
static const struct vfio_device_ops vfio_platform_ops = {
.name = "vfio-platform",
- .open = vfio_platform_open,
- .release= vfio_platform_release,
+ .open_device= vfio_platform_open_device,
+ .close_device =
[PATCH v4 05/14] vfio/samples: Delete useless open/close
The core code no longer requires these ops to be defined, so delete these
empty functions and leave the op as NULL. mtty's functions only log a
pointless message, delete that entirely.
Signed-off-by: Yishai Hadas
Reviewed-by: Cornelia Huck
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
samples/vfio-mdev/mbochs.c | 6 --
samples/vfio-mdev/mdpy.c | 11 ---
samples/vfio-mdev/mtty.c | 13 -
3 files changed, 30 deletions(-)
diff --git a/samples/vfio-mdev/mbochs.c b/samples/vfio-mdev/mbochs.c
index 0f1511849b7c3c..7b2e12fe70827c 100644
--- a/samples/vfio-mdev/mbochs.c
+++ b/samples/vfio-mdev/mbochs.c
@@ -1278,11 +1278,6 @@ static long mbochs_ioctl(struct vfio_device *vdev,
unsigned int cmd,
return -ENOTTY;
}
-static int mbochs_open(struct vfio_device *vdev)
-{
- return 0;
-}
-
static void mbochs_close(struct vfio_device *vdev)
{
struct mdev_state *mdev_state =
@@ -1401,7 +1396,6 @@ static struct attribute_group *mdev_type_groups[] = {
};
static const struct vfio_device_ops mbochs_dev_ops = {
- .open = mbochs_open,
.release = mbochs_close,
.read = mbochs_read,
.write = mbochs_write,
diff --git a/samples/vfio-mdev/mdpy.c b/samples/vfio-mdev/mdpy.c
index 57334034cde6dd..8d1a80a0722aa9 100644
--- a/samples/vfio-mdev/mdpy.c
+++ b/samples/vfio-mdev/mdpy.c
@@ -614,15 +614,6 @@ static long mdpy_ioctl(struct vfio_device *vdev, unsigned
int cmd,
return -ENOTTY;
}
-static int mdpy_open(struct vfio_device *vdev)
-{
- return 0;
-}
-
-static void mdpy_close(struct vfio_device *vdev)
-{
-}
-
static ssize_t
resolution_show(struct device *dev, struct device_attribute *attr,
char *buf)
@@ -717,8 +708,6 @@ static struct attribute_group *mdev_type_groups[] = {
};
static const struct vfio_device_ops mdpy_dev_ops = {
- .open = mdpy_open,
- .release = mdpy_close,
.read = mdpy_read,
.write = mdpy_write,
.ioctl = mdpy_ioctl,
diff --git a/samples/vfio-mdev/mtty.c b/samples/vfio-mdev/mtty.c
index 37cc9067e1601d..5983cdb16e3d1d 100644
--- a/samples/vfio-mdev/mtty.c
+++ b/samples/vfio-mdev/mtty.c
@@ -1207,17 +1207,6 @@ static long mtty_ioctl(struct vfio_device *vdev,
unsigned int cmd,
return -ENOTTY;
}
-static int mtty_open(struct vfio_device *vdev)
-{
- pr_info("%s\n", __func__);
- return 0;
-}
-
-static void mtty_close(struct vfio_device *mdev)
-{
- pr_info("%s\n", __func__);
-}
-
static ssize_t
sample_mtty_dev_show(struct device *dev, struct device_attribute *attr,
char *buf)
@@ -1325,8 +1314,6 @@ static struct attribute_group *mdev_type_groups[] = {
static const struct vfio_device_ops mtty_dev_ops = {
.name = "vfio-mtty",
- .open = mtty_open,
- .release = mtty_close,
.read = mtty_read,
.write = mtty_write,
.ioctl = mtty_ioctl,
--
2.32.0
[PATCH v4 06/14] vfio/fsl: Move to the device set infrastructure
FSL uses the internal reflck to implement the open_device() functionality,
conversion to the core code is straightforward.
The decision on which set to be part of is trivially based on the
is_fsl_mc_bus_dprc() and we use a 'struct device *' pointer as the set_id.
The dev_set lock is protecting the interrupts setup. The FSL MC devices
are using MSIs and only the DPRC device is allocating the MSIs from the
MSI domain. The other devices just take interrupts from a pool. The lock
is protecting the access to this pool.
Signed-off-by: Yishai Hadas
Tested-by: Diana Craciun OSS
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/fsl-mc/vfio_fsl_mc.c | 156 --
drivers/vfio/fsl-mc/vfio_fsl_mc_intr.c| 6 +-
drivers/vfio/fsl-mc/vfio_fsl_mc_private.h | 7 -
3 files changed, 29 insertions(+), 140 deletions(-)
diff --git a/drivers/vfio/fsl-mc/vfio_fsl_mc.c
b/drivers/vfio/fsl-mc/vfio_fsl_mc.c
index 122997c61ba450..0ead91bfa83867 100644
--- a/drivers/vfio/fsl-mc/vfio_fsl_mc.c
+++ b/drivers/vfio/fsl-mc/vfio_fsl_mc.c
@@ -19,81 +19,10 @@
static struct fsl_mc_driver vfio_fsl_mc_driver;
-static DEFINE_MUTEX(reflck_lock);
-
-static void vfio_fsl_mc_reflck_get(struct vfio_fsl_mc_reflck *reflck)
-{
- kref_get(>kref);
-}
-
-static void vfio_fsl_mc_reflck_release(struct kref *kref)
-{
- struct vfio_fsl_mc_reflck *reflck = container_of(kref,
- struct vfio_fsl_mc_reflck,
- kref);
-
- mutex_destroy(>lock);
- kfree(reflck);
- mutex_unlock(_lock);
-}
-
-static void vfio_fsl_mc_reflck_put(struct vfio_fsl_mc_reflck *reflck)
-{
- kref_put_mutex(>kref, vfio_fsl_mc_reflck_release, _lock);
-}
-
-static struct vfio_fsl_mc_reflck *vfio_fsl_mc_reflck_alloc(void)
-{
- struct vfio_fsl_mc_reflck *reflck;
-
- reflck = kzalloc(sizeof(*reflck), GFP_KERNEL);
- if (!reflck)
- return ERR_PTR(-ENOMEM);
-
- kref_init(>kref);
- mutex_init(>lock);
-
- return reflck;
-}
-
-static int vfio_fsl_mc_reflck_attach(struct vfio_fsl_mc_device *vdev)
-{
- int ret = 0;
-
- mutex_lock(_lock);
- if (is_fsl_mc_bus_dprc(vdev->mc_dev)) {
- vdev->reflck = vfio_fsl_mc_reflck_alloc();
- ret = PTR_ERR_OR_ZERO(vdev->reflck);
- } else {
- struct device *mc_cont_dev = vdev->mc_dev->dev.parent;
- struct vfio_device *device;
- struct vfio_fsl_mc_device *cont_vdev;
-
- device = vfio_device_get_from_dev(mc_cont_dev);
- if (!device) {
- ret = -ENODEV;
- goto unlock;
- }
-
- cont_vdev =
- container_of(device, struct vfio_fsl_mc_device, vdev);
- if (!cont_vdev || !cont_vdev->reflck) {
- vfio_device_put(device);
- ret = -ENODEV;
- goto unlock;
- }
- vfio_fsl_mc_reflck_get(cont_vdev->reflck);
- vdev->reflck = cont_vdev->reflck;
- vfio_device_put(device);
- }
-
-unlock:
- mutex_unlock(_lock);
- return ret;
-}
-
-static int vfio_fsl_mc_regions_init(struct vfio_fsl_mc_device *vdev)
+static int vfio_fsl_mc_open_device(struct vfio_device *core_vdev)
{
+ struct vfio_fsl_mc_device *vdev =
+ container_of(core_vdev, struct vfio_fsl_mc_device, vdev);
struct fsl_mc_device *mc_dev = vdev->mc_dev;
int count = mc_dev->obj_desc.region_count;
int i;
@@ -136,58 +65,30 @@ static void vfio_fsl_mc_regions_cleanup(struct
vfio_fsl_mc_device *vdev)
kfree(vdev->regions);
}
-static int vfio_fsl_mc_open(struct vfio_device *core_vdev)
-{
- struct vfio_fsl_mc_device *vdev =
- container_of(core_vdev, struct vfio_fsl_mc_device, vdev);
- int ret = 0;
-
- mutex_lock(>reflck->lock);
- if (!vdev->refcnt) {
- ret = vfio_fsl_mc_regions_init(vdev);
- if (ret)
- goto out;
- }
- vdev->refcnt++;
-out:
- mutex_unlock(>reflck->lock);
-
- return ret;
-}
-
-static void vfio_fsl_mc_release(struct vfio_device *core_vdev)
+
+static void vfio_fsl_mc_close_device(struct vfio_device *core_vdev)
{
struct vfio_fsl_mc_device *vdev =
container_of(core_vdev, struct vfio_fsl_mc_device, vdev);
+ struct fsl_mc_device *mc_dev = vdev->mc_dev;
+ struct device *cont_dev = fsl_mc_cont_dev(_dev->dev);
+ struct fsl_mc_device *mc_cont = to_fsl_mc_device(cont_dev);
int ret;
- mutex_lock(>reflck->lock);
+ vfio_fsl_mc_regions_cleanup(vdev);
- if (!(--vdev->refcnt)) {
- struct fsl_mc_device *mc_dev = vdev->mc_dev;
- struct device *cont_dev = fsl_mc_cont_dev(_dev->dev);
- struct
[PATCH v4 14/14] vfio: Remove struct vfio_device_ops open/release
Nothing uses this anymore, delete it.
Signed-off-by: Yishai Hadas
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/mdev/vfio_mdev.c | 22 --
drivers/vfio/vfio.c | 14 +-
include/linux/mdev.h | 7 ---
include/linux/vfio.h | 4
4 files changed, 1 insertion(+), 46 deletions(-)
diff --git a/drivers/vfio/mdev/vfio_mdev.c b/drivers/vfio/mdev/vfio_mdev.c
index e12196ffd48718..7a9883048216e7 100644
--- a/drivers/vfio/mdev/vfio_mdev.c
+++ b/drivers/vfio/mdev/vfio_mdev.c
@@ -37,26 +37,6 @@ static void vfio_mdev_close_device(struct vfio_device
*core_vdev)
parent->ops->close_device(mdev);
}
-static int vfio_mdev_open(struct vfio_device *core_vdev)
-{
- struct mdev_device *mdev = to_mdev_device(core_vdev->dev);
- struct mdev_parent *parent = mdev->type->parent;
-
- if (unlikely(!parent->ops->open))
- return 0;
-
- return parent->ops->open(mdev);
-}
-
-static void vfio_mdev_release(struct vfio_device *core_vdev)
-{
- struct mdev_device *mdev = to_mdev_device(core_vdev->dev);
- struct mdev_parent *parent = mdev->type->parent;
-
- if (likely(parent->ops->release))
- parent->ops->release(mdev);
-}
-
static long vfio_mdev_unlocked_ioctl(struct vfio_device *core_vdev,
unsigned int cmd, unsigned long arg)
{
@@ -122,8 +102,6 @@ static const struct vfio_device_ops vfio_mdev_dev_ops = {
.name = "vfio-mdev",
.open_device= vfio_mdev_open_device,
.close_device = vfio_mdev_close_device,
- .open = vfio_mdev_open,
- .release= vfio_mdev_release,
.ioctl = vfio_mdev_unlocked_ioctl,
.read = vfio_mdev_read,
.write = vfio_mdev_write,
diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c
index 9cc17768c42554..3c034fe14ccb03 100644
--- a/drivers/vfio/vfio.c
+++ b/drivers/vfio/vfio.c
@@ -1470,19 +1470,13 @@ static int vfio_group_get_device_fd(struct vfio_group
*group, char *buf)
}
mutex_unlock(>dev_set->lock);
- if (device->ops->open) {
- ret = device->ops->open(device);
- if (ret)
- goto err_close_device;
- }
-
/*
* We can't use anon_inode_getfd() because we need to modify
* the f_mode flags directly to allow more than just ioctls
*/
fdno = ret = get_unused_fd_flags(O_CLOEXEC);
if (ret < 0)
- goto err_release;
+ goto err_close_device;
filep = anon_inode_getfile("[vfio-device]", _device_fops,
device, O_RDWR);
@@ -1509,9 +1503,6 @@ static int vfio_group_get_device_fd(struct vfio_group
*group, char *buf)
err_fd:
put_unused_fd(fdno);
-err_release:
- if (device->ops->release)
- device->ops->release(device);
err_close_device:
mutex_lock(>dev_set->lock);
if (device->open_count == 1 && device->ops->close_device)
@@ -1659,9 +1650,6 @@ static int vfio_device_fops_release(struct inode *inode,
struct file *filep)
{
struct vfio_device *device = filep->private_data;
- if (device->ops->release)
- device->ops->release(device);
-
mutex_lock(>dev_set->lock);
if (!--device->open_count && device->ops->close_device)
device->ops->close_device(device);
diff --git a/include/linux/mdev.h b/include/linux/mdev.h
index cb5b7ed1d7c30d..68427e8fadebd6 100644
--- a/include/linux/mdev.h
+++ b/include/linux/mdev.h
@@ -72,11 +72,6 @@ struct device *mtype_get_parent_dev(struct mdev_type *mtype);
* @mdev: mdev_device device structure which is being
*destroyed
* Returns integer: success (0) or error (< 0)
- * @open: Open mediated device.
- * @mdev: mediated device.
- * Returns integer: success (0) or error (< 0)
- * @release: release mediated device
- * @mdev: mediated device.
* @read: Read emulation callback
* @mdev: mediated device structure
* @buf: read buffer
@@ -113,8 +108,6 @@ struct mdev_parent_ops {
int (*remove)(struct mdev_device *mdev);
int (*open_device)(struct mdev_device *mdev);
void(*close_device)(struct mdev_device *mdev);
- int (*open)(struct mdev_device *mdev);
- void(*release)(struct mdev_device *mdev);
ssize_t (*read)(struct mdev_device *mdev, char __user *buf,
size_t count, loff_t *ppos);
ssize_t (*write)(struct mdev_device *mdev, const char __user *buf,
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index f0e6a72875e471..b53a9557884ada 100644
--- a/include/linux/vfio.h
+++
[PATCH v4 03/14] vfio: Introduce a vfio_uninit_group_dev() API call
From: Max Gurtovoy
This pairs with vfio_init_group_dev() and allows undoing any state that is
stored in the vfio_device unrelated to registration. Add appropriately
placed calls to all the drivers.
The following patch will use this to add pre-registration state for the
device set.
Signed-off-by: Max Gurtovoy
Reviewed-by: Cornelia Huck
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
Documentation/driver-api/vfio.rst| 4 ++-
drivers/vfio/fsl-mc/vfio_fsl_mc.c| 7 ++---
drivers/vfio/mdev/vfio_mdev.c| 13 +++---
drivers/vfio/pci/vfio_pci.c | 6 +++--
drivers/vfio/platform/vfio_platform_common.c | 7 +++--
drivers/vfio/vfio.c | 5
include/linux/vfio.h | 1 +
samples/vfio-mdev/mbochs.c | 2 ++
samples/vfio-mdev/mdpy.c | 25 ++
samples/vfio-mdev/mtty.c | 27
10 files changed, 64 insertions(+), 33 deletions(-)
diff --git a/Documentation/driver-api/vfio.rst
b/Documentation/driver-api/vfio.rst
index 606eed8823ceab..c663b6f978255b 100644
--- a/Documentation/driver-api/vfio.rst
+++ b/Documentation/driver-api/vfio.rst
@@ -255,11 +255,13 @@ vfio_unregister_group_dev() respectively::
void vfio_init_group_dev(struct vfio_device *device,
struct device *dev,
const struct vfio_device_ops *ops);
+ void vfio_uninit_group_dev(struct vfio_device *device);
int vfio_register_group_dev(struct vfio_device *device);
void vfio_unregister_group_dev(struct vfio_device *device);
The driver should embed the vfio_device in its own structure and call
-vfio_init_group_dev() to pre-configure it before going to registration.
+vfio_init_group_dev() to pre-configure it before going to registration
+and call vfio_uninit_group_dev() after completing the un-registration.
vfio_register_group_dev() indicates to the core to begin tracking the
iommu_group of the specified dev and register the dev as owned by a VFIO bus
driver. Once vfio_register_group_dev() returns it is possible for userspace to
diff --git a/drivers/vfio/fsl-mc/vfio_fsl_mc.c
b/drivers/vfio/fsl-mc/vfio_fsl_mc.c
index 90cad109583b80..122997c61ba450 100644
--- a/drivers/vfio/fsl-mc/vfio_fsl_mc.c
+++ b/drivers/vfio/fsl-mc/vfio_fsl_mc.c
@@ -627,7 +627,7 @@ static int vfio_fsl_mc_probe(struct fsl_mc_device *mc_dev)
ret = vfio_fsl_mc_reflck_attach(vdev);
if (ret)
- goto out_kfree;
+ goto out_uninit;
ret = vfio_fsl_mc_init_device(vdev);
if (ret)
@@ -657,7 +657,8 @@ static int vfio_fsl_mc_probe(struct fsl_mc_device *mc_dev)
vfio_fsl_uninit_device(vdev);
out_reflck:
vfio_fsl_mc_reflck_put(vdev->reflck);
-out_kfree:
+out_uninit:
+ vfio_uninit_group_dev(>vdev);
kfree(vdev);
out_group_put:
vfio_iommu_group_put(group, dev);
@@ -675,7 +676,7 @@ static int vfio_fsl_mc_remove(struct fsl_mc_device *mc_dev)
dprc_remove_devices(mc_dev, NULL, 0);
vfio_fsl_uninit_device(vdev);
vfio_fsl_mc_reflck_put(vdev->reflck);
-
+ vfio_uninit_group_dev(>vdev);
kfree(vdev);
vfio_iommu_group_put(mc_dev->dev.iommu_group, dev);
diff --git a/drivers/vfio/mdev/vfio_mdev.c b/drivers/vfio/mdev/vfio_mdev.c
index 39ef7489fe4719..a5c77ccb24f70a 100644
--- a/drivers/vfio/mdev/vfio_mdev.c
+++ b/drivers/vfio/mdev/vfio_mdev.c
@@ -120,12 +120,16 @@ static int vfio_mdev_probe(struct mdev_device *mdev)
vfio_init_group_dev(vdev, >dev, _mdev_dev_ops);
ret = vfio_register_group_dev(vdev);
- if (ret) {
- kfree(vdev);
- return ret;
- }
+ if (ret)
+ goto out_uninit;
+
dev_set_drvdata(>dev, vdev);
return 0;
+
+out_uninit:
+ vfio_uninit_group_dev(vdev);
+ kfree(vdev);
+ return ret;
}
static void vfio_mdev_remove(struct mdev_device *mdev)
@@ -133,6 +137,7 @@ static void vfio_mdev_remove(struct mdev_device *mdev)
struct vfio_device *vdev = dev_get_drvdata(>dev);
vfio_unregister_group_dev(vdev);
+ vfio_uninit_group_dev(vdev);
kfree(vdev);
}
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 318864d5283782..fab3715d60d4ba 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -2022,7 +2022,7 @@ static int vfio_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *id)
ret = vfio_pci_reflck_attach(vdev);
if (ret)
- goto out_free;
+ goto out_uninit;
ret = vfio_pci_vf_init(vdev);
if (ret)
goto out_reflck;
@@ -2059,7 +2059,8 @@ static int vfio_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *id)
vfio_pci_vf_uninit(vdev);
out_reflck:
[PATCH v4 10/14] vfio/pci: Reorganize VFIO_DEVICE_PCI_HOT_RESET to use the device set
Like vfio_pci_dev_set_try_reset() this code wants to reset all of the
devices in the "reset group" which is the same membership as the device
set.
Instead of trying to reconstruct the device set from the PCI list go
directly from the device set's device list to execute the reset.
The same basic structure as vfio_pci_dev_set_try_reset() is used. The
'vfio_devices' struct is replaced with the device set linked list and we
simply sweep it multiple times under the lock.
This eliminates a memory allocation and get/put traffic and another
improperly locked test of pci_dev_driver().
Reviewed-off-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/pci/vfio_pci.c | 213 +++-
1 file changed, 89 insertions(+), 124 deletions(-)
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 0147f04c91b2fb..a4f44ea52fa324 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -223,9 +223,11 @@ static void vfio_pci_probe_mmaps(struct vfio_pci_device
*vdev)
}
}
+struct vfio_pci_group_info;
static bool vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
static void vfio_pci_disable(struct vfio_pci_device *vdev);
-static int vfio_pci_try_zap_and_vma_lock_cb(struct pci_dev *pdev, void *data);
+static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
+ struct vfio_pci_group_info *groups);
/*
* INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
@@ -643,37 +645,11 @@ static int vfio_pci_fill_devs(struct pci_dev *pdev, void
*data)
return 0;
}
-struct vfio_pci_group_entry {
- struct vfio_group *group;
- int id;
-};
-
struct vfio_pci_group_info {
int count;
- struct vfio_pci_group_entry *groups;
+ struct vfio_group **groups;
};
-static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
-{
- struct vfio_pci_group_info *info = data;
- struct iommu_group *group;
- int id, i;
-
- group = iommu_group_get(>dev);
- if (!group)
- return -EPERM;
-
- id = iommu_group_id(group);
-
- for (i = 0; i < info->count; i++)
- if (info->groups[i].id == id)
- break;
-
- iommu_group_put(group);
-
- return (i == info->count) ? -EINVAL : 0;
-}
-
static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot
*slot)
{
for (; pdev; pdev = pdev->bus->self)
@@ -751,12 +727,6 @@ int vfio_pci_register_dev_region(struct vfio_pci_device
*vdev,
return 0;
}
-struct vfio_devices {
- struct vfio_pci_device **devices;
- int cur_index;
- int max_index;
-};
-
static long vfio_pci_ioctl(struct vfio_device *core_vdev,
unsigned int cmd, unsigned long arg)
{
@@ -1125,11 +1095,10 @@ static long vfio_pci_ioctl(struct vfio_device
*core_vdev,
} else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
struct vfio_pci_hot_reset hdr;
int32_t *group_fds;
- struct vfio_pci_group_entry *groups;
+ struct vfio_group **groups;
struct vfio_pci_group_info info;
- struct vfio_devices devs = { .cur_index = 0 };
bool slot = false;
- int i, group_idx, mem_idx = 0, count = 0, ret = 0;
+ int group_idx, count = 0, ret = 0;
minsz = offsetofend(struct vfio_pci_hot_reset, count);
@@ -1196,9 +1165,7 @@ static long vfio_pci_ioctl(struct vfio_device *core_vdev,
break;
}
- groups[group_idx].group = group;
- groups[group_idx].id =
- vfio_external_user_iommu_id(group);
+ groups[group_idx] = group;
}
kfree(group_fds);
@@ -1210,64 +1177,11 @@ static long vfio_pci_ioctl(struct vfio_device
*core_vdev,
info.count = hdr.count;
info.groups = groups;
- /*
-* Test whether all the affected devices are contained
-* by the set of groups provided by the user.
-*/
- ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
- vfio_pci_validate_devs,
- , slot);
- if (ret)
- goto hot_reset_release;
-
- devs.max_index = count;
- devs.devices = kcalloc(count, sizeof(struct vfio_device *),
- GFP_KERNEL);
- if (!devs.devices) {
- ret = -ENOMEM;
- goto hot_reset_release;
- }
-
- /*
-* We need to get memory_lock for each device, but devices
-
[PATCH v4 08/14] vfio/pci: Move to the device set infrastructure
From: Yishai Hadas
PCI wants to have the usual open/close_device() logic with the slight
twist that the open/close_device() must be done under a singelton lock
shared by all of the vfio_devices that are in the PCI "reset group".
The reset group, and thus the device set, is determined by what devices
pci_reset_bus() touches, which is either the entire bus or only the slot.
Rely on the core code to do everything reflck was doing and delete reflck
entirely.
Signed-off-by: Yishai Hadas
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/pci/vfio_pci.c | 162 +++-
drivers/vfio/pci/vfio_pci_private.h | 7 --
2 files changed, 37 insertions(+), 132 deletions(-)
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index fab3715d60d4ba..5d6db93d6c680f 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -530,53 +530,40 @@ static void vfio_pci_vf_token_user_add(struct
vfio_pci_device *vdev, int val)
vfio_device_put(_vdev->vdev);
}
-static void vfio_pci_release(struct vfio_device *core_vdev)
+static void vfio_pci_close_device(struct vfio_device *core_vdev)
{
struct vfio_pci_device *vdev =
container_of(core_vdev, struct vfio_pci_device, vdev);
- mutex_lock(>reflck->lock);
+ vfio_pci_vf_token_user_add(vdev, -1);
+ vfio_spapr_pci_eeh_release(vdev->pdev);
+ vfio_pci_disable(vdev);
- if (!(--vdev->refcnt)) {
- vfio_pci_vf_token_user_add(vdev, -1);
- vfio_spapr_pci_eeh_release(vdev->pdev);
- vfio_pci_disable(vdev);
-
- mutex_lock(>igate);
- if (vdev->err_trigger) {
- eventfd_ctx_put(vdev->err_trigger);
- vdev->err_trigger = NULL;
- }
- if (vdev->req_trigger) {
- eventfd_ctx_put(vdev->req_trigger);
- vdev->req_trigger = NULL;
- }
- mutex_unlock(>igate);
+ mutex_lock(>igate);
+ if (vdev->err_trigger) {
+ eventfd_ctx_put(vdev->err_trigger);
+ vdev->err_trigger = NULL;
}
-
- mutex_unlock(>reflck->lock);
+ if (vdev->req_trigger) {
+ eventfd_ctx_put(vdev->req_trigger);
+ vdev->req_trigger = NULL;
+ }
+ mutex_unlock(>igate);
}
-static int vfio_pci_open(struct vfio_device *core_vdev)
+static int vfio_pci_open_device(struct vfio_device *core_vdev)
{
struct vfio_pci_device *vdev =
container_of(core_vdev, struct vfio_pci_device, vdev);
int ret = 0;
- mutex_lock(>reflck->lock);
+ ret = vfio_pci_enable(vdev);
+ if (ret)
+ return ret;
- if (!vdev->refcnt) {
- ret = vfio_pci_enable(vdev);
- if (ret)
- goto error;
-
- vfio_spapr_pci_eeh_open(vdev->pdev);
- vfio_pci_vf_token_user_add(vdev, 1);
- }
- vdev->refcnt++;
-error:
- mutex_unlock(>reflck->lock);
- return ret;
+ vfio_spapr_pci_eeh_open(vdev->pdev);
+ vfio_pci_vf_token_user_add(vdev, 1);
+ return 0;
}
static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
@@ -1870,8 +1857,8 @@ static int vfio_pci_match(struct vfio_device *core_vdev,
char *buf)
static const struct vfio_device_ops vfio_pci_ops = {
.name = "vfio-pci",
- .open = vfio_pci_open,
- .release= vfio_pci_release,
+ .open_device= vfio_pci_open_device,
+ .close_device = vfio_pci_close_device,
.ioctl = vfio_pci_ioctl,
.read = vfio_pci_read,
.write = vfio_pci_write,
@@ -1880,9 +1867,6 @@ static const struct vfio_device_ops vfio_pci_ops = {
.match = vfio_pci_match,
};
-static int vfio_pci_reflck_attach(struct vfio_pci_device *vdev);
-static void vfio_pci_reflck_put(struct vfio_pci_reflck *reflck);
-
static int vfio_pci_bus_notifier(struct notifier_block *nb,
unsigned long action, void *data)
{
@@ -2020,12 +2004,23 @@ static int vfio_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *id)
INIT_LIST_HEAD(>vma_list);
init_rwsem(>memory_lock);
- ret = vfio_pci_reflck_attach(vdev);
+ if (pci_is_root_bus(pdev->bus)) {
+ ret = vfio_assign_device_set(>vdev, vdev);
+ } else if (!pci_probe_reset_slot(pdev->slot)) {
+ ret = vfio_assign_device_set(>vdev, pdev->slot);
+ } else {
+ /*
+* If there is no slot reset support for this device, the whole
+* bus needs to be grouped together to support bus-wide resets.
+*/
+ ret = vfio_assign_device_set(>vdev, pdev->bus);
+ }
+
if (ret)
[PATCH v4 04/14] vfio: Provide better generic support for open/release vfio_device_ops
Currently the driver ops have an open/release pair that is called once
each time a device FD is opened or closed. Add an additional set of
open/close_device() ops which are called when the device FD is opened for
the first time and closed for the last time.
An analysis shows that all of the drivers require this semantic. Some are
open coding it as part of their reflck implementation, and some are just
buggy and miss it completely.
To retain the current semantics PCI and FSL depend on, introduce the idea
of a "device set" which is a grouping of vfio_device's that share the same
lock around opening.
The device set is established by providing a 'set_id' pointer. All
vfio_device's that provide the same pointer will be joined to the same
singleton memory and lock across the whole set. This effectively replaces
the oddly named reflck.
After conversion the set_id will be sourced from:
- A struct device from a fsl_mc_device (fsl)
- A struct pci_slot (pci)
- A struct pci_bus (pci)
- The struct vfio_device (everything)
The design ensures that the above pointers are live as long as the
vfio_device is registered, so they form reliable unique keys to group
vfio_devices into sets.
This implementation uses xarray instead of searching through the driver
core structures, which simplifies the somewhat tricky locking in this
area.
Following patches convert all the drivers.
Signed-off-by: Yishai Hadas
Reviewed-by: Cornelia Huck
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/mdev/vfio_mdev.c | 26 +-
drivers/vfio/vfio.c | 149 +-
include/linux/mdev.h | 2 +
include/linux/vfio.h | 21 +
4 files changed, 174 insertions(+), 24 deletions(-)
diff --git a/drivers/vfio/mdev/vfio_mdev.c b/drivers/vfio/mdev/vfio_mdev.c
index a5c77ccb24f70a..e12196ffd48718 100644
--- a/drivers/vfio/mdev/vfio_mdev.c
+++ b/drivers/vfio/mdev/vfio_mdev.c
@@ -17,13 +17,33 @@
#include "mdev_private.h"
+static int vfio_mdev_open_device(struct vfio_device *core_vdev)
+{
+ struct mdev_device *mdev = to_mdev_device(core_vdev->dev);
+ struct mdev_parent *parent = mdev->type->parent;
+
+ if (unlikely(!parent->ops->open_device))
+ return 0;
+
+ return parent->ops->open_device(mdev);
+}
+
+static void vfio_mdev_close_device(struct vfio_device *core_vdev)
+{
+ struct mdev_device *mdev = to_mdev_device(core_vdev->dev);
+ struct mdev_parent *parent = mdev->type->parent;
+
+ if (likely(parent->ops->close_device))
+ parent->ops->close_device(mdev);
+}
+
static int vfio_mdev_open(struct vfio_device *core_vdev)
{
struct mdev_device *mdev = to_mdev_device(core_vdev->dev);
struct mdev_parent *parent = mdev->type->parent;
if (unlikely(!parent->ops->open))
- return -EINVAL;
+ return 0;
return parent->ops->open(mdev);
}
@@ -44,7 +64,7 @@ static long vfio_mdev_unlocked_ioctl(struct vfio_device
*core_vdev,
struct mdev_parent *parent = mdev->type->parent;
if (unlikely(!parent->ops->ioctl))
- return -EINVAL;
+ return 0;
return parent->ops->ioctl(mdev, cmd, arg);
}
@@ -100,6 +120,8 @@ static void vfio_mdev_request(struct vfio_device
*core_vdev, unsigned int count)
static const struct vfio_device_ops vfio_mdev_dev_ops = {
.name = "vfio-mdev",
+ .open_device= vfio_mdev_open_device,
+ .close_device = vfio_mdev_close_device,
.open = vfio_mdev_open,
.release= vfio_mdev_release,
.ioctl = vfio_mdev_unlocked_ioctl,
diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c
index cc375df0fd5dda..9cc17768c42554 100644
--- a/drivers/vfio/vfio.c
+++ b/drivers/vfio/vfio.c
@@ -96,6 +96,79 @@ module_param_named(enable_unsafe_noiommu_mode,
MODULE_PARM_DESC(enable_unsafe_noiommu_mode, "Enable UNSAFE, no-IOMMU mode.
This mode provides no device isolation, no DMA translation, no host kernel
protection, cannot be used for device assignment to virtual machines, requires
RAWIO permissions, and will taint the kernel. If you do not know what this is
for, step away. (default: false)");
#endif
+static DEFINE_XARRAY(vfio_device_set_xa);
+
+int vfio_assign_device_set(struct vfio_device *device, void *set_id)
+{
+ unsigned long idx = (unsigned long)set_id;
+ struct vfio_device_set *new_dev_set;
+ struct vfio_device_set *dev_set;
+
+ if (WARN_ON(!set_id))
+ return -EINVAL;
+
+ /*
+* Atomically acquire a singleton object in the xarray for this set_id
+*/
+ xa_lock(_device_set_xa);
+ dev_set = xa_load(_device_set_xa, idx);
+ if (dev_set)
+ goto found_get_ref;
+ xa_unlock(_device_set_xa);
+
+ new_dev_set = kzalloc(sizeof(*new_dev_set), GFP_KERNEL);
+ if (!new_dev_set)
+ return
[PATCH v4 02/14] vfio/mbochs: Fix missing error unwind of mbochs_used_mbytes
Convert mbochs to use an atomic scheme for this like mtty was changed
into. The atomic fixes various race conditions with probing. Add the
missing error unwind. Also add the missing kfree of mdev_state->pages.
Fixes: 681c1615f891 ("vfio/mbochs: Convert to use vfio_register_group_dev()")
Reported-by: Cornelia Huck
Co-developed-by: Alex Williamson
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
samples/vfio-mdev/mbochs.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/samples/vfio-mdev/mbochs.c b/samples/vfio-mdev/mbochs.c
index e81b875b4d87b4..3e885be7d076ad 100644
--- a/samples/vfio-mdev/mbochs.c
+++ b/samples/vfio-mdev/mbochs.c
@@ -129,7 +129,7 @@ static dev_tmbochs_devt;
static struct class*mbochs_class;
static struct cdev mbochs_cdev;
static struct device mbochs_dev;
-static int mbochs_used_mbytes;
+static atomic_t mbochs_avail_mbytes;
static const struct vfio_device_ops mbochs_dev_ops;
struct vfio_region_info_ext {
@@ -507,18 +507,22 @@ static int mbochs_reset(struct mdev_state *mdev_state)
static int mbochs_probe(struct mdev_device *mdev)
{
+ int avail_mbytes = atomic_read(_avail_mbytes);
const struct mbochs_type *type =
_types[mdev_get_type_group_id(mdev)];
struct device *dev = mdev_dev(mdev);
struct mdev_state *mdev_state;
int ret = -ENOMEM;
- if (type->mbytes + mbochs_used_mbytes > max_mbytes)
- return -ENOMEM;
+ do {
+ if (avail_mbytes < type->mbytes)
+ return -ENOSPC;
+ } while (!atomic_try_cmpxchg(_avail_mbytes, _mbytes,
+avail_mbytes - type->mbytes));
mdev_state = kzalloc(sizeof(struct mdev_state), GFP_KERNEL);
if (mdev_state == NULL)
- return -ENOMEM;
+ goto err_avail;
vfio_init_group_dev(_state->vdev, >dev, _dev_ops);
mdev_state->vconfig = kzalloc(MBOCHS_CONFIG_SPACE_SIZE, GFP_KERNEL);
@@ -549,17 +553,17 @@ static int mbochs_probe(struct mdev_device *mdev)
mbochs_create_config_space(mdev_state);
mbochs_reset(mdev_state);
- mbochs_used_mbytes += type->mbytes;
-
ret = vfio_register_group_dev(_state->vdev);
if (ret)
goto err_mem;
dev_set_drvdata(>dev, mdev_state);
return 0;
-
err_mem:
+ kfree(mdev_state->pages);
kfree(mdev_state->vconfig);
kfree(mdev_state);
+err_avail:
+ atomic_add(type->mbytes, _avail_mbytes);
return ret;
}
@@ -567,8 +571,8 @@ static void mbochs_remove(struct mdev_device *mdev)
{
struct mdev_state *mdev_state = dev_get_drvdata(>dev);
- mbochs_used_mbytes -= mdev_state->type->mbytes;
vfio_unregister_group_dev(_state->vdev);
+ atomic_add(mdev_state->type->mbytes, _avail_mbytes);
kfree(mdev_state->pages);
kfree(mdev_state->vconfig);
kfree(mdev_state);
@@ -1351,7 +1355,7 @@ static ssize_t available_instances_show(struct mdev_type
*mtype,
{
const struct mbochs_type *type =
_types[mtype_get_type_group_id(mtype)];
- int count = (max_mbytes - mbochs_used_mbytes) / type->mbytes;
+ int count = atomic_read(_avail_mbytes) / type->mbytes;
return sprintf(buf, "%d\n", count);
}
@@ -1433,6 +1437,8 @@ static int __init mbochs_dev_init(void)
{
int ret = 0;
+ atomic_set(_avail_mbytes, max_mbytes);
+
ret = alloc_chrdev_region(_devt, 0, MINORMASK + 1, MBOCHS_NAME);
if (ret < 0) {
pr_err("Error: failed to register mbochs_dev, err: %d\n", ret);
--
2.32.0
[PATCH v4 09/14] vfio/pci: Change vfio_pci_try_bus_reset() to use the dev_set
vfio_pci_try_bus_reset() is triggering a reset of the entire_dev set if
any device within it has accumulated a needs_reset. This reset can only be
done once all of the drivers operating the PCI devices to be reset are in
a known safe state.
Make this clearer by directly operating on the dev_set instead of the
vfio_pci_device. Rename the function to vfio_pci_dev_set_try_reset().
Use the device list inside the dev_set to check that all drivers are in a
safe state instead of working backwards from the pci_device.
The dev_set->lock directly prevents devices from joining/leaving the set,
or changing their state, which further implies the pci_device cannot
change drivers or that the vfio_device be freed, eliminating the need for
get/put's.
If a pci_device to be reset is not in the dev_set then the reset cannot be
used as we can't know what the state of that driver is. Directly measure
this by checking that every pci_device is in the dev_set - which
effectively proves that VFIO drivers are attached to everything.
Remove the odd interaction around vfio_pci_set_power_state() - have the
only caller avoid its redundant vfio_pci_set_power_state() instead of
avoiding it inside vfio_pci_dev_set_try_reset().
This restructuring corrects a call to pci_dev_driver() without holding the
device_lock() and removes a hard wiring to _pci_driver.
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/pci/vfio_pci.c | 182 +---
1 file changed, 86 insertions(+), 96 deletions(-)
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 5d6db93d6c680f..0147f04c91b2fb 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -223,7 +223,7 @@ static void vfio_pci_probe_mmaps(struct vfio_pci_device
*vdev)
}
}
-static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
+static bool vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
static void vfio_pci_disable(struct vfio_pci_device *vdev);
static int vfio_pci_try_zap_and_vma_lock_cb(struct pci_dev *pdev, void *data);
@@ -404,6 +404,9 @@ static void vfio_pci_disable(struct vfio_pci_device *vdev)
struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
int i, bar;
+ /* For needs_reset */
+ lockdep_assert_held(>vdev.dev_set->lock);
+
/* Stop the device from further DMA */
pci_clear_master(pdev);
@@ -487,9 +490,7 @@ static void vfio_pci_disable(struct vfio_pci_device *vdev)
out:
pci_disable_device(pdev);
- vfio_pci_try_bus_reset(vdev);
-
- if (!disable_idle_d3)
+ if (!vfio_pci_dev_set_try_reset(vdev->vdev.dev_set) && !disable_idle_d3)
vfio_pci_set_power_state(vdev, PCI_D3hot);
}
@@ -2145,36 +2146,6 @@ static struct pci_driver vfio_pci_driver = {
.err_handler= _err_handlers,
};
-static int vfio_pci_get_unused_devs(struct pci_dev *pdev, void *data)
-{
- struct vfio_devices *devs = data;
- struct vfio_device *device;
- struct vfio_pci_device *vdev;
-
- if (devs->cur_index == devs->max_index)
- return -ENOSPC;
-
- device = vfio_device_get_from_dev(>dev);
- if (!device)
- return -EINVAL;
-
- if (pci_dev_driver(pdev) != _pci_driver) {
- vfio_device_put(device);
- return -EBUSY;
- }
-
- vdev = container_of(device, struct vfio_pci_device, vdev);
-
- /* Fault if the device is not unused */
- if (device->open_count) {
- vfio_device_put(device);
- return -EBUSY;
- }
-
- devs->devices[devs->cur_index++] = vdev;
- return 0;
-}
-
static int vfio_pci_try_zap_and_vma_lock_cb(struct pci_dev *pdev, void *data)
{
struct vfio_devices *devs = data;
@@ -2208,79 +2179,98 @@ static int vfio_pci_try_zap_and_vma_lock_cb(struct
pci_dev *pdev, void *data)
return 0;
}
+static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data)
+{
+ struct vfio_device_set *dev_set = data;
+ struct vfio_device *cur;
+
+ list_for_each_entry(cur, _set->device_list, dev_set_list)
+ if (cur->dev == >dev)
+ return 0;
+ return -EBUSY;
+}
+
/*
- * If a bus or slot reset is available for the provided device and:
+ * vfio-core considers a group to be viable and will create a vfio_device even
+ * if some devices are bound to drivers like pci-stub or pcieport. Here we
+ * require all PCI devices to be inside our dev_set since that ensures they
stay
+ * put and that every driver controlling the device can co-ordinate with the
+ * device reset.
+ *
+ * Returns the pci_dev to pass to pci_reset_bus() if every PCI device to be
+ * reset is inside the dev_set, and pci_reset_bus() can succeed. NULL
otherwise.
+ */
+static struct pci_dev *
+vfio_pci_dev_set_resettable(struct vfio_device_set *dev_set)
+{
+ struct pci_dev *pdev;
+
+ lockdep_assert_held(_set->lock);
+
[PATCH v4 11/14] vfio/mbochs: Fix close when multiple device FDs are open
mbochs_close() iterates over global device state and frees it. Currently
this is done every time a device FD is closed, but if multiple device FDs
are open this could corrupt other still active FDs.
Change this to use close_device() so it only runs on the last close.
Reviewed-by: Cornelia Huck
Reviewed-by: Christoph Hellwig
Signed-off-by: Jason Gunthorpe
---
samples/vfio-mdev/mbochs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/samples/vfio-mdev/mbochs.c b/samples/vfio-mdev/mbochs.c
index 7b2e12fe70827c..c313ab4d1f4e4e 100644
--- a/samples/vfio-mdev/mbochs.c
+++ b/samples/vfio-mdev/mbochs.c
@@ -1278,7 +1278,7 @@ static long mbochs_ioctl(struct vfio_device *vdev,
unsigned int cmd,
return -ENOTTY;
}
-static void mbochs_close(struct vfio_device *vdev)
+static void mbochs_close_device(struct vfio_device *vdev)
{
struct mdev_state *mdev_state =
container_of(vdev, struct mdev_state, vdev);
@@ -1396,7 +1396,7 @@ static struct attribute_group *mdev_type_groups[] = {
};
static const struct vfio_device_ops mbochs_dev_ops = {
- .release = mbochs_close,
+ .close_device = mbochs_close_device,
.read = mbochs_read,
.write = mbochs_write,
.ioctl = mbochs_ioctl,
--
2.32.0
[PATCH v4 00/14] Provide core infrastructure for managing open/release
This is in support of Max's series to split vfio-pci. For that to work the
reflck concept embedded in vfio-pci needs to be sharable across all of the
new VFIO PCI drivers which motivated re-examining how this is
implemented.
Another significant issue is how the VFIO PCI core includes code like:
if (pci_dev_driver(pdev) != _pci_driver)
Which is not scalable if there are going to be multiple different driver
types.
This series takes the approach of moving the "reflck" mechanism into the
core code as a "device set". Each vfio_device driver can specify how
vfio_devices are grouped into the set using a key and the set comes along
with a set-global mutex. The core code manages creating per-device set
memory and associating it with each vfio_device.
In turn this allows the core code to provide an open/close_device()
operation that is called only for the first/last FD, and is called under
the global device set lock.
Review of all the drivers show that they are either already open coding
the first/last semantic or are buggy and missing it. All drivers are
migrated/fixed to the new open/close_device ops and the unused per-FD
open()/release() ops are deleted.
The special behavior of PCI around the bus/slot "reset group" is recast in
terms of the device set which conslidates the reflck, eliminates two
touches of pci_dev_driver(), and allows the reset mechanism to share
across all VFIO PCI drivers. PCI is changed to acquire devices directly
from the device set instead of trying to work backwards from the struct
pci_device.
Overall a few minor bugs are squashed and quite a bit of code is removed
through consolidation.
v4:
- Fix use-after-free typo in mbochs error unwind
- Allow mdevs to work when they don't have open/release ops, for
bisect-ability
- Redo the vfio_pci_try_bus_reset() patch, make it dev_set centric
- Change VFIO_DEVICE_PCI_HOT_RESET to align with the new
vfio_pci_try_bus_reset() design
v3: https://lore.kernel.org/r/0-v3-6c9e19cc7d44+15613-vfio_reflck_...@nvidia.com
- Atomic conversion of mbochs_used_mbytes
- Add missing vfio_uninit_group_dev in error unwind of mbochs
- Reorganize vfio_assign_device_set()
- Move the dev_set_list hunks to the introduction of the dev_set
- Use if instead of ?: in fsl
- Add a comment about the whole bus reset in vfio_pci_probe()
- Rename vfio_pci_check_all_devices_bound() to
vfio_pci_is_device_in_set()
- Move logic from vfio_pci_try_bus_reset() into vfio_pci_find_reset_target()
v2: https://lore.kernel.org/r/0-v2-b6a5582525c9+ff96-vfio_reflck_...@nvidia.com
- Reorder fsl and mbochs vfio_uninit_group_dev
- Fix missing error unwind in mbochs
- Return 0 from mdev open_device if there is no op
- Fix style for else {}
- Spelling fix for singleton
- Acquire cur_mem under lock
- Always use error unwind flow for vfio_pci_check_all_devices_bound()
v1: https://lore.kernel.org/r/0-v1-eaf3ccbba33c+1add0-vfio_reflck_...@nvidia.com
Jason Gunthorpe (12):
vfio/samples: Remove module get/put
vfio/mbochs: Fix missing error unwind of mbochs_used_mbytes
vfio: Provide better generic support for open/release vfio_device_ops
vfio/samples: Delete useless open/close
vfio/fsl: Move to the device set infrastructure
vfio/platform: Use open_device() instead of open coding a refcnt
scheme
vfio/pci: Change vfio_pci_try_bus_reset() to use the dev_set
vfio/pci: Reorganize VFIO_DEVICE_PCI_HOT_RESET to use the device set
vfio/mbochs: Fix close when multiple device FDs are open
vfio/ap,ccw: Fix open/close when multiple device FDs are open
vfio/gvt: Fix open/close when multiple device FDs are open
vfio: Remove struct vfio_device_ops open/release
Max Gurtovoy (1):
vfio: Introduce a vfio_uninit_group_dev() API call
Yishai Hadas (1):
vfio/pci: Move to the device set infrastructure
Documentation/driver-api/vfio.rst | 4 +-
drivers/gpu/drm/i915/gvt/kvmgt.c | 8 +-
drivers/s390/cio/vfio_ccw_ops.c | 8 +-
drivers/s390/crypto/vfio_ap_ops.c | 8 +-
drivers/vfio/fsl-mc/vfio_fsl_mc.c | 161 +-
drivers/vfio/fsl-mc/vfio_fsl_mc_intr.c| 6 +-
drivers/vfio/fsl-mc/vfio_fsl_mc_private.h | 7 -
drivers/vfio/mdev/vfio_mdev.c | 33 +-
drivers/vfio/pci/vfio_pci.c | 539 +++---
drivers/vfio/pci/vfio_pci_private.h | 7 -
drivers/vfio/platform/vfio_platform_common.c | 102 ++--
drivers/vfio/platform/vfio_platform_private.h | 1 -
drivers/vfio/vfio.c | 142 -
include/linux/mdev.h | 9 +-
include/linux/vfio.h | 26 +-
samples/vfio-mdev/mbochs.c| 40 +-
samples/vfio-mdev/mdpy.c | 40 +-
samples/vfio-mdev/mtty.c | 40 +-
18 files changed, 509 insertions(+), 672 deletions(-)
base-commit: 3fb1712d85962f81265b5018922a2da13cdf6033
--
2.32.0
[pull] amdgpu drm-fixes-5.14
Hi Dave, Daniel, Same pull, more S-o-b. The following changes since commit d28e2568ac26fff351c846bf74ba6ca5dded733e: Merge tag 'amd-drm-fixes-5.14-2021-07-28' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes (2021-07-29 17:20:29 +1000) are available in the Git repository at: https://gitlab.freedesktop.org/agd5f/linux.git tags/amd-drm-fixes-5.14-2021-08-05 for you to fetch changes up to e00f543d3596c71201438d967877138ab33bb3de: drm/amdgpu: add DID for beige goby (2021-08-05 21:02:29 -0400) amd-drm-fixes-5.14-2021-08-05: amdgpu: - Fix potential out-of-bounds read when updating GPUVM mapping - Renoir powergating fix - Yellow Carp updates - 8K fix for navi1x - Beige Goby updates and new DIDs - Fix DMUB firmware version output - EDP fix - pmops config fix Bing Guo (2): drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1X drm/amd/display: Increase stutter watermark for dcn303 Chengming Gui (1): drm/amdgpu: add DID for beige goby Jude Shih (1): drm/amd/display: Fix resetting DCN3.1 HW when resuming from S4 Qingqing Zhuo (1): drm/amd/display: workaround for hard hang on HPD on native DP Randy Dunlap (1): drm/amdgpu: fix checking pmops when PM_SLEEP is not enabled Shirish S (1): drm/amdgpu/display: fix DMUB firmware version info Wesley Chalmers (1): drm/amd/display: Assume LTTPR interop for DCN31+ Xiaomeng Hou (1): drm/amd/pm: update yellow carp pmfw interface version Yifan Zhang (1): drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir. xinhui pan (1): drm/amdgpu: Fix out-of-bounds read when update mapping drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 7 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 3 ++- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 21 - drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- .../drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 4 +++- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c| 21 ++--- drivers/gpu/drm/amd/display/dc/dc.h | 2 ++ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 2 +- .../gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 20 .../gpu/drm/amd/display/dc/dcn303/dcn303_resource.c | 4 ++-- .../gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 16 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 8 +--- drivers/gpu/drm/amd/pm/inc/smu_v13_0.h | 2 +- 14 files changed, 83 insertions(+), 31 deletions(-)
[Bug 213201] [KAVERI] memory leak - unreferenced object 0xffff8881700cf988 (size 56)
https://bugzilla.kernel.org/show_bug.cgi?id=213201
Erhard F. (erhar...@mailbox.org) changed:
What|Removed |Added
Attachment #297921|0 |1
is obsolete||
--- Comment #13 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 298219
--> https://bugzilla.kernel.org/attachment.cgi?id=298219=edit
output of /sys/kernel/debug/kmemleak (kernel 5.14-rc4)
Same board, another CPU:
unreferenced object 0x888102e48bd0 (size 56):
comm "systemd-udevd", pid 199, jiffies 4294881489 (age 3502.134s)
hex dump (first 32 bytes):
00 00 00 00 00 00 00 00 0d 01 70 00 00 00 00 00 ..p.
7b 5d 02 00 00 c9 ff ff 00 00 00 00 00 00 00 00 {]..
backtrace:
[] kmem_cache_alloc+0x109/0x132
[] acpi_ps_alloc_op+0x8b/0x1c4
[] acpi_ps_create_op+0x4b1/0x8ec
[] acpi_ps_parse_loop+0x401/0x1062
[] acpi_ps_parse_aml+0x1cd/0x6fa
[] acpi_ps_execute_method+0x51f/0x57b
[] acpi_ns_evaluate+0x64c/0x886
[] acpi_evaluate_object+0x335/0x690
[] amdgpu_atcs_call.constprop.0+0x141/0x1bd [amdgpu]
[] amdgpu_atcs_pci_probe_handle.isra.0+0x147/0x2a1
[amdgpu]
[] amdgpu_acpi_detect+0xd1/0x38e [amdgpu]
[] 0xc1c0c0aa
[] do_one_initcall+0xe0/0x1fc
[] do_init_module+0x1c1/0x584
[] load_module+0x4ea2/0x5cc6
[] __do_sys_finit_module+0xf6/0x145
unreferenced object 0x888102e48480 (size 56):
comm "systemd-udevd", pid 199, jiffies 4294881489 (age 3502.134s)
hex dump (first 32 bytes):
d0 8b e4 02 81 88 ff ff 0d 01 2d 00 00 00 00 00 ..-.
7c 5d 02 00 00 c9 ff ff 00 00 00 00 00 00 00 00 |]..
backtrace:
[] kmem_cache_alloc+0x109/0x132
[] acpi_ps_alloc_op+0x8b/0x1c4
[] acpi_ps_create_op+0x4b1/0x8ec
[] acpi_ps_parse_loop+0x401/0x1062
[] acpi_ps_parse_aml+0x1cd/0x6fa
[] acpi_ps_execute_method+0x51f/0x57b
[] acpi_ns_evaluate+0x64c/0x886
[] acpi_evaluate_object+0x335/0x690
[] amdgpu_atcs_call.constprop.0+0x141/0x1bd [amdgpu]
[] amdgpu_atcs_pci_probe_handle.isra.0+0x147/0x2a1
[amdgpu]
[] amdgpu_acpi_detect+0xd1/0x38e [amdgpu]
[] 0xc1c0c0aa
[] do_one_initcall+0xe0/0x1fc
[] do_init_module+0x1c1/0x584
[] load_module+0x4ea2/0x5cc6
[] __do_sys_finit_module+0xf6/0x145
--
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[Bug 213201] [KAVERI] memory leak - unreferenced object 0xffff8881700cf988 (size 56)
https://bugzilla.kernel.org/show_bug.cgi?id=213201 --- Comment #12 from Erhard F. (erhar...@mailbox.org) --- Created attachment 298217 --> https://bugzilla.kernel.org/attachment.cgi?id=298217=edit kernel dmesg (5.14-rc4, AMD A10-7860K) -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
[Bug 213201] [KAVERI] memory leak - unreferenced object 0xffff8881700cf988 (size 56)
https://bugzilla.kernel.org/show_bug.cgi?id=213201 Erhard F. (erhar...@mailbox.org) changed: What|Removed |Added Attachment #296969|0 |1 is obsolete|| Attachment #297925|0 |1 is obsolete|| --- Comment #11 from Erhard F. (erhar...@mailbox.org) --- Created attachment 298215 --> https://bugzilla.kernel.org/attachment.cgi?id=298215=edit kernel .config (5.14-rc4, AMD A10-7860K) -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
RE: [PATCH v2 00/14] drm: Make DRM's IRQ helpers legacy
Hi Thomas,
> -Original Message-
> From: Thomas Zimmermann
> Sent: Wednesday, August 4, 2021 12:11 AM
> To: Chrisanthus, Anitha ; Sam Ravnborg
>
> Cc: dan...@ffwll.ch; airl...@linux.ie; alexander.deuc...@amd.com;
> christian.koe...@amd.com; liviu.du...@arm.com; brian.star...@arm.com;
> bbrezil...@kernel.org; nicolas.fe...@microchip.com;
> maarten.lankho...@linux.intel.com; mrip...@kernel.org; ste...@agner.ch;
> alison.w...@nxp.com; patrik.r.jakobs...@gmail.com; robdcl...@gmail.com;
> Dea, Edmund J ; s...@poorly.run;
> shawn...@kernel.org; s.ha...@pengutronix.de; ker...@pengutronix.de;
> jyri.sa...@iki.fi; to...@kernel.org; dan.sned...@microchip.com;
> tomi.valkei...@ideasonboard.com; amd-...@lists.freedesktop.org; dri-
> de...@lists.freedesktop.org; linux-arm-ker...@lists.infradead.org; linux-arm-
> m...@vger.kernel.org; freedr...@lists.freedesktop.org
> Subject: Re: [PATCH v2 00/14] drm: Make DRM's IRQ helpers legacy
>
> Hi
>
> Am 03.08.21 um 20:36 schrieb Chrisanthus, Anitha:
> > Hi Thomas,
> > Can you please hold off on applying the kmb patch, I am seeing some issues
> while testing. Modetest works, but video playback only plays once, and it
> fails
> the second time with this patch.
>
> Sounds a bit like the testing issue at [1]. For testing, you need the
> latest drm-misc-next or drm-tip. Specifically, you need commit
> 1e4cd78ed493 ("drm: Don't test for IRQ support in VBLANK ioctls").
You are right, with the above patch video plays fine. It's all good now! Sorry
about the confusion.
>
> Let me know whether this works for you.
>
> Best regards
> Thomas
>
> [1] https://patchwork.freedesktop.org/patch/447057/?series=93078=1
>
> >
> > Thanks,
> > Anitha
> >
> >
> >> -Original Message-
> >> From: Sam Ravnborg
> >> Sent: Tuesday, August 3, 2021 8:05 AM
> >> To: Thomas Zimmermann
> >> Cc: dan...@ffwll.ch; airl...@linux.ie; alexander.deuc...@amd.com;
> >> christian.koe...@amd.com; liviu.du...@arm.com;
> brian.star...@arm.com;
> >> bbrezil...@kernel.org; nicolas.fe...@microchip.com;
> >> maarten.lankho...@linux.intel.com; mrip...@kernel.org;
> ste...@agner.ch;
> >> alison.w...@nxp.com; patrik.r.jakobs...@gmail.com; Chrisanthus, Anitha
> >> ; robdcl...@gmail.com; Dea, Edmund J
> >> ; s...@poorly.run; shawn...@kernel.org;
> >> s.ha...@pengutronix.de; ker...@pengutronix.de; jyri.sa...@iki.fi;
> >> to...@kernel.org; dan.sned...@microchip.com;
> >> tomi.valkei...@ideasonboard.com; amd-...@lists.freedesktop.org; dri-
> >> de...@lists.freedesktop.org; linux-arm-ker...@lists.infradead.org; linux-
> arm-
> >> m...@vger.kernel.org; freedr...@lists.freedesktop.org
> >> Subject: Re: [PATCH v2 00/14] drm: Make DRM's IRQ helpers legacy
> >>
> >> Hi Thomas,
> >>
> >> On Tue, Aug 03, 2021 at 11:06:50AM +0200, Thomas Zimmermann wrote:
> >>> DRM's IRQ helpers are only helpful for old, non-KMS drivers. Move
> >>> the code behind CONFIG_DRM_LEGACY. Convert KMS drivers to Linux
> >>> IRQ interfaces.
> >>>
> >>> DRM provides IRQ helpers for setting up, receiving and removing IRQ
> >>> handlers. It's an abstraction over plain Linux functions. The code
> >>> is mid-layerish with several callbacks to hook into the rsp drivers.
> >>> Old UMS driver have their interrupts enabled via ioctl, so these
> >>> abstractions makes some sense. Modern KMS manage all their interrupts
> >>> internally. Using the DRM helpers adds indirection without benefits.
> >>>
> >>> Most KMS drivers already use Linux IRQ functions instead of DRM's
> >>> abstraction layer. Patches 1 to 12 convert the remaining ones.
> >>> The patches also resolve a bug for devices without assigned interrupt
> >>> number. DRM helpers don't test for IRQ_NOTCONNECTED, so drivers do
> >>> not detect if the device has no interrupt assigned.
> >>>
> >>> Patch 13 removes an unused function.
> >>>
> >>> Patch 14 moves the DRM IRQ helpers behind CONFIG_DRM_LEGACY. Only
> >>> the old non-KMS drivers still use the functionality.
> >>>
> >>> v2:
> >>> * drop IRQ_NOTCONNECTED test from atmel-hlcdc (Sam)
> >>> * use devm_request_irq() in atmel-hlcdc (Sam)
> >>> * unify variable names in arm/hlcdc (Sam)
> >>>
> >>> Thomas Zimmermann (14):
> >>
> >> The following patches are all:
> >> Acked-by: Sam Ravnborg
> >>
> >>>drm/fsl-dcu: Convert to Linux IRQ interfaces
> >>>drm/gma500: Convert to Linux IRQ interfaces
> >>>drm/kmb: Convert to Linux IRQ interfaces
> >>>drm/msm: Convert to Linux IRQ interfaces
> >>>drm/mxsfb: Convert to Linux IRQ interfaces
> >>>drm/tidss: Convert to Linux IRQ interfaces
> >>>drm/vc4: Convert to Linux IRQ interfaces
> >>>drm: Remove unused devm_drm_irq_install()
> >>
> >> The remaining patches I either skipped or already had a feedback from
> >> me or I asked a question.
> >>
> >>Sam
>
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Maxfeldstr. 5, 90409 Nürnberg, Germany
> (HRB 36809, AG Nürnberg)
> Geschäftsführer: Felix Imendörffer
RE: [PATCH 02/14] drm/kmb: Define driver date and major/minor version
Thanks Thomas, I'll keep this in mind for the next patch.
> -Original Message-
> From: dri-devel On Behalf Of
> Thomas Zimmermann
> Sent: Wednesday, August 4, 2021 11:13 AM
> To: Chrisanthus, Anitha ; dri-
> de...@lists.freedesktop.org; Dea, Edmund J
> Subject: Re: [PATCH 02/14] drm/kmb: Define driver date and major/minor
> version
>
> Hi,
>
> just a friendly reminder that branches that end with -fixes are for
> fixes that are required in upstream ASAP. I found this patch in
> drm-misc-fixes. It's not important, so it should have gone into
> drm-misc-next instead.
>
> Best regards
> Thomas
>
> Am 28.07.21 um 02:31 schrieb Anitha Chrisanthus:
> > From: Edmund Dea
> >
> > Added macros for date and version
> >
> > Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
> > Signed-off-by: Edmund Dea
> > ---
> > drivers/gpu/drm/kmb/kmb_drv.c | 8
> > drivers/gpu/drm/kmb/kmb_drv.h | 5 +
> > 2 files changed, 9 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/kmb/kmb_drv.c
> b/drivers/gpu/drm/kmb/kmb_drv.c
> > index c0b1c6f99249..f54392ec4fab 100644
> > --- a/drivers/gpu/drm/kmb/kmb_drv.c
> > +++ b/drivers/gpu/drm/kmb/kmb_drv.c
> > @@ -425,10 +425,10 @@ static const struct drm_driver kmb_driver = {
> > .fops = ,
> > DRM_GEM_CMA_DRIVER_OPS_VMAP,
> > .name = "kmb-drm",
> > - .desc = "KEEMBAY DISPLAY DRIVER ",
> > - .date = "20201008",
> > - .major = 1,
> > - .minor = 0,
> > + .desc = "KEEMBAY DISPLAY DRIVER",
> > + .date = DRIVER_DATE,
> > + .major = DRIVER_MAJOR,
> > + .minor = DRIVER_MINOR,
> > };
> >
> > static int kmb_remove(struct platform_device *pdev)
> > diff --git a/drivers/gpu/drm/kmb/kmb_drv.h
> b/drivers/gpu/drm/kmb/kmb_drv.h
> > index 02e806712a64..ebbaa5f422d5 100644
> > --- a/drivers/gpu/drm/kmb/kmb_drv.h
> > +++ b/drivers/gpu/drm/kmb/kmb_drv.h
> > @@ -15,6 +15,11 @@
> > #define KMB_MAX_HEIGHT1080 /*Max height in pixels */
> > #define KMB_MIN_WIDTH 1920 /*Max width in pixels */
> > #define KMB_MIN_HEIGHT 1080 /*Max height in pixels */
> > +
> > +#define DRIVER_DATE"20210223"
> > +#define DRIVER_MAJOR 1
> > +#define DRIVER_MINOR 1
> > +
> > #define KMB_LCD_DEFAULT_CLK 2
> > #define KMB_SYS_CLK_MHZ 500
> >
> >
>
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Maxfeldstr. 5, 90409 Nürnberg, Germany
> (HRB 36809, AG Nürnberg)
> Geschäftsführer: Felix Imendörffer
Re: [PATCH v3 09/14] vfio/pci: Change vfio_pci_try_bus_reset() to use the dev_set
On Thu, Aug 05, 2021 at 11:33:11AM -0600, Alex Williamson wrote:
> > +static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data)
> > +{
> > + struct vfio_device_set *dev_set = data;
> > + struct vfio_device *cur;
> > +
> > + lockdep_assert_held(_set->lock);
> > +
> > + list_for_each_entry(cur, _set->device_list, dev_set_list)
> > + if (cur->dev == >dev)
> > + return 0;
> > + return -EBUSY;
> > +}
> > +
> > +static bool vfio_pci_dev_set_needs_reset(struct vfio_device_set *dev_set)
>
> Slight nit on the name here since we're essentially combining
> needs_reset along with the notion of the device being unused. I'm not
> sure, maybe "should_reset"? Otherwise it looks ok. Thanks,
What I did is add a new function vfio_pci_dev_set_resettable() which
pulls in three parts of logic that can be be shared with the
VFIO_DEVICE_PCI_HOT_RESET change in the next patch. That leaves this
function as purely needs_reset.
In turn the VFIO_DEVICE_PCI_HOT_RESET patch gets the same treatment
where it becomes a dev_set centric API just like this.
I'll send it as a v4.
Thanks,
Jason
Re: [PATCH v5 02/20] drm/msm: Fix drm/sched point of no return rules
On Thu, Aug 5, 2021 at 3:47 AM Daniel Vetter wrote:
>
> Originally drm_sched_job_init was the point of no return, after which
> drivers must submit a job. I've split that up, which allows us to fix
> this issue pretty easily.
>
> Only thing we have to take care of is to not skip to error paths after
> that. Other drivers do this the same for out-fence and similar things.
>
> Fixes: 1d8a5ca436ee ("drm/msm: Conversion to drm scheduler")
> Cc: Rob Clark
> Cc: Rob Clark
> Cc: Sean Paul
> Cc: Sumit Semwal
> Cc: "Christian König"
> Cc: linux-arm-...@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: freedr...@lists.freedesktop.org
> Cc: linux-me...@vger.kernel.org
> Cc: linaro-mm-...@lists.linaro.org
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/msm/msm_gem_submit.c | 15 +++
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c
> b/drivers/gpu/drm/msm/msm_gem_submit.c
> index 6d6c44f0e1f3..d0ed4ddc509e 100644
> --- a/drivers/gpu/drm/msm/msm_gem_submit.c
> +++ b/drivers/gpu/drm/msm/msm_gem_submit.c
> @@ -52,9 +52,6 @@ static struct msm_gem_submit *submit_create(struct
> drm_device *dev,
> return ERR_PTR(ret);
> }
>
> - /* FIXME: this is way too early */
> - drm_sched_job_arm(>base);
> -
> xa_init_flags(>deps, XA_FLAGS_ALLOC);
>
> kref_init(>ref);
> @@ -883,6 +880,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void
> *data,
>
> submit->user_fence = dma_fence_get(>base.s_fence->finished);
>
> + /* point of no return, we _have_ to submit no matter what */
> + drm_sched_job_arm(>base);
> +
> /*
> * Allocate an id which can be used by WAIT_FENCE ioctl to map back
> * to the underlying fence.
> @@ -892,17 +892,16 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void
> *data,
> if (submit->fence_id < 0) {
> ret = submit->fence_id = 0;
> submit->fence_id = 0;
> - goto out;
> }
>
> - if (args->flags & MSM_SUBMIT_FENCE_FD_OUT) {
> + if (ret == 0 && args->flags & MSM_SUBMIT_FENCE_FD_OUT) {
> struct sync_file *sync_file =
> sync_file_create(submit->user_fence);
> if (!sync_file) {
> ret = -ENOMEM;
> - goto out;
> + } else {
> + fd_install(out_fence_fd, sync_file->file);
> + args->fence_fd = out_fence_fd;
> }
> - fd_install(out_fence_fd, sync_file->file);
> - args->fence_fd = out_fence_fd;
I wonder if instead we should (approximately) undo "drm/msm/submit:
Simplify out-fence-fd handling" so that the point that it could fail
is moved up ahead of the drm_sched_job_arm()?
Also, does the dma_fence_get() work before drm_sched_job_arm()? From
a quick look, it looks like it won't, but I'm still playing catchup
and haven't had a chance to look at your entire series. If it doesn't
work before drm_sched_job_arm(), then there is really no way to
prevent a error path between the fence-init and job-submit.
But, prior to your series, wouldn't a failure after
drm_sched_job_init() but before the job is submitted just burn a
fence-id, and otherwise carry on it's merry way?
BR,
-R
> }
>
> submit_attach_object_fences(submit);
> --
> 2.32.0
>
[RFC PATCH 13/15] mm: convert MAX_ORDER sized static arrays to dynamic ones.
From: Zi Yan
This prepares for the upcoming changes to make MAX_ORDER a boot time
parameter instead of compilation time constant. All static arrays with
MAX_ORDER size are converted to pointers and their memory is allocated
at runtime.
free_area array in struct zone is allocated using memblock_alloc_node()
at boot time and using kzalloc() when memory is hot-added.
MAX_ORDER in arm64 nVHE code is independent of kernel buddy allocator,
so use CONFIG_FORCE_MAX_ZONEORDER instead.
Signed-off-by: Zi Yan
Cc: Dave Young
Cc: Jonathan Corbet
Cc: Christian Koenig
Cc: David Airlie
Cc: ke...@lists.infradead.org
Cc: linux-...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux...@kvack.org
Cc: linux-ker...@vger.kernel.org
---
.../admin-guide/kdump/vmcoreinfo.rst | 2 +-
drivers/gpu/drm/ttm/ttm_device.c | 7 ++-
drivers/gpu/drm/ttm/ttm_pool.c| 58 +--
include/drm/ttm/ttm_pool.h| 4 +-
include/linux/memory_hotplug.h| 1 +
include/linux/mmzone.h| 2 +-
mm/memory_hotplug.c | 1 +
mm/page_alloc.c | 48 ---
8 files changed, 104 insertions(+), 19 deletions(-)
diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst
b/Documentation/admin-guide/kdump/vmcoreinfo.rst
index 3861a25faae1..1c9449b9458f 100644
--- a/Documentation/admin-guide/kdump/vmcoreinfo.rst
+++ b/Documentation/admin-guide/kdump/vmcoreinfo.rst
@@ -172,7 +172,7 @@ variables.
Offset of the free_list's member. This value is used to compute the number
of free pages.
-Each zone has a free_area structure array called free_area[MAX_ORDER].
+Each zone has a free_area structure array called free_area with length of
MAX_ORDER.
The free_list represents a linked list of free page blocks.
(list_head, next|prev)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index 74e3b460132b..7d994c03fbd0 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -94,7 +94,9 @@ static int ttm_global_init(void)
>> PAGE_SHIFT;
num_dma32 = min(num_dma32, 2UL << (30 - PAGE_SHIFT));
- ttm_pool_mgr_init(num_pages);
+ ret = ttm_pool_mgr_init(num_pages);
+ if (ret)
+ goto out;
ttm_tt_mgr_init(num_pages, num_dma32);
glob->dummy_read_page = alloc_page(__GFP_ZERO | GFP_DMA32);
@@ -216,7 +218,8 @@ int ttm_device_init(struct ttm_device *bdev, struct
ttm_device_funcs *funcs,
bdev->funcs = funcs;
ttm_sys_man_init(bdev);
- ttm_pool_init(>pool, dev, use_dma_alloc, use_dma32);
+ if (ttm_pool_init(>pool, dev, use_dma_alloc, use_dma32))
+ return -ENOMEM;
bdev->vma_manager = vma_manager;
INIT_DELAYED_WORK(>wq, ttm_device_delayed_workqueue);
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index cb38b1a17b09..ae20c80f14a4 100644
--- a/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@ -64,11 +64,11 @@ module_param(page_pool_size, ulong, 0644);
static atomic_long_t allocated_pages;
-static struct ttm_pool_type global_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_uncached[MAX_ORDER];
+static struct ttm_pool_type *global_write_combined;
+static struct ttm_pool_type *global_uncached;
-static struct ttm_pool_type global_dma32_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_dma32_uncached[MAX_ORDER];
+static struct ttm_pool_type *global_dma32_write_combined;
+static struct ttm_pool_type *global_dma32_uncached;
static struct mutex shrinker_lock;
static struct list_head shrinker_list;
@@ -493,8 +493,10 @@ EXPORT_SYMBOL(ttm_pool_free);
* @use_dma32: true if GFP_DMA32 should be used
*
* Initialize the pool and its pool types.
+ *
+ * Returns: 0 on successe, negative error code otherwise
*/
-void ttm_pool_init(struct ttm_pool *pool, struct device *dev,
+int ttm_pool_init(struct ttm_pool *pool, struct device *dev,
bool use_dma_alloc, bool use_dma32)
{
unsigned int i, j;
@@ -506,11 +508,30 @@ void ttm_pool_init(struct ttm_pool *pool, struct device
*dev,
pool->use_dma32 = use_dma32;
if (use_dma_alloc) {
- for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
+ for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i) {
+ pool->caching[i].orders =
+ kzalloc(sizeof(struct ttm_pool_type) *
MAX_ORDER,
+ GFP_KERNEL);
+ if (!pool->caching[i].orders) {
+ i--;
+ goto failed;
+ }
for (j = 0; j < MAX_ORDER; ++j)
ttm_pool_type_init(>caching[i].orders[j],
pool, i, j);
+
+
Re: [PATCH 2/2] drm/panel: s6d27a1: Add driver for Samsung S6D27A1 display panel
Hi Markuss,
sorry for reacting so late!
On Thu, Aug 5, 2021 at 3:36 PM Markuss Broks wrote:
> +#define s6d27a1_command(ctx, cmd, seq...) \
> +({ \
> + struct mipi_dbi *dbi = >dbi; \
> + int ret; \
> + ret = mipi_dbi_command(dbi, cmd, seq); \
> + if (ret) { \
> + dev_err(ctx->dev, "failure in writing command %02x\n", cmd); \
> + } \
> +})
You don't need this wrapper anymore, just call mipi_dbi_command() directly
everywhere you use s6d27a1_command().
Because I merged this patch:
https://cgit.freedesktop.org/drm/drm-misc/commit/include/drm/drm_mipi_dbi.h?id=3f5aa5ac0b0f9704f0c60f5fbbbcdc8c043d6eb6
Yours,
Linus Walleij
Re: [PATCH v5 6/6] drm/mediatek: add MERGE support for mt8195
Hi CK, On Sun, 2021-08-01 at 08:33 +0800, Chun-Kuang Hu wrote: > Hi, Jason: > > jason-jh.lin 於 2021年7月30日 週五 上午1:07寫道： > > > > Add MERGE module file: > > > > MERGE module is used to merge two slice-per-line inputs > > into one side-by-side output. > > > > Signed-off-by: jason-jh.lin > > --- > > This patch is base on [1] > > > > [1]add mt8195 SoC DRM binding > > - > > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597__;!!CTRNKA9wMg0ARbw!zkeg4-APhameNaE5ILtNBNC9h9LCu6aupI26bYErBmwbBg7YGwLZqihxn9hUl4SkJpfD$ > > > > --- > > drivers/gpu/drm/mediatek/Makefile | 1 + > > drivers/gpu/drm/mediatek/mtk_disp_drv.h | 8 + > > drivers/gpu/drm/mediatek/mtk_disp_merge.c | 277 > > > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 16 ++ > > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + > > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 6 +- > > drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + > > 7 files changed, 309 insertions(+), 1 deletion(-) > > create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_merge.c > > > > diff --git a/drivers/gpu/drm/mediatek/Makefile > > b/drivers/gpu/drm/mediatek/Makefile > > index dc54a7a69005..538e0087a44c 100644 > > --- a/drivers/gpu/drm/mediatek/Makefile > > +++ b/drivers/gpu/drm/mediatek/Makefile > > @@ -3,6 +3,7 @@ > > mediatek-drm-y := mtk_disp_ccorr.o \ > > mtk_disp_color.o \ > > mtk_disp_gamma.o \ > > + mtk_disp_merge.o \ > > mtk_disp_ovl.o \ > > mtk_disp_rdma.o \ > > mtk_drm_crtc.o \ > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > b/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > index cafd9df2d63b..f407cd9d873e 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h > > @@ -46,6 +46,14 @@ void mtk_gamma_set_common(void __iomem *regs, > > struct drm_crtc_state *state); > > void mtk_gamma_start(struct device *dev); > > void mtk_gamma_stop(struct device *dev); > > > > +int mtk_merge_clk_enable(struct device *dev); > > +void mtk_merge_clk_disable(struct device *dev); > > +void mtk_merge_config(struct device *dev, unsigned int width, > > + unsigned int height, unsigned int vrefresh, > > + unsigned int bpc, struct cmdq_pkt *cmdq_pkt); > > +void mtk_merge_start(struct device *dev); > > +void mtk_merge_stop(struct device *dev); > > + > > void mtk_ovl_bgclr_in_on(struct device *dev); > > void mtk_ovl_bgclr_in_off(struct device *dev); > > void mtk_ovl_bypass_shadow(struct device *dev); > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c > > b/drivers/gpu/drm/mediatek/mtk_disp_merge.c > > new file mode 100644 > > index ..594d76ccd205 > > --- /dev/null > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c > > @@ -0,0 +1,277 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (c) 2021 MediaTek Inc. > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include "mtk_drm_ddp_comp.h" > > +#include "mtk_drm_drv.h" > > +#include "mtk_disp_drv.h" > > + > > +#define DISP_REG_MERGE_CTRL0x000 > > +#define FLD_MERGE_EN BIT(0) > > +#define FLD_MERGE_RST BIT(4) > > +#define FLD_MERGE_LR_SWAP BIT(8) > > +#define FLD_MERGE_DCM_DIS BIT(12) > > + > > +#define DISP_MERGE_CFG_0 0x010 > > +#define DISP_MERGE_CFG_4 0x020 > > +#define DISP_MERGE_CFG_10 0x038 > > +#define DISP_MERGE_CFG_12 0x040 > > +#define CFG_10_10_1PI_2PO_BUF_MODE 6 > > +#define CFG_10_10_2PI_2PO_BUF_MODE 8 > > +#define DISP_MERGE_CFG_24 0x070 > > +#define DISP_MERGE_CFG_25 0x074 > > + > > +#define DISP_MERGE_CFG_36 0x0a0 > > +#define DISP_MERGE_CFG_36_FLD_ULTRA_EN GENMASK(0, 0) > > +#define DISP_MERGE_CFG_36_FLD_PREULTRA_EN GENMASK(4, 4) > > +#define DISP_MERGE_CFG_36_FLD_HALT_FOR_DVFS_EN GENMASK(8, 8) > > +#define DISP_MERGE_CFG_37 0x0a4 > > +#define DISP_MERGE_CFG_37_FLD_BUFFER_MODE GENMASK(1, 0) > > +#define DISP_MERGE_CFG_38 0x0a8 > > +#define DISP_MERGE_CFG_38_FLD_VDE_BLOCK_ULTRA GENMASK(0, 0) > > +#define DISP_MERGE_CFG_38_FLD_VALID_TH_BLOCK_ULTRA GENMASK(4, 4) > > +#define DISP_MERGE_CFG_38_FLD_ULTRA_FIFO_VALID_TH GENMASK(31, 16) > > +#define DISP_MERGE_CFG_39 0x0ac > > +#define DISP_MERGE_CFG_39_FLD_NVDE_FORCE_PREULTRA GENMASK(8, 8) > > +#define DISP_MERGE_CFG_39_FLD_NVALID_TH_FORCE_PREULTRA GENMASK(12, > > 12) > > +#define DISP_MERGE_CFG_39_FLD_PREULTRA_FIFO_VALID_TH GENMASK(31, > > 16) > > +#define DISP_MERGE_CFG_40 0x0b0 > > +#define DISP_MERGE_CFG_40_FLD_ULTRA_TH_LOW GENMASK(15, 0) > > +#define DISP_MERGE_CFG_40_FLD_ULTRA_TH_HIGH GENMASK(31, 16) > > +#define DISP_MERGE_CFG_41 0x0b4 > > +#define DISP_MERGE_CFG_41_FLD_PREULTRA_TH_LOW
Re: [PATCH v5 5/6] drm/mediatek: add DSC support for mt8195
Hi CK,
On Sat, 2021-07-31 at 07:11 +0800, Chun-Kuang Hu wrote:
> Hi, Jason:
>
> jason-jh.lin 於 2021年7月30日 週五 上午1:07寫道：
> >
> > Add DSC into mtk_drm_ddp_comp to support for mt8195.
> >
> > DSC is designed for real-time systems with real-time compression,
> > transmission, decompression and display.
> > The DSC standard is a specification of the algorithms used for
> > compressing and decompressing image display streams, including
> > the specification of the syntax and semantics of the compressed
> > video bit stream.
> >
> > Signed-off-by: jason-jh.lin
> > ---
> > This patch is base on [1]
> >
> > [1]add mt8195 SoC DRM binding
> > -
> > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597__;!!CTRNKA9wMg0ARbw!yW7OLcmG5NUkhK7gDxpSuiBPXTW3QQQ__H78vj20PuPuz37kA6ixuMCBoUy6Wq1ohY03$
> >
> > ---
> > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 46
> > +
> > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
> > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +
> > 3 files changed, 49 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > index 75bc00e17fc4..6f4a9b8c9914 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> > @@ -65,6 +65,12 @@
> > #define DITHER_ADD_LSHIFT_G(x) (((x) & 0x7) << 4)
> > #define DITHER_ADD_RSHIFT_G(x) (((x) & 0x7) << 0)
> >
> > +#define DISP_REG_DSC_CON 0x
> > +#define DSC_EN BIT(0)
> > +#define DSC_DUAL_INOUT BIT(2)
> > +#define DSC_BYPASS BIT(4)
> > +#define DSC_UFOE_SEL BIT(16)
> > +
> > struct mtk_ddp_comp_dev {
> > struct clk *clk;
> > void __iomem *regs;
> > @@ -246,6 +252,35 @@ static void mtk_dither_stop(struct device
> > *dev)
> > writel_relaxed(0x0, priv->regs + DISP_DITHER_EN);
> > }
> >
> > +static void mtk_dsc_config(struct device *dev, unsigned int w,
> > + unsigned int h, unsigned int vrefresh,
> > + unsigned int bpc, struct cmdq_pkt
> > *cmdq_pkt)
> > +{
> > + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> > +
> > + /* dsc bypass mode */
> > + mtk_ddp_write_mask(cmdq_pkt, DSC_BYPASS, >cmdq_reg,
> > priv->regs,
> > + DISP_REG_DSC_CON, DSC_BYPASS);
> > + mtk_ddp_write_mask(cmdq_pkt, DSC_UFOE_SEL, >cmdq_reg,
> > priv->regs,
> > + DISP_REG_DSC_CON, DSC_UFOE_SEL);
> > + mtk_ddp_write_mask(cmdq_pkt, DSC_DUAL_INOUT,
> > >cmdq_reg, priv->regs,
> > + DISP_REG_DSC_CON, DSC_DUAL_INOUT);
> > +}
> > +
> > +static void mtk_dsc_start(struct device *dev)
> > +{
> > + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> > +
> > + writel_relaxed(DSC_EN, >regs + DISP_REG_DSC_CON);
> > +}
> > +
> > +static void mtk_dsc_stop(struct device *dev)
> > +{
> > + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> > +
> > + writel_relaxed(0x0, priv->regs + DISP_REG_DSC_CON);
> > +}
> > +
> > static const struct mtk_ddp_comp_funcs ddp_aal = {
> > .clk_enable = mtk_ddp_clk_enable,
> > .clk_disable = mtk_ddp_clk_disable,
> > @@ -284,6 +319,14 @@ static const struct mtk_ddp_comp_funcs ddp_dpi
> > = {
> > .stop = mtk_dpi_stop,
> > };
> >
> > +static const struct mtk_ddp_comp_funcs ddp_dsc = {
> > + .clk_enable = mtk_ddp_clk_enable,
> > + .clk_disable = mtk_ddp_clk_disable,
> > + .config = mtk_dsc_config,
> > + .start = mtk_dsc_start,
> > + .stop = mtk_dsc_stop,
> > +};
> > +
> > static const struct mtk_ddp_comp_funcs ddp_dsi = {
> > .start = mtk_dsi_ddp_start,
> > .stop = mtk_dsi_ddp_stop,
> > @@ -356,6 +399,7 @@ static const char * const
> > mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
> > [MTK_DISP_MUTEX] = "mutex",
> > [MTK_DISP_OD] = "od",
> > [MTK_DISP_BLS] = "bls",
> > + [MTK_DISP_DSC] = "dsc",
>
> Would you please send a patch to make alphabetic order then apply
> this patch?
>
OK, I'll send that.
> > };
> >
> > struct mtk_ddp_comp_match {
> > @@ -374,6 +418,8 @@ static const struct mtk_ddp_comp_match
> > mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
> > [DDP_COMPONENT_DITHER] = { MTK_DISP_DITHER,0,
> > _dither },
> > [DDP_COMPONENT_DPI0]= { MTK_DPI,0, _dpi
> > },
> > [DDP_COMPONENT_DPI1]= { MTK_DPI,1, _dpi
> > },
> > + [DDP_COMPONENT_DSC0]= { MTK_DISP_DSC, 0, _dsc
> > },
> > + [DDP_COMPONENT_DSC1]= { MTK_DISP_DSC, 1, _dsc
> > },
> > [DDP_COMPONENT_DSI0]= { MTK_DSI,0, _dsi
> > },
> > [DDP_COMPONENT_DSI1]= { MTK_DSI,1, _dsi
> > },
> >
[PATCH v6 3/7] soc: mediatek: add mtk-mutex support for mt8195 vdosys0
Add mtk-mutex support for mt8195 vdosys0.
Signed-off-by: jason-jh.lin
---
This patch is base on [1]
[1] dt-bindings: mediatek: display: add mt8195 SoC binding
https://patchwork.kernel.org/project/linux-mediatek/patch/20210805171346.24249-5-jason-jh@mediatek.com/
---
drivers/soc/mediatek/mtk-mutex.c | 93 ++--
1 file changed, 90 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index 2e4bcc300576..cb8bbf7f3fd8 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -17,6 +17,9 @@
#define MT8183_MUTEX0_MOD0 0x30
#define MT8183_MUTEX0_SOF0 0x2c
+#define MT8195_DISP_MUTEX0_MOD00x30
+#define MT8195_DISP_MUTEX0_SOF 0x2c
+
#define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
#define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
#define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
@@ -67,6 +70,36 @@
#define MT8173_MUTEX_MOD_DISP_PWM1 24
#define MT8173_MUTEX_MOD_DISP_OD 25
+#define MT8195_MUTEX_MOD_DISP_OVL0 0
+#define MT8195_MUTEX_MOD_DISP_WDMA01
+#define MT8195_MUTEX_MOD_DISP_RDMA02
+#define MT8195_MUTEX_MOD_DISP_COLOR0 3
+#define MT8195_MUTEX_MOD_DISP_CCORR0 4
+#define MT8195_MUTEX_MOD_DISP_AAL0 5
+#define MT8195_MUTEX_MOD_DISP_GAMMA0 6
+#define MT8195_MUTEX_MOD_DISP_DITHER0 7
+#define MT8195_MUTEX_MOD_DISP_DSI0 8
+#define MT8195_MUTEX_MOD_DISP_DSC_WRAP0_CORE0 9
+#define MT8195_MUTEX_MOD_DISP_OVL1 10
+#define MT8195_MUTEX_MOD_DISP_WDMA111
+#define MT8195_MUTEX_MOD_DISP_RDMA112
+#define MT8195_MUTEX_MOD_DISP_COLOR1 13
+#define MT8195_MUTEX_MOD_DISP_CCORR1 14
+#define MT8195_MUTEX_MOD_DISP_AAL1 15
+#define MT8195_MUTEX_MOD_DISP_GAMMA1 16
+#define MT8195_MUTEX_MOD_DISP_DITHER1 17
+#define MT8195_MUTEX_MOD_DISP_DSI1 18
+#define MT8195_MUTEX_MOD_DISP_DSC_WRAP0_CORE1 19
+#define MT8195_MUTEX_MOD_DISP_VPP_MERGE20
+#define MT8195_MUTEX_MOD_DISP_DP_INTF0 21
+#define MT8195_MUTEX_MOD_DISP_VPP1_DL_RELAY0 22
+#define MT8195_MUTEX_MOD_DISP_VPP1_DL_RELAY1 23
+#define MT8195_MUTEX_MOD_DISP_VDO1_DL_RELAY2 24
+#define MT8195_MUTEX_MOD_DISP_VDO0_DL_RELAY3 25
+#define MT8195_MUTEX_MOD_DISP_VDO0_DL_RELAY4 26
+#define MT8195_MUTEX_MOD_DISP_PWM0 27
+#define MT8195_MUTEX_MOD_DISP_PWM1 28
+
#define MT2712_MUTEX_MOD_DISP_PWM2 10
#define MT2712_MUTEX_MOD_DISP_OVL0 11
#define MT2712_MUTEX_MOD_DISP_OVL1 12
@@ -101,12 +134,27 @@
#define MT2712_MUTEX_SOF_DSI3 6
#define MT8167_MUTEX_SOF_DPI0 2
#define MT8167_MUTEX_SOF_DPI1 3
+
#define MT8183_MUTEX_SOF_DSI0 1
#define MT8183_MUTEX_SOF_DPI0 2
#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_SOF_DSI0 << 6)
#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_SOF_DPI0 << 6)
+#define MT8195_MUTEX_SOF_DSI0 1
+#define MT8195_MUTEX_SOF_DSI1 2
+#define MT8195_MUTEX_SOF_DP_INTF0 3
+#define MT8195_MUTEX_SOF_DP_INTF1 4
+#define MT8195_MUTEX_SOF_DPI0 6 /* for HDMI_TX */
+#define MT8195_MUTEX_SOF_DPI1 5 /* for digital video out */
+
+#define MT8195_MUTEX_EOF_DSI0 (MT8195_MUTEX_SOF_DSI0 << 7)
+#define MT8195_MUTEX_EOF_DSI1 (MT8195_MUTEX_SOF_DSI1 << 7)
+#define MT8195_MUTEX_EOF_DP_INTF0 (MT8195_MUTEX_SOF_DP_INTF0 << 7)
+#define MT8195_MUTEX_EOF_DP_INTF1 (MT8195_MUTEX_SOF_DP_INTF1 << 7)
+#define MT8195_MUTEX_EOF_DPI0 (MT8195_MUTEX_SOF_DPI0 << 7)
+#define MT8195_MUTEX_EOF_DPI1 (MT8195_MUTEX_SOF_DPI1 << 7)
+
struct mtk_mutex {
int id;
bool claimed;
@@ -120,6 +168,9 @@ enum mtk_mutex_sof_id {
MUTEX_SOF_DPI1,
MUTEX_SOF_DSI2,
MUTEX_SOF_DSI3,
+ MUTEX_SOF_DP_INTF0,
+ MUTEX_SOF_DP_INTF1,
+ DDP_MUTEX_SOF_MAX,
};
struct mtk_mutex_data {
@@ -214,7 +265,22 @@ static const unsigned int
mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
[DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
};
-static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
+static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = {
+ [DDP_COMPONENT_OVL0] = MT8195_MUTEX_MOD_DISP_OVL0,
+ [DDP_COMPONENT_WDMA0] = MT8195_MUTEX_MOD_DISP_WDMA0,
+ [DDP_COMPONENT_RDMA0] = MT8195_MUTEX_MOD_DISP_RDMA0,
+ [DDP_COMPONENT_COLOR0] = MT8195_MUTEX_MOD_DISP_COLOR0,
+ [DDP_COMPONENT_CCORR] = MT8195_MUTEX_MOD_DISP_CCORR0,
+ [DDP_COMPONENT_AAL0] = MT8195_MUTEX_MOD_DISP_AAL0,
[PATCH v6 6/7] drm/mediatek: add MERGE support for mediatek-drm
Add MERGE engine file:
MERGE module is used to merge two slice-per-line inputs
into one side-by-side output.
Signed-off-by: jason-jh.lin
---
This patch is base on [1]
[1] dt-bindings: mediatek: display: add mt8195 SoC binding
https://patchwork.kernel.org/project/linux-mediatek/patch/20210805171346.24249-5-jason-jh@mediatek.com/
---
drivers/gpu/drm/mediatek/Makefile | 1 +
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 8 +
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 263
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 +
6 files changed, 277 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_merge.c
diff --git a/drivers/gpu/drm/mediatek/Makefile
b/drivers/gpu/drm/mediatek/Makefile
index dc54a7a69005..538e0087a44c 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -3,6 +3,7 @@
mediatek-drm-y := mtk_disp_ccorr.o \
mtk_disp_color.o \
mtk_disp_gamma.o \
+ mtk_disp_merge.o \
mtk_disp_ovl.o \
mtk_disp_rdma.o \
mtk_drm_crtc.o \
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index cafd9df2d63b..f407cd9d873e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -46,6 +46,14 @@ void mtk_gamma_set_common(void __iomem *regs, struct
drm_crtc_state *state);
void mtk_gamma_start(struct device *dev);
void mtk_gamma_stop(struct device *dev);
+int mtk_merge_clk_enable(struct device *dev);
+void mtk_merge_clk_disable(struct device *dev);
+void mtk_merge_config(struct device *dev, unsigned int width,
+ unsigned int height, unsigned int vrefresh,
+ unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
+void mtk_merge_start(struct device *dev);
+void mtk_merge_stop(struct device *dev);
+
void mtk_ovl_bgclr_in_on(struct device *dev);
void mtk_ovl_bgclr_in_off(struct device *dev);
void mtk_ovl_bypass_shadow(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
new file mode 100644
index ..f3d262792054
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
@@ -0,0 +1,263 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 MediaTek Inc.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "mtk_drm_ddp_comp.h"
+#include "mtk_drm_drv.h"
+#include "mtk_disp_drv.h"
+
+#define DISP_REG_MERGE_CTRL0x000
+#define MERGE_EN 1
+#define DISP_REG_MERGE_CFG_0 0x010
+#define DISP_REG_MERGE_CFG_4 0x020
+#define DISP_REG_MERGE_CFG_10 0x038
+/* no swap */
+#define SWAP_MODE 0
+#define FLD_SWAP_MODE GENMASK(4, 0)
+#define DISP_REG_MERGE_CFG_12 0x040
+#define CFG_10_10_1PI_2PO_BUF_MODE 6
+#define CFG_10_10_2PI_2PO_BUF_MODE 8
+#define FLD_CFG_MERGE_MODE GENMASK(4, 0)
+#define DISP_REG_MERGE_CFG_24 0x070
+#define DISP_REG_MERGE_CFG_25 0x074
+#define DISP_REG_MERGE_CFG_36 0x0a0
+#define ULTRA_EN 1
+#define PREULTRA_EN1
+#define HALT_FOR_DVFS_EN 0
+#define FLD_ULTRA_EN GENMASK(0, 0)
+#define FLD_PREULTRA_ENGENMASK(4, 4)
+#define FLD_HALT_FOR_DVFS_EN GENMASK(8, 8)
+#define DISP_REG_MERGE_CFG_37 0x0a4
+/* 0: Off, 1: SRAM0, 2: SRAM1, 3: SRAM0 + SRAM1 */
+#define BUFFER_MODE3
+#define FLD_BUFFER_MODEGENMASK(1, 0)
+#define DISP_REG_MERGE_CFG_38 0x0a8
+#define FLD_VDE_BLOCK_ULTRAGENMASK(0, 0)
+#define FLD_VALID_TH_BLOCK_ULTRA GENMASK(4, 4)
+#define FLD_ULTRA_FIFO_VALID_THGENMASK(31, 16)
+#define DISP_REG_MERGE_CFG_39 0x0ac
+#define FLD_NVDE_FORCE_PREULTRAGENMASK(8, 8)
+#define FLD_NVALID_TH_FORCE_PREULTRA GENMASK(12, 12)
+#define FLD_PREULTRA_FIFO_VALID_TH GENMASK(31, 16)
+#define DISP_REG_MERGE_CFG_40 0x0b0
+/* 6 us, 600M pixel/sec */
+#define ULTRA_TH_LOW (6 * 600)
+/* 8 us, 600M pixel/sec */
+#define ULTRA_TH_HIGH (8 * 600)
+#define FLD_ULTRA_TH_LOW GENMASK(15, 0)
+#define FLD_ULTRA_TH_HIGH GENMASK(31, 16)
+#define DISP_REG_MERGE_CFG_41 0x0b4
+/* 8 us, 600M pixel/sec */
+#define PREULTRA_TH_LOW(8 * 600)
+/* 9 us, 600M pixel/sec */
+#define PREULTRA_TH_HIGH (9 * 600)
+#define FLD_PREULTRA_TH_LOWGENMASK(15, 0)
+#define FLD_PREULTRA_TH_HIGH GENMASK(31, 16)
+
+struct mtk_disp_merge {
+ void __iomem *regs;
+ struct clk *clk;
+
[PATCH v6 1/7] arm64: dts: mt8195: add display node for vdosys0
Add display node for vdosys0.
Signed-off-by: jason-jh.lin
---
This patch is based on [1][2][3][4]
[1]arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile
-
https://patchwork.kernel.org/project/linux-mediatek/patch/20210601075350.31515-2-seiya.w...@mediatek.com/
[2]arm64: dts: mt8195: add IOMMU and smi nodes
-
https://patchwork.kernel.org/project/linux-mediatek/patch/20210615173233.26682-15-tinghan.s...@mediatek.com/
[3]arm64: dts: mt8195: add gce node
-
https://patchwork.kernel.org/project/linux-mediatek/patch/20210705053429.4380-4-jason-jh@mediatek.com/
[4]add mt8195 SoC DRM binding
https://patchwork.kernel.org/project/linux-mediatek/list/?series=527069
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 112 +++
1 file changed, 112 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 04d3e95175fa..4fa47cb2bede 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1155,9 +1155,121 @@
#clock-cells = <1>;
};
+ ovl0: disp_ovl@1c00 {
+ compatible = "mediatek,mt8195-disp-ovl",
+"mediatek,mt8183-disp-ovl";
+ reg = <0 0x1c00 0 0x1000>;
+ interrupts = ;
+ power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+ clocks = < CLK_VDO0_DISP_OVL0>;
+ iommus = <_vdo M4U_PORT_L0_DISP_OVL0_RDMA0>;
+ mediatek,gce-client-reg =
+< SUBSYS_1c00 0x 0x1000>;
+ };
+
+ rdma0: disp_rdma@1c002000 {
+ compatible = "mediatek,mt8195-disp-rdma";
+ reg = <0 0x1c002000 0 0x1000>;
+ interrupts = ;
+ power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+ clocks = < CLK_VDO0_DISP_RDMA0>;
+ iommus = <_vdo M4U_PORT_L0_DISP_RDMA0>;
+ mediatek,gce-client-reg =
+< SUBSYS_1c00 0x2000 0x1000>;
+ };
+
+ color0: disp_color@1c003000 {
+ compatible = "mediatek,mt8195-disp-color",
+"mediatek,mt8173-disp-color";
+ reg = <0 0x1c003000 0 0x1000>;
+ interrupts = ;
+ power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+ clocks = < CLK_VDO0_DISP_COLOR0>;
+ mediatek,gce-client-reg =
+< SUBSYS_1c00 0x3000 0x1000>;
+ };
+
+ ccorr0: disp_ccorr@1c004000 {
+ compatible = "mediatek,mt8195-disp-ccorr",
+"mediatek,mt8183-disp-ccorr";
+ reg = <0 0x1c004000 0 0x1000>;
+ interrupts = ;
+ power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+ clocks = < CLK_VDO0_DISP_CCORR0>;
+ mediatek,gce-client-reg =
+< SUBSYS_1c00 0x4000 0x1000>;
+ };
+
+ aal0: disp_aal@1c005000 {
+ compatible = "mediatek,mt8195-disp-aal",
+"mediatek,mt8173-disp-aal";
+ reg = <0 0x1c005000 0 0x1000>;
+ interrupts = ;
+ power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+ clocks = < CLK_VDO0_DISP_AAL0>;
+ mediatek,gce-client-reg =
+< SUBSYS_1c00 0x5000 0x1000>;
+ };
+
+ gamma0: disp_gamma@1c006000 {
+ compatible = "mediatek,mt8195-disp-gamma",
+"mediatek,mt8173-disp-gamma";
+ reg = <0 0x1c006000 0 0x1000>;
+ interrupts = ;
+ power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+ clocks = < CLK_VDO0_DISP_GAMMA0>;
+ mediatek,gce-client-reg =
+< SUBSYS_1c00 0x6000 0x1000>;
+ };
+
+ dither0: disp_dither@1c007000 {
+ compatible = "mediatek,mt8195-disp-dither",
+"mediatek,mt8183-disp-dither";
+ reg = <0 0x1c007000 0 0x1000>;
+ interrupts = ;
+ power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+ clocks = < CLK_VDO0_DISP_DITHER0>;
+ mediatek,gce-client-reg =
+< SUBSYS_1c00 0x7000 0x1000>;
+ };
+
+ dsc0:
[PATCH v6 5/7] drm/mediatek: add DSC support for mediatek-drm
DSC is designed for real-time systems with real-time compression,
transmission, decompression and display.
The DSC standard is a specification of the algorithms used for
compressing and decompressing image display streams, including
the specification of the syntax and semantics of the compressed
video bit stream.
Signed-off-by: jason-jh.lin
---
This patch is base on [1]
[1] dt-bindings: mediatek: add mediatek, dsc.yaml for mt8195 SoC binding
https://patchwork.kernel.org/project/linux-mediatek/patch/20210805171346.24249-4-jason-jh@mediatek.com/
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 62 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
2 files changed, 63 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 328ee19f931e..24c7b004fe4d 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -43,6 +43,12 @@
#define DITHER_LSB_ERR_SHIFT_G(x) (((x) & 0x7) << 12)
#define DITHER_ADD_LSHIFT_G(x) (((x) & 0x7) << 4)
+#define DISP_REG_DSC_CON 0x
+#define DSC_EN BIT(0)
+#define DSC_DUAL_INOUT BIT(2)
+#define DSC_BYPASS BIT(4)
+#define DSC_UFOE_SEL BIT(16)
+
#define DISP_REG_OD_EN 0x
#define DISP_REG_OD_CFG0x0020
#define OD_RELAYMODE BIT(0)
@@ -209,6 +215,35 @@ static void mtk_dither_set(struct device *dev, unsigned
int bpc,
DISP_DITHERING, cmdq_pkt);
}
+static void mtk_dsc_config(struct device *dev, unsigned int w,
+ unsigned int h, unsigned int vrefresh,
+ unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+ struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+ /* dsc bypass mode */
+ mtk_ddp_write_mask(cmdq_pkt, DSC_BYPASS, >cmdq_reg, priv->regs,
+ DISP_REG_DSC_CON, DSC_BYPASS);
+ mtk_ddp_write_mask(cmdq_pkt, DSC_UFOE_SEL, >cmdq_reg, priv->regs,
+ DISP_REG_DSC_CON, DSC_UFOE_SEL);
+ mtk_ddp_write_mask(cmdq_pkt, DSC_DUAL_INOUT, >cmdq_reg,
priv->regs,
+ DISP_REG_DSC_CON, DSC_DUAL_INOUT);
+}
+
+static void mtk_dsc_start(struct device *dev)
+{
+ struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+ writel_relaxed(DSC_EN, >regs + DISP_REG_DSC_CON);
+}
+
+static void mtk_dsc_stop(struct device *dev)
+{
+ struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
+
+ writel_relaxed(0x0, priv->regs + DISP_REG_DSC_CON);
+}
+
static void mtk_od_config(struct device *dev, unsigned int w,
unsigned int h, unsigned int vrefresh,
unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
@@ -272,6 +307,14 @@ static const struct mtk_ddp_comp_funcs ddp_dpi = {
.stop = mtk_dpi_stop,
};
+static const struct mtk_ddp_comp_funcs ddp_dsc = {
+ .clk_enable = mtk_ddp_clk_enable,
+ .clk_disable = mtk_ddp_clk_disable,
+ .config = mtk_dsc_config,
+ .start = mtk_dsc_start,
+ .stop = mtk_dsc_stop,
+};
+
static const struct mtk_ddp_comp_funcs ddp_dsi = {
.start = mtk_dsi_ddp_start,
.stop = mtk_dsi_ddp_stop,
@@ -286,6 +329,14 @@ static const struct mtk_ddp_comp_funcs ddp_gamma = {
.stop = mtk_gamma_stop,
};
+static const struct mtk_ddp_comp_funcs ddp_merge = {
+ .clk_enable = mtk_merge_clk_enable,
+ .clk_disable = mtk_merge_clk_disable,
+ .start = mtk_merge_start,
+ .stop = mtk_merge_stop,
+ .config = mtk_merge_config,
+};
+
static const struct mtk_ddp_comp_funcs ddp_od = {
.clk_enable = mtk_ddp_clk_enable,
.clk_disable = mtk_ddp_clk_disable,
@@ -333,7 +384,9 @@ static const char * const
mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
[MTK_DISP_CCORR] = "ccorr",
[MTK_DISP_COLOR] = "color",
[MTK_DISP_DITHER] = "dither",
+ [MTK_DISP_DSC] = "dsc",
[MTK_DISP_GAMMA] = "gamma",
+ [MTK_DISP_MERGE] = "merge",
[MTK_DISP_MUTEX] = "mutex",
[MTK_DISP_OD] = "od",
[MTK_DISP_OVL] = "ovl",
@@ -362,11 +415,19 @@ static const struct mtk_ddp_comp_match
mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
[DDP_COMPONENT_DITHER] = { MTK_DISP_DITHER,0, _dither },
[DDP_COMPONENT_DPI0]= { MTK_DPI,0, _dpi },
[DDP_COMPONENT_DPI1]= { MTK_DPI,1, _dpi },
+ [DDP_COMPONENT_DSC0]= { MTK_DISP_DSC, 0, _dsc },
+ [DDP_COMPONENT_DSC1]= { MTK_DISP_DSC, 1, _dsc },
[DDP_COMPONENT_DSI0]= { MTK_DSI,0, _dsi },
[DDP_COMPONENT_DSI1]= { MTK_DSI,1, _dsi },
[DDP_COMPONENT_DSI2]= { MTK_DSI,2, _dsi
[PATCH v6 7/7] drm/mediatek: add mediatek-drm of vdosys0 support for mt8195
Add driver data of mt8195 vdosys0 to mediatek-drm and the sub driver.
Signed-off-by: jason-jh.lin
---
This patch is base on [1]
[1] dt-bindings: mediatek: display: add mt8195 SoC binding
https://patchwork.kernel.org/project/linux-mediatek/patch/20210805171346.24249-5-jason-jh@mediatek.com/
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 28
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index 728aaadfea8c..00e9827acefe 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -355,6 +355,10 @@ static const struct mtk_disp_rdma_data
mt8183_rdma_driver_data = {
.fifo_size = 5 * SZ_1K,
};
+static const struct mtk_disp_rdma_data mt8195_rdma_driver_data = {
+ .fifo_size = 1920,
+};
+
static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
{ .compatible = "mediatek,mt2701-disp-rdma",
.data = _rdma_driver_data},
@@ -362,6 +366,8 @@ static const struct of_device_id
mtk_disp_rdma_driver_dt_match[] = {
.data = _rdma_driver_data},
{ .compatible = "mediatek,mt8183-disp-rdma",
.data = _rdma_driver_data},
+ { .compatible = "mediatek,mt8195-disp-rdma",
+ .data = _rdma_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 5eb9c0a04447..9aebf73144c6 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -147,6 +147,19 @@ static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
DDP_COMPONENT_DPI0,
};
+static const enum mtk_ddp_comp_id mt8195_mtk_ddp_main[] = {
+ DDP_COMPONENT_OVL0,
+ DDP_COMPONENT_RDMA0,
+ DDP_COMPONENT_COLOR0,
+ DDP_COMPONENT_CCORR,
+ DDP_COMPONENT_AAL0,
+ DDP_COMPONENT_GAMMA,
+ DDP_COMPONENT_DITHER,
+ DDP_COMPONENT_DSC0,
+ DDP_COMPONENT_MERGE0,
+ DDP_COMPONENT_DP_INTF0,
+};
+
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
.main_path = mt2701_mtk_ddp_main,
.main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
@@ -186,6 +199,11 @@ static const struct mtk_mmsys_driver_data
mt8183_mmsys_driver_data = {
.ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext),
};
+static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
+ .main_path = mt8195_mtk_ddp_main,
+ .main_len = ARRAY_SIZE(mt8195_mtk_ddp_main),
+};
+
static int mtk_drm_kms_init(struct drm_device *drm)
{
struct mtk_drm_private *private = drm->dev_private;
@@ -406,10 +424,14 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DISP_COLOR },
{ .compatible = "mediatek,mt8183-disp-dither",
.data = (void *)MTK_DISP_DITHER },
+ { .compatible = "mediatek,mt8195-disp-dsc",
+ .data = (void *)MTK_DISP_DSC },
{ .compatible = "mediatek,mt8173-disp-gamma",
.data = (void *)MTK_DISP_GAMMA, },
{ .compatible = "mediatek,mt8183-disp-gamma",
.data = (void *)MTK_DISP_GAMMA, },
+ { .compatible = "mediatek,mt8195-disp-merge",
+ .data = (void *)MTK_DISP_MERGE },
{ .compatible = "mediatek,mt2701-disp-mutex",
.data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt2712-disp-mutex",
@@ -418,6 +440,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt8183-disp-mutex",
.data = (void *)MTK_DISP_MUTEX },
+ { .compatible = "mediatek,mt8195-disp-mutex",
+ .data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt8173-disp-od",
.data = (void *)MTK_DISP_OD },
{ .compatible = "mediatek,mt2701-disp-ovl",
@@ -438,6 +462,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DISP_RDMA },
{ .compatible = "mediatek,mt8183-disp-rdma",
.data = (void *)MTK_DISP_RDMA },
+ { .compatible = "mediatek,mt8195-disp-rdma",
+ .data = (void *)MTK_DISP_RDMA },
{ .compatible = "mediatek,mt8173-disp-ufoe",
.data = (void *)MTK_DISP_UFOE },
{ .compatible = "mediatek,mt8173-disp-wdma",
@@ -468,6 +494,8 @@ static const struct of_device_id mtk_drm_of_ids[] = {
.data = _mmsys_driver_data},
{ .compatible = "mediatek,mt8183-mmsys",
.data = _mmsys_driver_data},
+ {.compatible = "mediatek,mt8195-vdosys0",
+ .data = _vdosys0_driver_data},
{ }
};
MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);
--
2.18.0
[PATCH v6 2/7] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0
Add mt8195 vdosys0 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: jason-jh.lin
---
This patch is base on [1]
[1] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding
https://patchwork.kernel.org/project/linux-mediatek/patch/20210805171346.24249-2-jason-jh@mediatek.com/
---
drivers/soc/mediatek/mt8195-mmsys.h| 96 ++
drivers/soc/mediatek/mtk-mmsys.c | 11 +++
include/linux/soc/mediatek/mtk-mmsys.h | 9 +++
3 files changed, 116 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h
diff --git a/drivers/soc/mediatek/mt8195-mmsys.h
b/drivers/soc/mediatek/mt8195-mmsys.h
new file mode 100644
index ..9339a786ec5d
--- /dev/null
+++ b/drivers/soc/mediatek/mt8195-mmsys.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT8195_MMSYS_H
+#define __SOC_MEDIATEK_MT8195_MMSYS_H
+
+#define MT8195_VDO0_OVL_MOUT_EN0xf14
+#define MT8195_MOUT_DISP_OVL0_TO_DISP_RDMA0BIT(0)
+#define MT8195_MOUT_DISP_OVL0_TO_DISP_WDMA0BIT(1)
+#define MT8195_MOUT_DISP_OVL0_TO_DISP_OVL1 BIT(2)
+#define MT8195_MOUT_DISP_OVL1_TO_DISP_RDMA1BIT(4)
+#define MT8195_MOUT_DISP_OVL1_TO_DISP_WDMA1BIT(5)
+#define MT8195_MOUT_DISP_OVL1_TO_DISP_OVL0 BIT(6)
+
+#define MT8195_VDO0_SEL_IN 0xf34
+#define MT8195_SEL_IN_VPP_MERGE_FROM_DSC_WRAP0_OUT (0 << 0)
+#define MT8195_SEL_IN_VPP_MERGE_FROM_DISP_DITHER1 (1 << 0)
+#define MT8195_SEL_IN_VPP_MERGE_FROM_VDO1_VIRTUAL0 (2 << 0)
+#define MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0 (0 << 4)
+#define MT8195_SEL_IN_DSC_WRAP0_IN_FROM_VPP_MERGE (1 << 4)
+#define MT8195_SEL_IN_DSC_WRAP1_IN_FROM_DISP_DITHER1 (0 << 5)
+#define MT8195_SEL_IN_DSC_WRAP1_IN_FROM_VPP_MERGE (1 << 5)
+#define MT8195_SEL_IN_SINA_VIRTUAL0_FROM_VPP_MERGE (0 << 8)
+#define MT8195_SEL_IN_SINA_VIRTUAL0_FROM_DSC_WRAP1_OUT (1 << 8)
+#define MT8195_SEL_IN_SINB_VIRTUAL0_FROM_DSC_WRAP0_OUT (0 << 9)
+#define MT8195_SEL_IN_DP_INTF0_FROM_DSC_WRAP1_OUT (0 << 12)
+#define MT8195_SEL_IN_DP_INTF0_FROM_VPP_MERGE (1 << 12)
+#define MT8195_SEL_IN_DP_INTF0_FROM_VDO1_VIRTUAL0 (2 << 12)
+#define MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT (0 << 16)
+#define MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0 (1 << 16)
+#define MT8195_SEL_IN_DSI1_FROM_DSC_WRAP1_OUT (0 << 17)
+#define MT8195_SEL_IN_DSI1_FROM_VPP_MERGE (1 << 17)
+#define MT8195_SEL_IN_DISP_WDMA1_FROM_DISP_OVL1(0 <<
20)
+#define MT8195_SEL_IN_DISP_WDMA1_FROM_VPP_MERGE(1 <<
20)
+#define MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DSC_WRAP1_IN (0 << 21)
+#define MT8195_SEL_IN_DSC_WRAP1_OUT_FROM_DISP_DITHER1 (1 << 21)
+#define MT8195_SEL_IN_DISP_WDMA0_FROM_DISP_OVL0(0 <<
22)
+#define MT8195_SEL_IN_DISP_WDMA0_FROM_VPP_MERGE(1 <<
22)
+
+#define MT8195_VDO0_SEL_OUT0xf38
+#define MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN (0 << 0)
+#define MT8195_SOUT_DISP_DITHER0_TO_DSI0 (1 << 0)
+#define MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_IN (0 << 1)
+#define MT8195_SOUT_DISP_DITHER1_TO_VPP_MERGE (1 << 1)
+#define MT8195_SOUT_DISP_DITHER1_TO_DSC_WRAP1_OUT (2 << 1)
+#define MT8195_SOUT_VDO1_VIRTUAL0_TO_VPP_MERGE (0 << 4)
+#define MT8195_SOUT_VDO1_VIRTUAL0_TO_DP_INTF0 (1 << 4)
+#define MT8195_SOUT_VPP_MERGE_TO_DSI1 (0 << 8)
+#define MT8195_SOUT_VPP_MERGE_TO_DP_INTF0 (1 << 8)
+#define MT8195_SOUT_VPP_MERGE_TO_SINA_VIRTUAL0 (2 << 8)
+#define MT8195_SOUT_VPP_MERGE_TO_DISP_WDMA1(3 << 8)
+#define MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP0_IN (4 << 8)
+#define MT8195_SOUT_VPP_MERGE_TO_DSC_WRAP1_IN (0 << 11)
+#define MT8195_SOUT_VPP_MERGE_TO_DISP_WDMA0(1 << 11)
+#define MT8195_SOUT_DSC_WRAP0_OUT_TO_DSI0 (0 << 12)
+#define MT8195_SOUT_DSC_WRAP0_OUT_TO_SINB_VIRTUAL0 (1 << 12)
+#define MT8195_SOUT_DSC_WRAP0_OUT_TO_VPP_MERGE (2 << 12)
+#define MT8195_SOUT_DSC_WRAP1_OUT_TO_DSI1 (0 << 16)
+#define MT8195_SOUT_DSC_WRAP1_OUT_TO_DP_INTF0 (1 << 16)
+#define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0 (2 << 16)
+#define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE (3 << 16)
+
+static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
+ {
+ DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
+
[PATCH v6 4/7] drm/mediatek: adjust to the alphabetic order for mediatek-drm
1. Adjust to the alphabetic order for the define, function, struct
and array in mediatek-drm driver
2. Remove the unsed define in mtk_drm_ddp_comp.c
Signed-off-by: jason-jh.lin
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 180 +---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 22 +--
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 76 -
3 files changed, 133 insertions(+), 145 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 75bc00e17fc4..328ee19f931e 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -20,50 +20,36 @@
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_crtc.h"
-#define DISP_OD_EN 0x
-#define DISP_OD_INTEN 0x0008
-#define DISP_OD_INTSTA 0x000c
-#define DISP_OD_CFG0x0020
-#define DISP_OD_SIZE 0x0030
-#define DISP_DITHER_5 0x0114
-#define DISP_DITHER_7 0x011c
-#define DISP_DITHER_15 0x013c
-#define DISP_DITHER_16 0x0140
-
-#define DISP_REG_UFO_START 0x
-
-#define DISP_AAL_EN0x
-#define DISP_AAL_SIZE 0x0030
+#define DISP_REG_AAL_EN0x
+#define AAL_EN BIT(0)
+#define DISP_REG_AAL_SIZE 0x0030
-#define DISP_DITHER_EN 0x
+#define DISP_REG_DITHER_EN 0x
#define DITHER_EN BIT(0)
-#define DISP_DITHER_CFG0x0020
+#define DISP_REG_DITHER_CFG0x0020
#define DITHER_RELAY_MODE BIT(0)
#define DITHER_ENGINE_EN BIT(1)
-#define DISP_DITHER_SIZE 0x0030
-
-#define LUT_10BIT_MASK 0x03ff
-
-#define OD_RELAYMODE BIT(0)
-
-#define UFO_BYPASS BIT(2)
-
-#define AAL_EN BIT(0)
-
#define DISP_DITHERING BIT(2)
+#define DISP_REG_DITHER_SIZE 0x0030
+#define DISP_REG_DITHER_5 0x0114
+#define DISP_REG_DITHER_7 0x011c
+#define DISP_REG_DITHER_15 0x013c
#define DITHER_LSB_ERR_SHIFT_R(x) (((x) & 0x7) << 28)
-#define DITHER_OVFLW_BIT_R(x) (((x) & 0x7) << 24)
#define DITHER_ADD_LSHIFT_R(x) (((x) & 0x7) << 20)
-#define DITHER_ADD_RSHIFT_R(x) (((x) & 0x7) << 16)
#define DITHER_NEW_BIT_MODEBIT(0)
+#define DISP_REG_DITHER_16 0x0140
#define DITHER_LSB_ERR_SHIFT_B(x) (((x) & 0x7) << 28)
-#define DITHER_OVFLW_BIT_B(x) (((x) & 0x7) << 24)
#define DITHER_ADD_LSHIFT_B(x) (((x) & 0x7) << 20)
-#define DITHER_ADD_RSHIFT_B(x) (((x) & 0x7) << 16)
#define DITHER_LSB_ERR_SHIFT_G(x) (((x) & 0x7) << 12)
-#define DITHER_OVFLW_BIT_G(x) (((x) & 0x7) << 8)
#define DITHER_ADD_LSHIFT_G(x) (((x) & 0x7) << 4)
-#define DITHER_ADD_RSHIFT_G(x) (((x) & 0x7) << 0)
+
+#define DISP_REG_OD_EN 0x
+#define DISP_REG_OD_CFG0x0020
+#define OD_RELAYMODE BIT(0)
+#define DISP_REG_OD_SIZE 0x0030
+
+#define DISP_REG_UFO_START 0x
+#define UFO_BYPASS BIT(2)
struct mtk_ddp_comp_dev {
struct clk *clk;
@@ -116,20 +102,6 @@ void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt,
unsigned int value,
#endif
}
-static int mtk_ddp_clk_enable(struct device *dev)
-{
- struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
-
- return clk_prepare_enable(priv->clk);
-}
-
-static void mtk_ddp_clk_disable(struct device *dev)
-{
- struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
-
- clk_disable_unprepare(priv->clk);
-}
-
void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg
*cmdq_reg,
unsigned int bpc, unsigned int cfg,
unsigned int dither_en, struct cmdq_pkt *cmdq_pkt)
@@ -139,55 +111,35 @@ void mtk_dither_set_common(void __iomem *regs, struct
cmdq_client_reg *cmdq_reg,
return;
if (bpc >= MTK_MIN_BPC) {
- mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5);
- mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7);
+ mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_REG_DITHER_5);
+ mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs,
[PATCH v6 0/7] Add Mediatek Soc DRM (vdosys0) support for mt8195
The hardware path of vdosys0 with eDP panel output need to go through by several modules, such as, OVL, RDMA, COLOR, CCORR, AAL, GAMMA, DITHER, DSC and MERGE. Change in v6: - adjust alphabetic order for mediatek-drm - move the patch that add mt8195 support for mediatek-drm as the lastest patch - add MERGE define for const varriable Change in v5: - add power-domain property into vdosys0 and vdosys1 dts node. - add MT8195 prifix and remove unused VDO1 define in mt8195-mmsys.h Change in v4: - extract dt-binding patches to another patch series https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597 - squash DSC module into mtk_drm_ddp_comp.c - add coment and simplify MERGE config function Change in v3: - change mmsys and display dt-bindings document from txt to yaml - add MERGE additional description in display dt-bindings document - fix mboxes-cells number of vdosys0 node in dts - drop mutex eof convert define - remove pm_runtime apis in DSC and MERGE - change DSC and MERGE enum to alphabetic order Change in v2: - add DSC yaml file - add mt8195 drm driver porting parts in to one patch - remove useless define, variable, structure member and function - simplify DSC and MERGE file and switch threre order jason-jh.lin (7): arm64: dts: mt8195: add display node for vdosys0 soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 soc: mediatek: add mtk-mutex support for mt8195 vdosys0 drm/mediatek: adjust to the alphabetic order for mediatek-drm drm/mediatek: add DSC support for mediatek-drm drm/mediatek: add MERGE support for mediatek-drm drm/mediatek: add mediatek-drm of vdosys0 support for mt8195 arch/arm64/boot/dts/mediatek/mt8195.dtsi| 112 + drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_disp_drv.h | 8 + drivers/gpu/drm/mediatek/mtk_disp_merge.c | 263 drivers/gpu/drm/mediatek/mtk_disp_rdma.c| 6 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 242 +++--- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 24 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 108 +--- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + drivers/soc/mediatek/mt8195-mmsys.h | 96 +++ drivers/soc/mediatek/mtk-mmsys.c| 11 + drivers/soc/mediatek/mtk-mutex.c| 93 ++- include/linux/soc/mediatek/mtk-mmsys.h | 9 + 13 files changed, 825 insertions(+), 149 deletions(-) create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_merge.c create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h -- 2.18.0
[PATCH v3 5/6] drm/msm/dp: return correct edid checksum after corrupted edid checksum read
Response with correct edid checksum saved at connector after corrupted edid
checksum read. This fixes Link Layer CTS cases 4.2.2.3, 4.2.2.6.
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_panel.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c
b/drivers/gpu/drm/msm/dp/dp_panel.c
index 88196f7..0fdb551 100644
--- a/drivers/gpu/drm/msm/dp/dp_panel.c
+++ b/drivers/gpu/drm/msm/dp/dp_panel.c
@@ -271,7 +271,7 @@ static u8 dp_panel_get_edid_checksum(struct edid *edid)
{
struct edid *last_block;
u8 *raw_edid;
- bool is_edid_corrupt;
+ bool is_edid_corrupt = false;
if (!edid) {
DRM_ERROR("invalid edid input\n");
@@ -303,7 +303,12 @@ void dp_panel_handle_sink_request(struct dp_panel
*dp_panel)
panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) {
- u8 checksum = dp_panel_get_edid_checksum(dp_panel->edid);
+ u8 checksum;
+
+ if (dp_panel->edid)
+ checksum = dp_panel_get_edid_checksum(dp_panel->edid);
+ else
+ checksum = dp_panel->connector->real_edid_checksum;
dp_link_send_edid_checksum(panel->link, checksum);
dp_link_send_test_response(panel->link);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 3/6] drm/msm/dp: reset aux controller after dp_aux_cmd_fifo_tx() failed.
Aux hardware calibration sequence requires resetting the aux controller
in order for the new setting to take effect. However resetting the AUX
controller will also clear HPD interrupt status which may accidentally
cause pending unplug interrupt to get lost. Therefore reset aux
controller only when link is in connection state when dp_aux_cmd_fifo_tx()
fail. This fixes Link Layer CTS cases 4.2.1.1 and 4.2.1.2.
Signed-off-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
---
drivers/gpu/drm/msm/dp/dp_aux.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c
index 4a3293b..eb40d84 100644
--- a/drivers/gpu/drm/msm/dp/dp_aux.c
+++ b/drivers/gpu/drm/msm/dp/dp_aux.c
@@ -353,6 +353,9 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
if (!(aux->retry_cnt % MAX_AUX_RETRIES))
dp_catalog_aux_update_cfg(aux->catalog);
}
+ /* reset aux if link is in connected state */
+ if (dp_catalog_link_is_connected(aux->catalog))
+ dp_catalog_aux_reset(aux->catalog);
} else {
aux->retry_cnt = 0;
switch (aux->aux_error_num) {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 6/6] drm/msm/dp: do not end dp link training until video is ready
Initialize both pre-emphasis and voltage swing level to 0 before
start link training and do not end link training until video is
ready to reduce the period between end of link training and video
start to meet Link Layer CTS requirement. Some dongle main link
symbol may become unlocked again if host did not end link training
soon enough after completion of link training 2. Host have to re
train main link if loss of symbol locked detected before end link
training so that the coming video stream can be transmitted to sink
properly. This fixes Link Layer CTS cases 4.3.2.1, 4.3.2.2, 4.3.2.3
and 4.3.2.4.
Changes in v3:
-- merge retrain link if loss of symbol locked happen into this patch
-- replace dp_ctrl_loss_symbol_lock() with dp_ctrl_channel_eq_ok()
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 56 +---
1 file changed, 41 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 0002805..ffed523 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1484,6 +1484,9 @@ static int dp_ctrl_link_maintenance(struct
dp_ctrl_private *ctrl)
dp_ctrl_push_idle(>dp_ctrl);
+ ctrl->link->phy_params.p_level = 0;
+ ctrl->link->phy_params.v_level = 0;
+
ctrl->dp_ctrl.pixel_rate = ctrl->panel->dp_mode.drm_mode.clock;
ret = dp_ctrl_setup_main_link(ctrl, _step);
@@ -1636,6 +1639,16 @@ static bool dp_ctrl_clock_recovery_any_ok(
return drm_dp_clock_recovery_ok(link_status, reduced_cnt);
}
+static bool dp_ctrl_channel_eq_ok(struct dp_ctrl_private *ctrl)
+{
+ u8 link_status[DP_LINK_STATUS_SIZE];
+ int num_lanes = ctrl->link->link_params.num_lanes;
+
+ dp_ctrl_read_link_status(ctrl, link_status);
+
+ return drm_dp_channel_eq_ok(link_status, num_lanes);
+}
+
int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
{
int rc = 0;
@@ -1671,6 +1684,9 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
ctrl->link->link_params.rate,
ctrl->link->link_params.num_lanes, ctrl->dp_ctrl.pixel_rate);
+ ctrl->link->phy_params.p_level = 0;
+ ctrl->link->phy_params.v_level = 0;
+
rc = dp_ctrl_enable_mainlink_clocks(ctrl);
if (rc)
return rc;
@@ -1736,17 +1752,19 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN)
return rc;
- /* stop txing train pattern */
- dp_ctrl_clear_training_pattern(ctrl);
+ if (rc == 0) { /* link train successfully */
+ /*
+* do not stop train pattern here
+* stop link training at on_stream
+* to pass compliance test
+*/
+ } else {
+ /*
+* link training failed
+* end txing train pattern here
+*/
+ dp_ctrl_clear_training_pattern(ctrl);
- /*
-* keep transmitting idle pattern until video ready
-* to avoid main link from loss of sync
-*/
- if (rc == 0) /* link train successfully */
- dp_ctrl_push_idle(dp_ctrl);
- else {
- /* link training failed */
dp_ctrl_deinitialize_mainlink(ctrl);
rc = -ECONNRESET;
}
@@ -1754,9 +1772,15 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl)
return rc;
}
+static int dp_ctrl_link_retrain(struct dp_ctrl_private *ctrl)
+{
+ int training_step = DP_TRAINING_NONE;
+
+ return dp_ctrl_setup_main_link(ctrl, _step);
+}
+
int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl)
{
- u32 rate = 0;
int ret = 0;
bool mainlink_ready = false;
struct dp_ctrl_private *ctrl;
@@ -1766,10 +1790,6 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl)
ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl);
- rate = ctrl->panel->link_info.rate;
-
- ctrl->link->link_params.rate = rate;
- ctrl->link->link_params.num_lanes = ctrl->panel->link_info.num_lanes;
ctrl->dp_ctrl.pixel_rate = ctrl->panel->dp_mode.drm_mode.clock;
DRM_DEBUG_DP("rate=%d, num_lanes=%d, pixel_rate=%d\n",
@@ -1784,6 +1804,12 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl)
}
}
+ if (!dp_ctrl_channel_eq_ok(ctrl))
+ dp_ctrl_link_retrain(ctrl);
+
+ /* stop txing train pattern to end link training */
+ dp_ctrl_clear_training_pattern(ctrl);
+
ret = dp_ctrl_enable_stream_clocks(ctrl);
if (ret) {
DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 4/6] drm/msm/dp: replug event is converted into an unplug followed by an plug events
Remove special handling of replug interrupt and instead treat replug event
as a sequential unplug followed by a plugin event. This is needed to meet
the requirements of DP Link Layer CTS test case 4.2.1.3.
Changes in V2:
-- add fixes statement
Changes in V3:
-- delete EV_HPD_REPLUG_INT
Fixes: f21c8a276c2d ("drm/msm/dp: handle irq_hpd with sink_count = 0 correctly")
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_display.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c
b/drivers/gpu/drm/msm/dp/dp_display.c
index 78c5301..aa96272 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -55,7 +55,6 @@ enum {
EV_HPD_INIT_SETUP,
EV_HPD_PLUG_INT,
EV_IRQ_HPD_INT,
- EV_HPD_REPLUG_INT,
EV_HPD_UNPLUG_INT,
EV_USER_NOTIFICATION,
EV_CONNECT_PENDING_TIMEOUT,
@@ -1146,9 +1145,6 @@ static int hpd_event_thread(void *data)
case EV_IRQ_HPD_INT:
dp_irq_hpd_handle(dp_priv, todo->data);
break;
- case EV_HPD_REPLUG_INT:
- /* do nothing */
- break;
case EV_USER_NOTIFICATION:
dp_display_send_hpd_notification(dp_priv,
todo->data);
@@ -1192,10 +1188,8 @@ static irqreturn_t dp_display_irq_handler(int irq, void
*dev_id)
if (hpd_isr_status & 0x0F) {
/* hpd related interrupts */
- if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK ||
- hpd_isr_status & DP_DP_HPD_REPLUG_INT_MASK) {
+ if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK)
dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0);
- }
if (hpd_isr_status & DP_DP_IRQ_HPD_INT_MASK) {
/* stop sentinel connect pending checking */
@@ -1203,8 +1197,10 @@ static irqreturn_t dp_display_irq_handler(int irq, void
*dev_id)
dp_add_event(dp, EV_IRQ_HPD_INT, 0, 0);
}
- if (hpd_isr_status & DP_DP_HPD_REPLUG_INT_MASK)
- dp_add_event(dp, EV_HPD_REPLUG_INT, 0, 0);
+ if (hpd_isr_status & DP_DP_HPD_REPLUG_INT_MASK) {
+ dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
+ dp_add_event(dp, EV_HPD_PLUG_INT, 0, 3);
+ }
if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK)
dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 2/6] drm/msm/dp: reduce link rate if failed at link training 1
Reduce link rate and re start link training if link training 1
failed due to loss of clock recovery done to fix Link Layer
CTS case 4.3.1.7. Also only update voltage and pre-emphasis
swing level after link training started to fix Link Layer CTS
case 4.3.1.6.
Changes in V2:
-- replaced cr_status with link_status[DP_LINK_STATUS_SIZE]
-- replaced dp_ctrl_any_lane_cr_done() with dp_ctrl_colco_recovery_any_ok()
-- replaced dp_ctrl_any_ane_cr_lose() with !drm_dp_clock_recovery_ok()
Changes in V3:
-- return failed if lane_count <= 1
Signed-off-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 79 +++-
1 file changed, 45 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 27fb0f0..0002805 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -83,13 +83,6 @@ struct dp_ctrl_private {
struct completion video_comp;
};
-struct dp_cr_status {
- u8 lane_0_1;
- u8 lane_2_3;
-};
-
-#define DP_LANE0_1_CR_DONE 0x11
-
static int dp_aux_link_configure(struct drm_dp_aux *aux,
struct dp_link_info *link)
{
@@ -1080,7 +1073,7 @@ static int dp_ctrl_read_link_status(struct
dp_ctrl_private *ctrl,
}
static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl,
- struct dp_cr_status *cr, int *training_step)
+ int *training_step)
{
int tries, old_v_level, ret = 0;
u8 link_status[DP_LINK_STATUS_SIZE];
@@ -1109,9 +1102,6 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private
*ctrl,
if (ret)
return ret;
- cr->lane_0_1 = link_status[0];
- cr->lane_2_3 = link_status[1];
-
if (drm_dp_clock_recovery_ok(link_status,
ctrl->link->link_params.num_lanes)) {
return 0;
@@ -1188,7 +1178,7 @@ static void dp_ctrl_clear_training_pattern(struct
dp_ctrl_private *ctrl)
}
static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl,
- struct dp_cr_status *cr, int *training_step)
+ int *training_step)
{
int tries = 0, ret = 0;
char pattern;
@@ -1204,10 +1194,6 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private
*ctrl,
else
pattern = DP_TRAINING_PATTERN_2;
- ret = dp_ctrl_update_vx_px(ctrl);
- if (ret)
- return ret;
-
ret = dp_catalog_ctrl_set_pattern(ctrl->catalog, pattern);
if (ret)
return ret;
@@ -1220,8 +1206,6 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private
*ctrl,
ret = dp_ctrl_read_link_status(ctrl, link_status);
if (ret)
return ret;
- cr->lane_0_1 = link_status[0];
- cr->lane_2_3 = link_status[1];
if (drm_dp_channel_eq_ok(link_status,
ctrl->link->link_params.num_lanes)) {
@@ -1241,7 +1225,7 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_private
*ctrl,
static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl);
static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl,
- struct dp_cr_status *cr, int *training_step)
+ int *training_step)
{
int ret = 0;
u8 encoding = DP_SET_ANSI_8B10B;
@@ -1257,7 +1241,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private
*ctrl,
drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,
, 1);
- ret = dp_ctrl_link_train_1(ctrl, cr, training_step);
+ ret = dp_ctrl_link_train_1(ctrl, training_step);
if (ret) {
DRM_ERROR("link training #1 failed. ret=%d\n", ret);
goto end;
@@ -1266,7 +1250,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private
*ctrl,
/* print success info as this is a result of user initiated action */
DRM_DEBUG_DP("link training #1 successful\n");
- ret = dp_ctrl_link_train_2(ctrl, cr, training_step);
+ ret = dp_ctrl_link_train_2(ctrl, training_step);
if (ret) {
DRM_ERROR("link training #2 failed. ret=%d\n", ret);
goto end;
@@ -1282,7 +1266,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private
*ctrl,
}
static int dp_ctrl_setup_main_link(struct dp_ctrl_private *ctrl,
- struct dp_cr_status *cr, int *training_step)
+ int *training_step)
{
int ret = 0;
@@ -1297,7 +1281,7 @@ static int dp_ctrl_setup_main_link(struct dp_ctrl_private
*ctrl,
* a link training pattern, we have to first do soft reset.
*/
- ret = dp_ctrl_link_train(ctrl, cr, training_step);
+ ret = dp_ctrl_link_train(ctrl, training_step);
return ret;
}
@@ -1496,14 +1480,13 @@ static int dp_ctrl_deinitialize_mainlink(struct
[PATCH v3 1/6] drm/msm/dp: use dp_ctrl_off_link_stream during PHY compliance test run
DP cable should always connect to DPU during the entire PHY compliance
testing run. Since DP PHY compliance test is executed at irq_hpd event
context, dp_ctrl_off_link_stream() should be used instead of dp_ctrl_off().
dp_ctrl_off() is used for unplug event which is triggered when DP cable is
dis connected.
Changes in V2:
-- add fixes statement
Fixes: f21c8a276c2d ("drm/msm/dp: handle irq_hpd with sink_count = 0 correctly")
Signed-off-by: Kuogee Hsieh
Reviewed-by: Stephen Boyd
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index caf71fa..27fb0f0 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1530,7 +1530,7 @@ static int dp_ctrl_process_phy_test_request(struct
dp_ctrl_private *ctrl)
* running. Add the global reset just before disabling the
* link clocks and core clocks.
*/
- ret = dp_ctrl_off(>dp_ctrl);
+ ret = dp_ctrl_off_link_stream(>dp_ctrl);
if (ret) {
DRM_ERROR("failed to disable DP controller\n");
return ret;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH v3 0/6] add fixes to pass DP Link Layer compliance test cases
add fixes to pass DP Link Layer compliance test cases Kuogee Hsieh (6): drm/msm/dp: use dp_ctrl_off_link_stream during PHY compliance test run drm/msm/dp: reduce link rate if failed at link training 1 drm/msm/dp: reset aux controller after dp_aux_cmd_fifo_tx() failed. drm/msm/dp: replug event is converted into an unplug followed by an plug events drm/msm/dp: return correct edid checksum after corrupted edid checksum read drm/msm/dp: do not end dp link training until video is ready drivers/gpu/drm/msm/dp/dp_aux.c | 3 + drivers/gpu/drm/msm/dp/dp_ctrl.c| 137 +++- drivers/gpu/drm/msm/dp/dp_display.c | 14 ++-- drivers/gpu/drm/msm/dp/dp_panel.c | 9 ++- 4 files changed, 102 insertions(+), 61 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Re: [PATCH v1] drm: bridge: it66121: Check drm_bridge_attach retval
Hi!
Dne četrtek, 05. avgust 2021 ob 20:50:39 CEST je Robert Foss napisal(a):
> The return value of drm_bridge_attach() is ignored during
> the it66121_bridge_attach() call, which is incorrect.
>
> Fixes: 988156dc2fc9 ("drm: bridge: add it66121 driver")
> Signed-off-by: Robert Foss
> ---
> drivers/gpu/drm/bridge/ite-it66121.c | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Jernej Skrabec
Best regards,
Jernej
Re: [PATCH] drm/aperture: Pass DRM driver structure instead of driver name
On 29/06/2021 16:58, Thomas Zimmermann wrote:
Print the name of the DRM driver when taking over fbdev devices. Makes
the output to dmesg more consistent. Note that the driver name is only
used for printing a string to the kernel log. No UAPI is affected by this
change.
Signed-off-by: Thomas Zimmermann
---
[...]
drivers/gpu/drm/msm/msm_fbdev.c | 2 +-
Reviewed-by: Dmitry Baryshkov
drivers/gpu/drm/nouveau/nouveau_drm.c | 2 +-
drivers/gpu/drm/qxl/qxl_drv.c | 2 +-
drivers/gpu/drm/radeon/radeon_drv.c | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_drv.c | 2 +-
drivers/gpu/drm/tegra/drm.c | 2 +-
drivers/gpu/drm/tiny/cirrus.c | 2 +-
drivers/gpu/drm/vboxvideo/vbox_drv.c | 2 +-
drivers/gpu/drm/vc4/vc4_drv.c | 2 +-
drivers/gpu/drm/virtio/virtgpu_drv.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +-
include/drm/drm_aperture.h| 14 +-
23 files changed, 43 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 6f30c525caac..accf9c1b967a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1278,7 +1278,7 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
#endif
/* Get rid of things like offb */
- ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev,
"amdgpudrmfb");
+ ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev,
_kms_driver);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/armada/armada_drv.c b/drivers/gpu/drm/armada/armada_drv.c
index dab0a1f0983b..31925ae3ab72 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -95,7 +95,7 @@ static int armada_drm_bind(struct device *dev)
}
/* Remove early framebuffers */
- ret = drm_aperture_remove_framebuffers(false, "armada-drm-fb");
+ ret = drm_aperture_remove_framebuffers(false, _drm_driver);
if (ret) {
dev_err(dev, "[" DRM_NAME ":%s] can't kick out simple-fb: %d\n",
__func__, ret);
diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index 5aa452b4efe6..86d5cd7b6318 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -100,7 +100,7 @@ static int ast_remove_conflicting_framebuffers(struct
pci_dev *pdev)
primary = pdev->resource[PCI_ROM_RESOURCE].flags &
IORESOURCE_ROM_SHADOW;
#endif
- return drm_aperture_remove_conflicting_framebuffers(base, size, primary, "astdrmfb");
+ return drm_aperture_remove_conflicting_framebuffers(base, size, primary,
_driver);
}
static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
diff --git a/drivers/gpu/drm/bochs/bochs_drv.c
b/drivers/gpu/drm/bochs/bochs_drv.c
index c828cadbabff..0d232b44ecd7 100644
--- a/drivers/gpu/drm/bochs/bochs_drv.c
+++ b/drivers/gpu/drm/bochs/bochs_drv.c
@@ -110,7 +110,7 @@ static int bochs_pci_probe(struct pci_dev *pdev,
return -ENOMEM;
}
- ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, "bochsdrmfb");
+ ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev,
_driver);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/drm_aperture.c b/drivers/gpu/drm/drm_aperture.c
index 9335d9d6cf9a..9ac39cf11694 100644
--- a/drivers/gpu/drm/drm_aperture.c
+++ b/drivers/gpu/drm/drm_aperture.c
@@ -33,6 +33,10 @@
*
* .. code-block:: c
*
+ * static const struct drm_driver example_driver = {
+ * ...
+ * };
+ *
*static int remove_conflicting_framebuffers(struct pci_dev *pdev)
*{
*bool primary = false;
@@ -46,7 +50,7 @@
*#endif
*
*return drm_aperture_remove_conflicting_framebuffers(base, size,
primary,
- * "example
driver");
+ *
_driver);
*}
*
*static int probe(struct pci_dev *pdev)
@@ -274,7 +278,7 @@ static void drm_aperture_detach_drivers(resource_size_t
base, resource_size_t si
* @base: the aperture's base address in physical memory
* @size: aperture size in bytes
* @primary: also kick vga16fb if present
- * @name: requesting driver name
+ * @req_driver: requesting DRM driver
*
* This function removes graphics device drivers which use memory range
described by
* @base and @size.
@@ -283,7 +287,7 @@ static void drm_aperture_detach_drivers(resource_size_t
base, resource_size_t si
* 0 on success, or a negative errno code otherwise
*/
int drm_aperture_remove_conflicting_framebuffers(resource_size_t base,
resource_size_t size,
-
Re: Help needed for EVoC/GSoC/Outreachy
Hi everyone! I got some questions from someone that made me realize that there's a couple of things that I forgot to mention here that might be useful for folks to know regarding being a mentor: * "Who decides what project and what student?" It's up to the student to come up with ideas for what they want to work on, although we will occasionally have a list of potential project ideas that students are welcome to use or draw inspiration from. Since X.org participates as a foundation, pretty much any of the projects under the X.org umbrella are allowed to do this if they're willing to come up with mentors. As for who the mentors are, that's really all just up to who's volunteering for it on a given project. As for how we decide what students we accept, that decision is usually made based off the quality of their project proposal along with whether a student seems self-sufficient enough to accomplish said project. Most students who come to us with a project idea already typically fall into this category. The final decision for this is typically made by the student's proposed mentor and/or our volunteer GSoC/Outreachy/EVoC admin. * "I assume this is international?" X.org tries to make our student outreach programs as international as possible. GSoC covers most of the world, but there are definitely some areas it doesn't cover - which is why we've ran EVoC in the past, so that students in areas that wouldn't be eligible for GSoC would still have a chance at participating in a project. Outreachy also helps fill this gap, as I don't believe they have the same kind of international restrictions that GSoC does. * What is the expected result, a grading? Yes. On Wed, 2021-07-14 at 16:32 -0400, Lyude Paul wrote: > Hi! As some of you might already be aware, after helping out X.org > project the previous years with regards to student outreach, Trevor > decided to retire from this position in hopes that someone else will be > able to step up and take on these responsibilities. As such, we're > trying to find people who would be willing to volunteer their time to > help out with getting us involved once again in student outreach > programs. > > In the past, X.org has been active in the GSoC program, occasionally > Outreachy, and our own EVoC program. As of 2021 though, GSoC decided to > shorten the amount of time allocated for a student to work on their > project. This unfortunately posed some problems for > X.org/freedesktop.org as a lot of the potential work that would have > been good for us to have students working on wouldn't really fit within > the new GSoC timeframe. While it's certainly possible that there will be > projects that come up in the future which do fit into this new timeline, > we think it'd be a good idea to step up our involvement again with > Outreachy where the program is a good bit more flexible then GSoC. We've > also had pretty good experience working with the Outreachy candidates > we've had in the past. > > The other main topic of discussion is around the fact that our own > program, EVoC, hasn't really had anyone available to volunteer to help > run it for a while now. For those who aren't aware, EVoC is a program > similar to Google Summer of Code that X.org started running with much > more relaxed requirements then GSoC/Outreachy in order to help fill the > gaps for any exceptional cases with students who would otherwise be left > out by the requirements for GSoC/Outreachy. Typically though, EVoC is > usually considered the last resort after a student has tried getting > into GSoC/Outreachy. > > So, the two biggest things that we need are: > * Admin volunteer(s) > * Mentors, mentors, mentors! We really need these the most. > > So, what responsibilities would being an admin for this entail? > > * Fielding questions from potential GSoC/EVoC/Outreachy participants. > Most of these students are just looking for simple details of how > these programs work and are looking for project ideas. Responding to > these inquiries is mostly just a matter of pointing students to > various pages on our wiki or replying with form/stock replies. Most of > the students at this phase expect to be handed a project and a mentor, > and therefore end up learning that they will need to come up with > their own project and mentor. > * For the small handful of students that make it to the next phase and > figure out a project idea, they then need to find a mentor. Usually > the admin will help out by taking a look at who proposed the project > idea, and/or looking through commit messages and mailing list history > to try to find someone who would be a good fit and willing to mentor > the student. Sometimes this happens quickly, and sometimes it requires > poking a lot of people - and occasionally, there might not always be a > mentor to be found. > * If we have a student, project, and mentor then the next step is having > the student write
Re: [PATCH 2/2] gpu/drm: ingenic: Add workaround for disabled drivers
Hi Greg,
Le jeu., août 5 2021 at 21:35:34 +0200, Greg Kroah-Hartman
a écrit :
On Thu, Aug 05, 2021 at 09:21:09PM +0200, Paul Cercueil wrote:
When the drivers of remote devices (e.g. HDMI chip) are disabled in
the
config, we want the ingenic-drm driver to be able to probe
nonetheless
with the other devices (e.g. internal LCD panel) that are enabled.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index d261f7a03b18..5e1fdbb0ba6b 100644
--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
+++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
@@ -1058,6 +1058,18 @@ static int ingenic_drm_bind(struct device
*dev, bool has_components)
for (i = 0; ; i++) {
ret = drm_of_find_panel_or_bridge(dev->of_node, 0, i, ,
);
if (ret) {
+ /*
+ * Workaround for the case where the drivers for the
+ * remote devices are not enabled. When that happens,
+ * drm_of_find_panel_or_bridge() returns -EPROBE_DEFER
+ * endlessly, which prevents the ingenic-drm driver from
+ * working at all.
+ */
+ if (ret == -EPROBE_DEFER) {
+ ret = driver_deferred_probe_check_state(dev);
+ if (ret == -ENODEV || ret == -ETIMEDOUT)
+ continue;
+ }
So you are mucking around with devices on other busses within this
driver? What could go wrong? :(
I'm doing the same thing as everybody else. This is the DRM driver, and
there is a driver for the external HDMI chip which gives us a DRM
bridge that we can obtain from the device tree.
Please use the existing driver core functionality for this type of
thing, it is not unique, no need for this function to be called.
I'm not sure you understand what I'm doing here. This driver calls
drm_of_find_panel_or_bridge(), without guarantee that the driver for
the remote device (connected via DT graph) has been enabled in the
kernel config. In that case it will always return -EPROBE_DEFER and the
ingenic-drm driver will never probe.
This patch makes sure that the driver can probe if the HDMI driver has
been disabled in the kernel config, nothing more.
Cheers,
-Paul
Re: [RFC PATCH 13/15] mm: convert MAX_ORDER sized static arrays to dynamic ones.
On 5 Aug 2021, at 15:16, Christian König wrote: > Am 05.08.21 um 21:02 schrieb Zi Yan: >> From: Zi Yan >> >> This prepares for the upcoming changes to make MAX_ORDER a boot time >> parameter instead of compilation time constant. All static arrays with >> MAX_ORDER size are converted to pointers and their memory is allocated >> at runtime. > > Well in general I strongly suggest to not use the patter kmalloc(sizeof(some > struct) * MAX_ORDER,...) instead use kmalloc_array, kcalloc etc.. > > Then when a array is embedded at the end of a structure you can use a > trailing array and the struct_size() macro to determine the allocation size. Sure. Will fix it. > > Additional to that separating the patch into changes for TTM to make the > maximum allocation order independent from MAX_ORDER would be rather good to > have I think. Can you elaborate a little bit more on “make the maximum allocation order independent from MAX_ORDER”? From what I understand of ttm_pool_alloc(), it tries to get num_pages pages by allocating as large pages as possible, starting from MAX_ORDER. What is the rationale behind this algorithm? Why not just call alloc_page(order=0) num_pages times? Is it mean to reduce the number of calls to alloc_page? The allocated pages do not need to get as high as MAX_ORDER, is that the case? If yes, I probably can keep ttm pool as static arrays with length of MIN_MAX_ORDER, which I introduce in Patch 14 as the lower bound of boot time parameter MAX_ORDER. Let me know your thoughts. Thanks. — Best Regards, Yan, Zi signature.asc Description: OpenPGP digital signature
Re: [PATCH] drm/amd/pm: Fix a memory leak in an error handling path in 'vangogh_tables_init()'
Applied. Thanks!
Alex
On Thu, Aug 5, 2021 at 2:44 PM Christophe JAILLET
wrote:
>
> 'watermarks_table' must be freed instead 'clocks_table', because
> 'clocks_table' is known to be NULL at this point and 'watermarks_table' is
> never freed if the last kzalloc fails.
>
> Fixes: c98ee89736b8 ("drm/amd/pm: add the fine grain tuning function for
> vangogh")
> Signed-off-by: Christophe JAILLET
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index 335b3c70e1a7..06eea917284e 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -256,7 +256,7 @@ static int vangogh_tables_init(struct smu_context *smu)
> return 0;
>
> err3_out:
> - kfree(smu_table->clocks_table);
> + kfree(smu_table->watermarks_table);
> err2_out:
> kfree(smu_table->gpu_metrics_table);
> err1_out:
> --
> 2.30.2
>
Re: [PATCH v3] drm/radeon: Update pitch for page flip
On Thu, Aug 5, 2021 at 6:46 AM Zhenneng Li wrote:
>
>
> When primary bo is updated, crtc's pitch may
> have not been updated, this will lead to show
> disorder content when user changes display mode,
> we update crtc's pitch in page flip to avoid
> this bug.
> This refers to amdgpu's pageflip.
>
> v1->v2:
> Update all of the pitch in all of the page_flip functions
> in radeon rather than just the evergreen one.
>
> v2->v3:
> Update pitch set method for r100 according to
> radeon_legacy_crtc.c
>
> Cc: Alex Deucher
> Cc: "Christian König"
> Cc: "Pan, Xinhui"
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Signed-off-by: Zhenneng Li
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/radeon/evergreen.c | 8 +++-
> drivers/gpu/drm/radeon/r100.c | 9 +
> drivers/gpu/drm/radeon/rs600.c | 8 +++-
> drivers/gpu/drm/radeon/rv770.c | 8 +++-
> 4 files changed, 30 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen.c
> b/drivers/gpu/drm/radeon/evergreen.c
> index 36a888e1b179..eeb590d2dec2 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -28,6 +28,7 @@
>
> #include
> #include
> +#include
>
> #include "atom.h"
> #include "avivod.h"
> @@ -1414,10 +1415,15 @@ void evergreen_page_flip(struct radeon_device *rdev,
> int crtc_id, u64 crtc_base,
> bool async)
> {
> struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
> + struct drm_framebuffer *fb = radeon_crtc->base.primary->fb;
>
> - /* update the scanout addresses */
> + /* flip at hsync for async, default is vsync */
> WREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset,
>async ? EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN : 0);
> + /* update pitch */
> + WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset,
> + fb->pitches[0] / fb->format->cpp[0]);
> + /* update the scanout addresses */
> WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH +
> radeon_crtc->crtc_offset,
>upper_32_bits(crtc_base));
> WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS +
> radeon_crtc->crtc_offset,
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index ba724198b72e..2dd85ba1faa2 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -162,6 +162,8 @@ void r100_wait_for_vblank(struct radeon_device *rdev, int
> crtc)
> void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base,
> bool async)
> {
> struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
> + uint32_t crtc_pitch, pitch_pixels;
> + struct drm_framebuffer *fb = radeon_crtc->base.primary->fb;
> u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK;
> int i;
>
> @@ -169,6 +171,13 @@ void r100_page_flip(struct radeon_device *rdev, int
> crtc_id, u64 crtc_base, bool
> /* update the scanout addresses */
> WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp);
>
> + /* update pitch */
> + pitch_pixels = fb->pitches[0] / fb->format->cpp[0];
> + crtc_pitch = DIV_ROUND_UP(pitch_pixels * fb->format->cpp[0] * 8,
> + fb->format->cpp[0] * 8 * 8);
> + crtc_pitch |= crtc_pitch << 16;
> + WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);
> +
> /* Wait for update_pending to go high. */
> for (i = 0; i < rdev->usec_timeout; i++) {
> if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) &
> RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET)
> diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
> index b2d22e25eee1..b87dd551e939 100644
> --- a/drivers/gpu/drm/radeon/rs600.c
> +++ b/drivers/gpu/drm/radeon/rs600.c
> @@ -41,6 +41,7 @@
>
> #include
> #include
> +#include
>
> #include "atom.h"
> #include "radeon.h"
> @@ -118,6 +119,7 @@ void avivo_wait_for_vblank(struct radeon_device *rdev,
> int crtc)
> void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base,
> bool async)
> {
> struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
> + struct drm_framebuffer *fb = radeon_crtc->base.primary->fb;
> u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset);
> int i;
>
> @@ -125,9 +127,13 @@ void rs600_page_flip(struct radeon_device *rdev, int
> crtc_id, u64 crtc_base, boo
> tmp |= AVIVO_D1GRPH_UPDATE_LOCK;
> WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);
>
> - /* update the scanout addresses */
> + /* flip at hsync for async, default is vsync */
> WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset,
>async ?
Re: [PATCH 2/2] gpu/drm: ingenic: Add workaround for disabled drivers
On Thu, Aug 05, 2021 at 09:21:09PM +0200, Paul Cercueil wrote:
> When the drivers of remote devices (e.g. HDMI chip) are disabled in the
> config, we want the ingenic-drm driver to be able to probe nonetheless
> with the other devices (e.g. internal LCD panel) that are enabled.
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> index d261f7a03b18..5e1fdbb0ba6b 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> @@ -1058,6 +1058,18 @@ static int ingenic_drm_bind(struct device *dev, bool
> has_components)
> for (i = 0; ; i++) {
> ret = drm_of_find_panel_or_bridge(dev->of_node, 0, i, ,
> );
> if (ret) {
> + /*
> + * Workaround for the case where the drivers for the
> + * remote devices are not enabled. When that happens,
> + * drm_of_find_panel_or_bridge() returns -EPROBE_DEFER
> + * endlessly, which prevents the ingenic-drm driver from
> + * working at all.
> + */
> + if (ret == -EPROBE_DEFER) {
> + ret = driver_deferred_probe_check_state(dev);
> + if (ret == -ENODEV || ret == -ETIMEDOUT)
> + continue;
> + }
So you are mucking around with devices on other busses within this
driver? What could go wrong? :(
Please use the existing driver core functionality for this type of
thing, it is not unique, no need for this function to be called.
thanks,
greg k-h
Re: [PATCH 1/2] drivers core: Export driver_deferred_probe_check_state()
On Thu, Aug 05, 2021 at 09:21:08PM +0200, Paul Cercueil wrote: > Export this function as a GPL symbol, so that it can be used from > modules. > > Signed-off-by: Paul Cercueil > --- > drivers/base/dd.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/base/dd.c b/drivers/base/dd.c > index daeb9b5763ae..658f1527a58b 100644 > --- a/drivers/base/dd.c > +++ b/drivers/base/dd.c > @@ -296,6 +296,7 @@ int driver_deferred_probe_check_state(struct device *dev) > > return -EPROBE_DEFER; > } > +EXPORT_SYMBOL_GPL(driver_deferred_probe_check_state); Drivers should never need to mess with this, it is for only a small set of busses to use only. Why do you think this is needed by a driver? thanks, greg k-h
Re: [PATCH v1 1/1] drm/bridge: anx7625: Tune K value for IVO panel
On Thu, Aug 05, 2021 at 03:30:55PM +0800, Xin Ji wrote: > IVO panel require less input video clock variation than video clock > variation in DP CTS spec. > > This patch decreases the K value of ANX7625 which will shrink eDP Tx > video clock variation to meet IVO panel's requirement. > > Signed-off-by: Xin Ji Looks good, I assume someone else (Robert) picks this. Acked-by: Sam Ravnborg Sam
Re: [PATCH 2/2] drm/panel: s6d27a1: Add driver for Samsung S6D27A1 display panel
Hi Markuss,
On Thu, Aug 05, 2021 at 04:33:42PM +0300, Markuss Broks wrote:
> This adds a driver for Samsung S6D27A1 display controller and panel.
> This panel is found in the Samsung GT-I8160 mobile phone,
> and possibly some other mobile phones.
>
> This display needs manufacturer commands to configure it;
> the commands used in this driver were taken from downstream driver
> by Gareth Phillips; sadly, there is almost no documentation on what they
> actually do.
>
> This driver re-uses the DBI infrastructure to communicate with the display.
>
> This driver is heavily based on WideChips WS2401 display controller
> driver by Linus Walleij and on other panel drivers for reference.
>
> Signed-off-by: Markuss Broks
>
> v2 -> v3:
> fixed checkpatch warnings - not sure about MAINTAINERS, should I
> put my name up there?
You made lots of other changes..
Yes, MAINTAINERS would be great so you get mails when something is
updated. This allows you to verify refactoring changes or bug fixes for
example.
For a single driver you can realy on someone else to apply patches, no
need to deal with drm-misc etc. for that.
A few details in the following, but driver is almost there.
Sam
> ---
> drivers/gpu/drm/panel/Kconfig | 11 +
> drivers/gpu/drm/panel/Makefile| 1 +
> drivers/gpu/drm/panel/panel-samsung-s6d27a1.c | 323 ++
> 3 files changed, 335 insertions(+)
> create mode 100644 drivers/gpu/drm/panel/panel-samsung-s6d27a1.c
>
> diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
> index beb581b96e..0b37849413 100644
> --- a/drivers/gpu/drm/panel/Kconfig
> +++ b/drivers/gpu/drm/panel/Kconfig
> @@ -392,6 +392,17 @@ config DRM_PANEL_SAMSUNG_S6D16D0
> depends on DRM_MIPI_DSI
> select VIDEOMODE_HELPERS
>
> +config DRM_PANEL_SAMSUNG_S6D27A1
> + tristate "Samsung S6D27A1 DPI panel driver"
> + depends on OF && SPI && GPIOLIB
> + select DRM_MIPI_DBI
> + help
> + Say Y here if you want to enable support for the Samsung
> + S6D27A1 DPI 480x800 panel.
> +
> + This panel can be found in Samsung Galaxy Ace 2
> + GT-I8160 mobile phone.
> +
> config DRM_PANEL_SAMSUNG_S6E3HA2
> tristate "Samsung S6E3HA2 DSI video mode panel"
> depends on OF
> diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
> index c8132050bc..60c0149fc5 100644
> --- a/drivers/gpu/drm/panel/Makefile
> +++ b/drivers/gpu/drm/panel/Makefile
> @@ -39,6 +39,7 @@ obj-$(CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20) +=
> panel-samsung-atna33xc20.o
> obj-$(CONFIG_DRM_PANEL_SAMSUNG_DB7430) += panel-samsung-db7430.o
> obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o
> obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D16D0) += panel-samsung-s6d16d0.o
> +obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6D27A1) += panel-samsung-s6d27a1.o
> obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2) += panel-samsung-s6e3ha2.o
> obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03) += panel-samsung-s6e63j0x03.o
> obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0) += panel-samsung-s6e63m0.o
> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d27a1.c
> b/drivers/gpu/drm/panel/panel-samsung-s6d27a1.c
> new file mode 100644
> index 00..6a77a15136
> --- /dev/null
> +++ b/drivers/gpu/drm/panel/panel-samsung-s6d27a1.c
> @@ -0,0 +1,323 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Panel driver for the Samsung S6D27A1 480x800 DPI RGB panel.
> + * Found in the Samsung Galaxy Ace 2 GT-I8160 mobile phone.
> + */
> +
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +#define S6D27A1_PASSWD_L20xF0/* Password Command for Level 2 Control
> */
> +#define S6D27A1_RESCTL 0xB3/* Resolution Select Control */
> +#define S6D27A1_PANELCTL20xB4/* ASG Signal Control */
> +#define S6D27A1_READID1 0xDA/* Read panel ID 1 */
> +#define S6D27A1_READID2 0xDB/* Read panel ID 2 */
> +#define S6D27A1_READID3 0xDC/* Read panel ID 3 */
> +#define S6D27A1_DISPCTL 0xF2/* Display Control */
> +#define S6D27A1_MANPWR 0xF3/* Manual Control */
> +#define S6D27A1_PWRCTL1 0xF4/* Power Control */
> +#define S6D27A1_SRCCTL 0xF6/* Source Control */
> +#define S6D27A1_PANELCTL 0xF7/* Panel Control*/
> +
> +static const u8 s6d27a1_dbi_read_commands[] = {
> + S6D27A1_READID1,
> + S6D27A1_READID2,
> + S6D27A1_READID3,
> + 0, /* sentinel */
> +};
> +
> +struct s6d27a1 {
> + struct device *dev;
> + struct mipi_dbi dbi;
> + struct drm_panel panel;
> + struct gpio_desc *reset;
> + struct regulator_bulk_data regulators[2];
> +};
> +
> +static const struct drm_display_mode s6d27a1_480_800_mode = {
> + /*
> + * The vendor driver states that the S6D27A1 panel
> +
[PATCH 2/2] gpu/drm: ingenic: Add workaround for disabled drivers
When the drivers of remote devices (e.g. HDMI chip) are disabled in the
config, we want the ingenic-drm driver to be able to probe nonetheless
with the other devices (e.g. internal LCD panel) that are enabled.
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index d261f7a03b18..5e1fdbb0ba6b 100644
--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
+++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
@@ -1058,6 +1058,18 @@ static int ingenic_drm_bind(struct device *dev, bool
has_components)
for (i = 0; ; i++) {
ret = drm_of_find_panel_or_bridge(dev->of_node, 0, i, ,
);
if (ret) {
+ /*
+* Workaround for the case where the drivers for the
+* remote devices are not enabled. When that happens,
+* drm_of_find_panel_or_bridge() returns -EPROBE_DEFER
+* endlessly, which prevents the ingenic-drm driver from
+* working at all.
+*/
+ if (ret == -EPROBE_DEFER) {
+ ret = driver_deferred_probe_check_state(dev);
+ if (ret == -ENODEV || ret == -ETIMEDOUT)
+ continue;
+ }
if (ret == -ENODEV)
break; /* we're done */
if (ret != -EPROBE_DEFER)
--
2.30.2
[PATCH 1/2] drivers core: Export driver_deferred_probe_check_state()
Export this function as a GPL symbol, so that it can be used from
modules.
Signed-off-by: Paul Cercueil
---
drivers/base/dd.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index daeb9b5763ae..658f1527a58b 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -296,6 +296,7 @@ int driver_deferred_probe_check_state(struct device *dev)
return -EPROBE_DEFER;
}
+EXPORT_SYMBOL_GPL(driver_deferred_probe_check_state);
static void deferred_probe_timeout_work_func(struct work_struct *work)
{
--
2.30.2
[PATCH 0/2] gpu/drm: ingenic: Handle disabled drivers
Hi, A small patchset to make sure that the ingenic-drm driver won't fail to probe if an optional device (e.g. HDMI chip) has its driver disabled in the kernel config. Since most of the boards using the ingenic-drm driver have a LCD panel attached, the drivers for external devices (be it a HDMI transmitter or a TV encoder) really are optional and shouldn't prevent the DRM driver from probing. Cheers, -Paul Paul Cercueil (2): drivers core: Export driver_deferred_probe_check_state() gpu/drm: ingenic: Add workaround for disabled drivers drivers/base/dd.c | 1 + drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 12 2 files changed, 13 insertions(+) -- 2.30.2
Re: [PATCH 1/2] drm/panel: Add DT bindings for Samsung S6D27A1 display panel
Hi Markuss,
On Thu, Aug 05, 2021 at 04:33:41PM +0300, Markuss Broks wrote:
> This adds device-tree bindings for the Samsung S6D27A1 RGB
> DPI display panel.
>
> Signed-off-by: Markuss Broks
> ---
> .../display/panel/samsung,s6d27a1.yaml| 97 +++
> 1 file changed, 97 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml
> b/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml
> new file mode 100644
> index 00..c6c534aa87
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/panel/samsung,s6d27a1.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung S6D27A1 display panel
> +
> +description: The S6D27A1 is a 480x800 DPI display panel from Samsung Mobile
> + Displays (SMD). The panel must obey the rules for a SPI slave device
> + as specified in spi/spi-controller.yaml
> +
> +maintainers:
> + - Markuss Broks
> +
> +allOf:
> + - $ref: panel-common.yaml#
> +
> +properties:
> + compatible:
> +const: samsung,s6d27a1
> +
> + reg: true
> +
> + interrupts:
> +description: provides an optional ESD (electrostatic discharge)
> + interrupt that signals abnormalities in the display hardware.
> + This can also be raised for other reasons like erroneous
> + configuration.
> +maxItems: 1
> +
> + reset-gpios: true
> +
> + vci-supply:
> +description: regulator that supplies the VCI analog voltage
> + usually around 3.0 V
> +
> + vccio-supply:
> +description: regulator that supplies the VCCIO voltage usually
> + around 1.8 V
> +
> + backlight: true
> +
> + spi-cpha: true
> +
> + spi-cpol: true
> +
> + spi-max-frequency:
> +maximum: 120
> +
> + port: true
> +
> +required:
> + - compatible
> + - reg
> + - spi-cpha
> + - spi-cpol
> + - port
Do the HW really require the above three properties?
Can the HW work without a supply (hint: I think vci-supply and
vccio-supply are required)
> +
> +additionalProperties: false
As this device sits on the SPI bus you need to use:
unevaluatedProterties: false
(Check spelling from other bindings)
This allows DT files to add more spi related properties, but do not
allow DT files to add unknown properties.
With the current scheme you restrict the DT file to only the three
mentioned SPI properties that may be OK for your HW but maybe not OK for
the next HW using the same panel.
Sam
> +
> +examples:
> + - |
> +#include
> +#include
> +
> +spi {
> +compatible = "spi-gpio";
> +sck-gpios = < 0 GPIO_ACTIVE_HIGH>;
> +miso-gpios = < 1 GPIO_ACTIVE_HIGH>;
> +mosi-gpios = < 2 GPIO_ACTIVE_HIGH>;
> +cs-gpios = < 3 GPIO_ACTIVE_HIGH>;
> +num-chipselects = <1>;
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +panel@0 {
> +compatible = "samsung,s6d27a1";
> +spi-max-frequency = <120>;
> +spi-cpha;
> +spi-cpol;
> +reg = <0>;
> +vci-supply = <_3v0_reg>;
> +vccio-supply = <_1v8_reg>;
> +reset-gpios = < 4 GPIO_ACTIVE_LOW>;
> +interrupt-parent = <>;
> +interrupts = <5 IRQ_TYPE_EDGE_RISING>;
> +
> +port {
> +panel_in: endpoint {
> +remote-endpoint = <_out>;
> +};
> +};
> +};
> +};
> +
> +...
> --
> 2.32.0
Re: [RFC PATCH 13/15] mm: convert MAX_ORDER sized static arrays to dynamic ones.
Am 05.08.21 um 21:02 schrieb Zi Yan:
From: Zi Yan
This prepares for the upcoming changes to make MAX_ORDER a boot time
parameter instead of compilation time constant. All static arrays with
MAX_ORDER size are converted to pointers and their memory is allocated
at runtime.
Well in general I strongly suggest to not use the patter
kmalloc(sizeof(some struct) * MAX_ORDER,...) instead use kmalloc_array,
kcalloc etc..
Then when a array is embedded at the end of a structure you can use a
trailing array and the struct_size() macro to determine the allocation size.
Additional to that separating the patch into changes for TTM to make the
maximum allocation order independent from MAX_ORDER would be rather good
to have I think.
Regards,
Christian.
free_area array in struct zone is allocated using memblock_alloc_node()
at boot time and using kzalloc() when memory is hot-added.
MAX_ORDER in arm64 nVHE code is independent of kernel buddy allocator,
so use CONFIG_FORCE_MAX_ZONEORDER instead.
Signed-off-by: Zi Yan
Cc: Dave Young
Cc: Jonathan Corbet
Cc: Christian Koenig
Cc: David Airlie
Cc: ke...@lists.infradead.org
Cc: linux-...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux...@kvack.org
Cc: linux-ker...@vger.kernel.org
---
.../admin-guide/kdump/vmcoreinfo.rst | 2 +-
drivers/gpu/drm/ttm/ttm_device.c | 7 ++-
drivers/gpu/drm/ttm/ttm_pool.c| 58 +--
include/drm/ttm/ttm_pool.h| 4 +-
include/linux/memory_hotplug.h| 1 +
include/linux/mmzone.h| 2 +-
mm/memory_hotplug.c | 1 +
mm/page_alloc.c | 48 ---
8 files changed, 104 insertions(+), 19 deletions(-)
diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst
b/Documentation/admin-guide/kdump/vmcoreinfo.rst
index 3861a25faae1..1c9449b9458f 100644
--- a/Documentation/admin-guide/kdump/vmcoreinfo.rst
+++ b/Documentation/admin-guide/kdump/vmcoreinfo.rst
@@ -172,7 +172,7 @@ variables.
Offset of the free_list's member. This value is used to compute the number
of free pages.
-Each zone has a free_area structure array called free_area[MAX_ORDER].
+Each zone has a free_area structure array called free_area with length of
MAX_ORDER.
The free_list represents a linked list of free page blocks.
(list_head, next|prev)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index 74e3b460132b..7d994c03fbd0 100644
--- a/drivers/gpu/drm/ttm/ttm_device.c
+++ b/drivers/gpu/drm/ttm/ttm_device.c
@@ -94,7 +94,9 @@ static int ttm_global_init(void)
>> PAGE_SHIFT;
num_dma32 = min(num_dma32, 2UL << (30 - PAGE_SHIFT));
- ttm_pool_mgr_init(num_pages);
+ ret = ttm_pool_mgr_init(num_pages);
+ if (ret)
+ goto out;
ttm_tt_mgr_init(num_pages, num_dma32);
glob->dummy_read_page = alloc_page(__GFP_ZERO | GFP_DMA32);
@@ -216,7 +218,8 @@ int ttm_device_init(struct ttm_device *bdev, struct
ttm_device_funcs *funcs,
bdev->funcs = funcs;
ttm_sys_man_init(bdev);
- ttm_pool_init(>pool, dev, use_dma_alloc, use_dma32);
+ if (ttm_pool_init(>pool, dev, use_dma_alloc, use_dma32))
+ return -ENOMEM;
bdev->vma_manager = vma_manager;
INIT_DELAYED_WORK(>wq, ttm_device_delayed_workqueue);
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index cb38b1a17b09..ae20c80f14a4 100644
--- a/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@ -64,11 +64,11 @@ module_param(page_pool_size, ulong, 0644);
static atomic_long_t allocated_pages;
-static struct ttm_pool_type global_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_uncached[MAX_ORDER];
+static struct ttm_pool_type *global_write_combined;
+static struct ttm_pool_type *global_uncached;
-static struct ttm_pool_type global_dma32_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_dma32_uncached[MAX_ORDER];
+static struct ttm_pool_type *global_dma32_write_combined;
+static struct ttm_pool_type *global_dma32_uncached;
static struct mutex shrinker_lock;
static struct list_head shrinker_list;
@@ -493,8 +493,10 @@ EXPORT_SYMBOL(ttm_pool_free);
* @use_dma32: true if GFP_DMA32 should be used
*
* Initialize the pool and its pool types.
+ *
+ * Returns: 0 on successe, negative error code otherwise
*/
-void ttm_pool_init(struct ttm_pool *pool, struct device *dev,
+int ttm_pool_init(struct ttm_pool *pool, struct device *dev,
bool use_dma_alloc, bool use_dma32)
{
unsigned int i, j;
@@ -506,11 +508,30 @@ void ttm_pool_init(struct ttm_pool *pool, struct device
*dev,
pool->use_dma32 = use_dma32;
if (use_dma_alloc) {
- for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
+ for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i) {
+
Re: [PATCH v1 1/1] drm/bridge: anx7625: Tune K value for IVO panel
Hey Xin,
Thanks for submitting this.
On Thu, 5 Aug 2021 at 09:31, Xin Ji wrote:
>
> IVO panel require less input video clock variation than video clock
> variation in DP CTS spec.
>
> This patch decreases the K value of ANX7625 which will shrink eDP Tx
> video clock variation to meet IVO panel's requirement.
>
> Signed-off-by: Xin Ji
> ---
> drivers/gpu/drm/bridge/analogix/anx7625.c | 17 ++---
> drivers/gpu/drm/bridge/analogix/anx7625.h | 4 +++-
> 2 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> b/drivers/gpu/drm/bridge/analogix/anx7625.c
> index a3d82377066b..ceed1c7f3f28 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> @@ -384,6 +384,18 @@ static int anx7625_odfc_config(struct anx7625_data *ctx,
> return ret;
> }
>
> +static int anx7625_set_k_value(struct anx7625_data *ctx)
Pardon my ignorance, but I don't know what a K-value is. Could you add
a comment detailing
what the K-value does?
> +{
> + struct edid *edid = (struct edid *)ctx->slimport_edid_p.edid_raw_data;
> +
> + if (edid->mfg_id[0] == IVO_MID0 && edid->mfg_id[1] == IVO_MID1)
> + return anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
> +MIPI_DIGITAL_ADJ_1, 0x3B);
> +
> + return anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
> +MIPI_DIGITAL_ADJ_1, 0x3D);
> +}
> +
> static int anx7625_dsi_video_timing_config(struct anx7625_data *ctx)
> {
> struct device *dev = >client->dev;
> @@ -470,9 +482,8 @@ static int anx7625_dsi_video_timing_config(struct
> anx7625_data *ctx)
> MIPI_PLL_N_NUM_15_8, (n >> 8) & 0xff);
> ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
> MIPI_PLL_N_NUM_7_0,
> (n & 0xff));
> - /* Diff */
> - ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client,
> - MIPI_DIGITAL_ADJ_1, 0x3D);
> + /* Diff and K value */
With a proper comment above, this comment is no longer needed.
> + anx7625_set_k_value(ctx);
>
> ret |= anx7625_odfc_config(ctx, post_divider - 1);
>
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h
> b/drivers/gpu/drm/bridge/analogix/anx7625.h
> index 034c3840028f..6dcf64c703f9 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.h
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h
> @@ -210,7 +210,9 @@
> #define MIPI_VIDEO_STABLE_CNT 0x0A
>
> #define MIPI_LANE_CTRL_10 0x0F
> -#define MIPI_DIGITAL_ADJ_1 0x1B
> +#define MIPI_DIGITAL_ADJ_1 0x1B
> +#define IVO_MID0 0x26
> +#define IVO_MID1 0xCF
>
> #define MIPI_PLL_M_NUM_23_16 0x1E
> #define MIPI_PLL_M_NUM_15_80x1F
> --
> 2.25.1
>
LGTM with the above fix.
Reviewed-by: Robert Foss
Re: [PATCH v2 0/2] mainline panels used on Skov boards
Hi Oleksij, On Thu, Aug 05, 2021 at 01:19:42PM +0200, Oleksij Rempel wrote: > changes v2: > - set connector_type to DRM_MODE_CONNECTOR_DPI for the > logictechno_lttd800480070_l6wh_rt panel > > Sam Ravnborg (1): > drm/panel: simple: add Multi-Innotechnology MI1010AIT-1CP1 > > Søren Andersen (1): > drm/panel: simple: add LOGIC Technologies LTTD800480070-L6WH-RT Thanks for taking care of these. They have been on my TODO list for far too long. Applied to drm-misc-next. I edited Co-Developed-by => Co-developed-by to make checkpatch happy. To keep the history I have s-o-b the patches twice. When authored and now when applying as I thought this was the correct way to document the path of the patch. Sam
[PATCH v1] drm: bridge: it66121: Check drm_bridge_attach retval
The return value of drm_bridge_attach() is ignored during
the it66121_bridge_attach() call, which is incorrect.
Fixes: 988156dc2fc9 ("drm: bridge: add it66121 driver")
Signed-off-by: Robert Foss
---
drivers/gpu/drm/bridge/ite-it66121.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ite-it66121.c
b/drivers/gpu/drm/bridge/ite-it66121.c
index 7149ed40af83..2f2a09adb4bc 100644
--- a/drivers/gpu/drm/bridge/ite-it66121.c
+++ b/drivers/gpu/drm/bridge/ite-it66121.c
@@ -536,6 +536,8 @@ static int it66121_bridge_attach(struct drm_bridge *bridge,
return -EINVAL;
ret = drm_bridge_attach(bridge->encoder, ctx->next_bridge, bridge,
flags);
+ if (ret)
+ return ret;
ret = regmap_write_bits(ctx->regmap, IT66121_CLK_BANK_REG,
IT66121_CLK_BANK_PWROFF_RCLK, 0);
--
2.30.2
[PATCH] drm/amd/pm: Fix a memory leak in an error handling path in 'vangogh_tables_init()'
'watermarks_table' must be freed instead 'clocks_table', because
'clocks_table' is known to be NULL at this point and 'watermarks_table' is
never freed if the last kzalloc fails.
Fixes: c98ee89736b8 ("drm/amd/pm: add the fine grain tuning function for
vangogh")
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 335b3c70e1a7..06eea917284e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -256,7 +256,7 @@ static int vangogh_tables_init(struct smu_context *smu)
return 0;
err3_out:
- kfree(smu_table->clocks_table);
+ kfree(smu_table->watermarks_table);
err2_out:
kfree(smu_table->gpu_metrics_table);
err1_out:
--
2.30.2
Re: [PATCH v4 3/4] drm/shmem-helpers: Allocate wc pages on x86
Hi Am 23.07.21 um 09:36 schrieb Daniel Vetter: The real fix is to get at the architecture-specific wc allocator, which is currently not something that's exposed, but hidden within the dma api. I think having this stick out like this is better than hiding it behind fake generic code (like we do with drm_clflush, which defacto also only really works on x86). Also note that ttm has the exact same ifdef in its page allocator, but it does fall back to using dma_alloc_coherent on other platforms. If this fixes a real problem and there's no full solution yet, let's take what we have. So if you can extract the essence of this comment into a TODO comment that tells how to fix the issue, fell free to add my Acked-by: Thomas Zimmermann Best regards Thomas -Daniel Best regard Thomas + shmem->pages = pages; return 0; @@ -203,6 +212,11 @@ static void drm_gem_shmem_put_pages_locked(struct drm_gem_shmem_object *shmem) if (--shmem->pages_use_count > 0) return; +#ifdef CONFIG_X86 + if (shmem->map_wc) + set_pages_array_wb(shmem->pages, obj->size >> PAGE_SHIFT); +#endif + drm_gem_put_pages(obj, shmem->pages, shmem->pages_mark_dirty_on_put, shmem->pages_mark_accessed_on_put); -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Felix Imendörffer OpenPGP_signature Description: OpenPGP digital signature
Re: [git pull] drm fixes for 5.14-rc4
On Thu, Aug 5, 2021 at 2:14 PM Linus Torvalds wrote: > > This might possibly have been fixed already by the previous drm pull, > but I wanted to report it anyway, just in case. > > It happened after an uptime of over a week, so it might not be trivial > to reproduce. > > It's a NULL pointer dereference in dc_stream_retain() with the code being > > lock xadd %eax,0x390(%rdi) <-- trapping instruction > > and that's just the > > kref_get(>refcount); > > with a NULL 'stream' argument. > > Call Trace: >dc_resource_state_copy_construct+0x13f/0x190 [amdgpu] >amdgpu_dm_atomic_commit_tail+0xd5/0x1540 [amdgpu] >commit_tail+0x97/0x180 [drm_kms_helper] >process_one_work+0x1df/0x3a0 > > the oops is followed by a stream of > > [drm:amdgpu_dm_atomic_check [amdgpu]] *ERROR* [CRTC:55:crtc-1] > hw_done or flip_done timed out > > and the machine was not usable afterwards. > > lspci says this is a > > 49:00.0 VGA compatible controller [0300]: >Advanced Micro Devices, Inc. [AMD/ATI] Ellesmere >[Radeon RX 470/480/570/570X/580/580X/590] >[1002:67df] (rev e7) (prog-if 00 [VGA controller]) > > Full oops in the attachment, but I think the above is all the really > salient details. Thanks for the report. Adding some display folks to take a look. Alex
Re: [git pull] drm fixes for 5.14-rc4
This might possibly have been fixed already by the previous drm pull, but I wanted to report it anyway, just in case. It happened after an uptime of over a week, so it might not be trivial to reproduce. It's a NULL pointer dereference in dc_stream_retain() with the code being lock xadd %eax,0x390(%rdi) <-- trapping instruction and that's just the kref_get(>refcount); with a NULL 'stream' argument. Call Trace: dc_resource_state_copy_construct+0x13f/0x190 [amdgpu] amdgpu_dm_atomic_commit_tail+0xd5/0x1540 [amdgpu] commit_tail+0x97/0x180 [drm_kms_helper] process_one_work+0x1df/0x3a0 the oops is followed by a stream of [drm:amdgpu_dm_atomic_check [amdgpu]] *ERROR* [CRTC:55:crtc-1] hw_done or flip_done timed out and the machine was not usable afterwards. lspci says this is a 49:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Ellesmere [Radeon RX 470/480/570/570X/580/580X/590] [1002:67df] (rev e7) (prog-if 00 [VGA controller]) Full oops in the attachment, but I think the above is all the really salient details. Linus amd-gpu-ooops Description: Binary data
Re: [PATCH v3 09/14] vfio/pci: Change vfio_pci_try_bus_reset() to use the dev_set
On Thu, 5 Aug 2021 08:47:01 -0300
Jason Gunthorpe wrote:
> On Tue, Aug 03, 2021 at 10:52:25AM -0600, Alex Williamson wrote:
> > On Tue, 3 Aug 2021 13:41:52 -0300
> > Jason Gunthorpe wrote:
> > > On Tue, Aug 03, 2021 at 10:34:06AM -0600, Alex Williamson wrote:
> > > > I think the vfio_pci_find_reset_target() function needs to be re-worked
> > > > to just tell us true/false that it's ok to reset the provided device,
> > > > not to anoint an arbitrary target device. Thanks,
> > >
> > > Yes, though this logic is confusing, why do we need to check if any
> > > device needs a reset at this point? If we are being asked to reset
> > > vdev shouldn't vdev needs_reset?
> > >
> > > Or is the function more of a 'synchronize pending reset' kind of
> > > thing?
> >
> > Yes, the latter. For instance think about a multi-function PCI device
> > such as a GPU. The functions have dramatically different capabilities,
> > some might have function level reset abilities and others not. We want
> > to be able to trigger a bus reset as the last device of the set is
> > released, no matter the order they're released and no matter the
> > capabilities of the device we're currently processing. Thanks,
>
> I worked on this for awhile, I think this is much clearer about what
> this algorithm is trying to do:
>
> diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
> index 5d6db93d6c680f..e418bcbb68facc 100644
> --- a/drivers/vfio/pci/vfio_pci.c
> +++ b/drivers/vfio/pci/vfio_pci.c
> @@ -223,7 +223,7 @@ static void vfio_pci_probe_mmaps(struct vfio_pci_device
> *vdev)
> }
> }
>
> -static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
> +static bool vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
> static void vfio_pci_disable(struct vfio_pci_device *vdev);
> static int vfio_pci_try_zap_and_vma_lock_cb(struct pci_dev *pdev, void
> *data);
>
> @@ -404,6 +404,9 @@ static void vfio_pci_disable(struct vfio_pci_device *vdev)
> struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
> int i, bar;
>
> + /* For needs_reset */
> + lockdep_assert_held(>vdev.dev_set->lock);
> +
> /* Stop the device from further DMA */
> pci_clear_master(pdev);
>
> @@ -487,9 +490,7 @@ static void vfio_pci_disable(struct vfio_pci_device *vdev)
> out:
> pci_disable_device(pdev);
>
> - vfio_pci_try_bus_reset(vdev);
> -
> - if (!disable_idle_d3)
> + if (!vfio_pci_dev_set_try_reset(vdev->vdev.dev_set) && !disable_idle_d3)
> vfio_pci_set_power_state(vdev, PCI_D3hot);
> }
>
> @@ -2145,36 +2146,6 @@ static struct pci_driver vfio_pci_driver = {
> .err_handler= _err_handlers,
> };
>
> -static int vfio_pci_get_unused_devs(struct pci_dev *pdev, void *data)
> -{
> - struct vfio_devices *devs = data;
> - struct vfio_device *device;
> - struct vfio_pci_device *vdev;
> -
> - if (devs->cur_index == devs->max_index)
> - return -ENOSPC;
> -
> - device = vfio_device_get_from_dev(>dev);
> - if (!device)
> - return -EINVAL;
> -
> - if (pci_dev_driver(pdev) != _pci_driver) {
> - vfio_device_put(device);
> - return -EBUSY;
> - }
> -
> - vdev = container_of(device, struct vfio_pci_device, vdev);
> -
> - /* Fault if the device is not unused */
> - if (device->open_count) {
> - vfio_device_put(device);
> - return -EBUSY;
> - }
> -
> - devs->devices[devs->cur_index++] = vdev;
> - return 0;
> -}
> -
> static int vfio_pci_try_zap_and_vma_lock_cb(struct pci_dev *pdev, void *data)
> {
> struct vfio_devices *devs = data;
> @@ -2208,79 +2179,86 @@ static int vfio_pci_try_zap_and_vma_lock_cb(struct
> pci_dev *pdev, void *data)
> return 0;
> }
>
> +static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data)
> +{
> + struct vfio_device_set *dev_set = data;
> + struct vfio_device *cur;
> +
> + lockdep_assert_held(_set->lock);
> +
> + list_for_each_entry(cur, _set->device_list, dev_set_list)
> + if (cur->dev == >dev)
> + return 0;
> + return -EBUSY;
> +}
> +
> +static bool vfio_pci_dev_set_needs_reset(struct vfio_device_set *dev_set)
Slight nit on the name here since we're essentially combining
needs_reset along with the notion of the device being unused. I'm not
sure, maybe "should_reset"? Otherwise it looks ok. Thanks,
Alex
> +{
> + struct vfio_pci_device *cur;
> + bool needs_reset = false;
> +
> + list_for_each_entry(cur, _set->device_list, vdev.dev_set_list) {
> + /* No VFIO device in the set can have an open device FD */
> + if (cur->vdev.open_count)
> + return false;
> + needs_reset |= cur->needs_reset;
> + }
> + return needs_reset;
> +}
> +
> /*
> - * If a bus or slot reset is available for the provided device and:
> + * If a bus or slot
[PATCH v3 1/4] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding
1. There are 2 mmsys, namely vdosys0 and vdosys1 in mt8195. Each of them is bound to a display pipeline, so add their definition in mtk-mmsys documentation with 2 compatibles. 2. Add description for power-domain property. Signed-off-by: jason-jh.lin --- this patch is base on [1][2] [1] dt-bindings: arm: mediatek: mmsys: convert to YAML format - https://patchwork.kernel.org/project/linux-mediatek/patch/20210519161847.3747352-1-fpar...@baylibre.com/ [2] dt-bindings: arm: mediatek: mmsys: add MT8365 SoC binding - https://patchwork.kernel.org/project/linux-mediatek/patch/20210519161847.3747352-2-fpar...@baylibre.com/ --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 8 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 2d4ff0ce387b..68cb330d7595 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -30,6 +30,8 @@ properties: - mediatek,mt8173-mmsys - mediatek,mt8183-mmsys - mediatek,mt8365-mmsys + - mediatek,mt8195-vdosys0 + - mediatek,mt8195-vdosys1 - const: syscon - items: - const: mediatek,mt7623-mmsys @@ -39,6 +41,12 @@ properties: reg: maxItems: 1 + power-domains: +description: + A phandle and PM domain specifier as defined by bindings + of the power controller specified by phandle. See + Documentation/devicetree/bindings/power/power-domain.yaml for details. + "#clock-cells": const: 1 -- 2.18.0
[PATCH v3 3/4] dt-bindings: mediatek: add mediatek, dsc.yaml for mt8195 SoC binding
1. Add mediatek,dsc.yaml to describe DSC module in details.
2. Add mt8195 SoC binding to mediatek,dsc.yaml.
Signed-off-by: jason-jh.lin
---
.../display/mediatek/mediatek,dsc.yaml| 69 +++
1 file changed, 69 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
new file mode 100644
index ..f94a95c6a1c5
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dsc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: mediatek display DSC controller
+
+maintainers:
+ - CK Hu
+
+description: |
+ The DSC standard is a specification of the algorithms used for
+ compressing and decompressing image display streams, including
+ the specification of the syntax and semantics of the compressed
+ video bit stream. DSC is designed for real-time systems with
+ real-time compression, transmission, decompression and Display.
+
+properties:
+ compatible:
+oneOf:
+ - items:
+ - const: mediatek,mt8195-disp-dsc
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+items:
+ - description: DSC Wrapper Clock
+
+ power-domains:
+description: A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle. See
+ Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+ mediatek,gce-client-reg:
+ description:
+The register of display function block to be set by gce. There are 4
arguments,
+such as gce node, subsys id, offset and register size. The subsys id
that is
+mapping to the register of display function blocks is defined in the
gce header
+include/include/dt-bindings/gce/-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+
+dsc0: disp_dsc_wrap@1c009000 {
+compatible = "mediatek,mt8195-disp-dsc";
+reg = <0 0x1c009000 0 0x1000>;
+interrupts = ;
+power-domains = < MT8195_POWER_DOMAIN_VDOSYS0>;
+clocks = < CLK_VDO0_DSC_WRAP0>;
+mediatek,gce-client-reg = < SUBSYS_1c00 0x9000 0x1000>;
+};
+
--
2.18.0
[PATCH v3 2/4] dt-bindings: mediatek: display: split each block to individual yaml
1. Remove mediatek,dislpay.txt
2. Split each display function block to individual yaml file.
Signed-off-by: jason-jh.lin
---
.../display/mediatek/mediatek,aal.yaml| 75 ++
.../display/mediatek/mediatek,ccorr.yaml | 69 ++
.../display/mediatek/mediatek,color.yaml | 84 +++
.../display/mediatek/mediatek,disp.txt| 219 --
.../display/mediatek/mediatek,dither.yaml | 70 ++
.../display/mediatek/mediatek,gamma.yaml | 71 ++
.../display/mediatek/mediatek,merge.yaml | 57 +
.../display/mediatek/mediatek,mutex.yaml | 77 ++
.../display/mediatek/mediatek,od.yaml | 52 +
.../display/mediatek/mediatek,ovl-2l.yaml | 86 +++
.../display/mediatek/mediatek,ovl.yaml| 96
.../display/mediatek/mediatek,rdma.yaml | 110 +
.../display/mediatek/mediatek,split.yaml | 56 +
.../display/mediatek/mediatek,ufoe.yaml | 59 +
.../display/mediatek/mediatek,wdma.yaml | 86 +++
15 files changed, 1048 insertions(+), 219 deletions(-)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
delete mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
new file mode 100644
index ..7be772d77e36
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,aal.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: mediatek display adaptive ambient light processor
+
+maintainers:
+ - CK Hu
+
+description: |
+ The mediatek display adaptive ambient light processor, namely AAL,
+ is responsible for backlight power saving and sunlight visibility improving.
+ AAL device node must be siblings to the central MMSYS_CONFIG node.
+ For a description of the MMSYS_CONFIG binding, see
+ Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for
details.
+
+properties:
+ compatible:
+oneOf:
+ - items:
+ - const: mediatek,mt8173-disp-aal
+ - items:
+ - enum:
+ - mediatek,mt2712-disp-aal
+ - mediatek,mt8183-disp-aal
+ - enum:
+ - mediatek,mt8173-disp-aal
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ power-domains:
+description: A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle. See
+ Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+ clocks:
+items:
+ - description: AAL Clock
+
+ mediatek,gce-client-reg:
+description:
+ The register of display function block to be set by gce. There are 4
arguments,
+ such as gce node, subsys id, offset and register size. The subsys id
that is
+ mapping to the register of display function blocks is defined in the gce
header
+ include/include/dt-bindings/gce/-gce.h of each chips.
+$ref: /schemas/types.yaml#/definitions/phandle-array
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+
+aal@14015000 {
+compatible = "mediatek,mt8173-disp-aal";
+reg = <0 0x14015000 0 0x1000>;
+interrupts = ;
+power-domains = < MT8173_POWER_DOMAIN_MM>;
+clocks = < CLK_MM_DISP_AAL>;
+mediatek,gce-client-reg = < SUBSYS_1401 0x5000 0x1000>;
+};
+
diff --git
[PATCH v3 4/4] dt-bindings: mediatek: display: add mt8195 SoC binding
1. Add mt8195 SoC binding to AAL, CCORR, COLOR, DITHER, GAMMA, MERGE, MUTEX, OVL and RDMA yaml schema. 2. Add MERGE additional property description for mt8195 - async clock - fifo setting enable - reset controller Signed-off-by: jason-jh.lin --- .../display/mediatek/mediatek,aal.yaml| 1 + .../display/mediatek/mediatek,ccorr.yaml | 5 +++ .../display/mediatek/mediatek,color.yaml | 1 + .../display/mediatek/mediatek,dither.yaml | 5 +++ .../display/mediatek/mediatek,gamma.yaml | 5 +++ .../display/mediatek/mediatek,merge.yaml | 40 +++ .../display/mediatek/mediatek,mutex.yaml | 2 + .../display/mediatek/mediatek,ovl.yaml| 5 +++ .../display/mediatek/mediatek,rdma.yaml | 2 + 9 files changed, 66 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml index 7be772d77e36..e1820238db43 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml @@ -25,6 +25,7 @@ properties: - enum: - mediatek,mt2712-disp-aal - mediatek,mt8183-disp-aal + - mediatek,mt8195-disp-aal - enum: - mediatek,mt8173-disp-aal diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml index 5a1c27d6b3e2..4c556a2bc64a 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml @@ -21,6 +21,11 @@ properties: oneOf: - items: - const: mediatek,mt8183-disp-ccorr + - items: + - enum: + - mediatek,mt8195-disp-ccorr + - enum: + - mediatek,mt8183-disp-ccorr reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml index 9a3edf6f0b8e..a13096196a0c 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml @@ -35,6 +35,7 @@ properties: - items: - enum: - mediatek,mt8183-disp-color + - mediatek,mt8195-disp-color - enum: - mediatek,mt8173-disp-color reg: diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml index 20419f876410..e89fe7393291 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml @@ -22,6 +22,11 @@ properties: oneOf: - items: - const: mediatek,mt8183-disp-dither + - items: + - enum: + - mediatek,mt8195-disp-dither + - enum: + - mediatek,mt8183-disp-dither reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml index e2a1fc218e4f..dc78d6d05dee 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml @@ -23,6 +23,11 @@ properties: - const: mediatek,mt8173-disp-gamma - items: - const: mediatek,mt8183-disp-gamma + - items: + - enum: + - mediatek,mt8195-disp-gamma + - enum: + - mediatek,mt8183-disp-gamma reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml index 4cdce11d7fcd..1a27b037086b 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml @@ -21,6 +21,8 @@ properties: oneOf: - items: - const: mediatek,mt8173-disp-merge + - items: + - const: mediatek,mt8195-disp-merge reg: maxItems: 1 @@ -36,6 +38,31 @@ properties: clocks: items: - description: MERGE Clock + - description: MERGE Async Clock + Controlling the synchronous process between MERGE and other display function + blocks cross clock domain. + + mediatek,merge-fifo-en: + description: + The setting of merge fifo is mainly provided for the display latency buffer. +to ensure that the back-end panel display data will not be underrun, +a little more data is needed in the fifo. According to the merge fifo settings, +
[PATCH v3 0/4] add mt8195 SoC DRM binding
Change in v3: - slpit each display function block to individual taml file. Change in v2: - add power-domain property into mediatek,mmsys.yaml and modify commit message. jason-jh.lin (4): dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding dt-bindings: mediatek: display: split each block to individual yaml dt-bindings: mediatek: add mediatek,dsc.yaml for mt8195 SoC binding dt-bindings: mediatek: display: add mt8195 SoC binding .../bindings/arm/mediatek/mediatek,mmsys.yaml | 8 + .../display/mediatek/mediatek,aal.yaml| 76 ++ .../display/mediatek/mediatek,ccorr.yaml | 74 ++ .../display/mediatek/mediatek,color.yaml | 85 +++ .../display/mediatek/mediatek,disp.txt| 219 -- .../display/mediatek/mediatek,dither.yaml | 75 ++ .../display/mediatek/mediatek,dsc.yaml| 69 ++ .../display/mediatek/mediatek,gamma.yaml | 76 ++ .../display/mediatek/mediatek,merge.yaml | 97 .../display/mediatek/mediatek,mutex.yaml | 79 +++ .../display/mediatek/mediatek,od.yaml | 52 + .../display/mediatek/mediatek,ovl-2l.yaml | 86 +++ .../display/mediatek/mediatek,ovl.yaml| 101 .../display/mediatek/mediatek,rdma.yaml | 112 + .../display/mediatek/mediatek,split.yaml | 56 + .../display/mediatek/mediatek,ufoe.yaml | 59 + .../display/mediatek/mediatek,wdma.yaml | 86 +++ 17 files changed, 1191 insertions(+), 219 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml -- 2.18.0
[PATCH v5] drm/msm/dsi: add continuous clock support for 7nm PHY
Unlike previous generations, 7nm PHYs are required to collaborate with
the host for conitnuos clock mode. Add changes neccessary to enable
continuous clock mode in the 7nm DSI PHYs.
Signed-off-by: Dmitry Baryshkov
---
Changes since v4:
- Fix the comment regarding msm_dsi_phy_set_continuous_clock()
Changes since v3:
- Invert the DSI_LANE_CTRL_HS_REQ_SEL_PHY bit logic, as noted by
Abhinav.
Changes since v2:
- Really drop msm_dsi_phy_needs_hs_phy_sel()
Changes since v1:
- Remove the need for a separate msm_dsi_phy_needs_hs_phy_sel() call
- Fix setting continuous clock for a dual DSI case.
---
drivers/gpu/drm/msm/dsi/dsi.h | 3 ++-
drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c| 12
drivers/gpu/drm/msm/dsi/dsi_manager.c | 4 ++--
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 9 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 17 +
7 files changed, 40 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 9b8e9b07eced..58e63bf34fe9 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -109,7 +109,7 @@ int msm_dsi_host_enable(struct mipi_dsi_host *host);
int msm_dsi_host_disable(struct mipi_dsi_host *host);
int msm_dsi_host_power_on(struct mipi_dsi_host *host,
struct msm_dsi_phy_shared_timings *phy_shared_timings,
- bool is_dual_dsi);
+ bool is_dual_dsi, struct msm_dsi_phy *phy);
int msm_dsi_host_power_off(struct mipi_dsi_host *host);
int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host,
const struct drm_display_mode *mode);
@@ -175,6 +175,7 @@ int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
void msm_dsi_phy_snapshot(struct msm_disp_state *disp_state, struct
msm_dsi_phy *phy);
+bool msm_dsi_phy_set_continuous_clock(struct msm_dsi_phy *phy, bool enable);
#endif /* __DSI_CONNECTOR_H__ */
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h
b/drivers/gpu/drm/msm/dsi/dsi.xml.h
index eadbcc78fd72..473c81605054 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.xml.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h
@@ -518,6 +518,7 @@ static inline uint32_t
DSI_CLKOUT_TIMING_CTRL_T_CLK_POST(uint32_t val)
#define DSI_LANE_STATUS_DLN0_DIRECTION 0x0001
#define REG_DSI_LANE_CTRL 0x00a8
+#define DSI_LANE_CTRL_HS_REQ_SEL_PHY 0x0100
#define DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST 0x1000
#define REG_DSI_LANE_SWAP_CTRL 0x00ac
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index ed504fe5074f..3558e5cd400f 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -834,7 +834,7 @@ static inline enum dsi_cmd_dst_format dsi_get_cmd_fmt(
}
static void dsi_ctrl_config(struct msm_dsi_host *msm_host, bool enable,
- struct msm_dsi_phy_shared_timings *phy_shared_timings)
+ struct msm_dsi_phy_shared_timings *phy_shared_timings,
struct msm_dsi_phy *phy)
{
u32 flags = msm_host->mode_flags;
enum mipi_dsi_pixel_format mipi_fmt = msm_host->format;
@@ -929,6 +929,10 @@ static void dsi_ctrl_config(struct msm_dsi_host *msm_host,
bool enable,
if (!(flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) {
lane_ctrl = dsi_read(msm_host, REG_DSI_LANE_CTRL);
+
+ if (msm_dsi_phy_set_continuous_clock(phy, enable))
+ lane_ctrl &= ~DSI_LANE_CTRL_HS_REQ_SEL_PHY;
+
dsi_write(msm_host, REG_DSI_LANE_CTRL,
lane_ctrl | DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST);
}
@@ -2354,7 +2358,7 @@ static void msm_dsi_sfpb_config(struct msm_dsi_host
*msm_host, bool enable)
int msm_dsi_host_power_on(struct mipi_dsi_host *host,
struct msm_dsi_phy_shared_timings *phy_shared_timings,
- bool is_dual_dsi)
+ bool is_dual_dsi, struct msm_dsi_phy *phy)
{
struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
@@ -2394,7 +2398,7 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host,
dsi_timing_setup(msm_host, is_dual_dsi);
dsi_sw_reset(msm_host);
- dsi_ctrl_config(msm_host, true, phy_shared_timings);
+ dsi_ctrl_config(msm_host, true, phy_shared_timings, phy);
if (msm_host->disp_en_gpio)
gpiod_set_value(msm_host->disp_en_gpio, 1);
@@ -2425,7 +2429,7 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host)
goto
Re: [Intel-gfx] [PATCH] drm/i915: Be more gentle when exiting non-persistent contexts
On Thu, Aug 05, 2021 at 01:05:09PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> When a non-persistent context exits we currently mark it as banned in
> order to trigger fast termination of any outstanding GPU jobs it may have
> left running.
>
> In doing so we apply a very strict 1ms limit in which the left over job
> has to preempt before we issues an engine resets.
>
> Some workloads are not able to cleanly preempt in that time window and it
> can be argued that it would instead be better to give them a bit more
> grace since avoiding engine resets is generally preferrable.
>
> To achieve this the patch splits handling of banned contexts from simply
> closed non-persistent ones and then applies different timeouts for both
> and also extends the criteria which determines if a request should be
> scheduled back in after preemption or not.
>
> 15ms preempt timeout grace is given to exited non-persistent contexts
> which have been empirically tested to satisfy customers requirements
> and still provides reasonably quick cleanup post exit.
>
I think you need to rework your thinking here a bit as this a very
execlists specific solution and the GuC needs to be considered.
> v2:
> * Streamline fast path checks.
>
> v3:
> * Simplify by using only schedulable status.
> * Increase timeout to 20ms.
>
> v4:
> * Fix live_execlists selftest.
>
> v5:
> * Fix logic in kill_engines.
>
> v6:
> * Rebase.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Chris Wilson
> Cc: Zhen Han
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 22 +--
> drivers/gpu/drm/i915/gt/intel_context.c | 2 ++
> drivers/gpu/drm/i915/gt/intel_context.h | 17 +-
> drivers/gpu/drm/i915/gt/intel_context_types.h | 1 +
> .../drm/i915/gt/intel_execlists_submission.c | 11 --
> drivers/gpu/drm/i915/gt/selftest_execlists.c | 20 +++--
> drivers/gpu/drm/i915/i915_request.c | 2 +-
> 7 files changed, 57 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index cff72679ad7c..21fe5d4057ab 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1065,7 +1065,8 @@ static struct intel_engine_cs *active_engine(struct
> intel_context *ce)
> return engine;
> }
>
> -static void kill_engines(struct i915_gem_engines *engines, bool ban)
> +static void
> +kill_engines(struct i915_gem_engines *engines, bool ban, bool persistent)
> {
> struct i915_gem_engines_iter it;
> struct intel_context *ce;
> @@ -1079,8 +1080,15 @@ static void kill_engines(struct i915_gem_engines
> *engines, bool ban)
>*/
> for_each_gem_engine(ce, engines, it) {
> struct intel_engine_cs *engine;
> + bool skip = false;
> +
> + if (ban)
> + skip = intel_context_ban(ce, NULL);
> + else if (!persistent)
> + skip = !intel_context_clear_schedulable(ce);
schedulable doesn't hook into the backend at all, while
intel_context_ban does. In the case of GuC submission intel_context_ban
changes to preemption timeout to 1 us and disables scheduling resulting
in the context getting kicked off the hardware immediately. You likely
need to update intel_context_clear_schedulable to use the same vfunc as
intel_context_ban() but accept an argument for the value of the
preemption timeout. For a ban user a lower value, for clearing
schedulable use a higher value.
>
> - if (ban && intel_context_ban(ce, NULL))
> + /* Already previously banned or made non-schedulable? */
> + if (skip)
> continue;
>
> /*
> @@ -1093,7 +1101,7 @@ static void kill_engines(struct i915_gem_engines
> *engines, bool ban)
> engine = active_engine(ce);
>
> /* First attempt to gracefully cancel the context */
> - if (engine && !__cancel_engine(engine) && ban)
> + if (engine && !__cancel_engine(engine) && (ban || !persistent))
> /*
>* If we are unable to send a preemptive pulse to bump
>* the context from the GPU, we have to resort to a full
> @@ -1105,8 +1113,6 @@ static void kill_engines(struct i915_gem_engines
> *engines, bool ban)
>
> static void kill_context(struct i915_gem_context *ctx)
> {
> - bool ban = (!i915_gem_context_is_persistent(ctx) ||
> - !ctx->i915->params.enable_hangcheck);
> struct i915_gem_engines *pos, *next;
>
> spin_lock_irq(>stale.lock);
> @@ -1119,7 +1125,8 @@ static void kill_context(struct i915_gem_context *ctx)
>
> spin_unlock_irq(>stale.lock);
>
> - kill_engines(pos, ban);
> + kill_engines(pos, !ctx->i915->params.enable_hangcheck,
> +
Re: [PATCH v2 8/8] [RFC] drm/ingenic: convert to component framework for jz4780 hdmi
Hi Paul, > Am 05.08.2021 um 18:17 schrieb Paul Cercueil : > > Hi Nikolaus and Laurent, > > Le jeu., août 5 2021 at 18:07:20 +0200, H. Nikolaus Schaller > a écrit : >> Hi Laurent, >>> Am 05.08.2021 um 17:04 schrieb Laurent Pinchart >>> : >>> Hi Nikolaus, >>> Thank you for the patch. >>> On Thu, Aug 05, 2021 at 04:07:57PM +0200, H. Nikolaus Schaller wrote: This patch attempts to convert the ingenic-dw-hdmi driver into a version that uses the component framework. >>> Why ? What problem would this solve ? >> Well, it was suggested in a v1 we did post several months ago. I have not >> looked up by whom and do not exactly remember the reasons. >> We now simply thought that it is common style since dome dw-hdmi drivers >> make use of it but some others don't. And we got it working without. >> If it is not needed/requested by anyone, we can drop it from v3 (or add >> later). > > I don't remember exactly TBH - the only reason to use a component is to have > access to the main driver's "drm_device" structure. The IPU needs it for > instance, to register planes; but I don't think this HDMI driver needs it as > it registers a bridge. > > Cheers, > -Paul Ok, fine! We'll drop it and don't waste time. BR and thanks, NIkolaus
Re: [PATCH v2 8/8] [RFC] drm/ingenic: convert to component framework for jz4780 hdmi
Hi Nikolaus and Laurent, Le jeu., août 5 2021 at 18:07:20 +0200, H. Nikolaus Schaller a écrit : Hi Laurent, Am 05.08.2021 um 17:04 schrieb Laurent Pinchart : Hi Nikolaus, Thank you for the patch. On Thu, Aug 05, 2021 at 04:07:57PM +0200, H. Nikolaus Schaller wrote: This patch attempts to convert the ingenic-dw-hdmi driver into a version that uses the component framework. Why ? What problem would this solve ? Well, it was suggested in a v1 we did post several months ago. I have not looked up by whom and do not exactly remember the reasons. We now simply thought that it is common style since dome dw-hdmi drivers make use of it but some others don't. And we got it working without. If it is not needed/requested by anyone, we can drop it from v3 (or add later). I don't remember exactly TBH - the only reason to use a component is to have access to the main driver's "drm_device" structure. The IPU needs it for instance, to register planes; but I don't think this HDMI driver needs it as it registers a bridge. Cheers, -Paul
Re: [PATCH v2 8/8] [RFC] drm/ingenic: convert to component framework for jz4780 hdmi
Hi Laurent, > Am 05.08.2021 um 17:04 schrieb Laurent Pinchart > : > > Hi Nikolaus, > > Thank you for the patch. > > On Thu, Aug 05, 2021 at 04:07:57PM +0200, H. Nikolaus Schaller wrote: >> This patch attempts to convert the ingenic-dw-hdmi driver >> into a version that uses the component framework. > > Why ? What problem would this solve ? Well, it was suggested in a v1 we did post several months ago. I have not looked up by whom and do not exactly remember the reasons. We now simply thought that it is common style since dome dw-hdmi drivers make use of it but some others don't. And we got it working without. If it is not needed/requested by anyone, we can drop it from v3 (or add later). BR and thanks, Nikolaus
Re: [PATCH v2 3/8] drm/ingenic: Add support for JZ4780 and HDMI output
Hi Paul, > Am 05.08.2021 um 17:22 schrieb Paul Cercueil : > > Hi Nikolaus & Paul, > > Le jeu., août 5 2021 at 16:07:52 +0200, H. Nikolaus Schaller > a écrit : >> From: Paul Boddie >> Add support for the LCD controller present on JZ4780 SoCs. >> This SoC uses 8-byte descriptors which extend the current >> 4-byte descriptors used for other Ingenic SoCs. >> Also, add special handling for HDMI-A connectors. >> For some reason, only the primary planes are working >> properly. As soon as the overlay plane is enabled >> things go south :P >> Tested on MIPS Creator CI20 board. >> Signed-off-by: Paul Boddie >> Signed-off-by: Ezequiel Garcia >> Signed-off-by: H. Nikolaus Schaller >> --- >> drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 163 -- ... snip ... > > We already have these in ingenic-drm.h... > > Please only add the macros that you need and are missing. > > Cheers, > -Paul all are valid comments. We'll add them for v3 or find answers if some code fragments are needed (even if we don't know why) or not. BR and thanks, Nikolaus
Re: [PATCH v4 2/3] dt-bindings: Add DT bindings for QiShenglong Gopher 2b panel
On Thu, Aug 05, 2021 at 09:49:52AM +0200, Paul Cercueil wrote: > Hi Sam, > > Le mer., août 4 2021 at 20:25:23 +0200, Sam Ravnborg a > écrit : > > On Wed, Aug 04, 2021 at 03:23:52AM +0300, Artjom Vejsel wrote: > > > Add DT bindings for QiShenglong Gopher 2b 4.3" 480(RGB)x272 TFT LCD > > > panel. > > > > > > Signed-off-by: Artjom Vejsel > > Reviewed-by: Sam Ravnborg > > > > Paul, I assume you will apply when you are happy with the driver. > > I just pushed to drm-misc-next... but forgot to add your Reviewed-by when > applying the patches. What should we do about it? No worries, Sam
Re: [PATCH v2 3/8] drm/ingenic: Add support for JZ4780 and HDMI output
Hi Nikolaus & Paul,
Le jeu., août 5 2021 at 16:07:52 +0200, H. Nikolaus Schaller
a écrit :
From: Paul Boddie
Add support for the LCD controller present on JZ4780 SoCs.
This SoC uses 8-byte descriptors which extend the current
4-byte descriptors used for other Ingenic SoCs.
Also, add special handling for HDMI-A connectors.
For some reason, only the primary planes are working
properly. As soon as the overlay plane is enabled
things go south :P
Tested on MIPS Creator CI20 board.
Signed-off-by: Paul Boddie
Signed-off-by: Ezequiel Garcia
Signed-off-by: H. Nikolaus Schaller
---
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 163
--
drivers/gpu/drm/ingenic/ingenic-drm.h | 52 +++
2 files changed, 200 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index 5244f47634777..a2d103ae46833 100644
--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
+++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
@@ -56,13 +56,27 @@ struct ingenic_dma_hwdescs {
u16 palette[256] __aligned(16);
};
+struct ingenic_dma_hwdesc_ext {
+ struct ingenic_dma_hwdesc base;
+ u32 offsize;
+ u32 pagewidth;
+ u32 cpos;
+ u32 dessize;
+} __packed;
+
struct jz_soc_info {
bool needs_dev_clk;
bool has_osd;
bool map_noncoherent;
+ bool has_alpha;
+ bool has_pcfg;
+ bool has_recover;
+ bool has_rgbc;
+ unsigned int hwdesc_size;
unsigned int max_width, max_height;
const u32 *formats_f0, *formats_f1;
unsigned int num_formats_f0, num_formats_f1;
+ unsigned int max_reg;
};
struct ingenic_drm {
@@ -118,12 +132,11 @@ static bool ingenic_drm_writeable_reg(struct
device *dev, unsigned int reg)
}
}
-static const struct regmap_config ingenic_drm_regmap_config = {
+static struct regmap_config ingenic_drm_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
- .max_register = JZ_REG_LCD_SIZE1,
.writeable_reg = ingenic_drm_writeable_reg,
};
@@ -582,7 +595,39 @@ static void
ingenic_drm_plane_atomic_update(struct drm_plane *plane,
hwdesc = >dma_hwdescs->hwdesc_f1;
hwdesc->addr = addr;
- hwdesc->cmd = JZ_LCD_CMD_EOF_IRQ | (width * height * cpp / 4);
+ hwdesc->cmd = JZ_LCD_CMD_FRM_ENABLE | JZ_LCD_CMD_EOF_IRQ |
+ (width * height * cpp / 4);
+
+ if (priv->soc_info->hwdesc_size == sizeof(struct
ingenic_dma_hwdesc_ext)) {
I'd prefer a boolean flag, e.g. "soc_info->use_extended_hwdesc"
+ struct ingenic_dma_hwdesc_ext *hwdesc_ext;
+
+ /* Extended 8-byte descriptor */
+ hwdesc_ext = (struct ingenic_dma_hwdesc_ext *) hwdesc;
+ hwdesc_ext->cpos = 0;
+ hwdesc_ext->offsize = 0;
+ hwdesc_ext->pagewidth = 0;
+
+ switch (newstate->fb->format->format) {
+ case DRM_FORMAT_XRGB1555:
+ hwdesc_ext->cpos |= JZ_LCD_CPOS_RGB555;
+ fallthrough;
+ case DRM_FORMAT_RGB565:
+ hwdesc_ext->cpos |= JZ_LCD_CPOS_BPP_15_16;
+ break;
+ case DRM_FORMAT_XRGB:
+ hwdesc_ext->cpos |= JZ_LCD_CPOS_BPP_18_24;
+ break;
+ }
+ hwdesc_ext->cpos |= JZ_LCD_CPOS_PREMULTIPLY_LCD |
+ (3 <<
JZ_LCD_CPOS_COEFFICIENT_OFFSET);
Where's that magic value '3' coming from?
+
+ hwdesc_ext->dessize =
+ (0xff << JZ_LCD_DESSIZE_ALPHA_OFFSET) |
+ (((height - 1) & JZ_LCD_DESSIZE_HEIGHT_MASK) <<
+JZ_LCD_DESSIZE_HEIGHT_OFFSET) |
+ (((width - 1) & JZ_LCD_DESSIZE_WIDTH_MASK) <<
+ JZ_LCD_DESSIZE_WIDTH_OFFSET);
Use FIELD_PREP() from .
+ }
if (drm_atomic_crtc_needs_modeset(crtc_state)) {
fourcc = newstate->fb->format->format;
@@ -612,8 +657,12 @@ static void
ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode = _state->adjusted_mode;
struct drm_connector *conn = conn_state->connector;
struct drm_display_info *info = >display_info;
+ u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
unsigned int cfg, rgbcfg = 0;
+ if (info->num_bus_formats)
+ bus_format = info->bus_formats[0];
+
That code is going to change really soon, as I have my own PR ready to
convert the ingenic-drm driver to use a
Re: [PATCH v5 07/20] drm/panfrost: use scheduler dependency tracking
Acked-by: Alyssa Rosenzweig
On Thu, Aug 05, 2021 at 12:46:52PM +0200, Daniel Vetter wrote:
> Just deletes some code that's now more shared.
>
> Note that thanks to the split into drm_sched_job_init/arm we can now
> easily pull the _init() part from under the submission lock way ahead
> where we're adding the sync file in-fences as dependencies.
>
> v2: Correctly clean up the partially set up job, now that job_init()
> and job_arm() are apart (Emma).
>
> v3: Rebased over renamed functions for adding depdencies
>
> Acked-by: Emma Anholt
> Reviewed-by: Steven Price (v3)
> Signed-off-by: Daniel Vetter
> Cc: Rob Herring
> Cc: Tomeu Vizoso
> Cc: Steven Price
> Cc: Alyssa Rosenzweig
> Cc: Sumit Semwal
> Cc: "Christian K??nig"
> Cc: linux-me...@vger.kernel.org
> Cc: linaro-mm-...@lists.linaro.org
> Cc: Emma Anholt
> ---
> drivers/gpu/drm/panfrost/panfrost_drv.c | 16 ---
> drivers/gpu/drm/panfrost/panfrost_job.c | 38 -
> drivers/gpu/drm/panfrost/panfrost_job.h | 5 +---
> 3 files changed, 18 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c
> b/drivers/gpu/drm/panfrost/panfrost_drv.c
> index 1ffaef5ec5ff..16212b6b202e 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_drv.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
> @@ -218,7 +218,7 @@ panfrost_copy_in_sync(struct drm_device *dev,
> if (ret)
> goto fail;
>
> - ret = drm_gem_fence_array_add(>deps, fence);
> + ret = drm_sched_job_add_dependency(>base, fence);
>
> if (ret)
> goto fail;
> @@ -236,7 +236,7 @@ static int panfrost_ioctl_submit(struct drm_device *dev,
> void *data,
> struct drm_panfrost_submit *args = data;
> struct drm_syncobj *sync_out = NULL;
> struct panfrost_job *job;
> - int ret = 0;
> + int ret = 0, slot;
>
> if (!args->jc)
> return -EINVAL;
> @@ -258,14 +258,20 @@ static int panfrost_ioctl_submit(struct drm_device
> *dev, void *data,
>
> kref_init(>refcount);
>
> - xa_init_flags(>deps, XA_FLAGS_ALLOC);
> -
> job->pfdev = pfdev;
> job->jc = args->jc;
> job->requirements = args->requirements;
> job->flush_id = panfrost_gpu_get_latest_flush_id(pfdev);
> job->file_priv = file->driver_priv;
>
> + slot = panfrost_job_get_slot(job);
> +
> + ret = drm_sched_job_init(>base,
> + >file_priv->sched_entity[slot],
> + NULL);
> + if (ret)
> + goto fail_job_put;
> +
> ret = panfrost_copy_in_sync(dev, file, args, job);
> if (ret)
> goto fail_job;
> @@ -283,6 +289,8 @@ static int panfrost_ioctl_submit(struct drm_device *dev,
> void *data,
> drm_syncobj_replace_fence(sync_out, job->render_done_fence);
>
> fail_job:
> + drm_sched_job_cleanup(>base);
> +fail_job_put:
> panfrost_job_put(job);
> fail_out_sync:
> if (sync_out)
> diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c
> b/drivers/gpu/drm/panfrost/panfrost_job.c
> index 4bc962763e1f..a98f507dc779 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_job.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_job.c
> @@ -102,7 +102,7 @@ static struct dma_fence *panfrost_fence_create(struct
> panfrost_device *pfdev, in
> return >base;
> }
>
> -static int panfrost_job_get_slot(struct panfrost_job *job)
> +int panfrost_job_get_slot(struct panfrost_job *job)
> {
> /* JS0: fragment jobs.
>* JS1: vertex/tiler jobs
> @@ -242,13 +242,14 @@ static void panfrost_job_hw_submit(struct panfrost_job
> *job, int js)
>
> static int panfrost_acquire_object_fences(struct drm_gem_object **bos,
> int bo_count,
> - struct xarray *deps)
> + struct drm_sched_job *job)
> {
> int i, ret;
>
> for (i = 0; i < bo_count; i++) {
> /* panfrost always uses write mode in its current uapi */
> - ret = drm_gem_fence_array_add_implicit(deps, bos[i], true);
> + ret = drm_sched_job_add_implicit_dependencies(job, bos[i],
> + true);
> if (ret)
> return ret;
> }
> @@ -269,31 +270,21 @@ static void panfrost_attach_object_fences(struct
> drm_gem_object **bos,
> int panfrost_job_push(struct panfrost_job *job)
> {
> struct panfrost_device *pfdev = job->pfdev;
> - int slot = panfrost_job_get_slot(job);
> - struct drm_sched_entity *entity = >file_priv->sched_entity[slot];
> struct ww_acquire_ctx acquire_ctx;
> int ret = 0;
>
> -
> ret = drm_gem_lock_reservations(job->bos, job->bo_count,
> _ctx);
> if (ret)
> return ret;
>
>
Re: [PATCH] drm/omap: Depend on CONFIG_OF
On Thu, Aug 5, 2021 at 5:07 PM Peter Stuge wrote: > Laurent Pinchart wrote: > > +++ b/drivers/gpu/drm/omapdrm/Kconfig > > @@ -1,7 +1,7 @@ > > # SPDX-License-Identifier: GPL-2.0-only > > config DRM_OMAP > > tristate "OMAP DRM" > > - depends on DRM > > + depends on DRM && OF > > depends on ARCH_OMAP2PLUS || ARCH_MULTIPLATFORM > > select OMAP2_DSS > > select DRM_KMS_HELPER > > Would it make sense to select OF instead? select is extremely harmful for any user-visible symbols or symbols with dependencies. So no, not a good idea. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch
Re: [PATCH v5 01/20] drm/sched: Split drm_sched_job_init
On Thu, Aug 5, 2021 at 4:47 PM Christian König wrote: > > Am 05.08.21 um 16:07 schrieb Daniel Vetter: > > On Thu, Aug 5, 2021 at 3:44 PM Christian König > > wrote: > >> Am 05.08.21 um 12:46 schrieb Daniel Vetter: > >>> This is a very confusingly named function, because not just does it > >>> init an object, it arms it and provides a point of no return for > >>> pushing a job into the scheduler. It would be nice if that's a bit > >>> clearer in the interface. > >>> > >>> But the real reason is that I want to push the dependency tracking > >>> helpers into the scheduler code, and that means drm_sched_job_init > >>> must be called a lot earlier, without arming the job. > >>> > >>> v2: > >>> - don't change .gitignore (Steven) > >>> - don't forget v3d (Emma) > >>> > >>> v3: Emma noticed that I leak the memory allocated in > >>> drm_sched_job_init if we bail out before the point of no return in > >>> subsequent driver patches. To be able to fix this change > >>> drm_sched_job_cleanup() so it can handle being called both before and > >>> after drm_sched_job_arm(). > >>> > >>> Also improve the kerneldoc for this. > >>> > >>> v4: > >>> - Fix the drm_sched_job_cleanup logic, I inverted the booleans, as > >>> usual (Melissa) > >>> > >>> - Christian pointed out that drm_sched_entity_select_rq() also needs > >>> to be moved into drm_sched_job_arm, which made me realize that the > >>> job->id definitely needs to be moved too. > >>> > >>> Shuffle things to fit between job_init and job_arm. > >>> > >>> v5: > >>> Reshuffle the split between init/arm once more, amdgpu abuses > >>> drm_sched.ready to signal gpu reset failures. Also document this > >>> somewhat. (Christian) > >>> > >>> v6: > >>> Rebase on top of the msm drm/sched support. Note that the > >>> drm_sched_job_init() call is completely misplaced, and hence also the > >>> split-out drm_sched_entity_push_job(). I've put in a FIXME which the next > >>> patch will address. > >>> > >>> Acked-by: Melissa Wen > >>> Cc: Melissa Wen > >>> Acked-by: Emma Anholt > >>> Acked-by: Steven Price (v2) > >>> Reviewed-by: Boris Brezillon (v5) > >>> Signed-off-by: Daniel Vetter > >> At least the amdgpu parts look ok of hand, but I can't judge the rest I > >> think. > > The thing that really scares me here and that I got wrong a few times > > is the cleanup for drm_sched_job at the various points. Can you give > > those parts in drm/scheduler/ a full review pls, just to make sure? I > > can note that in the tag ofc, just like a bit more confidence here > > that it's not busted :-) > > I can take another look, but I won't have time for that in the next two > weeks - vacation and kid starting school. Hm ok I'll ask others, since this is kinda needed for the msm fix. At least the msm design relies on this split being present, so fixing it without this split here would be a pile of rather pointless work. -Daniel > Christian. > > > > >> So only Acked-by: Christian König > > Thanks, Daniel > > > >>> Cc: Lucas Stach > >>> Cc: Russell King > >>> Cc: Christian Gmeiner > >>> Cc: Qiang Yu > >>> Cc: Rob Herring > >>> Cc: Tomeu Vizoso > >>> Cc: Steven Price > >>> Cc: Alyssa Rosenzweig > >>> Cc: David Airlie > >>> Cc: Daniel Vetter > >>> Cc: Sumit Semwal > >>> Cc: "Christian König" > >>> Cc: Masahiro Yamada > >>> Cc: Kees Cook > >>> Cc: Adam Borowski > >>> Cc: Nick Terrell > >>> Cc: Mauro Carvalho Chehab > >>> Cc: Paul Menzel > >>> Cc: Sami Tolvanen > >>> Cc: Viresh Kumar > >>> Cc: Alex Deucher > >>> Cc: Dave Airlie > >>> Cc: Nirmoy Das > >>> Cc: Deepak R Varma > >>> Cc: Lee Jones > >>> Cc: Kevin Wang > >>> Cc: Chen Li > >>> Cc: Luben Tuikov > >>> Cc: "Marek Olšák" > >>> Cc: Dennis Li > >>> Cc: Maarten Lankhorst > >>> Cc: Andrey Grodzovsky > >>> Cc: Sonny Jiang > >>> Cc: Boris Brezillon > >>> Cc: Tian Tao > >>> Cc: etna...@lists.freedesktop.org > >>> Cc: l...@lists.freedesktop.org > >>> Cc: linux-me...@vger.kernel.org > >>> Cc: linaro-mm-...@lists.linaro.org > >>> Cc: Emma Anholt > >>> Cc: Rob Clark > >>> Cc: Sean Paul > >>> Cc: linux-arm-...@vger.kernel.org > >>> Cc: freedr...@lists.freedesktop.org > >>> --- > >>>drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 + > >>>drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 + > >>>drivers/gpu/drm/etnaviv/etnaviv_sched.c | 2 + > >>>drivers/gpu/drm/lima/lima_sched.c| 2 + > >>>drivers/gpu/drm/msm/msm_gem_submit.c | 3 ++ > >>>drivers/gpu/drm/panfrost/panfrost_job.c | 2 + > >>>drivers/gpu/drm/scheduler/sched_entity.c | 6 +-- > >>>drivers/gpu/drm/scheduler/sched_fence.c | 19 --- > >>>drivers/gpu/drm/scheduler/sched_main.c | 69 > >>>drivers/gpu/drm/v3d/v3d_gem.c| 2 + > >>>include/drm/gpu_scheduler.h | 7 ++- > >>>11 files changed, 94 insertions(+), 22 deletions(-) > >>> > >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > >>>
Re: [PATCH] drm/omap: Depend on CONFIG_OF
Laurent Pinchart wrote: > +++ b/drivers/gpu/drm/omapdrm/Kconfig > @@ -1,7 +1,7 @@ > # SPDX-License-Identifier: GPL-2.0-only > config DRM_OMAP > tristate "OMAP DRM" > - depends on DRM > + depends on DRM && OF > depends on ARCH_OMAP2PLUS || ARCH_MULTIPLATFORM > select OMAP2_DSS > select DRM_KMS_HELPER Would it make sense to select OF instead? //Peter
Re: [PATCH v5 14/20] drm/sched: Don't store self-dependencies
On Thu, Aug 5, 2021 at 3:57 PM Christian König wrote:
> Am 05.08.21 um 15:25 schrieb Daniel Vetter:
> > On Thu, Aug 5, 2021 at 3:18 PM Christian König
> > wrote:
> >>
> >>
> >> Am 05.08.21 um 12:46 schrieb Daniel Vetter:
> >>> This is essentially part of drm_sched_dependency_optimized(), which
> >>> only amdgpu seems to make use of. Use it a bit more.
> >>>
> >>> This would mean that as-is amdgpu can't use the dependency helpers, at
> >>> least not with the current approach amdgpu has for deciding whether a
> >>> vm_flush is needed. Since amdgpu also has very special rules around
> >>> implicit fencing it can't use those helpers either, and adding a
> >>> drm_sched_job_await_fence_always or similar for amdgpu wouldn't be too
> >>> onerous. That way the special case handling for amdgpu sticks even
> >>> more out and we have higher chances that reviewers that go across all
> >>> drivers wont miss it.
> >> Well you should probably drop the sentence about the vm_flush, this is
> >> completely unrelated.
> >>
> >> Additional to that I still don't think that this is a good idea.
> >> Dependency handling is something completely driver specific.
> >>
> >> E.g. even when you have submitted jobs back to back they still might
> >> need a cache flush in between and that is not only for amdgpu like this.
> >>
> >> What you can do is to optimize for while looking at the fences later on
> >> and then note that you have done so and what the last hw fence is you
> >> used instead.
> > Out of 6 drivers using drm/sched 5 can use this. When we get i915
> > over, that one will be added to the list. amdgpu can't use any of this
> > anyway due to the vm_id allocation requirements, which is why I
> > mention that. Also note that all the callbacks are still there, so you
> > can just ignore this all and still build your own. Like amdgpu does.
>
> The VMID allocation stuff is rather easy to handle, that's why I noted
> we should remove that sentence.
>
> The problematic stuff is handling the cache flush and pipeline sync
> which you make impossible with this here.
Well the vmid is tied to the flush, but yeah the commit message
doesn't make this clear.
> > So I'm not sure what exactly your object is, aside from "this doesn't
> > fit for amdgpu", which a) I know b) the commit message explains c)
> > doesn't actually hurt amdgpu in the slightest. And we still get the
> > benefit that for most drivers it's a nice optimization.
>
> Well exactly that's what I wanted to avoid. We still can use this in
> amdgpu even with the VMID allocation stuff and I still hope to do so.
>
> Can't we add this as a wrapper or similar?
This patch is not the only thing that will prevent you from using
these helpers, because amdgpu also needs to keep track of all the
fences in the xarray, which these helpers don't - they get cleared out
as we hand them off to the scheduler. So it's more surgery than just
not having this, and I'm honestly not sure it's worth it since you'd
need to duplicate quite a bit more than just the functions to add
dependencies.
-Daniel
-Daniel
> Christian.
>
> > -Daniel
> >
> >> Regards,
> >> Christian.
> >>
> >>> Reviewed-by: Lucas Stach
> >>> Acked-by: Melissa Wen
> >>> Signed-off-by: Daniel Vetter
> >>> Cc: "Christian König"
> >>> Cc: Daniel Vetter
> >>> Cc: Luben Tuikov
> >>> Cc: Andrey Grodzovsky
> >>> Cc: Alex Deucher
> >>> ---
> >>>drivers/gpu/drm/scheduler/sched_main.c | 7 +++
> >>>1 file changed, 7 insertions(+)
> >>>
> >>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c
> >>> b/drivers/gpu/drm/scheduler/sched_main.c
> >>> index f77456929139..49e507f91ec0 100644
> >>> --- a/drivers/gpu/drm/scheduler/sched_main.c
> >>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
> >>> @@ -660,6 +660,13 @@ int drm_sched_job_add_dependency(struct
> >>> drm_sched_job *job,
> >>>if (!fence)
> >>>return 0;
> >>>
> >>> + /* if it's a fence from us it's guaranteed to be earlier */
> >>> + if (fence->context == job->entity->fence_context ||
> >>> + fence->context == job->entity->fence_context + 1) {
> >>> + dma_fence_put(fence);
> >>> + return 0;
> >>> + }
> >>> +
> >>>/* Deduplicate if we already depend on a fence from the same
> >>> context.
> >>> * This lets the size of the array of deps scale with the number of
> >>> * engines involved, rather than the number of BOs.
> >
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
Re: [PATCH v2 8/8] [RFC] drm/ingenic: convert to component framework for jz4780 hdmi
Hi Nikolaus,
Thank you for the patch.
On Thu, Aug 05, 2021 at 04:07:57PM +0200, H. Nikolaus Schaller wrote:
> This patch attempts to convert the ingenic-dw-hdmi driver
> into a version that uses the component framework.
Why ? What problem would this solve ?
> Unfortunately the new version does not work.
>
> Debugging shows that ingenic_dw_hdmi_bind() is never called.
>
> Suggestions for reasons and fixes are welcome.
>
> Signed-off-by: Paul Boddie
> Co-authored-by: Paul Boddie
> Signed-off-by: H. Nikolaus Schaller
> ---
> drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 57 ++-
> 1 file changed, 46 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
> b/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
> index 61e7a57d7cec1..a5ba0b69baa8c 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
> @@ -1,17 +1,24 @@
> // SPDX-License-Identifier: GPL-2.0
> /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
> - * Copyright (C) 2019, 2020 Paul Boddie
> + * Copyright (C) 2019, 2020, 2021 Paul Boddie
> *
> * Derived from dw_hdmi-imx.c with i.MX portions removed.
> - * Probe and remove operations derived from rcar_dw_hdmi.c.
> */
>
> +#include
> #include
> #include
> #include
>
> #include
> #include
> +#include
> +#include
> +
> +struct ingenic_dw_hdmi_encoder {
> + struct drm_encoder encoder;
> + struct dw_hdmi *hdmi;
> +};
>
> static const struct dw_hdmi_mpll_config ingenic_mpll_cfg[] = {
> { 4525, { { 0x01e0, 0x }, { 0x21e1, 0x }, { 0x41e2, 0x
> } } },
> @@ -87,24 +94,52 @@ static const struct of_device_id ingenic_dw_hdmi_dt_ids[]
> = {
> };
> MODULE_DEVICE_TABLE(of, ingenic_dw_hdmi_dt_ids);
>
> -static int ingenic_dw_hdmi_probe(struct platform_device *pdev)
> +static int ingenic_dw_hdmi_bind(struct device *dev, struct device *master,
> + void *data)
> {
> - struct dw_hdmi *hdmi;
> + struct platform_device *pdev = to_platform_device(dev);
> + struct drm_device *drm = data;
> + struct drm_encoder *enc;
> + struct ingenic_dw_hdmi_encoder *hdmi_encoder;
>
> - hdmi = dw_hdmi_probe(pdev, _dw_hdmi_plat_data);
> - if (IS_ERR(hdmi))
> - return PTR_ERR(hdmi);
> + hdmi_encoder = drmm_simple_encoder_alloc(drm, struct
> ingenic_dw_hdmi_encoder,
> + encoder,
> DRM_MODE_ENCODER_TMDS);
> + if (IS_ERR(hdmi_encoder))
> + return PTR_ERR(hdmi_encoder);
>
> - platform_set_drvdata(pdev, hdmi);
> + enc = _encoder->encoder;
> + drm_encoder_helper_add(enc, NULL);
> + hdmi_encoder->hdmi = dw_hdmi_bind(pdev, enc,
> _dw_hdmi_plat_data);
> +
> + if (IS_ERR(hdmi_encoder->hdmi))
> + return PTR_ERR(hdmi_encoder->hdmi);
> +
> + dev_set_drvdata(dev, hdmi_encoder->hdmi);
>
> return 0;
> }
>
> -static int ingenic_dw_hdmi_remove(struct platform_device *pdev)
> +static void ingenic_dw_hdmi_unbind(struct device *dev, struct device *master,
> +void *data)
> +{
> + struct dw_hdmi *hdmi = dev_get_drvdata(dev);
> +
> + dw_hdmi_unbind(hdmi);
> +}
> +
> +static const struct component_ops ingenic_dw_hdmi_ops = {
> + .bind = ingenic_dw_hdmi_bind,
> + .unbind = ingenic_dw_hdmi_unbind,
> +};
> +
> +static int ingenic_dw_hdmi_probe(struct platform_device *pdev)
> {
> - struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
> + return component_add(>dev, _dw_hdmi_ops);
> +}
>
> - dw_hdmi_remove(hdmi);
> +static int ingenic_dw_hdmi_remove(struct platform_device *pdev)
> +{
> + component_del(>dev, _dw_hdmi_ops);
>
> return 0;
> }
--
Regards,
Laurent Pinchart
Re: [PATCH v5 01/20] drm/sched: Split drm_sched_job_init
Am 05.08.21 um 16:07 schrieb Daniel Vetter: On Thu, Aug 5, 2021 at 3:44 PM Christian König wrote: Am 05.08.21 um 12:46 schrieb Daniel Vetter: This is a very confusingly named function, because not just does it init an object, it arms it and provides a point of no return for pushing a job into the scheduler. It would be nice if that's a bit clearer in the interface. But the real reason is that I want to push the dependency tracking helpers into the scheduler code, and that means drm_sched_job_init must be called a lot earlier, without arming the job. v2: - don't change .gitignore (Steven) - don't forget v3d (Emma) v3: Emma noticed that I leak the memory allocated in drm_sched_job_init if we bail out before the point of no return in subsequent driver patches. To be able to fix this change drm_sched_job_cleanup() so it can handle being called both before and after drm_sched_job_arm(). Also improve the kerneldoc for this. v4: - Fix the drm_sched_job_cleanup logic, I inverted the booleans, as usual (Melissa) - Christian pointed out that drm_sched_entity_select_rq() also needs to be moved into drm_sched_job_arm, which made me realize that the job->id definitely needs to be moved too. Shuffle things to fit between job_init and job_arm. v5: Reshuffle the split between init/arm once more, amdgpu abuses drm_sched.ready to signal gpu reset failures. Also document this somewhat. (Christian) v6: Rebase on top of the msm drm/sched support. Note that the drm_sched_job_init() call is completely misplaced, and hence also the split-out drm_sched_entity_push_job(). I've put in a FIXME which the next patch will address. Acked-by: Melissa Wen Cc: Melissa Wen Acked-by: Emma Anholt Acked-by: Steven Price (v2) Reviewed-by: Boris Brezillon (v5) Signed-off-by: Daniel Vetter At least the amdgpu parts look ok of hand, but I can't judge the rest I think. The thing that really scares me here and that I got wrong a few times is the cleanup for drm_sched_job at the various points. Can you give those parts in drm/scheduler/ a full review pls, just to make sure? I can note that in the tag ofc, just like a bit more confidence here that it's not busted :-) I can take another look, but I won't have time for that in the next two weeks - vacation and kid starting school. Christian. So only Acked-by: Christian König Thanks, Daniel Cc: Lucas Stach Cc: Russell King Cc: Christian Gmeiner Cc: Qiang Yu Cc: Rob Herring Cc: Tomeu Vizoso Cc: Steven Price Cc: Alyssa Rosenzweig Cc: David Airlie Cc: Daniel Vetter Cc: Sumit Semwal Cc: "Christian König" Cc: Masahiro Yamada Cc: Kees Cook Cc: Adam Borowski Cc: Nick Terrell Cc: Mauro Carvalho Chehab Cc: Paul Menzel Cc: Sami Tolvanen Cc: Viresh Kumar Cc: Alex Deucher Cc: Dave Airlie Cc: Nirmoy Das Cc: Deepak R Varma Cc: Lee Jones Cc: Kevin Wang Cc: Chen Li Cc: Luben Tuikov Cc: "Marek Olšák" Cc: Dennis Li Cc: Maarten Lankhorst Cc: Andrey Grodzovsky Cc: Sonny Jiang Cc: Boris Brezillon Cc: Tian Tao Cc: etna...@lists.freedesktop.org Cc: l...@lists.freedesktop.org Cc: linux-me...@vger.kernel.org Cc: linaro-mm-...@lists.linaro.org Cc: Emma Anholt Cc: Rob Clark Cc: Sean Paul Cc: linux-arm-...@vger.kernel.org Cc: freedr...@lists.freedesktop.org --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 + drivers/gpu/drm/etnaviv/etnaviv_sched.c | 2 + drivers/gpu/drm/lima/lima_sched.c| 2 + drivers/gpu/drm/msm/msm_gem_submit.c | 3 ++ drivers/gpu/drm/panfrost/panfrost_job.c | 2 + drivers/gpu/drm/scheduler/sched_entity.c | 6 +-- drivers/gpu/drm/scheduler/sched_fence.c | 19 --- drivers/gpu/drm/scheduler/sched_main.c | 69 drivers/gpu/drm/v3d/v3d_gem.c| 2 + include/drm/gpu_scheduler.h | 7 ++- 11 files changed, 94 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c index 139cd3bf1ad6..32e80bc6af22 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c @@ -1226,6 +1226,8 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p, if (r) goto error_unlock; + drm_sched_job_arm(>base); + /* No memory allocation is allowed while holding the notifier lock. * The lock is held until amdgpu_cs_submit is finished and fence is * added to BOs. diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c index d33e6d97cc89..5ddb955d2315 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c @@ -170,6 +170,8 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct drm_sched_entity *entity, if (r) return r; + drm_sched_job_arm(>base); + *f = dma_fence_get(>base.s_fence->finished); amdgpu_job_free_resources(job);
Re: [PATCH v2 1/8] drm/bridge: synopsis: Add mode_fixup and bridge timings support
Hi Robert, > Am 05.08.2021 um 16:32 schrieb Robert Foss : > > Hey Nikolaus, > > Thanks for submitting this series. > > On Thu, 5 Aug 2021 at 16:08, H. Nikolaus Schaller wrote: >> >> From: Paul Boddie >> >> + .mode_fixup = dw_hdmi_bridge_mode_fixup, > > mode_fixup() has been deprecated[1] in favor of atomic_check(), care > has to be taken when switching to atomic_check() as it has access to > the full atomic commit. > > Looking at this driver, it's using mode_set as well, which should be fixed. > > [1] > https://lore.kernel.org/dri-devel/20210722062246.2512666-8-...@ravnborg.org/ Thanks for this link! I have found some patches which convert mode_fixup -> atomic_check (e.g. 3afb2a28fa2404) and atomic_check was apparently introduced by b86d895524ab72 That should be sufficient information that we can modify it. BR and thanks, Nikolaus
Re: [PATCH v2 1/8] drm/bridge: synopsis: Add mode_fixup and bridge timings support
Hey Nikolaus,
Thanks for submitting this series.
On Thu, 5 Aug 2021 at 16:08, H. Nikolaus Schaller wrote:
>
> From: Paul Boddie
>
> The platform-specific configuration structure is augmented with
> mode_fixup and timings members so that specialisations of the
> Synopsys driver can introduce mode flags and bus flags.
>
> Signed-off-by: Paul Boddie
> Signed-off-by: Ezequiel Garcia
> Signed-off-by: H. Nikolaus Schaller
> ---
> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16
> include/drm/bridge/dw_hdmi.h | 5 +
> 2 files changed, 21 insertions(+)
>
> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> index e7c7c9b9c646f..e8499eb11328c 100644
> --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> @@ -2810,6 +2810,19 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
> return mode_status;
> }
>
> +static bool
> +dw_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode,
> + struct drm_display_mode *adjusted_mode)
> +{
> + struct dw_hdmi *hdmi = bridge->driver_private;
> +
> + if (hdmi->plat_data->mode_fixup)
> + return hdmi->plat_data->mode_fixup(bridge, mode,
> adjusted_mode);
> +
> + return true;
> +}
> +
> static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
> const struct drm_display_mode *orig_mode,
> const struct drm_display_mode *mode)
> @@ -2883,6 +2896,7 @@ static const struct drm_bridge_funcs
> dw_hdmi_bridge_funcs = {
> .atomic_disable = dw_hdmi_bridge_atomic_disable,
> .mode_set = dw_hdmi_bridge_mode_set,
> .mode_valid = dw_hdmi_bridge_mode_valid,
> + .mode_fixup = dw_hdmi_bridge_mode_fixup,
mode_fixup() has been deprecated[1] in favor of atomic_check(), care
has to be taken when switching to atomic_check() as it has access to
the full atomic commit.
Looking at this driver, it's using mode_set as well, which should be fixed.
[1] https://lore.kernel.org/dri-devel/20210722062246.2512666-8-...@ravnborg.org/
> .detect = dw_hdmi_bridge_detect,
> .get_edid = dw_hdmi_bridge_get_edid,
> };
> @@ -3364,6 +3378,8 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device
> *pdev,
> #ifdef CONFIG_OF
> hdmi->bridge.of_node = pdev->dev.of_node;
> #endif
> + if (plat_data->timings)
> + hdmi->bridge.timings = plat_data->timings;
>
> memset(, 0, sizeof(pdevinfo));
> pdevinfo.parent = dev;
> diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
> index 6a5716655619b..677137445d534 100644
> --- a/include/drm/bridge/dw_hdmi.h
> +++ b/include/drm/bridge/dw_hdmi.h
> @@ -8,6 +8,7 @@
>
> #include
>
> +struct drm_bridge;
> struct drm_display_info;
> struct drm_display_mode;
> struct drm_encoder;
> @@ -140,6 +141,10 @@ struct dw_hdmi_plat_data {
> enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data,
>const struct drm_display_info
> *info,
>const struct drm_display_mode
> *mode);
> + bool (*mode_fixup)(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode,
> + struct drm_display_mode *adjusted_mode);
> + const struct drm_bridge_timings *timings;
>
> /* Vendor PHY support */
> const struct dw_hdmi_phy_ops *phy_ops;
> --
> 2.31.1
>
[PATCH v2 0/8] MIPS: jz4780 HDMI
This series adds HDMI support for JZ4780 and CI20 board V2: - code and commit messages revisited for checkpatch warnings - rebased on v5.14-rc4 - include (failed, hence RFC 8/8) attempt to convert to component framework (was suggested by Paul Cercueil a while ago) H. Nikolaus Schaller (2): MIPS: CI20: defconfig: configure for DRM_DW_HDMI_JZ4780 [RFC] drm/ingenic: convert to component framework for jz4780 hdmi Paul Boddie (5): drm/bridge: synopsis: Add mode_fixup and bridge timings support drm/ingenic: Add jz4780 Synopsys HDMI driver drm/ingenic: Add support for JZ4780 and HDMI output MIPS: DTS: jz4780: account for Synopsys HDMI driver and LCD controller MIPS: DTS: CI20: add HDMI setup Sam Ravnborg (1): dt-bindings: display: Add ingenic-jz4780-hdmi DT Schema .../bindings/display/ingenic-jz4780-hdmi.yaml | 82 + arch/mips/boot/dts/ingenic/ci20.dts | 64 +++ arch/mips/boot/dts/ingenic/jz4780.dtsi| 45 + arch/mips/configs/ci20_defconfig | 7 + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 ++ drivers/gpu/drm/ingenic/Kconfig | 9 + drivers/gpu/drm/ingenic/Makefile | 1 + drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 163 -- drivers/gpu/drm/ingenic/ingenic-drm.h | 52 ++ drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 156 + include/drm/bridge/dw_hdmi.h | 5 + 11 files changed, 585 insertions(+), 15 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/ingenic-jz4780-hdmi.yaml create mode 100644 drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c -- 2.31.1
[PATCH v2 6/8] MIPS: DTS: CI20: add HDMI setup
From: Paul Boddie
We need to hook up
* HDMI power regulator
* HDMI connector
* DDC pinmux
* HDMI and LCD endpoint connections
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/boot/dts/ingenic/ci20.dts | 64 +
1 file changed, 64 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arch/mips/boot/dts/ingenic/ci20.dts
index a688809beebca..9e87b1169dbdc 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -78,6 +78,28 @@ eth0_power: fixedregulator@0 {
enable-active-high;
};
+ hdmi_power: fixedregulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "hdmi_power";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ gpio = < 25 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ hdmi_out: connector {
+ compatible = "hdmi-connector";
+ label = "HDMI OUT";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <_hdmi_out>;
+ };
+ };
+ };
+
ir: ir {
compatible = "gpio-ir-receiver";
gpios = < 3 GPIO_ACTIVE_LOW>;
@@ -506,6 +528,12 @@ pins_i2c4: i2c4 {
bias-disable;
};
+ pins_hdmi_ddc: hdmi_ddc {
+ function = "hdmi-ddc";
+ groups = "hdmi-ddc";
+ bias-disable;
+ };
+
pins_nemc: nemc {
function = "nemc";
groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we",
"nemc-frd-fwe";
@@ -536,3 +564,39 @@ pins_mmc1: mmc1 {
bias-disable;
};
};
+
+ {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_hdmi_ddc>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dw_hdmi_in: endpoint {
+ remote-endpoint = <_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dw_hdmi_out: endpoint {
+ remote-endpoint = <_con>;
+ };
+ };
+ };
+};
+
+ {
+ status = "okay";
+
+ port {
+ lcd_out: endpoint {
+ remote-endpoint = <_hdmi_in>;
+ };
+ };
+};
--
2.31.1
[PATCH v2 4/8] dt-bindings: display: Add ingenic-jz4780-hdmi DT Schema
From: Sam Ravnborg
Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC.
Based on .txt binding from Zubair Lutfullah Kakakhel
Signed-off-by: Sam Ravnborg
Signed-off-by: H. Nikolaus Schaller
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
---
.../bindings/display/ingenic-jz4780-hdmi.yaml | 82 +++
1 file changed, 82 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/ingenic-jz4780-hdmi.yaml
diff --git a/Documentation/devicetree/bindings/display/ingenic-jz4780-hdmi.yaml
b/Documentation/devicetree/bindings/display/ingenic-jz4780-hdmi.yaml
new file mode 100644
index 0..a545ff8704ebd
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/ingenic-jz4780-hdmi.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/ingenic-jz4780-hdmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Bindings for Ingenic JZ4780 HDMI Transmitter
+
+maintainers:
+ - H. Nikolaus Schaller
+
+description: |
+ The HDMI Transmitter in the Ingenic JZ4780 is a Synopsys DesignWare HDMI 1.4
+ TX controller IP with accompanying PHY IP.
+
+allOf:
+ - $ref: panel/panel-common.yaml#
+
+properties:
+ compatible:
+items:
+ - const: ingenic,jz4780-hdmi
+
+ reg:
+maxItems: 1
+description: the address & size of the LCD controller registers
+
+ reg-io-width:
+const: 4
+
+ interrupts:
+maxItems: 1
+description: Specifies the interrupt provided by parent
+
+ clocks:
+maxItems: 2
+description: Clock specifiers for isrf and iahb clocks
+
+ clock-names:
+items:
+ - const: isfr
+ - const: iahb
+
+ ddc-i2c-bus: true
+ ports: true
+
+required:
+- compatible
+- clocks
+- clock-names
+- ports
+- reg-io-width
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+
+hdmi: hdmi@1018 {
+compatible = "ingenic,jz4780-hdmi";
+reg = <0x1018 0x8000>;
+reg-io-width = <4>;
+ddc-i2c-bus = <>;
+interrupt-parent = <>;
+interrupts = <3>;
+clocks = < JZ4780_CLK_HDMI>, < JZ4780_CLK_AHB0>;
+clock-names = "isfr", "iahb";
+
+ports {
+hdmi_in: port {
+#address-cells = <1>;
+#size-cells = <0>;
+hdmi_in_lcd: endpoint@0 {
+reg = <0>;
+remote-endpoint = <_out_hdmi>;
+};
+};
+};
+};
+
+...
--
2.31.1
[PATCH v2 1/8] drm/bridge: synopsis: Add mode_fixup and bridge timings support
From: Paul Boddie
The platform-specific configuration structure is augmented with
mode_fixup and timings members so that specialisations of the
Synopsys driver can introduce mode flags and bus flags.
Signed-off-by: Paul Boddie
Signed-off-by: Ezequiel Garcia
Signed-off-by: H. Nikolaus Schaller
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16
include/drm/bridge/dw_hdmi.h | 5 +
2 files changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index e7c7c9b9c646f..e8499eb11328c 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -2810,6 +2810,19 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
return mode_status;
}
+static bool
+dw_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ struct dw_hdmi *hdmi = bridge->driver_private;
+
+ if (hdmi->plat_data->mode_fixup)
+ return hdmi->plat_data->mode_fixup(bridge, mode, adjusted_mode);
+
+ return true;
+}
+
static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
const struct drm_display_mode *orig_mode,
const struct drm_display_mode *mode)
@@ -2883,6 +2896,7 @@ static const struct drm_bridge_funcs dw_hdmi_bridge_funcs
= {
.atomic_disable = dw_hdmi_bridge_atomic_disable,
.mode_set = dw_hdmi_bridge_mode_set,
.mode_valid = dw_hdmi_bridge_mode_valid,
+ .mode_fixup = dw_hdmi_bridge_mode_fixup,
.detect = dw_hdmi_bridge_detect,
.get_edid = dw_hdmi_bridge_get_edid,
};
@@ -3364,6 +3378,8 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device
*pdev,
#ifdef CONFIG_OF
hdmi->bridge.of_node = pdev->dev.of_node;
#endif
+ if (plat_data->timings)
+ hdmi->bridge.timings = plat_data->timings;
memset(, 0, sizeof(pdevinfo));
pdevinfo.parent = dev;
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index 6a5716655619b..677137445d534 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -8,6 +8,7 @@
#include
+struct drm_bridge;
struct drm_display_info;
struct drm_display_mode;
struct drm_encoder;
@@ -140,6 +141,10 @@ struct dw_hdmi_plat_data {
enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data,
const struct drm_display_info *info,
const struct drm_display_mode *mode);
+ bool (*mode_fixup)(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode);
+ const struct drm_bridge_timings *timings;
/* Vendor PHY support */
const struct dw_hdmi_phy_ops *phy_ops;
--
2.31.1
[PATCH v2 8/8] [RFC] drm/ingenic: convert to component framework for jz4780 hdmi
This patch attempts to convert the ingenic-dw-hdmi driver
into a version that uses the component framework.
Unfortunately the new version does not work.
Debugging shows that ingenic_dw_hdmi_bind() is never called.
Suggestions for reasons and fixes are welcome.
Signed-off-by: Paul Boddie
Co-authored-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 57 ++-
1 file changed, 46 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
b/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
index 61e7a57d7cec1..a5ba0b69baa8c 100644
--- a/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
+++ b/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c
@@ -1,17 +1,24 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
- * Copyright (C) 2019, 2020 Paul Boddie
+ * Copyright (C) 2019, 2020, 2021 Paul Boddie
*
* Derived from dw_hdmi-imx.c with i.MX portions removed.
- * Probe and remove operations derived from rcar_dw_hdmi.c.
*/
+#include
#include
#include
#include
#include
#include
+#include
+#include
+
+struct ingenic_dw_hdmi_encoder {
+ struct drm_encoder encoder;
+ struct dw_hdmi *hdmi;
+};
static const struct dw_hdmi_mpll_config ingenic_mpll_cfg[] = {
{ 4525, { { 0x01e0, 0x }, { 0x21e1, 0x }, { 0x41e2, 0x
} } },
@@ -87,24 +94,52 @@ static const struct of_device_id ingenic_dw_hdmi_dt_ids[] =
{
};
MODULE_DEVICE_TABLE(of, ingenic_dw_hdmi_dt_ids);
-static int ingenic_dw_hdmi_probe(struct platform_device *pdev)
+static int ingenic_dw_hdmi_bind(struct device *dev, struct device *master,
+ void *data)
{
- struct dw_hdmi *hdmi;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct drm_device *drm = data;
+ struct drm_encoder *enc;
+ struct ingenic_dw_hdmi_encoder *hdmi_encoder;
- hdmi = dw_hdmi_probe(pdev, _dw_hdmi_plat_data);
- if (IS_ERR(hdmi))
- return PTR_ERR(hdmi);
+ hdmi_encoder = drmm_simple_encoder_alloc(drm, struct
ingenic_dw_hdmi_encoder,
+encoder,
DRM_MODE_ENCODER_TMDS);
+ if (IS_ERR(hdmi_encoder))
+ return PTR_ERR(hdmi_encoder);
- platform_set_drvdata(pdev, hdmi);
+ enc = _encoder->encoder;
+ drm_encoder_helper_add(enc, NULL);
+ hdmi_encoder->hdmi = dw_hdmi_bind(pdev, enc,
_dw_hdmi_plat_data);
+
+ if (IS_ERR(hdmi_encoder->hdmi))
+ return PTR_ERR(hdmi_encoder->hdmi);
+
+ dev_set_drvdata(dev, hdmi_encoder->hdmi);
return 0;
}
-static int ingenic_dw_hdmi_remove(struct platform_device *pdev)
+static void ingenic_dw_hdmi_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct dw_hdmi *hdmi = dev_get_drvdata(dev);
+
+ dw_hdmi_unbind(hdmi);
+}
+
+static const struct component_ops ingenic_dw_hdmi_ops = {
+ .bind = ingenic_dw_hdmi_bind,
+ .unbind = ingenic_dw_hdmi_unbind,
+};
+
+static int ingenic_dw_hdmi_probe(struct platform_device *pdev)
{
- struct dw_hdmi *hdmi = platform_get_drvdata(pdev);
+ return component_add(>dev, _dw_hdmi_ops);
+}
- dw_hdmi_remove(hdmi);
+static int ingenic_dw_hdmi_remove(struct platform_device *pdev)
+{
+ component_del(>dev, _dw_hdmi_ops);
return 0;
}
--
2.31.1
[PATCH v2 5/8] MIPS: DTS: jz4780: account for Synopsys HDMI driver and LCD controller
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for JZ4780
HDMI support. This requires a new driver, plus device tree and configuration
modifications.
Signed-off-by: Paul Boddie
Signed-off-by: H. Nikolaus Schaller
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 45 ++
1 file changed, 45 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 9e34f433b9b58..4cbc6a4db6cda 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -424,6 +424,51 @@ i2c4: i2c@10054000 {
status = "disabled";
};
+ hdmi: hdmi@1018 {
+ compatible = "ingenic,jz4780-dw-hdmi";
+ reg = <0x1018 0x8000>;
+ reg-io-width = <4>;
+
+ clocks = < JZ4780_CLK_HDMI>, < JZ4780_CLK_AHB0>;
+ clock-names = "isfr" , "iahb";
+
+ assigned-clocks = < JZ4780_CLK_HDMI>;
+ assigned-clock-rates = <2700>;
+
+ interrupt-parent = <>;
+ interrupts = <3>;
+
+ /* ddc-i2c-bus = <>; */
+
+ status = "disabled";
+ };
+
+ lcdc0: lcdc0@1305 {
+ compatible = "ingenic,jz4780-lcd";
+ reg = <0x1305 0x1800>;
+
+ clocks = < JZ4780_CLK_TVE>, < JZ4780_CLK_LCD0PIXCLK>;
+ clock-names = "lcd", "lcd_pclk";
+
+ interrupt-parent = <>;
+ interrupts = <31>;
+
+ status = "disabled";
+ };
+
+ lcdc1: lcdc1@130a {
+ compatible = "ingenic,jz4780-lcd";
+ reg = <0x130a 0x1800>;
+
+ clocks = < JZ4780_CLK_TVE>, < JZ4780_CLK_LCD1PIXCLK>;
+ clock-names = "lcd", "lcd_pclk";
+
+ interrupt-parent = <>;
+ interrupts = <31>;
+
+ status = "disabled";
+ };
+
nemc: nemc@1341 {
compatible = "ingenic,jz4780-nemc", "simple-mfd";
reg = <0x1341 0x1>;
--
2.31.1
[PATCH v2 7/8] MIPS: CI20: defconfig: configure for DRM_DW_HDMI_JZ4780
Enable CONFIG options as modules. Signed-off-by: Ezequiel Garcia Signed-off-by: H. Nikolaus Schaller --- arch/mips/configs/ci20_defconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig index ab7ebb0668340..9d47163011ab6 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -98,7 +98,14 @@ CONFIG_RC_DEVICES=y CONFIG_IR_GPIO_CIR=m CONFIG_IR_GPIO_TX=m CONFIG_MEDIA_SUPPORT=m +CONFIG_DRM=m +CONFIG_DRM_INGENIC=m +CONFIG_DRM_INGENIC_DW_HDMI=y # CONFIG_VGA_CONSOLE is not set +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_HID is not set CONFIG_USB=y CONFIG_USB_STORAGE=y -- 2.31.1
