[DO NOT MERGE v6 08/37] clocksource: sh_tmu: CLOCKSOURCE support.

2024-01-09 Thread Yoshinori Sato
Allows initialization as CLOCKSOURCE.

Signed-off-by: Yoshinori Sato 
---
 drivers/clocksource/sh_tmu.c | 161 +++
 1 file changed, 106 insertions(+), 55 deletions(-)

diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index be81c00f..e4ae83c9f7d4 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -17,6 +17,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -65,6 +67,7 @@ struct sh_tmu_device {
 
bool has_clockevent;
bool has_clocksource;
+   const char *name;
 };
 
 #define TSTR -1 /* shared register */
@@ -148,8 +151,8 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch)
/* enable clock */
ret = clk_enable(ch->tmu->clk);
if (ret) {
-   dev_err(>tmu->pdev->dev, "ch%u: cannot enable clock\n",
-   ch->index);
+   pr_err("%s ch%u: cannot enable clock\n",
+  ch->tmu->name, ch->index);
return ret;
}
 
@@ -174,9 +177,10 @@ static int sh_tmu_enable(struct sh_tmu_channel *ch)
if (ch->enable_count++ > 0)
return 0;
 
-   pm_runtime_get_sync(>tmu->pdev->dev);
-   dev_pm_syscore_device(>tmu->pdev->dev, true);
-
+   if (ch->tmu->pdev) {
+   pm_runtime_get_sync(>tmu->pdev->dev);
+   dev_pm_syscore_device(>tmu->pdev->dev, true);
+   }
return __sh_tmu_enable(ch);
 }
 
@@ -202,8 +206,10 @@ static void sh_tmu_disable(struct sh_tmu_channel *ch)
 
__sh_tmu_disable(ch);
 
-   dev_pm_syscore_device(>tmu->pdev->dev, false);
-   pm_runtime_put(>tmu->pdev->dev);
+   if (ch->tmu->pdev) {
+   dev_pm_syscore_device(>tmu->pdev->dev, false);
+   pm_runtime_put(>tmu->pdev->dev);
+   }
 }
 
 static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,
@@ -245,7 +251,7 @@ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
 }
 
-static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
+static inline struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
 {
return container_of(cs, struct sh_tmu_channel, cs);
 }
@@ -292,7 +298,8 @@ static void sh_tmu_clocksource_suspend(struct clocksource 
*cs)
 
if (--ch->enable_count == 0) {
__sh_tmu_disable(ch);
-   dev_pm_genpd_suspend(>tmu->pdev->dev);
+   if (ch->tmu->pdev)
+   dev_pm_genpd_suspend(>tmu->pdev->dev);
}
 }
 
@@ -304,7 +311,8 @@ static void sh_tmu_clocksource_resume(struct clocksource 
*cs)
return;
 
if (ch->enable_count++ == 0) {
-   dev_pm_genpd_resume(>tmu->pdev->dev);
+   if (ch->tmu->pdev)
+   dev_pm_genpd_resume(>tmu->pdev->dev);
__sh_tmu_enable(ch);
}
 }
@@ -324,14 +332,14 @@ static int sh_tmu_register_clocksource(struct 
sh_tmu_channel *ch,
cs->mask = CLOCKSOURCE_MASK(32);
cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
 
-   dev_info(>tmu->pdev->dev, "ch%u: used as clock source\n",
-ch->index);
+   pr_info("%s ch%u: used as clock source\n",
+   ch->tmu->name, ch->index);
 
clocksource_register_hz(cs, ch->tmu->rate);
return 0;
 }
 
-static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)
+static inline struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device 
*ced)
 {
return container_of(ced, struct sh_tmu_channel, ced);
 }
@@ -364,8 +372,8 @@ static int sh_tmu_clock_event_set_state(struct 
clock_event_device *ced,
if (clockevent_state_oneshot(ced) || clockevent_state_periodic(ced))
sh_tmu_disable(ch);
 
-   dev_info(>tmu->pdev->dev, "ch%u: used for %s clock events\n",
-ch->index, periodic ? "periodic" : "oneshot");
+   pr_info("%s ch%u: used for %s clock events\n",
+   ch->tmu->name, ch->index, periodic ? "periodic" : "oneshot");
sh_tmu_clock_event_start(ch, periodic);
return 0;
 }
@@ -403,7 +411,8 @@ static void sh_tmu_clock_event_resume(struct 
clock_event_device *ced)
 }
 
 static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
-  const char *name)
+  const char *name,
+  struct device_node *np)
 {
struct clock_event_device *ced = >ced;
int ret;
@@ -417,30 +426,32 @@ static void sh_tmu_register_clockevent(struct 
sh_tmu_channel *ch,
ced->set_state_shutdown = sh_tmu_clock_event_shutdown;
ced->set_state_periodic = sh_tmu_clock_event_set_periodic;
ced->set_state_oneshot = sh_tmu_clock_event_set_oneshot;
-   ced->suspend = sh_tmu_clock_event_suspend;
-   ced->resume = sh_tmu_clock_event_resume;
-
-   dev_info(>tmu->pdev->dev, 

[DO NOT MERGE v6 07/37] sh: Fix COMMON_CLK support in CONFIG_OF=y.

2024-01-09 Thread Yoshinori Sato
Initialize the clock and timer using the COMMON_CLK procedure.
sh's earlytimer mechanism doesn't work properly in OF,
so timer initialization is delayed.
If CONFIG_OF=y, perform the general timer initialization procedure.

Signed-off-by: Yoshinori Sato 
---
 arch/sh/boards/of-generic.c | 28 
 arch/sh/kernel/time.c   | 12 
 2 files changed, 16 insertions(+), 24 deletions(-)

diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index f7f3e618e85b..f1ca5a914c11 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -98,16 +99,7 @@ static void sh_of_smp_probe(void)
 
 #endif
 
-static void noop(void)
-{
-}
-
-static int noopi(void)
-{
-   return 0;
-}
-
-static void __init sh_of_mem_reserve(void)
+static void __init sh_of_mem_init(void)
 {
early_init_fdt_reserve_self();
early_init_fdt_scan_reserved_mem();
@@ -140,25 +132,13 @@ static void __init sh_of_init_irq(void)
irqchip_init();
 }
 
-static int __init sh_of_clk_init(void)
-{
-#ifdef CONFIG_COMMON_CLK
-   /* Disabled pending move to COMMON_CLK framework. */
-   pr_info("SH generic board support: scanning for clk providers\n");
-   of_clk_init(NULL);
-#endif
-   return 0;
-}
-
 static struct sh_machine_vector __initmv sh_of_generic_mv = {
.mv_setup   = sh_of_setup,
.mv_name= "devicetree", /* replaced by DT root's model */
.mv_irq_demux   = sh_of_irq_demux,
.mv_init_irq= sh_of_init_irq,
-   .mv_clk_init= sh_of_clk_init,
-   .mv_mode_pins   = noopi,
-   .mv_mem_init= noop,
-   .mv_mem_reserve = sh_of_mem_reserve,
+   .mv_mode_pins   = generic_mode_pins,
+   .mv_mem_init= sh_of_mem_init,
 };
 
 struct sh_clk_ops;
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 821a09cbd605..ce5b7c2f8628 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -19,7 +19,9 @@
 #include 
 #include 
 #include 
+#include 
 
+#ifndef CONFIG_SH_DEVICE_TREE
 static void __init sh_late_time_init(void)
 {
/*
@@ -43,3 +45,13 @@ void __init time_init(void)
 
late_time_init = sh_late_time_init;
 }
+#else
+/* CONFIG_SH_DEVICE_TREE */
+void __init time_init(void)
+{
+   pr_info("SH generic board support: scanning for clk providers\n");
+
+   of_clk_init(NULL);
+   timer_probe();
+}
+#endif
-- 
2.39.2



[DO NOT MERGE v6 05/37] sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y

2024-01-09 Thread Yoshinori Sato
Remove unused function prototype.
Add helper update_sr_imask. use for SH7751 irq driver.
Add stub intc_finalize.

Signed-off-by: Yoshinori Sato 
---
 arch/sh/include/asm/io.h   |  2 ++
 arch/sh/include/asm/irq.h  | 10 --
 arch/sh/kernel/cpu/Makefile|  5 +
 arch/sh/kernel/cpu/irq/imask.c | 17 +
 include/linux/sh_intc.h|  7 ++-
 5 files changed, 34 insertions(+), 7 deletions(-)

diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index ac521f287fa5..5429b4169dc8 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -121,7 +121,9 @@ __BUILD_MEMORY_STRING(__raw_, q, u64)
 
 #define ioport_map ioport_map
 #define ioport_unmap ioport_unmap
+#ifndef CONFIG_SH_DEVICE_TREE
 #define pci_iounmap pci_iounmap
+#endif
 
 #define ioread8 ioread8
 #define ioread16 ioread16
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 0f384b1f45ca..3d897229dcc4 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -16,8 +16,8 @@
 /*
  * Simple Mask Register Support
  */
-extern void make_maskreg_irq(unsigned int irq);
-extern unsigned short *irq_mask_register;
+
+void update_sr_imask(unsigned int irq, bool enable);
 
 /*
  * PINT IRQs
@@ -54,4 +54,10 @@ extern void irq_finish(unsigned int irq);
 
 #include 
 
+/* SH3/4 INTC stuff */
+/* IRL level 0 - 15 */
+#define NR_IRL 15
+/* IRL0 -> IRQ16 */
+#define IRL_BASE_IRQ   16
+
 #endif /* __ASM_SH_IRQ_H */
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index e00ebf134985..ad12807fae9c 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -20,7 +20,4 @@ ifndef CONFIG_COMMON_CLK
 obj-y += clock.o
 obj-$(CONFIG_SH_CLK_CPG_LEGACY)+= clock-cpg.o
 endif
-ifndef CONFIG_GENERIC_IRQ_CHIP
-obj-y  += irq/
-endif
-obj-y  += init.o fpu.o pfc.o proc.o
+obj-y  += init.o fpu.o pfc.o proc.o irq/
diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c
index 572585c3f2fd..7589ca7c506c 100644
--- a/arch/sh/kernel/cpu/irq/imask.c
+++ b/arch/sh/kernel/cpu/irq/imask.c
@@ -51,6 +51,7 @@ static inline void set_interrupt_registers(int ip)
 : "t");
 }
 
+#ifndef CONFIG_GENERIC_IRQ_CHIP
 static void mask_imask_irq(struct irq_data *data)
 {
unsigned int irq = data->irq;
@@ -83,3 +84,19 @@ void make_imask_irq(unsigned int irq)
irq_set_chip_and_handler_name(irq, _irq_chip, handle_level_irq,
  "level");
 }
+#else
+void update_sr_imask(unsigned int irq, bool enable)
+{
+   if (enable) {
+   set_bit(irq, imask_mask);
+   interrupt_priority = IMASK_PRIORITY -
+ find_first_bit(imask_mask, IMASK_PRIORITY);
+   } else {
+   clear_bit(irq, imask_mask);
+   if (interrupt_priority < IMASK_PRIORITY - irq)
+   interrupt_priority = IMASK_PRIORITY - irq;
+   }
+   set_interrupt_registers(interrupt_priority);
+}
+EXPORT_SYMBOL(update_sr_imask);
+#endif
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 27ae79191bdc..994b5b05a0d7 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -139,8 +139,13 @@ struct intc_desc symbol __initdata = { 
\
 int register_intc_controller(struct intc_desc *desc);
 int intc_set_priority(unsigned int irq, unsigned int prio);
 int intc_irq_lookup(const char *chipname, intc_enum enum_id);
+#ifndef CONFIG_SH_DEVICE_TREE
 void intc_finalize(void);
-
+#else
+static inline void intc_finalize(void)
+{
+}
+#endif
 #ifdef CONFIG_INTC_USERIMASK
 int register_intc_userimask(unsigned long addr);
 #else
-- 
2.39.2



[DO NOT MERGE v6 06/37] sh: kernel/setup Update DT support.

2024-01-09 Thread Yoshinori Sato
Fix extrnal fdt initialize and bootargs.

Signed-off-by: Yoshinori Sato 
---
 arch/sh/kernel/setup.c | 33 -
 1 file changed, 24 insertions(+), 9 deletions(-)

diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 3d80515298d2..e3f34027ac9e 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -30,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -269,8 +270,20 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
 
 void __init setup_arch(char **cmdline_p)
 {
+#if defined(CONFIG_OF) && defined(CONFIG_OF_EARLY_FLATTREE)
+   if (IS_ENABLED(CONFIG_USE_BUILTIN_DTB)) {
+   /* Relocate Embedded DTB */
+   unflatten_and_copy_device_tree();
+   } else if (initial_boot_params) {
+   /* Reserve external DTB area */
+   memblock_reserve(__pa(initial_boot_params),
+fdt_totalsize(initial_boot_params));
+   unflatten_device_tree();
+   }
+#endif
enable_mmu();
 
+#ifndef CONFIG_OF
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 
printk(KERN_NOTICE "Boot params:\n"
@@ -299,6 +312,8 @@ void __init setup_arch(char **cmdline_p)
bss_resource.start = virt_to_phys(__bss_start);
bss_resource.end = virt_to_phys(__bss_stop)-1;
 
+#endif
+
 #ifdef CONFIG_CMDLINE_OVERWRITE
strscpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
 #else
@@ -310,9 +325,17 @@ void __init setup_arch(char **cmdline_p)
 #endif
 
/* Save unparsed command line copy for /proc/cmdline */
+#ifndef CONFIG_OF
memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
-
+#else
+   if (!initial_boot_params) {
+   memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
+   *cmdline_p = command_line;
+   } else {
+   *cmdline_p = boot_command_line;
+   }
+#endif
parse_early_param();
 
plat_early_device_setup();
@@ -322,14 +345,6 @@ void __init setup_arch(char **cmdline_p)
/* Let earlyprintk output early console messages */
sh_early_platform_driver_probe("earlyprintk", 1, 1);
 
-#ifdef CONFIG_OF_EARLY_FLATTREE
-#ifdef CONFIG_USE_BUILTIN_DTB
-   unflatten_and_copy_device_tree();
-#else
-   unflatten_device_tree();
-#endif
-#endif
-
paging_init();
 
/* Perform the machine specific initialisation */
-- 
2.39.2



[DO NOT MERGE v6 03/37] sh: Enable OF support for build and configuration.

2024-01-09 Thread Yoshinori Sato
IRQ, CLK and PCI will be migrated to a common driver framework.
So if OF, disable the SH specific drivers.

Signed-off-by: Yoshinori Sato 
---
 arch/sh/Kconfig | 11 ++-
 arch/sh/drivers/Makefile|  2 ++
 arch/sh/kernel/cpu/Makefile |  9 +++--
 arch/sh/kernel/cpu/sh4/Makefile |  3 +++
 4 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index ecca128c15fa..0ce73256e34d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -65,10 +65,10 @@ config SUPERH
select MODULES_USE_ELF_RELA
select NEED_SG_DMA_LENGTH
select NO_DMA if !MMU && !DMA_COHERENT
-   select NO_GENERIC_PCI_IOPORT_MAP if PCI
+   select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE
select OLD_SIGACTION
select OLD_SIGSUSPEND
-   select PCI_DOMAINS if PCI
+   select PCI_DOMAINS if PCI && !SH_DEVICE_TREE
select PERF_EVENTS
select PERF_USE_VMALLOC
select RTC_LIB
@@ -152,7 +152,7 @@ menu "System type"
 #
 config CPU_SH2
bool
-   select SH_INTC
+   select SH_INTC if !SH_DEVICE_TREE
 
 config CPU_SH2A
bool
@@ -178,7 +178,7 @@ config CPU_SH4
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
select CPU_HAS_FPU if !CPU_SH4AL_DSP
-   select SH_INTC
+   select SH_INTC if !SH_DEVICE_TREE
select SYS_SUPPORTS_SH_TMU
 
 config CPU_SH4A
@@ -521,6 +521,7 @@ config SH_PCLK_FREQ
 
 config SH_CLK_CPG
def_bool y
+   depends on !COMMON_CLK
 
 config SH_CLK_CPG_LEGACY
depends on SH_CLK_CPG
@@ -665,7 +666,7 @@ config BUILTIN_DTB_SOURCE
  kernel.
 
 config ZERO_PAGE_OFFSET
-   hex
+   hex "Zero page offset"
default "0x0001" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
SH_7751_SOLUTION_ENGINE
default "0x4000" if PAGE_SIZE_16KB || SH_SH03
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index 8bd10b904bf9..83f609ca1eb4 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -5,6 +5,8 @@
 
 obj-y  += dma/ platform_early.o
 
+ifndef CONFIG_SH_DEVICE_TREE
 obj-$(CONFIG_PCI)  += pci/
+endif
 obj-$(CONFIG_PUSH_SWITCH)  += push-switch.o
 obj-$(CONFIG_HEARTBEAT)+= heartbeat.o
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 46118236bf04..e00ebf134985 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -16,6 +16,11 @@ obj-$(CONFIG_ARCH_SHMOBILE)  += shmobile/
 # Common interfaces.
 
 obj-$(CONFIG_SH_ADC)   += adc.o
+ifndef CONFIG_COMMON_CLK
+obj-y += clock.o
 obj-$(CONFIG_SH_CLK_CPG_LEGACY)+= clock-cpg.o
-
-obj-y  += irq/ init.o clock.o fpu.o pfc.o proc.o
+endif
+ifndef CONFIG_GENERIC_IRQ_CHIP
+obj-y  += irq/
+endif
+obj-y  += init.o fpu.o pfc.o proc.o
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 02e3ee16e15c..33da4c86feff 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -15,6 +15,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
 perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
 perf-$(CONFIG_CPU_SUBTYPE_SH7091)  := perf_event.o
 
+ifndef CONFIG_SH_DEVICE_TREE
 # CPU subtype setup
 obj-$(CONFIG_CPU_SUBTYPE_SH7750)   += setup-sh7750.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7750R)  += setup-sh7750.o
@@ -29,5 +30,7 @@ ifndef CONFIG_CPU_SH4A
 clock-$(CONFIG_CPU_SH4):= clock-sh4.o
 endif
 
+endif # CONFIG_SH_DEVICE_TREE
+
 obj-y  += $(clock-y)
 obj-$(CONFIG_PERF_EVENTS)  += $(perf-y)
-- 
2.39.2



[DO NOT MERGE v6 04/37] dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.

2024-01-09 Thread Yoshinori Sato
Renesas SH7751 Interrupt controller priority register define.

Signed-off-by: Yoshinori Sato 
---
 .../renesas,sh7751-intc.h | 19 +++
 1 file changed, 19 insertions(+)
 create mode 100644 
include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h

diff --git a/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h 
b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
new file mode 100644
index ..0543bd1b895e
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+ *
+ * SH3/4 INTC IPR register offsets (Address / bits)
+ */
+
+#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC
+#define __DT_BINDINGS_RENESAS_SH7751_INTC
+
+#define IPRA   0
+#define IPRB   4
+#define IPRC   8
+#define IPRD   12
+#define INTPRI00   256
+#define IPR_B1212
+#define IPR_B8 8
+#define IPR_B4 4
+#define IPR_B0 0
+
+#endif
-- 
2.39.2



[DO NOT MERGE v6 02/37] sh: Kconfig unified OF supported targets.

2024-01-09 Thread Yoshinori Sato
Targets that support OF should be treated as one board.

Signed-off-by: Yoshinori Sato 
---
 arch/sh/Kconfig|  1 +
 arch/sh/boards/Kconfig | 24 ++--
 2 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 7500521b2b98..ecca128c15fa 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -710,6 +710,7 @@ choice
prompt "Kernel command line"
optional
default CMDLINE_OVERWRITE
+   depends on !OF || USE_BUILTIN_DTB
help
  Setting this option allows the kernel command line arguments
  to be set.
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 109bec4dad94..e7e52779ef62 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -19,16 +19,9 @@ config SH_DEVICE_TREE
select TIMER_OF
select COMMON_CLK
select GENERIC_CALIBRATE_DELAY
-
-config SH_JCORE_SOC
-   bool "J-Core SoC"
-   select SH_DEVICE_TREE
-   select CLKSRC_JCORE_PIT
-   select JCORE_AIC
-   depends on CPU_J2
-   help
- Select this option to include drivers core components of the
- J-Core SoC, including interrupt controllers and timers.
+   select GENERIC_IRQ_CHIP
+   select SYS_SUPPORTS_PCI
+   select GENERIC_PCI_IOMAP if PCI
 
 config SH_SOLUTION_ENGINE
bool "SolutionEngine"
@@ -293,6 +286,7 @@ config SH_LANDISK
bool "LANDISK"
depends on CPU_SUBTYPE_SH7751R
select HAVE_PCI
+   select SYS_SUPPORTS_PCI
help
  I-O DATA DEVICE, INC. "LANDISK Series" support.
 
@@ -369,6 +363,16 @@ config SH_APSH4AD0A
help
  Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
 
+config SH_OF_BOARD
+   bool "General Open Firmware boards"
+   select SH_DEVICE_TREE
+   select CLKSRC_JCORE_PIT if CPU_J2
+   select JCORE_AIC if CPU_J2
+   select HAVE_PCI if CPU_SUBTYPE_SH7751R
+   help
+ This board means general OF supported targets.
+
+
 source "arch/sh/boards/mach-r2d/Kconfig"
 source "arch/sh/boards/mach-highlander/Kconfig"
 source "arch/sh/boards/mach-sdk7780/Kconfig"
-- 
2.39.2



[DO NOT MERGE v6 01/37] sh: passing FDT address to kernel startup.

2024-01-09 Thread Yoshinori Sato
R4 is caller saved in SH ABI.
Save it so it doesn't get corrupted until it's needed for initialization.

Signed-off-by: Yoshinori Sato 
---
 arch/sh/boot/compressed/head_32.S | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/sh/boot/compressed/head_32.S 
b/arch/sh/boot/compressed/head_32.S
index 7bb168133dbb..6be59851122e 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -15,7 +15,8 @@ startup:
/* Load initial status register */
mov.l   init_sr, r1
ldc r1, sr
-
+   /* Save FDT address */
+   mov r4, r13
/* Move myself to proper location if necessary */
mova1f, r0
mov.l   1f, r2
@@ -84,7 +85,7 @@ l1:
/* Jump to the start of the decompressed kernel */
mov.l   kernel_start_addr, r0
jmp @r0
-   nop
+movr13, r4

.align  2
 bss_start_addr:
-- 
2.39.2



[DO NOT MERGE v6 00/37] Device Tree support for SH7751 based board

2024-01-09 Thread Yoshinori Sato
This is an updated version of something I wrote about 7 years ago.
Minimum support for R2D-plus and LANDISK.
I think R2D-1 will work if you add AX88796 to dts.
And board-specific functions and SCI's SPI functions are not supported.

You can get it working with qemu found here.
https://gitlab.com/yoshinori.sato/qemu/-/tree/landisk

v6 changes.
- pci-sh7751: merge register define.
- pci-sh7751: use 'dma-ranges' property.
- pci-sh7751: rename general PCI properties.
- sm501 and sm501fb: Re-design Device Tree properties.
- sh/kernel/setup: cleanup command line setup.
- irq-sh7751.c: some cleanup.

v5 changes.
- pci-sh7751: revert header changes. and some fix in previuous driver.
- sh/kernel/iomap.c: Use SH io functions.
- sm501 and sm501fb: re-write DT support.

v4 changes.
- cpg-sh7750: use clk-divider and clk-gate.
- pci-sh7751: unified header files to old PCI driver.
- irq-renesas-sh7751: IPR registers direct mapping.
- irq-renesas-sh7751irl: useful register bit mapping.
- sm501 and sm501fb: re-write dt parser.
- j2_minus: fix build error.
- dt-binding schema: fix some errors.
- *.dts: cleanup.

v3 changes.
- Rewrite clk drivers.
- Added sh_tmu to OF support.
- Cleanup PCI stuff.
- Update sm501 and sm501fb OF support.
- Update devicetree and documents.

v2 changes.
- Rebasing v6,6-rc1
- re-write irqchip driver.
- Add binding documents.
- Cleanup review comment.

Yoshinori Sato (37):
  sh: passing FDT address to kernel startup.
  sh: Kconfig unified OF supported targets.
  sh: Enable OF support for build and configuration.
  dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.
  sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y
  sh: kernel/setup Update DT support.
  sh: Fix COMMON_CLK support in CONFIG_OF=y.
  clocksource: sh_tmu: CLOCKSOURCE support.
  dt-bindings: timer: renesas,tmu: add renesas,tmu-sh7750
  sh: Common PCI Framework driver support.
  pci: pci-sh7751: Add SH7751 PCI driver
  dt-bindings: pci: pci-sh7751: Add SH7751 PCI
  dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header.
  clk: Compatible with narrow registers
  clk: renesas: Add SH7750/7751 CPG Driver
  irqchip: Add SH7751 INTC driver
  dt-bindings: interrupt-controller: renesas,sh7751-intc: Add
json-schema
  irqchip: SH7751 external interrupt encoder with enable gate.
  dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add
json-schema
  serial: sh-sci: fix SH4 OF support.
  dt-bindings: serial: renesas,scif: Add scif-sh7751.
  dt-bindings: display: smi,sm501: SMI SM501 binding json-schema
  mfd: sm501: Convert platform_data to OF property
  dt-binding: sh: cpus: Add SH CPUs json-schema
  dt-bindings: vendor-prefixes: Add iodata
  dt-bindings: vendor-prefixes:  Add smi
  dt-bindings: ata: ata-generic: Add new targets
  dt-bindings: soc: renesas: sh: Add SH7751 based target
  sh: SH7751R SoC Internal peripheral definition dtsi.
  sh: add RTS7751R2D Plus DTS
  sh: Add IO DATA LANDISK dts
  sh: Add IO DATA USL-5P dts
  sh: j2_mimas_v2.dts update
  sh: Add dtbs target support.
  sh: RTS7751R2D Plus OF defconfig
  sh: LANDISK OF defconfig
  sh: j2_defconfig: update

 .../devicetree/bindings/ata/ata-generic.yaml  |   2 +
 .../bindings/clock/renesas,sh7750-cpg.yaml| 103 
 .../bindings/display/smi,sm501.yaml   | 417 +++
 .../renesas,sh7751-intc.yaml  | 105 
 .../renesas,sh7751-irl-ext.yaml   |  72 +++
 .../bindings/pci/renesas,sh7751-pci.yaml  | 150 ++
 .../bindings/serial/renesas,scif.yaml |   1 +
 .../devicetree/bindings/sh/cpus.yaml  |  74 +++
 .../devicetree/bindings/soc/renesas/sh.yaml   |  32 ++
 .../bindings/timer/renesas,tmu.yaml   |  67 ++-
 .../devicetree/bindings/vendor-prefixes.yaml  |   4 +
 arch/sh/Kconfig   |  12 +-
 arch/sh/boards/Kconfig|  24 +-
 arch/sh/boards/of-generic.c   |  28 +-
 arch/sh/boot/compressed/head_32.S |   5 +-
 arch/sh/boot/dts/Makefile |   5 +
 arch/sh/boot/dts/j2_mimas_v2.dts  |   2 +-
 arch/sh/boot/dts/landisk.dts  |  75 +++
 arch/sh/boot/dts/rts7751r2dplus.dts   | 180 +++
 arch/sh/boot/dts/sh7751r.dtsi | 152 ++
 arch/sh/boot/dts/usl-5p.dts   |  83 +++
 arch/sh/configs/j2_defconfig  |  11 +-
 arch/sh/configs/landisk-of_defconfig  | 104 
 arch/sh/configs/rts7751r2dplus-of_defconfig   |  80 +++
 arch/sh/drivers/Makefile  |   2 +
 arch/sh/include/asm/io.h  |   8 +
 arch/sh/include/asm/irq.h |  10 +-
 arch/sh/include/asm/pci.h |   4 +
 arch/sh/kernel/cpu/Makefile   |   6 +-
 arch/sh/kernel/cpu/irq/imask.c|  17 +
 arch/sh/kernel/cpu/sh4/Makefile   |   3 +
 arch/sh/kernel/iomap.c|  18 +
 arch/sh/kernel/setup.c|  33 

Re: 回复: Re: 回复: Re: [PATCH libdrm 1/2] amdgpu: fix parameter of amdgpu_cs_ctx_create2

2024-01-09 Thread Christian König

Am 09.01.24 um 09:09 schrieb 李真能:


Thanks!

What about the second patch?

The second patch:   amdgpu: change proirity value to be consistent 
with kernel.


As I want to pass AMDGPU_CTX_PRIORITY_LOW to kernel module 
drm-scheduler, if these two patches are not applyed,


It can not pass LOW priority to drm-scheduler.

Do you have any other suggestion?



Well what exactly is the problem? Just use AMD_PRIORITY=-512.

As far as I can see that is how it is supposed to be used.

Regards,
Christian.














*主 题:*Re: 回复: Re: [PATCH libdrm 1/2] amdgpu: fix parameter of 
amdgpu_cs_ctx_create2

*日 期:*2024-01-09 15:15
*发件人:*Christian König
*收件人:*李真能;Marek Olsak;Pierre-Eric Pelloux-Prayer;dri-devel;amd-gfx;

Am 09.01.24 um 02:50 schrieb 李真能:

When the priority value is passed to the kernel, the kernel compares 
it with the following values:


#define AMDGPU_CTX_PRIORITY_VERY_LOW    -1023
#define AMDGPU_CTX_PRIORITY_LOW -512
#define AMDGPU_CTX_PRIORITY_NORMAL  0
#define AMDGPU_CTX_PRIORITY_HIGH    512
#define AMDGPU_CTX_PRIORITY_VERY_HIGH   1023

If priority is uint32_t, we can't set LOW and VERY_LOW value to kernel 
context priority,



Well that's nonsense.

How the kernel handles the values and how userspace handles them are 
two separate things. You just need to make sure that it's always 32 bits.


In other words if you have signed or unsigned data type in userspace 
is irrelevant for the kernel.


You can refer to the kernel function amdgpu_ctx_priority_permit, if 
priority is greater


than 0, and this process has not  CAP_SYS_NICE capibility or 
DRM_MASTER permission,


this process will be exited.


Correct, that's intentional.

Regards,
Christian.











*主 题:*Re: [PATCH libdrm 1/2] amdgpu: fix parameter of 
amdgpu_cs_ctx_create2

*日 期:*2024-01-09 00:28
*发件人:*Christian König
*收件人:*李真能;Marek Olsak;Pierre-Eric Pelloux-Prayer;dri-devel;amd-gfx;

Am 08.01.24 um 10:40 schrieb Zhenneng Li:
> In order to pass the correct priority parameter to the kernel,
> we must change priority type from uint32_t to int32_t.

Hui what? Why should it matter if the parameter is signed or not?

That doesn't seem to make sense.

Regards,
Christian.

>
> Signed-off-by: Zhenneng Li
> ---
> amdgpu/amdgpu.h | 2 +-
> amdgpu/amdgpu_cs.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
> index 9bdbf366..f46753f3 100644
> --- a/amdgpu/amdgpu.h
> +++ b/amdgpu/amdgpu.h
> @@ -896,7 +896,7 @@ int amdgpu_bo_list_update(amdgpu_bo_list_handle 
handle,

> *
> */
> int amdgpu_cs_ctx_create2(amdgpu_device_handle dev,
> - uint32_t priority,
> + int32_t priority,
> amdgpu_context_handle *context);
> /**
> * Create GPU execution Context
> diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c
> index 49fc16c3..eb72c638 100644
> --- a/amdgpu/amdgpu_cs.c
> +++ b/amdgpu/amdgpu_cs.c
> @@ -49,7 +49,7 @@ static int 
amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem);

> * \return 0 on success otherwise POSIX Error code
> */
> drm_public int amdgpu_cs_ctx_create2(amdgpu_device_handle dev,
> - uint32_t priority,
> + int32_t priority,
> amdgpu_context_handle *context)
> {
> struct amdgpu_context *gpu_context;



Re: [PATCH RFC v2 08/11] ARM: dts: DRA7xx: Add device tree entry for SGX GPU

2024-01-09 Thread Javier Martinez Canillas
Andrew Davis  writes:

> Add SGX GPU device entry to base DRA7x dtsi file.
>
> Signed-off-by: Andrew Davis 
> ---

Reviewed-by: Javier Martinez Canillas 

-- 
Best regards,

Javier Martinez Canillas
Core Platforms
Red Hat



Re: [PATCH RFC v2 07/11] ARM: dts: AM437x: Add device tree entry for SGX GPU

2024-01-09 Thread Javier Martinez Canillas
Andrew Davis  writes:

> Add SGX GPU device entry to base AM437x dtsi file.
>
> Signed-off-by: Andrew Davis 
> ---

Reviewed-by: Javier Martinez Canillas 

-- 
Best regards,

Javier Martinez Canillas
Core Platforms
Red Hat



Re: [PATCH RFC v2 06/11] ARM: dts: AM33xx: Add device tree entry for SGX GPU

2024-01-09 Thread Javier Martinez Canillas
Andrew Davis  writes:

> Add SGX GPU device entry to base AM33xx dtsi file.
>
> Signed-off-by: Andrew Davis 
> ---

Reviewed-by: Javier Martinez Canillas 

-- 
Best regards,

Javier Martinez Canillas
Core Platforms
Red Hat



Re: [PATCH RFC v2 05/11] ARM: dts: omap5: Add device tree entry for SGX GPU

2024-01-09 Thread Javier Martinez Canillas
Andrew Davis  writes:

> Add SGX GPU device entry to base OMAP5 dtsi file.
>
> Signed-off-by: Andrew Davis 
> ---

Reviewed-by: Javier Martinez Canillas 

-- 
Best regards,

Javier Martinez Canillas
Core Platforms
Red Hat



Re: [PATCH RFC v2 04/11] ARM: dts: omap4: Add device tree entry for SGX GPU

2024-01-09 Thread Javier Martinez Canillas
Andrew Davis  writes:

> Add SGX GPU device entry to base OMAP4 dtsi file.
>
> Signed-off-by: Andrew Davis 
> ---

Reviewed-by: Javier Martinez Canillas 

-- 
Best regards,

Javier Martinez Canillas
Core Platforms
Red Hat



Re: [PATCH RFC v2 03/11] ARM: dts: omap3: Add device tree entry for SGX GPU

2024-01-09 Thread Javier Martinez Canillas
Andrew Davis  writes:

> Add SGX GPU device entries to base OMAP3 dtsi files.
>
> Signed-off-by: Andrew Davis 
> ---

Reviewed-by: Javier Martinez Canillas 

-- 
Best regards,

Javier Martinez Canillas
Core Platforms
Red Hat



Re: Rework TTMs busy handling

2024-01-09 Thread Thomas Hellström
Hi, Christian

On Tue, 2024-01-09 at 08:47 +0100, Christian König wrote:
> Hi guys,
> 
> I'm trying to make this functionality a bit more useful for years now
> since we multiple reports that behavior of drivers can be suboptimal
> when multiple placements be given.
> 
> So basically instead of hacking around the TTM behavior in the driver
> once more I've gone ahead and changed the idle/busy placement list
> into idle/busy placement flags. This not only saves a bunch of code,
> but also allows setting some placements as fallback which are used if
> allocating from the preferred ones didn't worked.
> 
> Zack pointed out that some removed VMWGFX code was brought back
> because
> of rebasing, fixed in this version.
> 
> Intel CI seems to be happy with those patches, so any more comments?

Looks like Xe changes are missing? (xe is now in drm-tip).

I also have some doubts about the naming "idle" vs "busy", since an
elaborate eviction mechanism would probably at some point want to check
for gpu idle vs gpu busy, and this might create some confusion moving
forward for people confusing busy as in memory overcommit with busy as
in gpu activity.

I can't immediately think of something better, though.

/Thomas


> 
> Regards,
> Christian.
> 
> 



Re: [PATCH RFC v2 01/11] dt-bindings: gpu: Rename img, powervr to img, powervr-rogue

2024-01-09 Thread Javier Martinez Canillas
Andrew Davis  writes:

Hello Andrew,

> Signed-off-by: Andrew Davis 
> ---

I think this deserves a commit message with the rationale for the rename.

Because kept an eye to the previous version, I know the reason and agree
with the change. Also, if remember correctly this was suggested by Maxime?

After a adding a commit message and Suggested-by tag:

Reviewed-by: Javier Martinez Canillas 

-- 
Best regards,

Javier Martinez Canillas
Core Platforms
Red Hat



回复: Re: 回复: Re: [PATCH libdrm 1/2] amdgpu: fix parameter of amdgpu_cs_ctx_create2

2024-01-09 Thread 李真能
Thanks!
What about the second patch?
The second patch:   amdgpu: change proirity value to be consistent with kernel.
As I want to pass AMDGPU_CTX_PRIORITY_LOW to kernel module drm-scheduler, if these two patches are not applyed, 
It can not pass LOW priority to drm-scheduler.
Do you have any other suggestion?


 

主 题:Re: 回复: Re: [PATCH libdrm 1/2] amdgpu: fix parameter of amdgpu_cs_ctx_create2 日 期:2024-01-09 15:15 发件人:Christian König 收件人:李真能;Marek Olsak;Pierre-Eric Pelloux-Prayer;dri-devel;amd-gfx;



Am 09.01.24 um 02:50 schrieb 李真能:
When the priority value is passed to the kernel, the kernel compares it with the following values:
#define AMDGPU_CTX_PRIORITY_VERY_LOW    -1023#define AMDGPU_CTX_PRIORITY_LOW -512#define AMDGPU_CTX_PRIORITY_NORMAL  0#define AMDGPU_CTX_PRIORITY_HIGH    512#define AMDGPU_CTX_PRIORITY_VERY_HIGH   1023
If priority is uint32_t, we can't set LOW and VERY_LOW value to kernel context priority,
Well that's nonsense.How the kernel handles the values and how userspace handles them are two separate things. You just need to make sure that it's always 32 bits.In other words if you have signed or unsigned data type in userspace is irrelevant for the kernel.
You can refer to the kernel function amdgpu_ctx_priority_permit, if priority is greater
than 0, and this process has not  CAP_SYS_NICE capibility or DRM_MASTER permission,
this process will be exited.
Correct, that's intentional.Regards,Christian.

 

主 题:Re: [PATCH libdrm 1/2] amdgpu: fix parameter of amdgpu_cs_ctx_create2 日 期:2024-01-09 00:28 发件人:Christian König 收件人:李真能;Marek Olsak;Pierre-Eric Pelloux-Prayer;dri-devel;amd-gfx;



Am 08.01.24 um 10:40 schrieb Zhenneng Li:> In order to pass the correct priority parameter to the kernel,> we must change priority type from uint32_t to int32_t.Hui what? Why should it matter if the parameter is signed or not?That doesn't seem to make sense.Regards,Christian.>> Signed-off-by: Zhenneng Li > ---> amdgpu/amdgpu.h | 2 +-> amdgpu/amdgpu_cs.c | 2 +-> 2 files changed, 2 insertions(+), 2 deletions(-)>> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h> index 9bdbf366..f46753f3 100644> --- a/amdgpu/amdgpu.h> +++ b/amdgpu/amdgpu.h> @@ -896,7 +896,7 @@ int amdgpu_bo_list_update(amdgpu_bo_list_handle handle,> *> */> int amdgpu_cs_ctx_create2(amdgpu_device_handle dev,> - uint32_t priority,> + int32_t priority,> amdgpu_context_handle *context);> /**> * Create GPU execution Context> diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c> index 49fc16c3..eb72c638 100644> --- a/amdgpu/amdgpu_cs.c> +++ b/amdgpu/amdgpu_cs.c> @@ -49,7 +49,7 @@ static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem);> * \return 0 on success otherwise POSIX Error code> */> drm_public int amdgpu_cs_ctx_create2(amdgpu_device_handle dev,> - uint32_t priority,> + int32_t priority,> amdgpu_context_handle *context)> {> struct amdgpu_context *gpu_context;








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