[PATCH] [i915] Fix another use of the wrong interlace mask to return to progressive mode

2012-02-24 Thread Christian Schmidt 
intel_display.c:pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
intel_display.c:pipeconf &= ~PIPECONF_INTERLACE_MASK; /* 
progressive */
intel_display.c:pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
intel_display.c:pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; 
/* progressive */

The second setting of progressive mode should use PIPECONF_INTERLACE_MASK, too.

Signed-off-by: Christian Schmidt 
---
 drivers/gpu/drm/i915/intel_display.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 56a8554..3a3ca1a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5048,7 +5048,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
adjusted_mode->crtc_vsync_end -= 1;
adjusted_mode->crtc_vsync_start -= 1;
} else
-   pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* 
progressive */
+   pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */

I915_WRITE(HTOTAL(pipe),
   (adjusted_mode->crtc_hdisplay - 1) |
-- 
1.7.8.3

[PATCH] intel-dri: Fix initialization if startup happens in interlaced mode [v2]

2011-11-14 Thread Christian Schmidt 
My EFI BIOS starts the graphics card up in my projector's preferred EDID
mode, 1080 at 60i. The Intel driver does not clear the interlaced bit:

#define   PIPECONF_PROGRESSIVE  (0 << 21)
#define   PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
#define   PIPECONF_INTERLACE_FIELD_0_ONLY   (7 << 21)

This patch introduces a new PIPECONF_INTERLACE_MASK define and uses it
to restore progressive mode.

Signed-of-by: Christian Schmidt 

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[PATCH] intel-dri: Fix initialization if startup happens in interlaced mode [v2]

2011-11-14 Thread Christian Schmidt 
My EFI BIOS starts the graphics card up in my projector's preferred EDID
mode, 1080@60i. The Intel driver does not clear the interlaced bit:

#define   PIPECONF_PROGRESSIVE  (0  21)
#define   PIPECONF_INTERLACE_W_FIELD_INDICATION (6  21)
#define   PIPECONF_INTERLACE_FIELD_0_ONLY   (7  21)

This patch introduces a new PIPECONF_INTERLACE_MASK define and uses it
to restore progressive mode.

Signed-of-by: Christian Schmidt schm...@digadd.de

diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/i915/i915_reg.h linux-3.2-rc1/drivers/gpu/drm/i915/i915_reg.h
--- linux-3.2-rc1.orig/drivers/gpu/drm/i915/i915_reg.h	2011-11-14 12:16:42.811994538 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/i915/i915_reg.h	2011-11-14 12:17:05.124715590 +0100
@@ -2312,6 +2312,7 @@
 #define   PIPECONF_PROGRESSIVE	(0  21)
 #define   PIPECONF_INTERLACE_W_FIELD_INDICATION	(6  21)
 #define   PIPECONF_INTERLACE_FIELD_0_ONLY		(7  21)
+#define   PIPECONF_INTERLACE_MASK	(7  21)
 #define   PIPECONF_CXSR_DOWNCLOCK	(116)
 #define   PIPECONF_BPP_MASK	(0x00e0)
 #define   PIPECONF_BPP_8	(05)
diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c
--- linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c	2011-11-08 01:16:02.0 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c	2011-11-14 12:15:59.373537593 +0100
@@ -5136,7 +5136,7 @@
 		adjusted_mode-crtc_vsync_end -= 1;
 		adjusted_mode-crtc_vsync_start -= 1;
 	} else
-		pipeconf = ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
+		pipeconf = ~PIPECONF_INTERLACE_MASK; /* progressive */
 
 	I915_WRITE(HTOTAL(pipe),
 		   (adjusted_mode-crtc_hdisplay - 1) |
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[PATCH] intel-dri: Fix initialization if startup happens in interlaced mode

2011-11-13 Thread Christian Schmidt 
My EFI BIOS starts the graphics card up in my projector's preferred EDID
mode, 1080 at 60i. The Intel driver does not clear the interlaced bit:

#define   PIPECONF_PROGRESSIVE  (0 << 21)
#define   PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
#define   PIPECONF_INTERLACE_FIELD_0_ONLY   (7 << 21)

Likewise, I suppose that this bit is not set for interlaced modes
either, however interlaced modes are discarded anyway.

Signed-of-by: Charistian Schmidt 
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[PATCH] Fix wrong assumptions in cea_for_each_detailed_block v2

2011-11-13 Thread Christian Schmidt 
The current logic misunderstands the spec about CEA 18byte descriptors.
First, the spec doesn't state "detailed timing descriptors" but "18 byte
descriptors", so any data record could be stored, mixed timings and
other data, just as in the standard EDID.
Second, the lower four bit of byte 3 of the CEA record do not contain
the number of descriptors, but "the total number of DTDs defining native
formats in the whole EDID [...], starting with the first DTD in the DTD
list (which starts in the base EDID block)." A device can of course
support non-native formats.

As such the number can't be used to determine n, and the existing code
will filter non-timing 18byte descriptors anyway.

V2 removes an unused variable warning.

Signed-off-by: Christian Schmidt 

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[PATCH] drm_edid_to_eld: check for CEA data blocks only from structure revision 3 on

2011-11-13 Thread Christian Schmidt 
CEA datablocks are only defined from revision 3 onwards. Only check for
them if the revision says so.

Signed-of-by: Christian Schmidt 
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[PATCH] Fix wrong assumptions in cea_for_each_detailed_block

2011-11-13 Thread Christian Schmidt 
The current logic misunderstands the spec about CEA 18byte descriptors.
First, the spec doesn't state "detailed timing descriptors" but "18 byte
descriptors", so any data record could be stored, mixed timings and
other data, just as in the standard EDID.
Second, the lower four bit of byte 3 of the CEA record do not contain
the number of descriptors, but "the total number of DTDs defining native
formats in the whole EDID [...], starting with the first DTD in the DTD
list (which starts in the base EDID block)." A device can of course
support non-native formats.

As such the number can't be used to determine n, and the existing code
will filter non-timing 18byte descriptors anyway.

Signed-off-by: Christian Schmidt 
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[PATCH] drm_edid: support CEA video modes

2011-11-13 Thread Christian Schmidt 
TFT/plasma televisions and projectors have become commonplace, and so
has the use of PCs to drive them. Add the video modes specified by an
EDID's CEA extension to the mode database for a connector.

Before:
[1.158869] [drm:drm_mode_debug_printmodeline], Modeline
19:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[1.158875] [drm:drm_mode_debug_printmodeline], Modeline
18:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x48 0x15
[1.158882] [drm:drm_mode_debug_printmodeline], Modeline
20:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5

After:
[1.144175] [drm:drm_mode_debug_printmodeline], Modeline
22:"1920x1080" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[1.144179] [drm:drm_mode_debug_printmodeline], Modeline
21:"1920x1080" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x48 0x15
[1.144187] [drm:drm_mode_debug_printmodeline], Modeline
30:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[1.144190] [drm:drm_mode_debug_printmodeline], Modeline
29:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[1.144192] [drm:drm_mode_debug_printmodeline], Modeline
25:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
[1.144195] [drm:drm_mode_debug_printmodeline], Modeline
24:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
[1.144198] [drm:drm_mode_debug_printmodeline], Modeline
23:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[1.144201] [drm:drm_mode_debug_printmodeline], Modeline 27:"720x576"
50 27000 720 732 796 864 576 581 586 625 0x40 0xa
[1.144203] [drm:drm_mode_debug_printmodeline], Modeline 26:"720x480"
60 27000 720 736 798 858 480 489 495 525 0x40 0xa
[1.144206] [drm:drm_mode_debug_printmodeline], Modeline 28:"640x480"
60 25175 640 656 752 800 480 490 492 525 0x40 0xa


Signed-off-by: Christian Schmidt 

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[PATCH] drm_edid: support CEA video modes

2011-11-13 Thread Christian Schmidt 
TFT/plasma televisions and projectors have become commonplace, and so
has the use of PCs to drive them. Add the video modes specified by an
EDID's CEA extension to the mode database for a connector.

Before:
[1.158869] [drm:drm_mode_debug_printmodeline], Modeline
19:1920x1080i 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[1.158875] [drm:drm_mode_debug_printmodeline], Modeline
18:1920x1080i 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x48 0x15
[1.158882] [drm:drm_mode_debug_printmodeline], Modeline
20:1920x1080 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5

After:
[1.144175] [drm:drm_mode_debug_printmodeline], Modeline
22:1920x1080 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[1.144179] [drm:drm_mode_debug_printmodeline], Modeline
21:1920x1080 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x48 0x15
[1.144187] [drm:drm_mode_debug_printmodeline], Modeline
30:1920x1080 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[1.144190] [drm:drm_mode_debug_printmodeline], Modeline
29:1920x1080 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[1.144192] [drm:drm_mode_debug_printmodeline], Modeline
25:1920x1080 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
[1.144195] [drm:drm_mode_debug_printmodeline], Modeline
24:1280x720 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
[1.144198] [drm:drm_mode_debug_printmodeline], Modeline
23:1280x720 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[1.144201] [drm:drm_mode_debug_printmodeline], Modeline 27:720x576
50 27000 720 732 796 864 576 581 586 625 0x40 0xa
[1.144203] [drm:drm_mode_debug_printmodeline], Modeline 26:720x480
60 27000 720 736 798 858 480 489 495 525 0x40 0xa
[1.144206] [drm:drm_mode_debug_printmodeline], Modeline 28:640x480
60 25175 640 656 752 800 480 490 492 525 0x40 0xa


Signed-off-by: Christian Schmidt schm...@digadd.de

diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c linux-3.2-rc1/drivers/gpu/drm/drm_edid.c
--- linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c	2011-11-08 01:16:02.0 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/drm_edid.c	2011-11-12 19:51:47.164161263 +0100
@@ -1319,6 +1319,7 @@
 
 #define HDMI_IDENTIFIER 0x000C03
 #define AUDIO_BLOCK	0x01
+#define VIDEO_BLOCK 0x02
 #define VENDOR_BLOCK0x03
 #define SPEAKER_BLOCK	0x04
 #define EDID_BASIC_AUDIO	(1  6)
@@ -1349,6 +1350,47 @@
 }
 EXPORT_SYMBOL(drm_find_cea_extension);
 
+static int
+do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
+{
+	struct drm_device *dev = connector-dev;
+	u8 * mode, cea_mode;
+	int modes = 0;
+
+	for (mode = db; mode  db + len; mode++) {
+		cea_mode = (*mode  127) - 1; /* CEA modes are numbered 1..127 */
+		if (cea_mode  drm_num_cea_modes) {
+			struct drm_display_mode *newmode;
+			newmode = drm_mode_duplicate(dev,
+		 edid_cea_modes[cea_mode]);
+			if (newmode) {
+drm_mode_probed_add(connector, newmode);
+modes++;
+			}
+		}
+	}
+
+	return modes;
+}
+
+static int
+add_cea_modes(struct drm_connector *connector, struct edid *edid)
+{
+	u8 * cea = drm_find_cea_extension(edid);
+	u8 * db, dbl;
+	int modes = 0;
+
+	if (cea  cea[1] = 3) {
+		for (db = cea + 4; db  cea + cea[2]; db += dbl + 1) {
+			dbl = db[0]  0x1f;
+			if (((db[0]  0xe0)  5) == VIDEO_BLOCK)
+modes += do_cea_modes (connector, db+1, dbl);
+		}
+	}
+
+	return modes;
+}
+
 static void
 parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db)
 {
@@ -1722,6 +1764,7 @@
 	num_modes += add_standard_modes(connector, edid);
 	num_modes += add_established_modes(connector, edid);
 	num_modes += add_inferred_modes(connector, edid);
+	num_modes += add_cea_modes(connector, edid);
 
 	if (quirks  (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
 		edid_fixup_preferred(connector, quirks);
diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid_modes.h linux-3.2-rc1/drivers/gpu/drm/drm_edid_modes.h
--- linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid_modes.h	2011-11-08 01:16:02.0 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/drm_edid_modes.h	2011-11-12 19:46:35.942052075 +0100
@@ -378,3 +378,287 @@
 	{ 1920, 1440, 75, 0 },
 };
 static const int num_est3_modes = sizeof(est3_modes) / sizeof(est3_modes[0]);
+
+/*
+ * Probably taken from CEA-861 spec.
+ * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
+ */
+static const struct drm_display_mode edid_cea_modes[] = {
+	/* 640x480@60Hz */
+	{ DRM_MODE(640x480, DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
+		   752, 800, 0, 480, 490, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 720x480@60Hz */
+	{ DRM_MODE(720x480, DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
+		   798, 858, 0, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 720x480@60Hz */
+	{ DRM_MODE(720x480, DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
+		   798, 858, 0, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 1280x720@60Hz

[PATCH] Fix wrong assumptions in cea_for_each_detailed_block

2011-11-13 Thread Christian Schmidt 
The current logic misunderstands the spec about CEA 18byte descriptors.
First, the spec doesn't state detailed timing descriptors but 18 byte
descriptors, so any data record could be stored, mixed timings and
other data, just as in the standard EDID.
Second, the lower four bit of byte 3 of the CEA record do not contain
the number of descriptors, but the total number of DTDs defining native
formats in the whole EDID [...], starting with the first DTD in the DTD
list (which starts in the base EDID block). A device can of course
support non-native formats.

As such the number can't be used to determine n, and the existing code
will filter non-timing 18byte descriptors anyway.

Signed-off-by: Christian Schmidt schmidt@digadd,de
diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c linux-3.2-rc1/drivers/gpu/drm/drm_edid.c
--- linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c	2011-11-13 01:42:29.771092473 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/drm_edid.c	2011-11-13 01:54:32.031062983 +0100
@@ -511,22 +511,7 @@
 	u8 rev = ext[0x01], d = ext[0x02];
 	u8 *det_base = ext + d;
 
-	switch (rev) {
-	case 0:
-		/* can't happen */
-		return;
-	case 1:
-		/* have to infer how many blocks we have, check pixel clock */
-		for (i = 0; i  6; i++)
-			if (det_base[18*i] || det_base[18*i+1])
-n++;
-		break;
-	default:
-		/* explicit count */
-		n = min(ext[0x03]  0x0f, 6);
-		break;
-	}
-
+	n = (127 - d) / 18;
 	for (i = 0; i  n; i++)
 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 }
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[PATCH] drm_edid_to_eld: check for CEA data blocks only from structure revision 3 on

2011-11-13 Thread Christian Schmidt 
CEA datablocks are only defined from revision 3 onwards. Only check for
them if the revision says so.

Signed-of-by: Christian Schmidt schm...@digadd.de
diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c linux-3.2-rc1/drivers/gpu/drm/drm_edid.c
--- linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c	2011-11-13 02:05:32.897801011 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/drm_edid.c	2011-11-13 02:08:45.466393573 +0100
@@ -1459,26 +1459,29 @@
 	eld[18] = edid-prod_code[0];
 	eld[19] = edid-prod_code[1];
 
-	for (db = cea + 4; db  cea + cea[2]; db += dbl + 1) {
-		dbl = db[0]  0x1f;
-
-		switch ((db[0]  0xe0)  5) {
-		case AUDIO_BLOCK:	/* Audio Data Block, contains SADs */
-			sad_count = dbl / 3;
-			memcpy(eld + 20 + mnl, db[1], dbl);
-			break;
-		case SPEAKER_BLOCK:	/* Speaker Allocation Data Block */
-			eld[7] = db[1];
-			break;
-		case VENDOR_BLOCK:
-			/* HDMI Vendor-Specific Data Block */
-			if (db[1] == 0x03  db[2] == 0x0c  db[3] == 0)
-parse_hdmi_vsdb(connector, db);
-			break;
-		default:
-			break;
+	if (cea[1] = 3)
+		for (db = cea + 4; db  cea + cea[2]; db += dbl + 1) {
+			dbl = db[0]  0x1f;
+			
+			switch ((db[0]  0xe0)  5) {
+			case AUDIO_BLOCK:
+/* Audio Data Block, contains SADs */
+sad_count = dbl / 3;
+memcpy(eld + 20 + mnl, db[1], dbl);
+break;
+			case SPEAKER_BLOCK:
+/* Speaker Allocation Data Block */
+eld[7] = db[1];
+break;
+			case VENDOR_BLOCK:
+/* HDMI Vendor-Specific Data Block */
+if (db[1] == 0x03  db[2] == 0x0c  db[3] == 0)
+	parse_hdmi_vsdb(connector, db);
+break;
+			default:
+break;
+			}
 		}
-	}
 	eld[5] |= sad_count  4;
 	eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
 
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[PATCH] Fix wrong assumptions in cea_for_each_detailed_block v2

2011-11-13 Thread Christian Schmidt 
The current logic misunderstands the spec about CEA 18byte descriptors.
First, the spec doesn't state detailed timing descriptors but 18 byte
descriptors, so any data record could be stored, mixed timings and
other data, just as in the standard EDID.
Second, the lower four bit of byte 3 of the CEA record do not contain
the number of descriptors, but the total number of DTDs defining native
formats in the whole EDID [...], starting with the first DTD in the DTD
list (which starts in the base EDID block). A device can of course
support non-native formats.

As such the number can't be used to determine n, and the existing code
will filter non-timing 18byte descriptors anyway.

V2 removes an unused variable warning.

Signed-off-by: Christian Schmidt schmidt@digadd,de

diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c linux-3.2-rc1/drivers/gpu/drm/drm_edid.c
--- linux-3.2-rc1.orig/drivers/gpu/drm/drm_edid.c	2011-11-13 09:51:21.722124401 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/drm_edid.c	2011-11-13 09:54:47.399553081 +0100
@@ -508,25 +508,10 @@
 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 {
 	int i, n = 0;
-	u8 rev = ext[0x01], d = ext[0x02];
+	u8 d = ext[0x02];
 	u8 *det_base = ext + d;
 
-	switch (rev) {
-	case 0:
-		/* can't happen */
-		return;
-	case 1:
-		/* have to infer how many blocks we have, check pixel clock */
-		for (i = 0; i  6; i++)
-			if (det_base[18*i] || det_base[18*i+1])
-n++;
-		break;
-	default:
-		/* explicit count */
-		n = min(ext[0x03]  0x0f, 6);
-		break;
-	}
-
+	n = (127 - d) / 18;
 	for (i = 0; i  n; i++)
 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 }
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[PATCH] intel-dri: Fix initialization if startup happens in interlaced mode

2011-11-13 Thread Christian Schmidt 
My EFI BIOS starts the graphics card up in my projector's preferred EDID
mode, 1080@60i. The Intel driver does not clear the interlaced bit:

#define   PIPECONF_PROGRESSIVE  (0  21)
#define   PIPECONF_INTERLACE_W_FIELD_INDICATION (6  21)
#define   PIPECONF_INTERLACE_FIELD_0_ONLY   (7  21)

Likewise, I suppose that this bit is not set for interlaced modes
either, however interlaced modes are discarded anyway.

Signed-of-by: Charistian Schmidt schm...@digadd.de
diff -ur linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c
--- linux-3.2-rc1.orig/drivers/gpu/drm/i915/intel_display.c	2011-11-08 01:16:02.0 +0100
+++ linux-3.2-rc1/drivers/gpu/drm/i915/intel_display.c	2011-11-13 21:58:22.310791999 +0100
@@ -5136,7 +5136,7 @@
 		adjusted_mode-crtc_vsync_end -= 1;
 		adjusted_mode-crtc_vsync_start -= 1;
 	} else
-		pipeconf = ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */
+		pipeconf = ~PIPECONF_INTERLACE_FIELD_0_ONLY; /* progressive */
 
 	I915_WRITE(HTOTAL(pipe),
 		   (adjusted_mode-crtc_hdisplay - 1) |
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