Re: linux-firmware: add Qualcomm Adreno a3xx firmware

2017-09-07 Thread Kyle McMartin 
On Wed, Sep 06, 2017 at 04:36:01PM +0200, Nicolas Dechesne wrote:
> Hi,
> 
> This pull request adds firmware for adreno a3xx GPU found for example
> on the APQ8016 chipset, used on the Dragonboard 410c.
> 
> The following changes since commit 9d40a17beaf271e6ad47a5e714a296100eef4692:
> 
>   rtlwifi: rtl8822be: Add firmware for new driver/device (2017-08-29
> 11:41:47 -0700)
> 
> are available in the git repository at:
> 
>   https://github.com/ndechesne/linux-firmware.git adreno
> 
> for you to fetch changes up to 9a0a0548a7bb02d052318ed8f5333005773878f2:

Pulled. Thanks Nicolas.

regards, Kyle

> 
>   qcom: add firmware files for Adreno A3xx (2017-09-05 22:07:42 +0200)
> 
> 
> Nicolas Dechesne (1):
>   qcom: add firmware files for Adreno A3xx
> 
>  WHENCE   |  14 ++
>  a300_pfp.fw  |   1 +
>  a300_pm4.fw  |   1 +

;-( bummer. oh well.

>  qcom/a300_pfp.fw | Bin 0 -> 1156 bytes
>  qcom/a300_pm4.fw | Bin 0 -> 9220 bytes

appreciate this, though. Thanks!

>  5 files changed, 16 insertions(+)
>  create mode 12 a300_pfp.fw
>  create mode 12 a300_pm4.fw
>  create mode 100644 qcom/a300_pfp.fw
>  create mode 100644 qcom/a300_pm4.fw
> 
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[PATCH] radeon: Update Kaveri MEC firmware to #396

2015-03-18 Thread Kyle McMartin 
On Sat, Mar 14, 2015 at 12:51:19AM +0200, Oded Gabbay wrote:
> This patch updates the Kaveri MEC firmware to #396 (from #391).
> The MEC firmware is mainly used for amdkfd - AMD's HSA Linux kernel driver.
> 
> Signed-off-by: Oded Gabbay 

applied, thanks.

[PATCH] drm/radeon: delete unused PTE_* defines

2014-09-16 Thread Kyle McMartin 
They don't appear to be used anywhere... elsewhere uses R*_PTE_*.

master at linux:U:.% git grep PTE_ -- drivers/gpu/drm/radeon | grep -v _PTE_
master at linux:U:.%(kyle at redacted:~/linux)

./arch/arm64/include/asm/pgtable.h:27:0: note: this is the location of the 
previous definition
 #define PTE_VALID  (_AT(pteval_t, 1) << 0)
 ^
In file included from drivers/gpu/drm/radeon/r600_cs.c:31:0:
drivers/gpu/drm/radeon/r600d.h:48:0: warning: "PTE_VALID" redefined [enabled by 
default]
 #define PTE_VALID(1 << 0)
 ^
In file included from ./arch/arm64/include/asm/io.h:29:0,
 from include/linux/clocksource.h:19,
 from include/clocksource/arm_arch_timer.h:19,
 from ./arch/arm64/include/asm/arch_timer.h:27,
 from ./arch/arm64/include/asm/timex.h:19,
 from include/linux/timex.h:65,

 from include/drm/drmP.h:51,
 from drivers/gpu/drm/radeon/r600_cs.c:29:
./arch/arm64/include/asm/pgtable.h:27:0: note: this is the location of the 
previous definition
 #define PTE_VALID  (_AT(pteval_t, 1) << 0)
 ^

Signed-off-by: Kyle McMartin 

--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -44,13 +44,6 @@
 #define R6XX_MAX_PIPES 8
 #define R6XX_MAX_PIPES_MASK0xff

-/* PTE flags */
-#define PTE_VALID  (1 << 0)
-#define PTE_SYSTEM (1 << 1)
-#define PTE_SNOOPED(1 << 2)
-#define PTE_READABLE   (1 << 5)
-#define PTE_WRITEABLE  (1 << 6)
-
 /* tiling bits */
 #define ARRAY_LINEAR_GENERAL  0x
 #define ARRAY_LINEAR_ALIGNED  0x0001

[PATCH] radeon: si_dpm.c: avoid a signed 64-bit divide

2013-08-02 Thread Kyle McMartin 
On Fri, Aug 02, 2013 at 05:14:52PM +, Deucher, Alexander wrote:
> The fix is already queued in my tree:
> http://lists.freedesktop.org/archives/dri-devel/2013-August/042668.html
> 

thanks. ;-)

[PATCH] radeon: si_dpm.c: avoid a signed 64-bit divide

2013-08-02 Thread Kyle McMartin 
Hit a compile failure here referencing divdi3 on i686.

Signed-off-by: Kyle McMartin 

--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -1767,7 +1767,7 @@ static void 
si_calculate_leakage_for_v_and_t_formula(const struct ni_leakage_coe
s64 temperature, t_slope, t_intercept, av, bv, t_ref;
s64 tmp;

-   i_leakage = drm_int2fixp(ileakage) / 100;
+   i_leakage = div64_s64(drm_int2fixp(ileakage), 100);
vddc = div64_s64(drm_int2fixp(v), 1000);
temperature = div64_s64(drm_int2fixp(t), 1000);

[PATCH] radeon: si_dpm.c: avoid a signed 64-bit divide

2013-08-02 Thread Kyle McMartin 
Hit a compile failure here referencing divdi3 on i686.

Signed-off-by: Kyle McMartin k...@redhat.com

--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -1767,7 +1767,7 @@ static void 
si_calculate_leakage_for_v_and_t_formula(const struct ni_leakage_coe
s64 temperature, t_slope, t_intercept, av, bv, t_ref;
s64 tmp;
 
-   i_leakage = drm_int2fixp(ileakage) / 100;
+   i_leakage = div64_s64(drm_int2fixp(ileakage), 100);
vddc = div64_s64(drm_int2fixp(v), 1000);
temperature = div64_s64(drm_int2fixp(t), 1000);
 
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Re: [PATCH] radeon: si_dpm.c: avoid a signed 64-bit divide

2013-08-02 Thread Kyle McMartin 
On Fri, Aug 02, 2013 at 05:14:52PM +, Deucher, Alexander wrote:
 The fix is already queued in my tree:
 http://lists.freedesktop.org/archives/dri-devel/2013-August/042668.html
 

thanks. ;-)
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[PATCH] i915: reprogram power monitoring registers on resume

2010-11-04 Thread Kyle McMartin 
From: Kyle McMartin k...@redhat.com

Fixes issue where i915_gfx_val was reporting values several
orders of magnitude higher than physically possible (without
leaving scorch marks on my thighs at least.)

Signed-off-by: Kyle McMartin k...@redhat.com
Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
---
 drivers/gpu/drm/i915/i915_suspend.c |4 +++-
 drivers/gpu/drm/i915/intel_drv.h|1 +
 2 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_suspend.c 
b/drivers/gpu/drm/i915/i915_suspend.c
index 989c19d..454c064 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -862,8 +862,10 @@ int i915_restore_state(struct drm_device *dev)
/* Clock gating state */
intel_init_clock_gating(dev);
 
-   if (HAS_PCH_SPLIT(dev))
+   if (HAS_PCH_SPLIT(dev)) {
ironlake_enable_drps(dev);
+   intel_init_emon(dev);
+   }
 
/* Cache mode state */
I915_WRITE (CACHE_MODE_0, dev_priv-saveCACHE_MODE_0 | 0x);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9af9f86..21551fe 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -296,6 +296,7 @@ extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, 
u16 *red, u16 *green,
 extern void intel_init_clock_gating(struct drm_device *dev);
 extern void ironlake_enable_drps(struct drm_device *dev);
 extern void ironlake_disable_drps(struct drm_device *dev);
+extern void intel_init_emon(struct drm_device *dev);
 
 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
  struct drm_gem_object *obj,
-- 
1.7.3.1

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[PATCH] i915: reprogram power monitoring registers on resume

2010-11-03 Thread Kyle McMartin 
From: Kyle McMartin <k...@redhat.com>

Fixes issue where i915_gfx_val was reporting values several
orders of magnitude higher than physically possible (without
leaving scorch marks on my thighs at least.)

Signed-off-by: Kyle McMartin 
Reviewed-by: Jesse Barnes 
---
 drivers/gpu/drm/i915/i915_suspend.c |4 +++-
 drivers/gpu/drm/i915/intel_drv.h|1 +
 2 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_suspend.c 
b/drivers/gpu/drm/i915/i915_suspend.c
index 989c19d..454c064 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -862,8 +862,10 @@ int i915_restore_state(struct drm_device *dev)
/* Clock gating state */
intel_init_clock_gating(dev);

-   if (HAS_PCH_SPLIT(dev))
+   if (HAS_PCH_SPLIT(dev)) {
ironlake_enable_drps(dev);
+   intel_init_emon(dev);
+   }

/* Cache mode state */
I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0x);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9af9f86..21551fe 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -296,6 +296,7 @@ extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, 
u16 *red, u16 *green,
 extern void intel_init_clock_gating(struct drm_device *dev);
 extern void ironlake_enable_drps(struct drm_device *dev);
 extern void ironlake_disable_drps(struct drm_device *dev);
+extern void intel_init_emon(struct drm_device *dev);

 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
  struct drm_gem_object *obj,
-- 
1.7.3.1