[PATCH v5 8/8] iommu/rockchip: Enable Rockchip IOMMU on ARM64
From: Simon Xue <x...@rock-chips.com> This patch makes it possible to compile the rockchip-iommu driver on ARM64, so that it can be used with 64-bit SoCs equipped with this type of IOMMU. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng Signed-off-by: Tomasz Figa --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index ad08603..5572621 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -218,7 +218,7 @@ config OMAP_IOMMU_DEBUG config ROCKCHIP_IOMMU bool "Rockchip IOMMU Support" - depends on ARM + depends on ARM || ARM64 depends on ARCH_ROCKCHIP || COMPILE_TEST select IOMMU_API select ARM_DMA_USE_IOMMU -- 1.9.1
[PATCH v5 7/8] drm/rockchip: Use common IOMMU API to attach devices
Rockchip DRM used the arm special API, arm_iommu_*(), to attach
iommu for ARM32 SoCs. This patch convert to common iommu API
so it would support ARM64 like RK3399.
Since previous patch added support for direct IOMMU address space
management, there is no need to use DMA API anymore and this patch wires
things to use the new method.
Signed-off-by: Shunqian Zheng
Signed-off-by: Tomasz Figa
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 100 +++-
1 file changed, 53 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 8b96c69..ca9624f 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -14,18 +14,18 @@
* GNU General Public License for more details.
*/
-#include
-
#include
#include
#include
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
@@ -51,28 +51,31 @@ static struct drm_driver rockchip_drm_driver;
int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
struct device *dev)
{
- struct dma_iommu_mapping *mapping = drm_dev->dev->archdata.mapping;
+ struct rockchip_drm_private *private = drm_dev->dev_private;
int ret;
if (!is_support_iommu)
return 0;
- ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
- if (ret)
+ ret = iommu_attach_device(private->domain, dev);
+ if (ret) {
+ dev_err(dev, "Failed to attach iommu device\n");
return ret;
+ }
- dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
-
- return arm_iommu_attach_device(dev, mapping);
+ return 0;
}
void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
struct device *dev)
{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct iommu_domain *domain = private->domain;
+
if (!is_support_iommu)
return;
- arm_iommu_detach_device(dev);
+ iommu_detach_device(domain, dev);
}
int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
@@ -137,11 +140,45 @@ static void rockchip_drm_crtc_disable_vblank(struct
drm_device *dev,
priv->crtc_funcs[pipe]->disable_vblank(crtc);
}
+static int rockchip_drm_init_iommu(struct drm_device *drm_dev)
+{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct iommu_domain_geometry *geometry;
+ u64 start, end;
+
+ if (!is_support_iommu)
+ return 0;
+
+ private->domain = iommu_domain_alloc(_bus_type);
+ if (!private->domain)
+ return -ENOMEM;
+
+ geometry = >domain->geometry;
+ start = geometry->aperture_start;
+ end = geometry->aperture_end;
+
+ DRM_DEBUG("IOMMU context initialized (aperture: %#llx-%#llx)\n",
+ start, end);
+ drm_mm_init(>mm, start, end - start + 1);
+
+ return 0;
+}
+
+static void rockchip_iommu_cleanup(struct drm_device *drm_dev)
+{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+
+ if (!is_support_iommu)
+ return;
+
+ drm_mm_takedown(>mm);
+ iommu_domain_free(private->domain);
+}
+
static int rockchip_drm_bind(struct device *dev)
{
struct drm_device *drm_dev;
struct rockchip_drm_private *private;
- struct dma_iommu_mapping *mapping = NULL;
int ret;
drm_dev = drm_dev_alloc(_drm_driver, dev);
@@ -162,38 +199,14 @@ static int rockchip_drm_bind(struct device *dev)
rockchip_drm_mode_config_init(drm_dev);
- dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
- GFP_KERNEL);
- if (!dev->dma_parms) {
- ret = -ENOMEM;
+ ret = rockchip_drm_init_iommu(drm_dev);
+ if (ret)
goto err_config_cleanup;
- }
-
- if (is_support_iommu) {
- /* TODO(djkurtz): fetch the mapping start/size from somewhere */
- mapping = arm_iommu_create_mapping(_bus_type,
- 0x,
- SZ_2G);
- if (IS_ERR(mapping)) {
- ret = PTR_ERR(mapping);
- goto err_config_cleanup;
- }
-
- ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
- if (ret)
- goto err_release_mapping;
-
- dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
-
- ret = arm_iommu_attach_device(dev, mapping);
- if (ret)
- goto err_release_mapping;
- }
/* Try to bind all sub drivers. */
ret = com
[PATCH v5 6/8] drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain
From: Tomasz Figa <tf...@chromium.org>
The API is not suitable for subsystems consisting of multiple devices
and requires severe hacks to use it. To mitigate this, this patch
implements allocation and address space management locally by using
helpers provided by DRM framework, like other DRM drivers do, e.g.
Tegra.
This patch should not introduce any functional changes until the driver
is made to attach subdevices into an IOMMU domain with the generic IOMMU
API, which will happen in following patch. Based heavily on GEM
implementation of Tegra DRM driver.
Signed-off-by: Tomasz Figa
Signed-off-by: Shunqian Zheng
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 3 +
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 221 ++--
drivers/gpu/drm/rockchip/rockchip_drm_gem.h | 9 ++
3 files changed, 222 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index ea39329..5ab1223 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -30,6 +30,7 @@
struct drm_device;
struct drm_connector;
+struct iommu_domain;
/*
* Rockchip drm private crtc funcs.
@@ -61,6 +62,8 @@ struct rockchip_drm_private {
struct drm_gem_object *fbdev_bo;
const struct rockchip_crtc_funcs *crtc_funcs[ROCKCHIP_MAX_CRTC];
struct drm_atomic_state *state;
+ struct iommu_domain *domain;
+ struct drm_mm mm;
};
int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
index 394f92b..e7cd93d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c
@@ -19,11 +19,135 @@
#include
#include
+#include
#include "rockchip_drm_drv.h"
#include "rockchip_drm_gem.h"
-static int rockchip_gem_alloc_buf(struct rockchip_gem_object *rk_obj,
+static int rockchip_gem_iommu_map(struct rockchip_gem_object *rk_obj)
+{
+ struct drm_device *drm = rk_obj->base.dev;
+ struct rockchip_drm_private *private = drm->dev_private;
+ int prot = IOMMU_READ | IOMMU_WRITE;
+ ssize_t ret;
+
+ ret = drm_mm_insert_node_generic(>mm, _obj->mm,
+rk_obj->base.size, PAGE_SIZE,
+0, 0, 0);
+ if (ret < 0) {
+ DRM_ERROR("out of I/O virtual memory: %zd\n", ret);
+ return ret;
+ }
+
+ rk_obj->dma_addr = rk_obj->mm.start;
+
+ ret = iommu_map_sg(private->domain, rk_obj->dma_addr, rk_obj->sgt->sgl,
+ rk_obj->sgt->nents, prot);
+ if (ret < 0) {
+ DRM_ERROR("failed to map buffer: %zd\n", ret);
+ goto err_remove_node;
+ }
+
+ rk_obj->size = ret;
+
+ return 0;
+
+err_remove_node:
+ drm_mm_remove_node(_obj->mm);
+
+ return ret;
+}
+
+static int rockchip_gem_iommu_unmap(struct rockchip_gem_object *rk_obj)
+{
+ struct drm_device *drm = rk_obj->base.dev;
+ struct rockchip_drm_private *private = drm->dev_private;
+
+ iommu_unmap(private->domain, rk_obj->dma_addr, rk_obj->size);
+ drm_mm_remove_node(_obj->mm);
+
+ return 0;
+}
+
+static int rockchip_gem_get_pages(struct rockchip_gem_object *rk_obj)
+{
+ struct drm_device *drm = rk_obj->base.dev;
+ int ret, i;
+ struct scatterlist *s;
+
+ rk_obj->pages = drm_gem_get_pages(_obj->base);
+ if (IS_ERR(rk_obj->pages))
+ return PTR_ERR(rk_obj->pages);
+
+ rk_obj->num_pages = rk_obj->base.size >> PAGE_SHIFT;
+
+ rk_obj->sgt = drm_prime_pages_to_sg(rk_obj->pages, rk_obj->num_pages);
+ if (IS_ERR(rk_obj->sgt)) {
+ ret = PTR_ERR(rk_obj->sgt);
+ goto err_put_pages;
+ }
+
+ /*
+* Fake up the SG table so that dma_sync_sg_for_device() can be used
+* to flush the pages associated with it.
+*
+* TODO: Replace this by drm_clflush_sg() once it can be implemented
+* without relying on symbols that are not exported.
+*/
+ for_each_sg(rk_obj->sgt->sgl, s, rk_obj->sgt->nents, i)
+ sg_dma_address(s) = sg_phys(s);
+
+ dma_sync_sg_for_device(drm->dev, rk_obj->sgt->sgl, rk_obj->sgt->nents,
+ DMA_TO_DEVICE);
+
+ return 0;
+
+err_put_pages:
+ drm_gem_put_pages(_obj->base, rk_obj->pages, false, false);
+ return ret;
+}
+
+static void rockchip_gem_put_pages(struct rockchip_gem_object *rk_obj)
+{
+ sg_free_table(rk_obj->sgt);
+ kfree(rk_obj->sgt);
+ drm_gem_put_pages(_obj->base, rk_obj->pages, false, fa
[PATCH v5 5/8] iommu/rockchip: Prepare to support generic DMA mapping
Set geometry for allocated domains and fix .domain_alloc() callback to work with IOMMU_DOMAIN_DMA domain type, which is used for implicit domains on ARM64. Signed-off-by: Shunqian Zheng Signed-off-by: Tomasz Figa --- drivers/iommu/rockchip-iommu.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 712ed75..9afcbf7 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -889,7 +889,7 @@ static struct iommu_domain *rk_iommu_domain_alloc(unsigned type) struct platform_device *pdev; struct device *iommu_dev; - if (type != IOMMU_DOMAIN_UNMANAGED) + if (type != IOMMU_DOMAIN_UNMANAGED && type != IOMMU_DOMAIN_DMA) return NULL; /* Register a pdev per domain, so DMA API can base on this *dev @@ -906,8 +906,8 @@ static struct iommu_domain *rk_iommu_domain_alloc(unsigned type) rk_domain->pdev = pdev; - /* To init the iovad which is required by iommu_dma_init_domain() */ - if (iommu_get_dma_cookie(_domain->domain)) + if (type == IOMMU_DOMAIN_DMA && + iommu_get_dma_cookie(_domain->domain)) goto err_unreg_pdev; /* @@ -933,12 +933,17 @@ static struct iommu_domain *rk_iommu_domain_alloc(unsigned type) spin_lock_init(_domain->dt_lock); INIT_LIST_HEAD(_domain->iommus); + rk_domain->domain.geometry.aperture_start = 0; + rk_domain->domain.geometry.aperture_end = DMA_BIT_MASK(32); + rk_domain->domain.geometry.force_aperture = true; + return _domain->domain; err_free_dt: free_page((unsigned long)rk_domain->dt); err_put_cookie: - iommu_put_dma_cookie(_domain->domain); + if (type == IOMMU_DOMAIN_DMA) + iommu_put_dma_cookie(_domain->domain); err_unreg_pdev: platform_device_unregister(pdev); @@ -967,7 +972,8 @@ static void rk_iommu_domain_free(struct iommu_domain *domain) SPAGE_SIZE, DMA_TO_DEVICE); free_page((unsigned long)rk_domain->dt); - iommu_put_dma_cookie(_domain->domain); + if (domain->type == IOMMU_DOMAIN_DMA) + iommu_put_dma_cookie(_domain->domain); platform_device_unregister(rk_domain->pdev); } -- 1.9.1
[PATCH v5 4/8] iommu/rockchip: Use DMA API to manage coherency
Use DMA API instead of architecture internal functions like
__cpuc_flush_dcache_area() etc.
The biggest difficulty here is that dma_map and _sync calls require some
struct device, while there is no real 1:1 relation between an IOMMU
domain and some device. To overcome this, a simple platform device is
registered for each allocated IOMMU domain.
With this patch, this driver can be used on both ARM and ARM64
platforms, such as RK3288 and RK3399 respectively.
Signed-off-by: Shunqian Zheng
Signed-off-by: Tomasz Figa
---
drivers/iommu/rockchip-iommu.c | 162 +++--
1 file changed, 123 insertions(+), 39 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 8a5bac7..712ed75 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -4,11 +4,10 @@
* published by the Free Software Foundation.
*/
-#include
-#include
#include
#include
#include
+#include
#include
#include
#include
@@ -77,7 +76,9 @@
struct rk_iommu_domain {
struct list_head iommus;
+ struct platform_device *pdev;
u32 *dt; /* page directory table */
+ dma_addr_t dt_dma;
spinlock_t iommus_lock; /* lock for iommus list */
spinlock_t dt_lock; /* lock for modifying page directory table */
@@ -93,14 +94,12 @@ struct rk_iommu {
struct iommu_domain *domain; /* domain to which iommu is attached */
};
-static inline void rk_table_flush(u32 *va, unsigned int count)
+static inline void rk_table_flush(struct rk_iommu_domain *dom, dma_addr_t dma,
+ unsigned int count)
{
- phys_addr_t pa_start = virt_to_phys(va);
- phys_addr_t pa_end = virt_to_phys(va + count);
- size_t size = pa_end - pa_start;
+ size_t size = count * sizeof(u32); /* count of u32 entry */
- __cpuc_flush_dcache_area(va, size);
- outer_flush_range(pa_start, pa_end);
+ dma_sync_single_for_device(>pdev->dev, dma, size, DMA_TO_DEVICE);
}
static struct rk_iommu_domain *to_rk_domain(struct iommu_domain *dom)
@@ -183,10 +182,9 @@ static inline bool rk_dte_is_pt_valid(u32 dte)
return dte & RK_DTE_PT_VALID;
}
-static u32 rk_mk_dte(u32 *pt)
+static inline u32 rk_mk_dte(dma_addr_t pt_dma)
{
- phys_addr_t pt_phys = virt_to_phys(pt);
- return (pt_phys & RK_DTE_PT_ADDRESS_MASK) | RK_DTE_PT_VALID;
+ return (pt_dma & RK_DTE_PT_ADDRESS_MASK) | RK_DTE_PT_VALID;
}
/*
@@ -603,13 +601,16 @@ static void rk_iommu_zap_iova_first_last(struct
rk_iommu_domain *rk_domain,
static u32 *rk_dte_get_page_table(struct rk_iommu_domain *rk_domain,
dma_addr_t iova)
{
+ struct device *dev = _domain->pdev->dev;
u32 *page_table, *dte_addr;
- u32 dte;
+ u32 dte_index, dte;
phys_addr_t pt_phys;
+ dma_addr_t pt_dma;
assert_spin_locked(_domain->dt_lock);
- dte_addr = _domain->dt[rk_iova_dte_index(iova)];
+ dte_index = rk_iova_dte_index(iova);
+ dte_addr = _domain->dt[dte_index];
dte = *dte_addr;
if (rk_dte_is_pt_valid(dte))
goto done;
@@ -618,19 +619,27 @@ static u32 *rk_dte_get_page_table(struct rk_iommu_domain
*rk_domain,
if (!page_table)
return ERR_PTR(-ENOMEM);
- dte = rk_mk_dte(page_table);
- *dte_addr = dte;
+ pt_dma = dma_map_single(dev, page_table, SPAGE_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(dev, pt_dma)) {
+ dev_err(dev, "DMA mapping error while allocating page table\n");
+ free_page((unsigned long)page_table);
+ return ERR_PTR(-ENOMEM);
+ }
- rk_table_flush(page_table, NUM_PT_ENTRIES);
- rk_table_flush(dte_addr, 1);
+ dte = rk_mk_dte(pt_dma);
+ *dte_addr = dte;
+ rk_table_flush(rk_domain, pt_dma, NUM_PT_ENTRIES);
+ rk_table_flush(rk_domain,
+ rk_domain->dt_dma + dte_index * sizeof(u32), 1);
done:
pt_phys = rk_dte_pt_address(dte);
return (u32 *)phys_to_virt(pt_phys);
}
static size_t rk_iommu_unmap_iova(struct rk_iommu_domain *rk_domain,
- u32 *pte_addr, dma_addr_t iova, size_t size)
+ u32 *pte_addr, dma_addr_t pte_dma,
+ size_t size)
{
unsigned int pte_count;
unsigned int pte_total = size / SPAGE_SIZE;
@@ -645,14 +654,14 @@ static size_t rk_iommu_unmap_iova(struct rk_iommu_domain
*rk_domain,
pte_addr[pte_count] = rk_mk_pte_invalid(pte);
}
- rk_table_flush(pte_addr, pte_count);
+ rk_table_flush(rk_domain, pte_dma, pte_count);
return pte_count * SPAGE_SIZE;
}
static int rk_iommu_map_iova(struct rk_iommu_domain *rk_domain, u32 *pte_addr,
-dma_addr_t iova, phys_addr_t paddr, size
[PATCH v5 3/8] iommu/rockchip: Fix allocation of bases array in driver probe
In .probe(), devm_kzalloc() is called with size == 0 and works only
by luck, due to internal behavior of the allocator and the fact
that the proper allocation size is small. Let's use proper value for
calculating the size.
Fixes: cd6438c5f844 ("iommu/rockchip: Reconstruct to support multi slaves")
Signed-off-by: Shunqian Zheng
Signed-off-by: Tomasz Figa
Reviewed-by: Douglas Anderson
---
drivers/iommu/rockchip-iommu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 53fa0d9..8a5bac7 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -1034,6 +1034,7 @@ static int rk_iommu_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct rk_iommu *iommu;
struct resource *res;
+ int num_res = pdev->num_resources;
int i;
iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL);
@@ -1043,12 +1044,13 @@ static int rk_iommu_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, iommu);
iommu->dev = dev;
iommu->num_mmu = 0;
- iommu->bases = devm_kzalloc(dev, sizeof(*iommu->bases) * iommu->num_mmu,
+
+ iommu->bases = devm_kzalloc(dev, sizeof(*iommu->bases) * num_res,
GFP_KERNEL);
if (!iommu->bases)
return -ENOMEM;
- for (i = 0; i < pdev->num_resources; i++) {
+ for (i = 0; i < num_res; i++) {
res = platform_get_resource(pdev, IORESOURCE_MEM, i);
if (!res)
continue;
--
1.9.1
[PATCH v5 2/8] iommu/rockchip: Add map_sg callback for rk_iommu_ops
From: Simon Xue <x...@rock-chips.com>
The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg()
that requires the callback iommu_ops .map_sg(). Adding the
default_iommu_map_sg() to Rockchip IOMMU accordingly.
Signed-off-by: Simon Xue
Signed-off-by: Shunqian Zheng
Reviewed-by: Douglas Anderson
Signed-off-by: Tomasz Figa
---
drivers/iommu/rockchip-iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 5a9659a..53fa0d9 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -1022,6 +1022,7 @@ static const struct iommu_ops rk_iommu_ops = {
.detach_dev = rk_iommu_detach_device,
.map = rk_iommu_map,
.unmap = rk_iommu_unmap,
+ .map_sg = default_iommu_map_sg,
.add_device = rk_iommu_add_device,
.remove_device = rk_iommu_remove_device,
.iova_to_phys = rk_iommu_iova_to_phys,
--
1.9.1
[PATCH v5 1/8] iommu/rockchip: Fix devm_{request,free}_irq parameter
From: Simon Xue <x...@rock-chips.com>
Even though the IOMMU shares IRQ with its master, the struct device
passed to {request,free}_irq is supposed to represent the device that is
signalling the interrupt. This patch makes the driver use IOMMU device
instead of master's device to make things clear.
Signed-off-by: Simon Xue
Signed-off-by: Shunqian Zheng
Reviewed-by: Douglas Anderson
Signed-off-by: Tomasz Figa
---
drivers/iommu/rockchip-iommu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 25b4627..5a9659a 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -807,7 +807,7 @@ static int rk_iommu_attach_device(struct iommu_domain
*domain,
iommu->domain = domain;
- ret = devm_request_irq(dev, iommu->irq, rk_iommu_irq,
+ ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
IRQF_SHARED, dev_name(dev), iommu);
if (ret)
return ret;
@@ -860,7 +860,7 @@ static void rk_iommu_detach_device(struct iommu_domain
*domain,
}
rk_iommu_disable_stall(iommu);
- devm_free_irq(dev, iommu->irq, iommu);
+ devm_free_irq(iommu->dev, iommu->irq, iommu);
iommu->domain = NULL;
--
1.9.1
iommu/rockchip: Fix bugs and enable on ARM64
This series intends mostly to enable support for ARM64 architecture
in the rockchip-iommu driver. On the way to do so, some bugs are also
fixed.
The most important changes here are:
- making the Rockchip IOMMU driver use DMA API for managing cache
coherency of page tables,
- making the Rockchip DRM driver not use DMA API on behalf of a virtual
device (behind a virtual IOMMU) to allocate and map buffers, but
instead proper DRM helpers and IOMMU API directly.
Changes since v4:
- Address some coding style comments on:
- https://chromium-review.googlesource.com/#/c/346328/38
- https://chromium-review.googlesource.com/#/c/353591/10
Changes since v3:
- Drop the idea of virtual IOMMU. Instead replace hacky allocation code
in DRM driver, with proper management of IOMMU domain.
- Add one more fix for allocation of IOMMU register base addresses.
Changes since v2:
- Instead of registering virtual IOMMU from DTS, create it when
attaching.
- Fix some bugs found in internal review.
Shunqian Zheng (4):
iommu/rockchip: Fix allocation of bases array in driver probe
iommu/rockchip: Use DMA API to manage coherency
iommu/rockchip: Prepare to support generic DMA mapping
drm/rockchip: Use common IOMMU API to attach devices
Simon Xue (3):
iommu/rockchip: Fix devm_{request,free}_irq parameter
iommu/rockchip: Add map_sg callback for rk_iommu_ops
iommu/rockchip: Enable Rockchip IOMMU on ARM64
Tomasz Figa (1):
drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 100 +++--
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 3 +
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 221 ++--
drivers/gpu/drm/rockchip/rockchip_drm_gem.h | 9 ++
drivers/iommu/Kconfig | 2 +-
drivers/iommu/rockchip-iommu.c | 181 +--
6 files changed, 413 insertions(+), 103 deletions(-)
--
1.9.1
[PATCH v3 6/6] iommu/rockchip: enable rockchip iommu on ARM64 platform
From: Simon Xue <x...@rock-chips.com> This patch makes it possible to compile the rockchip-iommu driver on ARM64 platform to be used with 64-bit SoCs equipped with this type of IOMMU. Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng Reviewed-by: Tomasz Figa --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index ad08603..5572621 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -218,7 +218,7 @@ config OMAP_IOMMU_DEBUG config ROCKCHIP_IOMMU bool "Rockchip IOMMU Support" - depends on ARM + depends on ARM || ARM64 depends on ARCH_ROCKCHIP || COMPILE_TEST select IOMMU_API select ARM_DMA_USE_IOMMU -- 1.9.1
[PATCH v3 5/6] iommu/rockchip: use DMA API to map, to flush cache
Use DMA API instead of architecture internal functions like
__cpuc_flush_dcache_area() etc.
To support the virtual device like DRM the virtual slave iommu
added in the previous patch, attaching to which the DRM can use
it own domain->dev for dma_map_*(), dma_sync_*() even VOP is disabled.
With this patch, this driver is available for ARM64 like RK3399.
Signed-off-by: Shunqian Zheng
---
drivers/iommu/rockchip-iommu.c | 113 +++--
1 file changed, 76 insertions(+), 37 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 82ecc99..b60b29e 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -4,8 +4,6 @@
* published by the Free Software Foundation.
*/
-#include
-#include
#include
#include
#include
@@ -78,7 +76,9 @@
struct rk_iommu_domain {
struct list_head iommus;
+ struct device *dev;
u32 *dt; /* page directory table */
+ dma_addr_t dt_dma;
spinlock_t iommus_lock; /* lock for iommus list */
spinlock_t dt_lock; /* lock for modifying page directory table */
@@ -102,14 +102,12 @@ static inline bool rk_iommu_is_virtual(struct rk_iommu
*iommu)
return iommu->num_mmu == 0;
}
-static inline void rk_table_flush(u32 *va, unsigned int count)
+static inline void rk_table_flush(struct device *dev, dma_addr_t dma,
+ unsigned int count)
{
- phys_addr_t pa_start = virt_to_phys(va);
- phys_addr_t pa_end = virt_to_phys(va + count);
- size_t size = pa_end - pa_start;
+ size_t size = count * 4; /* count of entry, 4 bytes per entry */
- __cpuc_flush_dcache_area(va, size);
- outer_flush_range(pa_start, pa_end);
+ dma_sync_single_for_device(dev, dma, size, DMA_TO_DEVICE);
}
static struct rk_iommu_domain *to_rk_domain(struct iommu_domain *dom)
@@ -192,10 +190,9 @@ static inline bool rk_dte_is_pt_valid(u32 dte)
return dte & RK_DTE_PT_VALID;
}
-static u32 rk_mk_dte(u32 *pt)
+static inline u32 rk_mk_dte(dma_addr_t pt_dma)
{
- phys_addr_t pt_phys = virt_to_phys(pt);
- return (pt_phys & RK_DTE_PT_ADDRESS_MASK) | RK_DTE_PT_VALID;
+ return (pt_dma & RK_DTE_PT_ADDRESS_MASK) | RK_DTE_PT_VALID;
}
/*
@@ -613,12 +610,14 @@ static u32 *rk_dte_get_page_table(struct rk_iommu_domain
*rk_domain,
dma_addr_t iova)
{
u32 *page_table, *dte_addr;
- u32 dte;
+ u32 dte_index, dte;
phys_addr_t pt_phys;
+ dma_addr_t pt_dma;
assert_spin_locked(_domain->dt_lock);
- dte_addr = _domain->dt[rk_iova_dte_index(iova)];
+ dte_index = rk_iova_dte_index(iova);
+ dte_addr = _domain->dt[dte_index];
dte = *dte_addr;
if (rk_dte_is_pt_valid(dte))
goto done;
@@ -627,19 +626,28 @@ static u32 *rk_dte_get_page_table(struct rk_iommu_domain
*rk_domain,
if (!page_table)
return ERR_PTR(-ENOMEM);
- dte = rk_mk_dte(page_table);
- *dte_addr = dte;
+ pt_dma = dma_map_single(rk_domain->dev, page_table,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(rk_domain->dev, pt_dma)) {
+ dev_err(rk_domain->dev,
+ "DMA mapping error while allocating page table\n");
+ free_page((unsigned long)page_table);
+ return ERR_PTR(-ENOMEM);
+ }
- rk_table_flush(page_table, NUM_PT_ENTRIES);
- rk_table_flush(dte_addr, 1);
+ dte = rk_mk_dte(pt_dma);
+ *dte_addr = dte;
+ rk_table_flush(rk_domain->dev, pt_dma, NUM_PT_ENTRIES);
+ rk_table_flush(rk_domain->dev, rk_domain->dt_dma + dte_index * 4, 1);
done:
pt_phys = rk_dte_pt_address(dte);
return (u32 *)phys_to_virt(pt_phys);
}
static size_t rk_iommu_unmap_iova(struct rk_iommu_domain *rk_domain,
- u32 *pte_addr, dma_addr_t iova, size_t size)
+ u32 *pte_addr, dma_addr_t pte_dma,
+ size_t size)
{
unsigned int pte_count;
unsigned int pte_total = size / SPAGE_SIZE;
@@ -654,14 +662,14 @@ static size_t rk_iommu_unmap_iova(struct rk_iommu_domain
*rk_domain,
pte_addr[pte_count] = rk_mk_pte_invalid(pte);
}
- rk_table_flush(pte_addr, pte_count);
+ rk_table_flush(rk_domain->dev, pte_dma, pte_count);
return pte_count * SPAGE_SIZE;
}
static int rk_iommu_map_iova(struct rk_iommu_domain *rk_domain, u32 *pte_addr,
-dma_addr_t iova, phys_addr_t paddr, size_t size,
-int prot)
+dma_addr_t pte_dma, dma_addr_t iova,
+phys_addr_t paddr, size_t size, int prot)
{
unsigned int pte_count;
unsigned int pte
[PATCH v3 4/6] drm: rockchip: use common iommu api to attach iommu
Rockchip DRM used the arm special API, arm_iommu_*(), to attach
iommu for ARM32 SoCs. This patch convert to common iommu API
so it would support ARM64 like RK3399.
The general idea is domain_alloc(), attach_device() and
arch_setup_dma_ops() to set dma_ops manually for DRM at the last.
Signed-off-by: Shunqian Zheng
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 112 +---
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
2 files changed, 71 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index f5a68fc..b52c38d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -14,16 +14,16 @@
* GNU General Public License for more details.
*/
-#include
-
#include
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include "rockchip_drm_drv.h"
#include "rockchip_drm_fb.h"
@@ -46,7 +46,8 @@ static bool is_support_iommu = true;
int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
struct device *dev)
{
- struct dma_iommu_mapping *mapping = drm_dev->dev->archdata.mapping;
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct iommu_domain *domain = private->domain;
int ret;
if (!is_support_iommu)
@@ -58,16 +59,25 @@ int rockchip_drm_dma_attach_device(struct drm_device
*drm_dev,
dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
- return arm_iommu_attach_device(dev, mapping);
+ ret = iommu_attach_device(domain, dev);
+ if (ret) {
+ dev_err(dev, "Failed to attach iommu device\n");
+ return ret;
+ }
+
+ /* TODO(djkurtz): fetch the mapping start/size from somewhere */
+ arch_setup_dma_ops(dev, 0x, SZ_2G, dev->bus->iommu_ops, false);
+ return 0;
}
void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
struct device *dev)
{
- if (!is_support_iommu)
- return;
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct iommu_domain *domain = private->domain;
- arm_iommu_detach_device(dev);
+ if (is_support_iommu)
+ iommu_detach_device(domain, dev);
}
int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
@@ -132,10 +142,52 @@ static void rockchip_drm_crtc_disable_vblank(struct
drm_device *dev,
priv->crtc_funcs[pipe]->disable_vblank(crtc);
}
+static int rockchip_drm_init_iommu(struct drm_device *drm_dev)
+{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct device *dev = drm_dev->dev;
+ int ret;
+
+ dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
+ GFP_KERNEL);
+ if (!dev->dma_parms)
+ return -ENOMEM;
+
+ private->domain = iommu_domain_alloc(_bus_type);
+ if (!private->domain)
+ return -ENOMEM;
+
+ /* TODO(djkurtz): fetch the mapping start/size from somewhere */
+ ret = iommu_dma_init_domain(private->domain, 0x, SZ_2G);
+ if (ret) {
+ dev_err(dev, "Failed to init domain\n");
+ goto err_free_domain;
+ }
+
+ ret = rockchip_drm_dma_attach_device(drm_dev, dev);
+ if (ret) {
+ dev_err(dev, "Failed to attach device\n");
+ goto err_free_domain;
+ }
+
+ return 0;
+
+err_free_domain:
+ iommu_domain_free(private->domain);
+
+ return ret;
+}
+
+static void rockchip_iommu_cleanup(struct drm_device *drm_dev)
+{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+
+ iommu_domain_free(private->domain);
+}
+
static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags)
{
struct rockchip_drm_private *private;
- struct dma_iommu_mapping *mapping = NULL;
struct device *dev = drm_dev->dev;
struct drm_connector *connector;
int ret;
@@ -153,38 +205,18 @@ static int rockchip_drm_load(struct drm_device *drm_dev,
unsigned long flags)
rockchip_drm_mode_config_init(drm_dev);
- dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
- GFP_KERNEL);
- if (!dev->dma_parms) {
- ret = -ENOMEM;
- goto err_config_cleanup;
- }
-
if (is_support_iommu) {
- /* TODO(djkurtz): fetch the mapping start/size from somewhere */
- mapping = arm_iommu_create_mapping(_bus_type,
- 0x,
- SZ_2G);
-
[PATCH v3 3/6] iommu/rockchip: support virtual iommu slave device
An virtual master device like DRM need to attach to iommu
domain to share the mapping with VOPs(the one with actual
iommu slaves).
DRM attaches to iommu and allocates buffers before VOPs enabled,
which means there may have not real iommu devices can be used
to do dma mapping.
This patch creates a iommu when virtual master(group is NULL)
attaching, so it can use this iommu even the real iommus disabled.
Changes of V3:
- Instead of registering virtual iommu in DTS, this patch
creates a iommu when attaching.
Signed-off-by: Shunqian Zheng
Suggested-by: Tomasz Figa
---
drivers/iommu/rockchip-iommu.c | 133 +
1 file changed, 122 insertions(+), 11 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 3c16ec3..82ecc99 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -93,6 +94,14 @@ struct rk_iommu {
struct iommu_domain *domain; /* domain to which iommu is attached */
};
+/* A virtual iommu registered without resource or
+ * interrupts when DRM attaching.
+ */
+static inline bool rk_iommu_is_virtual(struct rk_iommu *iommu)
+{
+ return iommu->num_mmu == 0;
+}
+
static inline void rk_table_flush(u32 *va, unsigned int count)
{
phys_addr_t pa_start = virt_to_phys(va);
@@ -780,6 +789,85 @@ static struct rk_iommu *rk_iommu_from_dev(struct device
*dev)
return rk_iommu;
}
+static struct rk_iommu *rk_iommu_add_virtual_iommu(struct device *dev,
+ struct rk_iommu_domain *rk_domain)
+{
+ struct rk_iommu *iommu;
+ struct iommu_group *group;
+ struct platform_device *pdev;
+ struct device *iommu_dev;
+ int ret;
+
+ pdev = platform_device_register_simple("rk_iommu", PLATFORM_DEVID_AUTO,
+ NULL, 0);
+ if (IS_ERR(pdev)) {
+ dev_err(dev, "Failed to register simple rk_iommu device\n");
+ return NULL;
+ }
+
+ iommu_dev = >dev;
+ iommu_dev->dma_parms = devm_kzalloc(iommu_dev,
+ sizeof(*iommu_dev->dma_parms), GFP_KERNEL);
+ if (!iommu_dev->dma_parms)
+ goto err_unreg_pdev;
+
+ /* Set dma_ops for virtual iommu, otherwise it would be dummy_dma_ops */
+ arch_setup_dma_ops(iommu_dev, 0, DMA_BIT_MASK(32), NULL, false);
+
+ dma_set_max_seg_size(iommu_dev, DMA_BIT_MASK(32));
+ dma_coerce_mask_and_coherent(iommu_dev, DMA_BIT_MASK(32));
+
+ iommu = devm_kzalloc(iommu_dev, sizeof(*iommu), GFP_KERNEL);
+ if (!iommu)
+ goto err_unreg_pdev;
+
+ iommu->dev = iommu_dev;
+ iommu->num_mmu = 0;
+ platform_set_drvdata(pdev, iommu);
+
+ group = iommu_group_alloc();
+ if (IS_ERR(group)) {
+ dev_err(iommu_dev, "Failed to allocate IOMMU group\n");
+ goto err_unreg_pdev;
+ }
+
+ ret = iommu_group_add_device(group, dev);
+ if (ret) {
+ dev_err(iommu_dev, "Failed to add device to group\n");
+ goto err_put_group;
+ }
+
+ iommu_group_set_iommudata(group, iommu_dev, NULL);
+
+ ret = iommu_attach_group(_domain->domain, group);
+ if (ret) {
+ dev_err(iommu_dev, "Failed to attach group\n");
+ goto err_remove_device;
+ }
+
+ iommu_group_put(group);
+
+ return iommu;
+
+err_remove_device:
+ iommu_group_remove_device(dev);
+err_put_group:
+ iommu_group_put(group);
+err_unreg_pdev:
+ platform_device_unregister(pdev);
+
+ return NULL;
+}
+
+static void rk_iommu_remove_virtual_iommu(struct device *dev)
+{
+ struct rk_iommu *iommu = rk_iommu_from_dev(dev);
+ struct platform_device *pdev = to_platform_device(iommu->dev);
+
+ iommu_group_remove_device(dev);
+ platform_device_unregister(pdev);
+}
+
static int rk_iommu_attach_device(struct iommu_domain *domain,
struct device *dev)
{
@@ -789,13 +877,20 @@ static int rk_iommu_attach_device(struct iommu_domain
*domain,
int ret, i;
phys_addr_t dte_addr;
- /*
-* Allow 'virtual devices' (e.g., drm) to attach to domain.
-* Such a device does not belong to an iommu group.
-*/
iommu = rk_iommu_from_dev(dev);
- if (!iommu)
+
+ /* Register iommu for virtual master(like DRM) */
+ if (!iommu) {
+ iommu = rk_iommu_add_virtual_iommu(dev, rk_domain);
+ if (!iommu)
+ return -ENOMEM;
+ }
+
+ iommu->domain = domain;
+ if (rk_iommu_is_virtual(iommu)) {
+ dev_dbg(dev, "Attach virtual device to iommu domain\n");
return 0
[PATCH v3 2/6] iommu/rockchip: add map_sg callback for rk_iommu_ops
From: Simon Xue <x...@rock-chips.com>
The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg()
that requires the callback iommu_ops .map_sg(). Adding the
default_iommu_map_sg() to rockchip iommu accordingly.
Signed-off-by: Simon Xue
Signed-off-by: Shunqian Zheng
Reviewed-by: Tomasz Figa
---
drivers/iommu/rockchip-iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index ec0ce62..3c16ec3 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -1022,6 +1022,7 @@ static const struct iommu_ops rk_iommu_ops = {
.detach_dev = rk_iommu_detach_device,
.map = rk_iommu_map,
.unmap = rk_iommu_unmap,
+ .map_sg = default_iommu_map_sg,
.add_device = rk_iommu_add_device,
.remove_device = rk_iommu_remove_device,
.iova_to_phys = rk_iommu_iova_to_phys,
--
1.9.1
[PATCH v3 1/6] iommu/rockchip: fix devm_{request,free}_irq parameter
From: Simon Xue <x...@rock-chips.com>
Even though the iommu shares irq with its master, using the *dev of iommu
instead of master's *dev for devm_{request,free}_irq makes things clear.
Signed-off-by: Simon Xue
Signed-off-by: Shunqian Zheng
Reviewed-by: Tomasz Figa
---
drivers/iommu/rockchip-iommu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index c7d6156..ec0ce62 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -807,7 +807,7 @@ static int rk_iommu_attach_device(struct iommu_domain
*domain,
iommu->domain = domain;
- ret = devm_request_irq(dev, iommu->irq, rk_iommu_irq,
+ ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
IRQF_SHARED, dev_name(dev), iommu);
if (ret)
return ret;
@@ -860,7 +860,7 @@ static void rk_iommu_detach_device(struct iommu_domain
*domain,
}
rk_iommu_disable_stall(iommu);
- devm_free_irq(dev, iommu->irq, iommu);
+ devm_free_irq(iommu->dev, iommu->irq, iommu);
iommu->domain = NULL;
--
1.9.1
[PATCH v3 0/6] fix bugs; enable iommu for ARM64
This series patches mainly for ARM64 supporting.
To do this, it first add virtual iommu slave device which DRM can attach to,
convert DRM driver to use common iommu API instead of the ARM32
functions, and then use DMA API in iommu driver to map, to flush cache.
Mainly changes of V3:
- Instead of registering virtual iommu in DTS, V3
creates a iommu when attaching.
- Fix some bugs according to Tomasz's comments,
most of them are offline, locally.
Shunqian Zheng (3):
iommu/rockchip: support virtual iommu slave device
drm: rockchip: use common iommu api to attach iommu
iommu/rockchip: use DMA API to map, to flush cache
Simon Xue (3):
iommu/rockchip: fix devm_{request,free}_irq parameter
iommu/rockchip: add map_sg callback for rk_iommu_ops
iommu/rockchip: enable rockchip iommu on ARM64 platform
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 112 -
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
drivers/iommu/Kconfig | 2 +-
drivers/iommu/rockchip-iommu.c | 251 ++--
4 files changed, 273 insertions(+), 93 deletions(-)
--
1.9.1
[PATCH v2 6/7] iommu/rockchip: use DMA API to map, to flush cache
HI, On 2016å¹´06æ13æ¥ 18:21, Tomasz Figa wrote: > On Mon, Jun 13, 2016 at 6:56 PM, Shunqian Zheng > wrote: >> Hi >> >> On 2016å¹´06æ10æ¥ 17:10, Tomasz Figa wrote: >>> Hi, >>> >>> On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng >>> wrote: >>>> Use DMA API instead of architecture internal functions like >>>> __cpuc_flush_dcache_area() etc. >>>> >>>> To support the virtual device like DRM the virtual slave iommu >>>> added in the previous patch, attaching to which the DRM can use >>>> it own domain->dev for dma_map_*(), dma_sync_*() even VOP is disabled. >>>> >>>> With this patch, this driver is available for ARM64 like RK3399. >>>> >>> Could we instead simply allocate coherent memory for page tables using >>> dma_alloc_coherent() and skip any flushing on CPU side completely? If >>> I'm looking correctly, the driver only reads back the page directory >>> when checking if there is a need to allocate new page table, so there >>> shouldn't be any significant penalty for disabling the cache. >> I try to use dma_alloc_coherent() to replace the dma_map_single(), >> but it doesn't work for me properly. >> Because the DRM uses the iommu_dma_ops instead the swiotlb_dma_ops after >> attaching >> to iommu, so when the iommu domain need to alloc a new page in >> rk_iommu_map(), >> it would call: >> rk_iommu_map() --> dma_alloc_coherent() --> ops->alloc() --> iommu_map() >> --> rk_iommu_map() > It shouldn't call iommu_map(), because the IOMMU is not behind another > IOMMU. Are you sure you called dma_alloc_coherent() on behalf of the > IOMMU struct device and not the DRM device? I called dma_alloc_coherent() with DRM device but not the IOMMU device, because DRM didn't attach to any iommu. Even allocating an virtual one when attaching, the iommu->dev is DRM device though. Am I right here? Thank you very much, Shunqian > > Best regards, > Tomasz
[PATCH v2 6/7] iommu/rockchip: use DMA API to map, to flush cache
Hi
On 2016å¹´06æ10æ¥ 17:10, Tomasz Figa wrote:
> Hi,
>
> On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
> wrote:
>> Use DMA API instead of architecture internal functions like
>> __cpuc_flush_dcache_area() etc.
>>
>> To support the virtual device like DRM the virtual slave iommu
>> added in the previous patch, attaching to which the DRM can use
>> it own domain->dev for dma_map_*(), dma_sync_*() even VOP is disabled.
>>
>> With this patch, this driver is available for ARM64 like RK3399.
>>
> Could we instead simply allocate coherent memory for page tables using
> dma_alloc_coherent() and skip any flushing on CPU side completely? If
> I'm looking correctly, the driver only reads back the page directory
> when checking if there is a need to allocate new page table, so there
> shouldn't be any significant penalty for disabling the cache.
I try to use dma_alloc_coherent() to replace the dma_map_single(),
but it doesn't work for me properly.
Because the DRM uses the iommu_dma_ops instead the swiotlb_dma_ops after
attaching
to iommu, so when the iommu domain need to alloc a new page in
rk_iommu_map(),
it would call:
rk_iommu_map() --> dma_alloc_coherent() --> ops->alloc() -->
iommu_map() --> rk_iommu_map()
Then I try to reserve memory for coherent so that, dma_alloc_coherent()
calls dma_alloc_from_coherent()
but not ops->alloc(). But it doesn't work too because when DRM request
buffer it never uses iommu.
>
> Other than that, please see some comments inline.
>
>> Signed-off-by: Shunqian Zheng
>> ---
>> drivers/iommu/rockchip-iommu.c | 113
>> ++---
>> 1 file changed, 71 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
>> index d6c3051..aafea6e 100644
>> --- a/drivers/iommu/rockchip-iommu.c
>> +++ b/drivers/iommu/rockchip-iommu.c
>> @@ -4,8 +4,6 @@
>>* published by the Free Software Foundation.
>>*/
>>
>> -#include
>> -#include
>> #include
>> #include
>> #include
>> @@ -61,8 +59,7 @@
>> #define RK_MMU_IRQ_BUS_ERROR 0x02 /* bus read error */
>> #define RK_MMU_IRQ_MASK (RK_MMU_IRQ_PAGE_FAULT |
>> RK_MMU_IRQ_BUS_ERROR)
>>
>> -#define NUM_DT_ENTRIES 1024
>> -#define NUM_PT_ENTRIES 1024
>> +#define NUM_TLB_ENTRIES 1024 /* for both DT and PT */
> Is it necessary to change this in this patch? In general, it's not a
> good idea to mix multiple logical changes together.
Sure, will restore changes in v3.
>
>> #define SPAGE_ORDER 12
>> #define SPAGE_SIZE (1 << SPAGE_ORDER)
>> @@ -82,7 +79,9 @@
>>
>> struct rk_iommu_domain {
>> struct list_head iommus;
>> + struct device *dev;
>> u32 *dt; /* page directory table */
>> + dma_addr_t dt_dma;
>> spinlock_t iommus_lock; /* lock for iommus list */
>> spinlock_t dt_lock; /* lock for modifying page directory table */
>>
>> @@ -98,14 +97,12 @@ struct rk_iommu {
>> struct iommu_domain *domain; /* domain to which iommu is attached */
>> };
>>
>> -static inline void rk_table_flush(u32 *va, unsigned int count)
>> +static inline void rk_table_flush(struct device *dev, dma_addr_t dma,
>> + unsigned int count)
>> {
>> - phys_addr_t pa_start = virt_to_phys(va);
>> - phys_addr_t pa_end = virt_to_phys(va + count);
>> - size_t size = pa_end - pa_start;
>> + size_t size = count * 4;
> It would be a good idea to specify what "count" is. I'm a bit confused
> that before it meant bytes and now some multiple of 4?
"count" means PT/DT entry count to flush here. I would add some more
comment on it.
Thank you very much,
Shunqian
>
> Best regards,
> Tomasz
>
> ___
> Linux-rockchip mailing list
> Linux-rockchip at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
[PATCH v2 5/7] drm: rockchip: use common iommu api to attach iommu
Hi,
On 2016å¹´06æ10æ¥ 16:03, Tomasz Figa wrote:
> Hi,
>
> On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng
> wrote:
>> Rockchip DRM used the arm special API, arm_iommu_*(), to attach
>> iommu for ARM32 SoCs. This patch convert to common iommu API
>> so it would support ARM64 like RK3399.
>>
>> The general idea is domain_alloc(), attach_device() and
>> arch_setup_dma_ops() to set dma_ops manually for DRM at the last.
>>
>> Signed-off-by: Shunqian Zheng
>> ---
>> drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 130
>> +++-
>> drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
>> 2 files changed, 89 insertions(+), 42 deletions(-)
>>
> Please see my comments inline.
>
>> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
>> b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
>> index f5a68fc..7965a66 100644
>> --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
>> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
>> @@ -14,8 +14,6 @@
>>* GNU General Public License for more details.
>>*/
>>
>> -#include
>> -
>> #include
>> #include
>> #include
>> @@ -24,6 +22,8 @@
>> #include
>> #include
>> #include
>> +#include
>> +#include
>>
>> #include "rockchip_drm_drv.h"
>> #include "rockchip_drm_fb.h"
>> @@ -46,7 +46,8 @@ static bool is_support_iommu = true;
>> int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
>> struct device *dev)
>> {
>> - struct dma_iommu_mapping *mapping = drm_dev->dev->archdata.mapping;
>> + struct rockchip_drm_private *private = drm_dev->dev_private;
>> + struct iommu_domain *domain = private->domain;
>> int ret;
>>
>> if (!is_support_iommu)
>> @@ -58,16 +59,25 @@ int rockchip_drm_dma_attach_device(struct drm_device
>> *drm_dev,
>>
>> dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
>>
>> - return arm_iommu_attach_device(dev, mapping);
>> + ret = iommu_attach_device(domain, dev);
>> +
> nit: Unnecessary blank line.
Will fix it in v3.
>
>> + if (ret) {
>> + dev_err(dev, "Failed to attach iommu device\n");
>> + return ret;
>> + }
> nit: On the other hand, a blank line here would improve readability.
Will fix it in v3.
>
>> + arch_setup_dma_ops(dev, 0x, SZ_2G,
>> + (struct iommu_ops *)dev->bus->iommu_ops, false);
> This is casting a const pointer to a non-const pointer. which isn't
> really a good idea. I can see that arch_setup_dma_ops() requires a
> writable pointer, though. Looking at the implementations of
> arch_setup_dma_ops() around the platforms (namely arm and arm64...),
> it makes me wonder if the prototype shouldn't be changed to const
> instead.
Actually, kernel-next changed iommu_ops to const by:
53c92d7 iommu: of: enforce const-ness of struct iommu_ops
Will remove casting in the v3.
>
>> + return 0;
>> }
>>
>> void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
>> struct device *dev)
>> {
>> - if (!is_support_iommu)
>> - return;
>> + struct rockchip_drm_private *private = drm_dev->dev_private;
>> + struct iommu_domain *domain = private->domain;
>>
>> - arm_iommu_detach_device(dev);
>> + if (is_support_iommu)
>> + iommu_detach_device(domain, dev);
>> }
>>
>> int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
>> @@ -132,10 +142,70 @@ static void rockchip_drm_crtc_disable_vblank(struct
>> drm_device *dev,
>> priv->crtc_funcs[pipe]->disable_vblank(crtc);
>> }
>>
>> +static int rockchip_drm_init_iommu(struct drm_device *drm_dev)
>> +{
>> + struct rockchip_drm_private *private = drm_dev->dev_private;
>> + struct device *dev = drm_dev->dev;
>> + int ret;
>> +
>> + dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
>> + GFP_KERNEL);
>> + if (!dev->dma_parms) {
>> + ret = -ENOMEM;
>> + return ret;
> nit: return -ENOMEM;
Will fix it in v3.
>
>> + }
>> +
>> + ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
>> + if (ret) {
>> + dev_err(dev, "Failed to set coherent mask\n");
>> + return ret;
>> + }
>> +
>> + dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
>> +
>> + private->domain = iommu_domain_alloc(_bus_type);
>> + if (!private->domain)
>> + return -ENOMEM;
>> +
>> + ret = iommu_get_dma_cookie(private->domain);
>> + if (ret) {
>> + dev_err(dev, "Failed to get dma cookie\n");
>> + goto err_free_domain;
>> + }
>> +
>> + ret = iommu_dma_init_domain(private->domain, 0x, SZ_2G);
> I guess djkurtz's TODO comment could be preserved here.
Agree.
Thank you very much.
Shunqian
>
> Best regards,
> Tomasz
>
>
>
[PATCH v2 7/7] iommu/rockchip: enable rockchip iommu on ARM64 platform
From: Simon Xue <x...@rock-chips.com> Signed-off-by: Simon Xue Signed-off-by: Shunqian Zheng --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index ad08603..5572621 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -218,7 +218,7 @@ config OMAP_IOMMU_DEBUG config ROCKCHIP_IOMMU bool "Rockchip IOMMU Support" - depends on ARM + depends on ARM || ARM64 depends on ARCH_ROCKCHIP || COMPILE_TEST select IOMMU_API select ARM_DMA_USE_IOMMU -- 1.9.1
[PATCH v2 6/7] iommu/rockchip: use DMA API to map, to flush cache
Use DMA API instead of architecture internal functions like
__cpuc_flush_dcache_area() etc.
To support the virtual device like DRM the virtual slave iommu
added in the previous patch, attaching to which the DRM can use
it own domain->dev for dma_map_*(), dma_sync_*() even VOP is disabled.
With this patch, this driver is available for ARM64 like RK3399.
Signed-off-by: Shunqian Zheng
---
drivers/iommu/rockchip-iommu.c | 113 ++---
1 file changed, 71 insertions(+), 42 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index d6c3051..aafea6e 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -4,8 +4,6 @@
* published by the Free Software Foundation.
*/
-#include
-#include
#include
#include
#include
@@ -61,8 +59,7 @@
#define RK_MMU_IRQ_BUS_ERROR 0x02 /* bus read error */
#define RK_MMU_IRQ_MASK (RK_MMU_IRQ_PAGE_FAULT | RK_MMU_IRQ_BUS_ERROR)
-#define NUM_DT_ENTRIES 1024
-#define NUM_PT_ENTRIES 1024
+#define NUM_TLB_ENTRIES 1024 /* for both DT and PT */
#define SPAGE_ORDER 12
#define SPAGE_SIZE (1 << SPAGE_ORDER)
@@ -82,7 +79,9 @@
struct rk_iommu_domain {
struct list_head iommus;
+ struct device *dev;
u32 *dt; /* page directory table */
+ dma_addr_t dt_dma;
spinlock_t iommus_lock; /* lock for iommus list */
spinlock_t dt_lock; /* lock for modifying page directory table */
@@ -98,14 +97,12 @@ struct rk_iommu {
struct iommu_domain *domain; /* domain to which iommu is attached */
};
-static inline void rk_table_flush(u32 *va, unsigned int count)
+static inline void rk_table_flush(struct device *dev, dma_addr_t dma,
+ unsigned int count)
{
- phys_addr_t pa_start = virt_to_phys(va);
- phys_addr_t pa_end = virt_to_phys(va + count);
- size_t size = pa_end - pa_start;
+ size_t size = count * 4;
- __cpuc_flush_dcache_area(va, size);
- outer_flush_range(pa_start, pa_end);
+ dma_sync_single_range_for_device(dev, dma, 0, size, DMA_TO_DEVICE);
}
static struct rk_iommu_domain *to_rk_domain(struct iommu_domain *dom)
@@ -188,10 +185,9 @@ static inline bool rk_dte_is_pt_valid(u32 dte)
return dte & RK_DTE_PT_VALID;
}
-static u32 rk_mk_dte(u32 *pt)
+static inline u32 rk_mk_dte(dma_addr_t pt_dma)
{
- phys_addr_t pt_phys = virt_to_phys(pt);
- return (pt_phys & RK_DTE_PT_ADDRESS_MASK) | RK_DTE_PT_VALID;
+ return (pt_dma & RK_DTE_PT_ADDRESS_MASK) | RK_DTE_PT_VALID;
}
/*
@@ -609,12 +605,14 @@ static u32 *rk_dte_get_page_table(struct rk_iommu_domain
*rk_domain,
dma_addr_t iova)
{
u32 *page_table, *dte_addr;
+ u32 dte_index = rk_iova_dte_index(iova);
u32 dte;
phys_addr_t pt_phys;
+ dma_addr_t pt_dma;
assert_spin_locked(_domain->dt_lock);
- dte_addr = _domain->dt[rk_iova_dte_index(iova)];
+ dte_addr = _domain->dt[dte_index];
dte = *dte_addr;
if (rk_dte_is_pt_valid(dte))
goto done;
@@ -623,19 +621,27 @@ static u32 *rk_dte_get_page_table(struct rk_iommu_domain
*rk_domain,
if (!page_table)
return ERR_PTR(-ENOMEM);
- dte = rk_mk_dte(page_table);
- *dte_addr = dte;
+ pt_dma = dma_map_single(rk_domain->dev, page_table,
+ SPAGE_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(rk_domain->dev, pt_dma)) {
+ dev_err(rk_domain->dev, "dma mapping error\n");
+ free_page((unsigned long)page_table);
+ return ERR_PTR(-ENOMEM);
+ }
- rk_table_flush(page_table, NUM_PT_ENTRIES);
- rk_table_flush(dte_addr, 1);
+ dte = rk_mk_dte(pt_dma);
+ *dte_addr = dte;
+ rk_table_flush(rk_domain->dev, pt_dma, NUM_TLB_ENTRIES);
+ rk_table_flush(rk_domain->dev, rk_domain->dt_dma + dte_index * 4, 1);
done:
pt_phys = rk_dte_pt_address(dte);
return (u32 *)phys_to_virt(pt_phys);
}
static size_t rk_iommu_unmap_iova(struct rk_iommu_domain *rk_domain,
- u32 *pte_addr, dma_addr_t iova, size_t size)
+ u32 *pte_addr, dma_addr_t pte_dma,
+ size_t size)
{
unsigned int pte_count;
unsigned int pte_total = size / SPAGE_SIZE;
@@ -650,14 +656,14 @@ static size_t rk_iommu_unmap_iova(struct rk_iommu_domain
*rk_domain,
pte_addr[pte_count] = rk_mk_pte_invalid(pte);
}
- rk_table_flush(pte_addr, pte_count);
+ rk_table_flush(rk_domain->dev, pte_dma, pte_count);
return pte_count * SPAGE_SIZE;
}
static int rk_iommu_map_iova(struct rk_iommu_domain *rk_domain, u32 *pte_addr,
-dma_addr_t iova, phys_addr_t paddr, size_t size,
-
[PATCH v2 5/7] drm: rockchip: use common iommu api to attach iommu
Rockchip DRM used the arm special API, arm_iommu_*(), to attach
iommu for ARM32 SoCs. This patch convert to common iommu API
so it would support ARM64 like RK3399.
The general idea is domain_alloc(), attach_device() and
arch_setup_dma_ops() to set dma_ops manually for DRM at the last.
Signed-off-by: Shunqian Zheng
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 130 +++-
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
2 files changed, 89 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index f5a68fc..7965a66 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -14,8 +14,6 @@
* GNU General Public License for more details.
*/
-#include
-
#include
#include
#include
@@ -24,6 +22,8 @@
#include
#include
#include
+#include
+#include
#include "rockchip_drm_drv.h"
#include "rockchip_drm_fb.h"
@@ -46,7 +46,8 @@ static bool is_support_iommu = true;
int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
struct device *dev)
{
- struct dma_iommu_mapping *mapping = drm_dev->dev->archdata.mapping;
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct iommu_domain *domain = private->domain;
int ret;
if (!is_support_iommu)
@@ -58,16 +59,25 @@ int rockchip_drm_dma_attach_device(struct drm_device
*drm_dev,
dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
- return arm_iommu_attach_device(dev, mapping);
+ ret = iommu_attach_device(domain, dev);
+
+ if (ret) {
+ dev_err(dev, "Failed to attach iommu device\n");
+ return ret;
+ }
+ arch_setup_dma_ops(dev, 0x, SZ_2G,
+ (struct iommu_ops *)dev->bus->iommu_ops, false);
+ return 0;
}
void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
struct device *dev)
{
- if (!is_support_iommu)
- return;
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct iommu_domain *domain = private->domain;
- arm_iommu_detach_device(dev);
+ if (is_support_iommu)
+ iommu_detach_device(domain, dev);
}
int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
@@ -132,10 +142,70 @@ static void rockchip_drm_crtc_disable_vblank(struct
drm_device *dev,
priv->crtc_funcs[pipe]->disable_vblank(crtc);
}
+static int rockchip_drm_init_iommu(struct drm_device *drm_dev)
+{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+ struct device *dev = drm_dev->dev;
+ int ret;
+
+ dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
+ GFP_KERNEL);
+ if (!dev->dma_parms) {
+ ret = -ENOMEM;
+ return ret;
+ }
+
+ ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
+ if (ret) {
+ dev_err(dev, "Failed to set coherent mask\n");
+ return ret;
+ }
+
+ dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
+
+ private->domain = iommu_domain_alloc(_bus_type);
+ if (!private->domain)
+ return -ENOMEM;
+
+ ret = iommu_get_dma_cookie(private->domain);
+ if (ret) {
+ dev_err(dev, "Failed to get dma cookie\n");
+ goto err_free_domain;
+ }
+
+ ret = iommu_dma_init_domain(private->domain, 0x, SZ_2G);
+ if (ret) {
+ dev_err(dev, "Failed to init domain\n");
+ goto err_put_cookie;
+ }
+
+ ret = rockchip_drm_dma_attach_device(drm_dev, dev);
+ if (ret) {
+ dev_err(dev, "Failed to attach device\n");
+ goto err_put_cookie;
+ }
+
+ return 0;
+
+err_put_cookie:
+ iommu_put_dma_cookie(private->domain);
+err_free_domain:
+ iommu_domain_free(private->domain);
+
+ return ret;
+}
+
+static void rockchip_iommu_cleanup(struct drm_device *drm_dev)
+{
+ struct rockchip_drm_private *private = drm_dev->dev_private;
+
+ iommu_put_dma_cookie(private->domain);
+ iommu_domain_free(private->domain);
+}
+
static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags)
{
struct rockchip_drm_private *private;
- struct dma_iommu_mapping *mapping = NULL;
struct device *dev = drm_dev->dev;
struct drm_connector *connector;
int ret;
@@ -153,38 +223,18 @@ static int rockchip_drm_load(struct drm_device *drm_dev,
unsigned long flags)
rockchip_drm_mode_config_init(drm_dev);
- dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
-
[PATCH v2 4/7] ARM: dts: rockchip: add virtual iommu for display
An virtual iommu without reg or interrupts for display.
Adding this according to iommu driver changes.
Signed-off-by: Shunqian Zheng
---
arch/arm/boot/dts/rk3288.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 7fa932f..4cd535f 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -219,9 +219,15 @@
clock-names = "timer", "pclk";
};
+ display_mmu: virtual-iommu {
+ compatible = "rockchip,iommu";
+ #iommu-cells = <0>;
+ };
+
display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <_out>, <_out>;
+ iommus = <_mmu>;
};
sdmmc: dwmmc at ff0c {
--
1.9.1
[PATCH v2 3/7] iommu/rockchip: support virtual iommu slave device
An virtual master device like DRM need to attach to iommu
domain to share the domain with VOP(the one with actual
iommu slave). We currently check the group is NULL to indicate
a virtual master, which is not true since we decide to use
the common iommu api to attach device in DRM.
With this patch, we can probe a virtual iommu device and
allow the DRM attaching to it. The virtual iommu is needed also
because we want convert to use DMA API for map/unmap, cache flush,
so that DRM buffer alloc still work even VOP is disabled.
Signed-off-by: Shunqian Zheng
---
drivers/iommu/rockchip-iommu.c | 37 +
1 file changed, 25 insertions(+), 12 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 3c16ec3..d6c3051 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -75,6 +75,11 @@
#define IOMMU_REG_POLL_COUNT_FAST 1000
+/* A virtual iommu in device-tree registered without reg or
+ * interrupts, so the num_mmu is zero.
+ */
+#define RK_IOMMU_IS_VIRTUAL(iommu) (iommu->num_mmu == 0)
+
struct rk_iommu_domain {
struct list_head iommus;
u32 *dt; /* page directory table */
@@ -789,13 +794,13 @@ static int rk_iommu_attach_device(struct iommu_domain
*domain,
int ret, i;
phys_addr_t dte_addr;
- /*
-* Allow 'virtual devices' (e.g., drm) to attach to domain.
-* Such a device does not belong to an iommu group.
-*/
iommu = rk_iommu_from_dev(dev);
- if (!iommu)
+
+ iommu->domain = domain;
+ if (RK_IOMMU_IS_VIRTUAL(iommu)) {
+ dev_dbg(dev, "Attach virtual device to iommu domain\n");
return 0;
+ }
ret = rk_iommu_enable_stall(iommu);
if (ret)
@@ -805,7 +810,6 @@ static int rk_iommu_attach_device(struct iommu_domain
*domain,
if (ret)
return ret;
- iommu->domain = domain;
ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
IRQF_SHARED, dev_name(dev), iommu);
@@ -842,10 +846,13 @@ static void rk_iommu_detach_device(struct iommu_domain
*domain,
unsigned long flags;
int i;
- /* Allow 'virtual devices' (eg drm) to detach from domain */
iommu = rk_iommu_from_dev(dev);
- if (!iommu)
+
+ iommu->domain = NULL;
+ if (RK_IOMMU_IS_VIRTUAL(iommu)) {
+ dev_dbg(dev, "Master with virtual iommu detached from
domain\n");
return;
+ }
spin_lock_irqsave(_domain->iommus_lock, flags);
list_del_init(>node);
@@ -862,8 +869,6 @@ static void rk_iommu_detach_device(struct iommu_domain
*domain,
devm_free_irq(iommu->dev, iommu->irq, iommu);
- iommu->domain = NULL;
-
dev_dbg(dev, "Detached from iommu domain\n");
}
@@ -1034,6 +1039,7 @@ static int rk_iommu_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct rk_iommu *iommu;
struct resource *res;
+ int num_res = pdev->num_resources;
int i;
iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL);
@@ -1043,12 +1049,19 @@ static int rk_iommu_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, iommu);
iommu->dev = dev;
iommu->num_mmu = 0;
- iommu->bases = devm_kzalloc(dev, sizeof(*iommu->bases) * iommu->num_mmu,
+
+ if (!num_res) {
+ iommu->bases = NULL;
+ dev_info(dev, "this is a virtual iommu\n");
+ return 0;
+ }
+
+ iommu->bases = devm_kzalloc(dev, sizeof(*iommu->bases) * num_res,
GFP_KERNEL);
if (!iommu->bases)
return -ENOMEM;
- for (i = 0; i < pdev->num_resources; i++) {
+ for (i = 0; i < num_res; i++) {
res = platform_get_resource(pdev, IORESOURCE_MEM, i);
if (!res)
continue;
--
1.9.1
[PATCH v2 2/7] iommu/rockchip: add map_sg callback for rk_iommu_ops
From: Simon Xue <x...@rock-chips.com>
The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg()
that requires the callback iommu_ops .map_sg(). Adding the
default_iommu_map_sg() to rockchip iommu accordingly.
Signed-off-by: Simon Xue
Signed-off-by: Shunqian Zheng
---
drivers/iommu/rockchip-iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index ec0ce62..3c16ec3 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -1022,6 +1022,7 @@ static const struct iommu_ops rk_iommu_ops = {
.detach_dev = rk_iommu_detach_device,
.map = rk_iommu_map,
.unmap = rk_iommu_unmap,
+ .map_sg = default_iommu_map_sg,
.add_device = rk_iommu_add_device,
.remove_device = rk_iommu_remove_device,
.iova_to_phys = rk_iommu_iova_to_phys,
--
1.9.1
[PATCH v2 1/7] iommu/rockchip: fix devm_{request,free}_irq parameter
From: Simon Xue <x...@rock-chips.com>
Even though the iommu shares irq with its master, using the *dev of iommu
instead of master's *dev for devm_{request,free}_irq makes things clear.
Signed-off-by: Simon Xue
Signed-off-by: Shunqian Zheng
---
drivers/iommu/rockchip-iommu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index c7d6156..ec0ce62 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -807,7 +807,7 @@ static int rk_iommu_attach_device(struct iommu_domain
*domain,
iommu->domain = domain;
- ret = devm_request_irq(dev, iommu->irq, rk_iommu_irq,
+ ret = devm_request_irq(iommu->dev, iommu->irq, rk_iommu_irq,
IRQF_SHARED, dev_name(dev), iommu);
if (ret)
return ret;
@@ -860,7 +860,7 @@ static void rk_iommu_detach_device(struct iommu_domain
*domain,
}
rk_iommu_disable_stall(iommu);
- devm_free_irq(dev, iommu->irq, iommu);
+ devm_free_irq(iommu->dev, iommu->irq, iommu);
iommu->domain = NULL;
--
1.9.1
[PATCH v2 0/7] fix bugs; enable iommu for ARM64
This series patches mainly for ARM64 supporting.
To do this, it first add virtual iommu slave device which DRM can attach to,
convert DRM driver to use common iommu API instead of the ARM32
functions, and then use DMA API in iommu driver to map, to flush cache.
The v2 patches make a lot changes vs v1, so please forget the v1.
Shunqian Zheng (4):
iommu/rockchip: support virtual iommu slave device
ARM: dts: rockchip: add virtual iommu for display
drm: rockchip: use common iommu api to attach iommu
iommu/rockchip: use DMA API to map, to flush cache
Simon Xue (3):
iommu/rockchip: fix devm_{request,free}_irq parameter
iommu/rockchip: add map_sg callback for rk_iommu_ops
iommu/rockchip: enable rockchip iommu on ARM64 platform
arch/arm/boot/dts/rk3288.dtsi | 6 ++
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 130
drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 +
drivers/iommu/Kconfig | 2 +-
drivers/iommu/rockchip-iommu.c | 151 ++--
5 files changed, 193 insertions(+), 97 deletions(-)
--
1.9.1
