from:"Sibi S"

Re: [PATCH v2 2/3] drm/msm/dsi: add implementation for helper functions

2018-03-26 Thread Sibi S


Hi Jordan,
Thanks for the review.

On 03/20/2018 01:53 AM, Jordan Crouse wrote:

On Tue, Mar 20, 2018 at 01:11:02AM +0530, Sibi S wrote:

Add dsi host helper function implementation for DSI v2
DSI 6G 1.x and DSI 6G v2.0+ controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
  drivers/gpu/drm/msm/dsi/dsi.h  |  15 +++
  drivers/gpu/drm/msm/dsi/dsi_cfg.c  |  56 +++--
  drivers/gpu/drm/msm/dsi/dsi_host.c | 236 -
  3 files changed, 296 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 80be83e8fdec..dfa049d876bd 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -183,6 +183,21 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
  int msm_dsi_host_init(struct msm_dsi *msm_dsi);
  int msm_dsi_runtime_suspend(struct device *dev);
  int msm_dsi_runtime_resume(struct device *dev);
+int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host);
+int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host);
+int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size);
+int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size);
+void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host);
+void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host);
+void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host);
+int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_clk_init_v2(struct msm_dsi_host *msm_host);
+int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host);
  
  /* dsi phy */

  struct msm_dsi_phy;
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 0327bb54b01b..dcdfb1bb54f9 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -136,20 +136,58 @@ static const struct msm_dsi_config sdm845_dsi_cfg = {
.num_dsi = 2,
  };
  
+const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {

+   .link_clk_enable = dsi_link_clk_enable_v2,
+   .link_clk_disable = dsi_link_clk_disable_v2,
+   .clk_init_ver = dsi_clk_init_v2,
+   .tx_buf_alloc = dsi_tx_buf_alloc_v2,
+   .tx_buf_get = dsi_tx_buf_get_v2,
+   .tx_buf_put = NULL,
+   .dma_base_get = dsi_dma_base_get_v2,
+   .calc_clk_rate = dsi_calc_clk_rate_v2,
+};
+
+const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_6g,
+   .link_clk_disable = dsi_link_clk_disable_6g,
+   .clk_init_ver = NULL,
+   .tx_buf_alloc = dsi_tx_buf_alloc_6g,
+   .tx_buf_get = dsi_tx_buf_get_6g,
+   .tx_buf_put = dsi_tx_buf_put_6g,
+   .dma_base_get = dsi_dma_base_get_6g,
+   .calc_clk_rate = dsi_calc_clk_rate_6g,
+};
+
+const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_6g,
+   .link_clk_disable = dsi_link_clk_disable_6g,
+   .clk_init_ver = dsi_clk_init_6g_v2,
+   .tx_buf_alloc = dsi_tx_buf_alloc_6g,
+   .tx_buf_get = dsi_tx_buf_get_6g,
+   .tx_buf_put = dsi_tx_buf_put_6g,
+   .dma_base_get = dsi_dma_base_get_6g,
+   .calc_clk_rate = dsi_calc_clk_rate_6g,
+};
+
  static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
-   {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, _dsi_cfg},
+   {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
+   _dsi_cfg, _dsi_v2_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
-   _apq8084_dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, _dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_

[PATCH v2 3/3] drm/msm/dsi: replace version checks with helper functions

2018-03-19 Thread Sibi S

Replace version checks with the helper functions bound to
cfg_handler for DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 242 +
 1 file changed, 29 insertions(+), 213 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 78ea4540f0ee..bf8581a5e67c 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -426,19 +426,6 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host)
goto exit;
}
 
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
-   cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V2_2_1) {
-   msm_host->byte_intf_clk = msm_clk_get(pdev, "byte_intf");
-   if (IS_ERR(msm_host->byte_intf_clk)) {
-   ret = PTR_ERR(msm_host->byte_intf_clk);
-   pr_err("%s: can't find byte_intf clock. ret=%d\n",
-   __func__, ret);
-   goto exit;
-   }
-   } else {
-   msm_host->byte_intf_clk = NULL;
-   }
-
msm_host->byte_clk_src = clk_get_parent(msm_host->byte_clk);
if (!msm_host->byte_clk_src) {
ret = -ENODEV;
@@ -453,31 +440,8 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host)
goto exit;
}
 
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_V2) {
-   msm_host->src_clk = msm_clk_get(pdev, "src");
-   if (IS_ERR(msm_host->src_clk)) {
-   ret = PTR_ERR(msm_host->src_clk);
-   pr_err("%s: can't find src clock. ret=%d\n",
-   __func__, ret);
-   msm_host->src_clk = NULL;
-   goto exit;
-   }
-
-   msm_host->esc_clk_src = clk_get_parent(msm_host->esc_clk);
-   if (!msm_host->esc_clk_src) {
-   ret = -ENODEV;
-   pr_err("%s: can't get esc clock parent. ret=%d\n",
-   __func__, ret);
-   goto exit;
-   }
-
-   msm_host->dsi_clk_src = clk_get_parent(msm_host->src_clk);
-   if (!msm_host->dsi_clk_src) {
-   ret = -ENODEV;
-   pr_err("%s: can't get src clock parent. ret=%d\n",
-   __func__, ret);
-   }
-   }
+   if (cfg_hnd->ops->clk_init_ver)
+   ret = cfg_hnd->ops->clk_init_ver(msm_host);
 exit:
return ret;
 }
@@ -681,16 +645,6 @@ int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host)
return ret;
 }
 
-static int dsi_link_clk_enable(struct msm_dsi_host *msm_host)
-{
-   const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
-
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G)
-   return dsi_link_clk_enable_6g(msm_host);
-   else
-   return dsi_link_clk_enable_v2(msm_host);
-}
-
 void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host)
 {
clk_disable_unprepare(msm_host->esc_clk);
@@ -708,24 +662,6 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host)
clk_disable_unprepare(msm_host->byte_clk);
 }
 
-static void dsi_link_clk_disable(struct msm_dsi_host *msm_host)
-{
-   const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
-
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) {
-   clk_disable_unprepare(msm_host->esc_clk);
-   clk_disable_unprepare(msm_host->pixel_clk);
-   if (msm_host->byte_intf_clk)
-   clk_disable_unprepare(msm_host->byte_intf_clk);
-   clk_disable_unprepare(msm_host->byte_clk);
-   } else {
-   clk_disable_unprepare(msm_host->pixel_clk);
-   clk_disable_unprepare(msm_host->src_clk);
-   clk_disable_unprepare(msm_host->esc_clk);
-   clk_disable_unprepare(msm_host->byte_clk);
-   }
-}
-
 int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host)
 {
struct drm_display_mode *mode = msm_host->mode;
@@ -814,73 +750,6 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host)
return 0;
 }
 
-static int dsi_calc_clk_rate(struct msm_dsi_host *msm_host)
-{
-   struct drm_display_mode *mode = msm_host->mode;
-   const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
-   u8 lanes = msm_host->lanes;
-   u32 bpp = dsi_get_bpp(msm_host->format);
-   u32 pclk_rate;
-
-   if (!mode) {
-   pr_err("%s: mode not set\n", __func__);
-   return -EINVAL;
-   }
-
-   pclk_rate = mode->cloc

[PATCH v2 2/3] drm/msm/dsi: add implementation for helper functions

2018-03-19 Thread Sibi S

Add dsi host helper function implementation for DSI v2
DSI 6G 1.x and DSI 6G v2.0+ controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi.h  |  15 +++
 drivers/gpu/drm/msm/dsi/dsi_cfg.c  |  56 +++--
 drivers/gpu/drm/msm/dsi/dsi_host.c | 236 -
 3 files changed, 296 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 80be83e8fdec..dfa049d876bd 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -183,6 +183,21 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
 int msm_dsi_host_init(struct msm_dsi *msm_dsi);
 int msm_dsi_runtime_suspend(struct device *dev);
 int msm_dsi_runtime_resume(struct device *dev);
+int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host);
+int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host);
+int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size);
+int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size);
+void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host);
+void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host);
+void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host);
+int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_clk_init_v2(struct msm_dsi_host *msm_host);
+int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host);
 
 /* dsi phy */
 struct msm_dsi_phy;
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 0327bb54b01b..dcdfb1bb54f9 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -136,20 +136,58 @@ static const struct msm_dsi_config sdm845_dsi_cfg = {
.num_dsi = 2,
 };
 
+const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_v2,
+   .link_clk_disable = dsi_link_clk_disable_v2,
+   .clk_init_ver = dsi_clk_init_v2,
+   .tx_buf_alloc = dsi_tx_buf_alloc_v2,
+   .tx_buf_get = dsi_tx_buf_get_v2,
+   .tx_buf_put = NULL,
+   .dma_base_get = dsi_dma_base_get_v2,
+   .calc_clk_rate = dsi_calc_clk_rate_v2,
+};
+
+const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_6g,
+   .link_clk_disable = dsi_link_clk_disable_6g,
+   .clk_init_ver = NULL,
+   .tx_buf_alloc = dsi_tx_buf_alloc_6g,
+   .tx_buf_get = dsi_tx_buf_get_6g,
+   .tx_buf_put = dsi_tx_buf_put_6g,
+   .dma_base_get = dsi_dma_base_get_6g,
+   .calc_clk_rate = dsi_calc_clk_rate_6g,
+};
+
+const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_6g,
+   .link_clk_disable = dsi_link_clk_disable_6g,
+   .clk_init_ver = dsi_clk_init_6g_v2,
+   .tx_buf_alloc = dsi_tx_buf_alloc_6g,
+   .tx_buf_get = dsi_tx_buf_get_6g,
+   .tx_buf_put = dsi_tx_buf_put_6g,
+   .dma_base_get = dsi_dma_base_get_6g,
+   .calc_clk_rate = dsi_calc_clk_rate_6g,
+};
+
 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
-   {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, _dsi_cfg},
+   {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
+   _dsi_cfg, _dsi_v2_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
-   _apq8084_dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, _dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
+   _dsi_cfg, _dsi_6g_v2_ho

[PATCH v2 0/3] Cleanup excessive DSI host controller version checks

2018-03-19 Thread Sibi S

This patch series aims to create and bind dsi host controller helper
functions to functionalities that vary across DSI v2, DSI 6G 1.x and
DSI 6G v2.0+ controllers. These functionalities are currently under
excessive version checks which is now replaced with the corresponding
helper function.

V2:
  Removes command broadcast support for DSI 6G v2.0+ controllers from
  the patch series and incorporates all the suggested corrections
  

Sibi S (3):
  drm/msm/dsi: add dsi host helper functions support
  drm/msm/dsi: add implementation for helper functions
  drm/msm/dsi: replace version checks with helper functions

 drivers/gpu/drm/msm/dsi/dsi.h  |  16 ++
 drivers/gpu/drm/msm/dsi/dsi_cfg.c  |  56 +-
 drivers/gpu/drm/msm/dsi/dsi_cfg.h  |  12 ++
 drivers/gpu/drm/msm/dsi/dsi_host.c | 362 +
 4 files changed, 280 insertions(+), 166 deletions(-)

-- 
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a Linux Foundation Collaborative Project

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[PATCH v2 1/3] drm/msm/dsi: add dsi host helper functions support

2018-03-19 Thread Sibi S

Add dsi host helper functions support for DSI v2 and DSI 6G 1.x
controllers that are under version checks

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi.h |  1 +
 drivers/gpu/drm/msm/dsi/dsi_cfg.h | 12 
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 70d9a9a47acd..80be83e8fdec 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -149,6 +149,7 @@ static inline int msm_dsi_pll_set_usecase(struct 
msm_dsi_pll *pll,
 #endif
 
 /* dsi host */
+struct msm_dsi_host;
 int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
const struct mipi_dsi_msg *msg);
 void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
index 9cfdcf1c95d5..a795a062b779 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
@@ -40,10 +40,22 @@ struct msm_dsi_config {
const int num_dsi;
 };
 
+struct msm_dsi_host_cfg_ops {
+   int (*link_clk_enable)(struct msm_dsi_host *msm_host);
+   void (*link_clk_disable)(struct msm_dsi_host *msm_host);
+   int (*clk_init_ver)(struct msm_dsi_host *msm_host);
+   int (*tx_buf_alloc)(struct msm_dsi_host *msm_host, int size);
+   void* (*tx_buf_get)(struct msm_dsi_host *msm_host);
+   void (*tx_buf_put)(struct msm_dsi_host *msm_host);
+   int (*dma_base_get)(struct msm_dsi_host *msm_host, uint64_t *iova);
+   int (*calc_clk_rate)(struct msm_dsi_host *msm_host);
+};
+
 struct msm_dsi_cfg_handler {
u32 major;
u32 minor;
const struct msm_dsi_config *cfg;
+   const struct msm_dsi_host_cfg_ops *ops;
 };
 
 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor);
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Re: [Freedreno] [PATCH 2/5] drm/msm/dsi: add implementation for helper functions

2018-03-13 Thread Sibi S


Hi Archit,
Thanks for the review.

On 03/13/2018 10:49 AM, Archit Taneja wrote:



On Monday 12 March 2018 06:53 PM, Sibi S wrote:

Add dsi host helper function implementation for DSI v2
and DSI 6G 1.x controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
  drivers/gpu/drm/msm/dsi/dsi.h  |  15 +++
  drivers/gpu/drm/msm/dsi/dsi_cfg.c  |  44 +--
  drivers/gpu/drm/msm/dsi/dsi_host.c | 250 
-

  3 files changed, 298 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h 
b/drivers/gpu/drm/msm/dsi/dsi.h

index 80be83e..dfa049d 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -183,6 +183,21 @@ int msm_dsi_host_modeset_init(struct 
mipi_dsi_host *host,

  int msm_dsi_host_init(struct msm_dsi *msm_dsi);
  int msm_dsi_runtime_suspend(struct device *dev);
  int msm_dsi_runtime_resume(struct device *dev);
+int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host);
+int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host);
+int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size);
+int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size);
+void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host);
+void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host);
+void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host);
+int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_clk_init_v2(struct msm_dsi_host *msm_host);
+int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host);
  /* dsi phy */
  struct msm_dsi_phy;
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c

index 0327bb5..dc51aaa 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -136,20 +136,46 @@
  .num_dsi = 2,
  };
+const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
+    .link_clk_enable = dsi_link_clk_enable_v2,
+    .link_clk_disable = dsi_link_clk_disable_v2,
+    .clk_init_ver = dsi_clk_init_v2,
+    .tx_buf_alloc = dsi_tx_buf_alloc_v2,
+    .tx_buf_get = dsi_tx_buf_get_v2,
+    .tx_buf_put = NULL,
+    .dma_base_get = dsi_dma_base_get_v2,
+    .calc_clk_rate = dsi_calc_clk_rate_v2,
+};
+
+const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
+    .link_clk_enable = dsi_link_clk_enable_6g,
+    .link_clk_disable = dsi_link_clk_disable_6g,
+    .clk_init_ver = NULL,
+    .tx_buf_alloc = dsi_tx_buf_alloc_6g,
+    .tx_buf_get = dsi_tx_buf_get_6g,
+    .tx_buf_put = dsi_tx_buf_put_6g,
+    .dma_base_get = dsi_dma_base_get_6g,
+    .calc_clk_rate = dsi_calc_clk_rate_6g,
+};


Could you introduce the host ops for SDM845 (i.e,
msm_dsi_6g_v2_host_ops) in this patch itself? It would be nice to
keep the DSI command broadcast code as a separate patch since it
probably needs to go through more iterations.

The ops approach looks good otherwise.

Thanks,
Archit



Sure I'll re-order them and probably should separately post
separate patch series for command broadcast on sdm845.


  static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
-    {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, _dsi_cfg},
+    {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
+    _dsi_cfg, _dsi_v2_host_ops},
  {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
-    _apq8084_dsi_cfg},
+    _apq8084_dsi_cfg, _dsi_6g_host_ops},
  {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
-    _apq8084_dsi_cfg},
+    _apq8084_dsi_cfg, _dsi_6g_host_ops},
  {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
-    _apq8084_dsi_cfg},
+    _apq8084_dsi_cfg, _dsi_6g_host_ops},
  {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
-    _apq8084_dsi_cfg},
-    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, _dsi_cfg},
-    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, 
_dsi_cfg},
-    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, 
_dsi_cfg},
-    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, 
_dsi_cfg},

+    _apq8084_dsi_cfg, _dsi_6g_host_ops},
+    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
+    _dsi_cfg, _dsi_6g_host_ops},
+    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
+    _dsi_cfg, _dsi_6g_host_ops},
+    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
+    _dsi_cfg, _dsi_6g_host_ops},
+    {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
+    _dsi_cfg, _dsi_6g_host_ops},
  };
  const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c

index 7a03a94..f7a066d 100644
--- a/drivers/gpu/d

Re: [PATCH 2/5] drm/msm/dsi: add implementation for helper functions

2018-03-13 Thread Sibi S


Hi Jordan,
Thanks for the review. Will incorporate the suggested changes in v2.

On 03/12/2018 08:43 PM, Jordan Crouse wrote:

On Mon, Mar 12, 2018 at 06:53:11PM +0530, Sibi S wrote:

Add dsi host helper function implementation for DSI v2
and DSI 6G 1.x controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
  drivers/gpu/drm/msm/dsi/dsi.h  |  15 +++
  drivers/gpu/drm/msm/dsi/dsi_cfg.c  |  44 +--
  drivers/gpu/drm/msm/dsi/dsi_host.c | 250 -
  3 files changed, 298 insertions(+), 11 deletions(-)




  static int dsi_calc_clk_rate(struct msm_dsi_host *msm_host)
  {
struct drm_display_mode *mode = msm_host->mode;
@@ -1008,6 +1161,59 @@ static void dsi_wait4video_eng_busy(struct msm_dsi_host 
*msm_host)
}
  }
  
+int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size)

+{
+   struct drm_device *dev = msm_host->dev;
+   struct msm_drm_private *priv = dev->dev_private;
+   int ret;
+   uint64_t iova;
+
+   msm_host->tx_gem_obj = msm_gem_new(dev, size, MSM_BO_UNCACHED);
+   if (IS_ERR(msm_host->tx_gem_obj)) {
+   ret = PTR_ERR(msm_host->tx_gem_obj);
+   pr_err("%s: failed to allocate gem, %d\n",
+   __func__, ret);
+   msm_host->tx_gem_obj = NULL;
+   return ret;
+   }
+
+   ret = msm_gem_get_iova(msm_host->tx_gem_obj,
+   priv->kms->aspace, );
+   mutex_unlock(>struct_mutex);
+   if (ret) {
+   pr_err("%s: failed to get iova, %d\n", __func__, ret);
+   return ret;
+   }
+
+   if (iova & 0x07) {
+   pr_err("%s: buf NOT 8 bytes aligned\n", __func__);
+   return -EINVAL;
+   }


This is impossible - new allocations will always be page aligned.



Its always good to review and remove older code paths :).
Sure will remove this check.


+   msm_host->tx_size = msm_host->tx_gem_obj->size;
+
+   return 0;
+}
+
+int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size)
+{
+   struct drm_device *dev = msm_host->dev;
+   int ret;
+
+   msm_host->tx_buf = dma_alloc_coherent(dev->dev, size,
+   _host->tx_buf_paddr, GFP_KERNEL);
+   if (!msm_host->tx_buf) {
+   ret = -ENOMEM;
+   pr_err("%s: failed to allocate tx buf, %d\n",
+   __func__, ret);


You don't need to print ret here, it isn't a mystery what it is.  In fact, you
probably don't need to print anything here at all because dma_alloc_coherent
should be pretty noisy when it fails.


+   return ret;


This can just be return -ENOMEM and you can lose 'ret'.



yep makes sense, will replace it.


+   }
+
+   msm_host->tx_size = size;
+
+   return 0;
+}
+
  /* dsi_cmd */
  static int dsi_tx_buf_alloc(struct msm_dsi_host *msm_host, int size)
  {
@@ -1072,6 +1278,21 @@ static void dsi_tx_buf_free(struct msm_dsi_host 
*msm_host)
msm_host->tx_buf_paddr);
  }
  
+void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host)

+{
+   return msm_gem_get_vaddr(msm_host->tx_gem_obj);
+}
+
+void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host)
+{
+   return msm_host->tx_buf;
+}
+
+void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host)
+{
+   msm_gem_put_vaddr(msm_host->tx_gem_obj);
+}
+
  /*
   * prepare cmd buffer to be txed
   */
@@ -1173,6 +1394,31 @@ static int dsi_long_read_resp(u8 *buf, const struct 
mipi_dsi_msg *msg)
return msg->rx_len;
  }
  
+int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *dma_base)

+{
+   struct drm_device *dev = msm_host->dev;
+   struct msm_drm_private *priv = dev->dev_private;
+   uint64_t **iova;
+   int ret;
+
+   if (!dma_base)
+   return -EINVAL;
+
+   iova = _base;


This is a convoluted way of passing in the pointer and I doubt even the compiler
can see through it.


+   ret = msm_gem_get_iova(msm_host->tx_gem_obj,
+   priv->kms->aspace, *iova);


ret = msm_gem_get_iova(msm_host->tx_gem_obj, priv->kms->aspace, dma_base);

Easy, safe effective


+   return ret;


If you put a return on the front of the msm_gem_get_iova you can eliminate the
need for 'ret'.



ok will do just that.


Jordan



--
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[PATCH 3/5] drm/msm/dsi: replace version checks with helper functions

2018-03-12 Thread Sibi S

Replace version checks with the helper functions bound to
cfg_handler for DSI v2 and DSI 6G 1.x controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 242 +
 1 file changed, 29 insertions(+), 213 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index f7a066d..b755b69 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -426,19 +426,6 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host)
goto exit;
}
 
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
-   cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V2_2_1) {
-   msm_host->byte_intf_clk = msm_clk_get(pdev, "byte_intf");
-   if (IS_ERR(msm_host->byte_intf_clk)) {
-   ret = PTR_ERR(msm_host->byte_intf_clk);
-   pr_err("%s: can't find byte_intf clock. ret=%d\n",
-   __func__, ret);
-   goto exit;
-   }
-   } else {
-   msm_host->byte_intf_clk = NULL;
-   }
-
msm_host->byte_clk_src = clk_get_parent(msm_host->byte_clk);
if (!msm_host->byte_clk_src) {
ret = -ENODEV;
@@ -453,31 +440,8 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host)
goto exit;
}
 
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_V2) {
-   msm_host->src_clk = msm_clk_get(pdev, "src");
-   if (IS_ERR(msm_host->src_clk)) {
-   ret = PTR_ERR(msm_host->src_clk);
-   pr_err("%s: can't find src clock. ret=%d\n",
-   __func__, ret);
-   msm_host->src_clk = NULL;
-   goto exit;
-   }
-
-   msm_host->esc_clk_src = clk_get_parent(msm_host->esc_clk);
-   if (!msm_host->esc_clk_src) {
-   ret = -ENODEV;
-   pr_err("%s: can't get esc clock parent. ret=%d\n",
-   __func__, ret);
-   goto exit;
-   }
-
-   msm_host->dsi_clk_src = clk_get_parent(msm_host->src_clk);
-   if (!msm_host->dsi_clk_src) {
-   ret = -ENODEV;
-   pr_err("%s: can't get src clock parent. ret=%d\n",
-   __func__, ret);
-   }
-   }
+   if (cfg_hnd->ops->clk_init_ver)
+   ret = cfg_hnd->ops->clk_init_ver(msm_host);
 exit:
return ret;
 }
@@ -681,16 +645,6 @@ int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host)
return ret;
 }
 
-static int dsi_link_clk_enable(struct msm_dsi_host *msm_host)
-{
-   const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
-
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G)
-   return dsi_link_clk_enable_6g(msm_host);
-   else
-   return dsi_link_clk_enable_v2(msm_host);
-}
-
 void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host)
 {
clk_disable_unprepare(msm_host->esc_clk);
@@ -708,24 +662,6 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host)
clk_disable_unprepare(msm_host->byte_clk);
 }
 
-static void dsi_link_clk_disable(struct msm_dsi_host *msm_host)
-{
-   const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
-
-   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) {
-   clk_disable_unprepare(msm_host->esc_clk);
-   clk_disable_unprepare(msm_host->pixel_clk);
-   if (msm_host->byte_intf_clk)
-   clk_disable_unprepare(msm_host->byte_intf_clk);
-   clk_disable_unprepare(msm_host->byte_clk);
-   } else {
-   clk_disable_unprepare(msm_host->pixel_clk);
-   clk_disable_unprepare(msm_host->src_clk);
-   clk_disable_unprepare(msm_host->esc_clk);
-   clk_disable_unprepare(msm_host->byte_clk);
-   }
-}
-
 int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host)
 {
struct drm_display_mode *mode = msm_host->mode;
@@ -814,73 +750,6 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host)
return 0;
 }
 
-static int dsi_calc_clk_rate(struct msm_dsi_host *msm_host)
-{
-   struct drm_display_mode *mode = msm_host->mode;
-   const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
-   u8 lanes = msm_host->lanes;
-   u32 bpp = dsi_get_bpp(msm_host->format);
-   u32 pclk_rate;
-
-   if (!mode) {
-   pr_err("%s: mode not set\n", __func__);
-   return -EINVAL;
-   }
-
-   pclk_rate = mode->clock * 1000;
-   if (lanes

[PATCH 5/5] drm/msm/dsi: replace version checks for commmand broadcast

2018-03-12 Thread Sibi S

Replace version checks for commmand broadcast with the helper
functions bound to cfg_handler for DSI v6G 1.x and DSI 6G v2.0+
controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi_cfg.c  |  6 ++
 drivers/gpu/drm/msm/dsi/dsi_cfg.h  |  2 ++
 drivers/gpu/drm/msm/dsi/dsi_host.c | 16 +++-
 3 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index dcdfb1b..6ec28d1 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -145,6 +145,8 @@
.tx_buf_put = NULL,
.dma_base_get = dsi_dma_base_get_v2,
.calc_clk_rate = dsi_calc_clk_rate_v2,
+   .xfer = msm_dsi_manager_cmd_xfer,
+   .xfer_trigger = msm_dsi_manager_cmd_xfer_trigger,
 };
 
 const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
@@ -156,6 +158,8 @@
.tx_buf_put = dsi_tx_buf_put_6g,
.dma_base_get = dsi_dma_base_get_6g,
.calc_clk_rate = dsi_calc_clk_rate_6g,
+   .xfer = msm_dsi_manager_cmd_xfer,
+   .xfer_trigger = msm_dsi_manager_cmd_xfer_trigger,
 };
 
 const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
@@ -167,6 +171,8 @@
.tx_buf_put = dsi_tx_buf_put_6g,
.dma_base_get = dsi_dma_base_get_6g,
.calc_clk_rate = dsi_calc_clk_rate_6g,
+   .xfer = msm_dsi_manager_cmd_xfer_6g_v2,
+   .xfer_trigger = msm_dsi_manager_cmd_xfer_trigger_6g_v2,
 };
 
 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
index a795a06..145251e 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
@@ -49,6 +49,8 @@ struct msm_dsi_host_cfg_ops {
void (*tx_buf_put)(struct msm_dsi_host *msm_host);
int (*dma_base_get)(struct msm_dsi_host *msm_host, uint64_t *iova);
int (*calc_clk_rate)(struct msm_dsi_host *msm_host);
+   bool (*xfer_trigger)(int id, u32 dma_base, u32 len);
+   int (*xfer)(int id, const struct mipi_dsi_msg *msg);
 };
 
 struct msm_dsi_cfg_handler {
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index bd61cad..240ecb8 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1251,13 +1251,8 @@ static int dsi_cmd_dma_tx(struct msm_dsi_host *msm_host, 
int len)
reinit_completion(_host->dma_comp);
 
dsi_wait4video_eng_busy(msm_host);
-   if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
-   (cfg_hnd->minor < MSM_DSI_6G_VER_MINOR_V2_2_1))
-   triggered = msm_dsi_manager_cmd_xfer_trigger(msm_host->id,
-   dma_base, len);
-   else
-   triggered = msm_dsi_manager_cmd_xfer_trigger_6g_v2(
- msm_host->id, dma_base, len);
+   triggered = cfg_hnd->ops->xfer_trigger(msm_host->id,
+   dma_base, len);
 
if (triggered) {
ret = wait_for_completion_timeout(_host->dma_comp,
@@ -1615,12 +1610,7 @@ static ssize_t dsi_host_transfer(struct mipi_dsi_host 
*host,
 
mutex_lock(_host->cmd_mutex);
 
-   if (((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
-   (cfg_hnd->minor < MSM_DSI_6G_VER_MINOR_V2_2_1)) ||
-   (cfg_hnd->major == MSM_DSI_VER_MAJOR_V2))
-   ret = msm_dsi_manager_cmd_xfer(msm_host->id, msg);
-   else
-   ret = msm_dsi_manager_cmd_xfer_6g_v2(msm_host->id, msg);
+   ret = cfg_hnd->ops->xfer(msm_host->id, msg);
 
mutex_unlock(_host->cmd_mutex);
 
-- 
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[PATCH 0/5] Cleanup excessive DSI host controller version checks

2018-03-12 Thread Sibi S

This patch series aims to create and bind dsi host controller helper
functions to functionalities that vary across DSI v2, DSI 6G 1.x and
DSI 6G v2.0+ controllers. These functionalities are currently under
excessive version checks which is now replaced with the corresponding
helper function.

This patch series includes Archit's patch (4/5) which implements
command broadcast support for DSI 6G v2.0+ controller on SDM845.

The helper functions can later be moved to separate files for each
DSI controller on the event of addition of more functionality that
vary across the DSI controllers.

Archit Taneja (1):
  drm/msm/dsi: implement 6G v2.0+ DSI command broadcast

Sibi S (4):
  drm/msm/dsi: add dsi host helper functions support
  drm/msm/dsi: add implementation for helper functions
  drm/msm/dsi: replace version checks with helper functions
  drm/msm/dsi: replace version checks for commmand broadcast

 drivers/gpu/drm/msm/dsi/dsi.h |  21 ++
 drivers/gpu/drm/msm/dsi/dsi_cfg.c |  62 -
 drivers/gpu/drm/msm/dsi/dsi_cfg.h |  14 ++
 drivers/gpu/drm/msm/dsi/dsi_host.c| 428 +-
 drivers/gpu/drm/msm/dsi/dsi_manager.c |  66 ++
 5 files changed, 422 insertions(+), 169 deletions(-)

-- 
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[PATCH 4/5] drm/msm/dsi: implement 6G v2.0+ DSI command broadcast

2018-03-12 Thread Sibi S

From: Archit Taneja <arch...@codeaurora.org>

Add command broadcast support for DSI 6G v2.0+ controller
on SDM845

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi.h |  5 +++
 drivers/gpu/drm/msm/dsi/dsi_cfg.c | 14 +++-
 drivers/gpu/drm/msm/dsi/dsi_host.c| 62 ++--
 drivers/gpu/drm/msm/dsi/dsi_manager.c | 66 +++
 4 files changed, 143 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index dfa049d..22342c30 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -96,7 +96,9 @@ struct msm_dsi {
 struct drm_connector *msm_dsi_manager_connector_init(u8 id);
 struct drm_connector *msm_dsi_manager_ext_bridge_init(u8 id);
 int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
+int msm_dsi_manager_cmd_xfer_6g_v2(int id, const struct mipi_dsi_msg *msg);
 bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
+bool msm_dsi_manager_cmd_xfer_trigger_6g_v2(int id, u32 dma_base, u32 len);
 void msm_dsi_manager_attach_dsi_device(int id, u32 device_flags);
 int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
 void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
@@ -152,6 +154,9 @@ static inline int msm_dsi_pll_set_usecase(struct 
msm_dsi_pll *pll,
 struct msm_dsi_host;
 int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
const struct mipi_dsi_msg *msg);
+int msm_dsi_host_xfer_prepare_6g_v2(struct mipi_dsi_host *host,
+   const struct mipi_dsi_msg *msg,
+   bool broadcast, bool master);
 void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
const struct mipi_dsi_msg *msg);
 int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host,
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index dc51aaa..dcdfb1b 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -157,6 +157,18 @@
.dma_base_get = dsi_dma_base_get_6g,
.calc_clk_rate = dsi_calc_clk_rate_6g,
 };
+
+const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_6g,
+   .link_clk_disable = dsi_link_clk_disable_6g,
+   .clk_init_ver = dsi_clk_init_6g_v2,
+   .tx_buf_alloc = dsi_tx_buf_alloc_6g,
+   .tx_buf_get = dsi_tx_buf_get_6g,
+   .tx_buf_put = dsi_tx_buf_put_6g,
+   .dma_base_get = dsi_dma_base_get_6g,
+   .calc_clk_rate = dsi_calc_clk_rate_6g,
+};
+
 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
_dsi_cfg, _dsi_v2_host_ops},
@@ -175,7 +187,7 @@
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
-   _dsi_cfg, _dsi_6g_host_ops},
+   _dsi_cfg, _dsi_6g_v2_host_ops},
 };
 
 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index b755b69..bd61cad 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1251,9 +1251,14 @@ static int dsi_cmd_dma_tx(struct msm_dsi_host *msm_host, 
int len)
reinit_completion(_host->dma_comp);
 
dsi_wait4video_eng_busy(msm_host);
+   if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
+   (cfg_hnd->minor < MSM_DSI_6G_VER_MINOR_V2_2_1))
+   triggered = msm_dsi_manager_cmd_xfer_trigger(msm_host->id,
+   dma_base, len);
+   else
+   triggered = msm_dsi_manager_cmd_xfer_trigger_6g_v2(
+ msm_host->id, dma_base, len);
 
-   triggered = msm_dsi_manager_cmd_xfer_trigger(
-   msm_host->id, dma_base, len);
if (triggered) {
ret = wait_for_completion_timeout(_host->dma_comp,
msecs_to_jiffies(200));
@@ -1602,13 +1607,21 @@ static ssize_t dsi_host_transfer(struct mipi_dsi_host 
*host,
const struct mipi_dsi_msg *msg)
 {
struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
+   const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
int ret;
 
if (!msg || !msm_host->power_on)
return -EINVAL;
 
mutex_lock(_host->cmd_mutex);
-   ret = msm_dsi_manager_cmd_xfer(msm_host->id, msg);
+
+   if (((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) &&
+   (cfg_hnd->minor <

[PATCH 2/5] drm/msm/dsi: add implementation for helper functions

2018-03-12 Thread Sibi S

Add dsi host helper function implementation for DSI v2
and DSI 6G 1.x controllers

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi.h  |  15 +++
 drivers/gpu/drm/msm/dsi/dsi_cfg.c  |  44 +--
 drivers/gpu/drm/msm/dsi/dsi_host.c | 250 -
 3 files changed, 298 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 80be83e..dfa049d 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -183,6 +183,21 @@ int msm_dsi_host_modeset_init(struct mipi_dsi_host *host,
 int msm_dsi_host_init(struct msm_dsi *msm_dsi);
 int msm_dsi_runtime_suspend(struct device *dev);
 int msm_dsi_runtime_resume(struct device *dev);
+int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host);
+int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host);
+void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host);
+int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size);
+int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size);
+void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host);
+void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host);
+void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host);
+int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *iova);
+int dsi_clk_init_v2(struct msm_dsi_host *msm_host);
+int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host);
+int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host);
 
 /* dsi phy */
 struct msm_dsi_phy;
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 0327bb5..dc51aaa 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -136,20 +136,46 @@
.num_dsi = 2,
 };
 
+const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_v2,
+   .link_clk_disable = dsi_link_clk_disable_v2,
+   .clk_init_ver = dsi_clk_init_v2,
+   .tx_buf_alloc = dsi_tx_buf_alloc_v2,
+   .tx_buf_get = dsi_tx_buf_get_v2,
+   .tx_buf_put = NULL,
+   .dma_base_get = dsi_dma_base_get_v2,
+   .calc_clk_rate = dsi_calc_clk_rate_v2,
+};
+
+const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
+   .link_clk_enable = dsi_link_clk_enable_6g,
+   .link_clk_disable = dsi_link_clk_disable_6g,
+   .clk_init_ver = NULL,
+   .tx_buf_alloc = dsi_tx_buf_alloc_6g,
+   .tx_buf_get = dsi_tx_buf_get_6g,
+   .tx_buf_put = dsi_tx_buf_put_6g,
+   .dma_base_get = dsi_dma_base_get_6g,
+   .calc_clk_rate = dsi_calc_clk_rate_6g,
+};
 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
-   {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, _dsi_cfg},
+   {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
+   _dsi_cfg, _dsi_v2_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
-   _apq8084_dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
-   _apq8084_dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, _dsi_cfg},
-   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, _dsi_cfg},
+   _apq8084_dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
+   _dsi_cfg, _dsi_6g_host_ops},
+   {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
+   _dsi_cfg, _dsi_6g_host_ops},
 };
 
 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 7a03a94..f7a066d 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -331,6 +331,54 @@ static int dsi_regulator_init(struct msm_dsi_host 
*msm_host)
return 0;
 }
 
+int dsi_clk_init_v2(struct msm_dsi_host *msm_host)
+{
+   struct platform_device *pdev = msm_host->pdev;
+   int ret = 0;
+
+

[PATCH 1/5] drm/msm/dsi: add dsi host helper functions support

2018-03-12 Thread Sibi S

Add dsi host helper functions support for DSI v2 and DSI 6G 1.x
controllers that are under version checks

Signed-off-by: Sibi S <si...@codeaurora.org>
---
 drivers/gpu/drm/msm/dsi/dsi.h |  1 +
 drivers/gpu/drm/msm/dsi/dsi_cfg.h | 12 
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 70d9a9a..80be83e 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -149,6 +149,7 @@ static inline int msm_dsi_pll_set_usecase(struct 
msm_dsi_pll *pll,
 #endif
 
 /* dsi host */
+struct msm_dsi_host;
 int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host,
const struct mipi_dsi_msg *msg);
 void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host,
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h 
b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
index 9cfdcf1..a795a06 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h
@@ -40,10 +40,22 @@ struct msm_dsi_config {
const int num_dsi;
 };
 
+struct msm_dsi_host_cfg_ops {
+   int (*link_clk_enable)(struct msm_dsi_host *msm_host);
+   void (*link_clk_disable)(struct msm_dsi_host *msm_host);
+   int (*clk_init_ver)(struct msm_dsi_host *msm_host);
+   int (*tx_buf_alloc)(struct msm_dsi_host *msm_host, int size);
+   void* (*tx_buf_get)(struct msm_dsi_host *msm_host);
+   void (*tx_buf_put)(struct msm_dsi_host *msm_host);
+   int (*dma_base_get)(struct msm_dsi_host *msm_host, uint64_t *iova);
+   int (*calc_clk_rate)(struct msm_dsi_host *msm_host);
+};
+
 struct msm_dsi_cfg_handler {
u32 major;
u32 minor;
const struct msm_dsi_config *cfg;
+   const struct msm_dsi_host_cfg_ops *ops;
 };
 
 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor);
-- 
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a Linux Foundation Collaborative Project

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Re: [PATCH] drm/msm/dsi: Get byte_intf_clk only for versions that need it

2018-02-21 Thread Sibi S


Tested on db410c modetest runs fine now.


On 02/12/2018 12:01 PM, arch...@codeaurora.org wrote:

From: Archit Taneja 

Newer DSI host controllers (SDM845 in particular) require a new clock
called byte_intf_clk. A recent patch tried to add this as an optional
clock, but it still set 'ret' to an error number if it didn't find it.
This breaks the host's probe for all previous DSI host versions.

Instead of setting this up as an optional clock, try to get the clock
only for the DSI version that supports it.

Fixes: 56558fb ("drm/msm/dsi: Add byte_intf_clk")
Signed-off-by: Archit Taneja 
---
  drivers/gpu/drm/msm/dsi/dsi_host.c | 15 ++-
  1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c 
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index f675975..62ac614 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -378,11 +378,16 @@ static int dsi_clk_init(struct msm_dsi_host *msm_host)
goto exit;
}
  
-	msm_host->byte_intf_clk = msm_clk_get(pdev, "byte_intf");

-   if (IS_ERR(msm_host->byte_intf_clk)) {
-   ret = PTR_ERR(msm_host->byte_intf_clk);
-   pr_debug("%s: can't find byte_intf clock. ret=%d\n",
-__func__, ret);
+   if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G &&
+   cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V2_2_1) {
+   msm_host->byte_intf_clk = msm_clk_get(pdev, "byte_intf");
+   if (IS_ERR(msm_host->byte_intf_clk)) {
+   ret = PTR_ERR(msm_host->byte_intf_clk);
+   pr_err("%s: can't find byte_intf clock. ret=%d\n",
+   __func__, ret);
+   goto exit;
+   }
+   } else {
msm_host->byte_intf_clk = NULL;
}
  



--
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Qualcomm Innovation Center, Inc, is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
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Re: [PATCH v2 2/3] drm/msm/dsi: add implementation for helper functions

[PATCH v2 3/3] drm/msm/dsi: replace version checks with helper functions

[PATCH v2 2/3] drm/msm/dsi: add implementation for helper functions

[PATCH v2 0/3] Cleanup excessive DSI host controller version checks

[PATCH v2 1/3] drm/msm/dsi: add dsi host helper functions support

Re: [Freedreno] [PATCH 2/5] drm/msm/dsi: add implementation for helper functions

Re: [PATCH 2/5] drm/msm/dsi: add implementation for helper functions

[PATCH 3/5] drm/msm/dsi: replace version checks with helper functions

[PATCH 5/5] drm/msm/dsi: replace version checks for commmand broadcast

[PATCH 0/5] Cleanup excessive DSI host controller version checks

[PATCH 4/5] drm/msm/dsi: implement 6G v2.0+ DSI command broadcast

[PATCH 2/5] drm/msm/dsi: add implementation for helper functions

[PATCH 1/5] drm/msm/dsi: add dsi host helper functions support

Re: [PATCH] drm/msm/dsi: Get byte_intf_clk only for versions that need it

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