[PATCH v8 6/6] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
Reviewed-by: Linus Walleij 
---
Chage since V8:

- No change.

V7: 
https://lore.kernel.org/all/20240515014643.2715010-8-yangco...@huaqin.corp-partner.google.com

Chage since V7:

- Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.

V6: 
https://lore.kernel.org/all/20240511021326.288728-8-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- Add hx83102_enable_extended_cmds(_ctx, false) at end of inital cmds.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-8-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init().
- Adjust somes inital cmds to Optimize gamma.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-8-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- inital cmds use lowercasehex.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-8-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V2: 
https://lore.kernel.org/all/20240422090310.3311429-8-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 132 
 1 file changed, 132 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 43b8337513d3..1a6975937f30 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -293,6 +293,113 @@ static int boe_nv110wum_init(struct hx83102 *ctx)
return 0;
 };
 
+static int ivo_t109nw41_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xed, 
0xed, 0x0f, 0xcf, 0x42,
+0xf5, 0x39, 0x36, 0x36, 0x36, 0x36, 0x32, 
0x8b, 0x11, 0x65, 0x00, 0x88,
+0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0xd6, 
0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x22, 0x20, 0x00, 0x00, 
0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x35, 0x35, 
0x43, 0x43, 0x35, 0x35,
+0x30, 0x7a, 0x30, 0x7a, 0x01, 0x9d);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x34, 0x34, 
0x22, 0x11, 0x22, 0xa0,
+0x31, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xd3);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x22);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x13, 0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x07, 0x06, 
0x00, 0x02, 0x04, 0x2c,
+0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x08,
+0x08, 0x08, 0x08, 0x37, 0x07, 0x64, 0x7c, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x17, 0x97, 
0x07, 0x97, 0x32, 0x00, 0x02,
+0x00, 0x02, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x25, 0x24, 
0x

[PATCH v8 5/6] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V8:

- No change.

V7: 
https://lore.kernel.org/all/20240515014643.2715010-7-yangco...@huaqin.corp-partner.google.com

Chage since V7:

- No change.

V6: 
https://lore.kernel.org/all/20240511021326.288728-7-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-7-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-7-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-7-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-7-yangco...@huaqin.corp-partner.google.com/

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index baf8b053e375..c649fb085833 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -18,6 +18,8 @@ properties:
   - enum:
   # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+  # IVO t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v8 4/6] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
Reviewed-by: Linus Walleij 
---
Chage since V8:

- No change.

V7: 
https://lore.kernel.org/all/20240515014643.2715010-6-yangco...@huaqin.corp-partner.google.com

Chage since V7:

- Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.

V6: 
https://lore.kernel.org/all/20240511021326.288728-6-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-6-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init()..

V4: 
https://lore.kernel.org/all/20240507135234.1356855-6-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-6-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-6-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 133 
 1 file changed, 133 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 2f67e34c75fa..43b8337513d3 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -44,6 +44,7 @@
 #define HX83102_SETGIP20xd6
 #define HX83102_SETGIP30xd8
 #define HX83102_SETGMA 0xe0
+#define HX83102_UNKNOWN_E1 0xe1
 #define HX83102_SETTP1 0xe7
 #define HX83102_SETSPCCMD  0xe9
 
@@ -185,6 +186,113 @@ static int starry_himax83102_j02_init(struct hx83102 *ctx)
return dsi_ctx.accum_err;
 };
 
+static int boe_nv110wum_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xaf, 
0xaf, 0x2b, 0xeb, 0x42,
+0xe1, 0x4d, 0x36, 0x36, 0x36, 0x36, 0x1a, 
0x8b, 0x11, 0x65, 0x00,
+0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 
0x9a, 0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x11, 0x00, 0x00, 0x00, 
0x88, 0xf5, 0x22, 0x8f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x49, 0x49, 
0x32, 0x32, 0x14, 0x32,
+0x84, 0x6e, 0x84, 0x6e, 0x01, 0x9c);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x36, 0x36, 
0x22, 0x00, 0x00, 0xa0,
+0x61, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x30, 0xd4, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x37, 0x06, 
0x00, 0x02, 0x04, 0x0c, 0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_D2, 0x1f, 0x11, 
0x1f, 0x11);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x04,
+0x08, 0x04, 0x08, 0x37, 0x37, 0x64, 0x4b, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x10, 0x0a, 
0x00, 0x0a, 0x32, 0x17, 0x98,
+0x07, 0x98, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_mu

[PATCH v8 3/6] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V8:

- No change.

V7: 
https://lore.kernel.org/all/20240515014643.2715010-5-yangco...@huaqin.corp-partner.google.com

Chage since V7:

- No change.

V6: 
https://lore.kernel.org/all/20240511021326.288728-5-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-5-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-5-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-5-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-5-yangco...@huaqin.corp-partner.google.com

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index fc584b5088ff..baf8b053e375 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -16,6 +16,8 @@ properties:
   compatible:
 items:
   - enum:
+  # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v8 2/6] drm/panel: himax-hx83102: Break out as separate driver

[Cong Yang]

The Starry HX83102 based mipi panel should never have been part of the boe
tv101wum-n16 driver. Discussion with Doug and Linus in V1 [1], we need a
separate driver to enable the hx83102 controller.

In hx83102 driver, add DSI commands as macros. So it can add some panels
with same control model in the future.

In the old boe-tv101wum-nl6 driver inital cmds was invoked at the end of
prepare() function , and call 0x11 and 0x29 at end of inital. For
himax-hx83102 driver, we move 0x11 and 0x29 cmds invoked at prepare()
function.

Note:0x11 is mipi_dsi_dcs_exit_sleep_mode
 0x29 is mipi_dsi_dcs_set_display_on

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
Reviewed-by: Linus Walleij 
---
Chage since V8:

-  Fix Doug comment "return ret" change to "goto poweroff".

V7: 
https://lore.kernel.org/all/20240515014643.2715010-3-yangco...@huaqin.corp-partner.google.com

Chage since V7:

-  Fix Doug comment "return ret" change to "goto poweroff".

V6: 
https://lore.kernel.org/all/20240511021326.288728-3-yangco...@huaqin.corp-partner.google.com

Chage since V6:

-  Modify Move mipi_dsi_dcs_exit_sleep_mode and  mipi_dsi_dcs_set_display_on 
from enable() to prepare().

V5: 
https://lore.kernel.org/all/20240509015207.3271370-3-yangco...@huaqin.corp-partner.google.com

Chage since V5:

-  Modify hx83102_enable_extended_cmds function and adjust inital cmds 
indentation.update commit message.
-  Move the ->init() call to be made at the end of prepare() instead of the 
beginning of enable().

V4: 
https://lore.kernel.org/all/20240507135234.1356855-3-yangco...@huaqin.corp-partner.google.com

Chage since V4:

-  Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and depend 
Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-3-yangco...@huaqin.corp-partner.google.com

Chage since V3:

-  Drop excess flags and function, inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-3-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 -
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 473 ++
 4 files changed, 483 insertions(+), 133 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d037b3b8b999..acd3d09b5a05 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
  handling of power supplies or control signals. It implements automatic
  backlight handling if the panel is attached to a backlight controller.
 
+config DRM_PANEL_HIMAX_HX83102
+   tristate "Himax HX83102-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Himax HX83102 controller.
+
 config DRM_PANEL_HIMAX_HX83112A
tristate "Himax HX83112A-based DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f156d7fa0bcc..8fa9e38382f6 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
 obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) += panel-himax-hx83102.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index aab60cec0603..4b4b125a6c6b 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1399,108 +1399,6 @@ static int starry_qfh032011_53g_init(struct boe_panel 
*boe)
return 0;
 };
 
-static int starry_himax83102_j02_init(struct boe_panel *boe)
-{
-   struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
-
-   mipi_dsi_dcs_write_seq_multi(, 0xb9, 0x83, 0x10, 0x21, 0x55, 0x00);
-   mipi_dsi_dcs_write_seq_multi(, 0xb1, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, 
0x31, 0xd7, 0x2f,
-0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, 
0x65, 0x00, 0x88,
-0xfa, 0xff, 0xff, 0x8f, 0xff, 0x0

[PATCH v8 0/6] Break out as separate driver and add BOE nv110wum-l60 IVO t109nw41 MIPI-DSI panel

[Cong Yang]

Discussion with Doug and Linus in V1, we need a
separate driver to enable the hx83102 controller.

So this series this series mainly Break out as separate driver
for Starry-himax83102-j02 panels from boe tv101wum driver.

Then add BOE nv110wum-l60 and IVO t109nw41 in himax-hx83102 driver.

Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings

Note:this series depend Dous'series [1]
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org/

Changes in v8:
- Neil think need sent separately to ARM SoC maintainer with "arm64: defconfig: 
Enable HIMAX_HX83102 panel patch ", so remove it.  
- PATCH 1/6: No change.
- PATCH 2/6: Fix Doug comment "return ret" change to "goto poweroff".
- PATCH 3/6: No change.
- PATCH 4/6: No change.
- PATCH 5/6: No change.
- PATCH 6/6: No change.
- Link to 
v7:https://lore.kernel.org/all/20240515014643.2715010-1-yangco...@huaqin.corp-partner.google.com/


Changes in v7:
- PATCH 1/7: No change.
- PATCH 2/7: Fix Doug comment "return ret" change to "goto poweroff".
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.
- PATCH 6/7: No change.
- PATCH 7/7: Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.
- Link to 
v6:https://lore.kernel.org/all/20240511021326.288728-1-yangco...@huaqin.corp-partner.google.com/

Changes in v6:
- PATCH 1/7: No change.
- PATCH 2/7: Modify Move mipi_dsi_dcs_exit_sleep_mode and  
mipi_dsi_dcs_set_display_on from enable() to prepare().
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: No change.
- PATCH 6/7: No change.
- PATCH 7/7: - Adjust inital cmds indentation and check accum_err before 
calling mdelay in init().
-Adjust somes inital cmds to Optimize gamma.
- Link to 
v5:https://lore.kernel.org/all/20240509015207.3271370-1-yangco...@huaqin.corp-partner.google.com/

Changes in v5:
- PATCH 1/7: Modify compatible format.
- PATCH 2/7: Modify hx83102_enable_extended_cmds function and adjust inital 
cmds indentation.update commit message.
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- PATCH 6/7: No change.
- PATCH 7/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- Link to 
v4:https://lore.kernel.org/all/20240507135234.1356855-1-yangco...@huaqin.corp-partner.google.com

Changes in v4:
- PATCH 1/7: Update commit message and add fallback compatible.
- PATCH 2/7: Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and 
depend Dous'series [1].
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Depend Dous'series [1].
- PATCH 6/7: No change.
- PATCH 7/7: Depend Dous'series [1].
- Link to 
v3:https://lore.kernel.org/all/20240424023010.2099949-1-yangco...@huaqin.corp-partner.google.com/

Changes in v3:
- PATCH 1/7: Update commit message.
- PATCH 2/7: Drop excess flags and function, inital cmds use lowercasehex.
- PATCH 4/7: Update commit message.
- PATCH 5/7: inital cmds use lowercasehex.
- PATCH 6/7: Update commit message.
- PATCH 7/7: inital cmds use lowercasehex..
- Link to v2: 
https://lore.kernel.org/all/20240422090310.3311429-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/7: Delete Starry-himax83102-j02 from boe,tv101wum-nl6.yaml, add a new 
bindings file.
- PATCH 2/7: Break out as separate driver with Starry-himax83102-j02 panels.
- PATCH 3/7: Enable HIMAX_HX83102 panel.
- PATCH 4/7: Add compatible for BOE nv110wum-l60 in dt-bindings.
- PATCH 5/7: Support for BOE nv110wum-l60 MIPI-DSI panel.
- PATCH 6/7: Add compatible for IVO t109nw41 in dt-bindings..
- PATCH 7/7: Support for IVO t109nw41 MIPI-DSI panel.
- Link to v1: 
https://lore.kernel.org/all/20240410071439.2152588-1-yangco...@huaqin.corp-partner.google.com/
Cong Yang (6):
  dt-bindings: display: panel: Add himax hx83102 panel bindings
  drm/panel: himax-hx83102: Break out as separate driver
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   2 -
 .../bindings/display/panel/himax,hx83102.yaml |  77 ++
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 738 ++
 6 files changed, 825 insertions(+), 135 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

-- 
2.25.1

[PATCH v8 1/6] dt-bindings: display: panel: Add himax hx83102 panel bindings

[Cong Yang]

In V1, discussed with Doug and Linus [1], we need break out as separate
driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
controller, they have some common CMDS. So add new documentation for
this panels.

For himax83102-j02 controller, no need 3v3 supply, so remove it.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
Reviewed-by: Conor Dooley 
---
Chage since V8:

- No change.

V7: 
https://lore.kernel.org/all/20240515014643.2715010-2-yangco...@huaqin.corp-partner.google.com

Chage since V7:

- No change.

V6: 
https://lore.kernel.org/all/20240511021326.288728-2-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-2-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Modify compatible format.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-2-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Update commit message and add fallback compatible.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-2-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com
---
 .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
 .../bindings/display/panel/himax,hx83102.yaml | 73 +++
 2 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..53fb35f5c9de 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,8 +32,6 @@ properties:
   - innolux,hj110iz-01a
 # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
   - starry,2081101qfh032011-53g
-# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
-  - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
 
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
new file mode 100644
index ..fc584b5088ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83102 MIPI-DSI LCD panel controller
+
+maintainers:
+  - Cong Yang 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+  - starry,himax83102-j02
+  - const: himax,hx83102
+
+  reg:
+description: the virtual channel number of a DSI peripheral
+
+  enable-gpios:
+description: a GPIO spec for the enable pin
+
+  pp1800-supply:
+description: core voltage supply
+
+  avdd-supply:
+description: phandle of the regulator that provides positive voltage
+
+  avee-supply:
+description: phandle of the regulator that provides negative voltage
+
+  backlight: true
+  port: true
+  rotation: true
+
+required:
+  - compatible
+  - reg
+  - enable-gpios
+  - pp1800-supply
+  - avdd-supply
+  - avee-supply
+
+additionalProperties: false
+
+examples:
+  - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "starry,himax83102-j02", "himax,hx83102";
+reg = <0>;
+enable-gpios = < 45 0>;
+avdd-supply = <_lcd>;
+avee-supply = <_lcd>;
+pp1800-supply = <_lcd>;
+backlight = <_lcd0>;
+port {
+panel_in: endpoint {
+remote-endpoint = <_out>;
+};
+};
+};
+};
+
+...
-- 
2.25.1

Re: [v7 3/7] arm64: defconfig: Enable HIMAX_HX83102 panel

[cong yang]

Hi:

If it is determined that a separately patch needs to be sent, then I
will remove this patch in V8 series?

Doug Anderson  于2024年5月16日周四 05:28写道：

>
> Hi,
>
> On Wed, May 15, 2024 at 2:16 PM  wrote:
> >
> > Hi,
> >
> > On 15/05/2024 03:46, Cong Yang wrote:
> > > DRM_PANEL_HIMAX_HX83102 is being split out from 
> > > DRM_PANEL_BOE_TV101WUM_NL6.
> > > Since the arm64 defconfig had the BOE panel driver enabled, let's also
> > > enable the himax driver.
> > >
> > > Signed-off-by: Cong Yang 
> > > Reviewed-by: Douglas Anderson 
> > > ---
> > >   arch/arm64/configs/defconfig | 1 +
> > >   1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> > > index 2c30d617e180..687c86ddaece 100644
> > > --- a/arch/arm64/configs/defconfig
> > > +++ b/arch/arm64/configs/defconfig
> > > @@ -864,6 +864,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
> > >   CONFIG_DRM_PANEL_LVDS=m
> > >   CONFIG_DRM_PANEL_SIMPLE=m
> > >   CONFIG_DRM_PANEL_EDP=m
> > > +CONFIG_DRM_PANEL_HIMAX_HX83102=m
> > >   CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
> > >   CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
> > >   CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
> >
> > You should probably sent this one separately since only an ARM SoC 
> > maintainer
> > can apply this, probably via the qcom tree.
>
> Really? I always kinda figured that this was a bit like MAINTAINERS
> where it can come through a bunch of different trees. Certainly I've
> landed changes to it before through the drm-misc tree. If that was
> wrong then I'll certainly stop doing it, of course.
>
> -Doug

[v7 7/7] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
Reviewed-by: Linus Walleij 
---
Chage since V7:

- Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.

V6: 
https://lore.kernel.org/all/20240511021326.288728-8-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- Add hx83102_enable_extended_cmds(_ctx, false) at end of inital cmds.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-8-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init().
- Adjust somes inital cmds to Optimize gamma.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-8-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- inital cmds use lowercasehex.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-8-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V2: 
https://lore.kernel.org/all/20240422090310.3311429-8-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 132 
 1 file changed, 132 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 9464996e4ebd..fd3a5a132e72 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -293,6 +293,113 @@ static int boe_nv110wum_init(struct hx83102 *ctx)
return 0;
 };
 
+static int ivo_t109nw41_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xed, 
0xed, 0x0f, 0xcf, 0x42,
+0xf5, 0x39, 0x36, 0x36, 0x36, 0x36, 0x32, 
0x8b, 0x11, 0x65, 0x00, 0x88,
+0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0xd6, 
0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x22, 0x20, 0x00, 0x00, 
0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x35, 0x35, 
0x43, 0x43, 0x35, 0x35,
+0x30, 0x7a, 0x30, 0x7a, 0x01, 0x9d);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x34, 0x34, 
0x22, 0x11, 0x22, 0xa0,
+0x31, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xd3);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x22);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x13, 0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x07, 0x06, 
0x00, 0x02, 0x04, 0x2c,
+0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x08,
+0x08, 0x08, 0x08, 0x37, 0x07, 0x64, 0x7c, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x17, 0x97, 
0x07, 0x97, 0x32, 0x00, 0x02,
+0x00, 0x02, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x25, 0x24, 
0x25, 0x24, 0x18, 0x18,
+0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 0x05, 
0x04, 0x05, 0x04, 0x

[v7 6/7] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V7:

- No change.

V6: 
https://lore.kernel.org/all/20240511021326.288728-7-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-7-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-7-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-7-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-7-yangco...@huaqin.corp-partner.google.com/

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index baf8b053e375..c649fb085833 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -18,6 +18,8 @@ properties:
   - enum:
   # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+  # IVO t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[v7 5/7] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
Reviewed-by: Linus Walleij 
---
Chage since V7:

- Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.

V6: 
https://lore.kernel.org/all/20240511021326.288728-6-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-6-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init()..

V4: 
https://lore.kernel.org/all/20240507135234.1356855-6-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-6-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-6-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 133 
 1 file changed, 133 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 8eb5864d8d26..9464996e4ebd 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -44,6 +44,7 @@
 #define HX83102_SETGIP20xd6
 #define HX83102_SETGIP30xd8
 #define HX83102_SETGMA 0xe0
+#define HX83102_UNKNOWN_E1 0xe1
 #define HX83102_SETTP1 0xe7
 #define HX83102_SETSPCCMD  0xe9
 
@@ -185,6 +186,113 @@ static int starry_himax83102_j02_init(struct hx83102 *ctx)
return dsi_ctx.accum_err;
 };
 
+static int boe_nv110wum_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xaf, 
0xaf, 0x2b, 0xeb, 0x42,
+0xe1, 0x4d, 0x36, 0x36, 0x36, 0x36, 0x1a, 
0x8b, 0x11, 0x65, 0x00,
+0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 
0x9a, 0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x11, 0x00, 0x00, 0x00, 
0x88, 0xf5, 0x22, 0x8f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x49, 0x49, 
0x32, 0x32, 0x14, 0x32,
+0x84, 0x6e, 0x84, 0x6e, 0x01, 0x9c);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x36, 0x36, 
0x22, 0x00, 0x00, 0xa0,
+0x61, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x30, 0xd4, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x37, 0x06, 
0x00, 0x02, 0x04, 0x0c, 0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_D2, 0x1f, 0x11, 
0x1f, 0x11);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x04,
+0x08, 0x04, 0x08, 0x37, 0x37, 0x64, 0x4b, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x10, 0x0a, 
0x00, 0x0a, 0x32, 0x17, 0x98,
+0x07, 0x98, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x18, 0x18, 
0x18, 0x18, 0x1e, 0x1e,
+0x1e, 0x1e, 0x1f, 0x1f, 0x

[v7 4/7] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V7:

- No change.

V6: 
https://lore.kernel.org/all/20240511021326.288728-5-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-5-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-5-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-5-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-5-yangco...@huaqin.corp-partner.google.com

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index fc584b5088ff..baf8b053e375 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -16,6 +16,8 @@ properties:
   compatible:
 items:
   - enum:
+  # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[v7 2/7] drm/panel: himax-hx83102: Break out as separate driver

[Cong Yang]

The Starry HX83102 based mipi panel should never have been part of the boe
tv101wum-n16 driver. Discussion with Doug and Linus in V1 [1], we need a
separate driver to enable the hx83102 controller.

In hx83102 driver, add DSI commands as macros. So it can add some panels
with same control model in the future.

In the old boe-tv101wum-nl6 driver inital cmds was invoked at the end of
prepare() function , and call 0x11 and 0x29 at end of inital. For
himax-hx83102 driver, we move 0x11 and 0x29 cmds invoked at prepare()
function.

Note:0x11 is mipi_dsi_dcs_exit_sleep_mode
 0x29 is mipi_dsi_dcs_set_display_on

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
Reviewed-by: Linus Walleij 
---
Chage since V7:

-  Fix Doug comment "return ret" change to "goto poweroff".

V6: 
https://lore.kernel.org/all/20240511021326.288728-3-yangco...@huaqin.corp-partner.google.com

Chage since V6:

-  Modify Move mipi_dsi_dcs_exit_sleep_mode and  mipi_dsi_dcs_set_display_on 
from enable() to prepare().

V5: 
https://lore.kernel.org/all/20240509015207.3271370-3-yangco...@huaqin.corp-partner.google.com

Chage since V5:

-  Modify hx83102_enable_extended_cmds function and adjust inital cmds 
indentation.update commit message.
-  Move the ->init() call to be made at the end of prepare() instead of the 
beginning of enable().

V4: 
https://lore.kernel.org/all/20240507135234.1356855-3-yangco...@huaqin.corp-partner.google.com

Chage since V4:

-  Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and depend 
Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-3-yangco...@huaqin.corp-partner.google.com

Chage since V3:

-  Drop excess flags and function, inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-3-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 -
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 473 ++
 4 files changed, 483 insertions(+), 133 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d037b3b8b999..acd3d09b5a05 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
  handling of power supplies or control signals. It implements automatic
  backlight handling if the panel is attached to a backlight controller.
 
+config DRM_PANEL_HIMAX_HX83102
+   tristate "Himax HX83102-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Himax HX83102 controller.
+
 config DRM_PANEL_HIMAX_HX83112A
tristate "Himax HX83112A-based DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f156d7fa0bcc..8fa9e38382f6 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
 obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) += panel-himax-hx83102.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index aab60cec0603..4b4b125a6c6b 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1399,108 +1399,6 @@ static int starry_qfh032011_53g_init(struct boe_panel 
*boe)
return 0;
 };
 
-static int starry_himax83102_j02_init(struct boe_panel *boe)
-{
-   struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
-
-   mipi_dsi_dcs_write_seq_multi(, 0xb9, 0x83, 0x10, 0x21, 0x55, 0x00);
-   mipi_dsi_dcs_write_seq_multi(, 0xb1, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, 
0x31, 0xd7, 0x2f,
-0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, 
0x65, 0x00, 0x88,
-0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0x74, 
0x33);
-   mipi_dsi_dcs_write_seq_multi(, 0xb2, 0x00, 0x47, 0xb0, 0x80, 0x00, 
0x12, 0x72, 0x3c,
-0xa3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xf5);
-  

[v7 3/7] arm64: defconfig: Enable HIMAX_HX83102 panel

[Cong Yang]

DRM_PANEL_HIMAX_HX83102 is being split out from DRM_PANEL_BOE_TV101WUM_NL6.
Since the arm64 defconfig had the BOE panel driver enabled, let's also
enable the himax driver.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e180..687c86ddaece 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -864,6 +864,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_HIMAX_HX83102=m
 CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
-- 
2.25.1

[v7 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[Cong Yang]

In V1, discussed with Doug and Linus [1], we need break out as separate
driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
controller, they have some common CMDS. So add new documentation for
this panels.

For himax83102-j02 controller, no need 3v3 supply, so remove it.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
Reviewed-by: Conor Dooley 
---
Chage since V7:

- No change.

V6: 
https://lore.kernel.org/all/20240511021326.288728-2-yangco...@huaqin.corp-partner.google.com

Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-2-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Modify compatible format.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-2-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Update commit message and add fallback compatible.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-2-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com
---
 .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
 .../bindings/display/panel/himax,hx83102.yaml | 73 +++
 2 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..53fb35f5c9de 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,8 +32,6 @@ properties:
   - innolux,hj110iz-01a
 # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
   - starry,2081101qfh032011-53g
-# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
-  - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
 
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
new file mode 100644
index ..fc584b5088ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83102 MIPI-DSI LCD panel controller
+
+maintainers:
+  - Cong Yang 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+  - starry,himax83102-j02
+  - const: himax,hx83102
+
+  reg:
+description: the virtual channel number of a DSI peripheral
+
+  enable-gpios:
+description: a GPIO spec for the enable pin
+
+  pp1800-supply:
+description: core voltage supply
+
+  avdd-supply:
+description: phandle of the regulator that provides positive voltage
+
+  avee-supply:
+description: phandle of the regulator that provides negative voltage
+
+  backlight: true
+  port: true
+  rotation: true
+
+required:
+  - compatible
+  - reg
+  - enable-gpios
+  - pp1800-supply
+  - avdd-supply
+  - avee-supply
+
+additionalProperties: false
+
+examples:
+  - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "starry,himax83102-j02", "himax,hx83102";
+reg = <0>;
+enable-gpios = < 45 0>;
+avdd-supply = <_lcd>;
+avee-supply = <_lcd>;
+pp1800-supply = <_lcd>;
+backlight = <_lcd0>;
+port {
+panel_in: endpoint {
+remote-endpoint = <_out>;
+};
+};
+};
+};
+
+...
-- 
2.25.1

[PATCH v7 0/7] Break out as separate driver and add BOE nv110wum-l60 IVO t109nw41 MIPI-DSI panel

[Cong Yang]

Discussion with Doug and Linus in V1, we need a
separate driver to enable the hx83102 controller.

So this series this series mainly Break out as separate driver
for Starry-himax83102-j02 panels from boe tv101wum driver.

Then add BOE nv110wum-l60 and IVO t109nw41 in himax-hx83102 driver.

Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings

Note:this series depend Dous'series [1]
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org/

Changes in v7:
- PATCH 1/7: No change.
- PATCH 2/7: Fix Doug comment "return ret" change to "goto poweroff".
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.
- PATCH 6/7: No change.
- PATCH 7/7: Fine tune HFP/HBP/CLK to increase the frame rate to 60.01Hz.
- Link to 
v6:https://lore.kernel.org/all/20240511021326.288728-1-yangco...@huaqin.corp-partner.google.com/

Changes in v6:
- PATCH 1/7: No change.
- PATCH 2/7: Modify Move mipi_dsi_dcs_exit_sleep_mode and  
mipi_dsi_dcs_set_display_on from enable() to prepare().
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: No change.
- PATCH 6/7: No change.
- PATCH 7/7: - Adjust inital cmds indentation and check accum_err before 
calling mdelay in init().
-Adjust somes inital cmds to Optimize gamma.
- Link to 
v5:https://lore.kernel.org/all/20240509015207.3271370-1-yangco...@huaqin.corp-partner.google.com/

Changes in v5:
- PATCH 1/7: Modify compatible format.
- PATCH 2/7: Modify hx83102_enable_extended_cmds function and adjust inital 
cmds indentation.update commit message.
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- PATCH 6/7: No change.
- PATCH 7/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- Link to 
v4:https://lore.kernel.org/all/20240507135234.1356855-1-yangco...@huaqin.corp-partner.google.com

Changes in v4:
- PATCH 1/7: Update commit message and add fallback compatible.
- PATCH 2/7: Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and 
depend Dous'series [1].
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Depend Dous'series [1].
- PATCH 6/7: No change.
- PATCH 7/7: Depend Dous'series [1].
- Link to 
v3:https://lore.kernel.org/all/20240424023010.2099949-1-yangco...@huaqin.corp-partner.google.com/

Changes in v3:
- PATCH 1/7: Update commit message.
- PATCH 2/7: Drop excess flags and function, inital cmds use lowercasehex.
- PATCH 4/7: Update commit message.
- PATCH 5/7: inital cmds use lowercasehex.
- PATCH 6/7: Update commit message.
- PATCH 7/7: inital cmds use lowercasehex..
- Link to v2: 
https://lore.kernel.org/all/20240422090310.3311429-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/7: Delete Starry-himax83102-j02 from boe,tv101wum-nl6.yaml, add a new 
bindings file.
- PATCH 2/7: Break out as separate driver with Starry-himax83102-j02 panels.
- PATCH 3/7: Enable HIMAX_HX83102 panel.
- PATCH 4/7: Add compatible for BOE nv110wum-l60 in dt-bindings.
- PATCH 5/7: Support for BOE nv110wum-l60 MIPI-DSI panel.
- PATCH 6/7: Add compatible for IVO t109nw41 in dt-bindings..
- PATCH 7/7: Support for IVO t109nw41 MIPI-DSI panel.
- Link to v1: 
https://lore.kernel.org/all/20240410071439.2152588-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (7):
  dt-bindings: display: panel: Add himax hx83102 panel bindings
  drm/panel: himax-hx83102: Break out as separate driver
  arm64: defconfig: Enable HIMAX_HX83102 panel
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   2 -
 .../bindings/display/panel/himax,hx83102.yaml |  77 ++
 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 738 ++
 7 files changed, 826 insertions(+), 135 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

-- 
2.25.1

[PATCH v6 6/7] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-7-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-7-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-7-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-7-yangco...@huaqin.corp-partner.google.com/

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index baf8b053e375..c649fb085833 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -18,6 +18,8 @@ properties:
   - enum:
   # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+  # IVO t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v6 7/7] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V6:

- Add hx83102_enable_extended_cmds(_ctx, false) at end of inital cmds.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-8-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init().
- Adjust somes inital cmds to Optimize gamma.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-8-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- inital cmds use lowercasehex.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-8-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V2: 
https://lore.kernel.org/all/20240422090310.3311429-8-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 131 
 1 file changed, 131 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 0496e39ca5b8..37b2f04bc13a 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -293,6 +293,113 @@ static int boe_nv110wum_init(struct hx83102 *ctx)
return 0;
 };
 
+static int ivo_t109nw41_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xed, 
0xed, 0x0f, 0xcf, 0x42,
+0xf5, 0x39, 0x36, 0x36, 0x36, 0x36, 0x32, 
0x8b, 0x11, 0x65, 0x00, 0x88,
+0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0xd6, 
0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x22, 0x20, 0x00, 0x00, 
0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x35, 0x35, 
0x43, 0x43, 0x35, 0x35,
+0x30, 0x7a, 0x30, 0x7a, 0x01, 0x9d);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x34, 0x34, 
0x22, 0x11, 0x22, 0xa0,
+0x31, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xd3);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x22);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x13, 0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x07, 0x06, 
0x00, 0x02, 0x04, 0x2c,
+0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x08,
+0x08, 0x08, 0x08, 0x37, 0x07, 0x64, 0x7c, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x17, 0x97, 
0x07, 0x97, 0x32, 0x00, 0x02,
+0x00, 0x02, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x25, 0x24, 
0x25, 0x24, 0x18, 0x18,
+0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 0x05, 
0x04, 0x05, 0x04, 0x03, 0x02,
+0x03, 0x02, 0x01, 0x00, 0x01, 0x00, 0x1e, 
0x1e, 0x1e, 0x1e, 0x1f, 0x1f,
+0x1f, 0x1f, 0x21, 0x20, 0x21, 0x20, 0x18, 
0x18, 0x18, 0x18, 0x

[PATCH v6 5/7] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-6-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init()..

V4: 
https://lore.kernel.org/all/20240507135234.1356855-6-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-6-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-6-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 133 
 1 file changed, 133 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 05e8b5fa8c29..0496e39ca5b8 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -44,6 +44,7 @@
 #define HX83102_SETGIP20xd6
 #define HX83102_SETGIP30xd8
 #define HX83102_SETGMA 0xe0
+#define HX83102_UNKNOWN_E1 0xe1
 #define HX83102_SETTP1 0xe7
 #define HX83102_SETSPCCMD  0xe9
 
@@ -185,6 +186,113 @@ static int starry_himax83102_j02_init(struct hx83102 *ctx)
return dsi_ctx.accum_err;
 };
 
+static int boe_nv110wum_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xaf, 
0xaf, 0x2b, 0xeb, 0x42,
+0xe1, 0x4d, 0x36, 0x36, 0x36, 0x36, 0x1a, 
0x8b, 0x11, 0x65, 0x00,
+0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 
0x9a, 0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x11, 0x00, 0x00, 0x00, 
0x88, 0xf5, 0x22, 0x8f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x49, 0x49, 
0x32, 0x32, 0x14, 0x32,
+0x84, 0x6e, 0x84, 0x6e, 0x01, 0x9c);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x36, 0x36, 
0x22, 0x00, 0x00, 0xa0,
+0x61, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x30, 0xd4, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x37, 0x06, 
0x00, 0x02, 0x04, 0x0c, 0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_D2, 0x1f, 0x11, 
0x1f, 0x11);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x04,
+0x08, 0x04, 0x08, 0x37, 0x37, 0x64, 0x4b, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x10, 0x0a, 
0x00, 0x0a, 0x32, 0x17, 0x98,
+0x07, 0x98, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x18, 0x18, 
0x18, 0x18, 0x1e, 0x1e,
+0x1e, 0x1e, 0x1f, 0x1f, 0x1f, 0x1f, 0x24, 
0x24, 0x24, 0x24, 0x07, 0x06,
+0x07, 0x06, 0x05, 0x04, 0x05, 0x04, 0x03, 
0x02, 0x03, 0x02, 0x01, 0x00,
+0x01, 0x00, 0x21, 0x20, 0x21, 0x20, 0x18, 
0x

[PATCH v6 4/7] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V5:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-5-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-5-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-5-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-5-yangco...@huaqin.corp-partner.google.com

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index fc584b5088ff..baf8b053e375 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -16,6 +16,8 @@ properties:
   compatible:
 items:
   - enum:
+  # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v6 3/7] arm64: defconfig: Enable HIMAX_HX83102 panel

[Cong Yang]

DRM_PANEL_HIMAX_HX83102 is being split out from DRM_PANEL_BOE_TV101WUM_NL6.
Since the arm64 defconfig had the BOE panel driver enabled, let's also
enable the himax driver.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e180..687c86ddaece 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -864,6 +864,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_HIMAX_HX83102=m
 CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
-- 
2.25.1

[PATCH v6 2/7] drm/panel: himax-hx83102: Break out as separate driver

[Cong Yang]

The Starry HX83102 based mipi panel should never have been part of the boe
tv101wum-n16 driver. Discussion with Doug and Linus in V1 [1], we need a
separate driver to enable the hx83102 controller.

In hx83102 driver, add DSI commands as macros. So it can add some panels
with same control model in the future.

In the old boe-tv101wum-nl6 driver inital cmds was invoked at the end of
prepare() function , and call 0x11 and 0x29 at end of inital. For
himax-hx83102 driver, we move 0x11 and 0x29 cmds invoked at prepare()
function.

Note:0x11 is mipi_dsi_dcs_exit_sleep_mode
 0x29 is mipi_dsi_dcs_set_display_on

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
Chage since V6:

-  Modify Move mipi_dsi_dcs_exit_sleep_mode and  mipi_dsi_dcs_set_display_on 
from enable() to prepare().

V5: 
https://lore.kernel.org/all/20240509015207.3271370-3-yangco...@huaqin.corp-partner.google.com

Chage since V5:

-  Modify hx83102_enable_extended_cmds function and adjust inital cmds 
indentation.update commit message.
-  Move the ->init() call to be made at the end of prepare() instead of the 
beginning of enable().

V4: 
https://lore.kernel.org/all/20240507135234.1356855-3-yangco...@huaqin.corp-partner.google.com

Chage since V4:

-  Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and depend 
Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-3-yangco...@huaqin.corp-partner.google.com

Chage since V3:

-  Drop excess flags and function, inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-3-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 -
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 473 ++
 4 files changed, 483 insertions(+), 133 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d037b3b8b999..acd3d09b5a05 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
  handling of power supplies or control signals. It implements automatic
  backlight handling if the panel is attached to a backlight controller.
 
+config DRM_PANEL_HIMAX_HX83102
+   tristate "Himax HX83102-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Himax HX83102 controller.
+
 config DRM_PANEL_HIMAX_HX83112A
tristate "Himax HX83112A-based DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f156d7fa0bcc..8fa9e38382f6 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
 obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) += panel-himax-hx83102.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index aab60cec0603..4b4b125a6c6b 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1399,108 +1399,6 @@ static int starry_qfh032011_53g_init(struct boe_panel 
*boe)
return 0;
 };
 
-static int starry_himax83102_j02_init(struct boe_panel *boe)
-{
-   struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
-
-   mipi_dsi_dcs_write_seq_multi(, 0xb9, 0x83, 0x10, 0x21, 0x55, 0x00);
-   mipi_dsi_dcs_write_seq_multi(, 0xb1, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, 
0x31, 0xd7, 0x2f,
-0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, 
0x65, 0x00, 0x88,
-0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0x74, 
0x33);
-   mipi_dsi_dcs_write_seq_multi(, 0xb2, 0x00, 0x47, 0xb0, 0x80, 0x00, 
0x12, 0x72, 0x3c,
-0xa3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xf5);
-   mipi_dsi_dcs_write_seq_multi(, 0xb4, 0x76, 0x76, 0x76, 0x76, 0x76, 
0x76, 0x63, 0x5c,
-0x63, 0x5c, 0x01, 0x9e);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0xcd);
-   mipi_dsi_dcs_wr

[PATCH v6 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[Cong Yang]

In V1, discussed with Doug and Linus [1], we need break out as separate
driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
controller, they have some common CMDS. So add new documentation for
this panels.

For himax83102-j02 controller, no need 3v3 supply, so remove it.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
Reviewed-by: Conor Dooley 
---
Chage since V6:

- No change.

V5: 
https://lore.kernel.org/all/20240509015207.3271370-2-yangco...@huaqin.corp-partner.google.com

Chage since V5:

- Modify compatible format.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-2-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Update commit message and add fallback compatible.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-2-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com
---
 .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
 .../bindings/display/panel/himax,hx83102.yaml | 73 +++
 2 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..53fb35f5c9de 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,8 +32,6 @@ properties:
   - innolux,hj110iz-01a
 # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
   - starry,2081101qfh032011-53g
-# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
-  - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
 
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
new file mode 100644
index ..fc584b5088ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83102 MIPI-DSI LCD panel controller
+
+maintainers:
+  - Cong Yang 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+  - starry,himax83102-j02
+  - const: himax,hx83102
+
+  reg:
+description: the virtual channel number of a DSI peripheral
+
+  enable-gpios:
+description: a GPIO spec for the enable pin
+
+  pp1800-supply:
+description: core voltage supply
+
+  avdd-supply:
+description: phandle of the regulator that provides positive voltage
+
+  avee-supply:
+description: phandle of the regulator that provides negative voltage
+
+  backlight: true
+  port: true
+  rotation: true
+
+required:
+  - compatible
+  - reg
+  - enable-gpios
+  - pp1800-supply
+  - avdd-supply
+  - avee-supply
+
+additionalProperties: false
+
+examples:
+  - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "starry,himax83102-j02", "himax,hx83102";
+reg = <0>;
+enable-gpios = < 45 0>;
+avdd-supply = <_lcd>;
+avee-supply = <_lcd>;
+pp1800-supply = <_lcd>;
+backlight = <_lcd0>;
+port {
+panel_in: endpoint {
+remote-endpoint = <_out>;
+};
+};
+};
+};
+
+...
-- 
2.25.1

[PATCH v6 0/7] Break out as separate driver and add BOE nv110wum-l60 IVO t109nw41 MIPI-DSI panel

[Cong Yang]

Discussion with Doug and Linus in V1, we need a
separate driver to enable the hx83102 controller.

So this series this series mainly Break out as separate driver
for Starry-himax83102-j02 panels from boe tv101wum driver.

Then add BOE nv110wum-l60 and IVO t109nw41 in himax-hx83102 driver.

Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings

Note:this series depend Dous'series [1]
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org/

Changes in v5:
- PATCH 1/7: Modify compatible format.
- PATCH 2/7: Modify hx83102_enable_extended_cmds function and adjust inital 
cmds indentation.update commit message.
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- PATCH 6/7: No change.
- PATCH 7/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- Link to 
v4:https://lore.kernel.org/all/20240507135234.1356855-1-yangco...@huaqin.corp-partner.google.com

Changes in v4:
- PATCH 1/7: Update commit message and add fallback compatible.
- PATCH 2/7: Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and 
depend Dous'series [1].
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Depend Dous'series [1].
- PATCH 6/7: No change.
- PATCH 7/7: Depend Dous'series [1].
- Link to 
v3:https://lore.kernel.org/all/20240424023010.2099949-1-yangco...@huaqin.corp-partner.google.com/

Changes in v3:
- PATCH 1/7: Update commit message.
- PATCH 2/7: Drop excess flags and function, inital cmds use lowercasehex.
- PATCH 4/7: Update commit message.
- PATCH 5/7: inital cmds use lowercasehex.
- PATCH 6/7: Update commit message.
- PATCH 7/7: inital cmds use lowercasehex..
- Link to v2: 
https://lore.kernel.org/all/20240422090310.3311429-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/7: Delete Starry-himax83102-j02 from boe,tv101wum-nl6.yaml, add a new 
bindings file.
- PATCH 2/7: Break out as separate driver with Starry-himax83102-j02 panels.
- PATCH 3/7: Enable HIMAX_HX83102 panel.
- PATCH 4/7: Add compatible for BOE nv110wum-l60 in dt-bindings.
- PATCH 5/7: Support for BOE nv110wum-l60 MIPI-DSI panel.
- PATCH 6/7: Add compatible for IVO t109nw41 in dt-bindings..
- PATCH 7/7: Support for IVO t109nw41 MIPI-DSI panel.
- Link to v1: 
https://lore.kernel.org/all/20240410071439.2152588-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (7):
  dt-bindings: display: panel: Add himax hx83102 panel bindings
  drm/panel: himax-hx83102: Break out as separate driver
  arm64: defconfig: Enable HIMAX_HX83102 panel
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   2 -
 .../bindings/display/panel/himax,hx83102.yaml |  77 ++
 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 738 ++
 7 files changed, 826 insertions(+), 135 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

-- 
2.25.1

Re: [PATCH v5 7/7] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[cong yang]

Hi,

Doug Anderson  于2024年5月10日周五 00:49写道：
>
> Hi,
>
> On Wed, May 8, 2024 at 6:53 PM Cong Yang
>  wrote:
> >
> > +static int ivo_t109nw41_init(struct hx83102 *ctx)
> > +{
> > +   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
> > +
> > +   msleep(60);
> > +
> > +   hx83102_enable_extended_cmds(_ctx, true);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 
> > 0xed, 0xed, 0x0f, 0xcf, 0x42,
> > +0xf5, 0x39, 0x36, 0x36, 0x36, 0x36, 
> > 0x32, 0x8b, 0x11, 0x65, 0x00, 0x88,
> > +0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 
> > 0xd6, 0x33);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
> > 0xb0, 0x80, 0x00, 0x12,
> > +0x71, 0x3c, 0xa3, 0x22, 0x20, 0x00, 
> > 0x00, 0x88, 0x01);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x35, 0x35, 
> > 0x43, 0x43, 0x35, 0x35,
> > +0x30, 0x7a, 0x30, 0x7a, 0x01, 0x9d);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0xc4);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x34, 0x34, 
> > 0x22, 0x11, 0x22, 0xa0,
> > +0x31, 0x08, 0xf5, 0x03);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xd3);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x22);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
> > 0x13, 0x88, 0x01);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 
> > 0x13, 0x07, 0x00, 0x0f, 0x34);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 
> > 0x03, 0x44);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x07, 
> > 0x06, 0x00, 0x02, 0x04, 0x2c,
> > +0xff);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
> > 0x00, 0x00, 0x00, 0x08,
> > +0x08, 0x08, 0x08, 0x37, 0x07, 0x64, 
> > 0x7c, 0x11, 0x11, 0x03, 0x03, 0x32,
> > +0x10, 0x0e, 0x00, 0x0e, 0x32, 0x17, 
> > 0x97, 0x07, 0x97, 0x32, 0x00, 0x02,
> > +0x00, 0x02, 0x00, 0x00);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x25, 0x24, 
> > 0x25, 0x24, 0x18, 0x18,
> > +0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 
> > 0x05, 0x04, 0x05, 0x04, 0x03, 0x02,
> > +0x03, 0x02, 0x01, 0x00, 0x01, 0x00, 
> > 0x1e, 0x1e, 0x1e, 0x1e, 0x1f, 0x1f,
> > +0x1f, 0x1f, 0x21, 0x20, 0x21, 0x20, 
> > 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> > +0x18, 0x18);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP3, 0xaa, 0xaa, 
> > 0xaa, 0xaa, 0xaa, 0xa0,
> > +0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 
> > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
> > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> > +0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGMA, 0x04, 0x04, 
> > 0x06, 0x0a, 0x0a, 0x05,
> > +0x12, 0x14, 0x17, 0x13, 0x2c, 0x33, 
> > 0x39, 0

Re: [PATCH v5 2/7] drm/panel: himax-hx83102: Break out as separate driver

[cong yang]

Hi,

Doug Anderson  于2024年5月10日周五 00:42写道：
>
> Hi,
>
> On Wed, May 8, 2024 at 6:53 PM Cong Yang
>  wrote:
> >
> > +static int hx83102_enable(struct drm_panel *panel)
> > +{
> > +   struct hx83102 *ctx = panel_to_hx83102(panel);
> > +   struct mipi_dsi_device *dsi = ctx->dsi;
> > +   struct device *dev = >dev;
> > +   int ret;
> > +
> > +   ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> > +   if (ret) {
> > +   dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
> > +   return ret;
> > +   }
> > +
> > +   msleep(120);
> > +
> > +   ret = mipi_dsi_dcs_set_display_on(dsi);
> > +   if (ret) {
> > +   dev_err(dev, "Failed to turn on the display: %d\n", ret);
> > +   return ret;
> > +   }
>
> FWIW, I think that the mipi_dsi_dcs_exit_sleep_mode(), msleep(120),
> and mipi_dsi_dcs_set_display_on() should also be in the prepare() to
> match how they were in the boe-tv101wum-nl6.c driver, right? Then the
> enable() would be left with just the simple "msleep(130)".
>
> I know it doesn't make much difference and it probably doesn't matter
> and maybe I'm just being a little nitpicky, but given that the
> prepare() and enable() functions are unique phases I'd rather be
> explicit if we've moving something from one phase to the other.

Yes, if it is consistent with the boe-tv101wum-nl6.c driver, then it
should be moved to prepare().
However, I was working from the driver readability,
enable() corresponds to 0x11 & 0x29.
disable() corresponds to 0x28 & 0x10.
..
Ok, I'll be happy to send V6 version to fix that, thanks!

>
>
> -Doug

[PATCH v5 7/7] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init().
- Adjust somes inital cmds to Optimize gamma.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-8-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- inital cmds use lowercasehex.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-8-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V2: 
https://lore.kernel.org/all/20240422090310.3311429-8-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 131 
 1 file changed, 131 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index f1273e1c92d2..03a82e48da11 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -293,6 +293,112 @@ static int boe_nv110wum_init(struct hx83102 *ctx)
return 0;
 };
 
+static int ivo_t109nw41_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xed, 
0xed, 0x0f, 0xcf, 0x42,
+0xf5, 0x39, 0x36, 0x36, 0x36, 0x36, 0x32, 
0x8b, 0x11, 0x65, 0x00, 0x88,
+0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0xd6, 
0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x22, 0x20, 0x00, 0x00, 
0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x35, 0x35, 
0x43, 0x43, 0x35, 0x35,
+0x30, 0x7a, 0x30, 0x7a, 0x01, 0x9d);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x34, 0x34, 
0x22, 0x11, 0x22, 0xa0,
+0x31, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xd3);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x22);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x13, 0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x07, 0x06, 
0x00, 0x02, 0x04, 0x2c,
+0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x08,
+0x08, 0x08, 0x08, 0x37, 0x07, 0x64, 0x7c, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x17, 0x97, 
0x07, 0x97, 0x32, 0x00, 0x02,
+0x00, 0x02, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x25, 0x24, 
0x25, 0x24, 0x18, 0x18,
+0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 0x05, 
0x04, 0x05, 0x04, 0x03, 0x02,
+0x03, 0x02, 0x01, 0x00, 0x01, 0x00, 0x1e, 
0x1e, 0x1e, 0x1e, 0x1f, 0x1f,
+0x1f, 0x1f, 0x21, 0x20, 0x21, 0x20, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP3, 0xaa, 0xaa, 
0xaa, 0xaa, 0xaa, 0xa0,
+0xaa, 0xaa, 0xaa, 0x

[PATCH v5 6/7] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-7-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-7-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-7-yangco...@huaqin.corp-partner.google.com/

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index baf8b053e375..c649fb085833 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -18,6 +18,8 @@ properties:
   - enum:
   # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+  # IVO t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v5 5/7] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V5:

- Adjust inital cmds indentation and check accum_err before calling mdelay in 
init()..

V4: 
https://lore.kernel.org/all/20240507135234.1356855-6-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-6-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-6-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 133 
 1 file changed, 133 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 76558b1091a8..f1273e1c92d2 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -44,6 +44,7 @@
 #define HX83102_SETGIP20xd6
 #define HX83102_SETGIP30xd8
 #define HX83102_SETGMA 0xe0
+#define HX83102_UNKNOWN_E1 0xe1
 #define HX83102_SETTP1 0xe7
 #define HX83102_SETSPCCMD  0xe9
 
@@ -185,6 +186,113 @@ static int starry_himax83102_j02_init(struct hx83102 *ctx)
return dsi_ctx.accum_err;
 };
 
+static int boe_nv110wum_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(_ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xaf, 
0xaf, 0x2b, 0xeb, 0x42,
+0xe1, 0x4d, 0x36, 0x36, 0x36, 0x36, 0x1a, 
0x8b, 0x11, 0x65, 0x00,
+0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 
0x9a, 0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x11, 0x00, 0x00, 0x00, 
0x88, 0xf5, 0x22, 0x8f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x49, 0x49, 
0x32, 0x32, 0x14, 0x32,
+0x84, 0x6e, 0x84, 0x6e, 0x01, 0x9c);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x36, 0x36, 
0x22, 0x00, 0x00, 0xa0,
+0x61, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x30, 0xd4, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x37, 0x06, 
0x00, 0x02, 0x04, 0x0c, 0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_D2, 0x1f, 0x11, 
0x1f, 0x11);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x04,
+0x08, 0x04, 0x08, 0x37, 0x37, 0x64, 0x4b, 
0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x10, 0x0a, 
0x00, 0x0a, 0x32, 0x17, 0x98,
+0x07, 0x98, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x18, 0x18, 
0x18, 0x18, 0x1e, 0x1e,
+0x1e, 0x1e, 0x1f, 0x1f, 0x1f, 0x1f, 0x24, 
0x24, 0x24, 0x24, 0x07, 0x06,
+0x07, 0x06, 0x05, 0x04, 0x05, 0x04, 0x03, 
0x02, 0x03, 0x02, 0x01, 0x00,
+0x01, 0x00, 0x21, 0x20, 0x21, 0x20, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGI

[PATCH v5 4/7] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
Acked-by: Conor Dooley 
---
Chage since V5:

- No change.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-5-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-5-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-5-yangco...@huaqin.corp-partner.google.com

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index fc584b5088ff..baf8b053e375 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -16,6 +16,8 @@ properties:
   compatible:
 items:
   - enum:
+  # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v5 3/7] arm64: defconfig: Enable HIMAX_HX83102 panel

[Cong Yang]

DRM_PANEL_HIMAX_HX83102 is being split out from DRM_PANEL_BOE_TV101WUM_NL6.
Since the arm64 defconfig had the BOE panel driver enabled, let's also
enable the himax driver.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e180..687c86ddaece 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -864,6 +864,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_HIMAX_HX83102=m
 CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
-- 
2.25.1

[PATCH v5 2/7] drm/panel: himax-hx83102: Break out as separate driver

[Cong Yang]

The Starry HX83102 based mipi panel should never have been part of the boe
tv101wum-n16 driver. Discussion with Doug and Linus in V1 [1], we need a
separate driver to enable the hx83102 controller.

In hx83102 driver, add DSI commands as macros. So it can add some panels
with same control model in the future.

In the old boe-tv101wum-nl6 driver inital cmds was invoked at the end of
prepare() function , and call 0x11 and 0x29 at end of inital. For
himax-hx83102 driver, we move 0x11 and 0x29 cmds invoked at enable()
function. For panel timing, I think there is no much difference.

Note:0x11 is mipi_dsi_dcs_exit_sleep_mode
 0x29 is mipi_dsi_dcs_set_display_on

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
Chage since V5:

-  Modify hx83102_enable_extended_cmds function and adjust inital cmds 
indentation.update commit message.
-  Move the ->init() call to be made at the end of prepare() instead of the 
beginning of enable().

V4: 
https://lore.kernel.org/all/20240507135234.1356855-3-yangco...@huaqin.corp-partner.google.com

Chage since V4:

-  Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and depend 
Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-3-yangco...@huaqin.corp-partner.google.com

Chage since V3:

-  Drop excess flags and function, inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-3-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 -
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 477 ++
 4 files changed, 487 insertions(+), 133 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d037b3b8b999..acd3d09b5a05 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
  handling of power supplies or control signals. It implements automatic
  backlight handling if the panel is attached to a backlight controller.
 
+config DRM_PANEL_HIMAX_HX83102
+   tristate "Himax HX83102-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Himax HX83102 controller.
+
 config DRM_PANEL_HIMAX_HX83112A
tristate "Himax HX83112A-based DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f156d7fa0bcc..8fa9e38382f6 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
 obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) += panel-himax-hx83102.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index aab60cec0603..4b4b125a6c6b 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1399,108 +1399,6 @@ static int starry_qfh032011_53g_init(struct boe_panel 
*boe)
return 0;
 };
 
-static int starry_himax83102_j02_init(struct boe_panel *boe)
-{
-   struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
-
-   mipi_dsi_dcs_write_seq_multi(, 0xb9, 0x83, 0x10, 0x21, 0x55, 0x00);
-   mipi_dsi_dcs_write_seq_multi(, 0xb1, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, 
0x31, 0xd7, 0x2f,
-0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, 
0x65, 0x00, 0x88,
-0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0x74, 
0x33);
-   mipi_dsi_dcs_write_seq_multi(, 0xb2, 0x00, 0x47, 0xb0, 0x80, 0x00, 
0x12, 0x72, 0x3c,
-0xa3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xf5);
-   mipi_dsi_dcs_write_seq_multi(, 0xb4, 0x76, 0x76, 0x76, 0x76, 0x76, 
0x76, 0x63, 0x5c,
-0x63, 0x5c, 0x01, 0x9e);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0xcd);
-   mipi_dsi_dcs_write_seq_multi(, 0xba, 0x84);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0x3f);
-   mipi_dsi_dcs_write_seq_multi(, 0xbc, 0x1b, 0x04);
-   mipi_dsi_dcs_write_seq_multi(, 0xbe, 0x20);
-   mi

[PATCH v5 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[Cong Yang]

In V1, discussed with Doug and Linus [1], we need break out as separate
driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
controller, they have some common CMDS. So add new documentation for
this panels.

For himax83102-j02 controller, no need 3v3 supply, so remove it.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
Chage since V5:

- Modify compatible format.

V4: 
https://lore.kernel.org/all/20240507135234.1356855-2-yangco...@huaqin.corp-partner.google.com

Chage since V4:

- Update commit message and add fallback compatible.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-2-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com

---
 .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
 .../bindings/display/panel/himax,hx83102.yaml | 73 +++
 2 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..53fb35f5c9de 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,8 +32,6 @@ properties:
   - innolux,hj110iz-01a
 # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
   - starry,2081101qfh032011-53g
-# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
-  - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
 
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
new file mode 100644
index ..fc584b5088ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83102 MIPI-DSI LCD panel controller
+
+maintainers:
+  - Cong Yang 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+  - starry,himax83102-j02
+  - const: himax,hx83102
+
+  reg:
+description: the virtual channel number of a DSI peripheral
+
+  enable-gpios:
+description: a GPIO spec for the enable pin
+
+  pp1800-supply:
+description: core voltage supply
+
+  avdd-supply:
+description: phandle of the regulator that provides positive voltage
+
+  avee-supply:
+description: phandle of the regulator that provides negative voltage
+
+  backlight: true
+  port: true
+  rotation: true
+
+required:
+  - compatible
+  - reg
+  - enable-gpios
+  - pp1800-supply
+  - avdd-supply
+  - avee-supply
+
+additionalProperties: false
+
+examples:
+  - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "starry,himax83102-j02", "himax,hx83102";
+reg = <0>;
+enable-gpios = < 45 0>;
+avdd-supply = <_lcd>;
+avee-supply = <_lcd>;
+pp1800-supply = <_lcd>;
+backlight = <_lcd0>;
+port {
+panel_in: endpoint {
+remote-endpoint = <_out>;
+};
+};
+};
+};
+
+...
-- 
2.25.1

[PATCH v5 0/7] Break out as separate driver and add BOE nv110wum-l60 IVO t109nw41 MIPI-DSI panel

[Cong Yang]

Discussion with Doug and Linus in V1, we need a
separate driver to enable the hx83102 controller.

So this series this series mainly Break out as separate driver
for Starry-himax83102-j02 panels from boe tv101wum driver.

Then add BOE nv110wum-l60 and IVO t109nw41 in himax-hx83102 driver.

Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings

Note:this series depend Dous'series [1]
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org/

Changes in v5:
- PATCH 1/7: Modify compatible format.
- PATCH 2/7: Modify hx83102_enable_extended_cmds function and adjust inital 
cmds indentation.update commit message.
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- PATCH 6/7: No change.
- PATCH 7/7: Adjust inital cmds indentation and check accum_err before calling 
mdelay in init().
- Link to 
v4:https://lore.kernel.org/all/20240507135234.1356855-1-yangco...@huaqin.corp-partner.google.com

Changes in v4:
- PATCH 1/7: Update commit message and add fallback compatible.
- PATCH 2/7: Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and 
depend Dous'series [1].
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Depend Dous'series [1].
- PATCH 6/7: No change.
- PATCH 7/7: Depend Dous'series [1].
- Link to 
v3:https://lore.kernel.org/all/20240424023010.2099949-1-yangco...@huaqin.corp-partner.google.com/

Changes in v3:
- PATCH 1/7: Update commit message.
- PATCH 2/7: Drop excess flags and function, inital cmds use lowercasehex.
- PATCH 4/7: Update commit message.
- PATCH 5/7: inital cmds use lowercasehex.
- PATCH 6/7: Update commit message.
- PATCH 7/7: inital cmds use lowercasehex..
- Link to v2: 
https://lore.kernel.org/all/20240422090310.3311429-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/7: Delete Starry-himax83102-j02 from boe,tv101wum-nl6.yaml, add a new 
bindings file.
- PATCH 2/7: Break out as separate driver with Starry-himax83102-j02 panels.
- PATCH 3/7: Enable HIMAX_HX83102 panel.
- PATCH 4/7: Add compatible for BOE nv110wum-l60 in dt-bindings.
- PATCH 5/7: Support for BOE nv110wum-l60 MIPI-DSI panel.
- PATCH 6/7: Add compatible for IVO t109nw41 in dt-bindings..
- PATCH 7/7: Support for IVO t109nw41 MIPI-DSI panel.
- Link to v1: 
https://lore.kernel.org/all/20240410071439.2152588-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (7):
  dt-bindings: display: panel: Add himax hx83102 panel bindings
  drm/panel: himax-hx83102: Break out as separate driver
  arm64: defconfig: Enable HIMAX_HX83102 panel
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   2 -
 .../bindings/display/panel/himax,hx83102.yaml |  77 ++
 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 741 ++
 7 files changed, 829 insertions(+), 135 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

-- 
2.25.1

Re: [PATCH v4 5/7] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[cong yang]

Hi,

Doug Anderson  于2024年5月8日周三 07:35写道：
>
> Hi,
>
> On Tue, May 7, 2024 at 6:53 AM Cong Yang
>  wrote:
> >
> > +static int boe_nv110wum_init(struct hx83102 *ctx)
> > +{
> > +   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
> > +
> > +   msleep(60);
> > +
> > +   hx83102_enable_extended_cmds(ctx, true);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 
> > 0xaf, 0xaf, 0x2b, 0xeb, 0x42,
> > +0xe1, 0x4d, 0x36, 0x36, 0x36, 
> > 0x36, 0x1a, 0x8b, 0x11, 0x65, 0x00,
> > +0x88, 0xfa, 0xff, 0xff, 0x8f, 
> > 0xff, 0x08, 0x9a, 0x33);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
> > 0xb0, 0x80, 0x00, 0x12,
> > +0x71, 0x3c, 0xa3, 0x11, 0x00, 
> > 0x00, 0x00, 0x88, 0xf5, 0x22, 0x8f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x49, 0x49, 
> > 0x32, 0x32, 0x14, 0x32,
> > +0x84, 0x6e, 0x84, 0x6e, 0x01, 
> > 0x9c);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0x84);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x36, 0x36, 
> > 0x22, 0x00, 0x00, 0xa0,
> > +0x61, 0x08, 0xf5, 0x03);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
> > 0x30, 0xd4, 0x01);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 
> > 0x13, 0x07, 0x00, 0x0f, 0x34);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 
> > 0x03, 0x44);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x37, 
> > 0x06, 0x00, 0x02, 0x04, 0x0c, 0xff);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_D2, 0x1f, 
> > 0x11, 0x1f, 0x11);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
> > 0x00, 0x00, 0x00, 0x04,
> > +0x08, 0x04, 0x08, 0x37, 0x37, 
> > 0x64, 0x4b, 0x11, 0x11, 0x03, 0x03, 0x32,
> > +0x10, 0x0e, 0x00, 0x0e, 0x32, 
> > 0x10, 0x0a, 0x00, 0x0a, 0x32, 0x17, 0x98,
> > +0x07, 0x98, 0x00, 0x00);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x18, 0x18, 
> > 0x18, 0x18, 0x1e, 0x1e,
> > +0x1e, 0x1e, 0x1f, 0x1f, 0x1f, 
> > 0x1f, 0x24, 0x24, 0x24, 0x24, 0x07, 0x06,
> > +0x07, 0x06, 0x05, 0x04, 0x05, 
> > 0x04, 0x03, 0x02, 0x03, 0x02, 0x01, 0x00,
> > +0x01, 0x00, 0x21, 0x20, 0x21, 
> > 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
> > +0x18, 0x18);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP3, 0xaf, 0xaa, 
> > 0xaa, 0xaa, 0xaa, 0xa0,
> > +0xaf, 0xaa, 0xaa, 0xaa, 0xaa, 
> > 0xa0);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGMA, 0x00, 0x05, 
> > 0x0d, 0x14, 0x1b, 0x2c,
> > +0x44, 0x49, 0x51, 0x4c, 0x67, 
> > 0x6c, 0x71, 0x80, 0x7d, 0x84, 0x8d, 0xa0,
> > +0xa0, 0x4f, 0x58, 0x64, 0x73, 
> > 0x00, 0x05, 0x0d, 0x14, 0x1b, 0x2c, 0x44,
> > +0x49, 0x51, 0x4c, 0x67, 0x6c, 
> > 0x71, 0x80, 0x7d, 0x84, 0x8d, 0xa0, 0xa0,
> > +  

Re: [PATCH v4 2/7] drm/panel: himax-hx83102: Break out as separate driver

[cong yang]

Hi,

Doug Anderson  于2024年5月8日周三 07:35写道：
>
> Hi,
>
> On Tue, May 7, 2024 at 6:53 AM Cong Yang
>  wrote:
> >
> > +static int hx83102_enable_extended_cmds(struct hx83102 *ctx, bool enable)
> > +{
> > +   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
> > +
> > +   if (enable)
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETEXTC, 
> > 0x83, 0x10, 0x21, 0x55, 0x00);
> > +   else
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETEXTC, 
> > 0x00, 0x00, 0x00);
> > +
> > +   return 0;
>
> You're throwing away the error codes returned by the
> mipi_dsi_dcs_write_seq_multi(), which you shouldn't do. You have two
> options:
>
> Option #1: return dsi_ctx.accum_err here and then check the return
> value in callers.
>
> Option #2: instead of having this function take "struct hx83102 *ctx",
> just have it take "struct mipi_dsi_multi_context *dsi_ctx". Then it
> can return void and everything will be fine.
>
> I'd prefer option #2 but either is OK w/ me.

Ok,I will fix in V4, thanks.

>
>
> > +static int starry_himax83102_j02_init(struct hx83102 *ctx)
> > +{
> > +   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
> > +
> > +   hx83102_enable_extended_cmds(ctx, true);
> > +   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 
> > 0xb5, 0xb5, 0x31, 0xf1,
> > +0x31, 0xd7, 0x2f, 0x36, 0x36, 
> > 0x36, 0x36, 0x1a, 0x8b, 0x11,
> > +0x65, 0x00, 0x88, 0xfa, 0xff, 
> > 0xff, 0x8f, 0xff, 0x08, 0x74,
> > +0x33);
>
> The indentation is still off here. You have 5 tabs followed by a
> space. To make things line up with the opening brace I think it should
> be 4 tabs followed by 5 spaces.

Sorry, my  editor 'Visual Studio Code' It seems that the correct indentation
is not recognized. I have checked it through the 'vim' editor in the V4 version.
Thanks.

>
>
> > +static int hx83102_enable(struct drm_panel *panel)
> > +{
> > +   struct hx83102 *ctx = panel_to_hx83102(panel);
> > +   struct mipi_dsi_device *dsi = ctx->dsi;
> > +   struct device *dev = >dev;
> > +   int ret;
> > +
> > +   ret = ctx->desc->init(ctx);
> > +   if (ret)
> > +   return ret;
>
> You're still changing behavior here. In the old boe-tv101wum-nl6
> driver the init() function was invoked at the end of prepare(). Now
> you've got it at the beginning of enable(). If this change is
> important it should be in a separate commit and explained.
>
>
> > +   ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> > +   if (ret) {
> > +   dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
> > +   return ret;
> > +   }
> > +
> > +   msleep(120);
> > +
> > +   ret = mipi_dsi_dcs_set_display_on(dsi);
> > +   if (ret) {
> > +   dev_err(dev, "Failed to turn on the display: %d\n", ret);
> > +   }
>
> The old boe-tv101wum-nl6 driver didn't call
> mipi_dsi_dcs_exit_sleep_mode() nor mipi_dsi_dcs_set_display_on() in
> its enable routine, did it? If this change is important please put it
> in a separate change and justify it.

In the old boe-tv101wum-nl6 driver inital cmds was invoked at the end of
prepare() function , and call 0x11 and 0x29 at end of inital. For
himax-hx83102 driver, we move inital cmds invoked at enable() function.
For panel timing, I think there is no much difference. They are
all initial cmds executed after meeting the power-on sequence.
I will update these in the v4 commit message.

>
>
> -Doug

Re: [PATCH v4 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[cong yang]

Hi, Doug 

Doug Anderson  于2024年5月8日周三 00:40写道：
>
> Hi,
>
> On Tue, May 7, 2024 at 8:14 AM Rob Herring (Arm)  wrote:
> >
> >
> > On Tue, 07 May 2024 21:52:28 +0800, Cong Yang wrote:
> > > In V1, discussed with Doug and Linus [1], we need break out as separate
> > > driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
> > > and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
> > > controller, they have some common CMDS. So add new documentation for
> > > this panels.
> > >
> > > For himax83102-j02 controller, no need 3v3 supply, so remove it.
> > >
> > > [1]: 
> > > https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com
> > >
> > > Signed-off-by: Cong Yang 
> > > ---
> > > Chage since V4:
> > >
> > > - Update commit message and add fallback compatible.
> > >
> > > V3: 
> > > https://lore.kernel.org/all/20240424023010.2099949-2-yangco...@huaqin.corp-partner.google.com
> > >
> > > Chage since V3:
> > >
> > > - Update commit message.
> > >
> > > V2: 
> > > https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com
> > >
> > > ---
> > >  .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
> > >  .../bindings/display/panel/himax,hx83102.yaml | 73 +++
> > >  2 files changed, 73 insertions(+), 2 deletions(-)
> > >  create mode 100644 
> > > Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
> > >
> >
> > My bot found errors running 'make dt_binding_check' on your patch:
> >
> > yamllint warnings/errors:
> >
> > dtschema/dtc warnings/errors:
> > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/panel/himax,hx83102.example.dtb:
> >  panel@0: compatible:0: 'starry,himax83102-j02, himax,hx83102' does not 
> > match '^[a-zA-Z0-9][a-zA-Z0-9,+\\-._/]+$'
> > from schema $id: http://devicetree.org/schemas/dt-core.yaml#
> > Documentation/devicetree/bindings/display/panel/himax,hx83102.example.dtb: 
> > /example-0/dsi/panel@0: failed to match any schema with compatible: 
> > ['starry,himax83102-j02, himax,hx83102']
> >
> > doc reference errors (make refcheckdocs):
> >
> > See 
> > https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20240507135234.1356855-2-yangco...@huaqin.corp-partner.google.com
> >
> > The base for the series is generally the latest rc1. A different dependency
> > should be noted in *this* patch.
> >
> > If you already ran 'make dt_binding_check' and didn't see the above
> > error(s), then make sure 'yamllint' is installed and dt-schema is up to
> > date:
> >
> > pip3 install dtschema --upgrade
> >
> > Please check and re-submit after running the above command yourself. Note
> > that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> > your schema. However, it must be unset to test all examples with your 
> > schema.
>
> I think several of your bindings patches have triggered Rob's bot.
> Please make sure you're set up to test this yourself and make sure you
> run it locally before sending out the next version of your patches. In
> general you should get in the habit of running 'make dt_binding_check'
> locally before you post any bindings changes.

Sorry, I forgot to running 'make dt_binding_check'.
Thanks for the correction.

>
> Thanks!
>
> -Doug

[PATCH v4 7/7] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V4:

- inital cmds use lowercasehex.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-8-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V2: 
https://lore.kernel.org/all/20240422090310.3311429-8-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 121 
 1 file changed, 121 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 660dd1ed8d0a..7f658516f7f6 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -24,6 +24,7 @@
 #define HX83102_SETPOWER   0xb1
 #define HX83102_SETDISP0xb2
 #define HX83102_SETCYC 0xb4
+#define HX83102_UNKNOWN_B6 0xb6
 #define HX83102_SETEXTC0xb9
 #define HX83102_SETMIPI0xba
 #define HX83102_SETVDC 0xbc
@@ -295,6 +296,101 @@ static int boe_nv110wum_init(struct hx83102 *ctx)
return dsi_ctx.accum_err;
 };
 
+static int ivo_t109nw41_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xed, 
0xed, 0x27, 0xe7, 0x42,
+0xf5, 0x39, 0x36, 0x36, 0x36, 0x36, 
0x32, 0x8b, 0x11, 0x65, 0x00, 0x88,
+0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 
0xd6, 0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x22, 0x20, 0x00, 
0x00, 0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x35, 0x35, 
0x43, 0x43, 0x35, 0x35,
+0x30, 0x7a, 0x30, 0x7a, 0x01, 0x9d);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_B6, 0x34, 0x34, 
0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x34, 0x34, 
0x22, 0x11, 0x22, 0xa0,
+0x31, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x13, 0x88, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x07, 0x06, 
0x00, 0x02, 0x04, 0x2c,
+0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x08,
+0x08, 0x08, 0x08, 0x37, 0x07, 0x64, 
0x7c, 0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x17, 
0x97, 0x07, 0x97, 0x32, 0x00, 0x02,
+0x00, 0x02, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x25, 0x24, 
0x25, 0x24, 0x18, 0x18,
+0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 
0x05, 0x04, 0x05, 0x04, 0x03, 0x02,
+0x03, 0x02, 0x01, 0x00, 0x01, 0x00, 
0xa8, 0xa8, 0xa8, 0xa8, 0x29, 0x29,
+0x29, 0x29, 0x21, 0x20, 0x21, 0x20, 
0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP3, 0xaa, 0xaa, 
0xaa, 0xaa, 0xaa, 0xa0,
+0xaa, 0xaa, 0xaa, 0xaa, 0x

[PATCH v4 6/7] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-7-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-7-yangco...@huaqin.corp-partner.google.com/

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index 53a6ace75ada..f65b47cad0d4 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -18,6 +18,8 @@ properties:
   - enum:
   # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+  # IVO t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v4 5/7] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V4:

- Depend Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-6-yangco...@huaqin.corp-partner.google.com


Chage since V3:

- inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-6-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 131 
 1 file changed, 131 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 856931239323..660dd1ed8d0a 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -44,6 +44,7 @@
 #define HX83102_SETGIP20xd6
 #define HX83102_SETGIP30xd8
 #define HX83102_SETGMA 0xe0
+#define HX83102_UNKNOWN_E1 0xe1
 #define HX83102_SETTP1 0xe7
 #define HX83102_SETSPCCMD  0xe9
 
@@ -189,6 +190,111 @@ static int starry_himax83102_j02_init(struct hx83102 *ctx)
return dsi_ctx.accum_err;
 };
 
+static int boe_nv110wum_init(struct hx83102 *ctx)
+{
+   struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+   msleep(60);
+
+   hx83102_enable_extended_cmds(ctx, true);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPOWER, 0x2c, 0xaf, 
0xaf, 0x2b, 0xeb, 0x42,
+0xe1, 0x4d, 0x36, 0x36, 0x36, 0x36, 
0x1a, 0x8b, 0x11, 0x65, 0x00,
+0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 
0x08, 0x9a, 0x33);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETDISP, 0x00, 0x47, 
0xb0, 0x80, 0x00, 0x12,
+0x71, 0x3c, 0xa3, 0x11, 0x00, 0x00, 
0x00, 0x88, 0xf5, 0x22, 0x8f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCYC, 0x49, 0x49, 
0x32, 0x32, 0x14, 0x32,
+0x84, 0x6e, 0x84, 0x6e, 0x01, 0x9c);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcd);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETMIPI, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETVDC, 0x1b, 0x04);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_BE, 0x20);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPTBA, 0xfc, 0x84);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSTBA, 0x36, 0x36, 
0x22, 0x00, 0x00, 0xa0,
+0x61, 0x08, 0xf5, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xcc);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETTCON, 0x80);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc6);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETRAMDMY, 0x97);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPWM, 0x00, 0x1e, 
0x30, 0xd4, 0x01);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCLOCK, 0x08, 0x13, 
0x07, 0x00, 0x0f, 0x34);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPANEL, 0x02, 0x03, 
0x44);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0xc4);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETCASCADE, 0x03);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETSPCCMD, 0x3f);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETPCTRL, 0x37, 0x06, 
0x00, 0x02, 0x04, 0x0c, 0xff);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_UNKNOWN_D2, 0x1f, 0x11, 
0x1f, 0x11);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP0, 0x06, 0x00, 
0x00, 0x00, 0x00, 0x04,
+0x08, 0x04, 0x08, 0x37, 0x37, 0x64, 
0x4b, 0x11, 0x11, 0x03, 0x03, 0x32,
+0x10, 0x0e, 0x00, 0x0e, 0x32, 0x10, 
0x0a, 0x00, 0x0a, 0x32, 0x17, 0x98,
+0x07, 0x98, 0x00, 0x00);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP1, 0x18, 0x18, 
0x18, 0x18, 0x1e, 0x1e,
+0x1e, 0x1e, 0x1f, 0x1f, 0x1f, 0x1f, 
0x24, 0x24, 0x24, 0x24, 0x07, 0x06,
+0x07, 0x06, 0x05, 0x04, 0x05, 0x04, 
0x03, 0x02, 0x03, 0x02, 0x01, 0x00,
+0x01, 0x00, 0x21, 0x20, 0x21, 0x20, 
0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
+0x18, 0x18);
+   mipi_dsi_dcs_write_seq_multi(_ctx, HX83102_SETGIP3, 0xaf, 0xaa, 
0xaa, 0xaa, 0xaa, 0xa0,
+0xaf, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0);
+   mipi_dsi_dcs_write_seq_mu

[PATCH v4 4/7] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V4:

- No change.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-5-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-5-yangco...@huaqin.corp-partner.google.com

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index 7cd720eb4981..53a6ace75ada 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -16,6 +16,8 @@ properties:
   compatible:
 items:
   - enum:
+  # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
   # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
   - const: himax,hx83102
-- 
2.25.1

[PATCH v4 3/7] arm64: defconfig: Enable HIMAX_HX83102 panel

[Cong Yang]

DRM_PANEL_HIMAX_HX83102 is being split out from DRM_PANEL_BOE_TV101WUM_NL6.
Since the arm64 defconfig had the BOE panel driver enabled, let's also
enable the himax driver.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e180..687c86ddaece 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -864,6 +864,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_HIMAX_HX83102=m
 CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
-- 
2.25.1

[PATCH v4 2/7] drm/panel: himax-hx83102: Break out as separate driver

[Cong Yang]

The Starry HX83102 based mipi panel should never have been part of the boe
tv101wum driver. Discussion with Doug and Linus in V1 [1], we need a
separate driver to enable the hx83102 controller.

In hx83102 driver, add DSI commands as macros. So it can add some panels
with same control model in the future.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
Chage since V4:

-  Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and depend 
Dous'series [1].
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org

V3: 
https://lore.kernel.org/all/20240424023010.2099949-3-yangco...@huaqin.corp-partner.google.com

Chage since V3:

-  Drop excess flags and function, inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-3-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 -
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 478 ++
 4 files changed, 488 insertions(+), 133 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d037b3b8b999..acd3d09b5a05 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
  handling of power supplies or control signals. It implements automatic
  backlight handling if the panel is attached to a backlight controller.
 
+config DRM_PANEL_HIMAX_HX83102
+   tristate "Himax HX83102-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Himax HX83102 controller.
+
 config DRM_PANEL_HIMAX_HX83112A
tristate "Himax HX83112A-based DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f156d7fa0bcc..8fa9e38382f6 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
 obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) += panel-himax-hx83102.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index aab60cec0603..4b4b125a6c6b 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1399,108 +1399,6 @@ static int starry_qfh032011_53g_init(struct boe_panel 
*boe)
return 0;
 };
 
-static int starry_himax83102_j02_init(struct boe_panel *boe)
-{
-   struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
-
-   mipi_dsi_dcs_write_seq_multi(, 0xb9, 0x83, 0x10, 0x21, 0x55, 0x00);
-   mipi_dsi_dcs_write_seq_multi(, 0xb1, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, 
0x31, 0xd7, 0x2f,
-0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, 
0x65, 0x00, 0x88,
-0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0x74, 
0x33);
-   mipi_dsi_dcs_write_seq_multi(, 0xb2, 0x00, 0x47, 0xb0, 0x80, 0x00, 
0x12, 0x72, 0x3c,
-0xa3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xf5);
-   mipi_dsi_dcs_write_seq_multi(, 0xb4, 0x76, 0x76, 0x76, 0x76, 0x76, 
0x76, 0x63, 0x5c,
-0x63, 0x5c, 0x01, 0x9e);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0xcd);
-   mipi_dsi_dcs_write_seq_multi(, 0xba, 0x84);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0x3f);
-   mipi_dsi_dcs_write_seq_multi(, 0xbc, 0x1b, 0x04);
-   mipi_dsi_dcs_write_seq_multi(, 0xbe, 0x20);
-   mipi_dsi_dcs_write_seq_multi(, 0xbf, 0xfc, 0xc4);
-   mipi_dsi_dcs_write_seq_multi(, 0xc0, 0x36, 0x36, 0x22, 0x11, 0x22, 
0xa0, 0x61, 0x08,
-0xf5, 0x03);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0xcc);
-   mipi_dsi_dcs_write_seq_multi(, 0xc7, 0x80);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0x3f);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0xc6);
-   mipi_dsi_dcs_write_seq_multi(, 0xc8, 0x97);
-   mipi_dsi_dcs_write_seq_multi(, 0xe9, 0x3f);
-   mipi_dsi_dcs_write_seq_multi(, 0xc9, 0x00, 0x1e, 0x13, 0x88, 0x01);
-   mipi_dsi_dcs_write_seq_multi(, 0xcb, 0x08, 0x13, 0x07, 0x00, 0x0f, 
0x33);
-   mipi_dsi_dcs_write

[PATCH v4 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[Cong Yang]

In V1, discussed with Doug and Linus [1], we need break out as separate
driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
controller, they have some common CMDS. So add new documentation for
this panels.

For himax83102-j02 controller, no need 3v3 supply, so remove it.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
Chage since V4:

- Update commit message and add fallback compatible.

V3: 
https://lore.kernel.org/all/20240424023010.2099949-2-yangco...@huaqin.corp-partner.google.com

Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com

---
 .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
 .../bindings/display/panel/himax,hx83102.yaml | 73 +++
 2 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..53fb35f5c9de 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,8 +32,6 @@ properties:
   - innolux,hj110iz-01a
 # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
   - starry,2081101qfh032011-53g
-# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
-  - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
 
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
new file mode 100644
index ..7cd720eb4981
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83102 MIPI-DSI LCD panel controller
+
+maintainers:
+  - Cong Yang 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+  - starry,himax83102-j02
+  - const: himax,hx83102
+
+  reg:
+description: the virtual channel number of a DSI peripheral
+
+  enable-gpios:
+description: a GPIO spec for the enable pin
+
+  pp1800-supply:
+description: core voltage supply
+
+  avdd-supply:
+description: phandle of the regulator that provides positive voltage
+
+  avee-supply:
+description: phandle of the regulator that provides negative voltage
+
+  backlight: true
+  port: true
+  rotation: true
+
+required:
+  - compatible
+  - reg
+  - enable-gpios
+  - pp1800-supply
+  - avdd-supply
+  - avee-supply
+
+additionalProperties: false
+
+examples:
+  - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "starry,himax83102-j02, himax,hx83102";
+reg = <0>;
+enable-gpios = < 45 0>;
+avdd-supply = <_lcd>;
+avee-supply = <_lcd>;
+pp1800-supply = <_lcd>;
+backlight = <_lcd0>;
+port {
+panel_in: endpoint {
+remote-endpoint = <_out>;
+};
+};
+};
+};
+
+...
-- 
2.25.1

[PATCH v4 0/7] Break out as separate driver and add BOE nv110wum-l60 IVO t109nw41 MIPI-DSI panel

[Cong Yang]

Discussion with Doug and Linus in V1, we need a
separate driver to enable the hx83102 controller.

So this series this series mainly Break out as separate driver
for Starry-himax83102-j02 panels from boe tv101wum driver.

Then add BOE nv110wum-l60 and IVO t109nw41 in himax-hx83102 driver.

Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings

Note:this series depend Dous'series [1]
[1]: https://lore.kernel.org/all/20240501154251.3302887-1-diand...@chromium.org/

Changes in v4:
- PATCH 1/7: Update commit message and add fallback compatible.
- PATCH 2/7: Add hx83102_enable_extended_cmds function, rename UNKNOWN CMDS and 
depend Dous'series [1].
- PATCH 3/7: No change.
- PATCH 4/7: No change.
- PATCH 5/7: Depend Dous'series [1].
- PATCH 6/7: No change.
- PATCH 7/7: Depend Dous'series [1].
- Link to 
v3:https://lore.kernel.org/all/20240424023010.2099949-1-yangco...@huaqin.corp-partner.google.com/

Changes in v3:
- PATCH 1/7: Update commit message.
- PATCH 2/7: Drop excess flags and function, inital cmds use lowercasehex.
- PATCH 4/7: Update commit message.
- PATCH 5/7: inital cmds use lowercasehex.
- PATCH 6/7: Update commit message.
- PATCH 7/7: inital cmds use lowercasehex..
- Link to v2: 
https://lore.kernel.org/all/20240422090310.3311429-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/7: Delete Starry-himax83102-j02 from boe,tv101wum-nl6.yaml, add a new 
bindings file.
- PATCH 2/7: Break out as separate driver with Starry-himax83102-j02 panels.
- PATCH 3/7: Enable HIMAX_HX83102 panel.
- PATCH 4/7: Add compatible for BOE nv110wum-l60 in dt-bindings.
- PATCH 5/7: Support for BOE nv110wum-l60 MIPI-DSI panel.
- PATCH 6/7: Add compatible for IVO t109nw41 in dt-bindings..
- PATCH 7/7: Support for IVO t109nw41 MIPI-DSI panel.
- Link to v1: 
https://lore.kernel.org/all/20240410071439.2152588-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (7):
  dt-bindings: display: panel: Add himax hx83102 panel bindings
  drm/panel: himax-hx83102: Break out as separate driver
  arm64: defconfig: Enable HIMAX_HX83102 panel
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   2 -
 .../bindings/display/panel/himax,hx83102.yaml |  77 ++
 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 133 
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 730 ++
 7 files changed, 818 insertions(+), 135 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

-- 
2.25.1

Re: [PATCH v3 2/7] drm/panel: himax-hx83102: Break out as separate driver

[cong yang]

Hi,
 Thanks for review.

Doug Anderson  于2024年5月1日周三 03:19写道：

>
> Hi,
>
> On Tue, Apr 23, 2024 at 7:30 PM Cong Yang
>  wrote:
> >
> > The Starry HX83102 based mipi panel should never have been part of the boe
> > tv101wum driver. Discussion with Doug and Linus in V1 [1], we need a
> > separate driver to enable the hx83102 controller.
> >
> > In hx83102 driver, add DSI commands as macros. So it can add some panels
> > with same control model in the future.
> >
> > [1]: 
> > https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com
> >
> > Signed-off-by: Cong Yang 
> > ---
> > Chage since V3:
> >
> > -  Drop excess flags and function, inital cmds use lowercasehex.
> >
> > V2: 
> > https://lore.kernel.org/all/20240422090310.3311429-3-yangco...@huaqin.corp-partner.google.com
> >
> > ---
> >  drivers/gpu/drm/panel/Kconfig |   9 +
> >  drivers/gpu/drm/panel/Makefile|   1 +
> >  .../gpu/drm/panel/panel-boe-tv101wum-nl6.c|  99 
> >  drivers/gpu/drm/panel/panel-himax-hx83102.c   | 525 ++
> >  4 files changed, 535 insertions(+), 99 deletions(-)
>
> It probably makes sense to base your series upon mine that reduces
> bloat / introduces a better way to do these init sequences. I'm going
> to wait one more day in case anyone else has any more comments on my
> v2 and then I'll post my v3. So far everyone has been on-board with
> the overall goal and so all we need to do is iron out the small
> details, so I don't expect it to take too long.
>
> If you want to wait a day or two and then post your patches atop my v3
> (once I post it) then that would be OK by me.
>
>
> > @@ -0,0 +1,525 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Driver for panels based on Himax HX83102 controller, such as:
> > + *
> > + * - Starry 10.51" WUXGA MIPI-DSI panel
> > + *
> > + * Based on drivers/gpu/drm/panel/panel-boe-tv101wum.c
>
> The above file doesn't exist? Maybe you forgot the "-nl6" suffix? I
> would also say that this driver appears to be more similar to
> `panel-himax-hx8394.c` even if the data came from
> `panel-boe-tv101wum-nl6.c`.
>
> ...also, since this is based on `panel-himax-hx8394.c`, it seems like
> you're making pretty significant changes here. For instance, when this
> code was part of `panel-boe-tv101wum-nl6.c` it used to do the "init
> commands" as part of prepare. With the new driver it does it as part
> of "enable". IMO even if the new code based on `panel-himax-hx8394.c`
> is more correct, I'd rather see you change that in a separate change.
> In this change, which is supposed to be more about code refactoring, I
> think you should focus on keeping the behavior before and after your
> patch identical.

Ok,modified to panel-himax-hx8394.c` in V4 version.

>
>
> > +/* Manufacturer specific DSI commands */
> > +#define HX83102_SETPOWER   0xb1
> > +#define HX83102_SETDISP0xb2
> > +#define HX83102_SETCYC 0xb4
> > +#define HX83102_SETEXTC0xb9
> > +#define HX83102_SETMIPI0xba
> > +#define HX83102_SETVDC 0xbc
> > +#define HX83102_SETBANK0xbd
> > +#define HX83102_UNKNOWN1   0xbe
>
> I'm not sure that the "unknown" define helps much, but I guess it's
> fine. One nit would be to call this UNKNOWN_BE based on the address so
> that if we can later replace some of the unknowns then there won't be
> gaps in the numbering.

Got it. Thanks.

>
>
> > +#define HX83102_SETPTBA0xbf
> > +#define HX83102_SETSTBA0xc0
> > +#define HX83102_SETTCON0xc7
> > +#define HX83102_SETRAMDMY  0xc8
> > +#define HX83102_SETPWM 0xc9
> > +#define HX83102_SETCLOCK   0xcb
> > +#define HX83102_SETPANEL   0xcc
> > +#define HX83102_SETCASCADE 0xd0
> > +#define HX83102_SETPCTRL   0xd1
> > +#define HX83102_UNKNOWN2   0xd2
> > +#define HX83102_SETGIP00xd3
> > +#define HX83102_SETGIP10xd5
> > +#define HX83102_UNKNOWN3   0xd6
>
> Given everything surrounding it and given a datasheet I have for a
> similar panel, I'm going to guess UNKNOWN3 is "GIP2".

Got it. Thanks.

>
>
> > +#define HX83102_SETGIP30xd8
> > +#define HX83102_UNKNOWN4   0xe0
>
> I think UNKNOWN4 is SETGMA to set the gamma curve.

Got it. Thanks.

>
>
> > +static int starry_init_cmd(struct hx83102 *ctx)
> > +{
> >

Re: [PATCH v3 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[cong yang]

Hi,

Conor Dooley  于2024年4月27日周六 01:06写道：
>
> On Thu, Apr 25, 2024 at 02:03:24PM +0800, cong yang wrote:
> > Conor Dooley  于2024年4月25日周四 00:55写道：
> > > On Wed, Apr 24, 2024 at 10:30:04AM +0800, Cong Yang wrote:
>
> > > > +++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
> > >
> > > Filename matching a compatible please. What you've done here makes it
> > > seem like there's a fallback compatible missing, given this looks like
> > > the LCD panel controller and the starry compatible below is an LCD panel.
> >
> > So change the filename to starry,himax83102-j02.yaml?
>
> IDK chief, are you missing a fallback or not?

Ohn, I see.  Like this. Thanks.

properties:
  compatible:
items:
  - enum:
  - starry,himax83102-j02
  - const: himax,hx83102

>
> >
> > >
> > > > @@ -0,0 +1,73 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: Himax HX83102 MIPI-DSI LCD panel controller
>
> Because the title here makes it seem like there should be.
>
> > > > +maintainers:
> > > > +  - Cong Yang 
> > > > +
> > > > +allOf:
> > > > +  - $ref: panel-common.yaml#
> > > > +
> > > > +properties:
> > > > +  compatible:
> > > > +enum:
> > > > +# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
> > > > +  - starry,himax83102-j02
> > > > +
> > > > +  reg:
> > > > +description: the virtual channel number of a DSI peripheral
> > > > +
> > > > +  enable-gpios:
> > > > +description: a GPIO spec for the enable pin
> > > > +
> > > > +  pp1800-supply:
> > > > +description: core voltage supply
> > > > +
> > > > +  avdd-supply:
> > > > +description: phandle of the regulator that provides positive 
> > > > voltage
> > > > +
> > > > +  avee-supply:
> > > > +description: phandle of the regulator that provides negative 
> > > > voltage
> > > > +
> > > > +  backlight:
> > > > +description: phandle of the backlight device attached to the panel
> > >
> > > I'm not sure why this was given a description when port or rotation
> > > was not.
> >
> > So change it to backlight: true ?
>
> Sure? It is just a repeat of something already described in
> panel-common.

Re: [PATCH v3 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[cong yang]

Hi,

Thanks for review.

Conor Dooley  于2024年4月25日周四 00:55写道：
>
> On Wed, Apr 24, 2024 at 10:30:04AM +0800, Cong Yang wrote:
> > In V1, discussed with Doug and Linus [1], we need break out as separate
> > driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
> > and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
> > controller, they have some common CMDS. So add new documentation for
> > this panels.
>
> It'd be good to note in the commit message that the 3v3 supply is not
> present on these panels, given it was present in the other binding and
> not here.

Got it, fix in V4,thanks.

>
> > [1]: 
> > https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com
> >
> > Signed-off-by: Cong Yang 
> > ---
> > Chage since V3:
> >
> > - Update commit message.
> >
> > V2: 
> > https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com
> >
> > ---
> >  .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
> >  .../bindings/display/panel/himax,hx83102.yaml | 73 +++
> >  2 files changed, 73 insertions(+), 2 deletions(-)
> >  create mode 100644 
> > Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
> >
> > diff --git 
> > a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
> > b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
> > index 906ef62709b8..53fb35f5c9de 100644
> > --- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
> > +++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
> > @@ -32,8 +32,6 @@ properties:
> >- innolux,hj110iz-01a
> >  # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
> >- starry,2081101qfh032011-53g
> > -# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
> > -  - starry,himax83102-j02
> >  # STARRY ili9882t 10.51" WUXGA TFT LCD panel
> >- starry,ili9882t
> >
> > diff --git 
> > a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
> > b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
> > new file mode 100644
> > index ..2e0cd6998ba8
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
>
> Filename matching a compatible please. What you've done here makes it
> seem like there's a fallback compatible missing, given this looks like
> the LCD panel controller and the starry compatible below is an LCD panel.

So change the filename to starry,himax83102-j02.yaml?

>
> > @@ -0,0 +1,73 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Himax HX83102 MIPI-DSI LCD panel controller
> > +
> > +maintainers:
> > +  - Cong Yang 
> > +
> > +allOf:
> > +  - $ref: panel-common.yaml#
> > +
> > +properties:
> > +  compatible:
> > +enum:
> > +# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
> > +  - starry,himax83102-j02
> > +
> > +  reg:
> > +description: the virtual channel number of a DSI peripheral
> > +
> > +  enable-gpios:
> > +description: a GPIO spec for the enable pin
> > +
> > +  pp1800-supply:
> > +description: core voltage supply
> > +
> > +  avdd-supply:
> > +description: phandle of the regulator that provides positive voltage
> > +
> > +  avee-supply:
> > +description: phandle of the regulator that provides negative voltage
> > +
> > +  backlight:
> > +description: phandle of the backlight device attached to the panel
>
> I'm not sure why this was given a description when port or rotation
> was not.

So change it to backlight: true ?

Thanks.

>
> Otherwise, this looks fine to me.
>
> Cheers,
> Conor.
>
> > +
> > +  port: true
> > +  rotation: true
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - enable-gpios
> > +  - pp1800-supply
> > +  - avdd-supply
> > +  - avee-supply
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +dsi {
> > +#address-cells = <1>;
> > +#size-cells = <0>;
> > +panel@0 {
> > +compatible = "starry,himax83102-j02";
> > +reg = <0>;
> > +enable-gpios = < 45 0>;
> > +avdd-supply = <_lcd>;
> > +avee-supply = <_lcd>;
> > +pp1800-supply = <_lcd>;
> > +backlight = <_lcd0>;
> > +port {
> > +panel_in: endpoint {
> > +remote-endpoint = <_out>;
> > +};
> > +};
> > +};
> > +};
> > +
> > +...
> > --
> > 2.25.1
> >

Re: [PATCH v2 2/7] drm/panel: himax-hx83102: Break out as separate driver

[cong yang]

Hi,
 Thanks reply.

Doug Anderson  于2024年4月24日周三 00:26写道：
>
> Hi,
>
> On Tue, Apr 23, 2024 at 2:37 AM cong yang
>  wrote:
> >
> > > > +static int starry_init_cmd(struct hx83102 *ctx)
> > > > +{
> > > > +   struct mipi_dsi_device *dsi = ctx->dsi;
> > > > +
> > > > +   mipi_dsi_dcs_write_seq(dsi, HX83102_SETEXTC, 0x83, 0x10, 0x21, 
> > > > 0x55, 0x00);
> > > > +
> > > > +   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPOWER, 0x2C, 0xB5, 0xB5, 
> > > > 0x31, 0xF1, 0x31, 0xD7, 0x2F,
> > > > + 0x36, 0x36, 0x36, 
> > > > 0x36, 0x1A, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF,
> > > > + 0xFF, 0x8F, 0xFF, 
> > > > 0x08, 0x74, 0x33);
> > >
> > > I know this is a sticking point between Linus W. and me, but I'm
> > > really not a fan of all the hardcoded function calls since it bloats
> > > the code so much. I think we need to stick with something more table
> > > based at least for the majority of the commands. If I understand
> > > correctly, Linus was OK w/ something table based as long as it was in
> > > common code [1]. I think he also wanted the "delay" out of the table,
> > > but since those always seem to be at the beginning or the end it seems
> > > like we could still have the majority of the code as table based. Do
> > > you want to make an attempt at that? If not I can try to find some
> > > time to write up a patch in the next week or so.
> >
> > Do you mean not add "delay" in the table?  However, the delay
> > required by each panel may be different. How should this be handled?
>
> In the case of the "himax-hx83102" driver, it looks as if all the
> delays are at the beginning or end of the init sequence. That means
> you could just make those extra parameters that are set per-panel and
> you're back to having a simple sequence without delays.

Do you mean add msleep  in hx83102_enable()?

@@ -612,12 +604,15 @@ static int hx83102_enable(struct drm_panel *panel)
struct device *dev = >dev;
int ret;

+   msleep(60);
ret = ctx->desc->init_cmds(ctx);
if (ret) {
dev_err(dev, "Panel init cmds failed: %d\n", ret);
return ret;
}

+   msleep(60);
+
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);

>
> If you had panels that needed delays in a more complicated way, you
> could keep the per-panel functions but just make the bulk of the
> function calls apply a sequence. For instance:
>
> static int my_panel_init_cmd(...)
> {
>   ret = mipi_dsi_dcs_write_cmd_seq(dsi, my_panel_init_cmd_seq);
>   if (ret)
> return ret;
>   mdelay(100);
>   ret = mipi_dsi_dcs_write(dsi, ...);
>   if (ret)
> return ret;
>   mdelay(50);
>   ret = mipi_dsi_dcs_write_cmd_seq(dsi, ...);
>   if (ret)
> return ret;
> }
>
> The vast majority of the work is still table driven so it doesn't
> bloat the code, but you don't have the "delay" in the command sequence
> since Linus didn't like it. I think something like the above would
> make Linus happy and I'd be OK w/ it as well. Ideally you should still
> make your command sequence as easy to understand as possible, kind of
> like how we did with _INIT_SWITCH_PAGE_CMD() in
> "panel-ilitek-ili9882t.c"
>
> As part of this, you'd have to add a patch to create
> mipi_dsi_dcs_write_cmd_seq(), but hopefully that shouldn't be too
> complicated?
>
>
> > It would be great if you could help provide a patch. Thank you so much.
>
> Sure, I can, though maybe you want to give it a shot with the above 
> description?

Sorry, I still don't seem to understand. How to encapsulate the parameters of
"HX83102_SETDISP, HX83102_SETCYC,."? Different parameters for each panel.
I have sent my V3 but it does not contain the patch you want.


>
> -Doug

[PATCH v3 7/7] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V3:

- inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-8-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 172 
 1 file changed, 172 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index ea433d0c86f9..96c637c7ae2c 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -24,6 +24,7 @@
 #define HX83102_SETPOWER   0xb1
 #define HX83102_SETDISP0xb2
 #define HX83102_SETCYC 0xb4
+#define HX83102_UNKNOWN6   0xb6
 #define HX83102_SETEXTC0xb9
 #define HX83102_SETMIPI0xba
 #define HX83102_SETVDC 0xbc
@@ -392,6 +393,152 @@ static int boe_nv110wum_init_cmd(struct hx83102 *ctx)
return 0;
 };
 
+static int ivo_t109nw41_init_cmd(struct hx83102 *ctx)
+{
+   struct mipi_dsi_device *dsi = ctx->dsi;
+
+   msleep(60);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETEXTC, 0x83, 0x10, 0x21, 0x55, 
0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPOWER, 0x2c, 0xed, 0xed, 0x27, 
0xe7, 0x42, 0xf5, 0x39,
+ 0x36, 0x36, 0x36, 0x36, 0x32, 
0x8b, 0x11, 0x65, 0x00, 0x88, 0xfa, 0xff,
+ 0xff, 0x8f, 0xff, 0x08, 0xd6, 
0x33);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 
0x00, 0x12, 0x71, 0x3c,
+ 0xa3, 0x22, 0x20, 0x00, 0x00, 
0x88, 0x01);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCYC, 0x35, 0x35, 0x43, 0x43, 
0x35, 0x35, 0x30, 0x7a,
+ 0x30, 0x7a, 0x01, 0x9d);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN6, 0x34, 0x34, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xcd);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETMIPI, 0x84);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETVDC, 0x1b, 0x04);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN1, 0x20);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPTBA, 0xfc, 0xc4);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSTBA, 0x34, 0x34, 0x22, 0x11, 
0x22, 0xa0, 0x31, 0x08,
+ 0xf5, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xcc);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETTCON, 0x80);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xc6);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETRAMDMY, 0x97);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPWM, 0x00, 0x1e, 0x13, 0x88, 
0x01);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 
0x0f, 0x34);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPANEL, 0x02, 0x03, 0x44);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xc4);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCASCADE, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPCTRL, 0x07, 0x06, 0x00, 0x02, 
0x04, 0x2c, 0xff);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 
0x00, 0x08, 0x08, 0x08,
+ 0x08, 0x37, 0x07, 0x64, 0x7c, 
0x11, 0x11, 0x03, 0x03, 0x32, 0x10, 0x0e,
+ 0x00, 0x0e, 0x32, 0x17, 0x97, 
0x07, 0x97, 0x32, 0x00, 0x02, 0x00, 0x02,
+ 0x00, 0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP1, 0x25, 0x24, 0x25, 0x24, 
0x18, 0x18, 0x18, 0x18,
+ 0x07, 0x06, 0x07, 0x06, 0x05, 
0x04, 0x05, 0x04, 0x03, 0x02, 0x03, 0x02,
+ 0x01, 0x00, 0x01, 0x00, 0xa8, 
0xa8, 0xa8, 0xa8, 0x29, 0x29, 0x29, 0x29,
+ 0x21, 0x20, 0x21, 0x20, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP3, 0xaa, 0xaa, 0xaa, 0xaa, 
0xaa, 0xa0, 0xaa, 0xaa,
+ 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETTP1, 0x07, 0x10, 0x10, 0x1

[PATCH v3 6/7] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-7-yangco...@huaqin.corp-partner.google.com/

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index 86c3497b..780521aaae9b 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -17,6 +17,8 @@ properties:
 enum:
 # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+# IVO t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
 # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
 
-- 
2.25.1

[PATCH v3 5/7] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V3:

- inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-6-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 192 
 1 file changed, 192 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index b60ba60a4140..ea433d0c86f9 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -44,6 +44,7 @@
 #define HX83102_UNKNOWN3   0xd6
 #define HX83102_SETGIP30xd8
 #define HX83102_UNKNOWN4   0xe0
+#define HX83102_UNKNOWN5   0xe1
 #define HX83102_SETTP1 0xe7
 #define HX83102_SETSPCCMD  0xe9
 
@@ -225,6 +226,172 @@ static int starry_init_cmd(struct hx83102 *ctx)
return 0;
 };
 
+static int boe_nv110wum_init_cmd(struct hx83102 *ctx)
+{
+   struct mipi_dsi_device *dsi = ctx->dsi;
+
+   msleep(60);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETEXTC, 0x83, 0x10, 0x21, 0x55, 
0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPOWER, 0x2c, 0xaf, 0xaf, 0x2b, 
0xeb, 0x42, 0xe1, 0x4d,
+ 0x36, 0x36, 0x36, 0x36, 0x1a, 
0x8b, 0x11, 0x65, 0x00, 0x88, 0xfa, 0xff,
+ 0xff, 0x8f, 0xff, 0x08, 0x9a, 
0x33);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 
0x00, 0x12, 0x71, 0x3c,
+ 0xa3, 0x11, 0x00, 0x00, 0x00, 
0x88, 0xf5, 0x22, 0x8f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCYC, 0x49, 0x49, 0x32, 0x32, 
0x14, 0x32, 0x84, 0x6e,
+ 0x84, 0x6e, 0x01, 0x9c);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xcd);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETMIPI, 0x84);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETVDC, 0x1b, 0x04);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN1, 0x20);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPTBA, 0xfc, 0x84);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSTBA, 0x36, 0x36, 0x22, 0x00, 
0x00, 0xa0, 0x61, 0x08,
+ 0xf5, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xcc);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETTCON, 0x80);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xc6);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETRAMDMY, 0x97);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPWM, 0x00, 0x1e, 0x30, 0xd4, 
0x01);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 
0x0f, 0x34);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPANEL, 0x02, 0x03, 0x44);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xc4);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCASCADE, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3f);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPCTRL, 0x37, 0x06, 0x00, 0x02, 
0x04, 0x0c, 0xff);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN2, 0x1f, 0x11, 0x1f, 0x11);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 
0x00, 0x04, 0x08, 0x04,
+ 0x08, 0x37, 0x37, 0x64, 0x4b, 
0x11, 0x11, 0x03, 0x03, 0x32, 0x10, 0x0e,
+ 0x00, 0x0e, 0x32, 0x10, 0x0a, 
0x00, 0x0a, 0x32, 0x17, 0x98, 0x07, 0x98,
+ 0x00, 0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP1, 0x18, 0x18, 0x18, 0x18, 
0x1e, 0x1e, 0x1e, 0x1e,
+ 0x1f, 0x1f, 0x1f, 0x1f, 0x24, 
0x24, 0x24, 0x24, 0x07, 0x06, 0x07, 0x06,
+ 0x05, 0x04, 0x05, 0x04, 0x03, 
0x02, 0x03, 0x02, 0x01, 0x00, 0x01, 0x00,
+ 0x21, 0x20, 0x21, 0x20, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP3, 0xaf, 0xaa, 0xaa, 0xaa, 
0xaa, 0xa0, 0xaf, 0xaa,
+ 0xaa, 0xaa, 0xaa, 0xa0);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN4, 0x00, 0x05, 0x0d, 0x14, 
0x1b, 0x2c, 0x44, 0x49,
+ 0x51, 0x4c, 0x67, 0x6c, 0x71, 
0x80, 0x7d, 0x84, 0x8d, 0xa0, 0xa0, 0x4f,
+ 0x58, 0x64, 0x73, 0x00, 0x05, 
0x0d, 0x14, 0x1b, 0x2c, 0x44, 0x

[PATCH v3 4/7] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel with himax-hx83102
controller. Hence, we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-5-yangco...@huaqin.corp-partner.google.com

---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index 2e0cd6998ba8..86c3497b 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -15,6 +15,8 @@ allOf:
 properties:
   compatible:
 enum:
+# Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
 # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
 
-- 
2.25.1

[PATCH v3 3/7] arm64: defconfig: Enable HIMAX_HX83102 panel

[Cong Yang]

DRM_PANEL_HIMAX_HX83102 is being split out from DRM_PANEL_BOE_TV101WUM_NL6.
Since the arm64 defconfig had the BOE panel driver enabled, let's also
enable the himax driver.

Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e180..687c86ddaece 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -864,6 +864,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_HIMAX_HX83102=m
 CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
-- 
2.25.1

[PATCH v3 2/7] drm/panel: himax-hx83102: Break out as separate driver

[Cong Yang]

The Starry HX83102 based mipi panel should never have been part of the boe
tv101wum driver. Discussion with Doug and Linus in V1 [1], we need a
separate driver to enable the hx83102 controller.

In hx83102 driver, add DSI commands as macros. So it can add some panels
with same control model in the future.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
Chage since V3:

-  Drop excess flags and function, inital cmds use lowercasehex.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-3-yangco...@huaqin.corp-partner.google.com

---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c|  99 
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 525 ++
 4 files changed, 535 insertions(+), 99 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d037b3b8b999..acd3d09b5a05 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
  handling of power supplies or control signals. It implements automatic
  backlight handling if the panel is attached to a backlight controller.
 
+config DRM_PANEL_HIMAX_HX83102
+   tristate "Himax HX83102-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Himax HX83102 controller.
+
 config DRM_PANEL_HIMAX_HX83112A
tristate "Himax HX83112A-based DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f156d7fa0bcc..8fa9e38382f6 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
 obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) += panel-himax-hx83102.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 0ffe8f8c01de..11c1c56145c8 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1300,74 +1300,6 @@ static const struct panel_init_cmd 
starry_qfh032011_53g_init_cmd[] = {
{},
 };
 
-static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
-   _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
-   _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 
0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
-   0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 
0x33),
-   _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 
0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
-   _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 
0x63, 0x5C, 0x01, 0x9E),
-   _INIT_DCS_CMD(0xE9, 0xCD),
-   _INIT_DCS_CMD(0xBA, 0x84),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
-   _INIT_DCS_CMD(0xBE, 0x20),
-   _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
-   _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 
0xF5, 0x03),
-   _INIT_DCS_CMD(0xE9, 0xCC),
-   _INIT_DCS_CMD(0xC7, 0x80),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xE9, 0xC6),
-   _INIT_DCS_CMD(0xC8, 0x97),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
-   _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
-   _INIT_DCS_CMD(0xCC, 0x02),
-   _INIT_DCS_CMD(0xE9, 0xC4),
-   _INIT_DCS_CMD(0xD0, 0x03),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
-   _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
-   _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 
0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
-   0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 
0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
-   _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
-   0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18),
-   _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x

[PATCH v3 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[Cong Yang]

In V1, discussed with Doug and Linus [1], we need break out as separate
driver for the himax83102-j02 controller. Beacuse "starry,himax83102-j02"
and in this series "BOE nv110wum-l60" "IVO t109nw41" panels use same
controller, they have some common CMDS. So add new documentation for
this panels.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
Chage since V3:

- Update commit message.

V2: 
https://lore.kernel.org/all/20240422090310.3311429-2-yangco...@huaqin.corp-partner.google.com

---
 .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
 .../bindings/display/panel/himax,hx83102.yaml | 73 +++
 2 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..53fb35f5c9de 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,8 +32,6 @@ properties:
   - innolux,hj110iz-01a
 # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
   - starry,2081101qfh032011-53g
-# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
-  - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
 
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
new file mode 100644
index ..2e0cd6998ba8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83102 MIPI-DSI LCD panel controller
+
+maintainers:
+  - Cong Yang 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+enum:
+# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+  - starry,himax83102-j02
+
+  reg:
+description: the virtual channel number of a DSI peripheral
+
+  enable-gpios:
+description: a GPIO spec for the enable pin
+
+  pp1800-supply:
+description: core voltage supply
+
+  avdd-supply:
+description: phandle of the regulator that provides positive voltage
+
+  avee-supply:
+description: phandle of the regulator that provides negative voltage
+
+  backlight:
+description: phandle of the backlight device attached to the panel
+
+  port: true
+  rotation: true
+
+required:
+  - compatible
+  - reg
+  - enable-gpios
+  - pp1800-supply
+  - avdd-supply
+  - avee-supply
+
+additionalProperties: false
+
+examples:
+  - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "starry,himax83102-j02";
+reg = <0>;
+enable-gpios = < 45 0>;
+avdd-supply = <_lcd>;
+avee-supply = <_lcd>;
+pp1800-supply = <_lcd>;
+backlight = <_lcd0>;
+port {
+panel_in: endpoint {
+remote-endpoint = <_out>;
+};
+};
+};
+};
+
+...
-- 
2.25.1

[PATCH v3 0/7] Break out as separate driver and add BOE nv110wum-l60 IVO t109nw41 MIPI-DSI panel

[Cong Yang]

Discussion with Doug and Linus in V1, we need a
separate driver to enable the hx83102 controller.

So this series this series mainly Break out as separate driver
for Starry-himax83102-j02 panels from boe tv101wum driver.

Then add BOE nv110wum-l60 and IVO t109nw41 in himax-hx83102 driver.

Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings

Changes in v3:
- PATCH 1/7: Update commit message.
- PATCH 2/7: Drop excess flags and function, inital cmds use lowercasehex.
- PATCH 4/7: Update commit message.
- PATCH 5/7: inital cmds use lowercasehex.
- PATCH 6/7: Update commit message.
- PATCH 7/7: inital cmds use lowercasehex..
- Link to v1: 
https://lore.kernel.org/all/20240422090310.3311429-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/7: Delete Starry-himax83102-j02 from boe,tv101wum-nl6.yaml, add a new 
bindings file.
- PATCH 2/7: Break out as separate driver with Starry-himax83102-j02 panels.
- PATCH 3/7: Enable HIMAX_HX83102 panel.
- PATCH 4/7: Add compatible for BOE nv110wum-l60 in dt-bindings.
- PATCH 5/7: Support for BOE nv110wum-l60 MIPI-DSI panel.
- PATCH 6/7: Add compatible for IVO t109nw41 in dt-bindings..
- PATCH 7/7: Support for IVO t109nw41 MIPI-DSI panel.
- Link to v1: 
https://lore.kernel.org/all/20240410071439.2152588-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (7):
  dt-bindings: display: panel: Add himax hx83102 panel bindings
  drm/panel: himax-hx83102: Break out as separate driver
  arm64: defconfig: Enable HIMAX_HX83102 panel
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   2 -
 .../bindings/display/panel/himax,hx83102.yaml |  77 ++
 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c|  99 --
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 889 ++
 7 files changed, 977 insertions(+), 101 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

-- 
2.25.1

Re: [PATCH v2 4/7] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[cong yang]

Hi,
  Thanks for review.

Rob Herring  于2024年4月22日周一 23:16写道：
>
> On Mon, Apr 22, 2024 at 05:03:07PM +0800, Cong Yang wrote:
> > The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
> > with the existing himax-hx83102 driver.
>
> From a h/w perspective, the reason to share the binding is the same
> underlying controller, himax hx83102, is used, not that it is the same
> driver.

Got it, will update commit message in V3. Thanks.

>
> Rob

Re: [PATCH v2 2/7] drm/panel: himax-hx83102: Break out as separate driver

[cong yang]

Hi,
Thanks for review.

Doug Anderson  于2024年4月23日周二 05:24写道：
>
> Hi,
>
> On Mon, Apr 22, 2024 at 2:03 AM Cong Yang
>  wrote:
> >
> > The Starry HX83102 based mipi panel should never have been part of the boe
> > tv101wum driver. Discussion with Doug and Linus in V1 [1], we need a
> > separate driver to enable the hx83102 controller.
> >
> > In hx83102 driver, add DSI commands as macros. So it can add some panels
> > with same control model in the future.
> >
> > [1]: 
> > https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com
> >
> > Signed-off-by: Cong Yang 
> > ---
> >  drivers/gpu/drm/panel/Kconfig |   9 +
> >  drivers/gpu/drm/panel/Makefile|   1 +
> >  .../gpu/drm/panel/panel-boe-tv101wum-nl6.c|  99 ---
> >  drivers/gpu/drm/panel/panel-himax-hx83102.c   | 567 ++
> >  4 files changed, 577 insertions(+), 99 deletions(-)
> >  create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c
> >
> > diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
> > index d037b3b8b999..eb378c897353 100644
> > --- a/drivers/gpu/drm/panel/Kconfig
> > +++ b/drivers/gpu/drm/panel/Kconfig
> > @@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
> >   handling of power supplies or control signals. It implements 
> > automatic
> >   backlight handling if the panel is attached to a backlight 
> > controller.
> >
> > +config DRM_PANEL_HIMAX_HX83102
> > +   tristate "himax HX83102-based panels"
>
> Capital "h" for "Himax".

Got it, fix in V3. Thanks.

>
>
> > +#define DRV_NAME "panel-himax-hx83102"
>
> I don't think DRV_NAME buys you very much. Get rid of this #define and
> just use it below.

Got it, fix in V3. Thanks.

>
>
> > +struct hx83102 {
> > +   struct drm_panel base;
> > +   struct mipi_dsi_device *dsi;
> > +
> > +   const struct hx83102_panel_desc *desc;
> > +
> > +   enum drm_panel_orientation orientation;
> > +   struct regulator *pp1800;
> > +   struct regulator *avee;
> > +   struct regulator *avdd;
> > +   struct gpio_desc *enable_gpio;
> > +
> > +   bool prepared;
>
> We're trying to get rid of the tracking of "prepared" in panels. You
> should be able to delete this and remove the code dealing with it. The
> core DRM code should ensure that your prepare/unprepare functions are
> called appropriately.

Got it, fix in V3. Thanks.

>
>
>
> > +struct hx83102_panel_desc {
> > +   const struct drm_display_mode *modes;
> > +   unsigned int bpc;
> > +
> > +   /**
> > +* @width_mm: width of the panel's active display area
> > +* @height_mm: height of the panel's active display area
> > +*/
> > +   struct {
> > +   unsigned int width_mm;
> > +   unsigned int height_mm;
> > +   } size;
> > +
> > +   unsigned long mode_flags;
> > +   enum mipi_dsi_pixel_format format;
> > +   unsigned int lanes;
> > +   bool lp11_before_reset;
>
> Seems like you can remove "lp11_before_reset" since it's always true
> for this controller. If later you find someone using this controller
> that needs this false then we can always add it back in.
>
> I think you could also remove "bpc", "format", and "mode_flags". If
> these are all the same controller then that will be common between all
> the panels, right? So you shouldn't need to define those on a
> per-panel basis... You could maybe even remove "lanes" unless some
> people using this panel are expected to hook up fewer lanes...

Okay, remove “lanes” together.

>
>
> > +static int starry_init_cmd(struct hx83102 *ctx)
> > +{
> > +   struct mipi_dsi_device *dsi = ctx->dsi;
> > +
> > +   mipi_dsi_dcs_write_seq(dsi, HX83102_SETEXTC, 0x83, 0x10, 0x21, 
> > 0x55, 0x00);
> > +
> > +   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPOWER, 0x2C, 0xB5, 0xB5, 
> > 0x31, 0xF1, 0x31, 0xD7, 0x2F,
> > + 0x36, 0x36, 0x36, 0x36, 
> > 0x1A, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF,
> > + 0xFF, 0x8F, 0xFF, 0x08, 
> > 0x74, 0x33);
>
> I know this is a sticking point between Linus W. and me, but I'm
> really not a fan of all the hardcoded function calls since it bloats
> the code so much. I think we need to s

[PATCH v2 7/7] drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 178 
 1 file changed, 178 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index 963438a2b245..0aef1cc80dea 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -26,6 +26,7 @@
 #define HX83102_SETPOWER   0xb1
 #define HX83102_SETDISP0xb2
 #define HX83102_SETCYC 0xb4
+#define HX83102_UNKNOWN6   0xb6
 #define HX83102_SETEXTC0xb9
 #define HX83102_SETMIPI0xba
 #define HX83102_SETVDC 0xbc
@@ -401,6 +402,152 @@ static int boe_nv110wum_init_cmd(struct hx83102 *ctx)
return 0;
 };
 
+static int ivo_t109nw41_init_cmd(struct hx83102 *ctx)
+{
+   struct mipi_dsi_device *dsi = ctx->dsi;
+
+   msleep(60);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETEXTC, 0x83, 0x10, 0x21, 0x55, 
0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPOWER, 0x2C, 0xED, 0xED, 0x27, 
0xE7, 0x42, 0xF5, 0x39,
+ 0x36, 0x36, 0x36, 0x36, 0x32, 
0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF,
+ 0xFF, 0x8F, 0xFF, 0x08, 0xD6, 
0x33);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETDISP, 0x00, 0x47, 0xB0, 0x80, 
0x00, 0x12, 0x71, 0x3C,
+ 0xA3, 0x22, 0x20, 0x00, 0x00, 
0x88, 0x01);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCYC, 0x35, 0x35, 0x43, 0x43, 
0x35, 0x35, 0x30, 0x7A,
+ 0x30, 0x7A, 0x01, 0x9D);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN6, 0x34, 0x34, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xCD);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETMIPI, 0x84);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETVDC, 0x1B, 0x04);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN1, 0x20);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPTBA, 0xFC, 0xC4);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSTBA, 0x34, 0x34, 0x22, 0x11, 
0x22, 0xA0, 0x31, 0x08,
+ 0xF5, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xCC);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETTCON, 0x80);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xC6);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETRAMDMY, 0x97);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPWM, 0x00, 0x1E, 0x13, 0x88, 
0x01);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 
0x0F, 0x34);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPANEL, 0x02, 0x03, 0x44);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xC4);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCASCADE, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPCTRL, 0x07, 0x06, 0x00, 0x02, 
0x04, 0x2C, 0xFF);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 
0x00, 0x08, 0x08, 0x08,
+ 0x08, 0x37, 0x07, 0x64, 0x7C, 
0x11, 0x11, 0x03, 0x03, 0x32, 0x10, 0x0E,
+ 0x00, 0x0E, 0x32, 0x17, 0x97, 
0x07, 0x97, 0x32, 0x00, 0x02, 0x00, 0x02,
+ 0x00, 0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP1, 0x25, 0x24, 0x25, 0x24, 
0x18, 0x18, 0x18, 0x18,
+ 0x07, 0x06, 0x07, 0x06, 0x05, 
0x04, 0x05, 0x04, 0x03, 0x02, 0x03, 0x02,
+ 0x01, 0x00, 0x01, 0x00, 0xA8, 
0xA8, 0xA8, 0xA8, 0x29, 0x29, 0x29, 0x29,
+ 0x21, 0x20, 0x21, 0x20, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP3, 0xAA, 0xAA, 0xAA, 0xAA, 
0xAA, 0xA0, 0xAA, 0xAA,
+ 0xAA, 0xAA, 0xAA, 0xA0, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETTP1, 0x07, 0x10, 0x10, 0x1A, 
0x26, 0x9E, 0x00, 0x4F,
+ 0xA0, 0x14, 0x14, 0x00, 0x00, 
0x00, 0x00, 0x12, 0x0A, 0x02, 0x

[PATCH v2 6/7] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
with the existing himax-hx83102 driver. Hence, we add a new compatible
with panel specific config.

Signed-off-by: Cong Yang 
---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index 86c3497b..780521aaae9b 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -17,6 +17,8 @@ properties:
 enum:
 # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+# IVO t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
 # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
 
-- 
2.25.1

[PATCH v2 5/7] drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, use hx83102 controller
which fits in nicely with the existing panel-himax-hx83102 driver. Hence,
we add a new compatible with panel specific config.

Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-himax-hx83102.c | 198 
 1 file changed, 198 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-himax-hx83102.c 
b/drivers/gpu/drm/panel/panel-himax-hx83102.c
index ac8329f89195..963438a2b245 100644
--- a/drivers/gpu/drm/panel/panel-himax-hx83102.c
+++ b/drivers/gpu/drm/panel/panel-himax-hx83102.c
@@ -46,6 +46,7 @@
 #define HX83102_UNKNOWN3   0xd6
 #define HX83102_SETGIP30xd8
 #define HX83102_UNKNOWN4   0xe0
+#define HX83102_UNKNOWN5   0xe1
 #define HX83102_SETTP1 0xe7
 #define HX83102_SETSPCCMD  0xe9
 
@@ -234,6 +235,172 @@ static int starry_init_cmd(struct hx83102 *ctx)
return 0;
 };
 
+static int boe_nv110wum_init_cmd(struct hx83102 *ctx)
+{
+   struct mipi_dsi_device *dsi = ctx->dsi;
+
+   msleep(60);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETEXTC, 0x83, 0x10, 0x21, 0x55, 
0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPOWER, 0x2C, 0xAF, 0xAF, 0x2B, 
0xEB, 0x42, 0xE1, 0x4D,
+ 0x36, 0x36, 0x36, 0x36, 0x1A, 
0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF,
+ 0xFF, 0x8F, 0xFF, 0x08, 0x9A, 
0x33);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETDISP, 0x00, 0x47, 0xB0, 0x80, 
0x00, 0x12, 0x71, 0x3C,
+ 0xA3, 0x11, 0x00, 0x00, 0x00, 
0x88, 0xF5, 0x22, 0x8F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCYC, 0x49, 0x49, 0x32, 0x32, 
0x14, 0x32, 0x84, 0x6E,
+ 0x84, 0x6E, 0x01, 0x9C);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xCD);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETMIPI, 0x84);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETVDC, 0x1B, 0x04);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN1, 0x20);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPTBA, 0xFC, 0x84);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSTBA, 0x36, 0x36, 0x22, 0x00, 
0x00, 0xA0, 0x61, 0x08,
+ 0xF5, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xCC);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETTCON, 0x80);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xC6);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETRAMDMY, 0x97);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPWM, 0x00, 0x1E, 0x30, 0xD4, 
0x01);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 
0x0F, 0x34);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPANEL, 0x02, 0x03, 0x44);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0xC4);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETCASCADE, 0x03);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETSPCCMD, 0x3F);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETPCTRL, 0x37, 0x06, 0x00, 0x02, 
0x04, 0x0C, 0xFF);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN2, 0x1F, 0x11, 0x1F, 0x11);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 
0x00, 0x04, 0x08, 0x04,
+ 0x08, 0x37, 0x37, 0x64, 0x4B, 
0x11, 0x11, 0x03, 0x03, 0x32, 0x10, 0x0E,
+ 0x00, 0x0E, 0x32, 0x10, 0x0A, 
0x00, 0x0A, 0x32, 0x17, 0x98, 0x07, 0x98,
+ 0x00, 0x00);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP1, 0x18, 0x18, 0x18, 0x18, 
0x1E, 0x1E, 0x1E, 0x1E,
+ 0x1F, 0x1F, 0x1F, 0x1F, 0x24, 
0x24, 0x24, 0x24, 0x07, 0x06, 0x07, 0x06,
+ 0x05, 0x04, 0x05, 0x04, 0x03, 
0x02, 0x03, 0x02, 0x01, 0x00, 0x01, 0x00,
+ 0x21, 0x20, 0x21, 0x20, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_SETGIP3, 0xAF, 0xAA, 0xAA, 0xAA, 
0xAA, 0xA0, 0xAF, 0xAA,
+ 0xAA, 0xAA, 0xAA, 0xA0);
+
+   mipi_dsi_dcs_write_seq(dsi, HX83102_UNKNOWN4, 0x00, 0x05, 0x0D, 0x14, 
0x1B, 0x2C, 0x44, 0x49,
+ 0x51, 0x4C, 0x67, 0x6C, 0x71, 
0x80, 0x7D, 0x84, 0x8D, 0xA0, 0xA0, 0x4F,
+ 0x58, 0x64, 0x73, 0x00, 0x05, 
0x0D, 0x14, 0x1B, 0x2C, 0x44, 0x49, 0x51,
+ 0x4C, 0x67, 0x6C, 0x71, 0x80, 
0x7D, 0x84, 0x8D, 0xA0, 0xA0, 0x

[PATCH v2 4/7] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
with the existing himax-hx83102 driver. Hence, we add a new compatible
with panel specific config.

Signed-off-by: Cong Yang 
---
 .../devicetree/bindings/display/panel/himax,hx83102.yaml| 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
index 2e0cd6998ba8..86c3497b 100644
--- a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -15,6 +15,8 @@ allOf:
 properties:
   compatible:
 enum:
+# Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
 # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
   - starry,himax83102-j02
 
-- 
2.25.1

[PATCH v2 3/7] arm64: defconfig: Enable HIMAX_HX83102 panel

[Cong Yang]

DRM_PANEL_HIMAX_HX83102 is being split out from DRM_PANEL_BOE_TV101WUM_NL6.
Since the arm64 defconfig had the BOE panel driver enabled, let's also
enable the himax driver.

Signed-off-by: Cong Yang 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e180..687c86ddaece 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -864,6 +864,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_HIMAX_HX83102=m
 CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
-- 
2.25.1

[PATCH v2 2/7] drm/panel: himax-hx83102: Break out as separate driver

[Cong Yang]

The Starry HX83102 based mipi panel should never have been part of the boe
tv101wum driver. Discussion with Doug and Linus in V1 [1], we need a
separate driver to enable the hx83102 controller.

In hx83102 driver, add DSI commands as macros. So it can add some panels
with same control model in the future.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c|  99 ---
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 567 ++
 4 files changed, 577 insertions(+), 99 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d037b3b8b999..eb378c897353 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -145,6 +145,15 @@ config DRM_PANEL_LVDS
  handling of power supplies or control signals. It implements automatic
  backlight handling if the panel is attached to a backlight controller.
 
+config DRM_PANEL_HIMAX_HX83102
+   tristate "himax HX83102-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ himax HX83102 controller.
+
 config DRM_PANEL_HIMAX_HX83112A
tristate "Himax HX83112A-based DSI panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f156d7fa0bcc..8fa9e38382f6 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o
 obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
+obj-$(CONFIG_DRM_PANEL_HIMAX_HX83102) += panel-himax-hx83102.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o
 obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 0ffe8f8c01de..11c1c56145c8 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1300,74 +1300,6 @@ static const struct panel_init_cmd 
starry_qfh032011_53g_init_cmd[] = {
{},
 };
 
-static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
-   _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
-   _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 
0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
-   0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 
0x33),
-   _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 
0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
-   _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 
0x63, 0x5C, 0x01, 0x9E),
-   _INIT_DCS_CMD(0xE9, 0xCD),
-   _INIT_DCS_CMD(0xBA, 0x84),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
-   _INIT_DCS_CMD(0xBE, 0x20),
-   _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
-   _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 
0xF5, 0x03),
-   _INIT_DCS_CMD(0xE9, 0xCC),
-   _INIT_DCS_CMD(0xC7, 0x80),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xE9, 0xC6),
-   _INIT_DCS_CMD(0xC8, 0x97),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
-   _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
-   _INIT_DCS_CMD(0xCC, 0x02),
-   _INIT_DCS_CMD(0xE9, 0xC4),
-   _INIT_DCS_CMD(0xD0, 0x03),
-   _INIT_DCS_CMD(0xE9, 0x3F),
-   _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
-   _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
-   _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 
0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
-   0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 
0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
-   _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
-   0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18),
-   _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
-   0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 
0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x

[PATCH v2 1/7] dt-bindings: display: panel: Add himax hx83102 panel bindings

[Cong Yang]

In V1, discussed with Doug and Linus [1], we need break out as separate
driver for the himax83102-j02 controller. So add new documentation for
"starry,himax83102-j02" panel.

[1]: 
https://lore.kernel.org/all/CACRpkdbzYZAS0=zbqjuc4cb2wj4s1h6n6asazqvdmv95r3z...@mail.gmail.com

Signed-off-by: Cong Yang 
---
 .../display/panel/boe,tv101wum-nl6.yaml   |  2 -
 .../bindings/display/panel/himax,hx83102.yaml | 73 +++
 2 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..53fb35f5c9de 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,8 +32,6 @@ properties:
   - innolux,hj110iz-01a
 # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
   - starry,2081101qfh032011-53g
-# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
-  - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
 
diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml 
b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
new file mode 100644
index ..2e0cd6998ba8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/himax,hx83102.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Himax HX83102 MIPI-DSI LCD panel controller
+
+maintainers:
+  - Cong Yang 
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+enum:
+# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+  - starry,himax83102-j02
+
+  reg:
+description: the virtual channel number of a DSI peripheral
+
+  enable-gpios:
+description: a GPIO spec for the enable pin
+
+  pp1800-supply:
+description: core voltage supply
+
+  avdd-supply:
+description: phandle of the regulator that provides positive voltage
+
+  avee-supply:
+description: phandle of the regulator that provides negative voltage
+
+  backlight:
+description: phandle of the backlight device attached to the panel
+
+  port: true
+  rotation: true
+
+required:
+  - compatible
+  - reg
+  - enable-gpios
+  - pp1800-supply
+  - avdd-supply
+  - avee-supply
+
+additionalProperties: false
+
+examples:
+  - |
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+compatible = "starry,himax83102-j02";
+reg = <0>;
+enable-gpios = < 45 0>;
+avdd-supply = <_lcd>;
+avee-supply = <_lcd>;
+pp1800-supply = <_lcd>;
+backlight = <_lcd0>;
+port {
+panel_in: endpoint {
+remote-endpoint = <_out>;
+};
+};
+};
+};
+
+...
-- 
2.25.1

[PATCH v2 0/7] Break out as separate driver and add BOE nv110wum-l60 IVO t109nw41 MIPI-DSI panel

[Cong Yang]

Discussion with Doug and Linus in V1, we need a
separate driver to enable the hx83102 controller.

So this series this series mainly Break out as separate driver
for Starry-himax83102-j02 panels from boe tv101wum driver.

Then add BOE nv110wum-l60 and IVO t109nw41 in himax-hx83102 driver.

Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings

Changes in v2:
- PATCH 1/7: Delete Starry-himax83102-j02 from boe,tv101wum-nl6.yaml, add a new 
bindings file.
- PATCH 2/7: Break out as separate driver with Starry-himax83102-j02 panels.
- PATCH 3/7: Enable HIMAX_HX83102 panel.
- PATCH 4/7: Add compatible for BOE nv110wum-l60 in dt-bindings.
- PATCH 5/7: Support for BOE nv110wum-l60 MIPI-DSI panel.
- PATCH 6/7: Add compatible for IVO t109nw41 in dt-bindings..
- PATCH 7/7: Support for IVO t109nw41 MIPI-DSI panel.
- Link to v1: 
https://lore.kernel.org/all/20240410071439.2152588-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (7):
  dt-bindings: display: panel: Add himax hx83102 panel bindings
  drm/panel: himax-hx83102: Break out as separate driver
  arm64: defconfig: Enable HIMAX_HX83102 panel
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: himax-hx83102: Support for BOE nv110wum-l60 MIPI-DSI panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: himax-hx83102: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   2 -
 .../bindings/display/panel/himax,hx83102.yaml |  77 ++
 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c|  99 --
 drivers/gpu/drm/panel/panel-himax-hx83102.c   | 943 ++
 7 files changed, 1031 insertions(+), 101 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-himax-hx83102.c

-- 
2.25.1

Re: [PATCH v1 2/4] drm/panel: boe-tv101wum-nl6: Support for BOE nv110wum-l60 MIPI-DSI panel

[cong yang]

Hi,

Linus Walleij  于2024年4月18日周四 22:00写道：
>
> On Thu, Apr 18, 2024 at 2:42 PM cong yang
>  wrote:
>
> > I learned from himax that even if the same controller is used with
> > different glasses, the corresponding parameters are not fixed.
> >
> > For example: _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
> >
> > even in the group initial code, the same register will be loaded with
> > parameters twice.
> (...)
> > So assuming that the registers of the two screens is the same now,
> > it cannot be set as a common parameter.
> > Otherwise, it may be a bit troublesome for the maintainers.
> >
> > If necessary, I can break out starry_himax83102_j02, boe_nv110wum and
> > ivo_t109nw41
> > as separate driver. Then add some define to these registers.
>
> Why would you do a separate driver per panel despite they have
> the same display controller? I don't get it.
>
> Use one driver, use different compatible strings for the different
> panels and use the corresponding sequence for each panel
> selected by compatible string.

I mean add starry_himax83102_j02, boe_nv110wum and ivo_t109nw41
together to make a separate driver and break out boe-tv101wum-nl6 ,
because they belong to the same controller.

As Doug said ：
“I'm just guessing, but if those are the same controller as
the two new ones you're adding in this series, maybe all
3 of them should be in their own driver? Maybe we can do something to
make more sense of some of these commands too? ”


Thanks.
>
> For example, see drivers/gpu/drm/panel/panel-novatek-nt35510.c:
>
> static const struct of_device_id nt35510_of_match[] = {
> {
> .compatible = "frida,frd400b25025",
> .data = _frida_frd400b25025,
> },
> {
> .compatible = "hydis,hva40wv1",
> .data = _hydis_hva40wv1,
> },
> { }
> };
>
>
> Take some inspiration from this driver and how we parameterize
> the different data depending on compatible string.
>
> Yours,
> Linus Walleij

Re: [PATCH v1 2/4] drm/panel: boe-tv101wum-nl6: Support for BOE nv110wum-l60 MIPI-DSI panel

[cong yang]

Hi,

Linus Walleij  于2024年4月11日周四 16:25写道：

>
> On Thu, Apr 11, 2024 at 9:40 AM Doug Anderson  wrote:
> > On Wed, Apr 10, 2024 at 12:15 AM Cong Yang
> >  wrote:
> > >
> > > The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
> > > with the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new
> > > compatible with panel specific config.
> >
> > I guess we have the same question we've had with this driver in the
> > past: do we add more tables here, or do we break this out into a
> > separate driver like we ended up doing with "ili9882t". I guess the
> > question is: what is the display controller used with this panel and
> > is it the same (or nearly the same) display controller as other panels
> > in this driver or is it a completely different display controller.
> > Maybe you could provide this information in the commit message to help
> > reviewers understand.
>
> I think at a minimum we need to split out any identifiable display controllers
> to their own drivers.
>
> Then what developers see is that the code sequence is very similar
> between two completely different display controllers so they have this
> urge to shoehorn several displays into the same driver for this
> reason.
>
> The latter is not good code reuse, what we need to do here is to split
> out a sequencing library, like if we had
> drivers/gpu/drm/panel/cmd-seqence-lib.c|.h with a bool Kconfig and
> some helpful symbols to do the same seqences in different drivers,
> so the same order can be obtained in different display controller
> drivers that would be great.
>
> I'm thinking something along the line of
>
> panel_seq_exit_sleep_mode(unsigned int delay_after_exit_sleep,
> u8 *cmd_seq_after_exit_sleep,
> unsigned int delay_after_cmd_seq,
> unsigned int delay_after_set_display_on);
>
> That will call mipi_dsi_dcs_exit_sleep_mode(), delay, send
> command sequence, delay, call mipi_dsi_dcs_set_display_on()
> and delay where any delay can be 0.
>
> This achieves the same goal without messing up the whole place,
> but requires some tinkering with how to pass a sequence the right
> way etc.
>
> Are Google & partners interested in the job? ;)
>
> Yours,
> Linus Walleij

I learned from himax that even if the same controller is used with
different glasses, the corresponding parameters are not fixed.

For example: _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),

even in the group initial code, the same register will be loaded with
parameters twice.

 example is the same“0xB4” , but the specific implementation functions
are also different.
_INIT_DCS_CMD(0xB4, 0x35, 0x35, 0x43, 0x43, 0x35, 0x35, 0x30, 0x7A,
0x30, 0x7A, 0x01, 0x9D),
. . .
. . .
_INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),

So assuming that the registers of the two screens is the same now,
it cannot be set as a common parameter.
Otherwise, it may be a bit troublesome for the maintainers.

If necessary, I can break out starry_himax83102_j02, boe_nv110wum and
ivo_t109nw41
as separate driver. Then add some define to these registers.

#define HX83102_SETPOWER 0xb1
#define HX83102_SETDISP 0xb2
#define HX83102_SETCYC 0xb4
#define HX83102_SETEXTC 0xb9
#define HX83102_SETMIPI 0xba
#define HX83102_SETVDC 0xbc
#define HX83102_SETBANK 0xbd
#define HX83102_SETPTBA 0xbf
#define HX83102_SETSTBA 0xc0
#define HX83102_SETTCON 0xc7
#define HX83102_SETRAMDMY 0xc8
#define HX83102_SETPWM 0xc9
#define HX83102_SETCLOCK 0xcb
#define HX83102_SETPANEL 0xcc
#define HX83102_SETCASCADE 0xd0
#define HX83102_SETPCTRL 0xd1
#define HX83102_SETGIP0 0xd3
#define HX83102_SETGIP1 0xd5
#define HX83102_SETGIP3 0xd8
#define HX83102_SETTP1 0xe7
#define HX83102_SETSPCCMD 0xe9

Thanks！

Re: [PATCH v1 2/4] drm/panel: boe-tv101wum-nl6: Support for BOE nv110wum-l60 MIPI-DSI panel

[cong yang]

Hi,

Doug Anderson  于2024年4月11日周四 15:48写道：
>
> Hi,
>
> On Wed, Apr 10, 2024 at 12:15 AM Cong Yang
>  wrote:
> >
> > The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
> > with the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new
> > compatible with panel specific config.
>
> I guess we have the same question we've had with this driver in the
> past: do we add more tables here, or do we break this out into a
> separate driver like we ended up doing with "ili9882t". I guess the
> question is: what is the display controller used with this panel and
> is it the same (or nearly the same) display controller as other panels
> in this driver or is it a completely different display controller.
> Maybe you could provide this information in the commit message to help
> reviewers understand.

okay, I will add detailed information in V2 patch.Thanks.
>
>
> > Signed-off-by: Cong Yang 
> > ---
> >  .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 115 ++
> >  1 file changed, 115 insertions(+)
>
> Maybe add Linus W to your patches since he has had opinions on this
> driver in the past. I've added him as CC here but you should make sure
> to CC him on future versions unless he says not to. ;-)

Got it,thanks.

>
>
> > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
> > b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > index 0ffe8f8c01de..f91827e1548c 100644
> > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> > @@ -1368,6 +1368,91 @@ static const struct panel_init_cmd 
> > starry_himax83102_j02_init_cmd[] = {
> > {},
> >  };
> >
> > +static const struct panel_init_cmd boe_nv110wum_init_cmd[] = {
> > +   _INIT_DELAY_CMD(60),
> > +   _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
>
> Given that the first command of "(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00)"
> seems to be the same as "starry_himax83102_j02" maybe those two are
> the same controller? I'm just guessing, but if those are the same
> controller as the two new ones you're adding in this series, maybe all
> 3 of them should be in their own driver? Maybe we can do something to
> make more sense of some of these commands too? There certainly seem to
> be a lot of commonalities in the init sequences of all 3 and if we can
> define the init sequence more logically then we can share more of the
> code between the different panels and we don't have a giant duplicated
> blob.

Yes, your guess is correct. boe_nv110wum and ivo_t109nw41 and
starry_himax83102_j02
are the same controller (himax83102). They are equipped with different
glass panels (BOE/IVO/starry),
so there will be some differences in initial code and porch.

>
>
> > +   _INIT_DCS_CMD(0xB9, 0x00, 0x00, 0x00),
> > +   _INIT_DELAY_CMD(50),
> > +   _INIT_DCS_CMD(0x11),
> > +   _INIT_DELAY_CMD(110),
> > +   _INIT_DCS_CMD(0x29),
> > +   _INIT_DELAY_CMD(25),
> > +   {},
> > +};
> >  static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
>
> nit: should have a blank line between the end of your struct and the
> next function.

Got it,thanks.

>
>
> > +static const struct panel_desc boe_nv110wum_desc = {
> > +   .modes = _tv110wum_default_mode,
> > +   .bpc = 8,
> > +   .size = {
> > +   .width_mm = 147,
> > +   .height_mm = 235,
> > +   },
> > +   .lanes = 4,
> > +   .format = MIPI_DSI_FMT_RGB888,
> > +   .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> > + MIPI_DSI_MODE_LPM,
> > +   .init_cmds = boe_nv110wum_init_cmd,
> > +   .lp11_before_reset = true,
> > +};
> >  static int boe_panel_get_modes(struct drm_panel *panel,
> >struct drm_connector *connector)
>
> nit: should have a blank line between the end of your struct and the
> next function.
>
>
> > @@ -1973,6 +2085,9 @@ static const struct of_device_id boe_of_match[] = {
> > { .compatible = "starry,himax83102-j02",
> >   .data = _himax83102_j02_desc
> > },
> > +   { .compatible = "boe,nv110wum-l60",
> > + .data = _nv110wum_desc
> > +   },
>
> nit: the existing panels that are supported are sorted alphabetically.
> Please sort things alphabetically throughout your patch series.

Got it, fx net patch. Thanks.

>
> -Doug

Re: [PATCH v1 1/4] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[cong yang]

Hi，

Krzysztof Kozlowski  于2024年4月10日周三 16:24写道：
>
> On 10/04/2024 09:14, Cong Yang wrote:
> > The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
> > with the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new
> > compatible with panel specific config.
> >
> > Signed-off-by: Cong Yang 
> > ---
> >  .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git 
> > a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
> > b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
> > index 906ef62709b8..50351dd3d6e5 100644
> > --- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
> > +++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
> > @@ -36,6 +36,8 @@ properties:
> >- starry,himax83102-j02
> >  # STARRY ili9882t 10.51" WUXGA TFT LCD panel
> >- starry,ili9882t
> > +# Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
> > +  - boe,nv110wum-l60
>
> Isn't the list ordered?

Sorry, will be fix in V2 patch . Thanks.
>
> Best regards,
> Krzysztof
>

[PATCH v1 3/4] dt-bindings: display: panel: Add compatible for IVO t109nw41

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, which fits in nicely with
the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new compatible
with panel specific config.

Signed-off-by: Cong Yang 
---
 .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 50351dd3d6e5..f15588a2641c 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -38,6 +38,8 @@ properties:
   - starry,ili9882t
 # Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
   - boe,nv110wum-l60
+# Ivo t109nw41 11.0" WUXGA TFT LCD panel
+  - ivo,t109nw41
 
   reg:
 description: the virtual channel number of a DSI peripheral
-- 
2.25.1

[PATCH v1 4/4] drm/panel: boe-tv101wum-nl6: Support for IVO t109nw41 MIPI-DSI panel

[Cong Yang]

The IVO t109nw41 is a 11.0" WUXGA TFT LCD panel, which fits in nicely with
the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new compatible
with panel specific config.

Signed-off-by: Cong Yang 
---
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 98 +++
 1 file changed, 98 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index f91827e1548c..201a82415e1e 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1453,6 +1453,72 @@ static const struct panel_init_cmd 
boe_nv110wum_init_cmd[] = {
_INIT_DELAY_CMD(25),
{},
 };
+
+static const struct panel_init_cmd ivo_t109nw41_init_cmd[] = {
+   _INIT_DELAY_CMD(60),
+   _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+   _INIT_DCS_CMD(0xB1, 0x2C, 0xED, 0xED, 0x27, 0xE7, 0x42, 0xF5, 0x39, 
0x36, 0x36, 0x36, 0x36, 0x32, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 
0x8F, 0xFF, 0x08, 0xD6, 0x33),
+   _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x71, 0x3C, 
0xA3, 0x22, 0x20, 0x00, 0x00, 0x88, 0x01),
+   _INIT_DCS_CMD(0xB4, 0x35, 0x35, 0x43, 0x43, 0x35, 0x35, 0x30, 0x7A, 
0x30, 0x7A, 0x01, 0x9D),
+   _INIT_DCS_CMD(0xB6, 0x34, 0x34, 0x03),
+   _INIT_DCS_CMD(0xE9, 0xCD),
+   _INIT_DCS_CMD(0xBA, 0x84),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+   _INIT_DCS_CMD(0xBE, 0x20),
+   _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+   _INIT_DCS_CMD(0xC0, 0x34, 0x34, 0x22, 0x11, 0x22, 0xA0, 0x31, 0x08, 
0xF5, 0x03),
+   _INIT_DCS_CMD(0xE9, 0xCC),
+   _INIT_DCS_CMD(0xC7, 0x80),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xE9, 0xC6),
+   _INIT_DCS_CMD(0xC8, 0x97),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+   _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x34),
+   _INIT_DCS_CMD(0xCC, 0x02, 0x03, 0x44),
+   _INIT_DCS_CMD(0xE9, 0xC4),
+   _INIT_DCS_CMD(0xD0, 0x03),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xD1, 0x07, 0x06, 0x00, 0x02, 0x04, 0x2C, 0xFF),
+   _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 
0x08, 0x37, 0x07, 0x64, 0x7C, 0x11, 0x11, 0x03, 0x03, 0x32, 0x10, 0x0E, 0x00, 
0x0E, 0x32, 0x17, 0x97, 0x07, 0x97, 0x32,
+   0x00, 0x02, 0x00, 0x02, 0x00, 0x00),
+   _INIT_DCS_CMD(0xD5, 0x25, 0x24, 0x25, 0x24, 0x18, 0x18, 0x18, 0x18, 
0x07, 0x06, 0x07, 0x06, 0x05, 0x04, 0x05, 0x04, 0x03, 0x02, 0x03, 0x02, 0x01, 
0x00, 0x01, 0x00, 0xA8, 0xA8, 0xA8, 0xA8, 0x29, 0x29, 0x29, 0x29, 0x21, 0x20, 
0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+   _INIT_DCS_CMD(0xD8, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA, 
0xAA, 0xAA, 0xAA, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00),
+   _INIT_DCS_CMD(0xE7, 0x07, 0x10, 0x10, 0x1A, 0x26, 0x9E, 0x00, 0x4F, 
0xA0, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x0A, 0x02, 0x02, 0x00, 0x33, 
0x02, 0x04, 0x18, 0x01),
+   _INIT_DCS_CMD(0xBD, 0x01),
+   _INIT_DCS_CMD(0xB1, 0x01, 0x7F, 0x11, 0xFD),
+   _INIT_DCS_CMD(0xCB, 0x86),
+   _INIT_DCS_CMD(0xD8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA, 0xAA, 
0xAA, 0xAA, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00),
+   _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x2B, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 
0xA0, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00),
+   _INIT_DCS_CMD(0xBD, 0x02),
+   _INIT_DCS_CMD(0xBF, 0xF2),
+   _INIT_DCS_CMD(0xCB, 0x03, 0x07, 0x00, 0x10, 0x79),
+   _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xFF, 
0xFF, 0xFF, 0xFA, 0xA0),
+   _INIT_DCS_CMD(0xE7, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0x00, 0x00, 
0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, 0x20, 0x6E, 0x02, 0x01, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _INIT_DCS_CMD(0xBD, 0x03),
+   _INIT_DCS_CMD(0xD8, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA, 
0xAA, 0xAA, 0xAA, 0xA0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xFF, 0xFF, 
0xFF, 0xFA, 0xA0, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAA, 0xAA, 0xAA, 0xAA, 
0xAA, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00),
+   _INIT_DCS_CMD(0xE9, 0xC6),
+   _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xE1, 0x00),
+   _INIT_DCS_CMD(0xBD, 0x00),
+   _INIT_DCS_CMD(0xE9, 0xC4),
+   _INIT_DCS_CMD(0xBA, 0x96),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xBD, 0x01),
+   _INIT_DCS_CMD(0xE9, 0xC5),
+   _INIT_DCS_CMD(0xBA, 0x4F),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xBD, 0x00),
+   _INIT_DELAY_CMD(50),
+   _INIT_DCS_CMD(0x11),
+   _INIT_DELAY_CM

[PATCH v1 2/4] drm/panel: boe-tv101wum-nl6: Support for BOE nv110wum-l60 MIPI-DSI panel

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
with the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new
compatible with panel specific config.

Signed-off-by: Cong Yang 
---
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 115 ++
 1 file changed, 115 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 0ffe8f8c01de..f91827e1548c 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1368,6 +1368,91 @@ static const struct panel_init_cmd 
starry_himax83102_j02_init_cmd[] = {
{},
 };
 
+static const struct panel_init_cmd boe_nv110wum_init_cmd[] = {
+   _INIT_DELAY_CMD(60),
+   _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+   _INIT_DCS_CMD(0xB1, 0x2C, 0xAF, 0xAF, 0x2B, 0xEB, 0x42, 0xE1, 0x4D, 
0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11, 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 
0x8F, 0xFF, 0x08, 0x9A, 0x33),
+   _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x71, 0x3C, 
0xA3, 0x11, 0x00, 0x00, 0x00, 0x88, 0xF5, 0x22, 0x8F),
+   _INIT_DCS_CMD(0xB4, 0x49, 0x49, 0x32, 0x32, 0x14, 0x32, 0x84, 0x6E, 
0x84, 0x6E, 0x01, 0x9C),
+   _INIT_DCS_CMD(0xE9, 0xCD),
+   _INIT_DCS_CMD(0xBA, 0x84),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+
+   _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+   _INIT_DCS_CMD(0xBE, 0x20),
+   _INIT_DCS_CMD(0xBF, 0xFC, 0x84),
+
+   _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x00, 0x00, 0xA0, 0x61, 0x08, 
0xF5, 0x03),
+   _INIT_DCS_CMD(0xE9, 0xCC),
+   _INIT_DCS_CMD(0xC7, 0x80),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xE9, 0xC6),
+   _INIT_DCS_CMD(0xC8, 0x97),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+
+   _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x30, 0xD4, 0x01),
+   _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x34),
+   _INIT_DCS_CMD(0xCC, 0x02, 0x03, 0x44),
+   _INIT_DCS_CMD(0xE9, 0xC4),
+   _INIT_DCS_CMD(0xD0, 0x03),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
+   _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F, 0x11),
+
+   _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0x04, 
0x08, 0x37, 0x37, 0x64, 0x4B, 0x11, 0x11, 0x03, 0x03, 0x32, 0x10, 0x0E, 0x00, 
0x0E, 0x32, 0x10, 0x0A, 0x00, 0x0A, 0x32,
+   0x17, 0x98, 0x07, 0x98, 0x00, 0x00),
+   _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x1E, 0x1E, 0x1E, 0x1E, 
0x1F, 0x1F, 0x1F, 0x1F, 0x24, 0x24, 0x24, 0x24, 0x07, 0x06, 0x07, 0x06, 0x05, 
0x04, 0x05, 0x04, 0x03, 0x02, 0x03, 0x02, 0x01, 0x00, 0x01, 0x00, 0x21, 0x20, 
0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+   _INIT_DCS_CMD(0xD8, 0xAF, 0xAA, 0xAA, 0xAA, 0xAA, 0xA0, 0xAF, 0xAA, 
0xAA, 0xAA, 0xAA, 0xA0),
+
+   _INIT_DCS_CMD(0xE0, 0x00, 0x05, 0x0D, 0x14, 0x1B, 0x2C, 0x44, 0x49, 
0x51, 0x4C, 0x67, 0x6C, 0x71, 0x80, 0x7D, 0x84, 0x8D, 0xA0, 0xA0, 0x4F, 0x58, 
0x64, 0x73, 0x00, 0x05, 0x0D, 0x14, 0x1B, 0x2C, 0x44, 0x49, 0x51, 0x4C, 0x67, 
0x6C, 0x71, 0x80, 0x7D, 0x84, 0x8D, 0xA0, 0xA0, 0x4F, 0x58, 0x64, 0x73),
+   _INIT_DCS_CMD(0xE7, 0x07, 0x10, 0x10, 0x1A, 0x26, 0x9E, 0x00, 0x53, 
0x9B, 0x14, 0x14),
+   _INIT_DCS_CMD(0xE1, 0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x07, 0x80, 
0x02, 0x58, 0x00, 0x14, 0x02, 0x58, 0x02, 0x58, 0x02, 0x00, 0x02, 0x2C, 0x00, 
0x20, 0x02, 0x02, 0x00, 0x08, 0x00, 0x0C,
+   0x05, 0x0E, 0x04, 0x94, 0x18, 0x00, 0x10, 0xF0, 0x03, 
0x0C, 0x20, 0x00, 0x06, 0x0B, 0x0B, 0x33, 0x0E),
+   _INIT_DCS_CMD(0xBD, 0x01),
+   _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xFF, 
0xFF, 0xFF, 0xFA, 0xA0),
+   _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
+   _INIT_DCS_CMD(0xCB, 0x86),
+   _INIT_DCS_CMD(0xD2, 0x96),
+   _INIT_DCS_CMD(0xE9, 0xC9),
+   _INIT_DCS_CMD(0xD3, 0x84),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xE9, 0xD1),
+   _INIT_DCS_CMD(0xE1, 0xF6, 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 
0x74),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+
+   _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x2B, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 
0xA0, 0x00, 0x00),
+   _INIT_DCS_CMD(0xBD, 0x02),
+   _INIT_DCS_CMD(0xB4, 0x02, 0x00, 0xBB, 0x11),
+   _INIT_DCS_CMD(0xD8, 0xFF, 0xAF, 0xFF, 0xFF, 0xFA, 0xA0, 0xFF, 0xAF, 
0xFF, 0xFF, 0xFA, 0xA0),
+   _INIT_DCS_CMD(0xE7, 0xFE, 0x01, 0xFE, 0x01, 0xFE, 0x01, 0x00, 0x00, 
0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, 0x20, 0x65, 0x02, 0x01, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
+
+   _INIT_DCS_CMD(0xBD, 0x03),
+   _INIT_DCS_CMD(0xD8, 0xAA, 0xAF, 0xAA, 0xAA, 0xA0, 0x00, 0xAA, 0xAF, 
0xAA, 0xAA, 0xA0, 0x00, 0xAA, 0xAF, 0xAA, 0xAA, 0xA0, 0x00, 0xAA, 0xAF, 0xAA, 
0xAA, 0xA0, 0x00),
+   _INIT_DCS_CMD(0xE9, 0xC6),
+   _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xE1, 0x00),
+
+   _INIT_DCS_CMD(0xBD,

[PATCH v1 1/4] dt-bindings: display: panel: Add compatible for BOE nv110wum-l60

[Cong Yang]

The BOE nv110wum-l60 is a 11.0" WUXGA TFT LCD panel, which fits in nicely
with the existing panel-boe-tv101wum-nl6 driver. Hence, we add a new
compatible with panel specific config.

Signed-off-by: Cong Yang 
---
 .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml 
b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 906ef62709b8..50351dd3d6e5 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -36,6 +36,8 @@ properties:
   - starry,himax83102-j02
 # STARRY ili9882t 10.51" WUXGA TFT LCD panel
   - starry,ili9882t
+# Boe nv110wum-l60 11.0" WUXGA TFT LCD panel
+  - boe,nv110wum-l60
 
   reg:
 description: the virtual channel number of a DSI peripheral
-- 
2.25.1

[PATCH v1 0/2] Support BOE nv110wum-l60 and IVO t109nw41 MIPI-DSI panel

[Cong Yang]

BOE nv110wum-l60 and IVO t109nw41 both 11.0" WUXGA TFT LCD panel,
which fits in nicely with the existing panel-boe-tv101wum-nl6 driver.
Add compatible for BOE nv110wum-l60 and IVO t109nw41
in dt-bindings.

Cong Yang (4):
  dt-bindings: display: panel: Add compatible for BOE nv110wum-l60
  drm/panel: boe-tv101wum-nl6: Support for BOE nv110wum-l60 MIPI-DSI
panel
  dt-bindings: display: panel: Add compatible for IVO t109nw41
  drm/panel: boe-tv101wum-nl6: Support for IVO t109nw41 MIPI-DSI panel

 .../display/panel/boe,tv101wum-nl6.yaml   |   4 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 213 ++
 2 files changed, 217 insertions(+)

-- 
2.25.1

Re: [PATCH V2] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP (again)

[cong yang]

Hi,

Doug Anderson  于2024年3月6日周三 08:23写道：

>
> Cong,
>
> On Mon, Mar 4, 2024 at 5:26 PM Cong Yang
>  wrote:
> >
> > The current measured frame rate is 59.95Hz, which does not meet the
> > requirements of touch-stylus and stylus cannot work normally. After
> > adjustment, the actual measurement is 60.001Hz. Now this panel looks
> > like it's only used by me on the MTK platform, so let's change this
> > set of parameters.
> >
> > Fixes: cea7008190ad ("drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 
> > panel HFP and HBP")
> > Signed-off-by: Cong Yang 
> > ---
> >  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
> >  1 file changed, 4 insertions(+), 4 deletions(-)
>
> I actually already made these fixes myself for you and applied. My
> notes were mostly for you to keep in mind for next time. This is
> already in drm-misc-fixes as:

Oh! I see. Many Thanks.

>
> 9dfc46c87cdc drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02
> panel HFP and HBP (again)
>
> -Doug

[PATCH V2] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP (again)

[Cong Yang]

The current measured frame rate is 59.95Hz, which does not meet the
requirements of touch-stylus and stylus cannot work normally. After
adjustment, the actual measurement is 60.001Hz. Now this panel looks
like it's only used by me on the MTK platform, so let's change this
set of parameters.

Fixes: cea7008190ad ("drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 
panel HFP and HBP")
Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index bc08814954f9..0ffe8f8c01de 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1768,11 +1768,11 @@ static const struct panel_desc 
starry_qfh032011_53g_desc = {
 };
 
 static const struct drm_display_mode starry_himax83102_j02_default_mode = {
-   .clock = 162850,
+   .clock = 162680,
.hdisplay = 1200,
-   .hsync_start = 1200 + 50,
-   .hsync_end = 1200 + 50 + 20,
-   .htotal = 1200 + 50 + 20 + 50,
+   .hsync_start = 1200 + 60,
+   .hsync_end = 1200 + 60 + 20,
+   .htotal = 1200 + 60 + 20 + 40,
.vdisplay = 1920,
.vsync_start = 1920 + 116,
.vsync_end = 1920 + 116 + 8,
-- 
2.25.1

Re: [PATCH] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[cong yang]

Hi,

On Tue, Mar 5, 2024 at 12:51 AM Doug Anderson  wrote:
>
> Hi,
>
> On Thu, Feb 29, 2024 at 10:11 PM Cong Yang
>  wrote:
> >
> > The current measured frame rate is 59.95Hz, which does not meet the
> > requirements of touch-stylus and stylus cannot work normally. After
> > adjustment, the actual measurement is 60.001Hz. Now this panel looks
> > like it's only used by me on the MTK platform, so let's change this
> > set of parameters.
> >
> > Fixes: cea7008190ad ("drm/panel: Fine tune Himax83102-j02 panel HFP and 
> > HBP")
>
> Your "Fixes:" tag is not quite right. It needs to have the _exact_
> subject of the old commit message, AKA:
>
> Fixes: cea7008190ad ("drm/panel: boe-tv101wum-nl6: Fine tune
> Himax83102-j02 panel HFP and HBP")

Ack! Thanks, I’ll fix it now.

>
> > Signed-off-by: Cong Yang 
> > ---
> >  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
> >  1 file changed, 4 insertions(+), 4 deletions(-)
>
> A little odd that the patch you're fixing claimed that it caused the
> measured rate to be 60.01Hz and here you're saying that it ended up
> being 59.95Hz. I guess there was a measurement error when the previous
> patch was posted?

Yes, the previous  patch measurement was wrong.

>
> In any case, the argument still holds that this is a panel that still
> appears to be only used by your board, so small tweaks to the numbers
> here seem OK.
>
> Landed to "drm-misc-fixes" after:
> * Adding "(again)" to the end of the subject to make it distinct from
> the previous patch description
> * Fixing your Fixes tag
>
> 9dfc46c87cdc drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02
> panel HFP and HBP (again)

Got it. Thanks.

>
>
> -Doug

[PATCH] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[Cong Yang]

The current measured frame rate is 59.95Hz, which does not meet the
requirements of touch-stylus and stylus cannot work normally. After
adjustment, the actual measurement is 60.001Hz. Now this panel looks
like it's only used by me on the MTK platform, so let's change this
set of parameters.

Fixes: cea7008190ad ("drm/panel: Fine tune Himax83102-j02 panel HFP and HBP")
Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index bc08814954f9..0ffe8f8c01de 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1768,11 +1768,11 @@ static const struct panel_desc 
starry_qfh032011_53g_desc = {
 };
 
 static const struct drm_display_mode starry_himax83102_j02_default_mode = {
-   .clock = 162850,
+   .clock = 162680,
.hdisplay = 1200,
-   .hsync_start = 1200 + 50,
-   .hsync_end = 1200 + 50 + 20,
-   .htotal = 1200 + 50 + 20 + 50,
+   .hsync_start = 1200 + 60,
+   .hsync_end = 1200 + 60 + 20,
+   .htotal = 1200 + 60 + 20 + 40,
.vdisplay = 1920,
.vsync_start = 1920 + 116,
.vsync_end = 1920 + 116 + 8,
-- 
2.25.1

[PATCH V3] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[Cong Yang]

The refresh reported by modetest is 60.46Hz, and the actual measurement
is 60.01Hz, which is outside the expected tolerance. Adjust hporch and
pixel clock to fix it. After repair, modetest and actual measurement were
all 60.01Hz.

Modetest refresh = Pixel CLK/ htotal* vtotal, but measurement frame rate
is HS->LP cycle time(Vblanking). Measured frame rate is not only affecte
by Htotal/Vtotal/pixel clock, also affected by Lane-num/PixelBit/LineTime
/DSI CLK. Assume that the DSI controller could not make the mode that we
requested(presumably it's PLL couldn't generate the exact pixel clock?).
If you use a different DSI controller, you may need to readjust these
parameters. Now this panel looks like it's only used by me on the MTK
platform, so let's change this set of parameters.

Fixes: 1bc2ef065f13 ("drm/panel: Support for Starry-himax83102-j02 TDDI 
MIPI-DSI panel")
Signed-off-by: Cong Yang 
Reviewed-by: Douglas Anderson 
---
Chage since V2:

- Update commit message.

V2: 
https://lore.kernel.org/all/20231117032500.2923624-1-yangco...@huaqin.corp-partner.google.com

Chage since V1:

- Update commit message.

V1: 
https://lore.kernel.org/all/20231110094553.2361842-1-yangco...@huaqin.corp-partner.google.com
---
 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 4f370bc6dca8..5f7e7dee8a82 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1768,11 +1768,11 @@ static const struct panel_desc 
starry_qfh032011_53g_desc = {
 };
 
 static const struct drm_display_mode starry_himax83102_j02_default_mode = {
-   .clock = 161600,
+   .clock = 162850,
.hdisplay = 1200,
-   .hsync_start = 1200 + 40,
-   .hsync_end = 1200 + 40 + 20,
-   .htotal = 1200 + 40 + 20 + 40,
+   .hsync_start = 1200 + 50,
+   .hsync_end = 1200 + 50 + 20,
+   .htotal = 1200 + 50 + 20 + 50,
.vdisplay = 1920,
.vsync_start = 1920 + 116,
.vsync_end = 1920 + 116 + 8,
-- 
2.25.1

Re: [PATCH V2] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[cong yang]

Hi,

On Sat, Nov 18, 2023 at 1:11 AM Doug Anderson  wrote:
>
> Hi,
>
> On Thu, Nov 16, 2023 at 7:25 PM Cong Yang
>  wrote:
> >
> > The refresh reported by modetest is 60.46Hz, and the actual measurement
> > is 60.01Hz, which is outside the expected tolerance.
>
> Presumably you've swapped the numbers above? The value reported by
> modetest is 60.01Hz and the actual measurement is 60.46Hz?

No, the value reported by modetest is 60.46Hz.


>
> > Adjust hporch and
> > pixel clock to fix it. After repair, modetest and actual measurement were
> > all 60.01Hz.
> >
> > Modetest refresh = Pixel CLK/ htotal* vtotal, but measurement frame rate
> > is HS->LP cycle time(Vblanking). Measured frame rate is not only affected
> > by Htotal/Vtotal/pixel clock, also affecte by Lane-num/PixelBit/LineTime
>
> s/affecte/affected
>
> For me, the important part would be to explain the reason for the
> difference. I assume that the DSI controller could not make the mode
> that we requested exactly (presumably it's PLL couldn't generate the
> exact pixel clock?). This new mode was picked to be achievable by the
> DSI controller on the system that the panel is used on.
>
>
> > /DSI CLK. If you use a different SOC platform mipi controller, you may
> > need to readjust these parameters. Now this panel looks like it's only used
> > by me on the MTK platform, so let's change this set of parameters.
> >
> > Fixes: 1bc2ef065f13 ("drm/panel: Support for Starry-himax83102-j02 TDDI 
> > MIPI-DSI panel")
> > Signed-off-by: Cong Yang 
> > ---
> > Chage since V1:
> >
> > - Update commit message.
> >
> > V1: 
> > https://lore.kernel.org/all/20231110094553.2361842-1-yangco...@huaqin.corp-partner.google.com
> > ---
> >  drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
> >  1 file changed, 4 insertions(+), 4 deletions(-)
>
> As per discussion in V1, I'm OK with this.
>
> Reviewed-by: Douglas Anderson 
>
> I'll probably give it at least another week before applying in case
> anyone else wants to speak up. It would be nice if you could send a V3
> with a few more touchups to the commit message, especially since the
> 60.01 and 60.46 numbers were backward (unless I'm mistaken).
>
>
> -Doug

[PATCH V2] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[Cong Yang]

The refresh reported by modetest is 60.46Hz, and the actual measurement
is 60.01Hz, which is outside the expected tolerance. Adjust hporch and
pixel clock to fix it. After repair, modetest and actual measurement were
all 60.01Hz.

Modetest refresh = Pixel CLK/ htotal* vtotal, but measurement frame rate
is HS->LP cycle time(Vblanking). Measured frame rate is not only affected
by Htotal/Vtotal/pixel clock, also affecte by Lane-num/PixelBit/LineTime
/DSI CLK. If you use a different SOC platform mipi controller, you may
need to readjust these parameters. Now this panel looks like it's only used
by me on the MTK platform, so let's change this set of parameters.

Fixes: 1bc2ef065f13 ("drm/panel: Support for Starry-himax83102-j02 TDDI 
MIPI-DSI panel")
Signed-off-by: Cong Yang 
---
Chage since V1:

- Update commit message.

V1: 
https://lore.kernel.org/all/20231110094553.2361842-1-yangco...@huaqin.corp-partner.google.com
---
 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 4f370bc6dca8..5f7e7dee8a82 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1768,11 +1768,11 @@ static const struct panel_desc 
starry_qfh032011_53g_desc = {
 };
 
 static const struct drm_display_mode starry_himax83102_j02_default_mode = {
-   .clock = 161600,
+   .clock = 162850,
.hdisplay = 1200,
-   .hsync_start = 1200 + 40,
-   .hsync_end = 1200 + 40 + 20,
-   .htotal = 1200 + 40 + 20 + 40,
+   .hsync_start = 1200 + 50,
+   .hsync_end = 1200 + 50 + 20,
+   .htotal = 1200 + 50 + 20 + 50,
.vdisplay = 1920,
.vsync_start = 1920 + 116,
.vsync_end = 1920 + 116 + 8,
-- 
2.25.1

Re: [PATCH] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[cong yang]

Hi,

On Sat, Nov 11, 2023 at 5:10 AM Doug Anderson  wrote:
>
> Hi,
>
> On Fri, Nov 10, 2023 at 1:46 AM Cong Yang
>  wrote:
> >
> > The refresh reported by modotest is 60.46Hz, and the actual measurement
>
> s/modotets/modetest/
>
> > is 60.01Hz, which is outside the expected tolerance. Adjust hporch and
> > pixel clock to fix it. After repair, modetest and actual measurement were
> > all 60.01Hz.
>
> Can you explain this more? Why was the rate that modetest reported
> different from the actual measured rate? This feels like it's a
> problem with your MIPI controller not being able to accurately make
> the rate. Is that it?

modetest refresh = Pixel CLK/ htotal  * vtotal
measurement HS->LP cycle time = Vblanking
According to the vendor's feedback, the actual measured frame rate is not
only affected by Htotal/Vtotal/pixel clock,  Lane-num/PixelBit/LineTime also
affected. It seems that if  change to a different SOC platform,  may
need to readjust
these parameters.


>
> If so then this is a bit of a hack. Someone else using the same panel
> might have a MIPI controller that can make slightly different clock
> rates. I think you're currently the only user of the panel, so maybe
> this isn't too terrible (would love to hear other people's advice).
>
> Assuming this is actually the problem there are probably at least
> several different ways to solve this. One that comes to mind is the
> solution we ended up with for eDP where we allowed specifying some of
> this stuff in the device tree, though that might cause a whole pile of
> debates...
>
> In any case, as I said above this patch is probably OK if you're the
> only user of this panel, but it might be at least good to add
> something to the commit message?

OK, I'll add some instructions in V2. Thanks.

>
> -Doug

[PATCH] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[Cong Yang]

The refresh reported by modotest is 60.46Hz, and the actual measurement
is 60.01Hz, which is outside the expected tolerance. Adjust hporch and
pixel clock to fix it. After repair, modetest and actual measurement were
all 60.01Hz.

Fixes: 1bc2ef065f13 ("drm/panel: Support for Starry-himax83102-j02 TDDI 
MIPI-DSI panel")
Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 4f370bc6dca8..5f7e7dee8a82 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1768,11 +1768,11 @@ static const struct panel_desc 
starry_qfh032011_53g_desc = {
 };
 
 static const struct drm_display_mode starry_himax83102_j02_default_mode = {
-   .clock = 161600,
+   .clock = 162850,
.hdisplay = 1200,
-   .hsync_start = 1200 + 40,
-   .hsync_end = 1200 + 40 + 20,
-   .htotal = 1200 + 40 + 20 + 40,
+   .hsync_start = 1200 + 50,
+   .hsync_end = 1200 + 50 + 20,
+   .htotal = 1200 + 50 + 20 + 50,
.vdisplay = 1920,
.vsync_start = 1920 + 116,
.vsync_end = 1920 + 116 + 8,
-- 
2.25.1

[v4 3/3] arm64: defconfig: Enable ILITEK_ILI9882T panel

[Cong Yang]

DRM_PANEL_ILITEK_ILI9882T is being split out from
DRM_PANEL_BOE_TV101WUM_NL6. Since the arm64 defconfig had the BOE
panel driver enabled, let's also enable the Ilitek driver.

Reviewed-by: Douglas Anderson 
Signed-off-by: Cong Yang 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 0777bcae9104..c3453dcbad3e 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -813,6 +813,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
 CONFIG_DRM_PANEL_SITRONIX_ST7703=m
-- 
2.25.1

[v4 2/3] drm/panel: ili9882t: Avoid blurred screen from fast sleep

[Cong Yang]

At present, we have found that there may be a problem of blurred
screen during fast sleep/resume. The direct cause of the blurred
screen is that the IC does not receive 0x28/0x10. Because of the
particularity of the IC, before the panel enters sleep hid must
stop scanning, as i2c_hid_core_suspend before ili9882t_disable.
If move the ili9882t_enter_sleep_mode function to ili9882t_unprepare,
touch reset will pull low before panel entersleep, which does not meet
the timing requirements.. So in order to solve this problem, the IC
can handle it through the exception mechanism when it cannot receive
0x28/0x10 command. Handling exceptions requires a reset 50ms delay.
Refer to vendor detailed analysis [1].

Ilitek vendor also suggested switching the page before entering sleep to
avoid panel IC not receiving 0x28/0x10 command.

Note: 0x28 is display off, 0x10 is sleep in.

[1]: https://github.com/ILITEK-LoganLin/Document/tree/main/ILITEK_Power_Sequence

Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 22 ++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
index 93a40c2f1483..267a5307041c 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
@@ -463,6 +463,24 @@ static int ili9882t_init_dcs_cmd(struct ili9882t *ili)
return 0;
 }
 
+static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
+{
+   int ret;
+   const struct panel_init_cmd cmd = _INIT_SWITCH_PAGE_CMD(page);
+
+   ret = mipi_dsi_dcs_write(dsi, cmd.data[0],
+cmd.len <= 1 ? NULL :
+[1],
+cmd.len - 1);
+   if (ret) {
+   dev_err(>dev,
+   "error switching panel controller page (%d)\n", ret);
+   return ret;
+   }
+
+   return 0;
+}
+
 static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 {
struct mipi_dsi_device *dsi = ili->dsi;
@@ -484,8 +502,10 @@ static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 static int ili9882t_disable(struct drm_panel *panel)
 {
struct ili9882t *ili = to_ili9882t(panel);
+   struct mipi_dsi_device *dsi = ili->dsi;
int ret;
 
+   ili9882t_switch_page(dsi, 0x00);
ret = ili9882t_enter_sleep_mode(ili);
if (ret < 0) {
dev_err(panel->dev, "failed to set panel off: %d\n", ret);
@@ -546,7 +566,7 @@ static int ili9882t_prepare(struct drm_panel *panel)
gpiod_set_value(ili->enable_gpio, 1);
usleep_range(1000, 2000);
gpiod_set_value(ili->enable_gpio, 0);
-   usleep_range(1000, 2000);
+   msleep(50);
gpiod_set_value(ili->enable_gpio, 1);
usleep_range(6000, 1);
 
-- 
2.25.1

[v4 1/3] drm/panel: ili9882t: Break out as separate driver

[Cong Yang]

The Starry ILI9882t-based panel should never have been part of the boe
tv101wum driver, it is clearly based on the Ilitek ILI9882t display
controller and if you look at the custom command sequences for the
panel these clearly contain the signature Ilitek page switch (0xff)
commands. The hardware has nothing in common with the other panels
supported by this driver.

Break this out into a separate driver and config symbol instead.

If the placement here is out of convenience for using similar code,
we should consider creating a helper library instead.

Co-developed-by: Linus Walleij 
Signed-off-by: Linus Walleij 
Reviewed-by: Linus Walleij 
Reviewed-by: Douglas Anderson 
Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 371 -
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 759 ++
 4 files changed, 769 insertions(+), 371 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ecb22ea326cb..99e14dc212ec 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -203,6 +203,15 @@ config DRM_PANEL_ILITEK_ILI9881C
  Say Y if you want to enable support for panels based on the
  Ilitek ILI9881c controller.
 
+config DRM_PANEL_ILITEK_ILI9882T
+   tristate "Ilitek ILI9882t-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Ilitek ILI9882t controller.
+
 config DRM_PANEL_INNOLUX_EJ030NA
 tristate "Innolux EJ030NA 320x480 LCD panel"
 depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index e14ce55a0875..d10c3de51c6d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JADARD_JD9365DA_H3) += panel-jadard-jd9365da-h3.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 5ac926281d2c..4f370bc6dca8 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1370,346 +1370,6 @@ static const struct panel_init_cmd 
starry_himax83102_j02_init_cmd[] = {
{},
 };
 
-static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
-   _INIT_DELAY_CMD(5),
-   _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x01),
-   _INIT_DCS_CMD(0x00, 0x42),
-   _INIT_DCS_CMD(0x01, 0x11),
-   _INIT_DCS_CMD(0x02, 0x00),
-   _INIT_DCS_CMD(0x03, 0x00),
-
-   _INIT_DCS_CMD(0x04, 0x01),
-   _INIT_DCS_CMD(0x05, 0x11),
-   _INIT_DCS_CMD(0x06, 0x00),
-   _INIT_DCS_CMD(0x07, 0x00),
-
-   _INIT_DCS_CMD(0x08, 0x80),
-   _INIT_DCS_CMD(0x09, 0x81),
-   _INIT_DCS_CMD(0x0A, 0x71),
-   _INIT_DCS_CMD(0x0B, 0x00),
-
-   _INIT_DCS_CMD(0x0C, 0x00),
-   _INIT_DCS_CMD(0x0E, 0x1A),
-
-   _INIT_DCS_CMD(0x24, 0x00),
-   _INIT_DCS_CMD(0x25, 0x00),
-   _INIT_DCS_CMD(0x26, 0x00),
-   _INIT_DCS_CMD(0x27, 0x00),
-
-   _INIT_DCS_CMD(0x2C, 0xD4),
-   _INIT_DCS_CMD(0xB9, 0x40),
-
-   _INIT_DCS_CMD(0xB0, 0x11),
-
-   _INIT_DCS_CMD(0xE6, 0x32),
-   _INIT_DCS_CMD(0xD1, 0x30),
-
-   _INIT_DCS_CMD(0xD6, 0x55),
-
-   _INIT_DCS_CMD(0xD0, 0x01),
-   _INIT_DCS_CMD(0xE3, 0x93),
-   _INIT_DCS_CMD(0xE4, 0x00),
-   _INIT_DCS_CMD(0xE5, 0x80),
-
-   _INIT_DCS_CMD(0x31, 0x07),
-   _INIT_DCS_CMD(0x32, 0x07),
-   _INIT_DCS_CMD(0x33, 0x07),
-   _INIT_DCS_CMD(0x34, 0x07),
-   _INIT_DCS_CMD(0x35, 0x07),
-   _INIT_DCS_CMD(0x36, 0x01),
-   _INIT_DCS_CMD(0x37, 0x00),
-   _INIT_DCS_CMD(0x38, 0x28),
-   _INIT_DCS_CMD(0x39, 0x29),
-   _INIT_DCS_CMD(0x3A, 0x11),
-   _INIT_DCS_CMD(0x3B, 0x13),
-   _INIT_DCS_CMD(0x3C, 0x15),
-   _INIT_DCS_CMD(0x3D, 0x17),
-   _INIT_DCS_CMD(0x3E, 0x09),
-   _INIT_DCS_CMD(0x3F, 0x0D),
-   _INIT_DCS_CMD(0x40, 0x02),
-   _INIT_DCS_CMD(0x41, 0x02),
-   _INIT_DCS_CMD(0x42, 0x02),
-   _INIT_DCS_CMD(0x43, 0x02),
-   _INIT_DCS_CMD(0x44, 0x02),
-   _INIT_DCS_CMD(0x45, 0x02),
-   _INIT_DCS_CMD(0x46, 0x02),
-
-   _INIT_DCS_CMD(0x47, 0x07),
-   _INIT_DCS_CMD(0x48, 0x07),
-   

[v4 0/3] Break out as separate driver from boe-tv101wum-nl6 panel driver

[Cong Yang]

Linus series proposed to break out ili9882t as separate driver, 
but he didn't have time for that extensive rework of the driver.
As discussed by Linus and Doug [1], keep macro using the "struct panel_init_cmd"
until we get some resolution about the binary size issue.

[1]: 
https://lore.kernel.org/all/20230703-fix-boe-tv101wum-nl6-v3-0-bd6e9432c...@linaro.org

In [v1 2/2], Doug suggested move the ili9882t_enter_sleep_mode function
to ili9882t_unprepare. I tried this scheme and the test failed. I will 
continue to investigate the rootcause with ilitek, which may take a long time .
So if possible, apply this patch first. If there are new solutions later, I 
will continue upstream.

[v1 2/2] 
https://lore.kernel.org/all/CAD=FV=XtqPJ77dx8uRb0=tmvc3cvgh5x+7mujexgcg228kz...@mail.gmail.com/

Changes in v4:
- PATCH 2/3: Change usleep_range(5,51000) to msleep(50);.
- Link to v3: 
https://lore.kernel.org/all/20231012121004.2127918-1-yangco...@huaqin.corp-partner.google.com/

Changes in v3:
- PATCH 1/3: Remove "init_cmd_length" and "linux/of_device.h" .
- PATCH 2/3: Change usleep_range(5,51000).
- PATCH 3/3: Add a little background for commit.
- Link to v2: 
https://lore.kernel.org/all/20231010121402.3687948-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/3: fix Doug comments,define "_INIT_SWITCH_PAGE_CMD" and remove the 
"shutdown".
- PATCH 2/3: Modify ili9882t_switch_page function instead of hardcoding.
- PATCH 3/3: Enable new config in defconfig.
- Link to v1: 
https://lore.kernel.org/all/20231007060639.725350-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (3):
  drm/panel: ili9882t: Break out as separate driver
  drm/panel: ili9882t: Avoid blurred screen from fast sleep
  arm64: defconfig: Enable ILITEK_ILI9882T panel

 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 371 -
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 779 ++
 5 files changed, 790 insertions(+), 371 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c

-- 
2.25.1

Re: [v3 2/3] drm/panel: ili9882t: Avoid blurred screen from fast sleep

[cong yang]

Hi,

On Fri, Oct 13, 2023 at 10:28 AM Doug Anderson  wrote:
>
> Hi,
>
> On Thu, Oct 12, 2023 at 6:12 PM cong yang
>  wrote:
> >
> > Hi,
> >
> > On Thu, Oct 12, 2023 at 11:15 PM Doug Anderson  wrote:
> > >
> > > Hi,
> > >
> > > On Thu, Oct 12, 2023 at 5:10 AM Cong Yang
> > >  wrote:
> > > >
> > > > At present, we have found that there may be a problem of blurred
> > > > screen during fast sleep/resume. The direct cause of the blurred
> > > > screen is that the IC does not receive 0x28/0x10. Because of the
> > > > particularity of the IC, before the panel enters sleep hid must
> > > > stop scanning, as i2c_hid_core_suspend before ili9882t_disable.
> > > > If move the ili9882t_enter_sleep_mode function to ili9882t_unprepare,
> > > > touch reset will pull low before panel entersleep, which does not meet
> > > > the timing requirements..
> > >
> > > The above makes me believe that the reset GPIO should be moved out of
> > > the input driver and into the panel driver. I could just imagine that
> > > the kernel might have some reason it wants to suspend the i2c hid
> > > device. If that causes the panel to suddenly start failing then that
> > > would be bad... I think we should fix this.
> >
> > Thanks, I will confirm with ilitek in further analysis and use "move
> > the ili9882t_enter_sleep_mode
> > function to ili9882t_unprepare".  Is the test failure really because
> > the touch reset timing
> > does not match? There is also a separate reset GPIO on the panel.
> > Shouldn't touch reset not
> > affect the panel?
> >
> > If we find a better solution I will continue upstream,。 So is it
> > possible to apply this plan now?
>
> I wouldn't be too upset at applying the current code as long as you're
> going to continue to investigate. We can always continue to iterate on
> it and having something working reasonably well is better than nothing
> at all. However, I probably would wait at least 1 week before applying
> any patch from you just simply out of courtesy to give others on the
> mailing list time to express their comments. ...presumably we could
> get to the bottom of the problem in that 1 week time anyway...
>
> I'm not trying to be an obstinate pain here--I'm merely trying to make
> sure that whatever we land will continue to work across kernel uprevs,
> even if driver probe order / timing changes in the kernel. If the
> panel is really so tied to the touchscreen device's reset GPIO timing
> then it worries me. What happens, for instance, if you disable the
> touchscreen CONFIG in the kernel? Does the panel still work, or is
> that extra reset GPIO totally critical to the functioning of the
> panel. If it's totally critical then it probably makes sense to move
> to the panel driver given that the touchscreen is a panel follower
> anyway...

Thanks. It looks like the panel works fine after I disable the touch screen
device. So the panel may not depend on touch screen reset.
Need to continue investigating the root cause for current status.

>
>
> > > > So in order to solve this problem, the IC
> > > > can handle it through the exception mechanism when it cannot receive
> > > > 0x28/0x10 command. Handling exceptions requires a reset 50ms delay.
> > > > Refer to vendor detailed analysis [1].
> > > >
> > > > Ilitek vendor also suggested switching the page before entering sleep to
> > > > avoid panel IC not receiving 0x28/0x10 command.
> > > >
> > > > Note: 0x28 is display off, 0x10 is sleep in.
> > > >
> > > > [1]: 
> > > > https://github.com/ILITEK-LoganLin/Document/tree/main/ILITEK_Power_Sequence
> > > >
> > > > Signed-off-by: Cong Yang 
> > > > ---
> > > >  drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 22 ++-
> > > >  1 file changed, 21 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c 
> > > > b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > > > index 93a40c2f1483..54ff1efb94aa 100644
> > > > --- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > > > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > > > @@ -463,6 +463,24 @@ static int ili9882t_init_dcs_cmd(struct ili9882t 
> > > > *ili)
> > > > return 0;
> > > >  }
> > > >
> > > > +static int ili9882t_switch_page(struct mipi_dsi_device *d

Re: [v3 2/3] drm/panel: ili9882t: Avoid blurred screen from fast sleep

[cong yang]

Hi,

On Thu, Oct 12, 2023 at 11:15 PM Doug Anderson  wrote:
>
> Hi,
>
> On Thu, Oct 12, 2023 at 5:10 AM Cong Yang
>  wrote:
> >
> > At present, we have found that there may be a problem of blurred
> > screen during fast sleep/resume. The direct cause of the blurred
> > screen is that the IC does not receive 0x28/0x10. Because of the
> > particularity of the IC, before the panel enters sleep hid must
> > stop scanning, as i2c_hid_core_suspend before ili9882t_disable.
> > If move the ili9882t_enter_sleep_mode function to ili9882t_unprepare,
> > touch reset will pull low before panel entersleep, which does not meet
> > the timing requirements..
>
> The above makes me believe that the reset GPIO should be moved out of
> the input driver and into the panel driver. I could just imagine that
> the kernel might have some reason it wants to suspend the i2c hid
> device. If that causes the panel to suddenly start failing then that
> would be bad... I think we should fix this.

Thanks, I will confirm with ilitek in further analysis and use "move
the ili9882t_enter_sleep_mode
function to ili9882t_unprepare".  Is the test failure really because
the touch reset timing
does not match? There is also a separate reset GPIO on the panel.
Shouldn't touch reset not
affect the panel?

If we find a better solution I will continue upstream,。 So is it
possible to apply this plan now?

>
>
> > So in order to solve this problem, the IC
> > can handle it through the exception mechanism when it cannot receive
> > 0x28/0x10 command. Handling exceptions requires a reset 50ms delay.
> > Refer to vendor detailed analysis [1].
> >
> > Ilitek vendor also suggested switching the page before entering sleep to
> > avoid panel IC not receiving 0x28/0x10 command.
> >
> > Note: 0x28 is display off, 0x10 is sleep in.
> >
> > [1]: 
> > https://github.com/ILITEK-LoganLin/Document/tree/main/ILITEK_Power_Sequence
> >
> > Signed-off-by: Cong Yang 
> > ---
> >  drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 22 ++-
> >  1 file changed, 21 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c 
> > b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > index 93a40c2f1483..54ff1efb94aa 100644
> > --- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > @@ -463,6 +463,24 @@ static int ili9882t_init_dcs_cmd(struct ili9882t *ili)
> > return 0;
> >  }
> >
> > +static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
> > +{
> > +   int ret;
> > +   const struct panel_init_cmd cmd = _INIT_SWITCH_PAGE_CMD(page);
> > +
> > +   ret = mipi_dsi_dcs_write(dsi, cmd.data[0],
> > +cmd.len <= 1 ? NULL :
> > +[1],
> > +cmd.len - 1);
> > +   if (ret) {
> > +   dev_err(>dev,
> > +   "error switching panel controller page (%d)\n", 
> > ret);
> > +   return ret;
> > +   }
> > +
> > +   return 0;
> > +}
> > +
> >  static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
> >  {
> > struct mipi_dsi_device *dsi = ili->dsi;
> > @@ -484,8 +502,10 @@ static int ili9882t_enter_sleep_mode(struct ili9882t 
> > *ili)
> >  static int ili9882t_disable(struct drm_panel *panel)
> >  {
> > struct ili9882t *ili = to_ili9882t(panel);
> > +   struct mipi_dsi_device *dsi = ili->dsi;
> > int ret;
> >
> > +   ili9882t_switch_page(dsi, 0x00);
> > ret = ili9882t_enter_sleep_mode(ili);
> > if (ret < 0) {
> > dev_err(panel->dev, "failed to set panel off: %d\n", ret);
> > @@ -546,7 +566,7 @@ static int ili9882t_prepare(struct drm_panel *panel)
> > gpiod_set_value(ili->enable_gpio, 1);
> > usleep_range(1000, 2000);
> > gpiod_set_value(ili->enable_gpio, 0);
> > -   usleep_range(1000, 2000);
> > +   usleep_range(5, 51000);
>
> From my previous response, I think the above is better as msleep(50).

Sorry. Will be corrected in V4.

[v3 3/3] arm64: defconfig: Enable ILITEK_ILI9882T panel

[Cong Yang]

DRM_PANEL_ILITEK_ILI9882T is being split out from
DRM_PANEL_BOE_TV101WUM_NL6. Since the arm64 defconfig had the BOE
panel driver enabled, let's also enable the Ilitek driver.

Reviewed-by: Douglas Anderson 
Signed-off-by: Cong Yang 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 0777bcae9104..c3453dcbad3e 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -813,6 +813,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
 CONFIG_DRM_PANEL_SITRONIX_ST7703=m
-- 
2.25.1

[v3 2/3] drm/panel: ili9882t: Avoid blurred screen from fast sleep

[Cong Yang]

At present, we have found that there may be a problem of blurred
screen during fast sleep/resume. The direct cause of the blurred
screen is that the IC does not receive 0x28/0x10. Because of the
particularity of the IC, before the panel enters sleep hid must
stop scanning, as i2c_hid_core_suspend before ili9882t_disable.
If move the ili9882t_enter_sleep_mode function to ili9882t_unprepare,
touch reset will pull low before panel entersleep, which does not meet
the timing requirements.. So in order to solve this problem, the IC
can handle it through the exception mechanism when it cannot receive
0x28/0x10 command. Handling exceptions requires a reset 50ms delay.
Refer to vendor detailed analysis [1].

Ilitek vendor also suggested switching the page before entering sleep to
avoid panel IC not receiving 0x28/0x10 command.

Note: 0x28 is display off, 0x10 is sleep in.

[1]: https://github.com/ILITEK-LoganLin/Document/tree/main/ILITEK_Power_Sequence

Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 22 ++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
index 93a40c2f1483..54ff1efb94aa 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
@@ -463,6 +463,24 @@ static int ili9882t_init_dcs_cmd(struct ili9882t *ili)
return 0;
 }
 
+static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
+{
+   int ret;
+   const struct panel_init_cmd cmd = _INIT_SWITCH_PAGE_CMD(page);
+
+   ret = mipi_dsi_dcs_write(dsi, cmd.data[0],
+cmd.len <= 1 ? NULL :
+[1],
+cmd.len - 1);
+   if (ret) {
+   dev_err(>dev,
+   "error switching panel controller page (%d)\n", ret);
+   return ret;
+   }
+
+   return 0;
+}
+
 static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 {
struct mipi_dsi_device *dsi = ili->dsi;
@@ -484,8 +502,10 @@ static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 static int ili9882t_disable(struct drm_panel *panel)
 {
struct ili9882t *ili = to_ili9882t(panel);
+   struct mipi_dsi_device *dsi = ili->dsi;
int ret;
 
+   ili9882t_switch_page(dsi, 0x00);
ret = ili9882t_enter_sleep_mode(ili);
if (ret < 0) {
dev_err(panel->dev, "failed to set panel off: %d\n", ret);
@@ -546,7 +566,7 @@ static int ili9882t_prepare(struct drm_panel *panel)
gpiod_set_value(ili->enable_gpio, 1);
usleep_range(1000, 2000);
gpiod_set_value(ili->enable_gpio, 0);
-   usleep_range(1000, 2000);
+   usleep_range(5, 51000);
gpiod_set_value(ili->enable_gpio, 1);
usleep_range(6000, 1);
 
-- 
2.25.1

[v3 1/3] drm/panel: ili9882t: Break out as separate driver

[Cong Yang]

The Starry ILI9882t-based panel should never have been part of the boe
tv101wum driver, it is clearly based on the Ilitek ILI9882t display
controller and if you look at the custom command sequences for the
panel these clearly contain the signature Ilitek page switch (0xff)
commands. The hardware has nothing in common with the other panels
supported by this driver.

Break this out into a separate driver and config symbol instead.

If the placement here is out of convenience for using similar code,
we should consider creating a helper library instead.

Co-developed-by: Linus Walleij 
Signed-off-by: Linus Walleij 
Reviewed-by: Linus Walleij 
Reviewed-by: Douglas Anderson 
Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 371 -
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 759 ++
 4 files changed, 769 insertions(+), 371 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ecb22ea326cb..99e14dc212ec 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -203,6 +203,15 @@ config DRM_PANEL_ILITEK_ILI9881C
  Say Y if you want to enable support for panels based on the
  Ilitek ILI9881c controller.
 
+config DRM_PANEL_ILITEK_ILI9882T
+   tristate "Ilitek ILI9882t-based panels"
+   depends on OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y if you want to enable support for panels based on the
+ Ilitek ILI9882t controller.
+
 config DRM_PANEL_INNOLUX_EJ030NA
 tristate "Innolux EJ030NA 320x480 LCD panel"
 depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index e14ce55a0875..d10c3de51c6d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_DRM_PANEL_HIMAX_HX8394) += panel-himax-hx8394.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9882T) += panel-ilitek-ili9882t.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JADARD_JD9365DA_H3) += panel-jadard-jd9365da-h3.o
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 5ac926281d2c..4f370bc6dca8 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1370,346 +1370,6 @@ static const struct panel_init_cmd 
starry_himax83102_j02_init_cmd[] = {
{},
 };
 
-static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
-   _INIT_DELAY_CMD(5),
-   _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x01),
-   _INIT_DCS_CMD(0x00, 0x42),
-   _INIT_DCS_CMD(0x01, 0x11),
-   _INIT_DCS_CMD(0x02, 0x00),
-   _INIT_DCS_CMD(0x03, 0x00),
-
-   _INIT_DCS_CMD(0x04, 0x01),
-   _INIT_DCS_CMD(0x05, 0x11),
-   _INIT_DCS_CMD(0x06, 0x00),
-   _INIT_DCS_CMD(0x07, 0x00),
-
-   _INIT_DCS_CMD(0x08, 0x80),
-   _INIT_DCS_CMD(0x09, 0x81),
-   _INIT_DCS_CMD(0x0A, 0x71),
-   _INIT_DCS_CMD(0x0B, 0x00),
-
-   _INIT_DCS_CMD(0x0C, 0x00),
-   _INIT_DCS_CMD(0x0E, 0x1A),
-
-   _INIT_DCS_CMD(0x24, 0x00),
-   _INIT_DCS_CMD(0x25, 0x00),
-   _INIT_DCS_CMD(0x26, 0x00),
-   _INIT_DCS_CMD(0x27, 0x00),
-
-   _INIT_DCS_CMD(0x2C, 0xD4),
-   _INIT_DCS_CMD(0xB9, 0x40),
-
-   _INIT_DCS_CMD(0xB0, 0x11),
-
-   _INIT_DCS_CMD(0xE6, 0x32),
-   _INIT_DCS_CMD(0xD1, 0x30),
-
-   _INIT_DCS_CMD(0xD6, 0x55),
-
-   _INIT_DCS_CMD(0xD0, 0x01),
-   _INIT_DCS_CMD(0xE3, 0x93),
-   _INIT_DCS_CMD(0xE4, 0x00),
-   _INIT_DCS_CMD(0xE5, 0x80),
-
-   _INIT_DCS_CMD(0x31, 0x07),
-   _INIT_DCS_CMD(0x32, 0x07),
-   _INIT_DCS_CMD(0x33, 0x07),
-   _INIT_DCS_CMD(0x34, 0x07),
-   _INIT_DCS_CMD(0x35, 0x07),
-   _INIT_DCS_CMD(0x36, 0x01),
-   _INIT_DCS_CMD(0x37, 0x00),
-   _INIT_DCS_CMD(0x38, 0x28),
-   _INIT_DCS_CMD(0x39, 0x29),
-   _INIT_DCS_CMD(0x3A, 0x11),
-   _INIT_DCS_CMD(0x3B, 0x13),
-   _INIT_DCS_CMD(0x3C, 0x15),
-   _INIT_DCS_CMD(0x3D, 0x17),
-   _INIT_DCS_CMD(0x3E, 0x09),
-   _INIT_DCS_CMD(0x3F, 0x0D),
-   _INIT_DCS_CMD(0x40, 0x02),
-   _INIT_DCS_CMD(0x41, 0x02),
-   _INIT_DCS_CMD(0x42, 0x02),
-   _INIT_DCS_CMD(0x43, 0x02),
-   _INIT_DCS_CMD(0x44, 0x02),
-   _INIT_DCS_CMD(0x45, 0x02),
-   _INIT_DCS_CMD(0x46, 0x02),
-
-   _INIT_DCS_CMD(0x47, 0x07),
-   _INIT_DCS_CMD(0x48, 0x07),
-   

[v3 0/3] Break out as separate driver from boe-tv101wum-nl6 panel driver

[Cong Yang]

Linus series proposed to break out ili9882t as separate driver, 
but he didn't have time for that extensive rework of the driver.
As discussed by Linus and Doug [1], keep macro using the "struct panel_init_cmd"
until we get some resolution about the binary size issue.

[1]: 
https://lore.kernel.org/all/20230703-fix-boe-tv101wum-nl6-v3-0-bd6e9432c...@linaro.org

In [v1 2/2], Doug suggested move the ili9882t_enter_sleep_mode function
to ili9882t_unprepare. I tried this scheme and the test failed, because
the touchpanel reset was already pulled low before the panel enter sleep,
which did not seem to meet the timing requirements. I hoped that the current
adding delay solution can be apply to solve the special requirements of this IC.

[v1 2/2] 
https://lore.kernel.org/all/CAD=FV=XtqPJ77dx8uRb0=tmvc3cvgh5x+7mujexgcg228kz...@mail.gmail.com/

Changes in v3:
- PATCH 1/3: Remove "init_cmd_length" and "linux/of_device.h" .
- PATCH 2/3: Change usleep_range(5,51000).
- PATCH 3/3: Add a little background for commit.
- Link to v2: 
https://lore.kernel.org/all/20231010121402.3687948-1-yangco...@huaqin.corp-partner.google.com/

Changes in v2:
- PATCH 1/3: fix Doug comments,define "_INIT_SWITCH_PAGE_CMD" and remove the 
"shutdown".
- PATCH 2/3: Modify ili9882t_switch_page function instead of hardcoding.
- PATCH 3/3: Enable new config in defconfig.
- Link to v1: 
https://lore.kernel.org/all/20231007060639.725350-1-yangco...@huaqin.corp-partner.google.com/

Cong Yang (3):
  drm/panel: ili9882t: Break out as separate driver
  drm/panel: ili9882t: Avoid blurred screen from fast sleep
  arm64: defconfig: Enable ILITEK_ILI9882T panel

 arch/arm64/configs/defconfig  |   1 +
 drivers/gpu/drm/panel/Kconfig |   9 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 371 -
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 779 ++
 5 files changed, 790 insertions(+), 371 deletions(-)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c

-- 
2.25.1

Re: [v1 2/2] drm/panel: ili9882t: Avoid blurred screen from fast sleep

[cong yang]

Hi,

On Wed, Oct 11, 2023 at 3:11 AM Doug Anderson  wrote:
>
> Hi,
>
> On Tue, Oct 10, 2023 at 4:36 AM cong yang
>  wrote:
> >
> > Hi,
> >
> > On Tue, Oct 10, 2023 at 4:44 AM Doug Anderson  wrote:
> > >
> > > Hi,
> > >
> > > On Fri, Oct 6, 2023 at 11:07 PM Cong Yang
> > >  wrote:
> > > >
> > > > At present, we have found that there may be a problem of blurred
> > > > screen during fast sleep/resume. The direct cause of the blurred
> > > > screen is that the IC does not receive 0x28/0x10. Because of the
> > > > particularity of the IC, before the panel enters sleep hid must
> > > > stop scanning, i2c_hid_core_suspend before ili9882t_disable.
> > > > This doesn't look very spec-compliant.
> > >
> > > Presumably you could be more spec compliant if we used
> > > "panel_follower" in this case? Would that be a better solution?
> >
> > In the "panel_follower" solution, the phenomenon is the same.
> > The current order is
> > ili9882t_disable=>i2c_hid_core_suspend=>elan_i2c_hid_power_down=>ili9882t_unprepare,
> > ili9882t need touchpanel stop scanning,i2c_hid_core_suspend before
> > ili9882t_disable.
>
> Ugh, that's unfortunate. Though is there a reason why you couldn't
> just move the `ili9882t_enter_sleep_mode()` to `ili9882t_unprepare()`?
> That seems like it should be OK and even perhaps makes it more
> symmetric with thue enable?

It looks like the test will still fail, because the touchpanel reset was
already pulled low before the panel enter sleep, which did not seem
to meet the timing requirements. I will explain this in the V3  cover letter.
Thanks.

>
>
> > > > @@ -507,7 +526,7 @@ static int ili9882t_prepare(struct drm_panel *panel)
> > > > gpiod_set_value(ili->enable_gpio, 1);
> > > > usleep_range(1000, 2000);
> > > > gpiod_set_value(ili->enable_gpio, 0);
> > > > -   usleep_range(1000, 2000);
> > > > +   usleep_range(4, 5);
> > >
> > > nit: use 4, 41000 instead of 4, 5. Linux almost always
> > > uses the longer delay, so that'll save ~9 ms. The only reason for the
> > > range is to optimize kernel wakeups which is really not a concern
> > > here.
> >
> > We need 50ms delay to meet the requirement.
>
> I'll respond to your v2, but if you need 50 ms then your current delay is 
> wrong.
>
>
> -Doug

Re: [v1 2/2] drm/panel: ili9882t: Avoid blurred screen from fast sleep

[cong yang]

Hi,

On Wed, Oct 11, 2023 at 3:11 AM Doug Anderson  wrote:
>
> Hi,
>
> On Tue, Oct 10, 2023 at 4:36 AM cong yang
>  wrote:
> >
> > Hi,
> >
> > On Tue, Oct 10, 2023 at 4:44 AM Doug Anderson  wrote:
> > >
> > > Hi,
> > >
> > > On Fri, Oct 6, 2023 at 11:07 PM Cong Yang
> > >  wrote:
> > > >
> > > > At present, we have found that there may be a problem of blurred
> > > > screen during fast sleep/resume. The direct cause of the blurred
> > > > screen is that the IC does not receive 0x28/0x10. Because of the
> > > > particularity of the IC, before the panel enters sleep hid must
> > > > stop scanning, i2c_hid_core_suspend before ili9882t_disable.
> > > > This doesn't look very spec-compliant.
> > >
> > > Presumably you could be more spec compliant if we used
> > > "panel_follower" in this case? Would that be a better solution?
> >
> > In the "panel_follower" solution, the phenomenon is the same.
> > The current order is
> > ili9882t_disable=>i2c_hid_core_suspend=>elan_i2c_hid_power_down=>ili9882t_unprepare,
> > ili9882t need touchpanel stop scanning,i2c_hid_core_suspend before
> > ili9882t_disable.
>
> Ugh, that's unfortunate. Though is there a reason why you couldn't
> just move the `ili9882t_enter_sleep_mode()` to `ili9882t_unprepare()`?
> That seems like it should be OK and even perhaps makes it more
> symmetric with thue enable?

Thank you for your suggestion. If the timing is met and there is no problem,
I will implement it in V3.

>
>
> > > > @@ -507,7 +526,7 @@ static int ili9882t_prepare(struct drm_panel *panel)
> > > > gpiod_set_value(ili->enable_gpio, 1);
> > > > usleep_range(1000, 2000);
> > > > gpiod_set_value(ili->enable_gpio, 0);
> > > > -   usleep_range(1000, 2000);
> > > > +   usleep_range(4, 5);
> > >
> > > nit: use 4, 41000 instead of 4, 5. Linux almost always
> > > uses the longer delay, so that'll save ~9 ms. The only reason for the
> > > range is to optimize kernel wakeups which is really not a concern
> > > here.
> >
> > We need 50ms delay to meet the requirement.
>
> I'll respond to your v2, but if you need 50 ms then your current delay is 
> wrong.
>
>
> -Doug

Re: [v2 1/3] drm/panel: ili9882t: Break out as separate driver

[cong yang]

Hi,

On Wed, Oct 11, 2023 at 3:11 AM Doug Anderson  wrote:
>
> Hi,
>
> On Tue, Oct 10, 2023 at 5:14 AM Cong Yang
>  wrote:
> >
> > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c 
> > b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > new file mode 100644
> > index ..e095ad91c4bc
> > --- /dev/null
> > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
> > @@ -0,0 +1,762 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Panels based on the Ilitek ILI9882T display controller.
> > + */
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
>
> nit: remove include of linux/of_device.h since you don't use any of
> the functions declared there.

It seems that of_device_get_match_data will be used.

>
>
> > +#include 
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +/*
> > + * Use this descriptor struct to describe different panels using the
> > + * Ilitek ILI9882T display controller.
> > + */
> > +struct panel_desc {
> > +   const struct drm_display_mode *modes;
> > +   unsigned int bpc;
> > +
> > +   /**
> > +* @width_mm: width of the panel's active display area
> > +* @height_mm: height of the panel's active display area
> > +*/
> > +   struct {
> > +   unsigned int width_mm;
> > +   unsigned int height_mm;
> > +   } size;
> > +
> > +   unsigned long mode_flags;
> > +   enum mipi_dsi_pixel_format format;
> > +   const struct panel_init_cmd *init_cmds;
> > +   unsigned int init_cmd_length;
>
> Remove "init_cmd_length" since it's now unused.

Done,thanks.
>
>
> > +static void ili9882t_remove(struct mipi_dsi_device *dsi)
> > +{
> > +   struct ili9882t *ili = mipi_dsi_get_drvdata(dsi);
> > +   int ret;
> > +
> > +
> > +   ret = mipi_dsi_detach(dsi);
>
> nit: remove extra blank line above.

Done,thanks.

>
>
> Other than nits, this looks good to me now.
>
> Reviewed-by: Douglas Anderson 

[v2 3/3] arm64: defconfig: Enable ILITEK_ILI9882T panel

[Cong Yang]

Enable ILITEK_ILI9882T panel.

Signed-off-by: Cong Yang 
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 0777bcae9104..c3453dcbad3e 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -813,6 +813,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m
 CONFIG_DRM_PANEL_LVDS=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_EDP=m
+CONFIG_DRM_PANEL_ILITEK_ILI9882T=m
 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
 CONFIG_DRM_PANEL_SITRONIX_ST7703=m
-- 
2.25.1

[v2 2/3] drm/panel: ili9882t: Avoid blurred screen from fast sleep

[Cong Yang]

At present, we have found that there may be a problem of blurred
screen during fast sleep/resume. The direct cause of the blurred
screen is that the IC does not receive 0x28/0x10. Because of the
particularity of the IC, before the panel enters sleep hid must
stop scanning, i2c_hid_core_suspend before ili9882t_disable.
This doesn't look very spec-compliant. So in order to solve this
problem, the IC can handle it through the exception mechanism when
it cannot receive 0X28/0X10 command. Handling exceptions requires a reset
50ms delay. Refer to vendor detailed analysis [1].

Ilitek vendor also suggested switching the page before entering sleep to
avoid panel IC not receiving 0x28/0x10 command.

Note: 0x28 is display off, 0x10 is sleep in.

[1]: https://github.com/ILITEK-LoganLin/Document/tree/main/ILITEK_Power_Sequence

Signed-off-by: Cong Yang 
---
 drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 22 ++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
index e095ad91c4bc..20ae370ebe2f 100644
--- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c
@@ -465,6 +465,24 @@ static int ili9882t_init_dcs_cmd(struct ili9882t *ili)
return 0;
 }
 
+static int ili9882t_switch_page(struct mipi_dsi_device *dsi, u8 page)
+{
+   int ret;
+   const struct panel_init_cmd cmd = _INIT_SWITCH_PAGE_CMD(page);
+
+   ret = mipi_dsi_dcs_write(dsi, cmd.data[0],
+cmd.len <= 1 ? NULL :
+[1],
+cmd.len - 1);
+   if (ret) {
+   dev_err(>dev,
+   "error switching panel controller page (%d)\n", ret);
+   return ret;
+   }
+
+   return 0;
+}
+
 static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 {
struct mipi_dsi_device *dsi = ili->dsi;
@@ -486,8 +504,10 @@ static int ili9882t_enter_sleep_mode(struct ili9882t *ili)
 static int ili9882t_disable(struct drm_panel *panel)
 {
struct ili9882t *ili = to_ili9882t(panel);
+   struct mipi_dsi_device *dsi = ili->dsi;
int ret;
 
+   ili9882t_switch_page(dsi, 0x00);
ret = ili9882t_enter_sleep_mode(ili);
if (ret < 0) {
dev_err(panel->dev, "failed to set panel off: %d\n", ret);
@@ -548,7 +568,7 @@ static int ili9882t_prepare(struct drm_panel *panel)
gpiod_set_value(ili->enable_gpio, 1);
usleep_range(1000, 2000);
gpiod_set_value(ili->enable_gpio, 0);
-   usleep_range(1000, 2000);
+   usleep_range(4, 5);
gpiod_set_value(ili->enable_gpio, 1);
usleep_range(6000, 1);
 
-- 
2.25.1