[PATCH v4 3/3] drm/panel: Add ilitek ili9341 panel driver

2021-07-23 Thread dillon . minfei
From: Dillon Min 

This driver combines tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode and parallel rgb interface mode by different dts bindings.

Signed-off-by: Dillon Min 
Reported-by: kernel test robot 
Reviewed-by: Linus Walleij 
Reviewed-by: Jagan Teki 
---
v4:
- fix m68k-allmodconfig build error which reported by lkp, thanks.
- add Copyright 2018 David Lechner .

 drivers/gpu/drm/panel/Kconfig|  12 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 792 +++
 3 files changed, 805 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ef87d92cdf49..eb34b8d1b19a 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -124,6 +124,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index cae4d976c069..0ecde184665d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += 
panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index ..2c3378a259b1
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,792 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2021 Dillon Min 
+ *
+ * For dbi+dpi part:
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ * the reuse of DBI abstraction part referred from Linus's patch
+ * "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
+ *
+ * For only-dbi part, copy from David's code (drm/tiny/ili9341.c)
+ * Copyright 2018 David Lechner 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define 

[PATCH v4 2/3] ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding

2021-07-23 Thread dillon . minfei
From: Dillon Min 

Since the compatible string defined from ilitek,ili9341.yaml is
"st,sf-tc240t-9370-t", "ilitek,ili9341"

so, append "ilitek,ili9341" to avoid the below dtbs_check warning.

arch/arm/boot/dts/stm32f429-disco.dt.yaml: display@1: compatible:
['st,sf-tc240t-9370-t'] is too short

Fixes: a726e2f000ec ("ARM: dts: stm32: enable ltdc binding with ili9341, gyro 
l3gd20 on stm32429-disco board")
Signed-off-by: Dillon Min 
Reported-by: kernel test robot 
---
v4: no change.

 arch/arm/boot/dts/stm32f429-disco.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 075ac57d0bf4..6435e099c632 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -192,7 +192,7 @@
 
display: display@1{
/* Connect panel-ilitek-9341 to ltdc */
-   compatible = "st,sf-tc240t-9370-t";
+   compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
reg = <1>;
spi-3wire;
spi-max-frequency = <1000>;
-- 
1.9.1



[PATCH v4 1/3] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2021-07-23 Thread dillon . minfei
From: Dillon Min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: Dillon Min 
Reviewed-by: Linus Walleij 
Reviewed-by: Rob Herring 
Link: 
https://lore.kernel.org/lkml/1626853288-31223-2-git-send-email-dillon.min...@gmail.com/
---
v4: no change.

 .../bindings/display/panel/ilitek,ili9341.yaml | 78 ++
 1 file changed, 78 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index ..2ed010f91e2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX) of this DBI panel
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+  vci-supply:
+description: Analog voltage supply (2.5 .. 3.3V)
+
+  vddi-supply:
+description: Voltage supply for interface logic (1.65 .. 3.3 V)
+
+  vddi-led-supply:
+description: Voltage supply for the LED driver (1.65 .. 3.3 V)
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
1.9.1



[PATCH v4 0/3] Add ilitek ili9341 panel driver

2021-07-23 Thread dillon . minfei
From: Dillon Min 

Since the st,sf-tc240t-9370-t dts binding already exist in stm32f429-disco.dts
but, the panel driver didn't get accepted from mainline. it's time to submit
patch fot it.

This driver can support two different interface by different dts bindings:
- spi+dpi, use spi to configure register, dpi for graphic data.
  st,sf-tc240t-9370-t
- only spi, just like tiny/ili9341.c (actually, this part is copy from tiny)
  adafruit,yx240qv29

I was submited the first patch last year, you can find it at [1].
this patch has one major difference from that one, which is replace the low
level communication way, from spi_sync() to mipi_dbi_{command,
command_stackbuf}() interface, referred from Linus's patch [2].

both the two dpi/dbi interface was tested on stm32f429-disco board, if anyone
want to verify this patch, you need apply the clk patch for this board first,
you can get it from [3].

[1] "drm/panel: Add ilitek ili9341 panel driver"
https://lore.kernel.org/lkml/1590378348-8115-7-git-send-email-dillon.min...@gmail.com/

[2] "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
https://lore.kernel.org/dri-devel/20210611214243.669892-1-linus.wall...@linaro.org/

[3]
https://lore.kernel.org/lkml/1590378348-8115-6-git-send-email-dillon.min...@gmail.com/

v4:
- fix m68k-allmodconfig build error which reported by lkp, thanks.
- add Copyright 2018 David Lechner .
v3 link:
https://lore.kernel.org/lkml/1627013203-23099-1-git-send-email-dillon.min...@gmail.com/

v3:
- add Fixes tags.
- collect reviewed-by tags from linus and jagan.
- replace DRM_ERROR() with dev_err() or drm_err().
- remove kernel-doc markers from struct ili9341_config{}.
- reorder include headers.
- remove the struct device *dev from struct ili9341{}.
- restructure the ili9341_probe() function, add two ili9341_{dbi,dpi)_probe()
  to make it more readable according to jagan's suggestion, thanks.

for the full drm driver exist in drm/panel need Sam and Laurent's feedback.
so, not cover this part at this time, will be update later.

v2 link:
https://lore.kernel.org/lkml/1626853288-31223-1-git-send-email-dillon.min...@gmail.com/

v2:
- replace vcc regulator to bulk regulators in driver, from linus suggestion.
- fix dtbs_check warnings on ili9341 dts binding check.
- add bulk regulation node in ilitek,ili9341.yaml.
v1 link:
https://lore.kernel.org/lkml/1626430843-23823-1-git-send-email-dillon.min...@gmail.com/

Dillon Min (3):
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding
  drm/panel: Add ilitek ili9341 panel driver

 .../bindings/display/panel/ilitek,ili9341.yaml |  78 ++
 arch/arm/boot/dts/stm32f429-disco.dts  |   2 +-
 drivers/gpu/drm/panel/Kconfig  |  12 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 792 +
 5 files changed, 884 insertions(+), 1 deletion(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
1.9.1



[PATCH v3 3/3] drm/panel: Add ilitek ili9341 panel driver

2021-07-22 Thread dillon . minfei
From: Dillon Min 

This driver combines tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, and can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.

Signed-off-by: Dillon Min 
Reviewed-by: Linus Walleij 
Reviewed-by: Jagan Teki 
---
v3:
all the v3 updates are based on Sam and Jagan's review.
- collect reviewed-by tags from linus and jagan.
- replace DRM_ERROR() with dev_err() or drm_err().
- remove kernel-doc markers from struct ili9341_config{}.
- reorder include headers.
- remove the struct device *dev from struct ili9341{}.
- restructure the ili9341_probe() function, add two ili9341_{dbi,dpi)_probe()
  to make it more readable according to jagan's suggestion, thanks.

For "So this is a full display driver. The more relevant home for this driver
is inside drm/tiny/."

I'm not sure if this is to ask me move the dpi code to drm/tiny/ili9341.c, and
remove this driver. or just remove the dbi code from this driver, but this will
result in two drivers to support the same panel (as Noralf does not agree with 
it).

so, waiting for the decision from Sam, Laurent, then will update in v4, thanks.

 drivers/gpu/drm/panel/Kconfig|  12 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 786 +++
 3 files changed, 799 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ef87d92cdf49..eb34b8d1b19a 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -124,6 +124,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index cae4d976c069..0ecde184665d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += 
panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index ..5ab6f18c3ce1
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,786 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2021 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ * the reuse of DBI abstraction part referred from Linus's patch
+ * "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing 

[PATCH v3 2/3] ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding

2021-07-22 Thread dillon . minfei
From: Dillon Min 

Since the compatible string defined from ilitek,ili9341.yaml is
"st,sf-tc240t-9370-t", "ilitek,ili9341"

so, append "ilitek,ili9341" to avoid the below dtbs_check warning.

arch/arm/boot/dts/stm32f429-disco.dt.yaml: display@1: compatible:
['st,sf-tc240t-9370-t'] is too short

Fixes: a726e2f000ec ("ARM: dts: stm32: enable ltdc binding with ili9341, gyro 
l3gd20 on stm32429-disco board")
Signed-off-by: Dillon Min 
Reported-by: kernel test robot 
---
v3:
- add Fixes tags.

 arch/arm/boot/dts/stm32f429-disco.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 075ac57d0bf4..6435e099c632 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -192,7 +192,7 @@
 
display: display@1{
/* Connect panel-ilitek-9341 to ltdc */
-   compatible = "st,sf-tc240t-9370-t";
+   compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
reg = <1>;
spi-3wire;
spi-max-frequency = <1000>;
-- 
2.7.4



[PATCH v3 1/3] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2021-07-22 Thread dillon . minfei
From: Dillon Min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: Dillon Min 
Reviewed-by: Linus Walleij 
Reviewed-by: Rob Herring 
Link: 
https://lore.kernel.org/lkml/1626853288-31223-2-git-send-email-dillon.min...@gmail.com/
---
v3:
- collect reviewed-by tags from linus.
- add link address.

 .../bindings/display/panel/ilitek,ili9341.yaml | 78 ++
 1 file changed, 78 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index ..2ed010f91e2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX) of this DBI panel
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+  vci-supply:
+description: Analog voltage supply (2.5 .. 3.3V)
+
+  vddi-supply:
+description: Voltage supply for interface logic (1.65 .. 3.3 V)
+
+  vddi-led-supply:
+description: Voltage supply for the LED driver (1.65 .. 3.3 V)
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4



[PATCH v3 0/3] Add ilitek ili9341 panel driver

2021-07-22 Thread dillon . minfei
From: Dillon Min 

Since the st,sf-tc240t-9370-t dts binding already exist in stm32f429-disco.dts
but, the panel driver didn't get accepted from mainline. it's time to submit
patch fot it.

This driver can support two different interface by different dts bindings:
- spi+dpi, use spi to configure register, dpi for graphic data.
  st,sf-tc240t-9370-t
- only spi, just like tiny/ili9341.c (actually, this part is copy from tiny)
  adafruit,yx240qv29

I submited the first patch last year, you can find it at [1].
this patch has one major difference from that one, which is replace the low
level communication way, from spi_sync() to mipi_dbi_{command,
command_stackbuf}() interface, referred from Linus's patch [2].

both the two dpi/dbi interface was tested on stm32f429-disco board, if anyone
want to verify this patch, you need apply the clk patch for this board first,
you can get it from [3]

[1] "drm/panel: Add ilitek ili9341 panel driver"
https://lore.kernel.org/lkml/1590378348-8115-7-git-send-email-dillon.min...@gmail.com/

[2] "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
https://lore.kernel.org/dri-devel/20210611214243.669892-1-linus.wall...@linaro.org/

[3]
https://lore.kernel.org/lkml/1590378348-8115-6-git-send-email-dillon.min...@gmail.com/

v3:
- add Fixes tags.
- collect reviewed-by tags from linus and jagan.
- replace DRM_ERROR() with dev_err() or drm_err().
- remove kernel-doc markers from struct ili9341_config{}.
- reorder include headers.
- remove the struct device *dev from struct ili9341{}.
- restructure the ili9341_probe() function, add two ili9341_{dbi,dpi)_probe()
  to make it more readable according to jagan's suggestion, thanks.

for the full drm driver exist in drm/panel need Sam and Laurent's feedback.
so, not cover this part at this time, will be update in v4.

v2 link:
https://lore.kernel.org/lkml/1626853288-31223-1-git-send-email-dillon.min...@gmail.com/

v2:
- replace vcc regulator to bulk regulators in driver, from linus suggestion.
- fix dtbs_check warnings on ili9341 dts binding check.
- add bulk regulation node in ilitek,ili9341.yaml.
v1 link:
https://lore.kernel.org/lkml/1626430843-23823-1-git-send-email-dillon.min...@gmail.com/

Dillon Min (3):
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding
  drm/panel: Add ilitek ili9341 panel driver

 .../bindings/display/panel/ilitek,ili9341.yaml |  78 ++
 arch/arm/boot/dts/stm32f429-disco.dts  |   2 +-
 drivers/gpu/drm/panel/Kconfig  |  12 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 786 +
 5 files changed, 878 insertions(+), 1 deletion(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4



[PATCH v2 3/3] drm/panel: Add ilitek ili9341 panel driver

2021-07-21 Thread dillon . minfei
From: Dillon Min 

This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.

Cc: Linus Walleij 
Signed-off-by: Dillon Min 
---
changes in v2:
- replace vcc regulator to three bulk regulators(vci, vddi, vddi-led)
  according to linus suggestion, thanks.

 drivers/gpu/drm/panel/Kconfig|  12 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 778 +++
 3 files changed, 791 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ef87d92cdf49..eb34b8d1b19a 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -124,6 +124,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index cae4d976c069..0ecde184665d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += 
panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index ..717b0b930e2f
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,778 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2021 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ * the reuse of DBI abstraction part referred from Linus's patch
+ * "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define ILI9341_DTCA_LEN   3
+#define ILI9341_DTCB_LEN   2
+#define ILI9341_POWER_A_LEN5
+#define ILI9341_DFC_1_LEN  2
+#define ILI9341_FRC_LEN2
+#define ILI9341_VCOM_1_LEN   

[PATCH v2 2/3] ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding

2021-07-21 Thread dillon . minfei
From: Dillon Min 

Since the compatible string defined from ilitek,ili9341.yaml is
"st,sf-tc240t-9370-t", "ilitek,ili9341"

so, append "ilitek,ili9341" to avoid below dtbs_check warning.

arch/arm/boot/dts/stm32f429-disco.dt.yaml: display@1: compatible:
['st,sf-tc240t-9370-t'] is too short

Signed-off-by: Dillon Min 
Reported-by: kernel test robot 
---
 arch/arm/boot/dts/stm32f429-disco.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 075ac57d0bf4..6435e099c632 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -192,7 +192,7 @@
 
display: display@1{
/* Connect panel-ilitek-9341 to ltdc */
-   compatible = "st,sf-tc240t-9370-t";
+   compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
reg = <1>;
spi-3wire;
spi-max-frequency = <1000>;
-- 
2.7.4



[PATCH v2 1/3] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2021-07-21 Thread dillon . minfei
From: Dillon Min 

Add documentation for "ilitek,ili9341" panel.

Cc: Linus Walleij 
Signed-off-by: Dillon Min 
Reviewed-by: Rob Herring 
---
changes in v2:
- add {vci, vddi, vddi-led}-supply bulk regulator according to linus
  suggestion, thanks.
- add DBI panel in D/CX description.

 .../bindings/display/panel/ilitek,ili9341.yaml | 78 ++
 1 file changed, 78 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index ..2ed010f91e2d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX) of this DBI panel
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+  vci-supply:
+description: Analog voltage supply (2.5 .. 3.3V)
+
+  vddi-supply:
+description: Voltage supply for interface logic (1.65 .. 3.3 V)
+
+  vddi-led-supply:
+description: Voltage supply for the LED driver (1.65 .. 3.3 V)
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4



[PATCH v2 0/3] Add ilitek ili9341 panel driver

2021-07-21 Thread dillon . minfei
From: Dillon Min 

Since the st,sf-tc240t-9370-t dts binding already exist in stm32f429-disco.dts
but, the panel driver didn't get accepted from mainline. it's time to submit
patch fot it.

This driver can support two different interface by different dts bindings:
- spi+dpi, use spi to configure register, dpi for graphic data.
  st,sf-tc240t-9370-t
- only spi, just like tiny/ili9341.c (actually, this part is copy from tiny)
  adafruit,yx240qv29

I submited the first patch last year, you can find it at [1].
this patch has one major difference from that one, which is replace the low
level communication way, from spi_sync() to mipi_dbi_{command,
command_stackbuf}() interface, referred from Linus's patch [2].

both the two dpi/dbi interface was tested on stm32f429-disco board, if anyone
want to verify this patch, you need apply the clk patch for this board first,
you can get it from [3]

[1] "drm/panel: Add ilitek ili9341 panel driver"
https://lore.kernel.org/lkml/1590378348-8115-7-git-send-email-dillon.min...@gmail.com/

[2] "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
https://lore.kernel.org/dri-devel/20210611214243.669892-1-linus.wall...@linaro.org/

[3]
https://lore.kernel.org/lkml/1590378348-8115-6-git-send-email-dillon.min...@gmail.com/

v2:
- replace vcc regulator to bulk regulators in driver, from linus suggestion.
- fix dtbs_check warnings on ili9341 dts binding check.
- add bulk regulation node in ilitek,ili9341.yaml.
v1 link:
https://lore.kernel.org/lkml/1626430843-23823-1-git-send-email-dillon.min...@gmail.com/

Dillon Min (3):
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding
  drm/panel: Add ilitek ili9341 panel driver

 .../bindings/display/panel/ilitek,ili9341.yaml |  78 +++
 arch/arm/boot/dts/stm32f429-disco.dts  |   2 +-
 drivers/gpu/drm/panel/Kconfig  |  12 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 778 +
 5 files changed, 870 insertions(+), 1 deletion(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4



[PATCH 2/2] drm/panel: Add ilitek ili9341 panel driver

2021-07-16 Thread dillon . minfei
From: Dillon Min 

This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.

Signed-off-by: Dillon Min 
---
 drivers/gpu/drm/panel/Kconfig|  12 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 778 +++
 3 files changed, 791 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ef87d92cdf49..eb34b8d1b19a 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -124,6 +124,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index cae4d976c069..0ecde184665d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += 
panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index ..4fc312a43d3a
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,778 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2021 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ * the reuse of DBI abstraction part referred from Linus's patch
+ * "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define ILI9341_DTCA_LEN   3
+#define ILI9341_DTCB_LEN   2
+#define ILI9341_POWER_A_LEN5
+#define ILI9341_DFC_1_LEN  2
+#define ILI9341_FRC_LEN2
+#define ILI9341_VCOM_1_LEN 2
+#define ILI9341_DFC_2_LEN  4
+#define ILI9341_COLUMN_ADDR_LEN4
+#define ILI9341_PAGE_ADDR_LEN  4
+#define ILI9341_INTERFACE_LEN  

[PATCH 1/2] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2021-07-16 Thread dillon . minfei
From: Dillon Min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: Dillon Min 
---
 .../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
 1 file changed, 69 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index ..2172f889af3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX)
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4



[PATCH 0/2] Add ilitek ili9341 panel driver

2021-07-16 Thread dillon . minfei
From: Dillon Min 

Since the st,sf-tc240t-9370-t dts binding already exist in stm32f429-disco.dts
but, the panel driver didn't get accepted from mainline. it's time to submit
patch fot it.

This driver can support two different interface by different dts bindings:
- spi+dpi, use spi to configure register, dpi for graphic data.
  st,sf-tc240t-9370-t
- only spi, just like tiny/ili9341.c (actually, this part is copy from tiny)
  adafruit,yx240qv29

I submited the first patch last year, you can find it at [1].
this patch has one major difference from that one, which is replace the low
level communication way, from spi_sync() to mipi_dbi_{command,
command_stackbuf}() interface, referred from Linus's patch [2].

both the two dpi/dbi interface was tested on stm32f429-disco board, if anyone
want to verify this patch, you need apply the clk patch for this board first,
you can get it from [3]

[1] "drm/panel: Add ilitek ili9341 panel driver"
https://lore.kernel.org/lkml/1590378348-8115-7-git-send-email-dillon.min...@gmail.com/

[2] "drm/panel: s6e63m0: Switch to DBI abstraction for SPI"
https://lore.kernel.org/dri-devel/20210611214243.669892-1-linus.wall...@linaro.org/

[3]
https://lore.kernel.org/lkml/1590378348-8115-6-git-send-email-dillon.min...@gmail.com/


Dillon Min (2):
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  drm/panel: Add ilitek ili9341 panel driver

 .../bindings/display/panel/ilitek,ili9341.yaml |  69 ++
 drivers/gpu/drm/panel/Kconfig  |  12 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 778 +
 4 files changed, 860 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4



[PATCH 4/4] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after kernel startup

2021-05-14 Thread dillon . minfei
From: Dillon Min 

stm32's clk driver register two ltdc gate clk to clk core by
clk_hw_register_gate() and clk_hw_register_composite()

first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use.
second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver

both of them point to the same offset of stm32's RCC register. after
kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]'
is no one to use. but, actually 'stm32f429_aux_clk[]' is in use.

Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock")
Signed-off-by: Dillon Min 
Acked-by: Stephen Boyd 
Link: 
https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.min...@gmail.com/
---
 drivers/clk/clk-stm32f4.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 42ca2dd86aea..f4156a8a6041 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
 };
 
 static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
@@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
 };
 
 static const struct stm32f4_gate_data stm32f746_gates[] __initconst = {
@@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 23,  "sai2", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
 };
 
 static const struct stm32f4_gate_data stm32f769_gates[] __initconst = {
@@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 23,  "sai2", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 30,  "mdio", "apb2_div" },
 };
 
-- 
2.7.4



[PATCH 3/4] clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate

2021-05-14 Thread dillon . minfei
From: Dillon Min 

This is due to misuse ‘PLL_VCO_SAI' and'PLL_SAI' in clk-stm32f4.c
'PLL_SAI' is 2, 'PLL_VCO_SAI' is 7(defined in
include/dt-bindings/clock/stm32fx-clock.h).

'post_div' point to 'post_div_data[]', 'post_div->pll_num'
is PLL_I2S or PLL_SAI.

'clks[PLL_VCO_SAI]' has valid 'struct clk_hw* ' return
from stm32f4_rcc_register_pll() but, at line 1777 of
driver/clk/clk-stm32f4.c, use the 'clks[post_div->pll_num]',
equal to 'clks[PLL_SAI]', this is invalid array member at that time.

Fixes: 517633ef630e ("clk: stm32f4: Add post divisor for I2S & SAI PLLs")
Signed-off-by: Dillon Min 
Acked-by: Stephen Boyd 
Link: 
https://lore.kernel.org/linux-arm-kernel/1590564453-24499-6-git-send-email-dillon.min...@gmail.com/
---
 drivers/clk/clk-stm32f4.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce5ff85..42ca2dd86aea 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -557,13 +557,13 @@ static const struct clk_div_table post_divr_table[] = {
 
 #define MAX_POST_DIV 3
 static const struct stm32f4_pll_post_div_data  post_div_data[MAX_POST_DIV] = {
-   { CLK_I2SQ_PDIV, PLL_I2S, "plli2s-q-div", "plli2s-q",
+   { CLK_I2SQ_PDIV, PLL_VCO_I2S, "plli2s-q-div", "plli2s-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL},
 
-   { CLK_SAIQ_PDIV, PLL_SAI, "pllsai-q-div", "pllsai-q",
+   { CLK_SAIQ_PDIV, PLL_VCO_SAI, "pllsai-q-div", "pllsai-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL },
 
-   { NO_IDX, PLL_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
+   { NO_IDX, PLL_VCO_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table },
 };
 
-- 
2.7.4



[PATCH 2/4] i2c: stm32f4: Fix stmpe811 get xyz data timeout issue

2021-05-14 Thread dillon . minfei
From: Dillon Min 

As stm32f429's internal flash is 2Mbytes and compiled kernel
image bigger than 2Mbytes, so we have to load kernel image
to sdram on stm32f429-disco board which has 8Mbytes sdram space.

based on above context, as you knows kernel running on external
sdram is more slower than internal flash. besides, we need read 4
bytes to get touch screen xyz(x, y, pressure) coordinate data in
stmpe811 interrupt.

so, in stm32f4_i2c_handle_rx_done, as i2c read slower than running
in xip mode, have to adjust 'STOP/START bit set position' from last
two bytes to last one bytes. else, will get i2c timeout in reading
touch screen coordinate.

to not bring in side effect, introduce IIC_LAST_BYTE_POS to support xip
kernel or zImage.

Fixes: 62817fc8d282 ("i2c: stm32f4: add driver")
Link: 
https://lore.kernel.org/lkml/1591709203-12106-5-git-send-email-dillon.min...@gmail.com/
Signed-off-by: Dillon Min 
---
 drivers/i2c/busses/i2c-stm32f4.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c
index 4933fc8ce3fd..2e41231b9037 100644
--- a/drivers/i2c/busses/i2c-stm32f4.c
+++ b/drivers/i2c/busses/i2c-stm32f4.c
@@ -93,6 +93,12 @@
 #define STM32F4_I2C_MAX_FREQ   46U
 #define HZ_TO_MHZ  100
 
+#if !defined(CONFIG_MMU) && !defined(CONFIG_XIP_KERNEL)
+#define IIC_LAST_BYTE_POS 1
+#else
+#define IIC_LAST_BYTE_POS 2
+#endif
+
 /**
  * struct stm32f4_i2c_msg - client specific data
  * @addr: 8-bit slave addr, including r/w bit
@@ -439,7 +445,7 @@ static void stm32f4_i2c_handle_rx_done(struct 
stm32f4_i2c_dev *i2c_dev)
int i;
 
switch (msg->count) {
-   case 2:
+   case IIC_LAST_BYTE_POS:
/*
 * In order to correctly send the Stop or Repeated Start
 * condition on the I2C bus, the STOP/START bit has to be set
@@ -454,7 +460,7 @@ static void stm32f4_i2c_handle_rx_done(struct 
stm32f4_i2c_dev *i2c_dev)
else
stm32f4_i2c_set_bits(reg, STM32F4_I2C_CR1_START);
 
-   for (i = 2; i > 0; i--)
+   for (i = IIC_LAST_BYTE_POS; i > 0; i--)
stm32f4_i2c_read_msg(i2c_dev);
 
reg = i2c_dev->base + STM32F4_I2C_CR2;
@@ -463,7 +469,7 @@ static void stm32f4_i2c_handle_rx_done(struct 
stm32f4_i2c_dev *i2c_dev)
 
complete(_dev->complete);
break;
-   case 3:
+   case (IIC_LAST_BYTE_POS+1):
/*
 * In order to correctly generate the NACK pulse after the last
 * received data byte, we have to enable NACK before reading N-2
-- 
2.7.4



[PATCH 1/4] drm/panel: Add ilitek ili9341 panel driver

2021-05-14 Thread dillon . minfei
From: Dillon Min 

This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.

Reviewed-by: Linus Walleij 
Link: 
https://lore.kernel.org/lkml/1590378348-8115-7-git-send-email-dillon.min...@gmail.com/
Signed-off-by: Dillon Min 
---
 drivers/gpu/drm/panel/Kconfig|   12 +
 drivers/gpu/drm/panel/Makefile   |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 1285 ++
 3 files changed, 1298 insertions(+)
 create mode 100755 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 4894913936e9..e4babba17864 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -123,6 +123,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index cae4d976c069..0ecde184665d 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += 
panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index ..f84983cbb250
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,1285 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define ILI9341_DTCA_LEN   3
+#define ILI9341_DTCB_LEN   2
+#define ILI9341_POWER_A_LEN5
+#define ILI9341_DFC_1_LEN  2
+#define ILI9341_FRC_LEN2
+#define ILI9341_VCOM_1_LEN 2
+#define ILI9341_DFC_2_LEN  4
+#define ILI9341_COLUMN_ADDR_LEN4
+#define ILI9341_PAGE_ADDR_LEN  4
+#define 

[PATCH 0/4] Fix the i2c/clk bug of stm32 mcu platform

2021-05-14 Thread dillon . minfei
From: Dillon Min 

This seriese fix three i2c/clk bug for stm32 f4/f7
- kernel runing in sdram, i2c driver get data timeout
- ltdc clk turn off after kernel console active
- kernel hang in set ltdc clock rate

clk bug found on stm32f429/f469-disco board

Hi Patrice:
below is the guide to verify the patch:

setup test env with following files(link at below 'files link'):
[1] u-boot-dtb.bin
[2] rootfs zip file (used in kernel initramfs)
[3] u-boot's mkimage to create itb file
[4] kernel config file
[5] my itb with-or-without i2c patch

This patch based on kernel commit:
88b06399c9c766c283e070b022b5ceafa4f63f19

Note:
panel-ilitek-ili9341.c is the driver which was submitted last year, but not
get accepted. it's used to setup touch screen calibration, then test i2c.

create itb file(please correct path of 'data'):
./mkimage -f stm32.its stm32.itb

HW setup:
console:
   PA9, PA10
   usart0
   serial@40011000
   115200 8n1

-- flash u-boot.bin to stm32f429-disco on PC
$ sudo openocd -f board/stm32f429discovery.cfg -c \
  '{PATH-TO-YOUR-UBOOT}/u-boot-dtb.bin 0x0800 exit reset'

-- setup kernel load bootargs at u-boot
U-Boot > setenv bootargs 'console=tty0 console=ttySTM0,115200
root=/dev/ram rdinit=/linuxrc loglevel=8 fbcon=rotate:2'
U-Boot > loady;bootm
(download stm32.dtb or your kernel with itb format, or download zImage, dtb)

-- setup ts_calibrate running env on stm32f429-disco
/ # export TSLIB_CONFFILE=/etc/ts.conf
/ # export TSLIB_TSDEVICE=/dev/input/event0
/ # export TSLIB_CONSOLEDEVICE=none
/ # export TSLIB_FBDEVICE=/dev/fb0

-- clear screen
/ # ./fb

-- run ts_calibrate 
/ # ts_calibrate
(you can calibrate touchscreen now, and get below errors)

[  113.942087] stmpe-i2c0-0041: failed to read regs 0x52: -110
[  114.063598] stmpe-i2c 0-0041: failed to read reg 0x4b: -16
[  114.185629] stmpe-i2c 0-0041: failed to read reg 0x40: -16
[  114.307257] stmpe-i2c 0-0041: failed to write reg 0xb: -16

...
with i2c patch applied, you will find below logs:

RAW-> 3164 908 183 118.110884
TS_READ_RAW> x = 3164, y =908, pressure = 183
RAW-> 3166 922 126 118.138946
TS_READ_RAW> x = 3166, y = 922, pressure = 126


files link:
https://drive.google.com/drive/folders/1qNbjChcB6UGtKzne2F5x9_WG_sZFyo3o?usp=sharing




Dillon Min (4):
  drm/panel: Add ilitek ili9341 panel driver
  i2c: stm32f4: Fix stmpe811 get xyz data timeout issue
  clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate
  clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after
kernel startup

 drivers/clk/clk-stm32f4.c|   10 +-
 drivers/gpu/drm/panel/Kconfig|   12 +
 drivers/gpu/drm/panel/Makefile   |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 1285 ++
 drivers/i2c/busses/i2c-stm32f4.c |   12 +-
 5 files changed, 1310 insertions(+), 10 deletions(-)
 create mode 100755 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4



[PATCH v6 4/9] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2020-05-28 Thread dillon . minfei
From: dillon min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: dillon min 
---
 .../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
 1 file changed, 69 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index ..2172f889af3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX)
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4

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[PATCH v6 2/9] ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board

2020-05-28 Thread dillon . minfei
From: dillon min 

This patch adds the pin configuration for ltdc and spi5 controller
on stm32f429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa143ce07..0eb107f968cd 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,73 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+,
+/* LCD_B2 */
+,
+/* LCD_B3*/
+,
+/* LCD_G5 */
+,
+/* LCD_G6 */
+,
+/* LCD_G7 */
+,
+/* LCD_B4 */
+,
+/* LCD_B5 */
+,
+/* LCD_B6 */
+,
+/* LCD_B7 */
+;
+/* LCD_DE */
+   slew-rate = <2>;
+   };
+   };
+
+   spi5_pins: spi5-0 {
+   pins1 {
+   pinmux = ,
+   /* SPI5_CLK */
+;
+   /* SPI5_MOSI */
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <0>;
+   };
+   pins2 {
+   pinmux = ;
+   /* SPI5_MISO */
+   bias-disable;
+   };
+   };
+
dcmi_pins: dcmi-0 {
pins {
pinmux = , 
/* DCMI_HSYNC */
-- 
2.7.4

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[PATCH v6 8/9] spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4

2020-05-28 Thread dillon . minfei
From: dillon min 

in l3gd20 driver startup, there is a setup failed error return from
stm32 spi driver

  "
  [2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
  regulator
  [2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
  regulator
  [2.706707] spi_stm32 40015000.spi: SPI transfer setup failed
  [2.713741] st-gyro-spi spi0.0: SPI transfer failed: -22
  [2.721096] spi_master spi0: failed to transfer one message from queue
  [2.729268] iio iio:device0: failed to read Who-Am-I register.
  [2.737504] st-gyro-spi: probe of spi0.0 failed with error -22
  "

after debug into spi-stm32 driver, st-gyro-spi split two steps to read
l3gd20 id

first: send command to l3gd20 with read id command in tx_buf, rx_buf
is null.
second: read id with tx_buf is null, rx_buf not null.

so, for second step, stm32 driver recongise this process is 'SPI_SIMPLE_RX'
from stm32_spi_communication_type(), but there is no related process for this
type in stm32f4_spi_set_mode(), then we get error from
stm32_spi_transfer_one_setup().

we can use two method to fix this bug.
1, use stm32 spi's "In unidirectional receive-only mode (BIDIMODE=0 and
RXONLY=1)". but as our code running in sdram, the read latency is too large
to get so many receive overrun error in interrupts handler.

2, use stm32 spi's "In full-duplex (BIDIMODE=0 and RXONLY=0)", as tx_buf is
null, so add flag 'SPI_MASTER_MUST_TX' to spi master.

Signed-off-by: dillon min 
---

Change since V4:
1 remove dummy data sent out by stm32 spi driver
2 add flag 'SPI_MASTER_MUST_TX' to spi master

 drivers/spi/spi-stm32.c | 19 +++
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 44ac6eb3298d..4c643dfc7fbb 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -811,7 +811,9 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
mask |= STM32F4_SPI_SR_TXE;
}
 
-   if (!spi->cur_usedma && spi->cur_comm == SPI_FULL_DUPLEX) {
+   if (!spi->cur_usedma && (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX)) {
/* TXE flag is set and is handled when RXNE flag occurs */
sr &= ~STM32F4_SPI_SR_TXE;
mask |= STM32F4_SPI_SR_RXNE | STM32F4_SPI_SR_OVR;
@@ -850,7 +852,7 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
stm32f4_spi_read_rx(spi);
if (spi->rx_len == 0)
end = true;
-   else /* Load data for discontinuous mode */
+   else if (spi->tx_buf)/* Load data for discontinuous mode */
stm32f4_spi_write_tx(spi);
}
 
@@ -1151,7 +1153,9 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi 
*spi)
/* Enable the interrupts relative to the current communication mode */
if (spi->cur_comm == SPI_SIMPLEX_TX || spi->cur_comm == SPI_3WIRE_TX) {
cr2 |= STM32F4_SPI_CR2_TXEIE;
-   } else if (spi->cur_comm == SPI_FULL_DUPLEX) {
+   } else if (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX) {
/* In transmit-only mode, the OVR flag is set in the SR register
 * since the received data are never read. Therefore set OVR
 * interrupt only when rx buffer is available.
@@ -1462,10 +1466,16 @@ static int stm32f4_spi_set_mode(struct stm32_spi *spi, 
unsigned int comm_type)
stm32_spi_set_bits(spi, STM32F4_SPI_CR1,
STM32F4_SPI_CR1_BIDIMODE |
STM32F4_SPI_CR1_BIDIOE);
-   } else if (comm_type == SPI_FULL_DUPLEX) {
+   } else if (comm_type == SPI_FULL_DUPLEX ||
+   comm_type == SPI_SIMPLEX_RX) {
stm32_spi_clr_bits(spi, STM32F4_SPI_CR1,
STM32F4_SPI_CR1_BIDIMODE |
STM32F4_SPI_CR1_BIDIOE);
+   } else if (comm_type == SPI_3WIRE_RX) {
+   stm32_spi_set_bits(spi, STM32F4_SPI_CR1,
+   STM32F4_SPI_CR1_BIDIMODE);
+   stm32_spi_clr_bits(spi, STM32F4_SPI_CR1,
+   STM32F4_SPI_CR1_BIDIOE);
} else {
return -EINVAL;
}
@@ -1906,6 +1916,7 @@ static int stm32_spi_probe(struct platform_device *pdev)
master->prepare_message = stm32_spi_prepare_msg;
master->transfer_one = stm32_spi_transfer_one;
master->unprepare_message = stm32_spi_unprepare_msg;
+   master->flags = SPI_MASTER_MUST_TX;
 
spi->dma_tx = dma_request_chan(spi->dev, "tx");
if 

[PATCH v6 3/9] ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco board

2020-05-28 Thread dillon . minfei
From: dillon min 

Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429-disco.dts | 48 +++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 30c0f6717871..365d16fd3934 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -49,6 +49,8 @@
 #include "stm32f429.dtsi"
 #include "stm32f429-pinctrl.dtsi"
 #include 
+#include 
+#include 
 
 / {
model = "STMicroelectronics STM32F429i-DISCO board";
@@ -127,3 +129,49 @@
pinctrl-names = "default";
status = "okay";
 };
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins_f429_disco>;
+   pinctrl-names = "default";
+
+   port {
+   ltdc_out_rgb: endpoint {
+   remote-endpoint = <_in_rgb>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cs-gpios = < 1 GPIO_ACTIVE_LOW>, < 2 GPIO_ACTIVE_LOW>;
+
+   l3gd20: l3gd20@0 {
+   compatible = "st,l3gd20-gyro";
+   spi-max-frequency = <1000>;
+   st,drdy-int-pin = <2>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>,
+   <2 IRQ_TYPE_EDGE_RISING>;
+   reg = <0>;
+   status = "okay";
+   };
+
+   display: display@1{
+   /* Connect panel-ilitek-9341 to ltdc */
+   compatible = "st,sf-tc240t-9370-t";
+   reg = <1>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in_rgb: endpoint {
+   remote-endpoint = <_out_rgb>;
+   };
+   };
+   };
+};
-- 
2.7.4

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[PATCH v6 9/9] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode

2020-05-28 Thread dillon . minfei
From: dillon min 

since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.

so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode

Signed-off-by: dillon min 
---
 drivers/spi/spi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index c92c89467e7e..f8844116f955 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1023,7 +1023,8 @@ static int spi_map_msg(struct spi_controller *ctlr, 
struct spi_message *msg)
void *tmp;
unsigned int max_tx, max_rx;
 
-   if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
+   if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
+   && !(msg->spi->mode & SPI_3WIRE)) {
max_tx = 0;
max_rx = 0;
 
-- 
2.7.4

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[PATCH v6 0/9] Enable ili9341 and l3gd20 on stm32f429-disco

2020-05-28 Thread dillon . minfei
From: dillon min 

V6:
1 separate '[PATCH v5 5/8]' patchs to two, each one has a Fixes tags according
  to Stephen Boyd's suggestion
2 fix panel-ilitek-ili9341 compile warning 'warning: Function parameter or
  member xxx not described in xxx' with W=1

V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SPI_SIMPLEX_RX mode on stm32 spi controller.

V5:
1 instead of add send dummy data out under SIMPLEX_RX mode,
  add flags 'SPI_CONTROLLER_MUST_TX' for stm32 spi driver
2 bypass 'SPI_CONTROLLER_MUST_TX' and 'SPI_CONTROLLER_MUST_RX' under
  'SPI_3WIRE' mode

V4:
  According to alexandre torgue's suggestion, combine ili9341 and
  l3gd20's modification on stm32f429-disco board to one patchset.

Changes:

ili9341:

1 update ili9341 panel driver according to Linus's suggestion
2 drop V1's No.5 patch, sumbit new changes for clk-stm32f4
3 merge l3gd20's change to this patchset

V3:
1 merge original tiny/ili9341.c driver to panel/panel-ilitek-ili9341.c
  to support serial spi & parallel rgb interface in one driver.
2 update ilitek,ili9341.yaml dts binding documentation.
3 update stm32f429-disco dts binding

V2:
1 verify ilitek,ili9341.yaml with make O=../linux-stm32
  dt_binding_check
  DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/panel/
  ilitek,ili9341.yaml

V1:
1 add ili9341 drm panel driver
2 add ltdc, spi5 controller for stm32f429-disco
3 add ltdc, spi5 pin map for stm32f429-disco
4 add docs about ili9341
5 fix ltdc driver loading hang in clk set rate bug


L3gd20:

V3:
1 merge stm32f429-disco dtbs binding with ili9341 part

V2:
1 insert blank line at stm32f420-disco.dts line 143
2 add more description for l3gd20 in commit message

V1:
1 enable spi5 controller on stm32f429-disco (dts)
2 add spi5 pinmap for stm32f429-disco  (dts)
3 add SPI_SIMPLEX_RX, SPI_3WIRE_RX support for stm32f4


dillon min (9):
  ARM: dts: stm32: Add dma config for spi5
  ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board
  ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on
stm32429-disco board
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate
  clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after
kernel startup
  drm/panel: Add ilitek ili9341 panel driver
  spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4
  spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't
be coexit with 'SPI_3WIRE' mode

 .../bindings/display/panel/ilitek,ili9341.yaml |   69 ++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi |   67 +
 arch/arm/boot/dts/stm32f429-disco.dts  |   48 +
 arch/arm/boot/dts/stm32f429.dtsi   |3 +
 drivers/clk/clk-stm32f4.c  |7 +-
 drivers/gpu/drm/panel/Kconfig  |   12 +
 drivers/gpu/drm/panel/Makefile |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 1288 
 drivers/spi/spi-stm32.c|   19 +-
 drivers/spi/spi.c  |3 +-
 10 files changed, 1508 insertions(+), 9 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4

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[PATCH v6 5/9] clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate

2020-05-28 Thread dillon . minfei
From: dillon min 

This is due to misuse ‘PLL_VCO_SAI' and'PLL_SAI' in clk-stm32f4.c
'PLL_SAI' is 2, 'PLL_VCO_SAI' is 7(defined in
include/dt-bindings/clock/stm32fx-clock.h).

'post_div' point to 'post_div_data[]', 'post_div->pll_num'
is PLL_I2S or PLL_SAI.

'clks[PLL_VCO_SAI]' has valid 'struct clk_hw* ' return
from stm32f4_rcc_register_pll() but, at line 1777 of
driver/clk/clk-stm32f4.c, use the 'clks[post_div->pll_num]',
equal to 'clks[PLL_SAI]', this is invalid array member at that time.

Fixes: 517633ef630e ("clk: stm32f4: Add post divisor for I2S & SAI PLLs")
Signed-off-by: dillon min 
---

Hi Stephen Boyd,

This update include below changes since V5
1 separate '[PATCH v5 5/8]' patch to two submits
2 each one has a Fixes tags

best regards.

 drivers/clk/clk-stm32f4.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce5ff85..42ca2dd86aea 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -557,13 +557,13 @@ static const struct clk_div_table post_divr_table[] = {
 
 #define MAX_POST_DIV 3
 static const struct stm32f4_pll_post_div_data  post_div_data[MAX_POST_DIV] = {
-   { CLK_I2SQ_PDIV, PLL_I2S, "plli2s-q-div", "plli2s-q",
+   { CLK_I2SQ_PDIV, PLL_VCO_I2S, "plli2s-q-div", "plli2s-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL},
 
-   { CLK_SAIQ_PDIV, PLL_SAI, "pllsai-q-div", "pllsai-q",
+   { CLK_SAIQ_PDIV, PLL_VCO_SAI, "pllsai-q-div", "pllsai-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL },
 
-   { NO_IDX, PLL_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
+   { NO_IDX, PLL_VCO_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table },
 };
 
-- 
2.7.4

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[PATCH v6 6/9] clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after kernel startup

2020-05-28 Thread dillon . minfei
From: dillon min 

stm32's clk driver register two ltdc gate clk to clk core by
clk_hw_register_gate() and clk_hw_register_composite()

first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use.
second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver

both of them point to the same offset of stm32's RCC register. after
kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]'
is no one to use. but, actually 'stm32f429_aux_clk[]' is in use.

Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock")
Signed-off-by: dillon min 
---

Changes since V5:
separate '[PATCH v5 5/8]' to two, add Fixes tags.

 drivers/clk/clk-stm32f4.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 42ca2dd86aea..fa62e990c539 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
 };
 
 static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
-- 
2.7.4

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[PATCH v6 1/9] ARM: dts: stm32: Add dma config for spi5

2020-05-28 Thread dillon . minfei
From: dillon min 

Enable spi5's dma configuration. for graphics data output to
ilitek ili9341 panel via mipi dbi interface

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d7770699feb5..5820b11e7365 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -660,6 +660,9 @@
reg = <0x40015000 0x400>;
interrupts = <85>;
clocks = < 0 STM32F4_APB2_CLOCK(SPI5)>;
+   dmas = < 3 2 0x400 0x0>,
+   < 4 2 0x400 0x0>;
+   dma-names = "rx", "tx";
status = "disabled";
};
 
-- 
2.7.4

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[PATCH v6 7/9] drm/panel: Add ilitek ili9341 panel driver

2020-05-28 Thread dillon . minfei
From: dillon min 

This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with
serial mode or parallel rgb interface mode by register
configuration.

Signed-off-by: dillon min 
---

Hi Linus, Noralf, Andy,

Changes since V5:
fix panel-ilitek-ili9341 compile warning 'warning: Function parameter or
member xxx not described in xxx' with W=1

Changes since V3:

accoding to Linus Walleij's suggestion.
1 add more comments to driver.
2 reduce magic number usage in the driver.
3 move panel configuration from common place to system configuration.
4 reuse MIPI_DCS_* as more as possible.

best regards.

 drivers/gpu/drm/panel/Kconfig|   12 +
 drivers/gpu/drm/panel/Makefile   |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 1288 ++
 3 files changed, 1301 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1b5fbf..c938beeb09b0 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883cd6630..16947d7de03e 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index ..f61ba3851177
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,1288 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define ILI9341_DTCA_LEN   3
+#define ILI9341_DTCB_LEN   2

[PATCH v5 4/8] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2020-05-25 Thread dillon . minfei
From: dillon min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: dillon min 
---
 .../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
 1 file changed, 69 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index 000..2172f88
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX)
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4

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[PATCH v5 3/8] ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco board

2020-05-25 Thread dillon . minfei
From: dillon min 

Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429-disco.dts | 48 +++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 30c0f67..365d16f 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -49,6 +49,8 @@
 #include "stm32f429.dtsi"
 #include "stm32f429-pinctrl.dtsi"
 #include 
+#include 
+#include 
 
 / {
model = "STMicroelectronics STM32F429i-DISCO board";
@@ -127,3 +129,49 @@
pinctrl-names = "default";
status = "okay";
 };
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins_f429_disco>;
+   pinctrl-names = "default";
+
+   port {
+   ltdc_out_rgb: endpoint {
+   remote-endpoint = <_in_rgb>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cs-gpios = < 1 GPIO_ACTIVE_LOW>, < 2 GPIO_ACTIVE_LOW>;
+
+   l3gd20: l3gd20@0 {
+   compatible = "st,l3gd20-gyro";
+   spi-max-frequency = <1000>;
+   st,drdy-int-pin = <2>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>,
+   <2 IRQ_TYPE_EDGE_RISING>;
+   reg = <0>;
+   status = "okay";
+   };
+
+   display: display@1{
+   /* Connect panel-ilitek-9341 to ltdc */
+   compatible = "st,sf-tc240t-9370-t";
+   reg = <1>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in_rgb: endpoint {
+   remote-endpoint = <_out_rgb>;
+   };
+   };
+   };
+};
-- 
2.7.4

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[PATCH v5 1/8] ARM: dts: stm32: Add dma config for spi5

2020-05-25 Thread dillon . minfei
From: dillon min 

Enable spi5's dma configuration. for graphics data output to
ilitek ili9341 panel via mipi dbi interface

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d777069..5820b11 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -660,6 +660,9 @@
reg = <0x40015000 0x400>;
interrupts = <85>;
clocks = < 0 STM32F4_APB2_CLOCK(SPI5)>;
+   dmas = < 3 2 0x400 0x0>,
+   < 4 2 0x400 0x0>;
+   dma-names = "rx", "tx";
status = "disabled";
};
 
-- 
2.7.4

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[PATCH v5 3/8] ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco board

2020-05-25 Thread dillon . minfei
From: dillon min 

Enable the ltdc & ili9341, gyro l3gd20 on stm32429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429-disco.dts | 48 +++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 30c0f67..365d16f 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -49,6 +49,8 @@
 #include "stm32f429.dtsi"
 #include "stm32f429-pinctrl.dtsi"
 #include 
+#include 
+#include 
 
 / {
model = "STMicroelectronics STM32F429i-DISCO board";
@@ -127,3 +129,49 @@
pinctrl-names = "default";
status = "okay";
 };
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins_f429_disco>;
+   pinctrl-names = "default";
+
+   port {
+   ltdc_out_rgb: endpoint {
+   remote-endpoint = <_in_rgb>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cs-gpios = < 1 GPIO_ACTIVE_LOW>, < 2 GPIO_ACTIVE_LOW>;
+
+   l3gd20: l3gd20@0 {
+   compatible = "st,l3gd20-gyro";
+   spi-max-frequency = <1000>;
+   st,drdy-int-pin = <2>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>,
+   <2 IRQ_TYPE_EDGE_RISING>;
+   reg = <0>;
+   status = "okay";
+   };
+
+   display: display@1{
+   /* Connect panel-ilitek-9341 to ltdc */
+   compatible = "st,sf-tc240t-9370-t";
+   reg = <1>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in_rgb: endpoint {
+   remote-endpoint = <_out_rgb>;
+   };
+   };
+   };
+};
-- 
2.7.4

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[PATCH v5 6/8] drm/panel: Add ilitek ili9341 panel driver

2020-05-25 Thread dillon . minfei
From: dillon min 

This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.

Changes since V3:

accoding to Linus Walleij's suggestion.
1 add more comments to driver.
2 reduce magic number usage in the driver.
3 move panel configuration from common place to system configuration.
4 reuse MIPI_DCS_* as more as possible.

Signed-off-by: dillon min 
---
 drivers/gpu/drm/panel/Kconfig|   12 +
 drivers/gpu/drm/panel/Makefile   |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 1301 ++
 3 files changed, 1314 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1..c938bee 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883c..16947d7 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index 000..dd6f860
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,1301 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define ILI9341_DTCA_LEN   3
+#define ILI9341_DTCB_LEN   2
+#define ILI9341_POWER_A_LEN5
+#define ILI9341_DFC_1_LEN  2
+#define ILI9341_FRC_LEN2
+#define ILI9341_VCOM_1_LEN 2
+#define ILI9341_DFC_2_LEN  

[PATCH v5 2/8] ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board

2020-05-25 Thread dillon . minfei
From: dillon min 

This patch adds the pin configuration for ltdc and spi5 controller
on stm32f429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa14..0eb107f 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,73 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+,
+/* LCD_B2 */
+,
+/* LCD_B3*/
+,
+/* LCD_G5 */
+,
+/* LCD_G6 */
+,
+/* LCD_G7 */
+,
+/* LCD_B4 */
+,
+/* LCD_B5 */
+,
+/* LCD_B6 */
+,
+/* LCD_B7 */
+;
+/* LCD_DE */
+   slew-rate = <2>;
+   };
+   };
+
+   spi5_pins: spi5-0 {
+   pins1 {
+   pinmux = ,
+   /* SPI5_CLK */
+;
+   /* SPI5_MOSI */
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <0>;
+   };
+   pins2 {
+   pinmux = ;
+   /* SPI5_MISO */
+   bias-disable;
+   };
+   };
+
dcmi_pins: dcmi-0 {
pins {
pinmux = , 
/* DCMI_HSYNC */
-- 
2.7.4

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[PATCH v5 4/8] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2020-05-25 Thread dillon . minfei
From: dillon min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: dillon min 
---
 .../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
 1 file changed, 69 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index 000..2172f88
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX)
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4

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[PATCH v5 5/8] clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate, fix duplicated ltdc clock register to 'clk_core' case ltdc's clock turn off by clk_disable_unused()

2020-05-25 Thread dillon . minfei
From: dillon min 

ltdc set clock rate crashed
   'post_div_data[]''s pll_num is PLL_I2S, PLL_SAI (number is 1,2). but,
as pll_num is offset of 'clks[]' input to clk_register_pll_div(), which
is FCLK, CLK_LSI, defined in 'include/dt-bindings/clock/stm32fx-clock.h'
so, this is a null object at the register time.
then, in ltdc's clock is_enabled(), enable(), will call to_clk_gate().
will return a null object, cause kernel crashed.
need change pll_num to PLL_VCO_I2S, PLL_VCO_SAI for 'post_div_data[]'

 duplicated ltdc clock
   'stm32f429_gates[]' has a member 'ltdc' register to 'clk_core', but no
upper driver use it, ltdc driver use the lcd-tft defined in
   'stm32f429_aux_clk[]'. after system startup, as stm32f429_gates[]'s ltdc
enable_count is zero, so turn off by clk_disable_unused()

Changes since V3:
1 drop last wrong changes about 'CLK_IGNORE_UNUSED' patch
2 fix PLL_SAI mismatch with PLL_VCO_SAI

Signed-off-by: dillon min 
---
 drivers/clk/clk-stm32f4.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce..fa62e99 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
 };
 
 static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
@@ -557,13 +556,13 @@ static const struct clk_div_table post_divr_table[] = {
 
 #define MAX_POST_DIV 3
 static const struct stm32f4_pll_post_div_data  post_div_data[MAX_POST_DIV] = {
-   { CLK_I2SQ_PDIV, PLL_I2S, "plli2s-q-div", "plli2s-q",
+   { CLK_I2SQ_PDIV, PLL_VCO_I2S, "plli2s-q-div", "plli2s-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL},
 
-   { CLK_SAIQ_PDIV, PLL_SAI, "pllsai-q-div", "pllsai-q",
+   { CLK_SAIQ_PDIV, PLL_VCO_SAI, "pllsai-q-div", "pllsai-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL },
 
-   { NO_IDX, PLL_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
+   { NO_IDX, PLL_VCO_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table },
 };
 
-- 
2.7.4

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[PATCH v5 0/8] Enable ili9341 and l3gd20 on stm32f429-disco

2020-05-25 Thread dillon . minfei
From: dillon min 

V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SPI_SIMPLEX_RX mode on stm32 spi controller.

V5:
1 instead of add send dummy data out under SIMPLEX_RX mode,
   add flags 'SPI_CONTROLLER_MUST_TX' for stm32 spi driver
2 bypass 'SPI_CONTROLLER_MUST_TX' and 'SPI_CONTROLLER_MUST_RX' under
'SPI_3WIRE' mode

V4:
According to alexandre torgue's suggestion, combine ili9341 and
l3gd20's modification on stm32f429-disco board to one patchset.

Changes:

ili9341:

1 update ili9341 panel driver according to Linus's suggestion
2 drop V1's No.5 patch, sumbit new changes for clk-stm32f4
3 merge l3gd20's change to this patchset

V3:
1 merge original tiny/ili9341.c driver to panel/panel-ilitek-ili9341.c
  to support serial spi & parallel rgb interface in one driver.
2 update ilitek,ili9341.yaml dts binding documentation.
3 update stm32f429-disco dts binding

V2:
1 verify ilitek,ili9341.yaml with make O=../linux-stm32
  dt_binding_check
  DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/panel/
  ilitek,ili9341.yaml

V1:
1 add ili9341 drm panel driver
2 add ltdc, spi5 controller for stm32f429-disco
3 add ltdc, spi5 pin map for stm32f429-disco
4 add docs about ili9341
5 fix ltdc driver loading hang in clk set rate bug


L3gd20:
V3:
1 merge stm32f429-disco dtbs binding with ili9341 part

V2:
1 insert blank line at stm32f420-disco.dts line 143
2 add more description for l3gd20 in commit message

V1:
1 enable spi5 controller on stm32f429-disco (dts)
2 add spi5 pinmap for stm32f429-disco  (dts)
3 add SPI_SIMPLEX_RX, SPI_3WIRE_RX support for stm32f4


dillon min (8):
  ARM: dts: stm32: Add dma config for spi5
  ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board
  ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on
stm32429-disco board
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate,
fix duplicated ltdc clock register to 'clk_core' case ltdc's clock  
  turn off by clk_disable_unused()
  drm/panel: Add ilitek ili9341 panel driver
  spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4
  spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't
be coexit with 'SPI_3WIRE' mode

 .../bindings/display/panel/ilitek,ili9341.yaml |   69 ++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi |   67 +
 arch/arm/boot/dts/stm32f429-disco.dts  |   48 +
 arch/arm/boot/dts/stm32f429.dtsi   |3 +
 drivers/clk/clk-stm32f4.c  |7 +-
 drivers/gpu/drm/panel/Kconfig  |   12 +
 drivers/gpu/drm/panel/Makefile |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 1301 
 drivers/spi/spi-stm32.c|   19 +-
 drivers/spi/spi.c  |3 +-
 10 files changed, 1521 insertions(+), 9 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4

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[PATCH v5 0/8] Enable ili9341 and l3gd20 on stm32f429-disco

2020-05-25 Thread dillon . minfei
From: dillon min 

V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SPI_SIMPLEX_RX mode on stm32 spi controller.

V5:
1 instead of add send dummy data out under SIMPLEX_RX mode,
   add flags 'SPI_CONTROLLER_MUST_TX' for stm32 spi driver
2 bypass 'SPI_CONTROLLER_MUST_TX' and 'SPI_CONTROLLER_MUST_RX' under
'SPI_3WIRE' mode

V4:
According to alexandre torgue's suggestion, combine ili9341 and
l3gd20's modification on stm32f429-disco board to one patchset.

Changes:

ili9341:

1 update ili9341 panel driver according to Linus's suggestion
2 drop V1's No.5 patch, sumbit new changes for clk-stm32f4
3 merge l3gd20's change to this patchset

V3:
1 merge original tiny/ili9341.c driver to panel/panel-ilitek-ili9341.c
  to support serial spi & parallel rgb interface in one driver.
2 update ilitek,ili9341.yaml dts binding documentation.
3 update stm32f429-disco dts binding

V2:
1 verify ilitek,ili9341.yaml with make O=../linux-stm32
  dt_binding_check
  DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/panel/
  ilitek,ili9341.yaml

V1:
1 add ili9341 drm panel driver
2 add ltdc, spi5 controller for stm32f429-disco
3 add ltdc, spi5 pin map for stm32f429-disco
4 add docs about ili9341
5 fix ltdc driver loading hang in clk set rate bug


L3gd20:
V3:
1 merge stm32f429-disco dtbs binding with ili9341 part

V2:
1 insert blank line at stm32f420-disco.dts line 143
2 add more description for l3gd20 in commit message

V1:
1 enable spi5 controller on stm32f429-disco (dts)
2 add spi5 pinmap for stm32f429-disco  (dts)
3 add SPI_SIMPLEX_RX, SPI_3WIRE_RX support for stm32f4


dillon min (8):
  ARM: dts: stm32: Add dma config for spi5
  ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board
  ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on
stm32429-disco board
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate,
fix duplicated ltdc clock register to 'clk_core' case ltdc's clock  
  turn off by clk_disable_unused()
  drm/panel: Add ilitek ili9341 panel driver
  spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4
  spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't
be coexit with 'SPI_3WIRE' mode

 .../bindings/display/panel/ilitek,ili9341.yaml |   69 ++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi |   67 +
 arch/arm/boot/dts/stm32f429-disco.dts  |   48 +
 arch/arm/boot/dts/stm32f429.dtsi   |3 +
 drivers/clk/clk-stm32f4.c  |7 +-
 drivers/gpu/drm/panel/Kconfig  |   12 +
 drivers/gpu/drm/panel/Makefile |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 1301 
 drivers/spi/spi-stm32.c|   19 +-
 drivers/spi/spi.c  |3 +-
 10 files changed, 1521 insertions(+), 9 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4

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[PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode

2020-05-25 Thread dillon . minfei
From: dillon min 

since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.

so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode

Signed-off-by: dillon min 
---
 drivers/spi/spi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index c92c894..f884411 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1023,7 +1023,8 @@ static int spi_map_msg(struct spi_controller *ctlr, 
struct spi_message *msg)
void *tmp;
unsigned int max_tx, max_rx;
 
-   if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
+   if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
+   && !(msg->spi->mode & SPI_3WIRE)) {
max_tx = 0;
max_rx = 0;
 
-- 
2.7.4

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[PATCH v5 6/8] drm/panel: Add ilitek ili9341 panel driver

2020-05-25 Thread dillon . minfei
From: dillon min 

This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.

Changes since V3:

accoding to Linus Walleij's suggestion.
1 add more comments to driver.
2 reduce magic number usage in the driver.
3 move panel configuration from common place to system configuration.
4 reuse MIPI_DCS_* as more as possible.

Signed-off-by: dillon min 
---
 drivers/gpu/drm/panel/Kconfig|   12 +
 drivers/gpu/drm/panel/Makefile   |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 1301 ++
 3 files changed, 1314 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1..c938bee 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883c..16947d7 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index 000..dd6f860
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,1301 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define ILI9341_DTCA_LEN   3
+#define ILI9341_DTCB_LEN   2
+#define ILI9341_POWER_A_LEN5
+#define ILI9341_DFC_1_LEN  2
+#define ILI9341_FRC_LEN2
+#define ILI9341_VCOM_1_LEN 2
+#define ILI9341_DFC_2_LEN  

[PATCH v5 7/8] spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4

2020-05-25 Thread dillon . minfei
From: dillon min 

in l3gd20 driver startup, there is a setup failed error return from
stm32 spi driver

 "
 [2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
 regulator
 [2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
 regulator
 [2.706707] spi_stm32 40015000.spi: SPI transfer setup failed
 [2.713741] st-gyro-spi spi0.0: SPI transfer failed: -22
 [2.721096] spi_master spi0: failed to transfer one message from queue
 [2.729268] iio iio:device0: failed to read Who-Am-I register.
 [2.737504] st-gyro-spi: probe of spi0.0 failed with error -22
 "

after debug into spi-stm32 driver, st-gyro-spi split two steps to read
l3gd20 id

first: send command to l3gd20 with read id command in tx_buf, rx_buf
is null.
second: read id with tx_buf is null, rx_buf not null.

so, for second step, stm32 driver recongise this process as 'SPI_SIMPLE_RX'
from stm32_spi_communication_type(), but there is no related process for this
type in stm32f4_spi_set_mode(), then we get error from
stm32_spi_transfer_one_setup().

we can use two method to fix this bug.
1, use stm32 spi's "In unidirectional receive-only mode (BIDIMODE=0 and
RXONLY=1)". but as our code running in sdram, the read latency is too large
to get so many receive overrun error in interrupts handler.

2, use stm32 spi's "In full-duplex (BIDIMODE=0 and RXONLY=0)", as tx_buf is
null, so add flag 'SPI_MASTER_MUST_TX' to spi master.

Change since V4:
1 remove dummy data sent out by stm32 spi driver
2 add flag 'SPI_MASTER_MUST_TX' to spi master

Signed-off-by: dillon min 
---

Hi Mark,

This changes add 'SPI_MASTER_MUST_TX' for stm32 spi controller

thanks.


 drivers/spi/spi-stm32.c | 19 +++
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 44ac6eb3..4c643df 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -811,7 +811,9 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
mask |= STM32F4_SPI_SR_TXE;
}
 
-   if (!spi->cur_usedma && spi->cur_comm == SPI_FULL_DUPLEX) {
+   if (!spi->cur_usedma && (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX)) {
/* TXE flag is set and is handled when RXNE flag occurs */
sr &= ~STM32F4_SPI_SR_TXE;
mask |= STM32F4_SPI_SR_RXNE | STM32F4_SPI_SR_OVR;
@@ -850,7 +852,7 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
stm32f4_spi_read_rx(spi);
if (spi->rx_len == 0)
end = true;
-   else /* Load data for discontinuous mode */
+   else if (spi->tx_buf)/* Load data for discontinuous mode */
stm32f4_spi_write_tx(spi);
}
 
@@ -1151,7 +1153,9 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi 
*spi)
/* Enable the interrupts relative to the current communication mode */
if (spi->cur_comm == SPI_SIMPLEX_TX || spi->cur_comm == SPI_3WIRE_TX) {
cr2 |= STM32F4_SPI_CR2_TXEIE;
-   } else if (spi->cur_comm == SPI_FULL_DUPLEX) {
+   } else if (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX) {
/* In transmit-only mode, the OVR flag is set in the SR register
 * since the received data are never read. Therefore set OVR
 * interrupt only when rx buffer is available.
@@ -1462,10 +1466,16 @@ static int stm32f4_spi_set_mode(struct stm32_spi *spi, 
unsigned int comm_type)
stm32_spi_set_bits(spi, STM32F4_SPI_CR1,
STM32F4_SPI_CR1_BIDIMODE |
STM32F4_SPI_CR1_BIDIOE);
-   } else if (comm_type == SPI_FULL_DUPLEX) {
+   } else if (comm_type == SPI_FULL_DUPLEX ||
+   comm_type == SPI_SIMPLEX_RX) {
stm32_spi_clr_bits(spi, STM32F4_SPI_CR1,
STM32F4_SPI_CR1_BIDIMODE |
STM32F4_SPI_CR1_BIDIOE);
+   } else if (comm_type == SPI_3WIRE_RX) {
+   stm32_spi_set_bits(spi, STM32F4_SPI_CR1,
+   STM32F4_SPI_CR1_BIDIMODE);
+   stm32_spi_clr_bits(spi, STM32F4_SPI_CR1,
+   STM32F4_SPI_CR1_BIDIOE);
} else {
return -EINVAL;
}
@@ -1906,6 +1916,7 @@ static int stm32_spi_probe(struct platform_device *pdev)
master->prepare_message = stm32_spi_prepare_msg;
master->transfer_one = stm32_spi_transfer_one;
master->unprepare_message = stm32_spi_unprepare_msg;
+   master->flags 

[PATCH v5 2/8] ARM: dts: stm32: Add pin map for ltdc & spi5 on stm32f429-disco board

2020-05-25 Thread dillon . minfei
From: dillon min 

This patch adds the pin configuration for ltdc and spi5 controller
on stm32f429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa14..0eb107f 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,73 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+,
+/* LCD_B2 */
+,
+/* LCD_B3*/
+,
+/* LCD_G5 */
+,
+/* LCD_G6 */
+,
+/* LCD_G7 */
+,
+/* LCD_B4 */
+,
+/* LCD_B5 */
+,
+/* LCD_B6 */
+,
+/* LCD_B7 */
+;
+/* LCD_DE */
+   slew-rate = <2>;
+   };
+   };
+
+   spi5_pins: spi5-0 {
+   pins1 {
+   pinmux = ,
+   /* SPI5_CLK */
+;
+   /* SPI5_MOSI */
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <0>;
+   };
+   pins2 {
+   pinmux = ;
+   /* SPI5_MISO */
+   bias-disable;
+   };
+   };
+
dcmi_pins: dcmi-0 {
pins {
pinmux = , 
/* DCMI_HSYNC */
-- 
2.7.4

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[PATCH v5 8/8] spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode

2020-05-25 Thread dillon . minfei
From: dillon min 

since chip spi driver need get the transfer direction by 'tx_buf' and
'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.

so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
feature in 'SPI_3WIRE' mode

Signed-off-by: dillon min 
---
 drivers/spi/spi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index c92c894..f884411 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1023,7 +1023,8 @@ static int spi_map_msg(struct spi_controller *ctlr, 
struct spi_message *msg)
void *tmp;
unsigned int max_tx, max_rx;
 
-   if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
+   if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
+   && !(msg->spi->mode & SPI_3WIRE)) {
max_tx = 0;
max_rx = 0;
 
-- 
2.7.4

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[PATCH v5 1/8] ARM: dts: stm32: Add dma config for spi5

2020-05-25 Thread dillon . minfei
From: dillon min 

Enable spi5's dma configuration. for graphics data output to
ilitek ili9341 panel via mipi dbi interface

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d777069..5820b11 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -660,6 +660,9 @@
reg = <0x40015000 0x400>;
interrupts = <85>;
clocks = < 0 STM32F4_APB2_CLOCK(SPI5)>;
+   dmas = < 3 2 0x400 0x0>,
+   < 4 2 0x400 0x0>;
+   dma-names = "rx", "tx";
status = "disabled";
};
 
-- 
2.7.4

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[PATCH v5 7/8] spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4

2020-05-25 Thread dillon . minfei
From: dillon min 

in l3gd20 driver startup, there is a setup failed error return from
stm32 spi driver

 "
 [2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
 regulator
 [2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
 regulator
 [2.706707] spi_stm32 40015000.spi: SPI transfer setup failed
 [2.713741] st-gyro-spi spi0.0: SPI transfer failed: -22
 [2.721096] spi_master spi0: failed to transfer one message from queue
 [2.729268] iio iio:device0: failed to read Who-Am-I register.
 [2.737504] st-gyro-spi: probe of spi0.0 failed with error -22
 "

after debug into spi-stm32 driver, st-gyro-spi split two steps to read
l3gd20 id

first: send command to l3gd20 with read id command in tx_buf, rx_buf
is null.
second: read id with tx_buf is null, rx_buf not null.

so, for second step, stm32 driver recongise this process as 'SPI_SIMPLE_RX'
from stm32_spi_communication_type(), but there is no related process for this
type in stm32f4_spi_set_mode(), then we get error from
stm32_spi_transfer_one_setup().

we can use two method to fix this bug.
1, use stm32 spi's "In unidirectional receive-only mode (BIDIMODE=0 and
RXONLY=1)". but as our code running in sdram, the read latency is too large
to get so many receive overrun error in interrupts handler.

2, use stm32 spi's "In full-duplex (BIDIMODE=0 and RXONLY=0)", as tx_buf is
null, so add flag 'SPI_MASTER_MUST_TX' to spi master.

Change since V4:
1 remove dummy data sent out by stm32 spi driver
2 add flag 'SPI_MASTER_MUST_TX' to spi master

Signed-off-by: dillon min 
---

Hi Mark,

This changes add 'SPI_MASTER_MUST_TX' for stm32 spi controller

thanks.


 drivers/spi/spi-stm32.c | 19 +++
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 44ac6eb3..4c643df 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -811,7 +811,9 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
mask |= STM32F4_SPI_SR_TXE;
}
 
-   if (!spi->cur_usedma && spi->cur_comm == SPI_FULL_DUPLEX) {
+   if (!spi->cur_usedma && (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX)) {
/* TXE flag is set and is handled when RXNE flag occurs */
sr &= ~STM32F4_SPI_SR_TXE;
mask |= STM32F4_SPI_SR_RXNE | STM32F4_SPI_SR_OVR;
@@ -850,7 +852,7 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
stm32f4_spi_read_rx(spi);
if (spi->rx_len == 0)
end = true;
-   else /* Load data for discontinuous mode */
+   else if (spi->tx_buf)/* Load data for discontinuous mode */
stm32f4_spi_write_tx(spi);
}
 
@@ -1151,7 +1153,9 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi 
*spi)
/* Enable the interrupts relative to the current communication mode */
if (spi->cur_comm == SPI_SIMPLEX_TX || spi->cur_comm == SPI_3WIRE_TX) {
cr2 |= STM32F4_SPI_CR2_TXEIE;
-   } else if (spi->cur_comm == SPI_FULL_DUPLEX) {
+   } else if (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX) {
/* In transmit-only mode, the OVR flag is set in the SR register
 * since the received data are never read. Therefore set OVR
 * interrupt only when rx buffer is available.
@@ -1462,10 +1466,16 @@ static int stm32f4_spi_set_mode(struct stm32_spi *spi, 
unsigned int comm_type)
stm32_spi_set_bits(spi, STM32F4_SPI_CR1,
STM32F4_SPI_CR1_BIDIMODE |
STM32F4_SPI_CR1_BIDIOE);
-   } else if (comm_type == SPI_FULL_DUPLEX) {
+   } else if (comm_type == SPI_FULL_DUPLEX ||
+   comm_type == SPI_SIMPLEX_RX) {
stm32_spi_clr_bits(spi, STM32F4_SPI_CR1,
STM32F4_SPI_CR1_BIDIMODE |
STM32F4_SPI_CR1_BIDIOE);
+   } else if (comm_type == SPI_3WIRE_RX) {
+   stm32_spi_set_bits(spi, STM32F4_SPI_CR1,
+   STM32F4_SPI_CR1_BIDIMODE);
+   stm32_spi_clr_bits(spi, STM32F4_SPI_CR1,
+   STM32F4_SPI_CR1_BIDIOE);
} else {
return -EINVAL;
}
@@ -1906,6 +1916,7 @@ static int stm32_spi_probe(struct platform_device *pdev)
master->prepare_message = stm32_spi_prepare_msg;
master->transfer_one = stm32_spi_transfer_one;
master->unprepare_message = stm32_spi_unprepare_msg;
+   master->flags 

[PATCH v5 5/8] clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate, fix duplicated ltdc clock register to 'clk_core' case ltdc's clock turn off by clk_disable_unused()

2020-05-25 Thread dillon . minfei
From: dillon min 

ltdc set clock rate crashed
   'post_div_data[]''s pll_num is PLL_I2S, PLL_SAI (number is 1,2). but,
as pll_num is offset of 'clks[]' input to clk_register_pll_div(), which
is FCLK, CLK_LSI, defined in 'include/dt-bindings/clock/stm32fx-clock.h'
so, this is a null object at the register time.
then, in ltdc's clock is_enabled(), enable(), will call to_clk_gate().
will return a null object, cause kernel crashed.
need change pll_num to PLL_VCO_I2S, PLL_VCO_SAI for 'post_div_data[]'

 duplicated ltdc clock
   'stm32f429_gates[]' has a member 'ltdc' register to 'clk_core', but no
upper driver use it, ltdc driver use the lcd-tft defined in
   'stm32f429_aux_clk[]'. after system startup, as stm32f429_gates[]'s ltdc
enable_count is zero, so turn off by clk_disable_unused()

Changes since V3:
1 drop last wrong changes about 'CLK_IGNORE_UNUSED' patch
2 fix PLL_SAI mismatch with PLL_VCO_SAI

Signed-off-by: dillon min 
---
 drivers/clk/clk-stm32f4.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce..fa62e99 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
 };
 
 static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
@@ -557,13 +556,13 @@ static const struct clk_div_table post_divr_table[] = {
 
 #define MAX_POST_DIV 3
 static const struct stm32f4_pll_post_div_data  post_div_data[MAX_POST_DIV] = {
-   { CLK_I2SQ_PDIV, PLL_I2S, "plli2s-q-div", "plli2s-q",
+   { CLK_I2SQ_PDIV, PLL_VCO_I2S, "plli2s-q-div", "plli2s-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL},
 
-   { CLK_SAIQ_PDIV, PLL_SAI, "pllsai-q-div", "pllsai-q",
+   { CLK_SAIQ_PDIV, PLL_VCO_SAI, "pllsai-q-div", "pllsai-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL },
 
-   { NO_IDX, PLL_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
+   { NO_IDX, PLL_VCO_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table },
 };
 
-- 
2.7.4

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[PATCH v4 6/8] ARM: dts: stm32: enable ltdc binding with ili9341 on stm32429-disco board

2020-05-19 Thread dillon . minfei
From: dillon min 

Enable the ltdc & ili9341 on stm32429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429-disco.dts | 48 +++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 30c0f67..365d16f 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -49,6 +49,8 @@
 #include "stm32f429.dtsi"
 #include "stm32f429-pinctrl.dtsi"
 #include 
+#include 
+#include 
 
 / {
model = "STMicroelectronics STM32F429i-DISCO board";
@@ -127,3 +129,49 @@
pinctrl-names = "default";
status = "okay";
 };
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins_f429_disco>;
+   pinctrl-names = "default";
+
+   port {
+   ltdc_out_rgb: endpoint {
+   remote-endpoint = <_in_rgb>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cs-gpios = < 1 GPIO_ACTIVE_LOW>, < 2 GPIO_ACTIVE_LOW>;
+
+   l3gd20: l3gd20@0 {
+   compatible = "st,l3gd20-gyro";
+   spi-max-frequency = <1000>;
+   st,drdy-int-pin = <2>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_EDGE_RISING>,
+   <2 IRQ_TYPE_EDGE_RISING>;
+   reg = <0>;
+   status = "okay";
+   };
+
+   display: display@1{
+   /* Connect panel-ilitek-9341 to ltdc */
+   compatible = "st,sf-tc240t-9370-t";
+   reg = <1>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in_rgb: endpoint {
+   remote-endpoint = <_out_rgb>;
+   };
+   };
+   };
+};
-- 
2.7.4

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[PATCH v4 5/8] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2020-05-19 Thread dillon . minfei
From: dillon min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: dillon min 
---
 .../bindings/display/panel/ilitek,ili9341.yaml | 69 ++
 1 file changed, 69 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index 000..2172f88
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX)
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t",
+  "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4

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[PATCH v4 0/8] Enable ili9341 and l3gd20 on stm32f429-disco

2020-05-19 Thread dillon . minfei
From: dillon min 

According to alexandre torgue's suggestion, combine ili9341 and
l3gd20's modification on stm32f429-disco board to one patchset.

Changes:

ili9341:

V4:
1 update ili9341 panel driver according to Linus's suggestion
2 drop V1's No.5 patch, sumbit new changes for clk-stm32f4
3 merge l3gd20's change to this patchset

V3:
1 merge original tiny/ili9341.c driver to panel/panel-ilitek-ili9341.c
  to support serial spi & parallel rgb interface in one driver.
2 update ilitek,ili9341.yaml dts binding documentation.
3 update stm32f429-disco dts binding

V2:
1 verify ilitek,ili9341.yaml with make O=../linux-stm32
   dt_binding_check
   DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/panel/
   ilitek,ili9341.yaml

V1:
1 add ili9341 drm panel driver
2 add ltdc, spi5 controller for stm32f429-disco
3 add ltdc, spi5 pin map for stm32f429-disco
4 add docs about ili9341
5 fix ltdc driver loading hang in clk set rate bug


L3gd20:

V3:
1, merge stm32f429-disco dtbs binding with ili9341 part

V2:
1, insert blank line at stm32f420-disco.dts line 143
2, add more description for l3gd20 in commit message

V1:
1, enable spi5 controller on stm32f429-disco (dts)
2, add spi5 pinmap for stm32f429-disco  (dts)
3, add SPI_SIMPLEX_RX, SPI_3WIRE_RX support for stm32f4

dillon min (8):
  ARM: dts: stm32: Add dma config for spi5
  ARM: dts: stm32: enable l3gd20 on stm32429-disco board
  spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4
  ARM: dts: stm32: Add pin map for ltdc on stm32f429-disco board
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  ARM: dts: stm32: enable ltdc binding with ili9341 on stm32429-disco
board
  clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate.
  drm/panel: Add ilitek ili9341 panel driver

 .../bindings/display/panel/ilitek,ili9341.yaml |   69 ++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi |   67 +
 arch/arm/boot/dts/stm32f429-disco.dts  |   48 +
 arch/arm/boot/dts/stm32f429.dtsi   |3 +
 drivers/clk/clk-stm32f4.c  |7 +-
 drivers/gpu/drm/panel/Kconfig  |   12 +
 drivers/gpu/drm/panel/Makefile |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 1301 
 drivers/spi/spi-stm32.c|   30 +-
 9 files changed, 1530 insertions(+), 8 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4

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[PATCH v4 7/8] clk: stm32: Fix stm32f429's ltdc driver hang in set clock rate.

2020-05-19 Thread dillon . minfei
From: dillon min 

fix duplicated ltdc clock register to 'clk_core' case ltdc's clock
turn off by clk_disable_unused()

ltdc set clock rate crashed:
   'post_div_data[]''s pll_num is PLL_I2S, PLL_SAI (number is 1,2). but,
as pll_num is offset of 'clks[]' input to clk_register_pll_div(), which
is FCLK, CLK_LSI, defined in 'include/dt-bindings/clock/stm32fx-clock.h'
so, this is a null object at the register time.
then, in ltdc's clock is_enabled(), enable(), will call to_clk_gate().
will return a null object, cause kernel crashed.
need change pll_num to PLL_VCO_I2S, PLL_VCO_SAI for 'post_div_data[]'

duplicated ltdc clock
   'stm32f429_gates[]' has a member 'ltdc' register to 'clk_core', but no
upper driver use it, ltdc driver use the lcd-tft defined in
   'stm32f429_aux_clk[]'. after system startup, as stm32f429_gates[]'s ltdc
   enable_count is zero, so turn off by clk_disable_unused()

Signed-off-by: dillon min 
---
Hi Stephen Boyd:

thanks for reviewing, this patch fix the wrong use of clk ignore unused.

thanks.

Changes since V3:
1 drop last wrong changes about 'CLK_IGNORE_UNUSED' patch
2 fix PLL_SAI mismatch with PLL_VCO_SAI
 drivers/clk/clk-stm32f4.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce..fa62e99 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
 };
 
 static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
@@ -557,13 +556,13 @@ static const struct clk_div_table post_divr_table[] = {
 
 #define MAX_POST_DIV 3
 static const struct stm32f4_pll_post_div_data  post_div_data[MAX_POST_DIV] = {
-   { CLK_I2SQ_PDIV, PLL_I2S, "plli2s-q-div", "plli2s-q",
+   { CLK_I2SQ_PDIV, PLL_VCO_I2S, "plli2s-q-div", "plli2s-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL},
 
-   { CLK_SAIQ_PDIV, PLL_SAI, "pllsai-q-div", "pllsai-q",
+   { CLK_SAIQ_PDIV, PLL_VCO_SAI, "pllsai-q-div", "pllsai-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL },
 
-   { NO_IDX, PLL_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
+   { NO_IDX, PLL_VCO_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table },
 };
 
-- 
2.7.4

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[PATCH v4 2/8] ARM: dts: stm32: enable l3gd20 on stm32429-disco board

2020-05-19 Thread dillon . minfei
From: dillon min 

L3gd20, st mems motion sensor, 3-axis digital output gyroscope,
connect to stm32f429 via spi5

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa14..54c1b27 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,23 @@
};
};
 
+   spi5_pins: spi5-0 {
+   pins1 {
+   pinmux = ,
+   /* SPI5_CLK */
+;
+   /* SPI5_MOSI */
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <0>;
+   };
+   pins2 {
+   pinmux = ;
+   /* SPI5_MISO */
+   bias-disable;
+   };
+   };
+
dcmi_pins: dcmi-0 {
pins {
pinmux = , 
/* DCMI_HSYNC */
-- 
2.7.4

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[PATCH v4 4/8] ARM: dts: stm32: Add pin map for ltdc on stm32f429-disco board

2020-05-19 Thread dillon . minfei
From: dillon min 

This patch adds the pin configuration for ltdc controller
on stm32f429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 50 ++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 54c1b27..0eb107f 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,56 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+,
+/* LCD_B2 */
+,
+/* LCD_B3*/
+,
+/* LCD_G5 */
+,
+/* LCD_G6 */
+,
+/* LCD_G7 */
+,
+/* LCD_B4 */
+,
+/* LCD_B5 */
+,
+/* LCD_B6 */
+,
+/* LCD_B7 */
+;
+/* LCD_DE */
+   slew-rate = <2>;
+   };
+   };
+
spi5_pins: spi5-0 {
pins1 {
pinmux = ,
-- 
2.7.4

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[PATCH v4 1/8] ARM: dts: stm32: Add dma config for spi5

2020-05-19 Thread dillon . minfei
From: dillon min 

Enable spi5's dma configuration. for graphics data output to
ilitek ili9341 panel via mipi dbi interface

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d777069..5820b11 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -660,6 +660,9 @@
reg = <0x40015000 0x400>;
interrupts = <85>;
clocks = < 0 STM32F4_APB2_CLOCK(SPI5)>;
+   dmas = < 3 2 0x400 0x0>,
+   < 4 2 0x400 0x0>;
+   dma-names = "rx", "tx";
status = "disabled";
};
 
-- 
2.7.4

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[PATCH v4 8/8] drm/panel: Add ilitek ili9341 panel driver

2020-05-19 Thread dillon . minfei
From: dillon min 

This driver combine tiny/ili9341.c mipi_dbi_interface driver
with mipi_dpi_interface driver, can support ili9341 with serial
mode or parallel rgb interface mode by register configuration.

Signed-off-by: dillon min 
---

Changes since V3:

accoding to Linus Walleij's suggestion.
1 add more comments to driver.
2 reduce magic number usage in the driver.
3 move panel configuration from common place to system configuration.
4 reuse MIPI_DCS_* as more as possible.
---
 drivers/gpu/drm/panel/Kconfig|   12 +
 drivers/gpu/drm/panel/Makefile   |1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 1301 ++
 3 files changed, 1314 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1..c938bee 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883c..16947d7 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index 000..dd6f860
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,1301 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ * - 4-line serial spi interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_RGB_INTERFACE  0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC0xb6   /* Display Function Control register */
+#define ILI9341_POWER1 0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2 0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM1  0xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM2  0xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA 0xcb   /* Power control A register */
+#define ILI9341_POWERB 0xcf   /* Power control B register */
+#define ILI9341_PGAMMA 0xe0   /* Positive Gamma Correction register */
+#define ILI9341_NGAMMA 0xe1   /* Negative Gamma Correction register */
+#define ILI9341_DTCA   0xe8   /* Driver timing control A */
+#define ILI9341_DTCB   0xea   /* Driver timing control B */
+#define ILI9341_POWER_SEQ  0xed   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN  0xf2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE  0xf6   /* Interface control register */
+#define ILI9341_PRC0xf7   /* Pump ratio control register */
+#define ILI9341_ETMOD 0xb7   /* Entry mode set */
+
+#define ILI9341_MADCTL_BGR BIT(3)
+#define ILI9341_MADCTL_MV  BIT(5)
+#define ILI9341_MADCTL_MX  BIT(6)
+#define ILI9341_MADCTL_MY  BIT(7)
+
+
+#define ILI9341_POWER_B_LEN3
+#define ILI9341_POWER_SEQ_LEN  4
+#define ILI9341_DTCA_LEN   3
+#define ILI9341_DTCB_LEN   2
+#define ILI9341_POWER_A_LEN5
+#define ILI9341_DFC_1_LEN  2
+#define ILI9341_FRC_LEN2
+#define ILI9341_VCOM_1_LEN 2
+#define ILI9341_DFC_2_LEN  4
+#define 

[PATCH v4 3/8] spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4

2020-05-19 Thread dillon . minfei
From: dillon min 

in l3gd20 driver startup, there is a setup failed error return from
stm32 spi driver

"
[2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
regulator
[2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
regulator
[2.706707] spi_stm32 40015000.spi: SPI transfer setup failed
[2.713741] st-gyro-spi spi0.0: SPI transfer failed: -22
[2.721096] spi_master spi0: failed to transfer one message from queue
[2.729268] iio iio:device0: failed to read Who-Am-I register.
[2.737504] st-gyro-spi: probe of spi0.0 failed with error -22
"

after debug into spi-stm32 driver, st-gyro-spi split two steps to read
l3gd20 id

first: send command to l3gd20 with read id command in tx_buf, rx_buf
is null.
second: read id with tx_buf is null, rx_buf not null.

so, for second step, stm32 driver recongise this process is 'SPI_SIMPLE_RX'
from stm32_spi_communication_type(), but there is no related process for this
type in stm32f4_spi_set_mode(), then we get error from
stm32_spi_transfer_one_setup().

we can use two method to fix this bug.
1, use stm32 spi's "In unidirectional receive-only mode (BIDIMODE=0 and
RXONLY=1)". but as our code running in sdram, the read latency is too large
to get so many receive overrun error in interrupts handler.

2, use stm32 spi's "In full-duplex (BIDIMODE=0 and RXONLY=0)", as tx_buf is
null, we must add dummy data sent out before read data.
so, add stm32f4_spi_tx_dummy() to handle this situation.

Signed-off-by: dillon min 
---
 drivers/spi/spi-stm32.c | 30 ++
 1 file changed, 26 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 44ac6eb3..72d9387 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -388,6 +388,14 @@ static int stm32h7_spi_get_fifo_size(struct stm32_spi *spi)
return count;
 }
 
+static void stm32f4_spi_tx_dummy(struct stm32_spi *spi)
+{
+   if (spi->cur_bpw == 16)
+   writew_relaxed(0x, spi->base + STM32F4_SPI_DR);
+   else
+   writeb_relaxed(0x55, spi->base + STM32F4_SPI_DR);
+}
+
 /**
  * stm32f4_spi_get_bpw_mask - Return bits per word mask
  * @spi: pointer to the spi controller data structure
@@ -811,7 +819,9 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
mask |= STM32F4_SPI_SR_TXE;
}
 
-   if (!spi->cur_usedma && spi->cur_comm == SPI_FULL_DUPLEX) {
+   if (!spi->cur_usedma && (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX)) {
/* TXE flag is set and is handled when RXNE flag occurs */
sr &= ~STM32F4_SPI_SR_TXE;
mask |= STM32F4_SPI_SR_RXNE | STM32F4_SPI_SR_OVR;
@@ -850,8 +860,10 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void 
*dev_id)
stm32f4_spi_read_rx(spi);
if (spi->rx_len == 0)
end = true;
-   else /* Load data for discontinuous mode */
+   else if (spi->tx_buf)/* Load data for discontinuous mode */
stm32f4_spi_write_tx(spi);
+   else if (spi->cur_comm == SPI_SIMPLEX_RX)
+   stm32f4_spi_tx_dummy(spi);
}
 
 end_irq:
@@ -1151,7 +1163,9 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi 
*spi)
/* Enable the interrupts relative to the current communication mode */
if (spi->cur_comm == SPI_SIMPLEX_TX || spi->cur_comm == SPI_3WIRE_TX) {
cr2 |= STM32F4_SPI_CR2_TXEIE;
-   } else if (spi->cur_comm == SPI_FULL_DUPLEX) {
+   } else if (spi->cur_comm == SPI_FULL_DUPLEX ||
+   spi->cur_comm == SPI_SIMPLEX_RX ||
+   spi->cur_comm == SPI_3WIRE_RX) {
/* In transmit-only mode, the OVR flag is set in the SR register
 * since the received data are never read. Therefore set OVR
 * interrupt only when rx buffer is available.
@@ -1170,6 +1184,8 @@ static int stm32f4_spi_transfer_one_irq(struct stm32_spi 
*spi)
/* starting data transfer when buffer is loaded */
if (spi->tx_buf)
stm32f4_spi_write_tx(spi);
+   else if (spi->cur_comm == SPI_SIMPLEX_RX)
+   stm32f4_spi_tx_dummy(spi);
 
spin_unlock_irqrestore(>lock, flags);
 
@@ -1462,10 +1478,16 @@ static int stm32f4_spi_set_mode(struct stm32_spi *spi, 
unsigned int comm_type)
stm32_spi_set_bits(spi, STM32F4_SPI_CR1,
STM32F4_SPI_CR1_BIDIMODE |
STM32F4_SPI_CR1_BIDIOE);
-   } else if (comm_type == SPI_FULL_DUPLEX) {
+   } else if (comm_type == SPI_FULL_DUPLEX ||
+   comm_type == SPI_SIMPLEX_RX) {
  

[PATCH v3 1/5] ARM: dts: stm32: Add pin map for ltdc, spi5 on stm32f429-disco board

2020-05-12 Thread dillon . minfei
From: dillon min 

This patch adds the pin configuration for ltdc, spi5 controller
on stm32f429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa14..0eb107f 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,73 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+,
+/* LCD_B2 */
+,
+/* LCD_B3*/
+,
+/* LCD_G5 */
+,
+/* LCD_G6 */
+,
+/* LCD_G7 */
+,
+/* LCD_B4 */
+,
+/* LCD_B5 */
+,
+/* LCD_B6 */
+,
+/* LCD_B7 */
+;
+/* LCD_DE */
+   slew-rate = <2>;
+   };
+   };
+
+   spi5_pins: spi5-0 {
+   pins1 {
+   pinmux = ,
+   /* SPI5_CLK */
+;
+   /* SPI5_MOSI */
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <0>;
+   };
+   pins2 {
+   pinmux = ;
+   /* SPI5_MISO */
+   bias-disable;
+   };
+   };
+
dcmi_pins: dcmi-0 {
pins {
pinmux = , 
/* DCMI_HSYNC */
-- 
2.7.4

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[PATCH v3 3/5] ARM: dts: stm32: enable ltdc binding with ili9341 on stm32429-disco board

2020-05-12 Thread dillon . minfei
From: dillon min 

Enable the ltdc & ili9341 on stm32429-disco board.

Signed-off-by: dillon min 
---

Changes:

V3:
change dts binding compatible to "st,sf-tc240t-9370-t"

V2:
none

v1:
none

arch/arm/boot/dts/stm32f429-disco.dts | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 30c0f67..4475e40 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -49,6 +49,8 @@
 #include "stm32f429.dtsi"
 #include "stm32f429-pinctrl.dtsi"
 #include 
+#include 
+#include 
 
 / {
model = "STMicroelectronics STM32F429i-DISCO board";
@@ -127,3 +129,40 @@
pinctrl-names = "default";
status = "okay";
 };
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins_f429_disco>;
+   pinctrl-names = "default";
+
+   port {
+   ltdc_out_rgb: endpoint {
+   remote-endpoint = <_in_rgb>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cs-gpios = < 2 GPIO_ACTIVE_LOW>;
+   dmas = < 3 2 0x400 0x0>,
+  < 4 2 0x400 0x0>;
+   dma-names = "rx", "tx";
+   display: display@0{
+   /* Connect panel-ilitek-9341 to stm32 via ltdc*/
+   compatible = "st,sf-tc240t-9370-t";
+   reg = <0>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in_rgb: endpoint {
+   remote-endpoint = <_out_rgb>;
+   };
+   };
+   };
+};
-- 
2.7.4

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[PATCH v3 4/5] clk: stm32: Fix stm32f429 ltdc driver loading hang in clk set rate. keep ltdc clk running after kernel startup

2020-05-12 Thread dillon . minfei
From: dillon min 

as store stm32f4_rcc_register_pll return to the wrong offset of clks,
so ltdc gate clk is null. need change clks[PLL_VCO_SAI] to clks[PLL_SAI]

add CLK_IGNORE_UNUSED for ltdc to make sure clk not be freed by
clk_disable_unused

Signed-off-by: dillon min 
---
 drivers/clk/clk-stm32f4.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce..0ba73de 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,8 @@ static const struct stm32f4_gate_data stm32f429_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
+   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div",
+   CLK_IGNORE_UNUSED },
 };
 
 static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
@@ -1757,7 +1758,7 @@ static void __init stm32f4_rcc_init(struct device_node 
*np)
clks[PLL_VCO_I2S] = stm32f4_rcc_register_pll("vco_in",
>pll_data[1], _clk_lock);
 
-   clks[PLL_VCO_SAI] = stm32f4_rcc_register_pll("vco_in",
+   clks[PLL_SAI] = stm32f4_rcc_register_pll("vco_in",
>pll_data[2], _clk_lock);
 
for (n = 0; n < MAX_POST_DIV; n++) {
-- 
2.7.4

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[PATCH v3 0/5] Enable ilitek ili9341 on stm32f429-disco board

2020-05-12 Thread dillon . minfei
From: dillon min 

This patchset has following changes:

V3:
merge original tiny/ili9341.c driver to panel/panel-ilitek-ili9341.c
to support serial spi & parallel rgb interface in one driver.
update ilitek,ili9341.yaml dts binding documentation.
update stm32f429-disco dts binding

V2: 
verify ilitek,ili9341.yaml with make O=../linux-stm32 dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/panel/
ilitek,ili9341.yaml

V1:
add ili9341 drm panel driver
add ltdc, spi5 controller for stm32f429-disco
add ltdc, spi5 pin map for stm32f429-disco
add docs about ili9341
fix ltdc driver loading hang in clk set rate bug

dillon min (5):
  ARM: dts: stm32: Add pin map for ltdc, spi5 on stm32f429-disco board
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  ARM: dts: stm32: enable ltdc binding with ili9341 on stm32429-disco
board
  clk: stm32: Fix stm32f429 ltdc driver loading hang in clk set rate.
keep ltdc clk running after kernel startup
  drm/panel: Add ilitek ili9341 driver

 .../bindings/display/panel/ilitek,ili9341.yaml |  68 ++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi |  67 ++
 arch/arm/boot/dts/stm32f429-disco.dts  |  39 ++
 drivers/clk/clk-stm32f4.c  |   5 +-
 drivers/gpu/drm/panel/Kconfig  |  12 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 700 +
 7 files changed, 890 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4

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[PATCH v3 5/5] drm/panel: Add ilitek ili9341 driver

2020-05-12 Thread dillon . minfei
From: dillon min 

Currently, we can use tinydrm ili9341 driver to drive ili9341 panel
by spi interface (both register configuration and video)

ili9341 have parallel and mcu interface as well, we extend the
support to parallel rgb interface with DRM_MODE_CONNECTOR_DPI

this driver can work as parallel rgb or serial spi mode by
different dts binding.
for serial spi interface dts binding configuration, refer to:
Documentation/devicetree/bindings/display/ilitek,ili9341.txt

Signed-off-by: dillon min 
---

Changes:

V3:
1 Add support for original dts binding "adafruit,yx240qv29",
  merged from tiny/ili9341.c, which is serial spi interface
  for register configuration and video trasfer.
2 change the dts binding to st,sf-tc240t-9370-t for parallel
  rgb interface.

V2:
none

V1:
Add support for parallel rgb interface

 drivers/gpu/drm/panel/Kconfig|  12 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 700 +++
 3 files changed, 713 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1..c938bee 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,18 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_ILI9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   depends on DRM_KMS_HELPER
+   depends on DRM_KMS_CMA_HELPER
+   depends on BACKLIGHT_CLASS_DEVICE
+   select DRM_MIPI_DBI
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels. support serial & parallel rgb
+ interface.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883c..16947d7 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index 000..17339db
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,700 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ * - 18-bit parallel RGB interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define ILI9341_SLEEP_OUT0x11   /* Sleep out register */
+#define ILI9341_GAMMA0x26   /* Gamma register */
+#define ILI9341_DISPLAY_OFF  0x28   /* Display off register */
+#define ILI9341_DISPLAY_ON   0x29   /* Display on register */
+#define ILI9341_COLUMN_ADDR  0x2a   /* Colomn address register */
+#define ILI9341_PAGE_ADDR0x2b   /* Page address register */
+#define ILI9341_GRAM 0x2c   /* GRAM register */
+#define ILI9341_MAC  0x36   /* Memory Access Control register*/
+#define ILI9341_PIXEL_FORMAT 0x3A   /* Pixel Format register */
+#define ILI9341_RGB_INTERFACE0xb0   /* RGB Interface Signal Control */
+#define ILI9341_FRC  0xb1   /* Frame Rate Control register */
+#define ILI9341_DFC  0xb6   /* Display Function Control
+* register
+*/
+#define ILI9341_POWER1   0xc0   /* Power Control 1 register */
+#define ILI9341_POWER2   0xc1   /* Power Control 2 register */
+#define ILI9341_VCOM10xc5   /* VCOM Control 1 register */
+#define ILI9341_VCOM20xc7   /* VCOM Control 2 register */
+#define ILI9341_POWERA   0xcb   /* Power control A register */
+#define ILI9341_POWERB   0xcf   /* Power control B register */
+#define ILI9341_PGAMMA  

[PATCH v3 2/5] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2020-05-12 Thread dillon . minfei
From: dillon min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: dillon min 
---

Changes:

V3:
change compatible to st,sf-tc240t-9370-t, match #vendor,#lcd_module style

V2:
verifyied with make dt_binding_check

V1:
none

.../bindings/display/panel/ilitek,ili9341.yaml | 68 ++
 1 file changed, 68 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index 000..9f694d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams with 16 bits or 18 bits.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - enum:
+  # ili9341 240*320 Color on stm32f429-disco board
+- st,sf-tc240t-9370-t
+  - const: ilitek,ili9341
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: Display data/command selection (D/CX)
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4

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[PATCH v2 5/5] drm/panel: add panel driver for Ilitek ili9341 panels

2020-05-08 Thread dillon . minfei
From: dillon min 

This is a driver for 320x240 TFT panels, accepting a rgb input
streams that get adapted and scaled to the panel.

Signed-off-by: dillon min 
---
 drivers/gpu/drm/panel/Kconfig|   8 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 561 +++
 3 files changed, 570 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1..e42692c 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,14 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_IL9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   select REGMAP
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883c..d123543 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_IL9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index 000..ec22d80
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,561 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#define DEFAULT_SPI_SPEED  1000
+
+#define ILI9341_SLEEP_OUT0x11   /* Sleep out register */
+#define ILI9341_GAMMA0x26   /* Gamma register */
+#define ILI9341_DISPLAY_OFF  0x28   /* Display off register */
+#define ILI9341_DISPLAY_ON   0x29   /* Display on register */
+#define ILI9341_COLUMN_ADDR  0x2A   /* Colomn address register */
+#define ILI9341_PAGE_ADDR0x2B   /* Page address register */
+#define ILI9341_GRAM 0x2C   /* GRAM register */
+#define ILI9341_MAC  0x36   /* Memory Access Control register*/
+#define ILI9341_PIXEL_FORMAT 0x3A   /* Pixel Format register */
+#define ILI9341_WDB  0x51   /* Write Brightness Display
+* register
+*/
+#define ILI9341_WCD  0x53   /* Write Control Display
+* register
+*/
+#define ILI9341_RGB_INTERFACE0xB0   /* RGB Interface Signal Control */
+#define ILI9341_FRC  0xB1   /* Frame Rate Control register */
+#define ILI9341_BPC  0xB5   /* Blanking Porch Control
+* register
+*/
+#define ILI9341_DFC  0xB6   /* Display Function Control
+* register
+*/
+#define ILI9341_POWER1   0xC0   /* Power Control 1 register */
+#define ILI9341_POWER2   0xC1   /* Power Control 2 register */
+#define ILI9341_VCOM10xC5   /* VCOM Control 1 register */
+#define ILI9341_VCOM20xC7   /* VCOM Control 2 register */
+#define ILI9341_POWERA   0xCB   /* Power control A register */
+#define ILI9341_POWERB   0xCF   /* Power control B register */
+#define ILI9341_PGAMMA   0xE0   /* Positive Gamma Correction
+* register
+*/
+#define ILI9341_NGAMMA   0xE1   /* Negative Gamma Correction
+* register
+*/
+#define ILI9341_DTCA 

[PATCH v2 1/5] ARM: dts: stm32: Add pin map for ltdc, spi5 on stm32f429-disco board

2020-05-08 Thread dillon . minfei
From: dillon min 

This patch adds the pin configuration for ltdc, spi5 controller
on stm32f429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa14..0eb107f 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,73 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+,
+/* LCD_B2 */
+,
+/* LCD_B3*/
+,
+/* LCD_G5 */
+,
+/* LCD_G6 */
+,
+/* LCD_G7 */
+,
+/* LCD_B4 */
+,
+/* LCD_B5 */
+,
+/* LCD_B6 */
+,
+/* LCD_B7 */
+;
+/* LCD_DE */
+   slew-rate = <2>;
+   };
+   };
+
+   spi5_pins: spi5-0 {
+   pins1 {
+   pinmux = ,
+   /* SPI5_CLK */
+;
+   /* SPI5_MOSI */
+   bias-disable;
+   drive-push-pull;
+   slew-rate = <0>;
+   };
+   pins2 {
+   pinmux = ;
+   /* SPI5_MISO */
+   bias-disable;
+   };
+   };
+
dcmi_pins: dcmi-0 {
pins {
pinmux = , 
/* DCMI_HSYNC */
-- 
2.7.4

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[PATCH v2 4/5] clk: stm32: Fix stm32f429 ltdc driver loading hang in clk set rate. keep ltdc clk running after kernel startup

2020-05-08 Thread dillon . minfei
From: dillon min 

as store stm32f4_rcc_register_pll return to the wrong offset of clks,
so ltdc gate clk is null.
need change clks[PLL_VCO_SAI] to clks[PLL_SAI]

add CLK_IGNORE_UNUSED for ltdc to make sure clk not be freed by
clk_disable_unused

Signed-off-by: dillon min 
---
 drivers/clk/clk-stm32f4.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index 18117ce..0ba73de 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -129,7 +129,8 @@ static const struct stm32f4_gate_data stm32f429_gates[] 
__initconst = {
{ STM32F4_RCC_APB2ENR, 20,  "spi5", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 21,  "spi6", "apb2_div" },
{ STM32F4_RCC_APB2ENR, 22,  "sai1", "apb2_div" },
-   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div" },
+   { STM32F4_RCC_APB2ENR, 26,  "ltdc", "apb2_div",
+   CLK_IGNORE_UNUSED },
 };
 
 static const struct stm32f4_gate_data stm32f469_gates[] __initconst = {
@@ -1757,7 +1758,7 @@ static void __init stm32f4_rcc_init(struct device_node 
*np)
clks[PLL_VCO_I2S] = stm32f4_rcc_register_pll("vco_in",
>pll_data[1], _clk_lock);
 
-   clks[PLL_VCO_SAI] = stm32f4_rcc_register_pll("vco_in",
+   clks[PLL_SAI] = stm32f4_rcc_register_pll("vco_in",
>pll_data[2], _clk_lock);
 
for (n = 0; n < MAX_POST_DIV; n++) {
-- 
2.7.4

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[PATCH v2 2/5] ARM: dts: stm32: enable ltdc binding with ili9341 on stm32429-disco board

2020-05-08 Thread dillon . minfei
From: dillon min 

Enable the ltdc & ili9341 on stm32429-disco board.

Signed-off-by: dillon min 
---
 arch/arm/boot/dts/stm32f429-disco.dts | 40 +++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f429-disco.dts 
b/arch/arm/boot/dts/stm32f429-disco.dts
index 30c0f67..2d9637a 100644
--- a/arch/arm/boot/dts/stm32f429-disco.dts
+++ b/arch/arm/boot/dts/stm32f429-disco.dts
@@ -49,6 +49,8 @@
 #include "stm32f429.dtsi"
 #include "stm32f429-pinctrl.dtsi"
 #include 
+#include 
+#include 
 
 / {
model = "STMicroelectronics STM32F429i-DISCO board";
@@ -127,3 +129,41 @@
pinctrl-names = "default";
status = "okay";
 };
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins_f429_disco>;
+   pinctrl-names = "default";
+
+   port {
+   ltdc_out_rgb: endpoint {
+   remote-endpoint = <_in_rgb>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cs-gpios = < 2 GPIO_ACTIVE_LOW>;
+   dmas = < 3 2 0x400 0x0>,
+  < 4 2 0x400 0x0>;
+   dma-names = "rx", "tx";
+   display: display@0{
+   /* Connect panel-ilitek-9341 to ltdc */
+   compatible = "stm32f429,ltdc-panel", "ilitek,ili9341";
+   reg = <0>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in_rgb: endpoint {
+   remote-endpoint = <_out_rgb>;
+   };
+   };
+   };
+};
+
-- 
2.7.4

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[PATCH v2 3/5] dt-bindings: display: panel: Add ilitek ili9341 panel bindings

2020-05-08 Thread dillon . minfei
From: dillon min 

Add documentation for "ilitek,ili9341" panel.

Signed-off-by: dillon min 
---

Hi Rob Herring,

This patch [PATCH V2 3/5] about ilitek,ili9341.yaml was verifyed with make 
dt_binding_check

thanks.

best regards,

dillon,

.../bindings/display/panel/ilitek,ili9341.yaml | 68 ++
 1 file changed, 68 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index 000..94c2b15
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams that get adapted and scaled to the panel.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+items:
+  - const: stm32f429,ltdc-panel
+  - {} # ilitek,ili9341, but not listed here to avoid false select
+
+  reg: true
+
+  dc-gpios:
+maxItems: 1
+description: panel spi dc gpio
+
+  spi-3wire: true
+
+  spi-max-frequency:
+const: 1000
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+  - spi-3wire
+  - spi-max-frequency
+  - port
+
+examples:
+  - |+
+spi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel: display@0 {
+ compatible = "stm32f429,ltdc-panel", "ilitek,ili9341";
+ reg = <0>;
+ spi-3wire;
+ spi-max-frequency = <1000>;
+ dc-gpios = < 13 0>;
+ port {
+ panel_in: endpoint {
+   remote-endpoint = <_out>;
+  };
+ };
+ };
+};
+...
+
-- 
2.7.4

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[PATCH v2 0/5] Enable ilitek ili9341 on stm32f429-disco board

2020-05-08 Thread dillon . minfei
From: dillon min 

This patchset have following changes

V2: verify ilitek,ili9341.yaml with make O=../linux-stm32 dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

V1:
add ili9341 drm panel driver
add ltdc, spi5 controller for stm32f429-disco
add ltdc, spi5 pin map for stm32f429-disco
add docs about ili9341
fix ltdc driver loading hang in clk set rate bug

dillon min (5):
  ARM: dts: stm32: Add pin map for ltdc, spi5 on stm32f429-disco board
  ARM: dts: stm32: enable ltdc binding with ili9341 on stm32429-disco
board
  dt-bindings: display: panel: Add ilitek ili9341 panel bindings
  clk: stm32: Fix stm32f429 ltdc driver loading hang in clk set rate.
keep ltdc clk running after kernel startup
  drm/panel: add panel driver for Ilitek ili9341 panels

 .../bindings/display/panel/ilitek,ili9341.yaml |  68 +++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi |  67 +++
 arch/arm/boot/dts/stm32f429-disco.dts  |  40 ++
 drivers/clk/clk-stm32f4.c  |   5 +-
 drivers/gpu/drm/panel/Kconfig  |   8 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 561 +
 7 files changed, 748 insertions(+), 2 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

-- 
2.7.4

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[PATCH 2/4] dt-bindings: display: Add ilitek-9341 binding

2020-05-06 Thread dillon . minfei
From: dillon min 

add ili9341 for stm32f429-disco board
some hardware resources can be found here
https://www.st.com/zh/evaluation-tools/32f429idiscovery.html

Signed-off-by: dillon min 
---
 .../bindings/display/panel/ilitek,ili9341.yaml | 55 ++
 1 file changed, 55 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
new file mode 100644
index 000..5138f56
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ilitek-9341 Display Panel
+
+maintainers:
+  - Dillon Min 
+
+description: |
+  Ilitek ILI9341 TFT panel driver with SPI control bus
+  This is a driver for 320x240 TFT panels, accepting a rgb input
+  streams that get adapted and scaled to the panel.
+  VCOMH outputs.
+
+properties:
+  compatible:
+items:
+  - const: ilitek,ili9341
+
+  reg:
+maxItems: 1
+
+  data-mapping:
+const: stm32f429-disco,ltdc-panel
+
+  dc-gpios: true
+
+  port: true
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - dc-gpios
+
+examples:
+  - |
+panel: display@0 {
+compatible = "stm32f429-disco,ltdc-panel", "ilitek,ili9341";
+reg = <0>;
+spi-3wire;
+spi-max-frequency = <1000>;
+dc-gpios = < 13 0>;
+port {
+  panel_in: endpoint {
+remote-endpoint = <_out>;
+  };
+};
+};
+...
+
-- 
2.7.4

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[PATCH 3/4] drm/panel: Add Ilitek ILI9341 driver

2020-05-06 Thread dillon . minfei


Add drm panel driver ilitek ili9341 , based on panel/panel-ilitek-ili9322.c
currently just support rgb input only
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[PATCH 3/4] drm/panel: Add Ilitek ILI9341 driver

2020-05-06 Thread dillon . minfei
From: dillon min 

This adds support for the Ilitek ILI9341 QVGA (240x320)
TFT panel driver.

This panel driver supports parallel RGB input.

The controller is combined with a physical panel and
configured through the device tree.

Signed-off-by: dillon min 
---
 drivers/gpu/drm/panel/Kconfig|   8 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 513 +++
 3 files changed, 522 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1..e42692c 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,14 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_IL9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   select REGMAP
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883c..d123543 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_IL9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index 000..e458677
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,513 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#define DEFAULT_SPI_SPEED  1000
+
+#define ILI9341_SLEEP_OUT0x11   /* Sleep out register */
+#define ILI9341_GAMMA0x26   /* Gamma register */
+#define ILI9341_DISPLAY_OFF  0x28   /* Display off register */
+#define ILI9341_DISPLAY_ON   0x29   /* Display on register */
+#define ILI9341_COLUMN_ADDR  0x2A   /* Colomn address register */
+#define ILI9341_PAGE_ADDR0x2B   /* Page address register */
+#define ILI9341_GRAM 0x2C   /* GRAM register */
+#define ILI9341_MAC  0x36   /* Memory Access Control register*/
+#define ILI9341_PIXEL_FORMAT 0x3A   /* Pixel Format register */
+#define ILI9341_WDB  0x51   /* Write Brightness Display
+* register
+*/
+#define ILI9341_WCD  0x53   /* Write Control Display
+* register
+*/
+#define ILI9341_RGB_INTERFACE0xB0   /* RGB Interface Signal Control */
+#define ILI9341_FRC  0xB1   /* Frame Rate Control register */
+#define ILI9341_BPC  0xB5   /* Blanking Porch Control
+* register
+*/
+#define ILI9341_DFC  0xB6   /* Display Function Control
+* register
+*/
+#define ILI9341_POWER1   0xC0   /* Power Control 1 register */
+#define ILI9341_POWER2   0xC1   /* Power Control 2 register */
+#define ILI9341_VCOM10xC5   /* VCOM Control 1 register */
+#define ILI9341_VCOM20xC7   /* VCOM Control 2 register */
+#define ILI9341_POWERA   0xCB   /* Power control A register */
+#define ILI9341_POWERB   0xCF   /* Power control B register */
+#define ILI9341_PGAMMA   0xE0   /* Positive Gamma Correction
+* register
+*/
+#define ILI9341_NGAMMA   0xE1   /* Negative Gamma Correction
+* 

[PATCH 2/4] dt-bindings: display: Add ilitek-9341 binding

2020-05-06 Thread dillon . minfei


Add document for ilitek 9341 binding to stm32f429-disco board
some hardware resource can be found here,
https://www.st.com/zh/evaluation-tools/32f429idiscovery.html
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[PATCH 3/4] add drm panel ilitek 9341 driver

2020-05-01 Thread dillon . minfei
From: dillon min 

Signed-off-by: dillon min 
---
 drivers/gpu/drm/panel/Kconfig|   8 +
 drivers/gpu/drm/panel/Makefile   |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 555 +++
 3 files changed, 564 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1..e42692c 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -95,6 +95,14 @@ config DRM_PANEL_ILITEK_IL9322
  Say Y here if you want to enable support for Ilitek IL9322
  QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
 
+config DRM_PANEL_ILITEK_IL9341
+   tristate "Ilitek ILI9341 240x320 QVGA panels"
+   depends on OF && SPI
+   select REGMAP
+   help
+ Say Y here if you want to enable support for Ilitek IL9341
+ QVGA (240x320) RGB panels.
+
 config DRM_PANEL_ILITEK_ILI9881C
tristate "Ilitek ILI9881C-based panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883c..d123543 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
 obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += 
panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_IL9341) += panel-ilitek-ili9341.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
 obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c 
b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
new file mode 100644
index 000..dafae89
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c
@@ -0,0 +1,555 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Ilitek ILI9341 TFT LCD drm_panel driver.
+ *
+ * This panel can be configured to support:
+ * - 16-bit parallel RGB interface
+ *
+ * Copyright (C) 2020 Dillon Min 
+ * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#define DEFAULT_SPI_SPEED  1000
+
+#define ILI9341_SLEEP_OUT0x11   /* Sleep out register */
+#define ILI9341_GAMMA0x26   /* Gamma register */
+#define ILI9341_DISPLAY_OFF  0x28   /* Display off register */
+#define ILI9341_DISPLAY_ON   0x29   /* Display on register */
+#define ILI9341_COLUMN_ADDR  0x2A   /* Colomn address register */
+#define ILI9341_PAGE_ADDR0x2B   /* Page address register */
+#define ILI9341_GRAM 0x2C   /* GRAM register */
+#define ILI9341_MAC  0x36   /* Memory Access Control register*/
+#define ILI9341_PIXEL_FORMAT 0x3A   /* Pixel Format register */
+#define ILI9341_WDB  0x51   /* Write Brightness Display
+  register */
+#define ILI9341_WCD  0x53   /* Write Control Display
+  register*/
+#define ILI9341_RGB_INTERFACE0xB0   /* RGB Interface Signal Control */
+#define ILI9341_FRC  0xB1   /* Frame Rate Control register */
+#define ILI9341_BPC  0xB5   /* Blanking Porch Control
+   register*/
+#define ILI9341_DFC  0xB6   /* Display Function Control
+   register*/
+#define ILI9341_POWER1   0xC0   /* Power Control 1 register */
+#define ILI9341_POWER2   0xC1   /* Power Control 2 register */
+#define ILI9341_VCOM10xC5   /* VCOM Control 1 register */
+#define ILI9341_VCOM20xC7   /* VCOM Control 2 register */
+#define ILI9341_POWERA   0xCB   /* Power control A register */
+#define ILI9341_POWERB   0xCF   /* Power control B register */
+#define ILI9341_PGAMMA   0xE0   /* Positive Gamma Correction
+   register*/
+#define ILI9341_NGAMMA   0xE1   /* Negative Gamma Correction
+   register*/
+#define ILI9341_DTCA 0xE8   /* Driver timing control A */
+#define ILI9341_DTCB 0xEA   /* Driver timing control B */
+#define ILI9341_POWER_SEQ0xED   /* Power on sequence register */
+#define ILI9341_3GAMMA_EN0xF2   /* 3 Gamma enable register */
+#define ILI9341_INTERFACE0xF6   /* Interface control register */
+#define ILI9341_PRC  0xF7  

[PATCH] add drm panel driver for stm32f429-dicovery board the change details:

2020-05-01 Thread dillon . minfei
From: dillon min 

1) add support drm ili9341 panel driver connect to ltdc

2) add i2c3/spi5 ltdc pins dts configuration for gyro/stmpe

3) add SPI_SIMPLEX_RX/SPI_3WIRE_RX in spi-stm32f4.c
   for SPI_SIMPLEX_RX , as we running kernel in sdram, so
   that the performance is not as good as internal flash,
   need add send dummy data out while in rx,
   otherwise will get many overrun errors.

4) fix hang bugs durning ltdc driver load , in clk-stm32f4.c
   store clk_hw to the wrong offset PLL_VCO_SAI, PLL_VCO_I2S

5) add CLK_IGNORE_UNUSED for ltdc, otherwise system will close
   ltdc clk

===

Signed-off-by: dillon min 
---
 .../bindings/display/panel/ilitek,ili9341.txt  |  43 ++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi |  79 +++
 arch/arm/boot/dts/stm32f429-disco.dts  |  88 
 arch/arm/boot/dts/stm32f429.dtsi   |  12 +
 drivers/clk/clk-stm32f4.c  |   7 +-
 drivers/gpu/drm/panel/Kconfig  |   8 +
 drivers/gpu/drm/panel/Makefile |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9341.c   | 561 +
 drivers/spi/spi-stm32.c|  26 +-
 9 files changed, 818 insertions(+), 7 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c

diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt
new file mode 100644
index 000..a03825f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt
@@ -0,0 +1,43 @@
+Ilitek ILI9341 TFT panel driver with SPI control bus
+
+This is a driver for 320x240 TFT panels, accepting a rgb input
+streams that get adapted and scaled to the panel.
+VCOMH outputs.
+
+Required properties:
+  - compatible: "stm32f429-disco,ltdc-panel", "ilitek,ili9341"
+(full system-specific compatible is always required to look up 
configuration)
+  - reg: address of the panel on the SPI bus
+
+Optional properties:
+  - reset-gpios: a GPIO spec for the reset pin, see gpio/gpio.txt
+  - dc-gpios: a GPIO spec for the dc pin, see gpio/gpio.txt
+
+  The following optional properties only apply to RGB input mode:
+
+  - pixelclk-active: see display/panel/display-timing.txt
+  - de-active: see display/panel/display-timing.txt
+  - hsync-active: see display/panel/display-timing.txt
+  - vsync-active: see display/panel/display-timing.txt
+
+The panel must obey the rules for a SPI slave device as specified in
+spi/spi-bus.txt
+
+The device node can contain one 'port' child node with one child
+'endpoint' node, according to the bindings defined in
+media/video-interfaces.txt. This node should describe panel's video bus.
+
+Example:
+
+panel: display@0 {
+   compatible = "stm32f429-disco,ltdc-panel", "ilitek,ili9341";
+   reg = <0>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+};
diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa14..45b68f4 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,85 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+

[PATCH 1/4] add dts node for drm panel driver ili9341 add dts i2c3 for stmpe touch add dts spi5 for gyro & ili9341

2020-05-01 Thread dillon . minfei
From: dillon min 

Signed-off-by: dillon min 
---
 .../bindings/display/panel/ilitek,ili9341.txt  | 42 +++
 arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 79 +++
 arch/arm/boot/dts/stm32f429-disco.dts  | 88 ++
 arch/arm/boot/dts/stm32f429.dtsi   | 12 +++
 4 files changed, 221 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt

diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt 
b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt
new file mode 100644
index 000..f5a4e55
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.txt
@@ -0,0 +1,42 @@
+Ilitek ILI9341 TFT panel driver with SPI control bus
+
+This is a driver for 240x320 TFT panels, accepting a rgb input
+streams that get adapted and scaled to the panel.
+
+Required properties:
+  - compatible: "stm32f429-disco,ltdc-panel", "ilitek,ili9341"
+(full system-specific compatible is always required to look up 
configuration)
+  - reg: address of the panel on the SPI bus
+
+Optional properties:
+  - reset-gpios: a GPIO spec for the reset pin, see gpio/gpio.txt
+  - dc-gpios: a GPIO spec for the dc pin, see gpio/gpio.txt
+
+  The following optional properties only apply to RGB input mode:
+
+  - pixelclk-active: see display/panel/display-timing.txt
+  - de-active: see display/panel/display-timing.txt
+  - hsync-active: see display/panel/display-timing.txt
+  - vsync-active: see display/panel/display-timing.txt
+
+The panel must obey the rules for a SPI slave device as specified in
+spi/spi-bus.txt
+
+The device node can contain one 'port' child node with one child
+'endpoint' node, according to the bindings defined in
+media/video-interfaces.txt. This node should describe panel's video bus.
+
+Example:
+
+panel: display@0 {
+   compatible = "stm32f429-disco,ltdc-panel", "ilitek,ili9341";
+   reg = <0>;
+   spi-3wire;
+   spi-max-frequency = <1000>;
+   dc-gpios = < 13 0>;
+   port {
+   panel_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+};
diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 392fa14..45b68f4 100644
--- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
@@ -316,6 +316,85 @@
};
};
 
+   ltdc_pins_f429_disco: ltdc-1 {
+   pins {
+   pinmux = ,
+   /* LCD_HSYNC */
+,
+/* LCD_VSYNC */
+,
+/* LCD_CLK */
+,
+/* LCD_R2 */
+,
+/* LCD_R3 */
+,
+/* LCD_R4 */
+,
+/* LCD_R5 */
+,
+/* LCD_R6*/
+,
+/* LCD_R7 */
+,
+/* LCD_G2 */
+,
+/* LCD_G3 */
+,
+/* LCD_G4 */
+,
+/* LCD_B2 */
+,
+/* LCD_B3*/
+,
+/* LCD_G5 */
+,
+/* LCD_G6 */
+,
+/* LCD_G7 */
+,
+/* LCD_B4 */
+,
+/* LCD_B5 */
+,
+/* LCD_B6 */
+,
+/* LCD_B7 */
+