Bus scale config related dt-bindings are removed.
Add bus_scale config in driver instead.
Signed-off-by: Rajesh Yadav <rya...@codeaurora.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 254 +++++++++++++++--------
1 file changed, 167 insertions(+), 87 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
index bdf18de..24c3274 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
@@ -20,15 +20,137 @@
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/of_platform.h>
-#ifdef CONFIG_QCOM_BUS_SCALING
-#include <linux/msm-bus.h>
-#include <linux/msm-bus-board.h>
-#endif
#include <linux/dpu_io_util.h>
#include "dpu_power_handle.h"
#include "dpu_trace.h"
+#ifdef CONFIG_QCOM_BUS_SCALING
+#include <linux/msm-bus.h>
+#include <linux/msm-bus-board.h>
+
+#define DPU_BUS_VECTOR_ENTRY(src_val, dst_val, ab_val, ib_val) \
+ { \
+ .src = src_val, \
+ .dst = dst_val, \
+ .ab = (ab_val), \
+ .ib = (ib_val), \
+ }
+
+static struct msm_bus_vectors dpu_reg_bus_vectors[] = {
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST,
+ MSM_BUS_SLAVE_DISPLAY_CFG, 0, 0),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST,
+ MSM_BUS_SLAVE_DISPLAY_CFG, 0, 76800000),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST,
+ MSM_BUS_SLAVE_DISPLAY_CFG, 0, 150000000),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST,
+ MSM_BUS_SLAVE_DISPLAY_CFG, 0, 300000000),
+};
+
+static struct msm_bus_paths dpu_reg_bus_usecases[] = { {
+ .num_paths = 1,
+ .vectors = &dpu_reg_bus_vectors[0],
+}, {
+ .num_paths = 1,
+ .vectors = &dpu_reg_bus_vectors[1],
+}, {
+ .num_paths = 1,
+ .vectors = &dpu_reg_bus_vectors[2],
+}, {
+ .num_paths = 1,
+ .vectors = &dpu_reg_bus_vectors[3],
+} };
+
+static struct msm_bus_scale_pdata dpu_reg_bus_scale_table = {
+ .usecase = dpu_reg_bus_usecases,
+ .num_usecases = ARRAY_SIZE(dpu_reg_bus_usecases),
+ .name = "mdss_reg",
+};
+
+static struct msm_bus_vectors dpu_data_bus_vectors[] = {
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0,
+ MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 0),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1,
+ MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 0),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0,
+ MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1,
+ MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0,
+ MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1,
+ MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000),
+};
+
+static struct msm_bus_paths dpu_data_bus_usecases[] = { {
+ .num_paths = 2,
+ .vectors = &dpu_data_bus_vectors[0],
+}, {
+ .num_paths = 2,
+ .vectors = &dpu_data_bus_vectors[2],
+}, {
+ .num_paths = 2,
+ .vectors = &dpu_data_bus_vectors[4],
+} };
+
+static struct msm_bus_scale_pdata dpu_data_bus_scale_table = {
+ .usecase = dpu_data_bus_usecases,
+ .num_usecases = ARRAY_SIZE(dpu_data_bus_usecases),
+ .name = "mdss_mnoc",
+};
+
+static struct msm_bus_vectors dpu_llcc_bus_vectors[] = {
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC,
+ MSM_BUS_SLAVE_LLCC, 0, 0),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC,
+ MSM_BUS_SLAVE_LLCC, 0, 6400000000),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC,
+ MSM_BUS_SLAVE_LLCC, 0, 6400000000),
+};
+
+static struct msm_bus_paths dpu_llcc_bus_usecases[] = { {
+ .num_paths = 1,
+ .vectors = &dpu_llcc_bus_vectors[0],
+}, {
+ .num_paths = 1,
+ .vectors = &dpu_llcc_bus_vectors[1],
+}, {
+ .num_paths = 1,
+ .vectors = &dpu_llcc_bus_vectors[2],
+} };
+static struct msm_bus_scale_pdata dpu_llcc_bus_scale_table = {
+ .usecase = dpu_llcc_bus_usecases,
+ .num_usecases = ARRAY_SIZE(dpu_llcc_bus_usecases),
+ .name = "mdss_llcc",
+};
+
+static struct msm_bus_vectors dpu_ebi_bus_vectors[] = {
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC,
+ MSM_BUS_SLAVE_EBI_CH0, 0, 0),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC,
+ MSM_BUS_SLAVE_EBI_CH0, 0, 6400000000),
+ DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC,
+ MSM_BUS_SLAVE_EBI_CH0, 0, 6400000000),
+};
+
+static struct msm_bus_paths dpu_ebi_bus_usecases[] = { {
+ .num_paths = 1,
+ .vectors = &dpu_ebi_bus_vectors[0],
+}, {
+ .num_paths = 1,
+ .vectors = &dpu_ebi_bus_vectors[1],
+}, {
+ .num_paths = 1,
+ .vectors = &dpu_ebi_bus_vectors[2],
+} };
+static struct msm_bus_scale_pdata dpu_ebi_bus_scale_table = {
+ .usecase = dpu_ebi_bus_usecases,
+ .num_usecases = ARRAY_SIZE(dpu_ebi_bus_usecases),
+ .name = "mdss_ebi",
+};
+#endif
+
static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX] = {
[DPU_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,dpu-data-bus",
[DPU_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,dpu-llcc-bus",
@@ -276,93 +398,54 @@ static void dpu_power_data_bus_unregister(
}
}
-static int dpu_power_data_bus_parse(struct platform_device *pdev,
- struct dpu_power_data_bus_handle *pdbus, const char *name)
+static int dpu_power_data_bus_register(struct dpu_power_handle *phandle,
+ int index)
{
- struct device_node *node;
- int rc = 0;
- int paths;
-
- pdbus->bus_channels = 1;
- rc = of_property_read_u32(pdev->dev.of_node,
- "qcom,dpu-dram-channels", &pdbus->bus_channels);
- if (rc) {
- pr_debug("number of channels property not specified\n");
- rc = 0;
- }
+ struct dpu_power_data_bus_handle *pdbus =
&phandle->data_bus_handle[index];
+ pdbus->bus_channels = 2;
pdbus->nrt_axi_port_cnt = 0;
- rc = of_property_read_u32(pdev->dev.of_node,
- "qcom,dpu-num-nrt-paths",
- &pdbus->nrt_axi_port_cnt);
- if (rc) {
- pr_debug("number of axi port property not specified\n");
- rc = 0;
+ pdbus->axi_port_cnt = 1;
+
+ switch (index) {
+ case DPU_POWER_HANDLE_DBUS_ID_MNOC:
+ pdbus->data_bus_scale_table = &dpu_data_bus_scale_table;
+ pdbus->axi_port_cnt = 2;
+ break;
+ case DPU_POWER_HANDLE_DBUS_ID_LLCC:
+ pdbus->data_bus_scale_table = &dpu_llcc_bus_scale_table;
+ break;
+ case DPU_POWER_HANDLE_DBUS_ID_EBI:
+ pdbus->data_bus_scale_table = &dpu_ebi_bus_scale_table;
+ break;
+ default:
+ pr_err("invalid data_bus type: %d", index);
+ return -EINVAL;
}
- node = of_get_child_by_name(pdev->dev.of_node, name);
- if (node) {
- rc = of_property_read_u32(node,
- "qcom,msm-bus,num-paths", &paths);
- if (rc) {
- pr_err("Error. qcom,msm-bus,num-paths not found\n");
- return rc;
- }
- pdbus->axi_port_cnt = paths;
-
- pdbus->data_bus_scale_table =
- msm_bus_pdata_from_node(pdev, node);
- if (IS_ERR_OR_NULL(pdbus->data_bus_scale_table)) {
- pr_err("reg bus handle parsing failed\n");
- rc = PTR_ERR(pdbus->data_bus_scale_table);
- if (!pdbus->data_bus_scale_table)
- rc = -EINVAL;
- goto end;
- }
- pdbus->data_bus_hdl = msm_bus_scale_register_client(
- pdbus->data_bus_scale_table);
- if (!pdbus->data_bus_hdl) {
- pr_err("data_bus_client register failed\n");
- rc = -EINVAL;
- goto end;
- }
- pr_debug("register %s data_bus_hdl=%x\n", name,
- pdbus->data_bus_hdl);
+ pdbus->data_bus_hdl = msm_bus_scale_register_client(
+ pdbus->data_bus_scale_table);
+ if (!pdbus->data_bus_hdl) {
+ pr_err("data_bus_client register failed\n");
+ return -EINVAL;
}
+ pr_debug("register %s data_bus_hdl=%x\n", data_bus_name[index],
+ pdbus->data_bus_hdl);
-end:
- return rc;
+ return 0;
}
-static int dpu_power_reg_bus_parse(struct platform_device *pdev,
- struct dpu_power_handle *phandle)
+static int dpu_power_reg_bus_register(struct dpu_power_handle *phandle)
{
- struct device_node *node;
- struct msm_bus_scale_pdata *bus_scale_table;
- int rc = 0;
-
- node = of_get_child_by_name(pdev->dev.of_node, "qcom,dpu-reg-bus");
- if (node) {
- bus_scale_table = msm_bus_pdata_from_node(pdev, node);
- if (IS_ERR_OR_NULL(bus_scale_table)) {
- pr_err("reg bus handle parsing failed\n");
- rc = PTR_ERR(bus_scale_table);
- if (!bus_scale_table)
- rc = -EINVAL;
- goto end;
- }
- phandle->reg_bus_hdl = msm_bus_scale_register_client(
- bus_scale_table);
- if (!phandle->reg_bus_hdl) {
- pr_err("reg_bus_client register failed\n");
- rc = -EINVAL;
- goto end;
- }
- pr_debug("register reg_bus_hdl=%x\n", phandle->reg_bus_hdl);
+ phandle->reg_bus_hdl = msm_bus_scale_register_client(
+ &dpu_reg_bus_scale_table);
+ if (!phandle->reg_bus_hdl) {
+ pr_err("reg_bus_client register failed\n");
+ return -EINVAL;
}
+ pr_debug("register reg_bus_hdl=%x\n", phandle->reg_bus_hdl);
-end:
- return rc;
+ return 0;
}
static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl)
@@ -419,8 +502,8 @@ static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32
usecase_ndx)
return rc;
}
#else
-static int dpu_power_data_bus_parse(struct platform_device *pdev,
- struct dpu_power_data_bus_handle *pdbus, const char *name)
+static int dpu_power_data_bus_register(struct dpu_power_handle *phandle,
+ int index)
{
return 0;
}
@@ -438,8 +521,7 @@ int dpu_power_data_bus_set_quota(struct dpu_power_handle
*phandle,
return 0;
}
-static int dpu_power_reg_bus_parse(struct platform_device *pdev,
- struct dpu_power_handle *phandle)
+static int dpu_power_reg_bus_register(struct dpu_power_handle *phandle)
{
return 0;
}
@@ -473,7 +555,7 @@ int dpu_power_resource_init(struct platform_device *pdev,
phandle->dev = &pdev->dev;
- rc = dpu_power_reg_bus_parse(pdev, phandle);
+ rc = dpu_power_reg_bus_register(phandle);
if (rc) {
pr_err("register bus parse failed rc=%d\n", rc);
return rc;
@@ -481,9 +563,7 @@ int dpu_power_resource_init(struct platform_device *pdev,
for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC;
i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) {
- rc = dpu_power_data_bus_parse(pdev,
- &phandle->data_bus_handle[i],
- data_bus_name[i]);
+ rc = dpu_power_data_bus_register(phandle, i);
if (rc) {
pr_err("register data bus parse failed id=%d rc=%d\n",
i, rc);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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