Patch "drm/dp: Fix off-by-one in register cache size" has been added to the 5.17-stable tree
This is a note to let you know that I've just added the patch titled
drm/dp: Fix off-by-one in register cache size
to the 5.17-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-dp-fix-off-by-one-in-register-cache-size.patch
and it can be found in the queue-5.17 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let know about it.
>From d4da1f27396fb1dde079447a3612f4f512caed07 Mon Sep 17 00:00:00 2001
From: Kees Cook
Date: Thu, 24 Feb 2022 19:56:09 -0800
Subject: drm/dp: Fix off-by-one in register cache size
From: Kees Cook
commit d4da1f27396fb1dde079447a3612f4f512caed07 upstream.
The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the
math to calculate the max size. Found from a -Warray-bounds build:
drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr':
drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside
array bounds of 'const u8[12]' {aka 'const unsigned char[12]'}
[-Werror=array-bounds]
3130 | buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER];
| ~^~~~
drivers/gpu/drm/drm_dp_helper.c:3126:39: note: while referencing 'pcon_dsc_dpcd'
3126 | int drm_dp_pcon_dsc_bpp_incr(const u8
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
|
~^~~
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: dri-devel@lists.freedesktop.org
Fixes: e2e16da398d9 ("drm/dp_helper: Add support for Configuring DSC for
HDMI2.1 Pcon")
Cc: sta...@vger.kernel.org
Reviewed-by: Gustavo A. R. Silva
Link: https://lore.kernel.org/lkml/20211214001849.GA62559@embeddedor/
Signed-off-by: Kees Cook
Link: https://lore.kernel.org/r/20220105173310.2420598-1-keesc...@chromium.org
Signed-off-by: Thierry Reding
Link:
https://patchwork.freedesktop.org/patch/msgid/20220225035610.2552144-2-keesc...@chromium.org
Signed-off-by: Greg Kroah-Hartman
---
include/drm/drm_dp_helper.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -456,7 +456,7 @@ struct drm_panel;
#define DP_FEC_CAPABILITY_10x091 /* 2.0 */
/* DP-HDMI2.1 PCON DSC ENCODER SUPPORT */
-#define DP_PCON_DSC_ENCODER_CAP_SIZE0xC/* 0x9E - 0x92 */
+#define DP_PCON_DSC_ENCODER_CAP_SIZE0xD/* 0x92 through 0x9E */
#define DP_PCON_DSC_ENCODER 0x092
# define DP_PCON_DSC_ENCODER_SUPPORTED (1 << 0)
# define DP_PCON_DSC_PPS_ENC_OVERRIDE (1 << 1)
Patches currently in stable-queue which might be from keesc...@chromium.org are
queue-5.17/stack-constrain-and-fix-stack-offset-randomization-w.patch
queue-5.17/coredump-also-dump-first-pages-of-non-executable-elf-libraries.patch
queue-5.17/selftests-lkdtm-add-ubsan-config.patch
queue-5.17/fs-binfmt_elf-fix-at_phdr-for-unusual-elf-files.patch
queue-5.17/media-omap3isp-use-struct_group-for-memcpy-region.patch
queue-5.17/gcc-plugins-stackleak-exactly-match-strings-instead-.patch
queue-5.17/exec-force-single-empty-string-when-argv-is-empty.patch
queue-5.17/drm-dp-fix-off-by-one-in-register-cache-size.patch
queue-5.17/pstore-don-t-use-semaphores-in-always-atomic-context-code.patch
queue-5.17/drm-dp-fix-oob-read-when-handling-post-cursor2-regis.patch
Patch "drm/dp: Fix off-by-one in register cache size" has been added to the 5.16-stable tree
This is a note to let you know that I've just added the patch titled
drm/dp: Fix off-by-one in register cache size
to the 5.16-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-dp-fix-off-by-one-in-register-cache-size.patch
and it can be found in the queue-5.16 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let know about it.
>From d4da1f27396fb1dde079447a3612f4f512caed07 Mon Sep 17 00:00:00 2001
From: Kees Cook
Date: Thu, 24 Feb 2022 19:56:09 -0800
Subject: drm/dp: Fix off-by-one in register cache size
From: Kees Cook
commit d4da1f27396fb1dde079447a3612f4f512caed07 upstream.
The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the
math to calculate the max size. Found from a -Warray-bounds build:
drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr':
drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside
array bounds of 'const u8[12]' {aka 'const unsigned char[12]'}
[-Werror=array-bounds]
3130 | buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER];
| ~^~~~
drivers/gpu/drm/drm_dp_helper.c:3126:39: note: while referencing 'pcon_dsc_dpcd'
3126 | int drm_dp_pcon_dsc_bpp_incr(const u8
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
|
~^~~
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: dri-devel@lists.freedesktop.org
Fixes: e2e16da398d9 ("drm/dp_helper: Add support for Configuring DSC for
HDMI2.1 Pcon")
Cc: sta...@vger.kernel.org
Reviewed-by: Gustavo A. R. Silva
Link: https://lore.kernel.org/lkml/20211214001849.GA62559@embeddedor/
Signed-off-by: Kees Cook
Link: https://lore.kernel.org/r/20220105173310.2420598-1-keesc...@chromium.org
Signed-off-by: Thierry Reding
Link:
https://patchwork.freedesktop.org/patch/msgid/20220225035610.2552144-2-keesc...@chromium.org
Signed-off-by: Greg Kroah-Hartman
---
include/drm/drm_dp_helper.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -456,7 +456,7 @@ struct drm_panel;
#define DP_FEC_CAPABILITY_10x091 /* 2.0 */
/* DP-HDMI2.1 PCON DSC ENCODER SUPPORT */
-#define DP_PCON_DSC_ENCODER_CAP_SIZE0xC/* 0x9E - 0x92 */
+#define DP_PCON_DSC_ENCODER_CAP_SIZE0xD/* 0x92 through 0x9E */
#define DP_PCON_DSC_ENCODER 0x092
# define DP_PCON_DSC_ENCODER_SUPPORTED (1 << 0)
# define DP_PCON_DSC_PPS_ENC_OVERRIDE (1 << 1)
Patches currently in stable-queue which might be from keesc...@chromium.org are
queue-5.16/stack-constrain-and-fix-stack-offset-randomization-w.patch
queue-5.16/coredump-also-dump-first-pages-of-non-executable-elf-libraries.patch
queue-5.16/selftests-lkdtm-add-ubsan-config.patch
queue-5.16/fs-binfmt_elf-fix-at_phdr-for-unusual-elf-files.patch
queue-5.16/media-omap3isp-use-struct_group-for-memcpy-region.patch
queue-5.16/gcc-plugins-stackleak-exactly-match-strings-instead-.patch
queue-5.16/exec-force-single-empty-string-when-argv-is-empty.patch
queue-5.16/drm-dp-fix-off-by-one-in-register-cache-size.patch
queue-5.16/pstore-don-t-use-semaphores-in-always-atomic-context-code.patch
Patch "drm/dp: Fix off-by-one in register cache size" has been added to the 5.15-stable tree
This is a note to let you know that I've just added the patch titled
drm/dp: Fix off-by-one in register cache size
to the 5.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-dp-fix-off-by-one-in-register-cache-size.patch
and it can be found in the queue-5.15 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let know about it.
>From d4da1f27396fb1dde079447a3612f4f512caed07 Mon Sep 17 00:00:00 2001
From: Kees Cook
Date: Thu, 24 Feb 2022 19:56:09 -0800
Subject: drm/dp: Fix off-by-one in register cache size
From: Kees Cook
commit d4da1f27396fb1dde079447a3612f4f512caed07 upstream.
The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the
math to calculate the max size. Found from a -Warray-bounds build:
drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr':
drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside
array bounds of 'const u8[12]' {aka 'const unsigned char[12]'}
[-Werror=array-bounds]
3130 | buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER];
| ~^~~~
drivers/gpu/drm/drm_dp_helper.c:3126:39: note: while referencing 'pcon_dsc_dpcd'
3126 | int drm_dp_pcon_dsc_bpp_incr(const u8
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
|
~^~~
Cc: Daniel Vetter
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: dri-devel@lists.freedesktop.org
Fixes: e2e16da398d9 ("drm/dp_helper: Add support for Configuring DSC for
HDMI2.1 Pcon")
Cc: sta...@vger.kernel.org
Reviewed-by: Gustavo A. R. Silva
Link: https://lore.kernel.org/lkml/20211214001849.GA62559@embeddedor/
Signed-off-by: Kees Cook
Link: https://lore.kernel.org/r/20220105173310.2420598-1-keesc...@chromium.org
Signed-off-by: Thierry Reding
Link:
https://patchwork.freedesktop.org/patch/msgid/20220225035610.2552144-2-keesc...@chromium.org
Signed-off-by: Greg Kroah-Hartman
---
include/drm/drm_dp_helper.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -455,7 +455,7 @@ struct drm_panel;
# define DP_FEC_BIT_ERROR_COUNT_CAP(1 << 3)
/* DP-HDMI2.1 PCON DSC ENCODER SUPPORT */
-#define DP_PCON_DSC_ENCODER_CAP_SIZE0xC/* 0x9E - 0x92 */
+#define DP_PCON_DSC_ENCODER_CAP_SIZE0xD/* 0x92 through 0x9E */
#define DP_PCON_DSC_ENCODER 0x092
# define DP_PCON_DSC_ENCODER_SUPPORTED (1 << 0)
# define DP_PCON_DSC_PPS_ENC_OVERRIDE (1 << 1)
Patches currently in stable-queue which might be from keesc...@chromium.org are
queue-5.15/stack-constrain-and-fix-stack-offset-randomization-w.patch
queue-5.15/coredump-also-dump-first-pages-of-non-executable-elf-libraries.patch
queue-5.15/selftests-lkdtm-add-ubsan-config.patch
queue-5.15/fs-binfmt_elf-fix-at_phdr-for-unusual-elf-files.patch
queue-5.15/gcc-plugins-stackleak-exactly-match-strings-instead-.patch
queue-5.15/exec-force-single-empty-string-when-argv-is-empty.patch
queue-5.15/drm-dp-fix-off-by-one-in-register-cache-size.patch
queue-5.15/pstore-don-t-use-semaphores-in-always-atomic-context-code.patch
Re: [PATCH] drm/dp: Fix off-by-one in register cache size
On Mon, Dec 13, 2021 at 06:18:49PM -0600, Gustavo A. R. Silva wrote:
> On Fri, Dec 03, 2021 at 12:43:33AM -0800, Kees Cook wrote:
> > The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the
> > math to calculate the max size. Found from a -Warray-bounds build:
> >
> > drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr':
> > drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is
> > outside array bounds of 'const u8[12]' {aka 'const unsigned char[12]'}
> > [-Werror=array-bounds]
> > 3130 | buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR -
> > DP_PCON_DSC_ENCODER];
> > |
> > ~^~~~
> > drivers/gpu/drm/drm_dp_helper.c:3126:39: note: while referencing
> > 'pcon_dsc_dpcd'
> > 3126 | int drm_dp_pcon_dsc_bpp_incr(const u8
> > pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
> > |
> > ~^~~
> >
> > Fixes: e2e16da398d9 ("drm/dp_helper: Add support for Configuring DSC for
> > HDMI2.1 Pcon")
>
> This should be tagged for -stable:
>
> Cc: sta...@vger.kernel.org
Ah yes, thank you! :)
--
Kees Cook
Re: [PATCH] drm/dp: Fix off-by-one in register cache size
On Fri, Dec 03, 2021 at 12:43:33AM -0800, Kees Cook wrote:
> The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the
> math to calculate the max size. Found from a -Warray-bounds build:
>
> drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr':
> drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside
> array bounds of 'const u8[12]' {aka 'const unsigned char[12]'}
> [-Werror=array-bounds]
> 3130 | buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR -
> DP_PCON_DSC_ENCODER];
> |
> ~^~~~
> drivers/gpu/drm/drm_dp_helper.c:3126:39: note: while referencing
> 'pcon_dsc_dpcd'
> 3126 | int drm_dp_pcon_dsc_bpp_incr(const u8
> pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
> |
> ~^~~
>
> Fixes: e2e16da398d9 ("drm/dp_helper: Add support for Configuring DSC for
> HDMI2.1 Pcon")
This should be tagged for -stable:
Cc: sta...@vger.kernel.org
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Thomas Zimmermann
> Cc: David Airlie
> Cc: Daniel Vetter
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Kees Cook
Reviewed-by: Gustavo A. R. Silva
Thanks
--
Gustavo
> ---
> include/drm/drm_dp_helper.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 30359e434c3f..472dac376284 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -456,7 +456,7 @@ struct drm_panel;
> #define DP_FEC_CAPABILITY_1 0x091 /* 2.0 */
>
> /* DP-HDMI2.1 PCON DSC ENCODER SUPPORT */
> -#define DP_PCON_DSC_ENCODER_CAP_SIZE0xC /* 0x9E - 0x92 */
> +#define DP_PCON_DSC_ENCODER_CAP_SIZE0xD /* 0x92 through 0x9E */
> #define DP_PCON_DSC_ENCODER 0x092
> # define DP_PCON_DSC_ENCODER_SUPPORTED (1 << 0)
> # define DP_PCON_DSC_PPS_ENC_OVERRIDE (1 << 1)
> --
> 2.30.2
>
[PATCH] drm/dp: Fix off-by-one in register cache size
The pcon_dsc_dpcd array holds 13 registers (0x92 through 0x9E). Fix the
math to calculate the max size. Found from a -Warray-bounds build:
drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_pcon_dsc_bpp_incr':
drivers/gpu/drm/drm_dp_helper.c:3130:28: error: array subscript 12 is outside
array bounds of 'const u8[12]' {aka 'const unsigned char[12]'}
[-Werror=array-bounds]
3130 | buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER];
| ~^~~~
drivers/gpu/drm/drm_dp_helper.c:3126:39: note: while referencing 'pcon_dsc_dpcd'
3126 | int drm_dp_pcon_dsc_bpp_incr(const u8
pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE])
|
~^~~
Fixes: e2e16da398d9 ("drm/dp_helper: Add support for Configuring DSC for
HDMI2.1 Pcon")
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc: David Airlie
Cc: Daniel Vetter
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Kees Cook
---
include/drm/drm_dp_helper.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 30359e434c3f..472dac376284 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -456,7 +456,7 @@ struct drm_panel;
#define DP_FEC_CAPABILITY_10x091 /* 2.0 */
/* DP-HDMI2.1 PCON DSC ENCODER SUPPORT */
-#define DP_PCON_DSC_ENCODER_CAP_SIZE0xC/* 0x9E - 0x92 */
+#define DP_PCON_DSC_ENCODER_CAP_SIZE0xD/* 0x92 through 0x9E */
#define DP_PCON_DSC_ENCODER 0x092
# define DP_PCON_DSC_ENCODER_SUPPORTED (1 << 0)
# define DP_PCON_DSC_PPS_ENC_OVERRIDE (1 << 1)
--
2.30.2
