Re: [PATCH] drm/mgag200: Don't set in MISC

2020-06-18 Thread Thomas Zimmermann
Hi

Am 18.06.20 um 03:40 schrieb Rong Chen:
> 
> 
> On 6/17/20 8:29 PM, Thomas Zimmermann wrote:
>> Hi
>>
>> Am 17.06.20 um 11:22 schrieb Rong Chen:
>>> On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:
 Hi Emil

 Am 16.06.20 um 17:14 schrieb Emil Velikov:
> Hi Thomas,
>
> On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann
>  wrote:
>> The original modesetting code set MISC to 0x2d, which is ,
>>  and 
>>
>> With the conversion to atomic modesetting,  accidentally
>> got enabled as well. Revert this change and initialize MISC with a
>> constant value of  and . The  bits are set
>> in mga_crtc_set_plls(), sync flags are set in
>> mgag200_set_mode_regs().
>>
> Let's keep the remove (restoring original functionality) and rename
> (cosmetics) separate patches. The read has also disappeared, which
> should be safe although might be better on it's own.
 I'm waiting for Rong Chen's performance results on this patch. Moving
 the rename into a separate patch makes sense, but removing the read is
 part of restoring the original behavior. I think it should be in this
 patch. Maybe I can write a better commit message to highlight the
 change.

>>> Hi Thomas,
>>>
>>> I tested the patch based on previous patch series, it seems doesn't take
>>> effect, and commit 39fb72816c4ee brings a larger regression when
>>> comparing to commit caac4dda44f37:
>> Thanks for testing!
>>
>> I still don't understand these numbers, but are you sure that
>> e44e907dd8f93 is really the regression?
> 
> Yes, it's a regression too, according to the previous report
> https://www.spinics.net/lists/dri-devel/msg260034.html
> the bot bisected to commit e44e907dd8f93 which let the
> glmark2.800x600.score reduced by 64.9%,
> but the bot doesn't notice the improvement of commit caac4dda44f37, and
> commit 39fb72816c4ee
> causes another regression.

I sent out a patch for 39fb72816c4ee. It enables caching on the
framebuffer's pages.

Best regards
Thomas

> 
> Best Regards,
> Rong Chen
> 
>>
>> It would make sense that 39fb72816c4ee has an impact on performance, as
>> it changes memory management and the way the driver updates the display.
>> I'll take a closer look at that patch and maybe send out an update.
>>
>> Best regards
>> Thomas
>>
>>> 4606edf870927 drm/mgag200: Don't set  in
>>> MISC  3 3 3
>>> 39fb72816c4ee drm/mgag200: Replace VRAM helpers with SHMEM
>>> helpers   3 22
>>> caac4dda44f37 drm/mgag200: Convert to simple KMS
>>> helper  238 233 240 234 239
>>> 4b11c90431108 drm/mgag200: Use simple-display data
>>> structures    35 34 34 34
>>> db22c903c9322 drm/mgag200: Remove out-commented suspend/resume
>>> helpers   34 34
>>> 87d4880d2aeb5 drm/mgag200: Move register initialization into separate
>>> function   35
>>> 0c51726f95396 drm/mgag200: Move hiprilvl setting into separate
>>> functions 35
>>> 8078e8b182e73 drm/mgag200: Set primary plane's format in separate
>>> helper function    35
>>> 19f7b409d95b7 drm/mgag200: Set pitch in a separate helper
>>> function   35 34
>>> 9b9a363828c60 drm/mgag200: Update mode registers after plane
>>> registers   34
>>> e44e907dd8f93 drm/mgag200: Split MISC register update into PLL
>>> selection, SYNC and I/O   34 34 34 34
>>> bef2303526adb drm/mgag200: Move mode-setting code into separate
>>> helper function  97 97
>>> 5cd8460e81e8f drm/mgag200: Clean up
>>> mga_crtc_do_set_base()   96
>>> 0671ca8c559ba drm/mgag200: Clean up mga_set_start_address()
>>> e82c8969a2474 drm/mgag200: Remove HW
>>> cursor  96
>>>
>>> Best Regards,
>>> Rong Chen
>>>
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer



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Re: [PATCH] drm/mgag200: Don't set in MISC

2020-06-17 Thread Rong Chen




On 6/17/20 8:29 PM, Thomas Zimmermann wrote:

Hi

Am 17.06.20 um 11:22 schrieb Rong Chen:

On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:

Hi Emil

Am 16.06.20 um 17:14 schrieb Emil Velikov:

Hi Thomas,

On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann  wrote:

The original modesetting code set MISC to 0x2d, which is ,
 and 

With the conversion to atomic modesetting,  accidentally
got enabled as well. Revert this change and initialize MISC with a
constant value of  and . The  bits are set
in mga_crtc_set_plls(), sync flags are set in mgag200_set_mode_regs().


Let's keep the remove (restoring original functionality) and rename
(cosmetics) separate patches. The read has also disappeared, which
should be safe although might be better on it's own.

I'm waiting for Rong Chen's performance results on this patch. Moving
the rename into a separate patch makes sense, but removing the read is
part of restoring the original behavior. I think it should be in this
patch. Maybe I can write a better commit message to highlight the change.


Hi Thomas,

I tested the patch based on previous patch series, it seems doesn't take
effect, and commit 39fb72816c4ee brings a larger regression when
comparing to commit caac4dda44f37:

Thanks for testing!

I still don't understand these numbers, but are you sure that
e44e907dd8f93 is really the regression?


Yes, it's a regression too, according to the previous report 
https://www.spinics.net/lists/dri-devel/msg260034.html
the bot bisected to commit e44e907dd8f93 which let the 
glmark2.800x600.score reduced by 64.9%,
but the bot doesn't notice the improvement of commit caac4dda44f37, and 
commit 39fb72816c4ee

causes another regression.

Best Regards,
Rong Chen



It would make sense that 39fb72816c4ee has an impact on performance, as
it changes memory management and the way the driver updates the display.
I'll take a closer look at that patch and maybe send out an update.

Best regards
Thomas


4606edf870927 drm/mgag200: Don't set  in MISC 
 3 3 3
39fb72816c4ee drm/mgag200: Replace VRAM helpers with SHMEM helpers  
 3 22
caac4dda44f37 drm/mgag200: Convert to simple KMS helper 
 238 233 240 234 239
4b11c90431108 drm/mgag200: Use simple-display data structures   
 35 34 34 34
db22c903c9322 drm/mgag200: Remove out-commented suspend/resume helpers  
 34 34
87d4880d2aeb5 drm/mgag200: Move register initialization into separate function  
 35
0c51726f95396 drm/mgag200: Move hiprilvl setting into separate functions
 35
8078e8b182e73 drm/mgag200: Set primary plane's format in separate helper 
function35
19f7b409d95b7 drm/mgag200: Set pitch in a separate helper function  
 35 34
9b9a363828c60 drm/mgag200: Update mode registers after plane registers  
 34
e44e907dd8f93 drm/mgag200: Split MISC register update into PLL selection, SYNC 
and I/O   34 34 34 34
bef2303526adb drm/mgag200: Move mode-setting code into separate helper function 
 97 97
5cd8460e81e8f drm/mgag200: Clean up mga_crtc_do_set_base()  
 96
0671ca8c559ba drm/mgag200: Clean up mga_set_start_address()
e82c8969a2474 drm/mgag200: Remove HW cursor 
 96

Best Regards,
Rong Chen



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Re: [PATCH] drm/mgag200: Don't set in MISC

2020-06-17 Thread Emil Velikov
On Wed, 17 Jun 2020 at 07:28, Thomas Zimmermann  wrote:

> Maybe I can write a better commit message to highlight the change.
>
That would be amazing, thank you.

Emil
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Re: [PATCH] drm/mgag200: Don't set in MISC

2020-06-17 Thread Thomas Zimmermann
Hi

Am 17.06.20 um 11:22 schrieb Rong Chen:
> On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:
>> Hi Emil
>>
>> Am 16.06.20 um 17:14 schrieb Emil Velikov:
>>> Hi Thomas,
>>>
>>> On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann  wrote:

 The original modesetting code set MISC to 0x2d, which is ,
  and 

 With the conversion to atomic modesetting,  accidentally
 got enabled as well. Revert this change and initialize MISC with a
 constant value of  and . The  bits are set
 in mga_crtc_set_plls(), sync flags are set in mgag200_set_mode_regs().

>>>
>>> Let's keep the remove (restoring original functionality) and rename
>>> (cosmetics) separate patches. The read has also disappeared, which
>>> should be safe although might be better on it's own.
>>
>> I'm waiting for Rong Chen's performance results on this patch. Moving
>> the rename into a separate patch makes sense, but removing the read is
>> part of restoring the original behavior. I think it should be in this
>> patch. Maybe I can write a better commit message to highlight the change.
>>
> 
> Hi Thomas,
> 
> I tested the patch based on previous patch series, it seems doesn't take
> effect, and commit 39fb72816c4ee brings a larger regression when
> comparing to commit caac4dda44f37:

Thanks for testing!

I still don't understand these numbers, but are you sure that
e44e907dd8f93 is really the regression?

It would make sense that 39fb72816c4ee has an impact on performance, as
it changes memory management and the way the driver updates the display.
I'll take a closer look at that patch and maybe send out an update.

Best regards
Thomas

> 
> 4606edf870927 drm/mgag200: Don't set  in MISC   
>3 3 3
> 39fb72816c4ee drm/mgag200: Replace VRAM helpers with SHMEM helpers
>3 22
> caac4dda44f37 drm/mgag200: Convert to simple KMS helper   
>238 233 240 234 239
> 4b11c90431108 drm/mgag200: Use simple-display data structures 
>35 34 34 34
> db22c903c9322 drm/mgag200: Remove out-commented suspend/resume helpers
>34 34
> 87d4880d2aeb5 drm/mgag200: Move register initialization into separate 
> function   35
> 0c51726f95396 drm/mgag200: Move hiprilvl setting into separate functions  
>35
> 8078e8b182e73 drm/mgag200: Set primary plane's format in separate helper 
> function35
> 19f7b409d95b7 drm/mgag200: Set pitch in a separate helper function
>35 34
> 9b9a363828c60 drm/mgag200: Update mode registers after plane registers
>34
> e44e907dd8f93 drm/mgag200: Split MISC register update into PLL selection, 
> SYNC and I/O   34 34 34 34
> bef2303526adb drm/mgag200: Move mode-setting code into separate helper 
> function  97 97
> 5cd8460e81e8f drm/mgag200: Clean up mga_crtc_do_set_base()
>96
> 0671ca8c559ba drm/mgag200: Clean up mga_set_start_address()
> e82c8969a2474 drm/mgag200: Remove HW cursor   
>96
> 
> Best Regards,
> Rong Chen
> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer



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Re: [PATCH] drm/mgag200: Don't set in MISC

2020-06-17 Thread Rong Chen
On Wed, Jun 17, 2020 at 08:28:02AM +0200, Thomas Zimmermann wrote:
> Hi Emil
> 
> Am 16.06.20 um 17:14 schrieb Emil Velikov:
> > Hi Thomas,
> > 
> > On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann  wrote:
> >>
> >> The original modesetting code set MISC to 0x2d, which is ,
> >>  and 
> >>
> >> With the conversion to atomic modesetting,  accidentally
> >> got enabled as well. Revert this change and initialize MISC with a
> >> constant value of  and . The  bits are set
> >> in mga_crtc_set_plls(), sync flags are set in mgag200_set_mode_regs().
> >>
> > 
> > Let's keep the remove (restoring original functionality) and rename
> > (cosmetics) separate patches. The read has also disappeared, which
> > should be safe although might be better on it's own.
> 
> I'm waiting for Rong Chen's performance results on this patch. Moving
> the rename into a separate patch makes sense, but removing the read is
> part of restoring the original behavior. I think it should be in this
> patch. Maybe I can write a better commit message to highlight the change.
> 

Hi Thomas,

I tested the patch based on previous patch series, it seems doesn't take
effect, and commit 39fb72816c4ee brings a larger regression when
comparing to commit caac4dda44f37:

4606edf870927 drm/mgag200: Don't set  in MISC 
 3 3 3
39fb72816c4ee drm/mgag200: Replace VRAM helpers with SHMEM helpers  
 3 22
caac4dda44f37 drm/mgag200: Convert to simple KMS helper 
 238 233 240 234 239
4b11c90431108 drm/mgag200: Use simple-display data structures   
 35 34 34 34
db22c903c9322 drm/mgag200: Remove out-commented suspend/resume helpers  
 34 34
87d4880d2aeb5 drm/mgag200: Move register initialization into separate function  
 35
0c51726f95396 drm/mgag200: Move hiprilvl setting into separate functions
 35
8078e8b182e73 drm/mgag200: Set primary plane's format in separate helper 
function35
19f7b409d95b7 drm/mgag200: Set pitch in a separate helper function  
 35 34
9b9a363828c60 drm/mgag200: Update mode registers after plane registers  
 34
e44e907dd8f93 drm/mgag200: Split MISC register update into PLL selection, SYNC 
and I/O   34 34 34 34
bef2303526adb drm/mgag200: Move mode-setting code into separate helper function 
 97 97
5cd8460e81e8f drm/mgag200: Clean up mga_crtc_do_set_base()  
 96
0671ca8c559ba drm/mgag200: Clean up mga_set_start_address()
e82c8969a2474 drm/mgag200: Remove HW cursor 
 96

Best Regards,
Rong Chen
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Re: [PATCH] drm/mgag200: Don't set in MISC

2020-06-17 Thread Thomas Zimmermann
Hi Emil

Am 16.06.20 um 17:14 schrieb Emil Velikov:
> Hi Thomas,
> 
> On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann  wrote:
>>
>> The original modesetting code set MISC to 0x2d, which is ,
>>  and 
>>
>> With the conversion to atomic modesetting,  accidentally
>> got enabled as well. Revert this change and initialize MISC with a
>> constant value of  and . The  bits are set
>> in mga_crtc_set_plls(), sync flags are set in mgag200_set_mode_regs().
>>
> 
> Let's keep the remove (restoring original functionality) and rename
> (cosmetics) separate patches. The read has also disappeared, which
> should be safe although might be better on it's own.

I'm waiting for Rong Chen's performance results on this patch. Moving
the rename into a separate patch makes sense, but removing the read is
part of restoring the original behavior. I think it should be in this
patch. Maybe I can write a better commit message to highlight the change.

Best regards
Thomas

> 
> Thanks
> Emil
> ___
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> 

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer



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Re: [PATCH] drm/mgag200: Don't set in MISC

2020-06-16 Thread Emil Velikov
Hi Thomas,

On Tue, 16 Jun 2020 at 15:26, Thomas Zimmermann  wrote:
>
> The original modesetting code set MISC to 0x2d, which is ,
>  and 
>
> With the conversion to atomic modesetting,  accidentally
> got enabled as well. Revert this change and initialize MISC with a
> constant value of  and . The  bits are set
> in mga_crtc_set_plls(), sync flags are set in mgag200_set_mode_regs().
>

Let's keep the remove (restoring original functionality) and rename
(cosmetics) separate patches. The read has also disappeared, which
should be safe although might be better on it's own.

Thanks
Emil
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[PATCH] drm/mgag200: Don't set in MISC

2020-06-16 Thread Thomas Zimmermann
The original modesetting code set MISC to 0x2d, which is ,
 and 

With the conversion to atomic modesetting,  accidentally
got enabled as well. Revert this change and initialize MISC with a
constant value of  and . The  bits are set
in mga_crtc_set_plls(), sync flags are set in mgag200_set_mode_regs().

While at it, also rename the flag constant to match the nameing in
the MGA Programming Manual.

Signed-off-by: Thomas Zimmermann 
Reported-by: kernel test robot 
Suggested-by: Emil Velikov 
Fixes: db05f8d3dc87 ("drm/mgag200: Split MISC register update into PLL 
selection, SYNC and I/O")
Cc: Thomas Zimmermann 
Cc: Sam Ravnborg 
Cc: Emil Velikov 
Cc: Dave Airlie 
Cc: Daniel Vetter 
Cc: Gerd Hoffmann 
Cc: "José Roberto de Souza" 
Cc: Andrzej Pietrasiewicz 
Cc: Rong Chen 
Cc: John Donnelly 
---
 drivers/gpu/drm/mgag200/mgag200_mode.c | 6 ++
 drivers/gpu/drm/mgag200/mgag200_reg.h  | 2 +-
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c 
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index f16bd278ab7e4..3b7235bd0bcba 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1018,10 +1018,8 @@ static void mgag200_init_regs(struct mga_device *mdev)
if (mdev->type == G200_EW3)
WREG_ECRT(0x34, 0x5);
 
-   misc = RREG8(MGA_MISC_IN);
-   misc |= MGAREG_MISC_IOADSEL |
-   MGAREG_MISC_RAMMAPEN |
-   MGAREG_MISC_HIGH_PG_SEL;
+   misc = MGAREG_MISC_HPGODDEV |
+  MGAREG_MISC_IOADSEL;
WREG8(MGA_MISC_OUT, misc);
 }
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_reg.h 
b/drivers/gpu/drm/mgag200/mgag200_reg.h
index 29f7194faadc0..f6629e0d4bdf2 100644
--- a/drivers/gpu/drm/mgag200/mgag200_reg.h
+++ b/drivers/gpu/drm/mgag200/mgag200_reg.h
@@ -228,7 +228,7 @@
 #define MGAREG_MISC_CLK_SEL_MGA_PIX(0x2 << 2)
 #define MGAREG_MISC_CLK_SEL_MGA_MSK(0x3 << 2)
 #define MGAREG_MISC_VIDEO_DIS  (0x1 << 4)
-#define MGAREG_MISC_HIGH_PG_SEL(0x1 << 5)
+#define MGAREG_MISC_HPGODDEV   BIT(5)
 #define MGAREG_MISC_HSYNCPOL   BIT(6)
 #define MGAREG_MISC_VSYNCPOL   BIT(7)
 
-- 
2.27.0

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