Fwd: [PATCH 0/5] drm/dp: i2c-over-aux short write support

[Alex Deucher]

fwd to the list.


-- Forwarded message --
From: Alex Deucher <alexdeuc...@gmail.com>
Date: Mon, Mar 16, 2015 at 9:49 AM
Subject: Re: [PATCH 0/5] drm/dp: i2c-over-aux short write support
To: Ville Syrjälä 


On Fri, Mar 13, 2015 at 12:13 PM,   wrote:
> From: Ville Syrjälä 
>
> This series tries to implement support for short i2c-over-aux writes.
>
> I did notice that my monitor (HP ZR24w) does support DDC/CI so I was
> able to do some writes, but I only saw native defers instead of i2c
> defers/short acks. So I've not actually been able to test this.
>
> Another complication with DDC/CI seems to be that the monitor doesn't
> seem to like the default 100kHz bus speed. I had to drop it to 10kHz
> to make it reliable (my dongle supports bus speed control fortunately).
> Currently we have no standard way to configure the bus speed AFAICS,
> so at least with this monitor DDC/CI is a bit useless.
>
> I tried to fix up radeon and tegra too. gma500 I left alone since it's
> not using dp i2c helper.
>
> Ville Syrjälä (5):
>   drm/dp: s/I2C_STATUS/I2C_WRITE_STATUS_UPDATE/
>   drm/i915: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
>   drm/radeon: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
>   drm/tegra: Handle I2C_WRITE_STATUS_UPDATE for address only writes
>   drm/dp: Use I2C_WRITE_STATUS_UPDATE to drain partial I2C_WRITE
> requests

Patches 1, 3, 5 are:
Acked-by: Alex Deucher 


>
>  drivers/gpu/drm/drm_dp_helper.c  | 42 
> 
>  drivers/gpu/drm/i915/intel_dp.c  |  1 +
>  drivers/gpu/drm/radeon/atombios_dp.c |  1 +
>  drivers/gpu/drm/tegra/dpaux.c|  3 ++-
>  include/drm/drm_dp_helper.h  |  2 +-
>  5 files changed, 43 insertions(+), 6 deletions(-)
>
> --
> 2.0.5
>
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[PATCH 0/5] drm/dp: i2c-over-aux short write support

[ville.syrj...@linux.intel.com]

From: Ville Syrjälä 

This series tries to implement support for short i2c-over-aux writes.

I did notice that my monitor (HP ZR24w) does support DDC/CI so I was
able to do some writes, but I only saw native defers instead of i2c
defers/short acks. So I've not actually been able to test this.

Another complication with DDC/CI seems to be that the monitor doesn't
seem to like the default 100kHz bus speed. I had to drop it to 10kHz
to make it reliable (my dongle supports bus speed control fortunately).
Currently we have no standard way to configure the bus speed AFAICS,
so at least with this monitor DDC/CI is a bit useless.

I tried to fix up radeon and tegra too. gma500 I left alone since it's
not using dp i2c helper.

Ville Syrjälä (5):
  drm/dp: s/I2C_STATUS/I2C_WRITE_STATUS_UPDATE/
  drm/i915: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
  drm/radeon: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
  drm/tegra: Handle I2C_WRITE_STATUS_UPDATE for address only writes
  drm/dp: Use I2C_WRITE_STATUS_UPDATE to drain partial I2C_WRITE
requests

 drivers/gpu/drm/drm_dp_helper.c  | 42 
 drivers/gpu/drm/i915/intel_dp.c  |  1 +
 drivers/gpu/drm/radeon/atombios_dp.c |  1 +
 drivers/gpu/drm/tegra/dpaux.c|  3 ++-
 include/drm/drm_dp_helper.h  |  2 +-
 5 files changed, 43 insertions(+), 6 deletions(-)

-- 
2.0.5