Re: [PATCH 07/11] drm/bridge: tc358768: Rename dsibclk to hsbyteclk
On 04/08/2023 13:44, Tomi Valkeinen wrote: > The Toshiba documentation talks about HSByteClk when referring to the > DSI HS byte clock, whereas the driver uses 'dsibclk' name. Also, in a > few places the driver calculates the byte clock from the DSI clock, even > if the byte clock is already available in a variable. If you say so ;) I don't have access to the documentation anymore. > > To align the driver with the documentation, change the 'dsibclk' > variable to 'hsbyteclk'. This also make it easier to visually separate > 'dsibclk' and 'dsiclk' variables. Reviewed-by: Peter Ujfalusi > > Signed-off-by: Tomi Valkeinen > --- > drivers/gpu/drm/bridge/tc358768.c | 48 > +++ > 1 file changed, 24 insertions(+), 24 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/tc358768.c > b/drivers/gpu/drm/bridge/tc358768.c > index 3266c08d9bf1..db45b4a982c0 100644 > --- a/drivers/gpu/drm/bridge/tc358768.c > +++ b/drivers/gpu/drm/bridge/tc358768.c > @@ -604,7 +604,7 @@ static int tc358768_setup_pll(struct tc358768_priv *priv, > > dev_dbg(priv->dev, "PLL: refclk %lu, fbd %u, prd %u, frs %u\n", > clk_get_rate(priv->refclk), fbd, prd, frs); > - dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, DSIByteClk %u\n", > + dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, HSByteClk %u\n", > priv->dsiclk * 2, priv->dsiclk, priv->dsiclk / 4); > dev_dbg(priv->dev, "PLL: pclk %u (panel: %u)\n", > tc358768_pll_to_pclk(priv, priv->dsiclk * 2), > @@ -646,8 +646,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridge > *bridge) > u32 val, val2, lptxcnt, hact, data_type; > s32 raw_val; > const struct drm_display_mode *mode; > - u32 dsibclk_nsk, dsiclk_nsk, ui_nsk; > - u32 dsiclk, dsibclk, video_start; > + u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk; > + u32 dsiclk, hsbyteclk, video_start; > const u32 internal_delay = 40; > int ret, i; > struct videomode vm; > @@ -678,7 +678,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge > *bridge) > drm_display_mode_to_videomode(mode, ); > > dsiclk = priv->dsiclk; > - dsibclk = dsiclk / 4; > + hsbyteclk = dsiclk / 4; > > /* Data Format Control Register */ > val = BIT(2) | BIT(1) | BIT(0); /* rdswap_en | dsitx_en | txdt_en */ > @@ -730,67 +730,67 @@ static void tc358768_bridge_pre_enable(struct > drm_bridge *bridge) > tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x); > > /* DSI Timings */ > - dsibclk_nsk = (u32)div_u64((u64)10 * TC358768_PRECISION, > - dsibclk); > + hsbyteclk_nsk = (u32)div_u64((u64)10 * TC358768_PRECISION, > + hsbyteclk); > dsiclk_nsk = (u32)div_u64((u64)10 * TC358768_PRECISION, dsiclk); > ui_nsk = dsiclk_nsk / 2; > dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); > dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); > - dev_dbg(dev, "dsibclk_nsk: %u\n", dsibclk_nsk); > + dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk); > > /* LP11 > 100us for D-PHY Rx Init */ > - val = tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; > + val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1; > dev_dbg(dev, "LINEINITCNT: %u\n", val); > tc358768_write(priv, TC358768_LINEINITCNT, val); > > /* LPTimeCnt > 50ns */ > - val = tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; > + val = tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1; > lptxcnt = val; > dev_dbg(dev, "LPTXTIMECNT: %u\n", val); > tc358768_write(priv, TC358768_LPTXTIMECNT, val); > > /* 38ns < TCLK_PREPARE < 95ns */ > - val = tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; > + val = tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1; > dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); > /* TCLK_PREPARE + TCLK_ZERO > 300ns */ > val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), > - dsibclk_nsk) - 2; > + hsbyteclk_nsk) - 2; > dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); > val |= val2 << 8; > tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); > > /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ > - raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), > dsibclk_nsk) - 5; > + raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), > hsbyteclk_nsk) - 5; > val = clamp(raw_val, 0, 127); > dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); > tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); > > /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ > val = 50 + tc358768_to_ns(4 * ui_nsk); > - val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; > + val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1; > dev_dbg(dev, "THS_PREPARECNT %u\n", val); > /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ > - raw_val =
[PATCH 07/11] drm/bridge: tc358768: Rename dsibclk to hsbyteclk
The Toshiba documentation talks about HSByteClk when referring to the DSI HS byte clock, whereas the driver uses 'dsibclk' name. Also, in a few places the driver calculates the byte clock from the DSI clock, even if the byte clock is already available in a variable. To align the driver with the documentation, change the 'dsibclk' variable to 'hsbyteclk'. This also make it easier to visually separate 'dsibclk' and 'dsiclk' variables. Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 48 +++ 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index 3266c08d9bf1..db45b4a982c0 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -604,7 +604,7 @@ static int tc358768_setup_pll(struct tc358768_priv *priv, dev_dbg(priv->dev, "PLL: refclk %lu, fbd %u, prd %u, frs %u\n", clk_get_rate(priv->refclk), fbd, prd, frs); - dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, DSIByteClk %u\n", + dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, HSByteClk %u\n", priv->dsiclk * 2, priv->dsiclk, priv->dsiclk / 4); dev_dbg(priv->dev, "PLL: pclk %u (panel: %u)\n", tc358768_pll_to_pclk(priv, priv->dsiclk * 2), @@ -646,8 +646,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) u32 val, val2, lptxcnt, hact, data_type; s32 raw_val; const struct drm_display_mode *mode; - u32 dsibclk_nsk, dsiclk_nsk, ui_nsk; - u32 dsiclk, dsibclk, video_start; + u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk; + u32 dsiclk, hsbyteclk, video_start; const u32 internal_delay = 40; int ret, i; struct videomode vm; @@ -678,7 +678,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) drm_display_mode_to_videomode(mode, ); dsiclk = priv->dsiclk; - dsibclk = dsiclk / 4; + hsbyteclk = dsiclk / 4; /* Data Format Control Register */ val = BIT(2) | BIT(1) | BIT(0); /* rdswap_en | dsitx_en | txdt_en */ @@ -730,67 +730,67 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x); /* DSI Timings */ - dsibclk_nsk = (u32)div_u64((u64)10 * TC358768_PRECISION, - dsibclk); + hsbyteclk_nsk = (u32)div_u64((u64)10 * TC358768_PRECISION, + hsbyteclk); dsiclk_nsk = (u32)div_u64((u64)10 * TC358768_PRECISION, dsiclk); ui_nsk = dsiclk_nsk / 2; dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(dev, "dsibclk_nsk: %u\n", dsibclk_nsk); + dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk); /* LP11 > 100us for D-PHY Rx Init */ - val = tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1; dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); /* LPTimeCnt > 50ns */ - val = tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1; lptxcnt = val; dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); /* 38ns < TCLK_PREPARE < 95ns */ - val = tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1; dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), - dsibclk_nsk) - 2; + hsbyteclk_nsk) - 2; dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ - raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 5; + raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), hsbyteclk_nsk) - 5; val = clamp(raw_val, 0, 127); dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val = 50 + tc358768_to_ns(4 * ui_nsk); - val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; + val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1; dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ - raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_nsk) - 10; + raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), hsbyteclk_nsk) - 10; val2 = clamp(raw_val, 0, 127);
