Re: [PATCH 08/12] drm/bridge: tc358764: Add DSI to LVDS bridge driver
Hi Maciej,
On 30.05.2018 09:45, kbuild test robot wrote:
> Hi Maciej,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on next-20180517]
> [cannot apply to drm-exynos/exynos-drm/for-next robh/for-next drm/drm-next
> v4.17-rc6 v4.17-rc5 v4.17-rc4 v4.17-rc7]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Maciej-Purski/Add-TOSHIBA-TC358764-DSI-LVDS-bridge-driver/20180530-011258
> reproduce:
> # apt-get install sparse
> make ARCH=x86_64 allmodconfig
> make C=1 CF=-D__CHECK_ENDIAN__
>
>
> sparse warnings: (new ones prefixed by >>)
>
>>> drivers/gpu/drm/bridge/tc358764.c:193:14: sparse: incorrect type in
>>> assignment (different base types) @@expected unsigned short [unsigned]
>>> [addressable] [usertype] addr @@got ed] [addressable] [usertype] addr @@
>drivers/gpu/drm/bridge/tc358764.c:193:14:expected unsigned short
> [unsigned] [addressable] [usertype] addr
>drivers/gpu/drm/bridge/tc358764.c:193:14:got restricted __le16
> [usertype]
>>> drivers/gpu/drm/bridge/tc358764.c:197:24: sparse: cast to restricted __le32
>>> drivers/gpu/drm/bridge/tc358764.c:175:5: sparse: symbol 'tc358764_read' was
>>> not declared. Should it be static?
>>> drivers/gpu/drm/bridge/tc358764.c:204:5: sparse: symbol 'tc358764_write'
>>> was not declared. Should it be static?
> vim +193 drivers/gpu/drm/bridge/tc358764.c
>
>174
> > 175int tc358764_read(struct tc358764 *ctx, u16 addr, u32 *val)
add static
>176{
>177struct mipi_dsi_device *dsi =
> to_mipi_dsi_device(ctx->dev);
>178const struct mipi_dsi_host_ops *ops = dsi->host->ops;
>179struct mipi_dsi_msg msg = {
>180.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM,
>181.channel = dsi->channel,
>182.flags = MIPI_DSI_MSG_USE_LPM,
>183.tx_buf = &addr,
>184.tx_len = 2,
>185.rx_buf = val,
>186.rx_len = 4
>187};
>188ssize_t ret;
>189
>190if (!ops || !ops->transfer)
>191return -EINVAL;
>192
> > 193addr = cpu_to_le16(addr);
It should be changed to:
cpu_to_le16s(&addr);
>194
>195ret = ops->transfer(dsi->host, &msg);
>196if (ret >= 0)
> > 197*val = le32_to_cpu(*val);
le32_to_cpus(val);
>198
>199dev_dbg(ctx->dev, "read: %d, addr: %d\n", addr, *val);
>200
>201return ret;
>202}
>203
> > 204int tc358764_write(struct tc358764 *ctx, u16 addr, u32 val)
add static
Regards
Andrzej
>205{
>206struct mipi_dsi_device *dsi =
> to_mipi_dsi_device(ctx->dev);
>207const struct mipi_dsi_host_ops *ops = dsi->host->ops;
>208u8 data[6];
>209int ret;
>210struct mipi_dsi_msg msg = {
>211.type = MIPI_DSI_GENERIC_LONG_WRITE,
>212.channel = dsi->channel,
>213.flags = MIPI_DSI_MSG_USE_LPM |
> MIPI_DSI_MSG_REQ_ACK,
>214.tx_buf = data,
>215.tx_len = 6
>216};
>217
>218if (!ops || !ops->transfer)
>219return -EINVAL;
>220
>221data[0] = addr;
>222data[1] = addr >> 8;
>223data[2] = val;
>224data[3] = val >> 8;
>225data[4] = val >> 16;
>226data[5] = val >> 24;
>227
>228ret = ops->transfer(dsi->host, &msg);
>229
>230return ret;
>231}
>232
>
> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all Intel Corporation
>
>
>
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Re: [PATCH 08/12] drm/bridge: tc358764: Add DSI to LVDS bridge driver
Hi Maciej,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on next-20180517]
[cannot apply to drm-exynos/exynos-drm/for-next robh/for-next drm/drm-next
v4.17-rc6 v4.17-rc5 v4.17-rc4 v4.17-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Maciej-Purski/Add-TOSHIBA-TC358764-DSI-LVDS-bridge-driver/20180530-011258
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/bridge/tc358764.c:193:14: sparse: incorrect type in
>> assignment (different base types) @@expected unsigned short [unsigned]
>> [addressable] [usertype] addr @@got ed] [addressable] [usertype] addr @@
drivers/gpu/drm/bridge/tc358764.c:193:14:expected unsigned short
[unsigned] [addressable] [usertype] addr
drivers/gpu/drm/bridge/tc358764.c:193:14:got restricted __le16
[usertype]
>> drivers/gpu/drm/bridge/tc358764.c:197:24: sparse: cast to restricted __le32
>> drivers/gpu/drm/bridge/tc358764.c:175:5: sparse: symbol 'tc358764_read' was
>> not declared. Should it be static?
>> drivers/gpu/drm/bridge/tc358764.c:204:5: sparse: symbol 'tc358764_write' was
>> not declared. Should it be static?
vim +193 drivers/gpu/drm/bridge/tc358764.c
174
> 175 int tc358764_read(struct tc358764 *ctx, u16 addr, u32 *val)
176 {
177 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
178 const struct mipi_dsi_host_ops *ops = dsi->host->ops;
179 struct mipi_dsi_msg msg = {
180 .type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM,
181 .channel = dsi->channel,
182 .flags = MIPI_DSI_MSG_USE_LPM,
183 .tx_buf = &addr,
184 .tx_len = 2,
185 .rx_buf = val,
186 .rx_len = 4
187 };
188 ssize_t ret;
189
190 if (!ops || !ops->transfer)
191 return -EINVAL;
192
> 193 addr = cpu_to_le16(addr);
194
195 ret = ops->transfer(dsi->host, &msg);
196 if (ret >= 0)
> 197 *val = le32_to_cpu(*val);
198
199 dev_dbg(ctx->dev, "read: %d, addr: %d\n", addr, *val);
200
201 return ret;
202 }
203
> 204 int tc358764_write(struct tc358764 *ctx, u16 addr, u32 val)
205 {
206 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
207 const struct mipi_dsi_host_ops *ops = dsi->host->ops;
208 u8 data[6];
209 int ret;
210 struct mipi_dsi_msg msg = {
211 .type = MIPI_DSI_GENERIC_LONG_WRITE,
212 .channel = dsi->channel,
213 .flags = MIPI_DSI_MSG_USE_LPM | MIPI_DSI_MSG_REQ_ACK,
214 .tx_buf = data,
215 .tx_len = 6
216 };
217
218 if (!ops || !ops->transfer)
219 return -EINVAL;
220
221 data[0] = addr;
222 data[1] = addr >> 8;
223 data[2] = val;
224 data[3] = val >> 8;
225 data[4] = val >> 16;
226 data[5] = val >> 24;
227
228 ret = ops->transfer(dsi->host, &msg);
229
230 return ret;
231 }
232
---
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Re: [PATCH 08/12] drm/bridge: tc358764: Add DSI to LVDS bridge driver
On 05/28/2018 02:47 AM, Maciej Purski wrote: > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig > index fa2c799..58e19af 100644 > --- a/drivers/gpu/drm/bridge/Kconfig > +++ b/drivers/gpu/drm/bridge/Kconfig > @@ -110,6 +110,13 @@ config DRM_THINE_THC63LVD1024 > ---help--- > Thine THC63LVD1024 LVDS/parallel converter driver. > > +config DRM_TOSHIBA_TC358764 > + tristate "TC358764 DSI/LVDS bridge" > + depends on DRM && DRM_PANEL > + depends on OF > + select DRM_MIPI_DSI > + select VIDEOMODE_HELPERS > + Kconfig symbols with "prompt strings" should also have help text. I expected checkpatch to catch that, but I tested it and there was no warning from checkpatch about help text. OTOH, there was a warning that there are 2 lines in this patch that end with whitespace, so that should be fixed. Did you use checkpatch (scripts/checkpatch.pl)? > config DRM_TOSHIBA_TC358767 > tristate "Toshiba TC358767 eDP bridge" > depends on OF thanks, -- ~Randy ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 08/12] drm/bridge: tc358764: Add DSI to LVDS bridge driver
Add a drm_bridge driver for the Toshiba TC358764 DSI to LVDS bridge. Signed-off-by: Andrzej Hajda Signed-off-by: Maciej Purski --- drivers/gpu/drm/bridge/Kconfig| 7 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/tc358764.c | 547 ++ 3 files changed, 555 insertions(+) create mode 100644 drivers/gpu/drm/bridge/tc358764.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index fa2c799..58e19af 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -110,6 +110,13 @@ config DRM_THINE_THC63LVD1024 ---help--- Thine THC63LVD1024 LVDS/parallel converter driver. +config DRM_TOSHIBA_TC358764 + tristate "TC358764 DSI/LVDS bridge" + depends on DRM && DRM_PANEL + depends on OF + select DRM_MIPI_DSI + select VIDEOMODE_HELPERS + config DRM_TOSHIBA_TC358767 tristate "Toshiba TC358767 eDP bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 35f88d4..bf7c0ce 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o obj-$(CONFIG_DRM_SII902X) += sii902x.o obj-$(CONFIG_DRM_SII9234) += sii9234.o obj-$(CONFIG_DRM_THINE_THC63LVD1024) += thc63lvd1024.o +obj-$(CONFIG_DRM_TOSHIBA_TC358764) += tc358764.o obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/ obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511/ diff --git a/drivers/gpu/drm/bridge/tc358764.c b/drivers/gpu/drm/bridge/tc358764.c new file mode 100644 index 000..0bd520a --- /dev/null +++ b/drivers/gpu/drm/bridge/tc358764.c @@ -0,0 +1,547 @@ +/* + * Copyright (C) 2018 Samsung Electronics Co., Ltd + * + * Authors: + * Andrzej Hajda + * Maciej Purski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. + * + */ + +#include + +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include +#include +#include + +#define FLD_MASK(start, end)(((1 << ((start) - (end) + 1)) - 1) << (end)) +#define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) + +/* PPI layer registers */ +#define PPI_STARTPPI 0x0104 /* START control bit */ +#define PPI_LPTXTIMECNT0x0114 /* LPTX timing signal */ +#define PPI_LANEENABLE 0x0134 /* Enables each lane */ +#define PPI_TX_RX_TA 0x013C /* BTA timing parameters */ +#define PPI_D0S_CLRSIPOCOUNT 0x0164 /* Assertion timer for Lane 0 */ +#define PPI_D1S_CLRSIPOCOUNT 0x0168 /* Assertion timer for Lane 1 */ +#define PPI_D2S_CLRSIPOCOUNT 0x016C /* Assertion timer for Lane 2 */ +#define PPI_D3S_CLRSIPOCOUNT 0x0170 /* Assertion timer for Lane 3 */ +#define PPI_START_FUNCTION 1 + +/* DSI layer registers */ +#define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */ +#define DSI_LANEENABLE 0x0210 /* Enables each lane */ +#define DSI_RX_START 1 + +/* Video path registers */ +#define VP_CTRL0x0450 /* Video Path Control */ +#define VP_CTRL_MSF(v) FLD_VAL(v, 0, 0) /* Magic square in RGB666 */ +#define VP_CTRL_VTGEN(v) FLD_VAL(v, 4, 4) /* Use chip clock for timing */ +#define VP_CTRL_EVTMODE(v) FLD_VAL(v, 5, 5) /* Event mode */ +#define VP_CTRL_RGB888(v) FLD_VAL(v, 8, 8) /* RGB888 mode */ +#define VP_CTRL_VSDELAY(v) FLD_VAL(v, 31, 20) /* VSYNC delay */ +#define VP_CTRL_HSPOL BIT(17) /* Polarity of HSYNC signal */ +#define VP_CTRL_DEPOL BIT(18) /* Polarity of DE signal */ +#define VP_CTRL_VSPOL BIT(19) /* Polarity of VSYNC signal */ +#define VP_HTIM1 0x0454 /* Horizontal Timing Control 1 */ +#define VP_HTIM1_HBP(v)FLD_VAL(v, 24, 16) +#define VP_HTIM1_HSYNC(v) FLD_VAL(v, 8, 0) +#define VP_HTIM2 0x0458 /* Horizontal Timing Control 2 */ +#define VP_HTIM2_HFP(v)FLD_VAL(v, 24, 16) +#define VP_HTIM2_HACT(v) FLD_VAL(v, 10, 0) +#define VP_VTIM1 0x045C /* Vertical Timing Control 1 */ +#define VP_VTIM1_VBP(v)FLD_VAL(v, 23, 16) +#define VP_VTIM1_VSYNC(v) FLD_VAL(v, 7, 0) +#define VP_VTIM2 0x0460 /* Vertical Timing Control 2 */ +#define VP_VTIM2_VFP(v)FLD_VAL(v, 23, 16) +#define VP_VTIM2_VACT(v) FLD_VAL(v, 10, 0) +#define VP_VFUEN 0x0464 /*
