[PATCH 13/13] dt/bindings: drm/msm/hdmi: Add hdmi phy bindings

2016-01-25 Thread Archit Taneja


On 1/22/2016 4:56 AM, Rob Herring wrote:
> On Thu, Jan 21, 2016 at 12:39:41PM +0530, Archit Taneja wrote:
>> Add hdmi phy bindings. Update the example to use hdmi phy.
>>
>> Add a missing power-domains property in the hdmi core bindings.
>>
>> Cc: devicetree at vger.kernel.org
>> Cc: Rob Herring 
>>
>> Signed-off-by: Archit Taneja 
>> ---
>>   .../devicetree/bindings/display/msm/hdmi.txt   | 39 
>> +-
>>   1 file changed, 38 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt 
>> b/Documentation/devicetree/bindings/display/msm/hdmi.txt
>> index 379ee2e..21590ee 100644
>> --- a/Documentation/devicetree/bindings/display/msm/hdmi.txt
>> +++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt
>> @@ -11,6 +11,7 @@ Required properties:
>>   - reg: Physical base address and length of the controller's registers
>>   - reg-names: "core_physical"
>>   - interrupts: The interrupt signal from the hdmi block.
>> +- power-domains: Should be < MDSS_GDSC>.
>>   - clocks: device clocks
>> See ../clocks/clock-bindings.txt for details.
>>   - qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
>> @@ -18,6 +19,7 @@ Required properties:
>>   - qcom,hdmi-tx-hpd-gpio: hpd pin
>>   - core-vdda-supply: phandle to supply regulator
>>   - hdmi-mux-supply: phandle to mux regulator
>> +- qcom,dsi-phy: phandle to HDMI PHY device node
>
> dsi?

Sorry, this is a typo. It should be qcom,hdmi-phy.

>
> Why does this not use the phy binding?

The PHY in the HDMI and DSI blocks can't be implemented using the
common phy framework. The PHY blocks have a PLL sub-block within
them which acts as a pixel clock source for the display processor
block.

This dependency causes the need to split the phy power on sequence
into 2 parts (one to enable resources to enable the PLL, and the
other to enable the phy itself), which the phy framework can't
do. That's the main reason not to use it. There are some more
complex use cases for DSI PHY (drive two PHYs with the same
DSI PLL) which the phy framework can't support.

Thanks,
Archit

>
> Rob
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[PATCH 13/13] dt/bindings: drm/msm/hdmi: Add hdmi phy bindings

2016-01-21 Thread Rob Herring
On Thu, Jan 21, 2016 at 12:39:41PM +0530, Archit Taneja wrote:
> Add hdmi phy bindings. Update the example to use hdmi phy.
> 
> Add a missing power-domains property in the hdmi core bindings.
> 
> Cc: devicetree at vger.kernel.org
> Cc: Rob Herring 
> 
> Signed-off-by: Archit Taneja 
> ---
>  .../devicetree/bindings/display/msm/hdmi.txt   | 39 
> +-
>  1 file changed, 38 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt 
> b/Documentation/devicetree/bindings/display/msm/hdmi.txt
> index 379ee2e..21590ee 100644
> --- a/Documentation/devicetree/bindings/display/msm/hdmi.txt
> +++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt
> @@ -11,6 +11,7 @@ Required properties:
>  - reg: Physical base address and length of the controller's registers
>  - reg-names: "core_physical"
>  - interrupts: The interrupt signal from the hdmi block.
> +- power-domains: Should be < MDSS_GDSC>.
>  - clocks: device clocks
>See ../clocks/clock-bindings.txt for details.
>  - qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
> @@ -18,6 +19,7 @@ Required properties:
>  - qcom,hdmi-tx-hpd-gpio: hpd pin
>  - core-vdda-supply: phandle to supply regulator
>  - hdmi-mux-supply: phandle to mux regulator
> +- qcom,dsi-phy: phandle to HDMI PHY device node

dsi?

Why does this not use the phy binding?

Rob


[PATCH 13/13] dt/bindings: drm/msm/hdmi: Add hdmi phy bindings

2016-01-21 Thread Archit Taneja
Add hdmi phy bindings. Update the example to use hdmi phy.

Add a missing power-domains property in the hdmi core bindings.

Cc: devicetree at vger.kernel.org
Cc: Rob Herring 

Signed-off-by: Archit Taneja 
---
 .../devicetree/bindings/display/msm/hdmi.txt   | 39 +-
 1 file changed, 38 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt 
b/Documentation/devicetree/bindings/display/msm/hdmi.txt
index 379ee2e..21590ee 100644
--- a/Documentation/devicetree/bindings/display/msm/hdmi.txt
+++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt
@@ -11,6 +11,7 @@ Required properties:
 - reg: Physical base address and length of the controller's registers
 - reg-names: "core_physical"
 - interrupts: The interrupt signal from the hdmi block.
+- power-domains: Should be < MDSS_GDSC>.
 - clocks: device clocks
   See ../clocks/clock-bindings.txt for details.
 - qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
@@ -18,6 +19,7 @@ Required properties:
 - qcom,hdmi-tx-hpd-gpio: hpd pin
 - core-vdda-supply: phandle to supply regulator
 - hdmi-mux-supply: phandle to mux regulator
+- qcom,dsi-phy: phandle to HDMI PHY device node

 Optional properties:
 - qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
@@ -27,6 +29,27 @@ Optional properties:
 - pinctrl-0: the default pinctrl state (active)
 - pinctrl-1: the "sleep" pinctrl state

+HDMI PHY:
+Required properties:
+- compatible: Could be the following
+  * "qcom,hdmi-phy-8x60"
+  * "qcom,hdmi-phy-8960"
+  * "qcom,hdmi-phy-8x74"
+  * "qcom,hdmi-phy-8996"
+- reg: Physical base address and length of the registers of the PHY sub blocks.
+- reg-names: The names of register regions. The following regions are required:
+  * "hdmi_pll"
+  * "hdmi_phy"
+  For HDMI PHY on msm8996, these additional register regions are required:
+* "hdmi_tx_l0"
+* "hdmi_tx_l1"
+* "hdmi_tx_l3"
+* "hdmi_tx_l4"
+- power-domains: Should be < MDSS_GDSC>.
+- clocks: device clocks
+  See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.
+- core-vdda-supply: phandle to vdda regulator device node
+
 Example:

 / {
@@ -35,7 +58,7 @@ Example:
hdmi: qcom,hdmi-tx-8960 at 4a0 {
compatible = "qcom,hdmi-tx-8960";
reg-names = "core_physical";
-   reg = <0x04a0 0x1000>;
+   reg = <0x04a0 0x2f0>;
interrupts = ;
power-domains = < MDSS_GDSC>;
clock-names =
@@ -54,5 +77,19 @@ Example:
pinctrl-names = "default", "sleep";
pinctrl-0 = <_active  _active  _active>;
pinctrl-1 = <_suspend _suspend _suspend>;
+
+   qcom,hdmi-phy = <_phy>;
+   };
+
+   hdmi_phy: qcom,hdmi-phy-8960 at 4a00400 {
+   compatible = "qcom,hdmi-phy-8960";
+   reg-names = "hdmi_phy",
+   "hdmi_pll";
+   reg = <0x4a00400 0x60>,
+ <0x4a00500 0x100>;
+   power-domains = < MDSS_GDSC>;
+   clock-names = "slave_iface_clk";
+   clocks = < HDMI_S_AHB_CLK>;
+   core-vdda-supply = <_hdmi_mvs>;
};
 };
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