Re: [PATCH 2/4] disp/msm/dpu: add support to dump dpu registers
Hi Abhinav, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-exynos/exynos-drm-next] [also build test WARNING on drm-intel/for-linux-next tegra-drm/drm/tegra/for-next drm-tip/drm-tip linus/master v5.10-rc1 next-20201027] [cannot apply to drm/drm-next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Abhinav-Kumar/Add-devcoredump-support-for-DPU/20201022-130507 base: https://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git exynos-drm-next config: arm64-randconfig-s032-20201026 (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-56-gc09e8239-dirty # https://github.com/0day-ci/linux/commit/a7e6907c303a46ea8422fc3c414c22fdfb45d49f git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Abhinav-Kumar/Add-devcoredump-support-for-DPU/20201022-130507 git checkout a7e6907c303a46ea8422fc3c414c22fdfb45d49f # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot "sparse warnings: (new ones prefixed by >>)" >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:99:50: sparse: sparse: >> incorrect type in argument 1 (different address spaces) @@ expected void >> const volatile [noderef] __iomem *addr @@ got char * @@ >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:99:50: sparse: expected >> void const volatile [noderef] __iomem *addr >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:99:50: sparse: got char * drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:100:56: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __iomem *addr @@ got char * @@ drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:100:56: sparse: expected void const volatile [noderef] __iomem *addr drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:100:56: sparse: got char * drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:102:56: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __iomem *addr @@ got char * @@ drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:102:56: sparse: expected void const volatile [noderef] __iomem *addr drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:102:56: sparse: got char * drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:104:56: sparse: sparse: incorrect type in argument 1 (different address spaces) @@ expected void const volatile [noderef] __iomem *addr @@ got char * @@ drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:104:56: sparse: expected void const volatile [noderef] __iomem *addr drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:104:56: sparse: got char * >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:211:30: sparse: sparse: >> incorrect type in assignment (different address spaces) @@ expected char >> *addr @@ got void [noderef] __iomem * @@ >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:211:30: sparse: expected >> char *addr >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:211:30: sparse: got void >> [noderef] __iomem * >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:220:44: sparse: sparse: >> incorrect type in argument 4 (different address spaces) @@ expected char >> *base_addr @@ got void [noderef] __iomem *base @@ >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:220:44: sparse: expected >> char *base_addr >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:220:44: sparse: got void >> [noderef] __iomem *base >> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:229:22: sparse: sparse: >> incorrect type in assignment (different address spaces) @@ expected char >> *addr @@ got void [noderef] __iomem *base @@ drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:229:22: sparse: expected char *addr drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:229:22: sparse: got void [noderef] __iomem *base drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:232:36: sparse: sparse: incorrect type in argument 4 (different address spaces) @@ expected char *base_addr @@ got void [noderef] __iomem *base @@ drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:232:36: sparse: expected char *base_addr drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c:232:36: sparse: got void [noderef] __iomem *base vim +99 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c
Re: [PATCH 2/4] disp/msm/dpu: add support to dump dpu registers
Hi Abhinav,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-exynos/exynos-drm-next]
[also build test WARNING on drm-intel/for-linux-next
tegra-drm/drm/tegra/for-next drm-tip/drm-tip linus/master v5.9 next-20201022]
[cannot apply to drm/drm-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Abhinav-Kumar/Add-devcoredump-support-for-DPU/20201022-130507
base: https://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git
exynos-drm-next
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/0day-ci/linux/commit/a7e6907c303a46ea8422fc3c414c22fdfb45d49f
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review
Abhinav-Kumar/Add-devcoredump-support-for-DPU/20201022-130507
git checkout a7e6907c303a46ea8422fc3c414c22fdfb45d49f
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
All warnings (new ones prefixed by >>):
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c: In function 'dpu_dbg_dump':
>> drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c:115:6: warning: variable 'i' set but
>> not used [-Wunused-but-set-variable]
115 | int i, index = 0;
| ^
vim +/i +115 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
112
113 void dpu_dbg_dump(enum dpu_dbg_dump_context dump_mode, const char
*name, ...)
114 {
> 115 int i, index = 0;
116 bool do_panic = false;
117 bool dump_all = false;
118 va_list args;
119 char *blk_name = NULL;
120 struct dpu_dbg_reg_base *blk_base = NULL;
121 struct dpu_dbg_reg_base **blk_arr;
122 u32 blk_len;
123
124 /*
125 * if there is a coredump pending return immediately till dump
126 * if read by userspace or timeout happens
127 */
128 if (((dpu_dbg.enable_reg_dump == DPU_DBG_DUMP_IN_MEM) ||
129 (dpu_dbg.enable_reg_dump == DPU_DBG_DUMP_IN_COREDUMP))
&&
130 dpu_dbg.coredump_pending) {
131 pr_debug("coredump is pending read\n");
132 return;
133 }
134
135 blk_arr = _dbg.req_dump_blks[0];
136 blk_len = ARRAY_SIZE(dpu_dbg.req_dump_blks);
137
138 memset(dpu_dbg.req_dump_blks, 0,
139 sizeof(dpu_dbg.req_dump_blks));
140 dpu_dbg.dump_all = false;
141 dpu_dbg.dump_mode = dump_mode;
142
143 va_start(args, name);
144 i = 0;
145 while ((blk_name = va_arg(args, char*))) {
146
147 if (IS_ERR_OR_NULL(blk_name))
148 break;
149
150 blk_base = _dpu_dump_get_blk_addr(_dbg, blk_name);
151 if (blk_base) {
152 if (index < blk_len) {
153 blk_arr[index] = blk_base;
154 index++;
155 } else {
156 pr_err("insufficient space to dump
%s\n",
157 blk_name);
158 }
159 }
160
161 if (!strcmp(blk_name, "all"))
162 dump_all = true;
163
164 if (!strcmp(blk_name, "panic"))
165 do_panic = true;
166
167 }
168 va_end(args);
169
170 dpu_dbg.work_panic = do_panic;
171 dpu_dbg.dump_all = dump_all;
172
173 kthread_queue_work(dpu_dbg.dump_worker,
174 _dbg.dump_work);
175
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 2/4] disp/msm/dpu: add support to dump dpu registers
Add the dpu_dbg module which adds supports to dump dpu registers
which can be used in case of error conditions.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/Makefile | 2 +
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c | 316 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 273 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c | 313 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 4 +-
drivers/gpu/drm/msm/msm_drv.c | 6 +-
6 files changed, 912 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_dbg_util.c
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 340682cd0f32..96bd1398edac 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -54,6 +54,8 @@ msm-y := \
disp/dpu1/dpu_core_irq.o \
disp/dpu1/dpu_core_perf.o \
disp/dpu1/dpu_crtc.o \
+ disp/dpu1/dpu_dbg.o \
+ disp/dpu1/dpu_dbg_util.o \
disp/dpu1/dpu_encoder.o \
disp/dpu1/dpu_encoder_phys_cmd.o \
disp/dpu1/dpu_encoder_phys_vid.o \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
new file mode 100644
index ..6703e1555194
--- /dev/null
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.c
@@ -0,0 +1,316 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2009-2020, The Linux Foundation. All rights reserved.
+ */
+
+#define pr_fmt(fmt)"[drm:%s:%d] " fmt, __func__, __LINE__
+
+#include "dpu_dbg.h"
+#include "dpu_hw_catalog.h"
+
+/* global dpu debug base structure */
+static struct dpu_dbg_base dpu_dbg;
+
+
+#ifdef CONFIG_DEV_COREDUMP
+static ssize_t dpu_devcoredump_read(char *buffer, loff_t offset,
+ size_t count, void *data, size_t datalen)
+{
+ struct drm_print_iterator iter;
+ struct drm_printer p;
+
+ iter.data = buffer;
+ iter.offset = 0;
+ iter.start = offset;
+ iter.remain = count;
+
+ p = drm_coredump_printer();
+
+ drm_printf(, "---\n");
+
+ drm_printf(, "module: " KBUILD_MODNAME "\n");
+ drm_printf(, "dpu devcoredump\n");
+ drm_printf(, "timestamp %lld\n", ktime_to_ns(dpu_dbg.timestamp));
+
+ dpu_dbg.dpu_dbg_printer =
+ dpu_dbg.enable_reg_dump = DPU_DBG_DUMP_IN_COREDUMP;
+
+ drm_printf(, "===dpu regs\n");
+
+ _dpu_dump_array(_dbg, dpu_dbg.req_dump_blks,
+ ARRAY_SIZE(dpu_dbg.req_dump_blks),
+ dpu_dbg.work_panic, "evtlog_workitem",
+ dpu_dbg.dump_all);
+
+ drm_printf(, "===dpu drm state\n");
+
+ if (dpu_dbg.atomic_state)
+ drm_atomic_print_state(dpu_dbg.atomic_state,
+ );
+
+ return count - iter.remain;
+}
+
+static void dpu_devcoredump_free(void *data)
+{
+ if (dpu_dbg.atomic_state) {
+ drm_atomic_state_put(dpu_dbg.atomic_state);
+ dpu_dbg.atomic_state = NULL;
+ }
+ dpu_dbg.coredump_pending = false;
+}
+
+static void dpu_devcoredump_capture_state(void)
+{
+ struct drm_device *ddev;
+ struct drm_modeset_acquire_ctx ctx;
+
+ dpu_dbg.timestamp = ktime_get();
+
+ ddev = dpu_dbg.drm_dev;
+
+ drm_modeset_acquire_init(, 0);
+
+ while (drm_modeset_lock_all_ctx(ddev, ) != 0)
+ drm_modeset_backoff();
+
+ dpu_dbg.atomic_state = drm_atomic_helper_duplicate_state(ddev,
+ );
+ drm_modeset_drop_locks();
+ drm_modeset_acquire_fini();
+}
+#else
+static void dpu_devcoredump_capture_state(void)
+{
+}
+#endif /* CONFIG_DEV_COREDUMP */
+
+/**
+ * _dpu_dump_work - deferred dump work function
+ * @work: work structure
+ */
+static void _dpu_dump_work(struct kthread_work *work)
+{
+ /* reset the enable_reg_dump to default before every dump */
+ dpu_dbg.enable_reg_dump = DEFAULT_REGDUMP;
+
+ _dpu_dump_array(_dbg, dpu_dbg.req_dump_blks,
+ ARRAY_SIZE(dpu_dbg.req_dump_blks),
+ dpu_dbg.work_panic, "evtlog_workitem",
+ dpu_dbg.dump_all);
+
+ dpu_devcoredump_capture_state();
+
+#ifdef CONFIG_DEV_COREDUMP
+ if (dpu_dbg.enable_reg_dump & DPU_DBG_DUMP_IN_MEM) {
+ dev_coredumpm(dpu_dbg.dev, THIS_MODULE, _dbg, 0, GFP_KERNEL,
+ dpu_devcoredump_read, dpu_devcoredump_free);
+ dpu_dbg.coredump_pending = true;
+ }
+#endif
+}
+
+void dpu_dbg_dump(enum dpu_dbg_dump_context dump_mode, const char *name, ...)
+{
+ int i, index = 0;
+ bool do_panic = false;
+ bool dump_all = false;
+ va_list args;
+ char *blk_name = NULL;
+ struct dpu_dbg_reg_base *blk_base = NULL;
+ struct dpu_dbg_reg_base
