[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
>> >> From memory, even on pat system we need mtrr for VRAM is PCI BAR. We >> cover it with a write combine MTRR. The whole ioctl is use by some ddx >> or maybe even directly the XServer to do this mtrr mess in userspace. > > Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to > work fine, but almost nothing uses it. > > I'm amazed this stuff works in the current code, though. Apparently > the memory type (WC or UC) of a drm mapping is determined by the mtrr > the driver set, but if one part of the BAR is textures or the > framebuffer and another part is an outgoing command ring, won't one of > them end up with the wrong memory type? Nobody sane puts the command ring in VRAM. Dave.
[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Mon, May 6, 2013 at 7:39 PM, Andy Lutomirski wrote: > On Mon, May 6, 2013 at 4:04 PM, Jerome Glisse wrote: >> On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski >> wrote: >>> On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski >>> wrote: Signed-off-by: Andy Lutomirski --- This needs careful review. I don't really know what this code does, nor do I have the hardware. (I don't understand AGP and the associated caching implications.) >>> >>> This patch is wrong (I didn't update the matching mtrr_del), and I'm >>> reworking this whole series. But I may need some help on this one: >>> why is the mtrr handle of a map (whatever a map is) exported to >>> userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is >>> userspace supposed to do with it? Do I need to return a valid MTRR >>> register number? Is there any userspace code at all that sets >>> _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment >>> and needs the MTRR, for which the drm driver doesn't already add the >>> MTRR? >>> >>> --Andy >> >> From memory, even on pat system we need mtrr for VRAM is PCI BAR. We >> cover it with a write combine MTRR. The whole ioctl is use by some ddx >> or maybe even directly the XServer to do this mtrr mess in userspace. > > Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to > work fine, but almost nothing uses it. > > I'm amazed this stuff works in the current code, though. Apparently > the memory type (WC or UC) of a drm mapping is determined by the mtrr > the driver set, but if one part of the BAR is textures or the > framebuffer and another part is an outgoing command ring, won't one of > them end up with the wrong memory type? A lot of old chips used to put the registers and framebuffer in the same BAR. IIRC, the xserver and later libpciaccess had workarounds to deal with this. Alex
[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Tue, May 7, 2013 at 7:08 AM, Alex Deucher wrote: > On Mon, May 6, 2013 at 7:39 PM, Andy Lutomirski > wrote: >> On Mon, May 6, 2013 at 4:04 PM, Jerome Glisse wrote: >>> On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski >>> wrote: On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski wrote: > Signed-off-by: Andy Lutomirski > --- > > This needs careful review. I don't really know what this code does, nor > do I have the hardware. (I don't understand AGP and the associated > caching implications.) This patch is wrong (I didn't update the matching mtrr_del), and I'm reworking this whole series. But I may need some help on this one: why is the mtrr handle of a map (whatever a map is) exported to userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is userspace supposed to do with it? Do I need to return a valid MTRR register number? Is there any userspace code at all that sets _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment and needs the MTRR, for which the drm driver doesn't already add the MTRR? --Andy >>> >>> From memory, even on pat system we need mtrr for VRAM is PCI BAR. We >>> cover it with a write combine MTRR. The whole ioctl is use by some ddx >>> or maybe even directly the XServer to do this mtrr mess in userspace. >> >> Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to >> work fine, but almost nothing uses it. >> >> I'm amazed this stuff works in the current code, though. Apparently >> the memory type (WC or UC) of a drm mapping is determined by the mtrr >> the driver set, but if one part of the BAR is textures or the >> framebuffer and another part is an outgoing command ring, won't one of >> them end up with the wrong memory type? > > A lot of old chips used to put the registers and framebuffer in the > same BAR. IIRC, the xserver and later libpciaccess had workarounds to > deal with this. I think I read the code wrong (so my patch is garbage). Maybe there's actually no problem -- if DRM_AGP and DRM_FRAME_BUFFER are always WC, DRM_REGISTERS is only WC if explicitly requested, and DRM_SHM is always WB, so everything should be covered. Anything using libpciaccess ought to be unaffected by my changes -- I don't want to change /proc/mtrr or the sysfs stuff. The only possible issue is if there's a memtype conflict, but that's nothing new. --Andy
Re: [PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski l...@amacapital.net wrote: Signed-off-by: Andy Lutomirski l...@amacapital.net --- This needs careful review. I don't really know what this code does, nor do I have the hardware. (I don't understand AGP and the associated caching implications.) This patch is wrong (I didn't update the matching mtrr_del), and I'm reworking this whole series. But I may need some help on this one: why is the mtrr handle of a map (whatever a map is) exported to userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is userspace supposed to do with it? Do I need to return a valid MTRR register number? Is there any userspace code at all that sets _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment and needs the MTRR, for which the drm driver doesn't already add the MTRR? --Andy ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Mon, May 6, 2013 at 4:04 PM, Jerome Glisse j.gli...@gmail.com wrote: On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski l...@amacapital.net wrote: On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski l...@amacapital.net wrote: Signed-off-by: Andy Lutomirski l...@amacapital.net --- This needs careful review. I don't really know what this code does, nor do I have the hardware. (I don't understand AGP and the associated caching implications.) This patch is wrong (I didn't update the matching mtrr_del), and I'm reworking this whole series. But I may need some help on this one: why is the mtrr handle of a map (whatever a map is) exported to userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is userspace supposed to do with it? Do I need to return a valid MTRR register number? Is there any userspace code at all that sets _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment and needs the MTRR, for which the drm driver doesn't already add the MTRR? --Andy From memory, even on pat system we need mtrr for VRAM is PCI BAR. We cover it with a write combine MTRR. The whole ioctl is use by some ddx or maybe even directly the XServer to do this mtrr mess in userspace. Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to work fine, but almost nothing uses it. I'm amazed this stuff works in the current code, though. Apparently the memory type (WC or UC) of a drm mapping is determined by the mtrr the driver set, but if one part of the BAR is textures or the framebuffer and another part is an outgoing command ring, won't one of them end up with the wrong memory type? I'd really hate to have to track fake mtrrs in the drm core to emulate real mtrrs. Sorry for the bad news, but that's what i remember on that front thought i would need to read all the code again. On the bright side, in the entire 2005 monolithic xorg tarball, the only thing that looks at the mtrr exported to userspace appears to be dritests. --Andy ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Mon, May 6, 2013 at 7:39 PM, Andy Lutomirski l...@amacapital.net wrote: On Mon, May 6, 2013 at 4:04 PM, Jerome Glisse j.gli...@gmail.com wrote: On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski l...@amacapital.net wrote: On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski l...@amacapital.net wrote: Signed-off-by: Andy Lutomirski l...@amacapital.net --- This needs careful review. I don't really know what this code does, nor do I have the hardware. (I don't understand AGP and the associated caching implications.) This patch is wrong (I didn't update the matching mtrr_del), and I'm reworking this whole series. But I may need some help on this one: why is the mtrr handle of a map (whatever a map is) exported to userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is userspace supposed to do with it? Do I need to return a valid MTRR register number? Is there any userspace code at all that sets _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment and needs the MTRR, for which the drm driver doesn't already add the MTRR? --Andy From memory, even on pat system we need mtrr for VRAM is PCI BAR. We cover it with a write combine MTRR. The whole ioctl is use by some ddx or maybe even directly the XServer to do this mtrr mess in userspace. Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to work fine, but almost nothing uses it. I'm amazed this stuff works in the current code, though. Apparently the memory type (WC or UC) of a drm mapping is determined by the mtrr the driver set, but if one part of the BAR is textures or the framebuffer and another part is an outgoing command ring, won't one of them end up with the wrong memory type? A lot of old chips used to put the registers and framebuffer in the same BAR. IIRC, the xserver and later libpciaccess had workarounds to deal with this. Alex ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Tue, May 7, 2013 at 7:08 AM, Alex Deucher alexdeuc...@gmail.com wrote: On Mon, May 6, 2013 at 7:39 PM, Andy Lutomirski l...@amacapital.net wrote: On Mon, May 6, 2013 at 4:04 PM, Jerome Glisse j.gli...@gmail.com wrote: On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski l...@amacapital.net wrote: On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski l...@amacapital.net wrote: Signed-off-by: Andy Lutomirski l...@amacapital.net --- This needs careful review. I don't really know what this code does, nor do I have the hardware. (I don't understand AGP and the associated caching implications.) This patch is wrong (I didn't update the matching mtrr_del), and I'm reworking this whole series. But I may need some help on this one: why is the mtrr handle of a map (whatever a map is) exported to userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is userspace supposed to do with it? Do I need to return a valid MTRR register number? Is there any userspace code at all that sets _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment and needs the MTRR, for which the drm driver doesn't already add the MTRR? --Andy From memory, even on pat system we need mtrr for VRAM is PCI BAR. We cover it with a write combine MTRR. The whole ioctl is use by some ddx or maybe even directly the XServer to do this mtrr mess in userspace. Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to work fine, but almost nothing uses it. I'm amazed this stuff works in the current code, though. Apparently the memory type (WC or UC) of a drm mapping is determined by the mtrr the driver set, but if one part of the BAR is textures or the framebuffer and another part is an outgoing command ring, won't one of them end up with the wrong memory type? A lot of old chips used to put the registers and framebuffer in the same BAR. IIRC, the xserver and later libpciaccess had workarounds to deal with this. I think I read the code wrong (so my patch is garbage). Maybe there's actually no problem -- if DRM_AGP and DRM_FRAME_BUFFER are always WC, DRM_REGISTERS is only WC if explicitly requested, and DRM_SHM is always WB, so everything should be covered. Anything using libpciaccess ought to be unaffected by my changes -- I don't want to change /proc/mtrr or the sysfs stuff. The only possible issue is if there's a memtype conflict, but that's nothing new. --Andy ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski wrote: > On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski > wrote: >> Signed-off-by: Andy Lutomirski >> --- >> >> This needs careful review. I don't really know what this code does, nor >> do I have the hardware. (I don't understand AGP and the associated >> caching implications.) > > This patch is wrong (I didn't update the matching mtrr_del), and I'm > reworking this whole series. But I may need some help on this one: > why is the mtrr handle of a map (whatever a map is) exported to > userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is > userspace supposed to do with it? Do I need to return a valid MTRR > register number? Is there any userspace code at all that sets > _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment > and needs the MTRR, for which the drm driver doesn't already add the > MTRR? > > --Andy >From memory, even on pat system we need mtrr for VRAM is PCI BAR. We cover it with a write combine MTRR. The whole ioctl is use by some ddx or maybe even directly the XServer to do this mtrr mess in userspace. Sorry for the bad news, but that's what i remember on that front thought i would need to read all the code again. Cheers, Jerome
[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Mon, May 6, 2013 at 4:04 PM, Jerome Glisse wrote: > On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski > wrote: >> On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski >> wrote: >>> Signed-off-by: Andy Lutomirski >>> --- >>> >>> This needs careful review. I don't really know what this code does, nor >>> do I have the hardware. (I don't understand AGP and the associated >>> caching implications.) >> >> This patch is wrong (I didn't update the matching mtrr_del), and I'm >> reworking this whole series. But I may need some help on this one: >> why is the mtrr handle of a map (whatever a map is) exported to >> userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is >> userspace supposed to do with it? Do I need to return a valid MTRR >> register number? Is there any userspace code at all that sets >> _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment >> and needs the MTRR, for which the drm driver doesn't already add the >> MTRR? >> >> --Andy > > From memory, even on pat system we need mtrr for VRAM is PCI BAR. We > cover it with a write combine MTRR. The whole ioctl is use by some ddx > or maybe even directly the XServer to do this mtrr mess in userspace. Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to work fine, but almost nothing uses it. I'm amazed this stuff works in the current code, though. Apparently the memory type (WC or UC) of a drm mapping is determined by the mtrr the driver set, but if one part of the BAR is textures or the framebuffer and another part is an outgoing command ring, won't one of them end up with the wrong memory type? I'd really hate to have to track fake mtrrs in the drm core to emulate real mtrrs. > > Sorry for the bad news, but that's what i remember on that front > thought i would need to read all the code again. On the bright side, in the entire 2005 monolithic xorg tarball, the only thing that looks at the mtrr exported to userspace appears to be dritests. --Andy
[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski wrote: > Signed-off-by: Andy Lutomirski > --- > > This needs careful review. I don't really know what this code does, nor > do I have the hardware. (I don't understand AGP and the associated > caching implications.) This patch is wrong (I didn't update the matching mtrr_del), and I'm reworking this whole series. But I may need some help on this one: why is the mtrr handle of a map (whatever a map is) exported to userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is userspace supposed to do with it? Do I need to return a valid MTRR register number? Is there any userspace code at all that sets _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment and needs the MTRR, for which the drm driver doesn't already add the MTRR? --Andy
Re: [PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
On Mon, May 6, 2013 at 5:22 PM, Andy Lutomirski l...@amacapital.net wrote: On Fri, May 3, 2013 at 4:00 PM, Andy Lutomirski l...@amacapital.net wrote: Signed-off-by: Andy Lutomirski l...@amacapital.net --- This needs careful review. I don't really know what this code does, nor do I have the hardware. (I don't understand AGP and the associated caching implications.) This patch is wrong (I didn't update the matching mtrr_del), and I'm reworking this whole series. But I may need some help on this one: why is the mtrr handle of a map (whatever a map is) exported to userspace via the ADD_MAP and GET_MAP ioctls? What (if anything) is userspace supposed to do with it? Do I need to return a valid MTRR register number? Is there any userspace code at all that sets _DRM_WRITE_COMBINING in DRM_IOCTL_ADD_MAP with appropriate alignment and needs the MTRR, for which the drm driver doesn't already add the MTRR? --Andy From memory, even on pat system we need mtrr for VRAM is PCI BAR. We cover it with a write combine MTRR. The whole ioctl is use by some ddx or maybe even directly the XServer to do this mtrr mess in userspace. Sorry for the bad news, but that's what i remember on that front thought i would need to read all the code again. Cheers, Jerome ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
From memory, even on pat system we need mtrr for VRAM is PCI BAR. We cover it with a write combine MTRR. The whole ioctl is use by some ddx or maybe even directly the XServer to do this mtrr mess in userspace. Egads! So we have a _DRM_WRITE_COMBINING flag, which will continue to work fine, but almost nothing uses it. I'm amazed this stuff works in the current code, though. Apparently the memory type (WC or UC) of a drm mapping is determined by the mtrr the driver set, but if one part of the BAR is textures or the framebuffer and another part is an outgoing command ring, won't one of them end up with the wrong memory type? Nobody sane puts the command ring in VRAM. Dave. ___ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
Signed-off-by: Andy Lutomirski l...@amacapital.net
---
This needs careful review. I don't really know what this code does, nor
do I have the hardware. (I don't understand AGP and the associated
caching implications.)
drivers/gpu/drm/drm_bufs.c | 11 ---
drivers/gpu/drm/drm_vm.c | 13 +++--
2 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 0128147..0ae9cbb 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -210,8 +210,8 @@ static int drm_addmap_core(struct drm_device * dev,
resource_size_t offset,
if (drm_core_has_MTRR(dev)) {
if (map-type == _DRM_FRAME_BUFFER ||
(map-flags _DRM_WRITE_COMBINING)) {
- map-mtrr = mtrr_add(map-offset, map-size,
-MTRR_TYPE_WRCOMB, 1);
+ map-mtrr =
+ drm_mtrr_add_wc(map-offset, map-size);
}
}
if (map-type == _DRM_REGISTERS) {
@@ -451,11 +451,8 @@ int drm_rmmap_locked(struct drm_device *dev, struct
drm_local_map *map)
iounmap(map-handle);
/* FALLTHROUGH */
case _DRM_FRAME_BUFFER:
- if (drm_core_has_MTRR(dev) map-mtrr = 0) {
- int retcode;
- retcode = mtrr_del(map-mtrr, map-offset, map-size);
- DRM_DEBUG(mtrr_del=%d\n, retcode);
- }
+ if (drm_core_has_MTRR(dev))
+ drm_mtrr_del_wc(map-mtrr);
break;
case _DRM_SHM:
vfree(map-handle);
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index db7bd29..b255fd7 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -43,15 +43,16 @@
static void drm_vm_open(struct vm_area_struct *vma);
static void drm_vm_close(struct vm_area_struct *vma);
-static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma)
+static pgprot_t drm_io_prot(struct drm_local_map *map,
+ struct vm_area_struct *vma)
{
pgprot_t tmp = vm_get_page_prot(vma-vm_flags);
#if defined(__i386__) || defined(__x86_64__)
- if (boot_cpu_data.x86 3 map_type != _DRM_AGP) {
- pgprot_val(tmp) |= _PAGE_PCD;
- pgprot_val(tmp) = ~_PAGE_PWT;
- }
+ if (map-flags _DRM_WRITE_COMBINING)
+ tmp = pgprot_writecombine(tmp);
+ else if (map-type != _DRM_AGP)
+ tmp = pgprot_noncached(tmp);
#elif defined(__powerpc__)
pgprot_val(tmp) |= _PAGE_NO_CACHE;
if (map_type == _DRM_REGISTERS)
@@ -617,7 +618,7 @@ int drm_mmap_locked(struct file *filp, struct
vm_area_struct *vma)
case _DRM_REGISTERS:
offset = drm_core_get_reg_ofs(dev);
vma-vm_flags |= VM_IO; /* not in core dump */
- vma-vm_page_prot = drm_io_prot(map-type, vma);
+ vma-vm_page_prot = drm_io_prot(map, vma);
if (io_remap_pfn_range(vma, vma-vm_start,
(map-offset + offset) PAGE_SHIFT,
vma-vm_end - vma-vm_start,
--
1.8.1.4
___
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[PATCH 3/7] drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
Signed-off-by: Andy Lutomirski
---
This needs careful review. I don't really know what this code does, nor
do I have the hardware. (I don't understand AGP and the associated
caching implications.)
drivers/gpu/drm/drm_bufs.c | 11 ---
drivers/gpu/drm/drm_vm.c | 13 +++--
2 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 0128147..0ae9cbb 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -210,8 +210,8 @@ static int drm_addmap_core(struct drm_device * dev,
resource_size_t offset,
if (drm_core_has_MTRR(dev)) {
if (map->type == _DRM_FRAME_BUFFER ||
(map->flags & _DRM_WRITE_COMBINING)) {
- map->mtrr = mtrr_add(map->offset, map->size,
-MTRR_TYPE_WRCOMB, 1);
+ map->mtrr =
+ drm_mtrr_add_wc(map->offset, map->size);
}
}
if (map->type == _DRM_REGISTERS) {
@@ -451,11 +451,8 @@ int drm_rmmap_locked(struct drm_device *dev, struct
drm_local_map *map)
iounmap(map->handle);
/* FALLTHROUGH */
case _DRM_FRAME_BUFFER:
- if (drm_core_has_MTRR(dev) && map->mtrr >= 0) {
- int retcode;
- retcode = mtrr_del(map->mtrr, map->offset, map->size);
- DRM_DEBUG("mtrr_del=%d\n", retcode);
- }
+ if (drm_core_has_MTRR(dev))
+ drm_mtrr_del_wc(map->mtrr);
break;
case _DRM_SHM:
vfree(map->handle);
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index db7bd29..b255fd7 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -43,15 +43,16 @@
static void drm_vm_open(struct vm_area_struct *vma);
static void drm_vm_close(struct vm_area_struct *vma);
-static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma)
+static pgprot_t drm_io_prot(struct drm_local_map *map,
+ struct vm_area_struct *vma)
{
pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
#if defined(__i386__) || defined(__x86_64__)
- if (boot_cpu_data.x86 > 3 && map_type != _DRM_AGP) {
- pgprot_val(tmp) |= _PAGE_PCD;
- pgprot_val(tmp) &= ~_PAGE_PWT;
- }
+ if (map->flags & _DRM_WRITE_COMBINING)
+ tmp = pgprot_writecombine(tmp);
+ else if (map->type != _DRM_AGP)
+ tmp = pgprot_noncached(tmp);
#elif defined(__powerpc__)
pgprot_val(tmp) |= _PAGE_NO_CACHE;
if (map_type == _DRM_REGISTERS)
@@ -617,7 +618,7 @@ int drm_mmap_locked(struct file *filp, struct
vm_area_struct *vma)
case _DRM_REGISTERS:
offset = drm_core_get_reg_ofs(dev);
vma->vm_flags |= VM_IO; /* not in core dump */
- vma->vm_page_prot = drm_io_prot(map->type, vma);
+ vma->vm_page_prot = drm_io_prot(map, vma);
if (io_remap_pfn_range(vma, vma->vm_start,
(map->offset + offset) >> PAGE_SHIFT,
vma->vm_end - vma->vm_start,
--
1.8.1.4
